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152
.gitignore
vendored
152
.gitignore
vendored
@@ -1,136 +1,36 @@
|
|||||||
# Keil MDK-ARM generated files
|
*.rar
|
||||||
*.o
|
*.o
|
||||||
*.d
|
*.d
|
||||||
*.crf
|
*.crf
|
||||||
*.htm
|
*.htm
|
||||||
*.map
|
|
||||||
*.dep
|
*.dep
|
||||||
*.uvguix.*
|
*.map
|
||||||
*.uvoptx
|
|
||||||
*.bak
|
*.bak
|
||||||
*.orig
|
*.lnp
|
||||||
*.axf
|
*.lst
|
||||||
*.bin
|
*.ini
|
||||||
*.elf
|
*.iex
|
||||||
*.hex
|
*.pyc
|
||||||
*.lib
|
*.sct
|
||||||
*.a
|
*.scvd
|
||||||
*.exe
|
|
||||||
|
|
||||||
# Keil project user settings
|
|
||||||
*.uvguix
|
*.uvguix
|
||||||
*.uvgui.*
|
*.dbg*
|
||||||
*.uvopt
|
*.uvguix.*
|
||||||
Listings/
|
.mxproject
|
||||||
Objects/
|
|
||||||
RTE/
|
RTE/
|
||||||
DebugConfig/
|
Templates/
|
||||||
|
Examples/
|
||||||
|
底盘/
|
||||||
|
!*.uvprojx
|
||||||
|
!*.h
|
||||||
|
!*.c
|
||||||
|
!*.ioc
|
||||||
|
!*.axf
|
||||||
|
!*.bin
|
||||||
|
!*.hex
|
||||||
|
|
||||||
# CubeMX generated backup files
|
|
||||||
*.tmp
|
|
||||||
*#
|
|
||||||
*~
|
|
||||||
*.swp
|
|
||||||
*.swo
|
|
||||||
|
|
||||||
# System generated files
|
|
||||||
Thumbs.db
|
|
||||||
ehthumbs.db
|
|
||||||
Desktop.ini
|
|
||||||
$RECYCLE.BIN/
|
|
||||||
.DS_Store
|
|
||||||
.DS_Store?
|
|
||||||
._*
|
|
||||||
.Spotlight-V100
|
|
||||||
.Trashes
|
|
||||||
Icon?
|
|
||||||
|
|
||||||
# IDE specific files
|
|
||||||
.vscode/
|
|
||||||
.idea/
|
|
||||||
*.workspace
|
|
||||||
*.project
|
|
||||||
*.cproject
|
|
||||||
*.settings/
|
|
||||||
|
|
||||||
# Build directories
|
|
||||||
build/
|
build/
|
||||||
Build/
|
dist/
|
||||||
BUILD/
|
*.spec
|
||||||
debug/
|
*.exe
|
||||||
Debug/
|
|
||||||
DEBUG/
|
|
||||||
release/
|
|
||||||
Release/
|
|
||||||
RELEASE/
|
|
||||||
|
|
||||||
# HAL/LL library files (if using git submodules, you might want to keep these)
|
|
||||||
# Drivers/STM32*/HAL_Driver/
|
|
||||||
# Drivers/STM32*/LL_Driver/
|
|
||||||
|
|
||||||
# Generated documentation
|
|
||||||
html/
|
|
||||||
latex/
|
|
||||||
|
|
||||||
# Temporary files
|
|
||||||
*.log
|
|
||||||
*.tlog
|
|
||||||
*.idb
|
|
||||||
*.pdb
|
|
||||||
*.ilk
|
|
||||||
*.exp
|
|
||||||
*.pch
|
|
||||||
*.ipch
|
|
||||||
*.sdf
|
|
||||||
*.opensdf
|
|
||||||
*.suo
|
|
||||||
*.user
|
|
||||||
*.ncb
|
|
||||||
*.aps
|
|
||||||
*.tags
|
|
||||||
*.res
|
|
||||||
|
|
||||||
# Memory dump files
|
|
||||||
*.dmp
|
|
||||||
*.mdmp
|
|
||||||
|
|
||||||
# JLink files
|
|
||||||
JLinkLog.txt
|
|
||||||
JLinkSettings.ini
|
|
||||||
|
|
||||||
# OpenOCD files
|
|
||||||
openocd.log
|
|
||||||
|
|
||||||
# ST-Link files
|
|
||||||
STLinkUpgrade.log
|
|
||||||
|
|
||||||
# Compiler specific
|
|
||||||
*.[oa]
|
|
||||||
*.so
|
|
||||||
*.dll
|
|
||||||
*.dylib
|
|
||||||
|
|
||||||
# Package files
|
|
||||||
*.tar.gz
|
|
||||||
*.zip
|
|
||||||
*.rar
|
|
||||||
*.7z
|
|
||||||
|
|
||||||
# Node.js (if using any web tools)
|
|
||||||
node_modules/
|
|
||||||
npm-debug.log*
|
|
||||||
yarn-debug.log*
|
|
||||||
yarn-error.log*
|
|
||||||
|
|
||||||
# Python (if using any Python scripts)
|
|
||||||
__pycache__/
|
|
||||||
*.py[cod]
|
|
||||||
*$py.class
|
|
||||||
*.egg-info/
|
|
||||||
.pytest_cache/
|
|
||||||
|
|
||||||
# Custom additions for embedded development
|
|
||||||
# Add any project-specific files you want to ignore here
|
|
||||||
# Example:
|
|
||||||
# custom_config.h
|
|
||||||
# local_settings.txt
|
|
||||||
94
.mxproject
94
.mxproject
File diff suppressed because one or more lines are too long
147
.settings/bundles-lock.store.json
Normal file
147
.settings/bundles-lock.store.json
Normal file
@@ -0,0 +1,147 @@
|
|||||||
|
{
|
||||||
|
"resolved": [
|
||||||
|
{
|
||||||
|
"name": "cmake",
|
||||||
|
"version": "4.0.1+st.3",
|
||||||
|
"platform": "darwin",
|
||||||
|
"selected_by": [
|
||||||
|
{
|
||||||
|
"name": "cmake",
|
||||||
|
"version": "4.0.1+st.3"
|
||||||
|
}
|
||||||
|
]
|
||||||
|
},
|
||||||
|
{
|
||||||
|
"name": "cmake",
|
||||||
|
"version": "4.0.1+st.3",
|
||||||
|
"platform": "x86_64-linux",
|
||||||
|
"selected_by": [
|
||||||
|
{
|
||||||
|
"name": "cmake",
|
||||||
|
"version": "4.0.1+st.3"
|
||||||
|
}
|
||||||
|
]
|
||||||
|
},
|
||||||
|
{
|
||||||
|
"name": "cmake",
|
||||||
|
"version": "4.0.1+st.3",
|
||||||
|
"platform": "x86_64-windows",
|
||||||
|
"selected_by": [
|
||||||
|
{
|
||||||
|
"name": "cmake",
|
||||||
|
"version": "4.0.1+st.3"
|
||||||
|
}
|
||||||
|
]
|
||||||
|
},
|
||||||
|
{
|
||||||
|
"name": "gnu-tools-for-stm32",
|
||||||
|
"version": "13.3.1+st.9",
|
||||||
|
"platform": "darwin",
|
||||||
|
"selected_by": [
|
||||||
|
{
|
||||||
|
"name": "gnu-tools-for-stm32",
|
||||||
|
"version": "13.3.1+st.9"
|
||||||
|
}
|
||||||
|
]
|
||||||
|
},
|
||||||
|
{
|
||||||
|
"name": "gnu-tools-for-stm32",
|
||||||
|
"version": "13.3.1+st.9",
|
||||||
|
"platform": "x86_64-linux",
|
||||||
|
"selected_by": [
|
||||||
|
{
|
||||||
|
"name": "gnu-tools-for-stm32",
|
||||||
|
"version": "13.3.1+st.9"
|
||||||
|
}
|
||||||
|
]
|
||||||
|
},
|
||||||
|
{
|
||||||
|
"name": "gnu-tools-for-stm32",
|
||||||
|
"version": "13.3.1+st.9",
|
||||||
|
"platform": "x86_64-windows",
|
||||||
|
"selected_by": [
|
||||||
|
{
|
||||||
|
"name": "gnu-tools-for-stm32",
|
||||||
|
"version": "13.3.1+st.9"
|
||||||
|
}
|
||||||
|
]
|
||||||
|
},
|
||||||
|
{
|
||||||
|
"name": "gnu-tools-for-stm32-13_3_1-description",
|
||||||
|
"version": "1.0.1+st.1",
|
||||||
|
"platform": "all",
|
||||||
|
"selected_by": [
|
||||||
|
{
|
||||||
|
"name": "gnu-tools-for-stm32-13_3_1-description",
|
||||||
|
"version": ">=0.0.1"
|
||||||
|
}
|
||||||
|
]
|
||||||
|
},
|
||||||
|
{
|
||||||
|
"name": "ninja",
|
||||||
|
"version": "1.13.1+st.1",
|
||||||
|
"platform": "darwin",
|
||||||
|
"selected_by": [
|
||||||
|
{
|
||||||
|
"name": "ninja",
|
||||||
|
"version": "1.13.1+st.1"
|
||||||
|
}
|
||||||
|
]
|
||||||
|
},
|
||||||
|
{
|
||||||
|
"name": "ninja",
|
||||||
|
"version": "1.13.1+st.1",
|
||||||
|
"platform": "x86_64-linux",
|
||||||
|
"selected_by": [
|
||||||
|
{
|
||||||
|
"name": "ninja",
|
||||||
|
"version": "1.13.1+st.1"
|
||||||
|
}
|
||||||
|
]
|
||||||
|
},
|
||||||
|
{
|
||||||
|
"name": "ninja",
|
||||||
|
"version": "1.13.1+st.1",
|
||||||
|
"platform": "x86_64-windows",
|
||||||
|
"selected_by": [
|
||||||
|
{
|
||||||
|
"name": "ninja",
|
||||||
|
"version": "1.13.1+st.1"
|
||||||
|
}
|
||||||
|
]
|
||||||
|
},
|
||||||
|
{
|
||||||
|
"name": "st-arm-clangd",
|
||||||
|
"version": "19.1.2+st.3",
|
||||||
|
"platform": "darwin",
|
||||||
|
"selected_by": [
|
||||||
|
{
|
||||||
|
"name": "st-arm-clangd",
|
||||||
|
"version": "19.1.2+st.3"
|
||||||
|
}
|
||||||
|
]
|
||||||
|
},
|
||||||
|
{
|
||||||
|
"name": "st-arm-clangd",
|
||||||
|
"version": "19.1.2+st.3",
|
||||||
|
"platform": "x86_64-linux",
|
||||||
|
"selected_by": [
|
||||||
|
{
|
||||||
|
"name": "st-arm-clangd",
|
||||||
|
"version": "19.1.2+st.3"
|
||||||
|
}
|
||||||
|
]
|
||||||
|
},
|
||||||
|
{
|
||||||
|
"name": "st-arm-clangd",
|
||||||
|
"version": "19.1.2+st.3",
|
||||||
|
"platform": "x86_64-windows",
|
||||||
|
"selected_by": [
|
||||||
|
{
|
||||||
|
"name": "st-arm-clangd",
|
||||||
|
"version": "19.1.2+st.3"
|
||||||
|
}
|
||||||
|
]
|
||||||
|
}
|
||||||
|
]
|
||||||
|
}
|
||||||
20
.settings/bundles.store.json
Normal file
20
.settings/bundles.store.json
Normal file
@@ -0,0 +1,20 @@
|
|||||||
|
{
|
||||||
|
"bundles": [
|
||||||
|
{
|
||||||
|
"name": "cmake",
|
||||||
|
"version": "4.0.1+st.3"
|
||||||
|
},
|
||||||
|
{
|
||||||
|
"name": "ninja",
|
||||||
|
"version": "1.13.1+st.1"
|
||||||
|
},
|
||||||
|
{
|
||||||
|
"name": "gnu-tools-for-stm32",
|
||||||
|
"version": "13.3.1+st.9"
|
||||||
|
},
|
||||||
|
{
|
||||||
|
"name": "st-arm-clangd",
|
||||||
|
"version": "19.1.2+st.3"
|
||||||
|
}
|
||||||
|
]
|
||||||
|
}
|
||||||
6
.settings/ide.store.json
Normal file
6
.settings/ide.store.json
Normal file
@@ -0,0 +1,6 @@
|
|||||||
|
{
|
||||||
|
"device": "STM32H723VGT6",
|
||||||
|
"core": "Cortex-M7",
|
||||||
|
"order": 0,
|
||||||
|
"toolchain": "GCC"
|
||||||
|
}
|
||||||
16
.vscode/c_cpp_properties.json
vendored
Normal file
16
.vscode/c_cpp_properties.json
vendored
Normal file
@@ -0,0 +1,16 @@
|
|||||||
|
{
|
||||||
|
"configurations": [
|
||||||
|
{
|
||||||
|
"name": "STM32",
|
||||||
|
"compileCommands": "${workspaceFolder}/build/Debug/compile_commands.json",
|
||||||
|
"macFrameworkPath": [
|
||||||
|
"/System/Library/Frameworks",
|
||||||
|
"/Library/Frameworks"
|
||||||
|
],
|
||||||
|
"intelliSenseMode": "macos-clang-x64",
|
||||||
|
"cStandard": "c17",
|
||||||
|
"cppStandard": "c++14"
|
||||||
|
}
|
||||||
|
],
|
||||||
|
"version": 4
|
||||||
|
}
|
||||||
15
.vscode/settings.json
vendored
Normal file
15
.vscode/settings.json
vendored
Normal file
@@ -0,0 +1,15 @@
|
|||||||
|
{
|
||||||
|
"cmake.cmakePath": "cube-cmake",
|
||||||
|
"cmake.configureArgs": [
|
||||||
|
"-DCMAKE_COMMAND=cube-cmake"
|
||||||
|
],
|
||||||
|
"cmake.preferredGenerators": [
|
||||||
|
"Ninja"
|
||||||
|
],
|
||||||
|
"stm32cube-ide-clangd.path": "cube",
|
||||||
|
"stm32cube-ide-clangd.arguments": [
|
||||||
|
"starm-clangd",
|
||||||
|
"--query-driver=${env:CUBE_BUNDLE_PATH}/gnu-tools-for-stm32/13.3.1+st.9/bin/arm-none-eabi-gcc",
|
||||||
|
"--query-driver=${env:CUBE_BUNDLE_PATH}/gnu-tools-for-stm32/13.3.1+st.9/bin/arm-none-eabi-g++"
|
||||||
|
]
|
||||||
|
}
|
||||||
98
BuzzerAlarm.hpp
Normal file
98
BuzzerAlarm.hpp
Normal file
@@ -0,0 +1,98 @@
|
|||||||
|
#pragma once
|
||||||
|
|
||||||
|
// clang-format off
|
||||||
|
/* === MODULE MANIFEST V2 ===
|
||||||
|
module_description: 无源蜂鸣器报警模块 / Buzzer alarm module
|
||||||
|
constructor_args:
|
||||||
|
- alarm_delay: 5000
|
||||||
|
template_args: []
|
||||||
|
required_hardware: pwm_buzzer
|
||||||
|
depends: []
|
||||||
|
=== END MANIFEST === */
|
||||||
|
// clang-format on
|
||||||
|
|
||||||
|
#include "app_framework.hpp"
|
||||||
|
#include "pwm.hpp"
|
||||||
|
|
||||||
|
class BuzzerAlarm : public LibXR::Application {
|
||||||
|
public:
|
||||||
|
// NOLINTNEXTLINE
|
||||||
|
enum class NoteName { C = 0, Cs, D, Ds, E, F, Fs, G, Gs, A, As, B };
|
||||||
|
|
||||||
|
BuzzerAlarm(LibXR::HardwareContainer& hw, LibXR::ApplicationManager& app,
|
||||||
|
uint32_t alarm_delay)
|
||||||
|
:
|
||||||
|
alarm_delay_(alarm_delay),
|
||||||
|
pwm_(hw.template FindOrExit<LibXR::PWM>({"pwm_tim12_ch2"})) {
|
||||||
|
app.Register(*this);
|
||||||
|
|
||||||
|
auto error_callback = LibXR::Assert::Callback::Create(
|
||||||
|
[](bool in_isr, BuzzerAlarm* alarm, const char* file, uint32_t line) {
|
||||||
|
UNUSED(file);
|
||||||
|
UNUSED(line);
|
||||||
|
|
||||||
|
alarm->PlayNote(NoteName::D, 4, 600);
|
||||||
|
alarm->PlayNote(NoteName::E, 4, 600);
|
||||||
|
alarm->PlayNote(NoteName::G, 4, 600);
|
||||||
|
alarm->PlayNote(NoteName::E, 4, 600);
|
||||||
|
alarm->PlayNote(NoteName::D, 4, 300);
|
||||||
|
alarm->PlayNote(NoteName::E, 4, 150);
|
||||||
|
alarm->PlayNote(NoteName::D, 4, 300);
|
||||||
|
alarm->PlayNote(NoteName::C, 4, 300);
|
||||||
|
alarm->PlayNote(NoteName::A, 3, 900);
|
||||||
|
LibXR::Thread::Sleep(300);
|
||||||
|
|
||||||
|
alarm->PlayNote(NoteName::D, 4, 600);
|
||||||
|
alarm->PlayNote(NoteName::E, 4, 600);
|
||||||
|
alarm->PlayNote(NoteName::G, 4, 600);
|
||||||
|
alarm->PlayNote(NoteName::E, 4, 600);
|
||||||
|
alarm->PlayNote(NoteName::D, 4, 300);
|
||||||
|
alarm->PlayNote(NoteName::E, 4, 150);
|
||||||
|
alarm->PlayNote(NoteName::D, 4, 300);
|
||||||
|
alarm->PlayNote(NoteName::A, 3, 300);
|
||||||
|
alarm->PlayNote(NoteName::C, 4, 900);
|
||||||
|
if (!in_isr) {
|
||||||
|
LibXR::Thread::Sleep(alarm->alarm_delay_);
|
||||||
|
}
|
||||||
|
},
|
||||||
|
this);
|
||||||
|
|
||||||
|
LibXR::Assert::RegisterFatalErrorCallback(error_callback);
|
||||||
|
PlayNote(NoteName::B, 5, 200);
|
||||||
|
PlayNote(NoteName::G, 4, 200);
|
||||||
|
PlayNote(NoteName::B, 5, 400);
|
||||||
|
PlayNote(NoteName::G, 4, 200);
|
||||||
|
PlayNote(NoteName::B, 5, 400);
|
||||||
|
PlayNote(NoteName::G, 4, 200);
|
||||||
|
PlayNote(NoteName::D, 5, 400);
|
||||||
|
PlayNote(NoteName::G, 4, 200);
|
||||||
|
PlayNote(NoteName::C, 5, 200);
|
||||||
|
PlayNote(NoteName::C, 5, 200);
|
||||||
|
PlayNote(NoteName::G, 4, 200);
|
||||||
|
PlayNote(NoteName::B, 5, 200);
|
||||||
|
PlayNote(NoteName::C, 5, 200);
|
||||||
|
}
|
||||||
|
|
||||||
|
void Play(uint32_t freq, uint32_t duration) {
|
||||||
|
pwm_->SetConfig({freq});
|
||||||
|
pwm_->Enable();
|
||||||
|
pwm_->SetDutyCycle(0.5);
|
||||||
|
LibXR::Thread::Sleep(duration);
|
||||||
|
pwm_->Disable();
|
||||||
|
}
|
||||||
|
|
||||||
|
void PlayNote(NoteName note, uint32_t octave, uint32_t duration) {
|
||||||
|
int midi_num = static_cast<int>(note) + static_cast<int>((octave + 1) * 12);
|
||||||
|
float freq =
|
||||||
|
440.0f * std::pow(2.0f, (static_cast<float>(midi_num) - 69.0f) / 12.0f);
|
||||||
|
Play(static_cast<uint32_t>(freq), static_cast<uint32_t>(duration));
|
||||||
|
}
|
||||||
|
|
||||||
|
void OnMonitor() override {
|
||||||
|
}
|
||||||
|
|
||||||
|
private:
|
||||||
|
uint32_t alarm_delay_;
|
||||||
|
|
||||||
|
LibXR::PWM* pwm_;
|
||||||
|
};
|
||||||
@@ -19,7 +19,7 @@ if(NOT CMAKE_BUILD_TYPE)
|
|||||||
endif()
|
endif()
|
||||||
|
|
||||||
# Set the project name
|
# Set the project name
|
||||||
set(CMAKE_PROJECT_NAME DevC)
|
set(CMAKE_PROJECT_NAME CtrBoard-H7_ALL)
|
||||||
|
|
||||||
# Enable compile command to ease indexing with e.g. clangd
|
# Enable compile command to ease indexing with e.g. clangd
|
||||||
set(CMAKE_EXPORT_COMPILE_COMMANDS TRUE)
|
set(CMAKE_EXPORT_COMPILE_COMMANDS TRUE)
|
||||||
@@ -46,11 +46,8 @@ target_link_directories(${CMAKE_PROJECT_NAME} PRIVATE
|
|||||||
target_sources(${CMAKE_PROJECT_NAME} PRIVATE
|
target_sources(${CMAKE_PROJECT_NAME} PRIVATE
|
||||||
# Add user sources here
|
# Add user sources here
|
||||||
# User/bsp sources
|
# User/bsp sources
|
||||||
User/bsp/can.c
|
User/bsp/fdcan.c
|
||||||
<<<<<<< HEAD
|
User/bsp/flash.c
|
||||||
=======
|
|
||||||
User/bsp/dwt.c
|
|
||||||
>>>>>>> main
|
|
||||||
User/bsp/gpio.c
|
User/bsp/gpio.c
|
||||||
User/bsp/mm.c
|
User/bsp/mm.c
|
||||||
User/bsp/pwm.c
|
User/bsp/pwm.c
|
||||||
@@ -75,45 +72,65 @@ target_sources(${CMAKE_PROJECT_NAME} PRIVATE
|
|||||||
User/bsp/uart.c
|
User/bsp/uart.c
|
||||||
|
|
||||||
# User/component sources
|
# User/component sources
|
||||||
|
User/component/QuaternionEKF.c
|
||||||
User/component/ahrs.c
|
User/component/ahrs.c
|
||||||
User/component/cmd.c
|
User/component/crc16.c
|
||||||
|
User/component/crc8.c
|
||||||
|
User/component/error_detect.c
|
||||||
User/component/filter.c
|
User/component/filter.c
|
||||||
User/component/kinematics.c
|
User/component/freertos_cli.c
|
||||||
|
User/component/kalman_filter.c
|
||||||
User/component/limiter.c
|
User/component/limiter.c
|
||||||
User/component/lqr.c
|
User/component/lqr.c
|
||||||
User/component/pid.c
|
User/component/pid.c
|
||||||
|
User/component/speed_planner.c
|
||||||
User/component/user_math.c
|
User/component/user_math.c
|
||||||
User/component/vmc.c
|
User/component/vmc.c
|
||||||
|
|
||||||
# User/device sources
|
# User/device sources
|
||||||
|
User/device/ai.c
|
||||||
|
User/device/bmi088.c
|
||||||
User/device/buzzer.c
|
User/device/buzzer.c
|
||||||
User/device/dm_imu.c
|
User/device/dm_imu.c
|
||||||
User/device/dr16.c
|
User/device/dr16.c
|
||||||
|
User/device/gimbal_imu.c
|
||||||
User/device/motor.c
|
User/device/motor.c
|
||||||
User/device/motor_dm.c
|
User/device/motor_dm.c
|
||||||
User/device/motor_lk.c
|
User/device/motor_lk.c
|
||||||
User/device/motor_lz.c
|
User/device/motor_lz.c
|
||||||
User/device/motor_rm.c
|
User/device/motor_rm.c
|
||||||
User/device/rc_can.c
|
User/device/vision_bridge.c
|
||||||
|
User/device/vofa.c
|
||||||
|
User/device/mrobot.c
|
||||||
|
|
||||||
# User/module sources
|
# User/module sources
|
||||||
>>>>>>> main
|
>>>>>>> main
|
||||||
User/module/balance_chassis.c
|
User/module/balance_chassis.c
|
||||||
|
User/module/cmd.c
|
||||||
User/module/config.c
|
User/module/config.c
|
||||||
|
User/module/gimbal.c
|
||||||
|
User/module/shoot.c
|
||||||
|
|
||||||
# User/task sources
|
# User/task sources
|
||||||
User/task/atti_esti.c
|
User/task/ai.c
|
||||||
|
User/task/atti_esit.c
|
||||||
User/task/blink.c
|
User/task/blink.c
|
||||||
|
User/task/cmd.c
|
||||||
User/task/ctrl_chassis.c
|
User/task/ctrl_chassis.c
|
||||||
<<<<<<< HEAD
|
<<<<<<< HEAD
|
||||||
User/task/imu.c
|
User/task/imu.c
|
||||||
User/task/init.c
|
User/task/init.c
|
||||||
=======
|
=======
|
||||||
User/task/ctrl_gimbal.c
|
User/task/ctrl_gimbal.c
|
||||||
|
User/task/ctrl_shoot.c
|
||||||
|
User/task/debug.c
|
||||||
User/task/init.c
|
User/task/init.c
|
||||||
|
User/task/monitor.c
|
||||||
|
User/task/music.c
|
||||||
User/task/rc.c
|
User/task/rc.c
|
||||||
>>>>>>> main
|
User/task/cli.c
|
||||||
User/task/user_task.c
|
User/task/user_task.c
|
||||||
|
User/task/vofa.c
|
||||||
)
|
)
|
||||||
|
|
||||||
# Add include paths
|
# Add include paths
|
||||||
@@ -133,6 +150,7 @@ list(REMOVE_ITEM CMAKE_C_IMPLICIT_LINK_LIBRARIES ob)
|
|||||||
# Add linked libraries
|
# Add linked libraries
|
||||||
target_link_libraries(${CMAKE_PROJECT_NAME}
|
target_link_libraries(${CMAKE_PROJECT_NAME}
|
||||||
stm32cubemx
|
stm32cubemx
|
||||||
|
${CMAKE_SOURCE_DIR}/Drivers/CMSIS/DSP/Lib/GCC/libarm_cortexM7lfsp_math.a
|
||||||
|
|
||||||
# Add user defined libraries
|
# Add user defined libraries
|
||||||
)
|
)
|
||||||
|
|||||||
@@ -18,31 +18,11 @@
|
|||||||
}
|
}
|
||||||
},
|
},
|
||||||
{
|
{
|
||||||
<<<<<<< HEAD
|
|
||||||
=======
|
|
||||||
"name": "RelWithDebInfo",
|
|
||||||
"inherits": "default",
|
|
||||||
"cacheVariables": {
|
|
||||||
"CMAKE_BUILD_TYPE": "RelWithDebInfo"
|
|
||||||
}
|
|
||||||
},
|
|
||||||
{
|
|
||||||
>>>>>>> main
|
|
||||||
"name": "Release",
|
"name": "Release",
|
||||||
"inherits": "default",
|
"inherits": "default",
|
||||||
"cacheVariables": {
|
"cacheVariables": {
|
||||||
"CMAKE_BUILD_TYPE": "Release"
|
"CMAKE_BUILD_TYPE": "Release"
|
||||||
}
|
}
|
||||||
<<<<<<< HEAD
|
|
||||||
=======
|
|
||||||
},
|
|
||||||
{
|
|
||||||
"name": "MinSizeRel",
|
|
||||||
"inherits": "default",
|
|
||||||
"cacheVariables": {
|
|
||||||
"CMAKE_BUILD_TYPE": "MinSizeRel"
|
|
||||||
}
|
|
||||||
>>>>>>> main
|
|
||||||
}
|
}
|
||||||
],
|
],
|
||||||
"buildPresets": [
|
"buildPresets": [
|
||||||
@@ -51,21 +31,8 @@
|
|||||||
"configurePreset": "Debug"
|
"configurePreset": "Debug"
|
||||||
},
|
},
|
||||||
{
|
{
|
||||||
<<<<<<< HEAD
|
|
||||||
"name": "Release",
|
"name": "Release",
|
||||||
"configurePreset": "Release"
|
"configurePreset": "Release"
|
||||||
=======
|
|
||||||
"name": "RelWithDebInfo",
|
|
||||||
"configurePreset": "RelWithDebInfo"
|
|
||||||
},
|
|
||||||
{
|
|
||||||
"name": "Release",
|
|
||||||
"configurePreset": "Release"
|
|
||||||
},
|
|
||||||
{
|
|
||||||
"name": "MinSizeRel",
|
|
||||||
"configurePreset": "MinSizeRel"
|
|
||||||
>>>>>>> main
|
|
||||||
}
|
}
|
||||||
]
|
]
|
||||||
}
|
}
|
||||||
@@ -51,17 +51,16 @@
|
|||||||
#if defined(__ICCARM__) || defined(__CC_ARM) || defined(__GNUC__)
|
#if defined(__ICCARM__) || defined(__CC_ARM) || defined(__GNUC__)
|
||||||
#include <stdint.h>
|
#include <stdint.h>
|
||||||
extern uint32_t SystemCoreClock;
|
extern uint32_t SystemCoreClock;
|
||||||
void xPortSysTickHandler(void);
|
|
||||||
/* USER CODE BEGIN 0 */
|
/* USER CODE BEGIN 0 */
|
||||||
extern void configureTimerForRunTimeStats(void);
|
extern void configureTimerForRunTimeStats(void);
|
||||||
extern unsigned long getRunTimeCounterValue(void);
|
extern unsigned long getRunTimeCounterValue(void);
|
||||||
/* USER CODE END 0 */
|
/* USER CODE END 0 */
|
||||||
#endif
|
#endif
|
||||||
#ifndef CMSIS_device_header
|
#ifndef CMSIS_device_header
|
||||||
#define CMSIS_device_header "stm32f4xx.h"
|
#define CMSIS_device_header "stm32h7xx.h"
|
||||||
#endif /* CMSIS_device_header */
|
#endif /* CMSIS_device_header */
|
||||||
|
|
||||||
#define configENABLE_FPU 1
|
#define configENABLE_FPU 0
|
||||||
#define configENABLE_MPU 0
|
#define configENABLE_MPU 0
|
||||||
|
|
||||||
#define configUSE_PREEMPTION 1
|
#define configUSE_PREEMPTION 1
|
||||||
@@ -81,12 +80,9 @@
|
|||||||
#define configUSE_16_BIT_TICKS 0
|
#define configUSE_16_BIT_TICKS 0
|
||||||
#define configUSE_MUTEXES 1
|
#define configUSE_MUTEXES 1
|
||||||
#define configQUEUE_REGISTRY_SIZE 8
|
#define configQUEUE_REGISTRY_SIZE 8
|
||||||
#define configCHECK_FOR_STACK_OVERFLOW 2
|
|
||||||
#define configUSE_RECURSIVE_MUTEXES 1
|
#define configUSE_RECURSIVE_MUTEXES 1
|
||||||
#define configUSE_COUNTING_SEMAPHORES 1
|
#define configUSE_COUNTING_SEMAPHORES 1
|
||||||
#define configENABLE_BACKWARD_COMPATIBILITY 0
|
|
||||||
#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
|
#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
|
||||||
#define configRECORD_STACK_HIGH_ADDRESS 1
|
|
||||||
/* USER CODE BEGIN MESSAGE_BUFFER_LENGTH_TYPE */
|
/* USER CODE BEGIN MESSAGE_BUFFER_LENGTH_TYPE */
|
||||||
/* Defaults to size_t for backward compatibility, but can be changed
|
/* Defaults to size_t for backward compatibility, but can be changed
|
||||||
if lengths will always be less than the number of bytes in a size_t. */
|
if lengths will always be less than the number of bytes in a size_t. */
|
||||||
@@ -116,22 +112,16 @@ to exclude the API function. */
|
|||||||
#define INCLUDE_vTaskPrioritySet 1
|
#define INCLUDE_vTaskPrioritySet 1
|
||||||
#define INCLUDE_uxTaskPriorityGet 1
|
#define INCLUDE_uxTaskPriorityGet 1
|
||||||
#define INCLUDE_vTaskDelete 1
|
#define INCLUDE_vTaskDelete 1
|
||||||
#define INCLUDE_vTaskCleanUpResources 1
|
#define INCLUDE_vTaskCleanUpResources 0
|
||||||
#define INCLUDE_vTaskSuspend 1
|
#define INCLUDE_vTaskSuspend 1
|
||||||
#define INCLUDE_vTaskDelayUntil 1
|
#define INCLUDE_vTaskDelayUntil 1
|
||||||
#define INCLUDE_vTaskDelay 1
|
#define INCLUDE_vTaskDelay 1
|
||||||
#define INCLUDE_xTaskGetSchedulerState 1
|
#define INCLUDE_xTaskGetSchedulerState 1
|
||||||
#define INCLUDE_xEventGroupSetBitFromISR 1
|
|
||||||
#define INCLUDE_xTimerPendFunctionCall 1
|
#define INCLUDE_xTimerPendFunctionCall 1
|
||||||
#define INCLUDE_xQueueGetMutexHolder 1
|
#define INCLUDE_xQueueGetMutexHolder 1
|
||||||
#define INCLUDE_xSemaphoreGetMutexHolder 1
|
|
||||||
#define INCLUDE_pcTaskGetTaskName 1
|
|
||||||
#define INCLUDE_uxTaskGetStackHighWaterMark 1
|
#define INCLUDE_uxTaskGetStackHighWaterMark 1
|
||||||
#define INCLUDE_uxTaskGetStackHighWaterMark2 1
|
|
||||||
#define INCLUDE_xTaskGetCurrentTaskHandle 1
|
#define INCLUDE_xTaskGetCurrentTaskHandle 1
|
||||||
#define INCLUDE_eTaskGetState 1
|
#define INCLUDE_eTaskGetState 1
|
||||||
#define INCLUDE_xTaskAbortDelay 1
|
|
||||||
#define INCLUDE_xTaskGetHandle 1
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* The CMSIS-RTOS V2 FreeRTOS wrapper is dependent on the heap implementation used
|
* The CMSIS-RTOS V2 FreeRTOS wrapper is dependent on the heap implementation used
|
||||||
@@ -177,7 +167,7 @@ standard names. */
|
|||||||
|
|
||||||
/* IMPORTANT: After 10.3.1 update, Systick_Handler comes from NVIC (if SYS timebase = systick), otherwise from cmsis_os2.c */
|
/* IMPORTANT: After 10.3.1 update, Systick_Handler comes from NVIC (if SYS timebase = systick), otherwise from cmsis_os2.c */
|
||||||
|
|
||||||
#define USE_CUSTOM_SYSTICK_HANDLER_IMPLEMENTATION 1
|
#define USE_CUSTOM_SYSTICK_HANDLER_IMPLEMENTATION 0
|
||||||
|
|
||||||
/* USER CODE BEGIN 2 */
|
/* USER CODE BEGIN 2 */
|
||||||
/* Definitions needed when configGENERATE_RUN_TIME_STATS is on */
|
/* Definitions needed when configGENERATE_RUN_TIME_STATS is on */
|
||||||
@@ -187,7 +177,6 @@ standard names. */
|
|||||||
|
|
||||||
/* USER CODE BEGIN Defines */
|
/* USER CODE BEGIN Defines */
|
||||||
/* Section where parameter definitions can be added (for instance, to override default ones in FreeRTOS.h) */
|
/* Section where parameter definitions can be added (for instance, to override default ones in FreeRTOS.h) */
|
||||||
// #define configAPPLICATION_ALLOCATED_HEAP 1
|
|
||||||
/* USER CODE END Defines */
|
/* USER CODE END Defines */
|
||||||
|
|
||||||
#endif /* FREERTOS_CONFIG_H */
|
#endif /* FREERTOS_CONFIG_H */
|
||||||
|
|||||||
@@ -7,7 +7,7 @@
|
|||||||
******************************************************************************
|
******************************************************************************
|
||||||
* @attention
|
* @attention
|
||||||
*
|
*
|
||||||
* Copyright (c) 2025 STMicroelectronics.
|
* Copyright (c) 2026 STMicroelectronics.
|
||||||
* All rights reserved.
|
* All rights reserved.
|
||||||
*
|
*
|
||||||
* This software is licensed under terms that can be found in the LICENSE file
|
* This software is licensed under terms that can be found in the LICENSE file
|
||||||
|
|||||||
52
Core/Inc/bdma.h
Normal file
52
Core/Inc/bdma.h
Normal file
@@ -0,0 +1,52 @@
|
|||||||
|
/* USER CODE BEGIN Header */
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file bdma.h
|
||||||
|
* @brief This file contains all the function prototypes for
|
||||||
|
* the bdma.c file
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* Copyright (c) 2026 STMicroelectronics.
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* This software is licensed under terms that can be found in the LICENSE file
|
||||||
|
* in the root directory of this software component.
|
||||||
|
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
/* USER CODE END Header */
|
||||||
|
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||||
|
#ifndef __BDMA_H__
|
||||||
|
#define __BDMA_H__
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Includes ------------------------------------------------------------------*/
|
||||||
|
#include "main.h"
|
||||||
|
|
||||||
|
/* DMA memory to memory transfer handles -------------------------------------*/
|
||||||
|
|
||||||
|
/* USER CODE BEGIN Includes */
|
||||||
|
|
||||||
|
/* USER CODE END Includes */
|
||||||
|
|
||||||
|
/* USER CODE BEGIN Private defines */
|
||||||
|
|
||||||
|
/* USER CODE END Private defines */
|
||||||
|
|
||||||
|
void MX_BDMA_Init(void);
|
||||||
|
|
||||||
|
/* USER CODE BEGIN Prototypes */
|
||||||
|
|
||||||
|
/* USER CODE END Prototypes */
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /* __BDMA_H__ */
|
||||||
|
|
||||||
@@ -1,4 +1,7 @@
|
|||||||
|
<<<<<<< HEAD
|
||||||
/* USER CODE BEGIN Header */
|
/* USER CODE BEGIN Header */
|
||||||
|
=======
|
||||||
|
>>>>>>> upper
|
||||||
/**
|
/**
|
||||||
******************************************************************************
|
******************************************************************************
|
||||||
* @file can.h
|
* @file can.h
|
||||||
@@ -7,6 +10,7 @@
|
|||||||
******************************************************************************
|
******************************************************************************
|
||||||
* @attention
|
* @attention
|
||||||
*
|
*
|
||||||
|
<<<<<<< HEAD
|
||||||
* Copyright (c) 2025 STMicroelectronics.
|
* Copyright (c) 2025 STMicroelectronics.
|
||||||
* All rights reserved.
|
* All rights reserved.
|
||||||
*
|
*
|
||||||
@@ -17,6 +21,18 @@
|
|||||||
******************************************************************************
|
******************************************************************************
|
||||||
*/
|
*/
|
||||||
/* USER CODE END Header */
|
/* USER CODE END Header */
|
||||||
|
=======
|
||||||
|
* <h2><center>© Copyright (c) 2025 STMicroelectronics.
|
||||||
|
* All rights reserved.</center></h2>
|
||||||
|
*
|
||||||
|
* This software component is licensed by ST under Ultimate Liberty license
|
||||||
|
* SLA0044, the "License"; You may not use this file except in compliance with
|
||||||
|
* the License. You may obtain a copy of the License at:
|
||||||
|
* www.st.com/SLA0044
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
>>>>>>> upper
|
||||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||||
#ifndef __CAN_H__
|
#ifndef __CAN_H__
|
||||||
#define __CAN_H__
|
#define __CAN_H__
|
||||||
@@ -33,7 +49,10 @@ extern "C" {
|
|||||||
/* USER CODE END Includes */
|
/* USER CODE END Includes */
|
||||||
|
|
||||||
extern CAN_HandleTypeDef hcan1;
|
extern CAN_HandleTypeDef hcan1;
|
||||||
|
<<<<<<< HEAD
|
||||||
|
|
||||||
|
=======
|
||||||
|
>>>>>>> upper
|
||||||
extern CAN_HandleTypeDef hcan2;
|
extern CAN_HandleTypeDef hcan2;
|
||||||
|
|
||||||
/* USER CODE BEGIN Private defines */
|
/* USER CODE BEGIN Private defines */
|
||||||
@@ -53,3 +72,7 @@ void MX_CAN2_Init(void);
|
|||||||
|
|
||||||
#endif /* __CAN_H__ */
|
#endif /* __CAN_H__ */
|
||||||
|
|
||||||
|
<<<<<<< HEAD
|
||||||
|
=======
|
||||||
|
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||||
|
>>>>>>> upper
|
||||||
|
|||||||
@@ -1,4 +1,7 @@
|
|||||||
|
<<<<<<< HEAD
|
||||||
/* USER CODE BEGIN Header */
|
/* USER CODE BEGIN Header */
|
||||||
|
=======
|
||||||
|
>>>>>>> upper
|
||||||
/**
|
/**
|
||||||
******************************************************************************
|
******************************************************************************
|
||||||
* @file crc.h
|
* @file crc.h
|
||||||
@@ -7,6 +10,7 @@
|
|||||||
******************************************************************************
|
******************************************************************************
|
||||||
* @attention
|
* @attention
|
||||||
*
|
*
|
||||||
|
<<<<<<< HEAD
|
||||||
* Copyright (c) 2025 STMicroelectronics.
|
* Copyright (c) 2025 STMicroelectronics.
|
||||||
* All rights reserved.
|
* All rights reserved.
|
||||||
*
|
*
|
||||||
@@ -17,6 +21,18 @@
|
|||||||
******************************************************************************
|
******************************************************************************
|
||||||
*/
|
*/
|
||||||
/* USER CODE END Header */
|
/* USER CODE END Header */
|
||||||
|
=======
|
||||||
|
* <h2><center>© Copyright (c) 2025 STMicroelectronics.
|
||||||
|
* All rights reserved.</center></h2>
|
||||||
|
*
|
||||||
|
* This software component is licensed by ST under Ultimate Liberty license
|
||||||
|
* SLA0044, the "License"; You may not use this file except in compliance with
|
||||||
|
* the License. You may obtain a copy of the License at:
|
||||||
|
* www.st.com/SLA0044
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
>>>>>>> upper
|
||||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||||
#ifndef __CRC_H__
|
#ifndef __CRC_H__
|
||||||
#define __CRC_H__
|
#define __CRC_H__
|
||||||
@@ -50,3 +66,7 @@ void MX_CRC_Init(void);
|
|||||||
|
|
||||||
#endif /* __CRC_H__ */
|
#endif /* __CRC_H__ */
|
||||||
|
|
||||||
|
<<<<<<< HEAD
|
||||||
|
=======
|
||||||
|
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||||
|
>>>>>>> upper
|
||||||
|
|||||||
@@ -7,7 +7,7 @@
|
|||||||
******************************************************************************
|
******************************************************************************
|
||||||
* @attention
|
* @attention
|
||||||
*
|
*
|
||||||
* Copyright (c) 2025 STMicroelectronics.
|
* Copyright (c) 2026 STMicroelectronics.
|
||||||
* All rights reserved.
|
* All rights reserved.
|
||||||
*
|
*
|
||||||
* This software is licensed under terms that can be found in the LICENSE file
|
* This software is licensed under terms that can be found in the LICENSE file
|
||||||
|
|||||||
58
Core/Inc/fdcan.h
Normal file
58
Core/Inc/fdcan.h
Normal file
@@ -0,0 +1,58 @@
|
|||||||
|
/* USER CODE BEGIN Header */
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file fdcan.h
|
||||||
|
* @brief This file contains all the function prototypes for
|
||||||
|
* the fdcan.c file
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* Copyright (c) 2026 STMicroelectronics.
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* This software is licensed under terms that can be found in the LICENSE file
|
||||||
|
* in the root directory of this software component.
|
||||||
|
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
/* USER CODE END Header */
|
||||||
|
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||||
|
#ifndef __FDCAN_H__
|
||||||
|
#define __FDCAN_H__
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Includes ------------------------------------------------------------------*/
|
||||||
|
#include "main.h"
|
||||||
|
|
||||||
|
/* USER CODE BEGIN Includes */
|
||||||
|
|
||||||
|
/* USER CODE END Includes */
|
||||||
|
|
||||||
|
extern FDCAN_HandleTypeDef hfdcan1;
|
||||||
|
|
||||||
|
extern FDCAN_HandleTypeDef hfdcan2;
|
||||||
|
|
||||||
|
extern FDCAN_HandleTypeDef hfdcan3;
|
||||||
|
|
||||||
|
/* USER CODE BEGIN Private defines */
|
||||||
|
|
||||||
|
/* USER CODE END Private defines */
|
||||||
|
|
||||||
|
void MX_FDCAN1_Init(void);
|
||||||
|
void MX_FDCAN2_Init(void);
|
||||||
|
void MX_FDCAN3_Init(void);
|
||||||
|
|
||||||
|
/* USER CODE BEGIN Prototypes */
|
||||||
|
|
||||||
|
/* USER CODE END Prototypes */
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /* __FDCAN_H__ */
|
||||||
|
|
||||||
@@ -7,7 +7,7 @@
|
|||||||
******************************************************************************
|
******************************************************************************
|
||||||
* @attention
|
* @attention
|
||||||
*
|
*
|
||||||
* Copyright (c) 2025 STMicroelectronics.
|
* Copyright (c) 2026 STMicroelectronics.
|
||||||
* All rights reserved.
|
* All rights reserved.
|
||||||
*
|
*
|
||||||
* This software is licensed under terms that can be found in the LICENSE file
|
* This software is licensed under terms that can be found in the LICENSE file
|
||||||
|
|||||||
@@ -1,4 +1,7 @@
|
|||||||
|
<<<<<<< HEAD
|
||||||
/* USER CODE BEGIN Header */
|
/* USER CODE BEGIN Header */
|
||||||
|
=======
|
||||||
|
>>>>>>> upper
|
||||||
/**
|
/**
|
||||||
******************************************************************************
|
******************************************************************************
|
||||||
* @file i2c.h
|
* @file i2c.h
|
||||||
@@ -7,6 +10,7 @@
|
|||||||
******************************************************************************
|
******************************************************************************
|
||||||
* @attention
|
* @attention
|
||||||
*
|
*
|
||||||
|
<<<<<<< HEAD
|
||||||
* Copyright (c) 2025 STMicroelectronics.
|
* Copyright (c) 2025 STMicroelectronics.
|
||||||
* All rights reserved.
|
* All rights reserved.
|
||||||
*
|
*
|
||||||
@@ -17,6 +21,18 @@
|
|||||||
******************************************************************************
|
******************************************************************************
|
||||||
*/
|
*/
|
||||||
/* USER CODE END Header */
|
/* USER CODE END Header */
|
||||||
|
=======
|
||||||
|
* <h2><center>© Copyright (c) 2025 STMicroelectronics.
|
||||||
|
* All rights reserved.</center></h2>
|
||||||
|
*
|
||||||
|
* This software component is licensed by ST under Ultimate Liberty license
|
||||||
|
* SLA0044, the "License"; You may not use this file except in compliance with
|
||||||
|
* the License. You may obtain a copy of the License at:
|
||||||
|
* www.st.com/SLA0044
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
>>>>>>> upper
|
||||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||||
#ifndef __I2C_H__
|
#ifndef __I2C_H__
|
||||||
#define __I2C_H__
|
#define __I2C_H__
|
||||||
@@ -33,9 +49,13 @@ extern "C" {
|
|||||||
/* USER CODE END Includes */
|
/* USER CODE END Includes */
|
||||||
|
|
||||||
extern I2C_HandleTypeDef hi2c1;
|
extern I2C_HandleTypeDef hi2c1;
|
||||||
|
<<<<<<< HEAD
|
||||||
|
|
||||||
extern I2C_HandleTypeDef hi2c2;
|
extern I2C_HandleTypeDef hi2c2;
|
||||||
|
|
||||||
|
=======
|
||||||
|
extern I2C_HandleTypeDef hi2c2;
|
||||||
|
>>>>>>> upper
|
||||||
extern I2C_HandleTypeDef hi2c3;
|
extern I2C_HandleTypeDef hi2c3;
|
||||||
|
|
||||||
/* USER CODE BEGIN Private defines */
|
/* USER CODE BEGIN Private defines */
|
||||||
@@ -56,3 +76,7 @@ void MX_I2C3_Init(void);
|
|||||||
|
|
||||||
#endif /* __I2C_H__ */
|
#endif /* __I2C_H__ */
|
||||||
|
|
||||||
|
<<<<<<< HEAD
|
||||||
|
=======
|
||||||
|
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||||
|
>>>>>>> upper
|
||||||
|
|||||||
@@ -7,13 +7,12 @@
|
|||||||
******************************************************************************
|
******************************************************************************
|
||||||
* @attention
|
* @attention
|
||||||
*
|
*
|
||||||
* <h2><center>© Copyright (c) 2025 STMicroelectronics.
|
* Copyright (c) 2026 STMicroelectronics.
|
||||||
* All rights reserved.</center></h2>
|
* All rights reserved.
|
||||||
*
|
*
|
||||||
* This software component is licensed by ST under Ultimate Liberty license
|
* This software is licensed under terms that can be found in the LICENSE file
|
||||||
* SLA0044, the "License"; You may not use this file except in compliance with
|
* in the root directory of this software component.
|
||||||
* the License. You may obtain a copy of the License at:
|
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||||
* www.st.com/SLA0044
|
|
||||||
*
|
*
|
||||||
******************************************************************************
|
******************************************************************************
|
||||||
*/
|
*/
|
||||||
@@ -28,7 +27,7 @@ extern "C" {
|
|||||||
#endif
|
#endif
|
||||||
|
|
||||||
/* Includes ------------------------------------------------------------------*/
|
/* Includes ------------------------------------------------------------------*/
|
||||||
#include "stm32f4xx_hal.h"
|
#include "stm32h7xx_hal.h"
|
||||||
|
|
||||||
/* Private includes ----------------------------------------------------------*/
|
/* Private includes ----------------------------------------------------------*/
|
||||||
/* USER CODE BEGIN Includes */
|
/* USER CODE BEGIN Includes */
|
||||||
@@ -58,46 +57,40 @@ void Error_Handler(void);
|
|||||||
/* USER CODE END EFP */
|
/* USER CODE END EFP */
|
||||||
|
|
||||||
/* Private defines -----------------------------------------------------------*/
|
/* Private defines -----------------------------------------------------------*/
|
||||||
#define LASER_Pin GPIO_PIN_8
|
#define POWER_24V_2_Pin GPIO_PIN_13
|
||||||
#define LASER_GPIO_Port GPIOC
|
#define POWER_24V_2_GPIO_Port GPIOC
|
||||||
#define CMPS_RST_Pin GPIO_PIN_6
|
#define POWER_24V_1_Pin GPIO_PIN_14
|
||||||
#define CMPS_RST_GPIO_Port GPIOG
|
#define POWER_24V_1_GPIO_Port GPIOC
|
||||||
#define IMU_HEAT_PWM_Pin GPIO_PIN_6
|
#define POWER_5V_Pin GPIO_PIN_15
|
||||||
#define IMU_HEAT_PWM_GPIO_Port GPIOF
|
#define POWER_5V_GPIO_Port GPIOC
|
||||||
#define LED_R_Pin GPIO_PIN_12
|
#define ACCL_CS_Pin GPIO_PIN_0
|
||||||
#define LED_R_GPIO_Port GPIOH
|
#define ACCL_CS_GPIO_Port GPIOC
|
||||||
#define CMPS_INT_Pin GPIO_PIN_3
|
#define GYRO_CS_Pin GPIO_PIN_3
|
||||||
#define CMPS_INT_GPIO_Port GPIOG
|
#define GYRO_CS_GPIO_Port GPIOC
|
||||||
#define CMPS_INT_EXTI_IRQn EXTI3_IRQn
|
#define WS2812_Pin GPIO_PIN_7
|
||||||
#define ADC_BAT_Pin GPIO_PIN_10
|
#define WS2812_GPIO_Port GPIOA
|
||||||
#define ADC_BAT_GPIO_Port GPIOF
|
#define DCMI_PWDN_Pin GPIO_PIN_5
|
||||||
#define LED_G_Pin GPIO_PIN_11
|
#define DCMI_PWDN_GPIO_Port GPIOC
|
||||||
#define LED_G_GPIO_Port GPIOH
|
#define IMU_HEAT_Pin GPIO_PIN_1
|
||||||
#define LED_B_Pin GPIO_PIN_10
|
#define IMU_HEAT_GPIO_Port GPIOB
|
||||||
#define LED_B_GPIO_Port GPIOH
|
#define ACCL_INT_Pin GPIO_PIN_10
|
||||||
#define HW0_Pin GPIO_PIN_0
|
#define ACCL_INT_GPIO_Port GPIOE
|
||||||
#define HW0_GPIO_Port GPIOC
|
#define ACCL_INT_EXTI_IRQn EXTI15_10_IRQn
|
||||||
#define HW1_Pin GPIO_PIN_1
|
#define GYRO_INT_Pin GPIO_PIN_12
|
||||||
#define HW1_GPIO_Port GPIOC
|
#define GYRO_INT_GPIO_Port GPIOE
|
||||||
#define HW2_Pin GPIO_PIN_2
|
#define GYRO_INT_EXTI_IRQn EXTI15_10_IRQn
|
||||||
#define HW2_GPIO_Port GPIOC
|
#define LCD_CS_Pin GPIO_PIN_15
|
||||||
#define BUZZER_Pin GPIO_PIN_14
|
#define LCD_CS_GPIO_Port GPIOE
|
||||||
#define BUZZER_GPIO_Port GPIOD
|
#define LCD_BLK_Pin GPIO_PIN_10
|
||||||
#define USER_KEY_Pin GPIO_PIN_0
|
#define LCD_BLK_GPIO_Port GPIOB
|
||||||
#define USER_KEY_GPIO_Port GPIOA
|
#define LCD_RES_Pin GPIO_PIN_11
|
||||||
#define USER_KEY_EXTI_IRQn EXTI0_IRQn
|
#define LCD_RES_GPIO_Port GPIOB
|
||||||
#define ACCL_CS_Pin GPIO_PIN_4
|
#define DCMI_REST_Pin GPIO_PIN_12
|
||||||
#define ACCL_CS_GPIO_Port GPIOA
|
#define DCMI_REST_GPIO_Port GPIOB
|
||||||
#define ACCL_INT_Pin GPIO_PIN_4
|
#define BUZZER_Pin GPIO_PIN_15
|
||||||
#define ACCL_INT_GPIO_Port GPIOC
|
#define BUZZER_GPIO_Port GPIOB
|
||||||
#define ACCL_INT_EXTI_IRQn EXTI4_IRQn
|
#define LCD_DC_Pin GPIO_PIN_10
|
||||||
#define GYRO_INT_Pin GPIO_PIN_5
|
#define LCD_DC_GPIO_Port GPIOD
|
||||||
#define GYRO_INT_GPIO_Port GPIOC
|
|
||||||
#define GYRO_INT_EXTI_IRQn EXTI9_5_IRQn
|
|
||||||
#define SPI2_CS_Pin GPIO_PIN_12
|
|
||||||
#define SPI2_CS_GPIO_Port GPIOB
|
|
||||||
#define GYRO_CS_Pin GPIO_PIN_0
|
|
||||||
#define GYRO_CS_GPIO_Port GPIOB
|
|
||||||
|
|
||||||
/* USER CODE BEGIN Private defines */
|
/* USER CODE BEGIN Private defines */
|
||||||
|
|
||||||
|
|||||||
52
Core/Inc/octospi.h
Normal file
52
Core/Inc/octospi.h
Normal file
@@ -0,0 +1,52 @@
|
|||||||
|
/* USER CODE BEGIN Header */
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file octospi.h
|
||||||
|
* @brief This file contains all the function prototypes for
|
||||||
|
* the octospi.c file
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* Copyright (c) 2026 STMicroelectronics.
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* This software is licensed under terms that can be found in the LICENSE file
|
||||||
|
* in the root directory of this software component.
|
||||||
|
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
/* USER CODE END Header */
|
||||||
|
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||||
|
#ifndef __OCTOSPI_H__
|
||||||
|
#define __OCTOSPI_H__
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Includes ------------------------------------------------------------------*/
|
||||||
|
#include "main.h"
|
||||||
|
|
||||||
|
/* USER CODE BEGIN Includes */
|
||||||
|
|
||||||
|
/* USER CODE END Includes */
|
||||||
|
|
||||||
|
extern OSPI_HandleTypeDef hospi1;
|
||||||
|
|
||||||
|
/* USER CODE BEGIN Private defines */
|
||||||
|
|
||||||
|
/* USER CODE END Private defines */
|
||||||
|
|
||||||
|
void MX_OCTOSPI1_Init(void);
|
||||||
|
|
||||||
|
/* USER CODE BEGIN Prototypes */
|
||||||
|
|
||||||
|
/* USER CODE END Prototypes */
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /* __OCTOSPI_H__ */
|
||||||
|
|
||||||
@@ -1,4 +1,7 @@
|
|||||||
|
<<<<<<< HEAD
|
||||||
/* USER CODE BEGIN Header */
|
/* USER CODE BEGIN Header */
|
||||||
|
=======
|
||||||
|
>>>>>>> upper
|
||||||
/**
|
/**
|
||||||
******************************************************************************
|
******************************************************************************
|
||||||
* @file rng.h
|
* @file rng.h
|
||||||
@@ -7,6 +10,7 @@
|
|||||||
******************************************************************************
|
******************************************************************************
|
||||||
* @attention
|
* @attention
|
||||||
*
|
*
|
||||||
|
<<<<<<< HEAD
|
||||||
* Copyright (c) 2025 STMicroelectronics.
|
* Copyright (c) 2025 STMicroelectronics.
|
||||||
* All rights reserved.
|
* All rights reserved.
|
||||||
*
|
*
|
||||||
@@ -17,6 +21,18 @@
|
|||||||
******************************************************************************
|
******************************************************************************
|
||||||
*/
|
*/
|
||||||
/* USER CODE END Header */
|
/* USER CODE END Header */
|
||||||
|
=======
|
||||||
|
* <h2><center>© Copyright (c) 2025 STMicroelectronics.
|
||||||
|
* All rights reserved.</center></h2>
|
||||||
|
*
|
||||||
|
* This software component is licensed by ST under Ultimate Liberty license
|
||||||
|
* SLA0044, the "License"; You may not use this file except in compliance with
|
||||||
|
* the License. You may obtain a copy of the License at:
|
||||||
|
* www.st.com/SLA0044
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
>>>>>>> upper
|
||||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||||
#ifndef __RNG_H__
|
#ifndef __RNG_H__
|
||||||
#define __RNG_H__
|
#define __RNG_H__
|
||||||
@@ -50,3 +66,7 @@ void MX_RNG_Init(void);
|
|||||||
|
|
||||||
#endif /* __RNG_H__ */
|
#endif /* __RNG_H__ */
|
||||||
|
|
||||||
|
<<<<<<< HEAD
|
||||||
|
=======
|
||||||
|
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||||
|
>>>>>>> upper
|
||||||
|
|||||||
@@ -7,7 +7,7 @@
|
|||||||
******************************************************************************
|
******************************************************************************
|
||||||
* @attention
|
* @attention
|
||||||
*
|
*
|
||||||
* Copyright (c) 2025 STMicroelectronics.
|
* Copyright (c) 2026 STMicroelectronics.
|
||||||
* All rights reserved.
|
* All rights reserved.
|
||||||
*
|
*
|
||||||
* This software is licensed under terms that can be found in the LICENSE file
|
* This software is licensed under terms that can be found in the LICENSE file
|
||||||
|
|||||||
@@ -1,4 +1,7 @@
|
|||||||
|
<<<<<<< HEAD
|
||||||
/* USER CODE BEGIN Header */
|
/* USER CODE BEGIN Header */
|
||||||
|
=======
|
||||||
|
>>>>>>> upper
|
||||||
/**
|
/**
|
||||||
******************************************************************************
|
******************************************************************************
|
||||||
* @file stm32f4xx_hal_conf_template.h
|
* @file stm32f4xx_hal_conf_template.h
|
||||||
@@ -9,6 +12,7 @@
|
|||||||
******************************************************************************
|
******************************************************************************
|
||||||
* @attention
|
* @attention
|
||||||
*
|
*
|
||||||
|
<<<<<<< HEAD
|
||||||
* Copyright (c) 2017 STMicroelectronics.
|
* Copyright (c) 2017 STMicroelectronics.
|
||||||
* All rights reserved.
|
* All rights reserved.
|
||||||
*
|
*
|
||||||
@@ -19,6 +23,18 @@
|
|||||||
******************************************************************************
|
******************************************************************************
|
||||||
*/
|
*/
|
||||||
/* USER CODE END Header */
|
/* USER CODE END Header */
|
||||||
|
=======
|
||||||
|
* <h2><center>© Copyright (c) 2017 STMicroelectronics.
|
||||||
|
* All rights reserved.</center></h2>
|
||||||
|
*
|
||||||
|
* This software component is licensed by ST under BSD 3-Clause license,
|
||||||
|
* the "License"; You may not use this file except in compliance with the
|
||||||
|
* License. You may obtain a copy of the License at:
|
||||||
|
* opensource.org/licenses/BSD-3-Clause
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
>>>>>>> upper
|
||||||
|
|
||||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||||
#ifndef __STM32F4xx_HAL_CONF_H
|
#ifndef __STM32F4xx_HAL_CONF_H
|
||||||
@@ -37,6 +53,7 @@
|
|||||||
*/
|
*/
|
||||||
#define HAL_MODULE_ENABLED
|
#define HAL_MODULE_ENABLED
|
||||||
|
|
||||||
|
<<<<<<< HEAD
|
||||||
/* #define HAL_CRYP_MODULE_ENABLED */
|
/* #define HAL_CRYP_MODULE_ENABLED */
|
||||||
#define HAL_ADC_MODULE_ENABLED
|
#define HAL_ADC_MODULE_ENABLED
|
||||||
#define HAL_CAN_MODULE_ENABLED
|
#define HAL_CAN_MODULE_ENABLED
|
||||||
@@ -81,6 +98,52 @@
|
|||||||
/* #define HAL_SPDIFRX_MODULE_ENABLED */
|
/* #define HAL_SPDIFRX_MODULE_ENABLED */
|
||||||
/* #define HAL_DFSDM_MODULE_ENABLED */
|
/* #define HAL_DFSDM_MODULE_ENABLED */
|
||||||
/* #define HAL_LPTIM_MODULE_ENABLED */
|
/* #define HAL_LPTIM_MODULE_ENABLED */
|
||||||
|
=======
|
||||||
|
#define HAL_ADC_MODULE_ENABLED
|
||||||
|
/* #define HAL_CRYP_MODULE_ENABLED */
|
||||||
|
#define HAL_CAN_MODULE_ENABLED
|
||||||
|
#define HAL_CRC_MODULE_ENABLED
|
||||||
|
/* #define HAL_CAN_LEGACY_MODULE_ENABLED */
|
||||||
|
/* #define HAL_CRYP_MODULE_ENABLED */
|
||||||
|
/* #define HAL_DAC_MODULE_ENABLED */
|
||||||
|
/* #define HAL_DCMI_MODULE_ENABLED */
|
||||||
|
/* #define HAL_DMA2D_MODULE_ENABLED */
|
||||||
|
/* #define HAL_ETH_MODULE_ENABLED */
|
||||||
|
/* #define HAL_NAND_MODULE_ENABLED */
|
||||||
|
/* #define HAL_NOR_MODULE_ENABLED */
|
||||||
|
/* #define HAL_PCCARD_MODULE_ENABLED */
|
||||||
|
/* #define HAL_SRAM_MODULE_ENABLED */
|
||||||
|
/* #define HAL_SDRAM_MODULE_ENABLED */
|
||||||
|
/* #define HAL_HASH_MODULE_ENABLED */
|
||||||
|
#define HAL_I2C_MODULE_ENABLED
|
||||||
|
/* #define HAL_I2S_MODULE_ENABLED */
|
||||||
|
/* #define HAL_IWDG_MODULE_ENABLED */
|
||||||
|
/* #define HAL_LTDC_MODULE_ENABLED */
|
||||||
|
#define HAL_RNG_MODULE_ENABLED
|
||||||
|
/* #define HAL_RTC_MODULE_ENABLED */
|
||||||
|
/* #define HAL_SAI_MODULE_ENABLED */
|
||||||
|
/* #define HAL_SD_MODULE_ENABLED */
|
||||||
|
/* #define HAL_MMC_MODULE_ENABLED */
|
||||||
|
#define HAL_SPI_MODULE_ENABLED
|
||||||
|
#define HAL_TIM_MODULE_ENABLED
|
||||||
|
#define HAL_UART_MODULE_ENABLED
|
||||||
|
/* #define HAL_USART_MODULE_ENABLED */
|
||||||
|
/* #define HAL_IRDA_MODULE_ENABLED */
|
||||||
|
/* #define HAL_SMARTCARD_MODULE_ENABLED */
|
||||||
|
/* #define HAL_SMBUS_MODULE_ENABLED */
|
||||||
|
/* #define HAL_WWDG_MODULE_ENABLED */
|
||||||
|
#define HAL_PCD_MODULE_ENABLED
|
||||||
|
/* #define HAL_HCD_MODULE_ENABLED */
|
||||||
|
/* #define HAL_DSI_MODULE_ENABLED */
|
||||||
|
/* #define HAL_QSPI_MODULE_ENABLED */
|
||||||
|
/* #define HAL_QSPI_MODULE_ENABLED */
|
||||||
|
/* #define HAL_CEC_MODULE_ENABLED */
|
||||||
|
/* #define HAL_FMPI2C_MODULE_ENABLED */
|
||||||
|
/* #define HAL_FMPSMBUS_MODULE_ENABLED */
|
||||||
|
/* #define HAL_SPDIFRX_MODULE_ENABLED */
|
||||||
|
/* #define HAL_DFSDM_MODULE_ENABLED */
|
||||||
|
/* #define HAL_LPTIM_MODULE_ENABLED */
|
||||||
|
>>>>>>> upper
|
||||||
#define HAL_GPIO_MODULE_ENABLED
|
#define HAL_GPIO_MODULE_ENABLED
|
||||||
#define HAL_EXTI_MODULE_ENABLED
|
#define HAL_EXTI_MODULE_ENABLED
|
||||||
#define HAL_DMA_MODULE_ENABLED
|
#define HAL_DMA_MODULE_ENABLED
|
||||||
@@ -222,7 +285,11 @@
|
|||||||
/* Section 2: PHY configuration section */
|
/* Section 2: PHY configuration section */
|
||||||
|
|
||||||
/* DP83848_PHY_ADDRESS Address*/
|
/* DP83848_PHY_ADDRESS Address*/
|
||||||
|
<<<<<<< HEAD
|
||||||
#define DP83848_PHY_ADDRESS
|
#define DP83848_PHY_ADDRESS
|
||||||
|
=======
|
||||||
|
#define DP83848_PHY_ADDRESS 0x01U
|
||||||
|
>>>>>>> upper
|
||||||
/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/
|
/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/
|
||||||
#define PHY_RESET_DELAY 0x000000FFU
|
#define PHY_RESET_DELAY 0x000000FFU
|
||||||
/* PHY Configuration delay */
|
/* PHY Configuration delay */
|
||||||
@@ -252,10 +319,17 @@
|
|||||||
#define PHY_JABBER_DETECTION ((uint16_t)0x0002U) /*!< Jabber condition detected */
|
#define PHY_JABBER_DETECTION ((uint16_t)0x0002U) /*!< Jabber condition detected */
|
||||||
|
|
||||||
/* Section 4: Extended PHY Registers */
|
/* Section 4: Extended PHY Registers */
|
||||||
|
<<<<<<< HEAD
|
||||||
#define PHY_SR ((uint16_t)) /*!< PHY status register Offset */
|
#define PHY_SR ((uint16_t)) /*!< PHY status register Offset */
|
||||||
|
|
||||||
#define PHY_SPEED_STATUS ((uint16_t)) /*!< PHY Speed mask */
|
#define PHY_SPEED_STATUS ((uint16_t)) /*!< PHY Speed mask */
|
||||||
#define PHY_DUPLEX_STATUS ((uint16_t)) /*!< PHY Duplex mask */
|
#define PHY_DUPLEX_STATUS ((uint16_t)) /*!< PHY Duplex mask */
|
||||||
|
=======
|
||||||
|
#define PHY_SR ((uint16_t)0x10U) /*!< PHY status register Offset */
|
||||||
|
|
||||||
|
#define PHY_SPEED_STATUS ((uint16_t)0x0002U) /*!< PHY Speed mask */
|
||||||
|
#define PHY_DUPLEX_STATUS ((uint16_t)0x0004U) /*!< PHY Duplex mask */
|
||||||
|
>>>>>>> upper
|
||||||
|
|
||||||
/* ################## SPI peripheral configuration ########################## */
|
/* ################## SPI peripheral configuration ########################## */
|
||||||
|
|
||||||
@@ -327,10 +401,13 @@
|
|||||||
#include "stm32f4xx_hal_eth.h"
|
#include "stm32f4xx_hal_eth.h"
|
||||||
#endif /* HAL_ETH_MODULE_ENABLED */
|
#endif /* HAL_ETH_MODULE_ENABLED */
|
||||||
|
|
||||||
|
<<<<<<< HEAD
|
||||||
#ifdef HAL_ETH_LEGACY_MODULE_ENABLED
|
#ifdef HAL_ETH_LEGACY_MODULE_ENABLED
|
||||||
#include "stm32f4xx_hal_eth_legacy.h"
|
#include "stm32f4xx_hal_eth_legacy.h"
|
||||||
#endif /* HAL_ETH_LEGACY_MODULE_ENABLED */
|
#endif /* HAL_ETH_LEGACY_MODULE_ENABLED */
|
||||||
|
|
||||||
|
=======
|
||||||
|
>>>>>>> upper
|
||||||
#ifdef HAL_FLASH_MODULE_ENABLED
|
#ifdef HAL_FLASH_MODULE_ENABLED
|
||||||
#include "stm32f4xx_hal_flash.h"
|
#include "stm32f4xx_hal_flash.h"
|
||||||
#endif /* HAL_FLASH_MODULE_ENABLED */
|
#endif /* HAL_FLASH_MODULE_ENABLED */
|
||||||
@@ -493,3 +570,8 @@
|
|||||||
#endif
|
#endif
|
||||||
|
|
||||||
#endif /* __STM32F4xx_HAL_CONF_H */
|
#endif /* __STM32F4xx_HAL_CONF_H */
|
||||||
|
<<<<<<< HEAD
|
||||||
|
=======
|
||||||
|
|
||||||
|
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||||
|
>>>>>>> upper
|
||||||
|
|||||||
@@ -23,7 +23,11 @@
|
|||||||
#define __STM32F4xx_IT_H
|
#define __STM32F4xx_IT_H
|
||||||
|
|
||||||
#ifdef __cplusplus
|
#ifdef __cplusplus
|
||||||
|
<<<<<<< HEAD
|
||||||
extern "C" {
|
extern "C" {
|
||||||
|
=======
|
||||||
|
extern "C" {
|
||||||
|
>>>>>>> upper
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/* Private includes ----------------------------------------------------------*/
|
/* Private includes ----------------------------------------------------------*/
|
||||||
@@ -59,7 +63,10 @@ void EXTI3_IRQHandler(void);
|
|||||||
void EXTI4_IRQHandler(void);
|
void EXTI4_IRQHandler(void);
|
||||||
void DMA1_Stream1_IRQHandler(void);
|
void DMA1_Stream1_IRQHandler(void);
|
||||||
void DMA1_Stream2_IRQHandler(void);
|
void DMA1_Stream2_IRQHandler(void);
|
||||||
|
<<<<<<< HEAD
|
||||||
|
=======
|
||||||
void CAN1_TX_IRQHandler(void);
|
void CAN1_TX_IRQHandler(void);
|
||||||
|
>>>>>>> upper
|
||||||
void CAN1_RX0_IRQHandler(void);
|
void CAN1_RX0_IRQHandler(void);
|
||||||
void CAN1_RX1_IRQHandler(void);
|
void CAN1_RX1_IRQHandler(void);
|
||||||
void EXTI9_5_IRQHandler(void);
|
void EXTI9_5_IRQHandler(void);
|
||||||
@@ -70,7 +77,10 @@ void TIM7_IRQHandler(void);
|
|||||||
void DMA2_Stream1_IRQHandler(void);
|
void DMA2_Stream1_IRQHandler(void);
|
||||||
void DMA2_Stream2_IRQHandler(void);
|
void DMA2_Stream2_IRQHandler(void);
|
||||||
void DMA2_Stream3_IRQHandler(void);
|
void DMA2_Stream3_IRQHandler(void);
|
||||||
|
<<<<<<< HEAD
|
||||||
|
=======
|
||||||
void CAN2_TX_IRQHandler(void);
|
void CAN2_TX_IRQHandler(void);
|
||||||
|
>>>>>>> upper
|
||||||
void CAN2_RX0_IRQHandler(void);
|
void CAN2_RX0_IRQHandler(void);
|
||||||
void CAN2_RX1_IRQHandler(void);
|
void CAN2_RX1_IRQHandler(void);
|
||||||
void OTG_FS_IRQHandler(void);
|
void OTG_FS_IRQHandler(void);
|
||||||
@@ -87,3 +97,8 @@ void USART6_IRQHandler(void);
|
|||||||
#endif
|
#endif
|
||||||
|
|
||||||
#endif /* __STM32F4xx_IT_H */
|
#endif /* __STM32F4xx_IT_H */
|
||||||
|
<<<<<<< HEAD
|
||||||
|
=======
|
||||||
|
|
||||||
|
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||||
|
>>>>>>> upper
|
||||||
|
|||||||
514
Core/Inc/stm32h7xx_hal_conf.h
Normal file
514
Core/Inc/stm32h7xx_hal_conf.h
Normal file
@@ -0,0 +1,514 @@
|
|||||||
|
/* USER CODE BEGIN Header */
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file stm32h7xx_hal_conf.h
|
||||||
|
* @author MCD Application Team
|
||||||
|
* @brief HAL configuration file.
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* Copyright (c) 2017 STMicroelectronics.
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* This software is licensed under terms that can be found in the LICENSE file
|
||||||
|
* in the root directory of this software component.
|
||||||
|
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
/* USER CODE END Header */
|
||||||
|
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||||
|
#ifndef STM32H7xx_HAL_CONF_H
|
||||||
|
#define STM32H7xx_HAL_CONF_H
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Exported types ------------------------------------------------------------*/
|
||||||
|
/* Exported constants --------------------------------------------------------*/
|
||||||
|
|
||||||
|
/* ########################## Module Selection ############################## */
|
||||||
|
/**
|
||||||
|
* @brief This is the list of modules to be used in the HAL driver
|
||||||
|
*/
|
||||||
|
#define HAL_MODULE_ENABLED
|
||||||
|
|
||||||
|
#define HAL_ADC_MODULE_ENABLED
|
||||||
|
#define HAL_FDCAN_MODULE_ENABLED
|
||||||
|
/* #define HAL_FMAC_MODULE_ENABLED */
|
||||||
|
/* #define HAL_CEC_MODULE_ENABLED */
|
||||||
|
/* #define HAL_COMP_MODULE_ENABLED */
|
||||||
|
/* #define HAL_CORDIC_MODULE_ENABLED */
|
||||||
|
/* #define HAL_CRC_MODULE_ENABLED */
|
||||||
|
/* #define HAL_CRYP_MODULE_ENABLED */
|
||||||
|
/* #define HAL_DAC_MODULE_ENABLED */
|
||||||
|
/* #define HAL_DCMI_MODULE_ENABLED */
|
||||||
|
/* #define HAL_DMA2D_MODULE_ENABLED */
|
||||||
|
/* #define HAL_ETH_MODULE_ENABLED */
|
||||||
|
/* #define HAL_ETH_LEGACY_MODULE_ENABLED */
|
||||||
|
/* #define HAL_NAND_MODULE_ENABLED */
|
||||||
|
/* #define HAL_NOR_MODULE_ENABLED */
|
||||||
|
/* #define HAL_OTFDEC_MODULE_ENABLED */
|
||||||
|
/* #define HAL_SRAM_MODULE_ENABLED */
|
||||||
|
/* #define HAL_SDRAM_MODULE_ENABLED */
|
||||||
|
/* #define HAL_HASH_MODULE_ENABLED */
|
||||||
|
/* #define HAL_HRTIM_MODULE_ENABLED */
|
||||||
|
/* #define HAL_HSEM_MODULE_ENABLED */
|
||||||
|
/* #define HAL_GFXMMU_MODULE_ENABLED */
|
||||||
|
/* #define HAL_JPEG_MODULE_ENABLED */
|
||||||
|
/* #define HAL_OPAMP_MODULE_ENABLED */
|
||||||
|
#define HAL_OSPI_MODULE_ENABLED
|
||||||
|
/* #define HAL_I2S_MODULE_ENABLED */
|
||||||
|
/* #define HAL_SMBUS_MODULE_ENABLED */
|
||||||
|
/* #define HAL_IWDG_MODULE_ENABLED */
|
||||||
|
/* #define HAL_LPTIM_MODULE_ENABLED */
|
||||||
|
/* #define HAL_LTDC_MODULE_ENABLED */
|
||||||
|
/* #define HAL_QSPI_MODULE_ENABLED */
|
||||||
|
/* #define HAL_RAMECC_MODULE_ENABLED */
|
||||||
|
/* #define HAL_RNG_MODULE_ENABLED */
|
||||||
|
/* #define HAL_RTC_MODULE_ENABLED */
|
||||||
|
/* #define HAL_SAI_MODULE_ENABLED */
|
||||||
|
/* #define HAL_SD_MODULE_ENABLED */
|
||||||
|
/* #define HAL_MMC_MODULE_ENABLED */
|
||||||
|
/* #define HAL_SPDIFRX_MODULE_ENABLED */
|
||||||
|
#define HAL_SPI_MODULE_ENABLED
|
||||||
|
/* #define HAL_SWPMI_MODULE_ENABLED */
|
||||||
|
#define HAL_TIM_MODULE_ENABLED
|
||||||
|
#define HAL_UART_MODULE_ENABLED
|
||||||
|
/* #define HAL_USART_MODULE_ENABLED */
|
||||||
|
/* #define HAL_IRDA_MODULE_ENABLED */
|
||||||
|
/* #define HAL_SMARTCARD_MODULE_ENABLED */
|
||||||
|
/* #define HAL_WWDG_MODULE_ENABLED */
|
||||||
|
#define HAL_PCD_MODULE_ENABLED
|
||||||
|
/* #define HAL_HCD_MODULE_ENABLED */
|
||||||
|
/* #define HAL_DFSDM_MODULE_ENABLED */
|
||||||
|
/* #define HAL_DSI_MODULE_ENABLED */
|
||||||
|
/* #define HAL_JPEG_MODULE_ENABLED */
|
||||||
|
/* #define HAL_MDIOS_MODULE_ENABLED */
|
||||||
|
/* #define HAL_PSSI_MODULE_ENABLED */
|
||||||
|
/* #define HAL_DTS_MODULE_ENABLED */
|
||||||
|
#define HAL_GPIO_MODULE_ENABLED
|
||||||
|
#define HAL_DMA_MODULE_ENABLED
|
||||||
|
#define HAL_MDMA_MODULE_ENABLED
|
||||||
|
#define HAL_RCC_MODULE_ENABLED
|
||||||
|
#define HAL_FLASH_MODULE_ENABLED
|
||||||
|
#define HAL_EXTI_MODULE_ENABLED
|
||||||
|
#define HAL_PWR_MODULE_ENABLED
|
||||||
|
#define HAL_I2C_MODULE_ENABLED
|
||||||
|
#define HAL_CORTEX_MODULE_ENABLED
|
||||||
|
#define HAL_HSEM_MODULE_ENABLED
|
||||||
|
|
||||||
|
/* ########################## Oscillator Values adaptation ####################*/
|
||||||
|
/**
|
||||||
|
* @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
|
||||||
|
* This value is used by the RCC HAL module to compute the system frequency
|
||||||
|
* (when HSE is used as system clock source, directly or through the PLL).
|
||||||
|
*/
|
||||||
|
#if !defined (HSE_VALUE)
|
||||||
|
#define HSE_VALUE (24000000UL) /*!< Value of the External oscillator in Hz : FPGA case fixed to 60MHZ */
|
||||||
|
#endif /* HSE_VALUE */
|
||||||
|
|
||||||
|
#if !defined (HSE_STARTUP_TIMEOUT)
|
||||||
|
#define HSE_STARTUP_TIMEOUT (100UL) /*!< Time out for HSE start up, in ms */
|
||||||
|
#endif /* HSE_STARTUP_TIMEOUT */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Internal oscillator (CSI) default value.
|
||||||
|
* This value is the default CSI value after Reset.
|
||||||
|
*/
|
||||||
|
#if !defined (CSI_VALUE)
|
||||||
|
#define CSI_VALUE (4000000UL) /*!< Value of the Internal oscillator in Hz*/
|
||||||
|
#endif /* CSI_VALUE */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Internal High Speed oscillator (HSI) value.
|
||||||
|
* This value is used by the RCC HAL module to compute the system frequency
|
||||||
|
* (when HSI is used as system clock source, directly or through the PLL).
|
||||||
|
*/
|
||||||
|
#if !defined (HSI_VALUE)
|
||||||
|
#define HSI_VALUE (64000000UL) /*!< Value of the Internal oscillator in Hz*/
|
||||||
|
#endif /* HSI_VALUE */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief External Low Speed oscillator (LSE) value.
|
||||||
|
* This value is used by the UART, RTC HAL module to compute the system frequency
|
||||||
|
*/
|
||||||
|
#if !defined (LSE_VALUE)
|
||||||
|
#define LSE_VALUE (32768UL) /*!< Value of the External oscillator in Hz*/
|
||||||
|
#endif /* LSE_VALUE */
|
||||||
|
|
||||||
|
#if !defined (LSE_STARTUP_TIMEOUT)
|
||||||
|
#define LSE_STARTUP_TIMEOUT (5000UL) /*!< Time out for LSE start up, in ms */
|
||||||
|
#endif /* LSE_STARTUP_TIMEOUT */
|
||||||
|
|
||||||
|
#if !defined (LSI_VALUE)
|
||||||
|
#define LSI_VALUE (32000UL) /*!< LSI Typical Value in Hz*/
|
||||||
|
#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz
|
||||||
|
The real value may vary depending on the variations
|
||||||
|
in voltage and temperature.*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief External clock source for I2S peripheral
|
||||||
|
* This value is used by the I2S HAL module to compute the I2S clock source
|
||||||
|
* frequency, this source is inserted directly through I2S_CKIN pad.
|
||||||
|
*/
|
||||||
|
#if !defined (EXTERNAL_CLOCK_VALUE)
|
||||||
|
#define EXTERNAL_CLOCK_VALUE 12288000UL /*!< Value of the External clock in Hz*/
|
||||||
|
#endif /* EXTERNAL_CLOCK_VALUE */
|
||||||
|
|
||||||
|
/* Tip: To avoid modifying this file each time you need to use different HSE,
|
||||||
|
=== you can define the HSE value in your toolchain compiler preprocessor. */
|
||||||
|
|
||||||
|
/* ########################### System Configuration ######################### */
|
||||||
|
/**
|
||||||
|
* @brief This is the HAL system configuration section
|
||||||
|
*/
|
||||||
|
#define VDD_VALUE (3300UL) /*!< Value of VDD in mv */
|
||||||
|
#define TICK_INT_PRIORITY (15UL) /*!< tick interrupt priority */
|
||||||
|
#define USE_RTOS 0
|
||||||
|
#define USE_SD_TRANSCEIVER 0U /*!< use uSD Transceiver */
|
||||||
|
#define USE_SPI_CRC 0U /*!< use CRC in SPI */
|
||||||
|
|
||||||
|
#define USE_HAL_ADC_REGISTER_CALLBACKS 0U /* ADC register callback disabled */
|
||||||
|
#define USE_HAL_CEC_REGISTER_CALLBACKS 0U /* CEC register callback disabled */
|
||||||
|
#define USE_HAL_COMP_REGISTER_CALLBACKS 0U /* COMP register callback disabled */
|
||||||
|
#define USE_HAL_CORDIC_REGISTER_CALLBACKS 0U /* CORDIC register callback disabled */
|
||||||
|
#define USE_HAL_CRYP_REGISTER_CALLBACKS 0U /* CRYP register callback disabled */
|
||||||
|
#define USE_HAL_DAC_REGISTER_CALLBACKS 0U /* DAC register callback disabled */
|
||||||
|
#define USE_HAL_DCMI_REGISTER_CALLBACKS 0U /* DCMI register callback disabled */
|
||||||
|
#define USE_HAL_DFSDM_REGISTER_CALLBACKS 0U /* DFSDM register callback disabled */
|
||||||
|
#define USE_HAL_DMA2D_REGISTER_CALLBACKS 0U /* DMA2D register callback disabled */
|
||||||
|
#define USE_HAL_DSI_REGISTER_CALLBACKS 0U /* DSI register callback disabled */
|
||||||
|
#define USE_HAL_DTS_REGISTER_CALLBACKS 0U /* DTS register callback disabled */
|
||||||
|
#define USE_HAL_ETH_REGISTER_CALLBACKS 0U /* ETH register callback disabled */
|
||||||
|
#define USE_HAL_FDCAN_REGISTER_CALLBACKS 0U /* FDCAN register callback disabled */
|
||||||
|
#define USE_HAL_FMAC_REGISTER_CALLBACKS 0U /* FMAC register callback disabled */
|
||||||
|
#define USE_HAL_NAND_REGISTER_CALLBACKS 0U /* NAND register callback disabled */
|
||||||
|
#define USE_HAL_NOR_REGISTER_CALLBACKS 0U /* NOR register callback disabled */
|
||||||
|
#define USE_HAL_SDRAM_REGISTER_CALLBACKS 0U /* SDRAM register callback disabled */
|
||||||
|
#define USE_HAL_SRAM_REGISTER_CALLBACKS 0U /* SRAM register callback disabled */
|
||||||
|
#define USE_HAL_HASH_REGISTER_CALLBACKS 0U /* HASH register callback disabled */
|
||||||
|
#define USE_HAL_HCD_REGISTER_CALLBACKS 0U /* HCD register callback disabled */
|
||||||
|
#define USE_HAL_GFXMMU_REGISTER_CALLBACKS 0U /* GFXMMU register callback disabled */
|
||||||
|
#define USE_HAL_HRTIM_REGISTER_CALLBACKS 0U /* HRTIM register callback disabled */
|
||||||
|
#define USE_HAL_I2C_REGISTER_CALLBACKS 0U /* I2C register callback disabled */
|
||||||
|
#define USE_HAL_I2S_REGISTER_CALLBACKS 0U /* I2S register callback disabled */
|
||||||
|
#define USE_HAL_IRDA_REGISTER_CALLBACKS 0U /* IRDA register callback disabled */
|
||||||
|
#define USE_HAL_JPEG_REGISTER_CALLBACKS 0U /* JPEG register callback disabled */
|
||||||
|
#define USE_HAL_LPTIM_REGISTER_CALLBACKS 0U /* LPTIM register callback disabled */
|
||||||
|
#define USE_HAL_LTDC_REGISTER_CALLBACKS 0U /* LTDC register callback disabled */
|
||||||
|
#define USE_HAL_MDIOS_REGISTER_CALLBACKS 0U /* MDIO register callback disabled */
|
||||||
|
#define USE_HAL_MMC_REGISTER_CALLBACKS 0U /* MMC register callback disabled */
|
||||||
|
#define USE_HAL_OPAMP_REGISTER_CALLBACKS 0U /* MDIO register callback disabled */
|
||||||
|
#define USE_HAL_OSPI_REGISTER_CALLBACKS 0U /* OSPI register callback disabled */
|
||||||
|
#define USE_HAL_OTFDEC_REGISTER_CALLBACKS 0U /* OTFDEC register callback disabled */
|
||||||
|
#define USE_HAL_PCD_REGISTER_CALLBACKS 0U /* PCD register callback disabled */
|
||||||
|
#define USE_HAL_QSPI_REGISTER_CALLBACKS 0U /* QSPI register callback disabled */
|
||||||
|
#define USE_HAL_RNG_REGISTER_CALLBACKS 0U /* RNG register callback disabled */
|
||||||
|
#define USE_HAL_RTC_REGISTER_CALLBACKS 0U /* RTC register callback disabled */
|
||||||
|
#define USE_HAL_SAI_REGISTER_CALLBACKS 0U /* SAI register callback disabled */
|
||||||
|
#define USE_HAL_SD_REGISTER_CALLBACKS 0U /* SD register callback disabled */
|
||||||
|
#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U /* SMARTCARD register callback disabled */
|
||||||
|
#define USE_HAL_SPDIFRX_REGISTER_CALLBACKS 0U /* SPDIFRX register callback disabled */
|
||||||
|
#define USE_HAL_SMBUS_REGISTER_CALLBACKS 0U /* SMBUS register callback disabled */
|
||||||
|
#define USE_HAL_SPI_REGISTER_CALLBACKS 0U /* SPI register callback disabled */
|
||||||
|
#define USE_HAL_SWPMI_REGISTER_CALLBACKS 0U /* SWPMI register callback disabled */
|
||||||
|
#define USE_HAL_TIM_REGISTER_CALLBACKS 0U /* TIM register callback disabled */
|
||||||
|
#define USE_HAL_UART_REGISTER_CALLBACKS 0U /* UART register callback disabled */
|
||||||
|
#define USE_HAL_USART_REGISTER_CALLBACKS 0U /* USART register callback disabled */
|
||||||
|
#define USE_HAL_WWDG_REGISTER_CALLBACKS 0U /* WWDG register callback disabled */
|
||||||
|
|
||||||
|
/* ########################### Ethernet Configuration ######################### */
|
||||||
|
#define ETH_TX_DESC_CNT 4U /* number of Ethernet Tx DMA descriptors */
|
||||||
|
#define ETH_RX_DESC_CNT 4U /* number of Ethernet Rx DMA descriptors */
|
||||||
|
|
||||||
|
#define ETH_MAC_ADDR0 (0x02UL)
|
||||||
|
#define ETH_MAC_ADDR1 (0x00UL)
|
||||||
|
#define ETH_MAC_ADDR2 (0x00UL)
|
||||||
|
#define ETH_MAC_ADDR3 (0x00UL)
|
||||||
|
#define ETH_MAC_ADDR4 (0x00UL)
|
||||||
|
#define ETH_MAC_ADDR5 (0x00UL)
|
||||||
|
|
||||||
|
/* ########################## Assert Selection ############################## */
|
||||||
|
/**
|
||||||
|
* @brief Uncomment the line below to expanse the "assert_param" macro in the
|
||||||
|
* HAL drivers code
|
||||||
|
*/
|
||||||
|
/* #define USE_FULL_ASSERT 1U */
|
||||||
|
|
||||||
|
/* Includes ------------------------------------------------------------------*/
|
||||||
|
/**
|
||||||
|
* @brief Include module's header file
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifdef HAL_RCC_MODULE_ENABLED
|
||||||
|
#include "stm32h7xx_hal_rcc.h"
|
||||||
|
#endif /* HAL_RCC_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_GPIO_MODULE_ENABLED
|
||||||
|
#include "stm32h7xx_hal_gpio.h"
|
||||||
|
#endif /* HAL_GPIO_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_DMA_MODULE_ENABLED
|
||||||
|
#include "stm32h7xx_hal_dma.h"
|
||||||
|
#endif /* HAL_DMA_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_MDMA_MODULE_ENABLED
|
||||||
|
#include "stm32h7xx_hal_mdma.h"
|
||||||
|
#endif /* HAL_MDMA_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_HASH_MODULE_ENABLED
|
||||||
|
#include "stm32h7xx_hal_hash.h"
|
||||||
|
#endif /* HAL_HASH_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_DCMI_MODULE_ENABLED
|
||||||
|
#include "stm32h7xx_hal_dcmi.h"
|
||||||
|
#endif /* HAL_DCMI_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_DMA2D_MODULE_ENABLED
|
||||||
|
#include "stm32h7xx_hal_dma2d.h"
|
||||||
|
#endif /* HAL_DMA2D_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_DSI_MODULE_ENABLED
|
||||||
|
#include "stm32h7xx_hal_dsi.h"
|
||||||
|
#endif /* HAL_DSI_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_DFSDM_MODULE_ENABLED
|
||||||
|
#include "stm32h7xx_hal_dfsdm.h"
|
||||||
|
#endif /* HAL_DFSDM_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_DTS_MODULE_ENABLED
|
||||||
|
#include "stm32h7xx_hal_dts.h"
|
||||||
|
#endif /* HAL_DTS_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_ETH_MODULE_ENABLED
|
||||||
|
#include "stm32h7xx_hal_eth.h"
|
||||||
|
#endif /* HAL_ETH_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_ETH_LEGACY_MODULE_ENABLED
|
||||||
|
#include "stm32h7xx_hal_eth_legacy.h"
|
||||||
|
#endif /* HAL_ETH_LEGACY_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_EXTI_MODULE_ENABLED
|
||||||
|
#include "stm32h7xx_hal_exti.h"
|
||||||
|
#endif /* HAL_EXTI_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_CORTEX_MODULE_ENABLED
|
||||||
|
#include "stm32h7xx_hal_cortex.h"
|
||||||
|
#endif /* HAL_CORTEX_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_ADC_MODULE_ENABLED
|
||||||
|
#include "stm32h7xx_hal_adc.h"
|
||||||
|
#endif /* HAL_ADC_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_FDCAN_MODULE_ENABLED
|
||||||
|
#include "stm32h7xx_hal_fdcan.h"
|
||||||
|
#endif /* HAL_FDCAN_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_CEC_MODULE_ENABLED
|
||||||
|
#include "stm32h7xx_hal_cec.h"
|
||||||
|
#endif /* HAL_CEC_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_COMP_MODULE_ENABLED
|
||||||
|
#include "stm32h7xx_hal_comp.h"
|
||||||
|
#endif /* HAL_COMP_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_CORDIC_MODULE_ENABLED
|
||||||
|
#include "stm32h7xx_hal_cordic.h"
|
||||||
|
#endif /* HAL_CORDIC_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_CRC_MODULE_ENABLED
|
||||||
|
#include "stm32h7xx_hal_crc.h"
|
||||||
|
#endif /* HAL_CRC_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_CRYP_MODULE_ENABLED
|
||||||
|
#include "stm32h7xx_hal_cryp.h"
|
||||||
|
#endif /* HAL_CRYP_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_DAC_MODULE_ENABLED
|
||||||
|
#include "stm32h7xx_hal_dac.h"
|
||||||
|
#endif /* HAL_DAC_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_FLASH_MODULE_ENABLED
|
||||||
|
#include "stm32h7xx_hal_flash.h"
|
||||||
|
#endif /* HAL_FLASH_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_GFXMMU_MODULE_ENABLED
|
||||||
|
#include "stm32h7xx_hal_gfxmmu.h"
|
||||||
|
#endif /* HAL_GFXMMU_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_FMAC_MODULE_ENABLED
|
||||||
|
#include "stm32h7xx_hal_fmac.h"
|
||||||
|
#endif /* HAL_FMAC_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_HRTIM_MODULE_ENABLED
|
||||||
|
#include "stm32h7xx_hal_hrtim.h"
|
||||||
|
#endif /* HAL_HRTIM_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_HSEM_MODULE_ENABLED
|
||||||
|
#include "stm32h7xx_hal_hsem.h"
|
||||||
|
#endif /* HAL_HSEM_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_SRAM_MODULE_ENABLED
|
||||||
|
#include "stm32h7xx_hal_sram.h"
|
||||||
|
#endif /* HAL_SRAM_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_NOR_MODULE_ENABLED
|
||||||
|
#include "stm32h7xx_hal_nor.h"
|
||||||
|
#endif /* HAL_NOR_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_NAND_MODULE_ENABLED
|
||||||
|
#include "stm32h7xx_hal_nand.h"
|
||||||
|
#endif /* HAL_NAND_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_I2C_MODULE_ENABLED
|
||||||
|
#include "stm32h7xx_hal_i2c.h"
|
||||||
|
#endif /* HAL_I2C_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_I2S_MODULE_ENABLED
|
||||||
|
#include "stm32h7xx_hal_i2s.h"
|
||||||
|
#endif /* HAL_I2S_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_IWDG_MODULE_ENABLED
|
||||||
|
#include "stm32h7xx_hal_iwdg.h"
|
||||||
|
#endif /* HAL_IWDG_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_JPEG_MODULE_ENABLED
|
||||||
|
#include "stm32h7xx_hal_jpeg.h"
|
||||||
|
#endif /* HAL_JPEG_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_MDIOS_MODULE_ENABLED
|
||||||
|
#include "stm32h7xx_hal_mdios.h"
|
||||||
|
#endif /* HAL_MDIOS_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_MMC_MODULE_ENABLED
|
||||||
|
#include "stm32h7xx_hal_mmc.h"
|
||||||
|
#endif /* HAL_MMC_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_LPTIM_MODULE_ENABLED
|
||||||
|
#include "stm32h7xx_hal_lptim.h"
|
||||||
|
#endif /* HAL_LPTIM_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_LTDC_MODULE_ENABLED
|
||||||
|
#include "stm32h7xx_hal_ltdc.h"
|
||||||
|
#endif /* HAL_LTDC_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_OPAMP_MODULE_ENABLED
|
||||||
|
#include "stm32h7xx_hal_opamp.h"
|
||||||
|
#endif /* HAL_OPAMP_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_OSPI_MODULE_ENABLED
|
||||||
|
#include "stm32h7xx_hal_ospi.h"
|
||||||
|
#endif /* HAL_OSPI_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_OTFDEC_MODULE_ENABLED
|
||||||
|
#include "stm32h7xx_hal_otfdec.h"
|
||||||
|
#endif /* HAL_OTFDEC_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_PSSI_MODULE_ENABLED
|
||||||
|
#include "stm32h7xx_hal_pssi.h"
|
||||||
|
#endif /* HAL_PSSI_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_PWR_MODULE_ENABLED
|
||||||
|
#include "stm32h7xx_hal_pwr.h"
|
||||||
|
#endif /* HAL_PWR_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_QSPI_MODULE_ENABLED
|
||||||
|
#include "stm32h7xx_hal_qspi.h"
|
||||||
|
#endif /* HAL_QSPI_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_RAMECC_MODULE_ENABLED
|
||||||
|
#include "stm32h7xx_hal_ramecc.h"
|
||||||
|
#endif /* HAL_RAMECC_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_RNG_MODULE_ENABLED
|
||||||
|
#include "stm32h7xx_hal_rng.h"
|
||||||
|
#endif /* HAL_RNG_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_RTC_MODULE_ENABLED
|
||||||
|
#include "stm32h7xx_hal_rtc.h"
|
||||||
|
#endif /* HAL_RTC_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_SAI_MODULE_ENABLED
|
||||||
|
#include "stm32h7xx_hal_sai.h"
|
||||||
|
#endif /* HAL_SAI_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_SD_MODULE_ENABLED
|
||||||
|
#include "stm32h7xx_hal_sd.h"
|
||||||
|
#endif /* HAL_SD_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_SDRAM_MODULE_ENABLED
|
||||||
|
#include "stm32h7xx_hal_sdram.h"
|
||||||
|
#endif /* HAL_SDRAM_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_SPI_MODULE_ENABLED
|
||||||
|
#include "stm32h7xx_hal_spi.h"
|
||||||
|
#endif /* HAL_SPI_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_SPDIFRX_MODULE_ENABLED
|
||||||
|
#include "stm32h7xx_hal_spdifrx.h"
|
||||||
|
#endif /* HAL_SPDIFRX_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_SWPMI_MODULE_ENABLED
|
||||||
|
#include "stm32h7xx_hal_swpmi.h"
|
||||||
|
#endif /* HAL_SWPMI_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_TIM_MODULE_ENABLED
|
||||||
|
#include "stm32h7xx_hal_tim.h"
|
||||||
|
#endif /* HAL_TIM_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_UART_MODULE_ENABLED
|
||||||
|
#include "stm32h7xx_hal_uart.h"
|
||||||
|
#endif /* HAL_UART_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_USART_MODULE_ENABLED
|
||||||
|
#include "stm32h7xx_hal_usart.h"
|
||||||
|
#endif /* HAL_USART_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_IRDA_MODULE_ENABLED
|
||||||
|
#include "stm32h7xx_hal_irda.h"
|
||||||
|
#endif /* HAL_IRDA_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_SMARTCARD_MODULE_ENABLED
|
||||||
|
#include "stm32h7xx_hal_smartcard.h"
|
||||||
|
#endif /* HAL_SMARTCARD_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_SMBUS_MODULE_ENABLED
|
||||||
|
#include "stm32h7xx_hal_smbus.h"
|
||||||
|
#endif /* HAL_SMBUS_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_WWDG_MODULE_ENABLED
|
||||||
|
#include "stm32h7xx_hal_wwdg.h"
|
||||||
|
#endif /* HAL_WWDG_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_PCD_MODULE_ENABLED
|
||||||
|
#include "stm32h7xx_hal_pcd.h"
|
||||||
|
#endif /* HAL_PCD_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_HCD_MODULE_ENABLED
|
||||||
|
#include "stm32h7xx_hal_hcd.h"
|
||||||
|
#endif /* HAL_HCD_MODULE_ENABLED */
|
||||||
|
|
||||||
|
/* Exported macro ------------------------------------------------------------*/
|
||||||
|
#ifdef USE_FULL_ASSERT
|
||||||
|
/**
|
||||||
|
* @brief The assert_param macro is used for function's parameters check.
|
||||||
|
* @param expr: If expr is false, it calls assert_failed function
|
||||||
|
* which reports the name of the source file and the source
|
||||||
|
* line number of the call that failed.
|
||||||
|
* If expr is true, it returns no value.
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
|
||||||
|
/* Exported functions ------------------------------------------------------- */
|
||||||
|
void assert_failed(uint8_t *file, uint32_t line);
|
||||||
|
#else
|
||||||
|
#define assert_param(expr) ((void)0U)
|
||||||
|
#endif /* USE_FULL_ASSERT */
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /* STM32H7xx_HAL_CONF_H */
|
||||||
86
Core/Inc/stm32h7xx_it.h
Normal file
86
Core/Inc/stm32h7xx_it.h
Normal file
@@ -0,0 +1,86 @@
|
|||||||
|
/* USER CODE BEGIN Header */
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file stm32h7xx_it.h
|
||||||
|
* @brief This file contains the headers of the interrupt handlers.
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* Copyright (c) 2026 STMicroelectronics.
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* This software is licensed under terms that can be found in the LICENSE file
|
||||||
|
* in the root directory of this software component.
|
||||||
|
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
/* USER CODE END Header */
|
||||||
|
|
||||||
|
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||||
|
#ifndef __STM32H7xx_IT_H
|
||||||
|
#define __STM32H7xx_IT_H
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Private includes ----------------------------------------------------------*/
|
||||||
|
/* USER CODE BEGIN Includes */
|
||||||
|
|
||||||
|
/* USER CODE END Includes */
|
||||||
|
|
||||||
|
/* Exported types ------------------------------------------------------------*/
|
||||||
|
/* USER CODE BEGIN ET */
|
||||||
|
|
||||||
|
/* USER CODE END ET */
|
||||||
|
|
||||||
|
/* Exported constants --------------------------------------------------------*/
|
||||||
|
/* USER CODE BEGIN EC */
|
||||||
|
|
||||||
|
/* USER CODE END EC */
|
||||||
|
|
||||||
|
/* Exported macro ------------------------------------------------------------*/
|
||||||
|
/* USER CODE BEGIN EM */
|
||||||
|
|
||||||
|
/* USER CODE END EM */
|
||||||
|
|
||||||
|
/* Exported functions prototypes ---------------------------------------------*/
|
||||||
|
void NMI_Handler(void);
|
||||||
|
void HardFault_Handler(void);
|
||||||
|
void MemManage_Handler(void);
|
||||||
|
void BusFault_Handler(void);
|
||||||
|
void UsageFault_Handler(void);
|
||||||
|
void DebugMon_Handler(void);
|
||||||
|
void DMA1_Stream0_IRQHandler(void);
|
||||||
|
void DMA1_Stream1_IRQHandler(void);
|
||||||
|
void DMA1_Stream2_IRQHandler(void);
|
||||||
|
void DMA1_Stream3_IRQHandler(void);
|
||||||
|
void DMA1_Stream4_IRQHandler(void);
|
||||||
|
void DMA1_Stream5_IRQHandler(void);
|
||||||
|
void FDCAN1_IT0_IRQHandler(void);
|
||||||
|
void FDCAN2_IT0_IRQHandler(void);
|
||||||
|
void FDCAN1_IT1_IRQHandler(void);
|
||||||
|
void FDCAN2_IT1_IRQHandler(void);
|
||||||
|
void SPI2_IRQHandler(void);
|
||||||
|
void USART1_IRQHandler(void);
|
||||||
|
void USART2_IRQHandler(void);
|
||||||
|
void USART3_IRQHandler(void);
|
||||||
|
void EXTI15_10_IRQHandler(void);
|
||||||
|
void UART5_IRQHandler(void);
|
||||||
|
void UART7_IRQHandler(void);
|
||||||
|
void ADC3_IRQHandler(void);
|
||||||
|
void BDMA_Channel0_IRQHandler(void);
|
||||||
|
void USART10_IRQHandler(void);
|
||||||
|
void FDCAN3_IT0_IRQHandler(void);
|
||||||
|
void FDCAN3_IT1_IRQHandler(void);
|
||||||
|
void TIM23_IRQHandler(void);
|
||||||
|
/* USER CODE BEGIN EFP */
|
||||||
|
|
||||||
|
/* USER CODE END EFP */
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /* __STM32H7xx_IT_H */
|
||||||
@@ -7,7 +7,7 @@
|
|||||||
******************************************************************************
|
******************************************************************************
|
||||||
* @attention
|
* @attention
|
||||||
*
|
*
|
||||||
* Copyright (c) 2025 STMicroelectronics.
|
* Copyright (c) 2026 STMicroelectronics.
|
||||||
* All rights reserved.
|
* All rights reserved.
|
||||||
*
|
*
|
||||||
* This software is licensed under terms that can be found in the LICENSE file
|
* This software is licensed under terms that can be found in the LICENSE file
|
||||||
@@ -34,29 +34,20 @@ extern "C" {
|
|||||||
|
|
||||||
extern TIM_HandleTypeDef htim1;
|
extern TIM_HandleTypeDef htim1;
|
||||||
|
|
||||||
|
extern TIM_HandleTypeDef htim2;
|
||||||
|
|
||||||
extern TIM_HandleTypeDef htim3;
|
extern TIM_HandleTypeDef htim3;
|
||||||
|
|
||||||
extern TIM_HandleTypeDef htim4;
|
extern TIM_HandleTypeDef htim12;
|
||||||
|
|
||||||
extern TIM_HandleTypeDef htim5;
|
|
||||||
|
|
||||||
extern TIM_HandleTypeDef htim7;
|
|
||||||
|
|
||||||
extern TIM_HandleTypeDef htim8;
|
|
||||||
|
|
||||||
extern TIM_HandleTypeDef htim10;
|
|
||||||
|
|
||||||
/* USER CODE BEGIN Private defines */
|
/* USER CODE BEGIN Private defines */
|
||||||
|
|
||||||
/* USER CODE END Private defines */
|
/* USER CODE END Private defines */
|
||||||
|
|
||||||
void MX_TIM1_Init(void);
|
void MX_TIM1_Init(void);
|
||||||
|
void MX_TIM2_Init(void);
|
||||||
void MX_TIM3_Init(void);
|
void MX_TIM3_Init(void);
|
||||||
void MX_TIM4_Init(void);
|
void MX_TIM12_Init(void);
|
||||||
void MX_TIM5_Init(void);
|
|
||||||
void MX_TIM7_Init(void);
|
|
||||||
void MX_TIM8_Init(void);
|
|
||||||
void MX_TIM10_Init(void);
|
|
||||||
|
|
||||||
void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim);
|
void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim);
|
||||||
|
|
||||||
|
|||||||
@@ -7,7 +7,7 @@
|
|||||||
******************************************************************************
|
******************************************************************************
|
||||||
* @attention
|
* @attention
|
||||||
*
|
*
|
||||||
* Copyright (c) 2025 STMicroelectronics.
|
* Copyright (c) 2026 STMicroelectronics.
|
||||||
* All rights reserved.
|
* All rights reserved.
|
||||||
*
|
*
|
||||||
* This software is licensed under terms that can be found in the LICENSE file
|
* This software is licensed under terms that can be found in the LICENSE file
|
||||||
@@ -32,19 +32,28 @@ extern "C" {
|
|||||||
|
|
||||||
/* USER CODE END Includes */
|
/* USER CODE END Includes */
|
||||||
|
|
||||||
|
extern UART_HandleTypeDef huart5;
|
||||||
|
|
||||||
|
extern UART_HandleTypeDef huart7;
|
||||||
|
|
||||||
extern UART_HandleTypeDef huart1;
|
extern UART_HandleTypeDef huart1;
|
||||||
|
|
||||||
|
extern UART_HandleTypeDef huart2;
|
||||||
|
|
||||||
extern UART_HandleTypeDef huart3;
|
extern UART_HandleTypeDef huart3;
|
||||||
|
|
||||||
extern UART_HandleTypeDef huart6;
|
extern UART_HandleTypeDef huart10;
|
||||||
|
|
||||||
/* USER CODE BEGIN Private defines */
|
/* USER CODE BEGIN Private defines */
|
||||||
|
|
||||||
/* USER CODE END Private defines */
|
/* USER CODE END Private defines */
|
||||||
|
|
||||||
|
void MX_UART5_Init(void);
|
||||||
|
void MX_UART7_Init(void);
|
||||||
void MX_USART1_UART_Init(void);
|
void MX_USART1_UART_Init(void);
|
||||||
|
void MX_USART2_UART_Init(void);
|
||||||
void MX_USART3_UART_Init(void);
|
void MX_USART3_UART_Init(void);
|
||||||
void MX_USART6_UART_Init(void);
|
void MX_USART10_UART_Init(void);
|
||||||
|
|
||||||
/* USER CODE BEGIN Prototypes */
|
/* USER CODE BEGIN Prototypes */
|
||||||
|
|
||||||
|
|||||||
52
Core/Inc/usb_otg.h
Normal file
52
Core/Inc/usb_otg.h
Normal file
@@ -0,0 +1,52 @@
|
|||||||
|
/* USER CODE BEGIN Header */
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file usb_otg.h
|
||||||
|
* @brief This file contains all the function prototypes for
|
||||||
|
* the usb_otg.c file
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* Copyright (c) 2026 STMicroelectronics.
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* This software is licensed under terms that can be found in the LICENSE file
|
||||||
|
* in the root directory of this software component.
|
||||||
|
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
/* USER CODE END Header */
|
||||||
|
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||||
|
#ifndef __USB_OTG_H__
|
||||||
|
#define __USB_OTG_H__
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Includes ------------------------------------------------------------------*/
|
||||||
|
#include "main.h"
|
||||||
|
|
||||||
|
/* USER CODE BEGIN Includes */
|
||||||
|
|
||||||
|
/* USER CODE END Includes */
|
||||||
|
|
||||||
|
extern PCD_HandleTypeDef hpcd_USB_OTG_HS;
|
||||||
|
|
||||||
|
/* USER CODE BEGIN Private defines */
|
||||||
|
|
||||||
|
/* USER CODE END Private defines */
|
||||||
|
|
||||||
|
void MX_USB_OTG_HS_PCD_Init(void);
|
||||||
|
|
||||||
|
/* USER CODE BEGIN Prototypes */
|
||||||
|
|
||||||
|
/* USER CODE END Prototypes */
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /* __USB_OTG_H__ */
|
||||||
|
|
||||||
186
Core/Src/adc.c
186
Core/Src/adc.c
@@ -7,7 +7,7 @@
|
|||||||
******************************************************************************
|
******************************************************************************
|
||||||
* @attention
|
* @attention
|
||||||
*
|
*
|
||||||
* Copyright (c) 2025 STMicroelectronics.
|
* Copyright (c) 2026 STMicroelectronics.
|
||||||
* All rights reserved.
|
* All rights reserved.
|
||||||
*
|
*
|
||||||
* This software is licensed under terms that can be found in the LICENSE file
|
* This software is licensed under terms that can be found in the LICENSE file
|
||||||
@@ -26,6 +26,8 @@
|
|||||||
|
|
||||||
ADC_HandleTypeDef hadc1;
|
ADC_HandleTypeDef hadc1;
|
||||||
ADC_HandleTypeDef hadc3;
|
ADC_HandleTypeDef hadc3;
|
||||||
|
DMA_HandleTypeDef hdma_adc1;
|
||||||
|
DMA_HandleTypeDef hdma_adc3;
|
||||||
|
|
||||||
/* ADC1 init function */
|
/* ADC1 init function */
|
||||||
void MX_ADC1_Init(void)
|
void MX_ADC1_Init(void)
|
||||||
@@ -35,36 +37,62 @@ void MX_ADC1_Init(void)
|
|||||||
|
|
||||||
/* USER CODE END ADC1_Init 0 */
|
/* USER CODE END ADC1_Init 0 */
|
||||||
|
|
||||||
|
ADC_MultiModeTypeDef multimode = {0};
|
||||||
ADC_ChannelConfTypeDef sConfig = {0};
|
ADC_ChannelConfTypeDef sConfig = {0};
|
||||||
|
|
||||||
/* USER CODE BEGIN ADC1_Init 1 */
|
/* USER CODE BEGIN ADC1_Init 1 */
|
||||||
|
|
||||||
/* USER CODE END ADC1_Init 1 */
|
/* USER CODE END ADC1_Init 1 */
|
||||||
|
|
||||||
/** Configure the global features of the ADC (Clock, Resolution, Data Alignment and number of conversion)
|
/** Common config
|
||||||
*/
|
*/
|
||||||
hadc1.Instance = ADC1;
|
hadc1.Instance = ADC1;
|
||||||
hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV6;
|
hadc1.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV64;
|
||||||
hadc1.Init.Resolution = ADC_RESOLUTION_12B;
|
hadc1.Init.Resolution = ADC_RESOLUTION_16B;
|
||||||
hadc1.Init.ScanConvMode = DISABLE;
|
hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE;
|
||||||
hadc1.Init.ContinuousConvMode = DISABLE;
|
|
||||||
hadc1.Init.DiscontinuousConvMode = DISABLE;
|
|
||||||
hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;
|
|
||||||
hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START;
|
|
||||||
hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;
|
|
||||||
hadc1.Init.NbrOfConversion = 1;
|
|
||||||
hadc1.Init.DMAContinuousRequests = DISABLE;
|
|
||||||
hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV;
|
hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV;
|
||||||
|
hadc1.Init.LowPowerAutoWait = DISABLE;
|
||||||
|
hadc1.Init.ContinuousConvMode = ENABLE;
|
||||||
|
hadc1.Init.NbrOfConversion = 2;
|
||||||
|
hadc1.Init.DiscontinuousConvMode = DISABLE;
|
||||||
|
hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START;
|
||||||
|
hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;
|
||||||
|
hadc1.Init.ConversionDataManagement = ADC_CONVERSIONDATA_DMA_CIRCULAR;
|
||||||
|
hadc1.Init.Overrun = ADC_OVR_DATA_PRESERVED;
|
||||||
|
hadc1.Init.LeftBitShift = ADC_LEFTBITSHIFT_NONE;
|
||||||
|
hadc1.Init.OversamplingMode = DISABLE;
|
||||||
|
hadc1.Init.Oversampling.Ratio = 1;
|
||||||
if (HAL_ADC_Init(&hadc1) != HAL_OK)
|
if (HAL_ADC_Init(&hadc1) != HAL_OK)
|
||||||
{
|
{
|
||||||
Error_Handler();
|
Error_Handler();
|
||||||
}
|
}
|
||||||
|
|
||||||
/** Configure for the selected ADC regular channel its corresponding rank in the sequencer and its sample time.
|
/** Configure the ADC multi-mode
|
||||||
*/
|
*/
|
||||||
sConfig.Channel = ADC_CHANNEL_TEMPSENSOR;
|
multimode.Mode = ADC_MODE_INDEPENDENT;
|
||||||
sConfig.Rank = 1;
|
if (HAL_ADCEx_MultiModeConfigChannel(&hadc1, &multimode) != HAL_OK)
|
||||||
sConfig.SamplingTime = ADC_SAMPLETIME_3CYCLES;
|
{
|
||||||
|
Error_Handler();
|
||||||
|
}
|
||||||
|
|
||||||
|
/** Configure Regular Channel
|
||||||
|
*/
|
||||||
|
sConfig.Channel = ADC_CHANNEL_4;
|
||||||
|
sConfig.Rank = ADC_REGULAR_RANK_1;
|
||||||
|
sConfig.SamplingTime = ADC_SAMPLETIME_32CYCLES_5;
|
||||||
|
sConfig.SingleDiff = ADC_SINGLE_ENDED;
|
||||||
|
sConfig.OffsetNumber = ADC_OFFSET_NONE;
|
||||||
|
sConfig.Offset = 0;
|
||||||
|
sConfig.OffsetSignedSaturation = DISABLE;
|
||||||
|
if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
|
||||||
|
{
|
||||||
|
Error_Handler();
|
||||||
|
}
|
||||||
|
|
||||||
|
/** Configure Regular Channel
|
||||||
|
*/
|
||||||
|
sConfig.Channel = ADC_CHANNEL_19;
|
||||||
|
sConfig.Rank = ADC_REGULAR_RANK_2;
|
||||||
if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
|
if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
|
||||||
{
|
{
|
||||||
Error_Handler();
|
Error_Handler();
|
||||||
@@ -88,30 +116,41 @@ void MX_ADC3_Init(void)
|
|||||||
|
|
||||||
/* USER CODE END ADC3_Init 1 */
|
/* USER CODE END ADC3_Init 1 */
|
||||||
|
|
||||||
/** Configure the global features of the ADC (Clock, Resolution, Data Alignment and number of conversion)
|
/** Common config
|
||||||
*/
|
*/
|
||||||
hadc3.Instance = ADC3;
|
hadc3.Instance = ADC3;
|
||||||
hadc3.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV6;
|
hadc3.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV1;
|
||||||
hadc3.Init.Resolution = ADC_RESOLUTION_12B;
|
hadc3.Init.Resolution = ADC_RESOLUTION_12B;
|
||||||
hadc3.Init.ScanConvMode = DISABLE;
|
hadc3.Init.DataAlign = ADC3_DATAALIGN_RIGHT;
|
||||||
hadc3.Init.ContinuousConvMode = DISABLE;
|
hadc3.Init.ScanConvMode = ADC_SCAN_DISABLE;
|
||||||
hadc3.Init.DiscontinuousConvMode = DISABLE;
|
|
||||||
hadc3.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;
|
|
||||||
hadc3.Init.ExternalTrigConv = ADC_SOFTWARE_START;
|
|
||||||
hadc3.Init.DataAlign = ADC_DATAALIGN_RIGHT;
|
|
||||||
hadc3.Init.NbrOfConversion = 1;
|
|
||||||
hadc3.Init.DMAContinuousRequests = DISABLE;
|
|
||||||
hadc3.Init.EOCSelection = ADC_EOC_SINGLE_CONV;
|
hadc3.Init.EOCSelection = ADC_EOC_SINGLE_CONV;
|
||||||
|
hadc3.Init.LowPowerAutoWait = DISABLE;
|
||||||
|
hadc3.Init.ContinuousConvMode = DISABLE;
|
||||||
|
hadc3.Init.NbrOfConversion = 1;
|
||||||
|
hadc3.Init.DiscontinuousConvMode = DISABLE;
|
||||||
|
hadc3.Init.ExternalTrigConv = ADC_SOFTWARE_START;
|
||||||
|
hadc3.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;
|
||||||
|
hadc3.Init.DMAContinuousRequests = DISABLE;
|
||||||
|
hadc3.Init.SamplingMode = ADC_SAMPLING_MODE_NORMAL;
|
||||||
|
hadc3.Init.ConversionDataManagement = ADC_CONVERSIONDATA_DR;
|
||||||
|
hadc3.Init.Overrun = ADC_OVR_DATA_PRESERVED;
|
||||||
|
hadc3.Init.LeftBitShift = ADC_LEFTBITSHIFT_NONE;
|
||||||
|
hadc3.Init.OversamplingMode = DISABLE;
|
||||||
|
hadc3.Init.Oversampling.Ratio = ADC3_OVERSAMPLING_RATIO_2;
|
||||||
if (HAL_ADC_Init(&hadc3) != HAL_OK)
|
if (HAL_ADC_Init(&hadc3) != HAL_OK)
|
||||||
{
|
{
|
||||||
Error_Handler();
|
Error_Handler();
|
||||||
}
|
}
|
||||||
|
|
||||||
/** Configure for the selected ADC regular channel its corresponding rank in the sequencer and its sample time.
|
/** Configure Regular Channel
|
||||||
*/
|
*/
|
||||||
sConfig.Channel = ADC_CHANNEL_8;
|
sConfig.Channel = ADC_CHANNEL_VBAT;
|
||||||
sConfig.Rank = 1;
|
sConfig.Rank = ADC_REGULAR_RANK_1;
|
||||||
sConfig.SamplingTime = ADC_SAMPLETIME_3CYCLES;
|
sConfig.SamplingTime = ADC3_SAMPLETIME_2CYCLES_5;
|
||||||
|
sConfig.SingleDiff = ADC_SINGLE_ENDED;
|
||||||
|
sConfig.OffsetNumber = ADC_OFFSET_NONE;
|
||||||
|
sConfig.Offset = 0;
|
||||||
|
sConfig.OffsetSign = ADC3_OFFSET_SIGN_NEGATIVE;
|
||||||
if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK)
|
if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK)
|
||||||
{
|
{
|
||||||
Error_Handler();
|
Error_Handler();
|
||||||
@@ -132,7 +171,43 @@ void HAL_ADC_MspInit(ADC_HandleTypeDef* adcHandle)
|
|||||||
|
|
||||||
/* USER CODE END ADC1_MspInit 0 */
|
/* USER CODE END ADC1_MspInit 0 */
|
||||||
/* ADC1 clock enable */
|
/* ADC1 clock enable */
|
||||||
__HAL_RCC_ADC1_CLK_ENABLE();
|
__HAL_RCC_ADC12_CLK_ENABLE();
|
||||||
|
|
||||||
|
__HAL_RCC_GPIOA_CLK_ENABLE();
|
||||||
|
__HAL_RCC_GPIOC_CLK_ENABLE();
|
||||||
|
/**ADC1 GPIO Configuration
|
||||||
|
PA5 ------> ADC1_INP19
|
||||||
|
PC4 ------> ADC1_INP4
|
||||||
|
*/
|
||||||
|
GPIO_InitStruct.Pin = GPIO_PIN_5;
|
||||||
|
GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
|
||||||
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||||
|
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||||
|
|
||||||
|
GPIO_InitStruct.Pin = GPIO_PIN_4;
|
||||||
|
GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
|
||||||
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||||
|
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
|
||||||
|
|
||||||
|
/* ADC1 DMA Init */
|
||||||
|
/* ADC1 Init */
|
||||||
|
hdma_adc1.Instance = DMA1_Stream0;
|
||||||
|
hdma_adc1.Init.Request = DMA_REQUEST_ADC1;
|
||||||
|
hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY;
|
||||||
|
hdma_adc1.Init.PeriphInc = DMA_PINC_DISABLE;
|
||||||
|
hdma_adc1.Init.MemInc = DMA_MINC_ENABLE;
|
||||||
|
hdma_adc1.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
|
||||||
|
hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD;
|
||||||
|
hdma_adc1.Init.Mode = DMA_CIRCULAR;
|
||||||
|
hdma_adc1.Init.Priority = DMA_PRIORITY_LOW;
|
||||||
|
hdma_adc1.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
|
||||||
|
if (HAL_DMA_Init(&hdma_adc1) != HAL_OK)
|
||||||
|
{
|
||||||
|
Error_Handler();
|
||||||
|
}
|
||||||
|
|
||||||
|
__HAL_LINKDMA(adcHandle,DMA_Handle,hdma_adc1);
|
||||||
|
|
||||||
/* USER CODE BEGIN ADC1_MspInit 1 */
|
/* USER CODE BEGIN ADC1_MspInit 1 */
|
||||||
|
|
||||||
/* USER CODE END ADC1_MspInit 1 */
|
/* USER CODE END ADC1_MspInit 1 */
|
||||||
@@ -145,15 +220,27 @@ void HAL_ADC_MspInit(ADC_HandleTypeDef* adcHandle)
|
|||||||
/* ADC3 clock enable */
|
/* ADC3 clock enable */
|
||||||
__HAL_RCC_ADC3_CLK_ENABLE();
|
__HAL_RCC_ADC3_CLK_ENABLE();
|
||||||
|
|
||||||
__HAL_RCC_GPIOF_CLK_ENABLE();
|
/* ADC3 DMA Init */
|
||||||
/**ADC3 GPIO Configuration
|
/* ADC3 Init */
|
||||||
PF10 ------> ADC3_IN8
|
hdma_adc3.Instance = BDMA_Channel0;
|
||||||
*/
|
hdma_adc3.Init.Request = BDMA_REQUEST_ADC3;
|
||||||
GPIO_InitStruct.Pin = ADC_BAT_Pin;
|
hdma_adc3.Init.Direction = DMA_PERIPH_TO_MEMORY;
|
||||||
GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
|
hdma_adc3.Init.PeriphInc = DMA_PINC_DISABLE;
|
||||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
hdma_adc3.Init.MemInc = DMA_MINC_ENABLE;
|
||||||
HAL_GPIO_Init(ADC_BAT_GPIO_Port, &GPIO_InitStruct);
|
hdma_adc3.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
|
||||||
|
hdma_adc3.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD;
|
||||||
|
hdma_adc3.Init.Mode = DMA_NORMAL;
|
||||||
|
hdma_adc3.Init.Priority = DMA_PRIORITY_LOW;
|
||||||
|
if (HAL_DMA_Init(&hdma_adc3) != HAL_OK)
|
||||||
|
{
|
||||||
|
Error_Handler();
|
||||||
|
}
|
||||||
|
|
||||||
|
__HAL_LINKDMA(adcHandle,DMA_Handle,hdma_adc3);
|
||||||
|
|
||||||
|
/* ADC3 interrupt Init */
|
||||||
|
HAL_NVIC_SetPriority(ADC3_IRQn, 5, 0);
|
||||||
|
HAL_NVIC_EnableIRQ(ADC3_IRQn);
|
||||||
/* USER CODE BEGIN ADC3_MspInit 1 */
|
/* USER CODE BEGIN ADC3_MspInit 1 */
|
||||||
|
|
||||||
/* USER CODE END ADC3_MspInit 1 */
|
/* USER CODE END ADC3_MspInit 1 */
|
||||||
@@ -169,7 +256,18 @@ void HAL_ADC_MspDeInit(ADC_HandleTypeDef* adcHandle)
|
|||||||
|
|
||||||
/* USER CODE END ADC1_MspDeInit 0 */
|
/* USER CODE END ADC1_MspDeInit 0 */
|
||||||
/* Peripheral clock disable */
|
/* Peripheral clock disable */
|
||||||
__HAL_RCC_ADC1_CLK_DISABLE();
|
__HAL_RCC_ADC12_CLK_DISABLE();
|
||||||
|
|
||||||
|
/**ADC1 GPIO Configuration
|
||||||
|
PA5 ------> ADC1_INP19
|
||||||
|
PC4 ------> ADC1_INP4
|
||||||
|
*/
|
||||||
|
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_5);
|
||||||
|
|
||||||
|
HAL_GPIO_DeInit(GPIOC, GPIO_PIN_4);
|
||||||
|
|
||||||
|
/* ADC1 DMA DeInit */
|
||||||
|
HAL_DMA_DeInit(adcHandle->DMA_Handle);
|
||||||
/* USER CODE BEGIN ADC1_MspDeInit 1 */
|
/* USER CODE BEGIN ADC1_MspDeInit 1 */
|
||||||
|
|
||||||
/* USER CODE END ADC1_MspDeInit 1 */
|
/* USER CODE END ADC1_MspDeInit 1 */
|
||||||
@@ -182,11 +280,11 @@ void HAL_ADC_MspDeInit(ADC_HandleTypeDef* adcHandle)
|
|||||||
/* Peripheral clock disable */
|
/* Peripheral clock disable */
|
||||||
__HAL_RCC_ADC3_CLK_DISABLE();
|
__HAL_RCC_ADC3_CLK_DISABLE();
|
||||||
|
|
||||||
/**ADC3 GPIO Configuration
|
/* ADC3 DMA DeInit */
|
||||||
PF10 ------> ADC3_IN8
|
HAL_DMA_DeInit(adcHandle->DMA_Handle);
|
||||||
*/
|
|
||||||
HAL_GPIO_DeInit(ADC_BAT_GPIO_Port, ADC_BAT_Pin);
|
|
||||||
|
|
||||||
|
/* ADC3 interrupt Deinit */
|
||||||
|
HAL_NVIC_DisableIRQ(ADC3_IRQn);
|
||||||
/* USER CODE BEGIN ADC3_MspDeInit 1 */
|
/* USER CODE BEGIN ADC3_MspDeInit 1 */
|
||||||
|
|
||||||
/* USER CODE END ADC3_MspDeInit 1 */
|
/* USER CODE END ADC3_MspDeInit 1 */
|
||||||
|
|||||||
55
Core/Src/bdma.c
Normal file
55
Core/Src/bdma.c
Normal file
@@ -0,0 +1,55 @@
|
|||||||
|
/* USER CODE BEGIN Header */
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file bdma.c
|
||||||
|
* @brief This file provides code for the configuration
|
||||||
|
* of all the requested memory to memory DMA transfers.
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* Copyright (c) 2026 STMicroelectronics.
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* This software is licensed under terms that can be found in the LICENSE file
|
||||||
|
* in the root directory of this software component.
|
||||||
|
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
/* USER CODE END Header */
|
||||||
|
|
||||||
|
/* Includes ------------------------------------------------------------------*/
|
||||||
|
#include "bdma.h"
|
||||||
|
|
||||||
|
/* USER CODE BEGIN 0 */
|
||||||
|
|
||||||
|
/* USER CODE END 0 */
|
||||||
|
|
||||||
|
/*----------------------------------------------------------------------------*/
|
||||||
|
/* Configure DMA */
|
||||||
|
/*----------------------------------------------------------------------------*/
|
||||||
|
|
||||||
|
/* USER CODE BEGIN 1 */
|
||||||
|
|
||||||
|
/* USER CODE END 1 */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* Enable DMA controller clock
|
||||||
|
*/
|
||||||
|
void MX_BDMA_Init(void)
|
||||||
|
{
|
||||||
|
|
||||||
|
/* DMA controller clock enable */
|
||||||
|
__HAL_RCC_BDMA_CLK_ENABLE();
|
||||||
|
|
||||||
|
/* DMA interrupt init */
|
||||||
|
/* BDMA_Channel0_IRQn interrupt configuration */
|
||||||
|
HAL_NVIC_SetPriority(BDMA_Channel0_IRQn, 5, 0);
|
||||||
|
HAL_NVIC_EnableIRQ(BDMA_Channel0_IRQn);
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
/* USER CODE BEGIN 2 */
|
||||||
|
|
||||||
|
/* USER CODE END 2 */
|
||||||
|
|
||||||
@@ -1,4 +1,7 @@
|
|||||||
|
<<<<<<< HEAD
|
||||||
/* USER CODE BEGIN Header */
|
/* USER CODE BEGIN Header */
|
||||||
|
=======
|
||||||
|
>>>>>>> upper
|
||||||
/**
|
/**
|
||||||
******************************************************************************
|
******************************************************************************
|
||||||
* @file can.c
|
* @file can.c
|
||||||
@@ -7,6 +10,7 @@
|
|||||||
******************************************************************************
|
******************************************************************************
|
||||||
* @attention
|
* @attention
|
||||||
*
|
*
|
||||||
|
<<<<<<< HEAD
|
||||||
* Copyright (c) 2025 STMicroelectronics.
|
* Copyright (c) 2025 STMicroelectronics.
|
||||||
* All rights reserved.
|
* All rights reserved.
|
||||||
*
|
*
|
||||||
@@ -17,6 +21,19 @@
|
|||||||
******************************************************************************
|
******************************************************************************
|
||||||
*/
|
*/
|
||||||
/* USER CODE END Header */
|
/* USER CODE END Header */
|
||||||
|
=======
|
||||||
|
* <h2><center>© Copyright (c) 2025 STMicroelectronics.
|
||||||
|
* All rights reserved.</center></h2>
|
||||||
|
*
|
||||||
|
* This software component is licensed by ST under Ultimate Liberty license
|
||||||
|
* SLA0044, the "License"; You may not use this file except in compliance with
|
||||||
|
* the License. You may obtain a copy of the License at:
|
||||||
|
* www.st.com/SLA0044
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
>>>>>>> upper
|
||||||
/* Includes ------------------------------------------------------------------*/
|
/* Includes ------------------------------------------------------------------*/
|
||||||
#include "can.h"
|
#include "can.h"
|
||||||
|
|
||||||
@@ -49,7 +66,7 @@ void MX_CAN1_Init(void)
|
|||||||
hcan1.Init.AutoWakeUp = DISABLE;
|
hcan1.Init.AutoWakeUp = DISABLE;
|
||||||
hcan1.Init.AutoRetransmission = ENABLE;
|
hcan1.Init.AutoRetransmission = ENABLE;
|
||||||
hcan1.Init.ReceiveFifoLocked = DISABLE;
|
hcan1.Init.ReceiveFifoLocked = DISABLE;
|
||||||
hcan1.Init.TransmitFifoPriority = ENABLE;
|
hcan1.Init.TransmitFifoPriority = DISABLE;
|
||||||
if (HAL_CAN_Init(&hcan1) != HAL_OK)
|
if (HAL_CAN_Init(&hcan1) != HAL_OK)
|
||||||
{
|
{
|
||||||
Error_Handler();
|
Error_Handler();
|
||||||
@@ -81,7 +98,7 @@ void MX_CAN2_Init(void)
|
|||||||
hcan2.Init.AutoWakeUp = DISABLE;
|
hcan2.Init.AutoWakeUp = DISABLE;
|
||||||
hcan2.Init.AutoRetransmission = ENABLE;
|
hcan2.Init.AutoRetransmission = ENABLE;
|
||||||
hcan2.Init.ReceiveFifoLocked = DISABLE;
|
hcan2.Init.ReceiveFifoLocked = DISABLE;
|
||||||
hcan2.Init.TransmitFifoPriority = ENABLE;
|
hcan2.Init.TransmitFifoPriority = DISABLE;
|
||||||
if (HAL_CAN_Init(&hcan2) != HAL_OK)
|
if (HAL_CAN_Init(&hcan2) != HAL_OK)
|
||||||
{
|
{
|
||||||
Error_Handler();
|
Error_Handler();
|
||||||
@@ -122,8 +139,11 @@ void HAL_CAN_MspInit(CAN_HandleTypeDef* canHandle)
|
|||||||
HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
|
HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
|
||||||
|
|
||||||
/* CAN1 interrupt Init */
|
/* CAN1 interrupt Init */
|
||||||
|
<<<<<<< HEAD
|
||||||
|
=======
|
||||||
HAL_NVIC_SetPriority(CAN1_TX_IRQn, 5, 0);
|
HAL_NVIC_SetPriority(CAN1_TX_IRQn, 5, 0);
|
||||||
HAL_NVIC_EnableIRQ(CAN1_TX_IRQn);
|
HAL_NVIC_EnableIRQ(CAN1_TX_IRQn);
|
||||||
|
>>>>>>> upper
|
||||||
HAL_NVIC_SetPriority(CAN1_RX0_IRQn, 5, 0);
|
HAL_NVIC_SetPriority(CAN1_RX0_IRQn, 5, 0);
|
||||||
HAL_NVIC_EnableIRQ(CAN1_RX0_IRQn);
|
HAL_NVIC_EnableIRQ(CAN1_RX0_IRQn);
|
||||||
HAL_NVIC_SetPriority(CAN1_RX1_IRQn, 5, 0);
|
HAL_NVIC_SetPriority(CAN1_RX1_IRQn, 5, 0);
|
||||||
@@ -157,8 +177,11 @@ void HAL_CAN_MspInit(CAN_HandleTypeDef* canHandle)
|
|||||||
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
||||||
|
|
||||||
/* CAN2 interrupt Init */
|
/* CAN2 interrupt Init */
|
||||||
|
<<<<<<< HEAD
|
||||||
|
=======
|
||||||
HAL_NVIC_SetPriority(CAN2_TX_IRQn, 5, 0);
|
HAL_NVIC_SetPriority(CAN2_TX_IRQn, 5, 0);
|
||||||
HAL_NVIC_EnableIRQ(CAN2_TX_IRQn);
|
HAL_NVIC_EnableIRQ(CAN2_TX_IRQn);
|
||||||
|
>>>>>>> upper
|
||||||
HAL_NVIC_SetPriority(CAN2_RX0_IRQn, 5, 0);
|
HAL_NVIC_SetPriority(CAN2_RX0_IRQn, 5, 0);
|
||||||
HAL_NVIC_EnableIRQ(CAN2_RX0_IRQn);
|
HAL_NVIC_EnableIRQ(CAN2_RX0_IRQn);
|
||||||
HAL_NVIC_SetPriority(CAN2_RX1_IRQn, 5, 0);
|
HAL_NVIC_SetPriority(CAN2_RX1_IRQn, 5, 0);
|
||||||
@@ -190,7 +213,10 @@ void HAL_CAN_MspDeInit(CAN_HandleTypeDef* canHandle)
|
|||||||
HAL_GPIO_DeInit(GPIOD, GPIO_PIN_0|GPIO_PIN_1);
|
HAL_GPIO_DeInit(GPIOD, GPIO_PIN_0|GPIO_PIN_1);
|
||||||
|
|
||||||
/* CAN1 interrupt Deinit */
|
/* CAN1 interrupt Deinit */
|
||||||
|
<<<<<<< HEAD
|
||||||
|
=======
|
||||||
HAL_NVIC_DisableIRQ(CAN1_TX_IRQn);
|
HAL_NVIC_DisableIRQ(CAN1_TX_IRQn);
|
||||||
|
>>>>>>> upper
|
||||||
HAL_NVIC_DisableIRQ(CAN1_RX0_IRQn);
|
HAL_NVIC_DisableIRQ(CAN1_RX0_IRQn);
|
||||||
HAL_NVIC_DisableIRQ(CAN1_RX1_IRQn);
|
HAL_NVIC_DisableIRQ(CAN1_RX1_IRQn);
|
||||||
/* USER CODE BEGIN CAN1_MspDeInit 1 */
|
/* USER CODE BEGIN CAN1_MspDeInit 1 */
|
||||||
@@ -216,7 +242,10 @@ void HAL_CAN_MspDeInit(CAN_HandleTypeDef* canHandle)
|
|||||||
HAL_GPIO_DeInit(GPIOB, GPIO_PIN_5|GPIO_PIN_6);
|
HAL_GPIO_DeInit(GPIOB, GPIO_PIN_5|GPIO_PIN_6);
|
||||||
|
|
||||||
/* CAN2 interrupt Deinit */
|
/* CAN2 interrupt Deinit */
|
||||||
|
<<<<<<< HEAD
|
||||||
|
=======
|
||||||
HAL_NVIC_DisableIRQ(CAN2_TX_IRQn);
|
HAL_NVIC_DisableIRQ(CAN2_TX_IRQn);
|
||||||
|
>>>>>>> upper
|
||||||
HAL_NVIC_DisableIRQ(CAN2_RX0_IRQn);
|
HAL_NVIC_DisableIRQ(CAN2_RX0_IRQn);
|
||||||
HAL_NVIC_DisableIRQ(CAN2_RX1_IRQn);
|
HAL_NVIC_DisableIRQ(CAN2_RX1_IRQn);
|
||||||
/* USER CODE BEGIN CAN2_MspDeInit 1 */
|
/* USER CODE BEGIN CAN2_MspDeInit 1 */
|
||||||
@@ -228,3 +257,8 @@ void HAL_CAN_MspDeInit(CAN_HandleTypeDef* canHandle)
|
|||||||
/* USER CODE BEGIN 1 */
|
/* USER CODE BEGIN 1 */
|
||||||
|
|
||||||
/* USER CODE END 1 */
|
/* USER CODE END 1 */
|
||||||
|
<<<<<<< HEAD
|
||||||
|
=======
|
||||||
|
|
||||||
|
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||||
|
>>>>>>> upper
|
||||||
|
|||||||
@@ -1,4 +1,7 @@
|
|||||||
|
<<<<<<< HEAD
|
||||||
/* USER CODE BEGIN Header */
|
/* USER CODE BEGIN Header */
|
||||||
|
=======
|
||||||
|
>>>>>>> upper
|
||||||
/**
|
/**
|
||||||
******************************************************************************
|
******************************************************************************
|
||||||
* @file crc.c
|
* @file crc.c
|
||||||
@@ -7,6 +10,7 @@
|
|||||||
******************************************************************************
|
******************************************************************************
|
||||||
* @attention
|
* @attention
|
||||||
*
|
*
|
||||||
|
<<<<<<< HEAD
|
||||||
* Copyright (c) 2025 STMicroelectronics.
|
* Copyright (c) 2025 STMicroelectronics.
|
||||||
* All rights reserved.
|
* All rights reserved.
|
||||||
*
|
*
|
||||||
@@ -17,6 +21,19 @@
|
|||||||
******************************************************************************
|
******************************************************************************
|
||||||
*/
|
*/
|
||||||
/* USER CODE END Header */
|
/* USER CODE END Header */
|
||||||
|
=======
|
||||||
|
* <h2><center>© Copyright (c) 2025 STMicroelectronics.
|
||||||
|
* All rights reserved.</center></h2>
|
||||||
|
*
|
||||||
|
* This software component is licensed by ST under Ultimate Liberty license
|
||||||
|
* SLA0044, the "License"; You may not use this file except in compliance with
|
||||||
|
* the License. You may obtain a copy of the License at:
|
||||||
|
* www.st.com/SLA0044
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
>>>>>>> upper
|
||||||
/* Includes ------------------------------------------------------------------*/
|
/* Includes ------------------------------------------------------------------*/
|
||||||
#include "crc.h"
|
#include "crc.h"
|
||||||
|
|
||||||
@@ -83,3 +100,8 @@ void HAL_CRC_MspDeInit(CRC_HandleTypeDef* crcHandle)
|
|||||||
/* USER CODE BEGIN 1 */
|
/* USER CODE BEGIN 1 */
|
||||||
|
|
||||||
/* USER CODE END 1 */
|
/* USER CODE END 1 */
|
||||||
|
<<<<<<< HEAD
|
||||||
|
=======
|
||||||
|
|
||||||
|
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||||
|
>>>>>>> upper
|
||||||
|
|||||||
@@ -7,7 +7,7 @@
|
|||||||
******************************************************************************
|
******************************************************************************
|
||||||
* @attention
|
* @attention
|
||||||
*
|
*
|
||||||
* Copyright (c) 2025 STMicroelectronics.
|
* Copyright (c) 2026 STMicroelectronics.
|
||||||
* All rights reserved.
|
* All rights reserved.
|
||||||
*
|
*
|
||||||
* This software is licensed under terms that can be found in the LICENSE file
|
* This software is licensed under terms that can be found in the LICENSE file
|
||||||
@@ -40,37 +40,27 @@ void MX_DMA_Init(void)
|
|||||||
{
|
{
|
||||||
|
|
||||||
/* DMA controller clock enable */
|
/* DMA controller clock enable */
|
||||||
__HAL_RCC_DMA2_CLK_ENABLE();
|
|
||||||
__HAL_RCC_DMA1_CLK_ENABLE();
|
__HAL_RCC_DMA1_CLK_ENABLE();
|
||||||
|
|
||||||
/* DMA interrupt init */
|
/* DMA interrupt init */
|
||||||
|
/* DMA1_Stream0_IRQn interrupt configuration */
|
||||||
|
HAL_NVIC_SetPriority(DMA1_Stream0_IRQn, 5, 0);
|
||||||
|
HAL_NVIC_EnableIRQ(DMA1_Stream0_IRQn);
|
||||||
/* DMA1_Stream1_IRQn interrupt configuration */
|
/* DMA1_Stream1_IRQn interrupt configuration */
|
||||||
HAL_NVIC_SetPriority(DMA1_Stream1_IRQn, 5, 0);
|
HAL_NVIC_SetPriority(DMA1_Stream1_IRQn, 5, 0);
|
||||||
HAL_NVIC_EnableIRQ(DMA1_Stream1_IRQn);
|
HAL_NVIC_EnableIRQ(DMA1_Stream1_IRQn);
|
||||||
/* DMA1_Stream2_IRQn interrupt configuration */
|
/* DMA1_Stream2_IRQn interrupt configuration */
|
||||||
HAL_NVIC_SetPriority(DMA1_Stream2_IRQn, 5, 0);
|
HAL_NVIC_SetPriority(DMA1_Stream2_IRQn, 5, 0);
|
||||||
HAL_NVIC_EnableIRQ(DMA1_Stream2_IRQn);
|
HAL_NVIC_EnableIRQ(DMA1_Stream2_IRQn);
|
||||||
/* DMA1_Stream7_IRQn interrupt configuration */
|
/* DMA1_Stream3_IRQn interrupt configuration */
|
||||||
HAL_NVIC_SetPriority(DMA1_Stream7_IRQn, 5, 0);
|
HAL_NVIC_SetPriority(DMA1_Stream3_IRQn, 5, 0);
|
||||||
HAL_NVIC_EnableIRQ(DMA1_Stream7_IRQn);
|
HAL_NVIC_EnableIRQ(DMA1_Stream3_IRQn);
|
||||||
/* DMA2_Stream1_IRQn interrupt configuration */
|
/* DMA1_Stream4_IRQn interrupt configuration */
|
||||||
HAL_NVIC_SetPriority(DMA2_Stream1_IRQn, 5, 0);
|
HAL_NVIC_SetPriority(DMA1_Stream4_IRQn, 5, 0);
|
||||||
HAL_NVIC_EnableIRQ(DMA2_Stream1_IRQn);
|
HAL_NVIC_EnableIRQ(DMA1_Stream4_IRQn);
|
||||||
/* DMA2_Stream2_IRQn interrupt configuration */
|
/* DMA1_Stream5_IRQn interrupt configuration */
|
||||||
HAL_NVIC_SetPriority(DMA2_Stream2_IRQn, 5, 0);
|
HAL_NVIC_SetPriority(DMA1_Stream5_IRQn, 5, 0);
|
||||||
HAL_NVIC_EnableIRQ(DMA2_Stream2_IRQn);
|
HAL_NVIC_EnableIRQ(DMA1_Stream5_IRQn);
|
||||||
/* DMA2_Stream3_IRQn interrupt configuration */
|
|
||||||
HAL_NVIC_SetPriority(DMA2_Stream3_IRQn, 5, 0);
|
|
||||||
HAL_NVIC_EnableIRQ(DMA2_Stream3_IRQn);
|
|
||||||
/* DMA2_Stream5_IRQn interrupt configuration */
|
|
||||||
HAL_NVIC_SetPriority(DMA2_Stream5_IRQn, 5, 0);
|
|
||||||
HAL_NVIC_EnableIRQ(DMA2_Stream5_IRQn);
|
|
||||||
/* DMA2_Stream6_IRQn interrupt configuration */
|
|
||||||
HAL_NVIC_SetPriority(DMA2_Stream6_IRQn, 5, 0);
|
|
||||||
HAL_NVIC_EnableIRQ(DMA2_Stream6_IRQn);
|
|
||||||
/* DMA2_Stream7_IRQn interrupt configuration */
|
|
||||||
HAL_NVIC_SetPriority(DMA2_Stream7_IRQn, 5, 0);
|
|
||||||
HAL_NVIC_EnableIRQ(DMA2_Stream7_IRQn);
|
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
390
Core/Src/fdcan.c
Normal file
390
Core/Src/fdcan.c
Normal file
@@ -0,0 +1,390 @@
|
|||||||
|
/* USER CODE BEGIN Header */
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file fdcan.c
|
||||||
|
* @brief This file provides code for the configuration
|
||||||
|
* of the FDCAN instances.
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* Copyright (c) 2026 STMicroelectronics.
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* This software is licensed under terms that can be found in the LICENSE file
|
||||||
|
* in the root directory of this software component.
|
||||||
|
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
/* USER CODE END Header */
|
||||||
|
/* Includes ------------------------------------------------------------------*/
|
||||||
|
#include "fdcan.h"
|
||||||
|
|
||||||
|
/* USER CODE BEGIN 0 */
|
||||||
|
|
||||||
|
/* USER CODE END 0 */
|
||||||
|
|
||||||
|
FDCAN_HandleTypeDef hfdcan1;
|
||||||
|
FDCAN_HandleTypeDef hfdcan2;
|
||||||
|
FDCAN_HandleTypeDef hfdcan3;
|
||||||
|
|
||||||
|
/* FDCAN1 init function */
|
||||||
|
void MX_FDCAN1_Init(void)
|
||||||
|
{
|
||||||
|
|
||||||
|
/* USER CODE BEGIN FDCAN1_Init 0 */
|
||||||
|
|
||||||
|
/* USER CODE END FDCAN1_Init 0 */
|
||||||
|
|
||||||
|
/* USER CODE BEGIN FDCAN1_Init 1 */
|
||||||
|
|
||||||
|
/* USER CODE END FDCAN1_Init 1 */
|
||||||
|
hfdcan1.Instance = FDCAN1;
|
||||||
|
hfdcan1.Init.FrameFormat = FDCAN_FRAME_CLASSIC;
|
||||||
|
hfdcan1.Init.Mode = FDCAN_MODE_NORMAL;
|
||||||
|
hfdcan1.Init.AutoRetransmission = ENABLE;
|
||||||
|
hfdcan1.Init.TransmitPause = DISABLE;
|
||||||
|
hfdcan1.Init.ProtocolException = DISABLE;
|
||||||
|
hfdcan1.Init.NominalPrescaler = 24;
|
||||||
|
hfdcan1.Init.NominalSyncJumpWidth = 1;
|
||||||
|
hfdcan1.Init.NominalTimeSeg1 = 3;
|
||||||
|
hfdcan1.Init.NominalTimeSeg2 = 1;
|
||||||
|
hfdcan1.Init.DataPrescaler = 1;
|
||||||
|
hfdcan1.Init.DataSyncJumpWidth = 1;
|
||||||
|
hfdcan1.Init.DataTimeSeg1 = 1;
|
||||||
|
hfdcan1.Init.DataTimeSeg2 = 1;
|
||||||
|
hfdcan1.Init.MessageRAMOffset = 0;
|
||||||
|
hfdcan1.Init.StdFiltersNbr = 1;
|
||||||
|
hfdcan1.Init.ExtFiltersNbr = 0;
|
||||||
|
hfdcan1.Init.RxFifo0ElmtsNbr = 32;
|
||||||
|
hfdcan1.Init.RxFifo0ElmtSize = FDCAN_DATA_BYTES_8;
|
||||||
|
hfdcan1.Init.RxFifo1ElmtsNbr = 0;
|
||||||
|
hfdcan1.Init.RxFifo1ElmtSize = FDCAN_DATA_BYTES_8;
|
||||||
|
hfdcan1.Init.RxBuffersNbr = 0;
|
||||||
|
hfdcan1.Init.RxBufferSize = FDCAN_DATA_BYTES_8;
|
||||||
|
hfdcan1.Init.TxEventsNbr = 0;
|
||||||
|
hfdcan1.Init.TxBuffersNbr = 0;
|
||||||
|
hfdcan1.Init.TxFifoQueueElmtsNbr = 32;
|
||||||
|
hfdcan1.Init.TxFifoQueueMode = FDCAN_TX_FIFO_OPERATION;
|
||||||
|
hfdcan1.Init.TxElmtSize = FDCAN_DATA_BYTES_8;
|
||||||
|
if (HAL_FDCAN_Init(&hfdcan1) != HAL_OK)
|
||||||
|
{
|
||||||
|
Error_Handler();
|
||||||
|
}
|
||||||
|
/* USER CODE BEGIN FDCAN1_Init 2 */
|
||||||
|
|
||||||
|
/* USER CODE END FDCAN1_Init 2 */
|
||||||
|
|
||||||
|
}
|
||||||
|
/* FDCAN2 init function */
|
||||||
|
void MX_FDCAN2_Init(void)
|
||||||
|
{
|
||||||
|
|
||||||
|
/* USER CODE BEGIN FDCAN2_Init 0 */
|
||||||
|
|
||||||
|
/* USER CODE END FDCAN2_Init 0 */
|
||||||
|
|
||||||
|
/* USER CODE BEGIN FDCAN2_Init 1 */
|
||||||
|
|
||||||
|
/* USER CODE END FDCAN2_Init 1 */
|
||||||
|
hfdcan2.Instance = FDCAN2;
|
||||||
|
hfdcan2.Init.FrameFormat = FDCAN_FRAME_CLASSIC;
|
||||||
|
hfdcan2.Init.Mode = FDCAN_MODE_NORMAL;
|
||||||
|
hfdcan2.Init.AutoRetransmission = ENABLE;
|
||||||
|
hfdcan2.Init.TransmitPause = DISABLE;
|
||||||
|
hfdcan2.Init.ProtocolException = DISABLE;
|
||||||
|
hfdcan2.Init.NominalPrescaler = 24;
|
||||||
|
hfdcan2.Init.NominalSyncJumpWidth = 1;
|
||||||
|
hfdcan2.Init.NominalTimeSeg1 = 3;
|
||||||
|
hfdcan2.Init.NominalTimeSeg2 = 1;
|
||||||
|
hfdcan2.Init.DataPrescaler = 1;
|
||||||
|
hfdcan2.Init.DataSyncJumpWidth = 1;
|
||||||
|
hfdcan2.Init.DataTimeSeg1 = 1;
|
||||||
|
hfdcan2.Init.DataTimeSeg2 = 1;
|
||||||
|
hfdcan2.Init.MessageRAMOffset = 0x406;
|
||||||
|
hfdcan2.Init.StdFiltersNbr = 1;
|
||||||
|
hfdcan2.Init.ExtFiltersNbr = 0;
|
||||||
|
hfdcan2.Init.RxFifo0ElmtsNbr = 32;
|
||||||
|
hfdcan2.Init.RxFifo0ElmtSize = FDCAN_DATA_BYTES_8;
|
||||||
|
hfdcan2.Init.RxFifo1ElmtsNbr = 32;
|
||||||
|
hfdcan2.Init.RxFifo1ElmtSize = FDCAN_DATA_BYTES_8;
|
||||||
|
hfdcan2.Init.RxBuffersNbr = 0;
|
||||||
|
hfdcan2.Init.RxBufferSize = FDCAN_DATA_BYTES_8;
|
||||||
|
hfdcan2.Init.TxEventsNbr = 0;
|
||||||
|
hfdcan2.Init.TxBuffersNbr = 0;
|
||||||
|
hfdcan2.Init.TxFifoQueueElmtsNbr = 32;
|
||||||
|
hfdcan2.Init.TxFifoQueueMode = FDCAN_TX_FIFO_OPERATION;
|
||||||
|
hfdcan2.Init.TxElmtSize = FDCAN_DATA_BYTES_8;
|
||||||
|
if (HAL_FDCAN_Init(&hfdcan2) != HAL_OK)
|
||||||
|
{
|
||||||
|
Error_Handler();
|
||||||
|
}
|
||||||
|
/* USER CODE BEGIN FDCAN2_Init 2 */
|
||||||
|
|
||||||
|
/* USER CODE END FDCAN2_Init 2 */
|
||||||
|
|
||||||
|
}
|
||||||
|
/* FDCAN3 init function */
|
||||||
|
void MX_FDCAN3_Init(void)
|
||||||
|
{
|
||||||
|
|
||||||
|
/* USER CODE BEGIN FDCAN3_Init 0 */
|
||||||
|
|
||||||
|
/* USER CODE END FDCAN3_Init 0 */
|
||||||
|
|
||||||
|
/* USER CODE BEGIN FDCAN3_Init 1 */
|
||||||
|
|
||||||
|
/* USER CODE END FDCAN3_Init 1 */
|
||||||
|
hfdcan3.Instance = FDCAN3;
|
||||||
|
hfdcan3.Init.FrameFormat = FDCAN_FRAME_CLASSIC;
|
||||||
|
hfdcan3.Init.Mode = FDCAN_MODE_NORMAL;
|
||||||
|
hfdcan3.Init.AutoRetransmission = ENABLE;
|
||||||
|
hfdcan3.Init.TransmitPause = DISABLE;
|
||||||
|
hfdcan3.Init.ProtocolException = DISABLE;
|
||||||
|
hfdcan3.Init.NominalPrescaler = 24;
|
||||||
|
hfdcan3.Init.NominalSyncJumpWidth = 1;
|
||||||
|
hfdcan3.Init.NominalTimeSeg1 = 3;
|
||||||
|
hfdcan3.Init.NominalTimeSeg2 = 1;
|
||||||
|
hfdcan3.Init.DataPrescaler = 1;
|
||||||
|
hfdcan3.Init.DataSyncJumpWidth = 1;
|
||||||
|
hfdcan3.Init.DataTimeSeg1 = 1;
|
||||||
|
hfdcan3.Init.DataTimeSeg2 = 1;
|
||||||
|
hfdcan3.Init.MessageRAMOffset = 0x812;
|
||||||
|
hfdcan3.Init.StdFiltersNbr = 1;
|
||||||
|
hfdcan3.Init.ExtFiltersNbr = 1;
|
||||||
|
hfdcan3.Init.RxFifo0ElmtsNbr = 32;
|
||||||
|
hfdcan3.Init.RxFifo0ElmtSize = FDCAN_DATA_BYTES_8;
|
||||||
|
hfdcan3.Init.RxFifo1ElmtsNbr = 32;
|
||||||
|
hfdcan3.Init.RxFifo1ElmtSize = FDCAN_DATA_BYTES_8;
|
||||||
|
hfdcan3.Init.RxBuffersNbr = 0;
|
||||||
|
hfdcan3.Init.RxBufferSize = FDCAN_DATA_BYTES_8;
|
||||||
|
hfdcan3.Init.TxEventsNbr = 0;
|
||||||
|
hfdcan3.Init.TxBuffersNbr = 0;
|
||||||
|
hfdcan3.Init.TxFifoQueueElmtsNbr = 32;
|
||||||
|
hfdcan3.Init.TxFifoQueueMode = FDCAN_TX_FIFO_OPERATION;
|
||||||
|
hfdcan3.Init.TxElmtSize = FDCAN_DATA_BYTES_8;
|
||||||
|
if (HAL_FDCAN_Init(&hfdcan3) != HAL_OK)
|
||||||
|
{
|
||||||
|
Error_Handler();
|
||||||
|
}
|
||||||
|
/* USER CODE BEGIN FDCAN3_Init 2 */
|
||||||
|
|
||||||
|
/* USER CODE END FDCAN3_Init 2 */
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
static uint32_t HAL_RCC_FDCAN_CLK_ENABLED=0;
|
||||||
|
|
||||||
|
void HAL_FDCAN_MspInit(FDCAN_HandleTypeDef* fdcanHandle)
|
||||||
|
{
|
||||||
|
|
||||||
|
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
||||||
|
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
|
||||||
|
if(fdcanHandle->Instance==FDCAN1)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN FDCAN1_MspInit 0 */
|
||||||
|
|
||||||
|
/* USER CODE END FDCAN1_MspInit 0 */
|
||||||
|
|
||||||
|
/** Initializes the peripherals clock
|
||||||
|
*/
|
||||||
|
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_FDCAN;
|
||||||
|
PeriphClkInitStruct.FdcanClockSelection = RCC_FDCANCLKSOURCE_PLL;
|
||||||
|
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
|
||||||
|
{
|
||||||
|
Error_Handler();
|
||||||
|
}
|
||||||
|
|
||||||
|
/* FDCAN1 clock enable */
|
||||||
|
HAL_RCC_FDCAN_CLK_ENABLED++;
|
||||||
|
if(HAL_RCC_FDCAN_CLK_ENABLED==1){
|
||||||
|
__HAL_RCC_FDCAN_CLK_ENABLE();
|
||||||
|
}
|
||||||
|
|
||||||
|
__HAL_RCC_GPIOD_CLK_ENABLE();
|
||||||
|
/**FDCAN1 GPIO Configuration
|
||||||
|
PD0 ------> FDCAN1_RX
|
||||||
|
PD1 ------> FDCAN1_TX
|
||||||
|
*/
|
||||||
|
GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1;
|
||||||
|
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||||
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||||
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||||
|
GPIO_InitStruct.Alternate = GPIO_AF9_FDCAN1;
|
||||||
|
HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
|
||||||
|
|
||||||
|
/* FDCAN1 interrupt Init */
|
||||||
|
HAL_NVIC_SetPriority(FDCAN1_IT0_IRQn, 5, 0);
|
||||||
|
HAL_NVIC_EnableIRQ(FDCAN1_IT0_IRQn);
|
||||||
|
HAL_NVIC_SetPriority(FDCAN1_IT1_IRQn, 5, 0);
|
||||||
|
HAL_NVIC_EnableIRQ(FDCAN1_IT1_IRQn);
|
||||||
|
/* USER CODE BEGIN FDCAN1_MspInit 1 */
|
||||||
|
|
||||||
|
/* USER CODE END FDCAN1_MspInit 1 */
|
||||||
|
}
|
||||||
|
else if(fdcanHandle->Instance==FDCAN2)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN FDCAN2_MspInit 0 */
|
||||||
|
|
||||||
|
/* USER CODE END FDCAN2_MspInit 0 */
|
||||||
|
|
||||||
|
/** Initializes the peripherals clock
|
||||||
|
*/
|
||||||
|
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_FDCAN;
|
||||||
|
PeriphClkInitStruct.FdcanClockSelection = RCC_FDCANCLKSOURCE_PLL;
|
||||||
|
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
|
||||||
|
{
|
||||||
|
Error_Handler();
|
||||||
|
}
|
||||||
|
|
||||||
|
/* FDCAN2 clock enable */
|
||||||
|
HAL_RCC_FDCAN_CLK_ENABLED++;
|
||||||
|
if(HAL_RCC_FDCAN_CLK_ENABLED==1){
|
||||||
|
__HAL_RCC_FDCAN_CLK_ENABLE();
|
||||||
|
}
|
||||||
|
|
||||||
|
__HAL_RCC_GPIOB_CLK_ENABLE();
|
||||||
|
/**FDCAN2 GPIO Configuration
|
||||||
|
PB5 ------> FDCAN2_RX
|
||||||
|
PB6 ------> FDCAN2_TX
|
||||||
|
*/
|
||||||
|
GPIO_InitStruct.Pin = GPIO_PIN_5|GPIO_PIN_6;
|
||||||
|
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||||
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||||
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||||
|
GPIO_InitStruct.Alternate = GPIO_AF9_FDCAN2;
|
||||||
|
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
||||||
|
|
||||||
|
/* FDCAN2 interrupt Init */
|
||||||
|
HAL_NVIC_SetPriority(FDCAN2_IT0_IRQn, 5, 0);
|
||||||
|
HAL_NVIC_EnableIRQ(FDCAN2_IT0_IRQn);
|
||||||
|
HAL_NVIC_SetPriority(FDCAN2_IT1_IRQn, 5, 0);
|
||||||
|
HAL_NVIC_EnableIRQ(FDCAN2_IT1_IRQn);
|
||||||
|
/* USER CODE BEGIN FDCAN2_MspInit 1 */
|
||||||
|
|
||||||
|
/* USER CODE END FDCAN2_MspInit 1 */
|
||||||
|
}
|
||||||
|
else if(fdcanHandle->Instance==FDCAN3)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN FDCAN3_MspInit 0 */
|
||||||
|
|
||||||
|
/* USER CODE END FDCAN3_MspInit 0 */
|
||||||
|
|
||||||
|
/** Initializes the peripherals clock
|
||||||
|
*/
|
||||||
|
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_FDCAN;
|
||||||
|
PeriphClkInitStruct.FdcanClockSelection = RCC_FDCANCLKSOURCE_PLL;
|
||||||
|
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
|
||||||
|
{
|
||||||
|
Error_Handler();
|
||||||
|
}
|
||||||
|
|
||||||
|
/* FDCAN3 clock enable */
|
||||||
|
HAL_RCC_FDCAN_CLK_ENABLED++;
|
||||||
|
if(HAL_RCC_FDCAN_CLK_ENABLED==1){
|
||||||
|
__HAL_RCC_FDCAN_CLK_ENABLE();
|
||||||
|
}
|
||||||
|
|
||||||
|
__HAL_RCC_GPIOD_CLK_ENABLE();
|
||||||
|
/**FDCAN3 GPIO Configuration
|
||||||
|
PD12 ------> FDCAN3_RX
|
||||||
|
PD13 ------> FDCAN3_TX
|
||||||
|
*/
|
||||||
|
GPIO_InitStruct.Pin = GPIO_PIN_12|GPIO_PIN_13;
|
||||||
|
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||||
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||||
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||||
|
GPIO_InitStruct.Alternate = GPIO_AF5_FDCAN3;
|
||||||
|
HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
|
||||||
|
|
||||||
|
/* FDCAN3 interrupt Init */
|
||||||
|
HAL_NVIC_SetPriority(FDCAN3_IT0_IRQn, 5, 0);
|
||||||
|
HAL_NVIC_EnableIRQ(FDCAN3_IT0_IRQn);
|
||||||
|
HAL_NVIC_SetPriority(FDCAN3_IT1_IRQn, 5, 0);
|
||||||
|
HAL_NVIC_EnableIRQ(FDCAN3_IT1_IRQn);
|
||||||
|
/* USER CODE BEGIN FDCAN3_MspInit 1 */
|
||||||
|
|
||||||
|
/* USER CODE END FDCAN3_MspInit 1 */
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
void HAL_FDCAN_MspDeInit(FDCAN_HandleTypeDef* fdcanHandle)
|
||||||
|
{
|
||||||
|
|
||||||
|
if(fdcanHandle->Instance==FDCAN1)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN FDCAN1_MspDeInit 0 */
|
||||||
|
|
||||||
|
/* USER CODE END FDCAN1_MspDeInit 0 */
|
||||||
|
/* Peripheral clock disable */
|
||||||
|
HAL_RCC_FDCAN_CLK_ENABLED--;
|
||||||
|
if(HAL_RCC_FDCAN_CLK_ENABLED==0){
|
||||||
|
__HAL_RCC_FDCAN_CLK_DISABLE();
|
||||||
|
}
|
||||||
|
|
||||||
|
/**FDCAN1 GPIO Configuration
|
||||||
|
PD0 ------> FDCAN1_RX
|
||||||
|
PD1 ------> FDCAN1_TX
|
||||||
|
*/
|
||||||
|
HAL_GPIO_DeInit(GPIOD, GPIO_PIN_0|GPIO_PIN_1);
|
||||||
|
|
||||||
|
/* FDCAN1 interrupt Deinit */
|
||||||
|
HAL_NVIC_DisableIRQ(FDCAN1_IT0_IRQn);
|
||||||
|
HAL_NVIC_DisableIRQ(FDCAN1_IT1_IRQn);
|
||||||
|
/* USER CODE BEGIN FDCAN1_MspDeInit 1 */
|
||||||
|
|
||||||
|
/* USER CODE END FDCAN1_MspDeInit 1 */
|
||||||
|
}
|
||||||
|
else if(fdcanHandle->Instance==FDCAN2)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN FDCAN2_MspDeInit 0 */
|
||||||
|
|
||||||
|
/* USER CODE END FDCAN2_MspDeInit 0 */
|
||||||
|
/* Peripheral clock disable */
|
||||||
|
HAL_RCC_FDCAN_CLK_ENABLED--;
|
||||||
|
if(HAL_RCC_FDCAN_CLK_ENABLED==0){
|
||||||
|
__HAL_RCC_FDCAN_CLK_DISABLE();
|
||||||
|
}
|
||||||
|
|
||||||
|
/**FDCAN2 GPIO Configuration
|
||||||
|
PB5 ------> FDCAN2_RX
|
||||||
|
PB6 ------> FDCAN2_TX
|
||||||
|
*/
|
||||||
|
HAL_GPIO_DeInit(GPIOB, GPIO_PIN_5|GPIO_PIN_6);
|
||||||
|
|
||||||
|
/* FDCAN2 interrupt Deinit */
|
||||||
|
HAL_NVIC_DisableIRQ(FDCAN2_IT0_IRQn);
|
||||||
|
HAL_NVIC_DisableIRQ(FDCAN2_IT1_IRQn);
|
||||||
|
/* USER CODE BEGIN FDCAN2_MspDeInit 1 */
|
||||||
|
|
||||||
|
/* USER CODE END FDCAN2_MspDeInit 1 */
|
||||||
|
}
|
||||||
|
else if(fdcanHandle->Instance==FDCAN3)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN FDCAN3_MspDeInit 0 */
|
||||||
|
|
||||||
|
/* USER CODE END FDCAN3_MspDeInit 0 */
|
||||||
|
/* Peripheral clock disable */
|
||||||
|
HAL_RCC_FDCAN_CLK_ENABLED--;
|
||||||
|
if(HAL_RCC_FDCAN_CLK_ENABLED==0){
|
||||||
|
__HAL_RCC_FDCAN_CLK_DISABLE();
|
||||||
|
}
|
||||||
|
|
||||||
|
/**FDCAN3 GPIO Configuration
|
||||||
|
PD12 ------> FDCAN3_RX
|
||||||
|
PD13 ------> FDCAN3_TX
|
||||||
|
*/
|
||||||
|
HAL_GPIO_DeInit(GPIOD, GPIO_PIN_12|GPIO_PIN_13);
|
||||||
|
|
||||||
|
/* FDCAN3 interrupt Deinit */
|
||||||
|
HAL_NVIC_DisableIRQ(FDCAN3_IT0_IRQn);
|
||||||
|
HAL_NVIC_DisableIRQ(FDCAN3_IT1_IRQn);
|
||||||
|
/* USER CODE BEGIN FDCAN3_MspDeInit 1 */
|
||||||
|
|
||||||
|
/* USER CODE END FDCAN3_MspDeInit 1 */
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/* USER CODE BEGIN 1 */
|
||||||
|
|
||||||
|
/* USER CODE END 1 */
|
||||||
@@ -6,13 +6,12 @@
|
|||||||
******************************************************************************
|
******************************************************************************
|
||||||
* @attention
|
* @attention
|
||||||
*
|
*
|
||||||
* <h2><center>© Copyright (c) 2025 STMicroelectronics.
|
* Copyright (c) 2026 STMicroelectronics.
|
||||||
* All rights reserved.</center></h2>
|
* All rights reserved.
|
||||||
*
|
*
|
||||||
* This software component is licensed by ST under Ultimate Liberty license
|
* This software is licensed under terms that can be found in the LICENSE file
|
||||||
* SLA0044, the "License"; You may not use this file except in compliance with
|
* in the root directory of this software component.
|
||||||
* the License. You may obtain a copy of the License at:
|
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||||
* www.st.com/SLA0044
|
|
||||||
*
|
*
|
||||||
******************************************************************************
|
******************************************************************************
|
||||||
*/
|
*/
|
||||||
@@ -47,7 +46,7 @@
|
|||||||
|
|
||||||
/* Private variables ---------------------------------------------------------*/
|
/* Private variables ---------------------------------------------------------*/
|
||||||
/* USER CODE BEGIN Variables */
|
/* USER CODE BEGIN Variables */
|
||||||
uint8_t ucHeap[configTOTAL_HEAP_SIZE] __attribute__((section(".ccmram")));
|
|
||||||
/* USER CODE END Variables */
|
/* USER CODE END Variables */
|
||||||
/* Definitions for defaultTask */
|
/* Definitions for defaultTask */
|
||||||
osThreadId_t defaultTaskHandle;
|
osThreadId_t defaultTaskHandle;
|
||||||
@@ -64,13 +63,11 @@ const osThreadAttr_t defaultTask_attributes = {
|
|||||||
|
|
||||||
void StartDefaultTask(void *argument);
|
void StartDefaultTask(void *argument);
|
||||||
|
|
||||||
extern void MX_USB_DEVICE_Init(void);
|
|
||||||
void MX_FREERTOS_Init(void); /* (MISRA C 2004 rule 8.1) */
|
void MX_FREERTOS_Init(void); /* (MISRA C 2004 rule 8.1) */
|
||||||
|
|
||||||
/* Hook prototypes */
|
/* Hook prototypes */
|
||||||
void configureTimerForRunTimeStats(void);
|
void configureTimerForRunTimeStats(void);
|
||||||
unsigned long getRunTimeCounterValue(void);
|
unsigned long getRunTimeCounterValue(void);
|
||||||
void vApplicationStackOverflowHook(TaskHandle_t xTask, signed char *pcTaskName);
|
|
||||||
|
|
||||||
/* USER CODE BEGIN 1 */
|
/* USER CODE BEGIN 1 */
|
||||||
/* Functions needed when configGENERATE_RUN_TIME_STATS is on */
|
/* Functions needed when configGENERATE_RUN_TIME_STATS is on */
|
||||||
@@ -85,15 +82,6 @@ return 0;
|
|||||||
}
|
}
|
||||||
/* USER CODE END 1 */
|
/* USER CODE END 1 */
|
||||||
|
|
||||||
/* USER CODE BEGIN 4 */
|
|
||||||
void vApplicationStackOverflowHook(TaskHandle_t xTask, signed char *pcTaskName)
|
|
||||||
{
|
|
||||||
/* Run time stack overflow checking is performed if
|
|
||||||
configCHECK_FOR_STACK_OVERFLOW is defined to 1 or 2. This hook function is
|
|
||||||
called if a stack overflow is detected. */
|
|
||||||
}
|
|
||||||
/* USER CODE END 4 */
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief FreeRTOS initialization
|
* @brief FreeRTOS initialization
|
||||||
* @param None
|
* @param None
|
||||||
@@ -144,8 +132,6 @@ void MX_FREERTOS_Init(void) {
|
|||||||
/* USER CODE END Header_StartDefaultTask */
|
/* USER CODE END Header_StartDefaultTask */
|
||||||
void StartDefaultTask(void *argument)
|
void StartDefaultTask(void *argument)
|
||||||
{
|
{
|
||||||
/* init code for USB_DEVICE */
|
|
||||||
MX_USB_DEVICE_Init();
|
|
||||||
/* USER CODE BEGIN StartDefaultTask */
|
/* USER CODE BEGIN StartDefaultTask */
|
||||||
osThreadTerminate(osThreadGetId());
|
osThreadTerminate(osThreadGetId());
|
||||||
/* USER CODE END StartDefaultTask */
|
/* USER CODE END StartDefaultTask */
|
||||||
|
|||||||
128
Core/Src/gpio.c
128
Core/Src/gpio.c
@@ -7,7 +7,7 @@
|
|||||||
******************************************************************************
|
******************************************************************************
|
||||||
* @attention
|
* @attention
|
||||||
*
|
*
|
||||||
* Copyright (c) 2025 STMicroelectronics.
|
* Copyright (c) 2026 STMicroelectronics.
|
||||||
* All rights reserved.
|
* All rights reserved.
|
||||||
*
|
*
|
||||||
* This software is licensed under terms that can be found in the LICENSE file
|
* This software is licensed under terms that can be found in the LICENSE file
|
||||||
@@ -38,6 +38,7 @@
|
|||||||
* Output
|
* Output
|
||||||
* EVENT_OUT
|
* EVENT_OUT
|
||||||
* EXTI
|
* EXTI
|
||||||
|
PA8 ------> RCC_MCO_1
|
||||||
*/
|
*/
|
||||||
void MX_GPIO_Init(void)
|
void MX_GPIO_Init(void)
|
||||||
{
|
{
|
||||||
@@ -45,82 +46,97 @@ void MX_GPIO_Init(void)
|
|||||||
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
||||||
|
|
||||||
/* GPIO Ports Clock Enable */
|
/* GPIO Ports Clock Enable */
|
||||||
__HAL_RCC_GPIOB_CLK_ENABLE();
|
|
||||||
__HAL_RCC_GPIOG_CLK_ENABLE();
|
|
||||||
__HAL_RCC_GPIOA_CLK_ENABLE();
|
|
||||||
__HAL_RCC_GPIOD_CLK_ENABLE();
|
|
||||||
__HAL_RCC_GPIOC_CLK_ENABLE();
|
|
||||||
__HAL_RCC_GPIOI_CLK_ENABLE();
|
|
||||||
__HAL_RCC_GPIOF_CLK_ENABLE();
|
|
||||||
__HAL_RCC_GPIOH_CLK_ENABLE();
|
|
||||||
__HAL_RCC_GPIOE_CLK_ENABLE();
|
__HAL_RCC_GPIOE_CLK_ENABLE();
|
||||||
|
__HAL_RCC_GPIOC_CLK_ENABLE();
|
||||||
|
__HAL_RCC_GPIOH_CLK_ENABLE();
|
||||||
|
__HAL_RCC_GPIOA_CLK_ENABLE();
|
||||||
|
__HAL_RCC_GPIOB_CLK_ENABLE();
|
||||||
|
__HAL_RCC_GPIOD_CLK_ENABLE();
|
||||||
|
|
||||||
/*Configure GPIO pin Output Level */
|
/*Configure GPIO pin Output Level */
|
||||||
HAL_GPIO_WritePin(CMPS_RST_GPIO_Port, CMPS_RST_Pin, GPIO_PIN_RESET);
|
HAL_GPIO_WritePin(GPIOC, POWER_24V_2_Pin|POWER_24V_1_Pin|POWER_5V_Pin|ACCL_CS_Pin
|
||||||
|
|GYRO_CS_Pin|DCMI_PWDN_Pin, GPIO_PIN_SET);
|
||||||
|
|
||||||
/*Configure GPIO pin Output Level */
|
/*Configure GPIO pin Output Level */
|
||||||
HAL_GPIO_WritePin(ACCL_CS_GPIO_Port, ACCL_CS_Pin, GPIO_PIN_SET);
|
HAL_GPIO_WritePin(LCD_CS_GPIO_Port, LCD_CS_Pin, GPIO_PIN_RESET);
|
||||||
|
|
||||||
/*Configure GPIO pin Output Level */
|
/*Configure GPIO pin Output Level */
|
||||||
HAL_GPIO_WritePin(GPIOB, SPI2_CS_Pin|GYRO_CS_Pin, GPIO_PIN_SET);
|
HAL_GPIO_WritePin(GPIOB, LCD_BLK_Pin|LCD_RES_Pin, GPIO_PIN_RESET);
|
||||||
|
|
||||||
/*Configure GPIO pin : CMPS_RST_Pin */
|
/*Configure GPIO pin Output Level */
|
||||||
GPIO_InitStruct.Pin = CMPS_RST_Pin;
|
HAL_GPIO_WritePin(DCMI_REST_GPIO_Port, DCMI_REST_Pin, GPIO_PIN_SET);
|
||||||
|
|
||||||
|
/*Configure GPIO pin Output Level */
|
||||||
|
HAL_GPIO_WritePin(LCD_DC_GPIO_Port, LCD_DC_Pin, GPIO_PIN_RESET);
|
||||||
|
|
||||||
|
/*Configure GPIO pins : POWER_24V_2_Pin POWER_24V_1_Pin POWER_5V_Pin */
|
||||||
|
GPIO_InitStruct.Pin = POWER_24V_2_Pin|POWER_24V_1_Pin|POWER_5V_Pin;
|
||||||
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
|
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
|
||||||
GPIO_InitStruct.Pull = GPIO_PULLUP;
|
|
||||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_MEDIUM;
|
|
||||||
HAL_GPIO_Init(CMPS_RST_GPIO_Port, &GPIO_InitStruct);
|
|
||||||
|
|
||||||
/*Configure GPIO pin : CMPS_INT_Pin */
|
|
||||||
GPIO_InitStruct.Pin = CMPS_INT_Pin;
|
|
||||||
GPIO_InitStruct.Mode = GPIO_MODE_IT_FALLING;
|
|
||||||
GPIO_InitStruct.Pull = GPIO_PULLUP;
|
|
||||||
HAL_GPIO_Init(CMPS_INT_GPIO_Port, &GPIO_InitStruct);
|
|
||||||
|
|
||||||
/*Configure GPIO pins : HW0_Pin HW1_Pin HW2_Pin */
|
|
||||||
GPIO_InitStruct.Pin = HW0_Pin|HW1_Pin|HW2_Pin;
|
|
||||||
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
|
|
||||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||||
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||||
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
|
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
|
||||||
|
|
||||||
/*Configure GPIO pin : USER_KEY_Pin */
|
/*Configure GPIO pins : ACCL_CS_Pin GYRO_CS_Pin DCMI_PWDN_Pin */
|
||||||
GPIO_InitStruct.Pin = USER_KEY_Pin;
|
GPIO_InitStruct.Pin = ACCL_CS_Pin|GYRO_CS_Pin|DCMI_PWDN_Pin;
|
||||||
GPIO_InitStruct.Mode = GPIO_MODE_IT_FALLING;
|
|
||||||
GPIO_InitStruct.Pull = GPIO_PULLUP;
|
|
||||||
HAL_GPIO_Init(USER_KEY_GPIO_Port, &GPIO_InitStruct);
|
|
||||||
|
|
||||||
/*Configure GPIO pin : ACCL_CS_Pin */
|
|
||||||
GPIO_InitStruct.Pin = ACCL_CS_Pin;
|
|
||||||
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
|
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
|
||||||
GPIO_InitStruct.Pull = GPIO_PULLUP;
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_MEDIUM;
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||||
HAL_GPIO_Init(ACCL_CS_GPIO_Port, &GPIO_InitStruct);
|
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
|
||||||
|
|
||||||
/*Configure GPIO pins : ACCL_INT_Pin GYRO_INT_Pin */
|
/*Configure GPIO pins : ACCL_INT_Pin GYRO_INT_Pin */
|
||||||
GPIO_InitStruct.Pin = ACCL_INT_Pin|GYRO_INT_Pin;
|
GPIO_InitStruct.Pin = ACCL_INT_Pin|GYRO_INT_Pin;
|
||||||
GPIO_InitStruct.Mode = GPIO_MODE_IT_FALLING;
|
GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING;
|
||||||
GPIO_InitStruct.Pull = GPIO_PULLUP;
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||||
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
|
HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
|
||||||
|
|
||||||
/*Configure GPIO pins : SPI2_CS_Pin GYRO_CS_Pin */
|
/*Configure GPIO pin : LCD_CS_Pin */
|
||||||
GPIO_InitStruct.Pin = SPI2_CS_Pin|GYRO_CS_Pin;
|
GPIO_InitStruct.Pin = LCD_CS_Pin;
|
||||||
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
|
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
|
||||||
GPIO_InitStruct.Pull = GPIO_PULLUP;
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_MEDIUM;
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||||
|
HAL_GPIO_Init(LCD_CS_GPIO_Port, &GPIO_InitStruct);
|
||||||
|
|
||||||
|
/*Configure GPIO pins : LCD_BLK_Pin LCD_RES_Pin */
|
||||||
|
GPIO_InitStruct.Pin = LCD_BLK_Pin|LCD_RES_Pin;
|
||||||
|
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
|
||||||
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||||
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||||
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
||||||
|
|
||||||
|
/*Configure GPIO pin : DCMI_REST_Pin */
|
||||||
|
GPIO_InitStruct.Pin = DCMI_REST_Pin;
|
||||||
|
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
|
||||||
|
GPIO_InitStruct.Pull = GPIO_PULLUP;
|
||||||
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||||
|
HAL_GPIO_Init(DCMI_REST_GPIO_Port, &GPIO_InitStruct);
|
||||||
|
|
||||||
|
/*Configure GPIO pin : LCD_DC_Pin */
|
||||||
|
GPIO_InitStruct.Pin = LCD_DC_Pin;
|
||||||
|
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
|
||||||
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||||
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||||
|
HAL_GPIO_Init(LCD_DC_GPIO_Port, &GPIO_InitStruct);
|
||||||
|
|
||||||
|
/*Configure GPIO pin : PA8 */
|
||||||
|
GPIO_InitStruct.Pin = GPIO_PIN_8;
|
||||||
|
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||||
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||||
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||||
|
GPIO_InitStruct.Alternate = GPIO_AF0_MCO;
|
||||||
|
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||||
|
|
||||||
|
/*Configure GPIO pin : PA15 */
|
||||||
|
GPIO_InitStruct.Pin = GPIO_PIN_15;
|
||||||
|
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
|
||||||
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||||
|
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||||
|
|
||||||
|
/*AnalogSwitch Config */
|
||||||
|
HAL_SYSCFG_AnalogSwitchConfig(SYSCFG_SWITCH_PC3, SYSCFG_SWITCH_PC3_CLOSE);
|
||||||
|
|
||||||
/* EXTI interrupt init*/
|
/* EXTI interrupt init*/
|
||||||
HAL_NVIC_SetPriority(EXTI0_IRQn, 5, 0);
|
HAL_NVIC_SetPriority(EXTI15_10_IRQn, 5, 0);
|
||||||
HAL_NVIC_EnableIRQ(EXTI0_IRQn);
|
HAL_NVIC_EnableIRQ(EXTI15_10_IRQn);
|
||||||
|
|
||||||
HAL_NVIC_SetPriority(EXTI3_IRQn, 5, 0);
|
|
||||||
HAL_NVIC_EnableIRQ(EXTI3_IRQn);
|
|
||||||
|
|
||||||
HAL_NVIC_SetPriority(EXTI4_IRQn, 5, 0);
|
|
||||||
HAL_NVIC_EnableIRQ(EXTI4_IRQn);
|
|
||||||
|
|
||||||
HAL_NVIC_SetPriority(EXTI9_5_IRQn, 5, 0);
|
|
||||||
HAL_NVIC_EnableIRQ(EXTI9_5_IRQn);
|
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@@ -1,4 +1,7 @@
|
|||||||
|
<<<<<<< HEAD
|
||||||
/* USER CODE BEGIN Header */
|
/* USER CODE BEGIN Header */
|
||||||
|
=======
|
||||||
|
>>>>>>> upper
|
||||||
/**
|
/**
|
||||||
******************************************************************************
|
******************************************************************************
|
||||||
* @file i2c.c
|
* @file i2c.c
|
||||||
@@ -7,6 +10,7 @@
|
|||||||
******************************************************************************
|
******************************************************************************
|
||||||
* @attention
|
* @attention
|
||||||
*
|
*
|
||||||
|
<<<<<<< HEAD
|
||||||
* Copyright (c) 2025 STMicroelectronics.
|
* Copyright (c) 2025 STMicroelectronics.
|
||||||
* All rights reserved.
|
* All rights reserved.
|
||||||
*
|
*
|
||||||
@@ -17,6 +21,19 @@
|
|||||||
******************************************************************************
|
******************************************************************************
|
||||||
*/
|
*/
|
||||||
/* USER CODE END Header */
|
/* USER CODE END Header */
|
||||||
|
=======
|
||||||
|
* <h2><center>© Copyright (c) 2025 STMicroelectronics.
|
||||||
|
* All rights reserved.</center></h2>
|
||||||
|
*
|
||||||
|
* This software component is licensed by ST under Ultimate Liberty license
|
||||||
|
* SLA0044, the "License"; You may not use this file except in compliance with
|
||||||
|
* the License. You may obtain a copy of the License at:
|
||||||
|
* www.st.com/SLA0044
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
>>>>>>> upper
|
||||||
/* Includes ------------------------------------------------------------------*/
|
/* Includes ------------------------------------------------------------------*/
|
||||||
#include "i2c.h"
|
#include "i2c.h"
|
||||||
|
|
||||||
@@ -316,3 +333,8 @@ void HAL_I2C_MspDeInit(I2C_HandleTypeDef* i2cHandle)
|
|||||||
/* USER CODE BEGIN 1 */
|
/* USER CODE BEGIN 1 */
|
||||||
|
|
||||||
/* USER CODE END 1 */
|
/* USER CODE END 1 */
|
||||||
|
<<<<<<< HEAD
|
||||||
|
=======
|
||||||
|
|
||||||
|
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||||
|
>>>>>>> upper
|
||||||
|
|||||||
146
Core/Src/main.c
146
Core/Src/main.c
@@ -6,13 +6,12 @@
|
|||||||
******************************************************************************
|
******************************************************************************
|
||||||
* @attention
|
* @attention
|
||||||
*
|
*
|
||||||
* <h2><center>© Copyright (c) 2025 STMicroelectronics.
|
* Copyright (c) 2026 STMicroelectronics.
|
||||||
* All rights reserved.</center></h2>
|
* All rights reserved.
|
||||||
*
|
*
|
||||||
* This software component is licensed by ST under Ultimate Liberty license
|
* This software is licensed under terms that can be found in the LICENSE file
|
||||||
* SLA0044, the "License"; You may not use this file except in compliance with
|
* in the root directory of this software component.
|
||||||
* the License. You may obtain a copy of the License at:
|
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||||
* www.st.com/SLA0044
|
|
||||||
*
|
*
|
||||||
******************************************************************************
|
******************************************************************************
|
||||||
*/
|
*/
|
||||||
@@ -21,15 +20,14 @@
|
|||||||
#include "main.h"
|
#include "main.h"
|
||||||
#include "cmsis_os.h"
|
#include "cmsis_os.h"
|
||||||
#include "adc.h"
|
#include "adc.h"
|
||||||
#include "can.h"
|
#include "bdma.h"
|
||||||
#include "crc.h"
|
|
||||||
#include "dma.h"
|
#include "dma.h"
|
||||||
#include "i2c.h"
|
#include "fdcan.h"
|
||||||
#include "rng.h"
|
#include "octospi.h"
|
||||||
#include "spi.h"
|
#include "spi.h"
|
||||||
#include "tim.h"
|
#include "tim.h"
|
||||||
#include "usart.h"
|
#include "usart.h"
|
||||||
#include "usb_device.h"
|
#include "usb_otg.h"
|
||||||
#include "gpio.h"
|
#include "gpio.h"
|
||||||
|
|
||||||
/* Private includes ----------------------------------------------------------*/
|
/* Private includes ----------------------------------------------------------*/
|
||||||
@@ -44,6 +42,7 @@
|
|||||||
|
|
||||||
/* Private define ------------------------------------------------------------*/
|
/* Private define ------------------------------------------------------------*/
|
||||||
/* USER CODE BEGIN PD */
|
/* USER CODE BEGIN PD */
|
||||||
|
|
||||||
/* USER CODE END PD */
|
/* USER CODE END PD */
|
||||||
|
|
||||||
/* Private macro -------------------------------------------------------------*/
|
/* Private macro -------------------------------------------------------------*/
|
||||||
@@ -59,6 +58,7 @@
|
|||||||
|
|
||||||
/* Private function prototypes -----------------------------------------------*/
|
/* Private function prototypes -----------------------------------------------*/
|
||||||
void SystemClock_Config(void);
|
void SystemClock_Config(void);
|
||||||
|
void PeriphCommonClock_Config(void);
|
||||||
void MX_FREERTOS_Init(void);
|
void MX_FREERTOS_Init(void);
|
||||||
/* USER CODE BEGIN PFP */
|
/* USER CODE BEGIN PFP */
|
||||||
|
|
||||||
@@ -92,6 +92,9 @@ int main(void)
|
|||||||
/* Configure the system clock */
|
/* Configure the system clock */
|
||||||
SystemClock_Config();
|
SystemClock_Config();
|
||||||
|
|
||||||
|
/* Configure the peripherals common clocks */
|
||||||
|
PeriphCommonClock_Config();
|
||||||
|
|
||||||
/* USER CODE BEGIN SysInit */
|
/* USER CODE BEGIN SysInit */
|
||||||
|
|
||||||
/* USER CODE END SysInit */
|
/* USER CODE END SysInit */
|
||||||
@@ -99,27 +102,26 @@ int main(void)
|
|||||||
/* Initialize all configured peripherals */
|
/* Initialize all configured peripherals */
|
||||||
MX_GPIO_Init();
|
MX_GPIO_Init();
|
||||||
MX_DMA_Init();
|
MX_DMA_Init();
|
||||||
|
MX_BDMA_Init();
|
||||||
MX_ADC1_Init();
|
MX_ADC1_Init();
|
||||||
MX_ADC3_Init();
|
MX_TIM12_Init();
|
||||||
MX_CAN1_Init();
|
|
||||||
MX_CAN2_Init();
|
|
||||||
MX_I2C1_Init();
|
|
||||||
MX_SPI1_Init();
|
MX_SPI1_Init();
|
||||||
MX_TIM4_Init();
|
|
||||||
MX_TIM5_Init();
|
|
||||||
MX_USART3_UART_Init();
|
|
||||||
MX_TIM8_Init();
|
|
||||||
MX_CRC_Init();
|
|
||||||
MX_RNG_Init();
|
|
||||||
MX_I2C2_Init();
|
|
||||||
MX_I2C3_Init();
|
|
||||||
MX_SPI2_Init();
|
MX_SPI2_Init();
|
||||||
MX_TIM1_Init();
|
|
||||||
MX_TIM3_Init();
|
MX_TIM3_Init();
|
||||||
MX_TIM10_Init();
|
|
||||||
MX_USART1_UART_Init();
|
MX_USART1_UART_Init();
|
||||||
MX_USART6_UART_Init();
|
MX_USART2_UART_Init();
|
||||||
MX_TIM7_Init();
|
MX_USART3_UART_Init();
|
||||||
|
MX_UART7_Init();
|
||||||
|
MX_USART10_UART_Init();
|
||||||
|
MX_FDCAN1_Init();
|
||||||
|
MX_FDCAN2_Init();
|
||||||
|
MX_FDCAN3_Init();
|
||||||
|
MX_TIM1_Init();
|
||||||
|
MX_TIM2_Init();
|
||||||
|
MX_OCTOSPI1_Init();
|
||||||
|
MX_UART5_Init();
|
||||||
|
MX_ADC3_Init();
|
||||||
|
MX_USB_OTG_HS_PCD_Init();
|
||||||
/* USER CODE BEGIN 2 */
|
/* USER CODE BEGIN 2 */
|
||||||
|
|
||||||
/* USER CODE END 2 */
|
/* USER CODE END 2 */
|
||||||
@@ -153,22 +155,35 @@ void SystemClock_Config(void)
|
|||||||
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
|
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
|
||||||
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
|
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
|
||||||
|
|
||||||
|
/** Supply configuration update enable
|
||||||
|
*/
|
||||||
|
HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY);
|
||||||
|
|
||||||
/** Configure the main internal regulator output voltage
|
/** Configure the main internal regulator output voltage
|
||||||
*/
|
*/
|
||||||
__HAL_RCC_PWR_CLK_ENABLE();
|
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE0);
|
||||||
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
|
|
||||||
|
while(!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {}
|
||||||
|
|
||||||
/** Initializes the RCC Oscillators according to the specified parameters
|
/** Initializes the RCC Oscillators according to the specified parameters
|
||||||
* in the RCC_OscInitTypeDef structure.
|
* in the RCC_OscInitTypeDef structure.
|
||||||
*/
|
*/
|
||||||
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
|
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48|RCC_OSCILLATORTYPE_HSI
|
||||||
|
|RCC_OSCILLATORTYPE_HSE;
|
||||||
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
|
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
|
||||||
|
RCC_OscInitStruct.HSIState = RCC_HSI_DIV1;
|
||||||
|
RCC_OscInitStruct.HSICalibrationValue = 64;
|
||||||
|
RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
|
||||||
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
||||||
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
|
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
|
||||||
RCC_OscInitStruct.PLL.PLLM = 6;
|
RCC_OscInitStruct.PLL.PLLM = 2;
|
||||||
RCC_OscInitStruct.PLL.PLLN = 168;
|
RCC_OscInitStruct.PLL.PLLN = 40;
|
||||||
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
|
RCC_OscInitStruct.PLL.PLLP = 1;
|
||||||
RCC_OscInitStruct.PLL.PLLQ = 7;
|
RCC_OscInitStruct.PLL.PLLQ = 4;
|
||||||
|
RCC_OscInitStruct.PLL.PLLR = 2;
|
||||||
|
RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_3;
|
||||||
|
RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE;
|
||||||
|
RCC_OscInitStruct.PLL.PLLFRACN = 0;
|
||||||
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
|
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
|
||||||
{
|
{
|
||||||
Error_Handler();
|
Error_Handler();
|
||||||
@@ -177,13 +192,44 @@ void SystemClock_Config(void)
|
|||||||
/** Initializes the CPU, AHB and APB buses clocks
|
/** Initializes the CPU, AHB and APB buses clocks
|
||||||
*/
|
*/
|
||||||
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
|
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
|
||||||
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
|
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2
|
||||||
|
|RCC_CLOCKTYPE_D3PCLK1|RCC_CLOCKTYPE_D1PCLK1;
|
||||||
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
|
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
|
||||||
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
|
RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1;
|
||||||
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
|
RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV2;
|
||||||
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
|
RCC_ClkInitStruct.APB3CLKDivider = RCC_APB3_DIV2;
|
||||||
|
RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV2;
|
||||||
|
RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV2;
|
||||||
|
RCC_ClkInitStruct.APB4CLKDivider = RCC_APB4_DIV2;
|
||||||
|
|
||||||
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK)
|
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3) != HAL_OK)
|
||||||
|
{
|
||||||
|
Error_Handler();
|
||||||
|
}
|
||||||
|
HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_HSI, RCC_MCODIV_1);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Peripherals Common Clock Configuration
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
void PeriphCommonClock_Config(void)
|
||||||
|
{
|
||||||
|
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
|
||||||
|
|
||||||
|
/** Initializes the peripherals clock
|
||||||
|
*/
|
||||||
|
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_ADC;
|
||||||
|
PeriphClkInitStruct.PLL2.PLL2M = 2;
|
||||||
|
PeriphClkInitStruct.PLL2.PLL2N = 16;
|
||||||
|
PeriphClkInitStruct.PLL2.PLL2P = 2;
|
||||||
|
PeriphClkInitStruct.PLL2.PLL2Q = 2;
|
||||||
|
PeriphClkInitStruct.PLL2.PLL2R = 2;
|
||||||
|
PeriphClkInitStruct.PLL2.PLL2RGE = RCC_PLL2VCIRANGE_3;
|
||||||
|
PeriphClkInitStruct.PLL2.PLL2VCOSEL = RCC_PLL2VCOWIDE;
|
||||||
|
PeriphClkInitStruct.PLL2.PLL2FRACN = 0;
|
||||||
|
PeriphClkInitStruct.AdcClockSelection = RCC_ADCCLKSOURCE_PLL2;
|
||||||
|
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
|
||||||
{
|
{
|
||||||
Error_Handler();
|
Error_Handler();
|
||||||
}
|
}
|
||||||
@@ -193,6 +239,28 @@ void SystemClock_Config(void)
|
|||||||
|
|
||||||
/* USER CODE END 4 */
|
/* USER CODE END 4 */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Period elapsed callback in non blocking mode
|
||||||
|
* @note This function is called when TIM23 interrupt took place, inside
|
||||||
|
* HAL_TIM_IRQHandler(). It makes a direct call to HAL_IncTick() to increment
|
||||||
|
* a global variable "uwTick" used as application time base.
|
||||||
|
* @param htim : TIM handle
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN Callback 0 */
|
||||||
|
|
||||||
|
/* USER CODE END Callback 0 */
|
||||||
|
if (htim->Instance == TIM23)
|
||||||
|
{
|
||||||
|
HAL_IncTick();
|
||||||
|
}
|
||||||
|
/* USER CODE BEGIN Callback 1 */
|
||||||
|
|
||||||
|
/* USER CODE END Callback 1 */
|
||||||
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief This function is executed in case of error occurrence.
|
* @brief This function is executed in case of error occurrence.
|
||||||
* @retval None
|
* @retval None
|
||||||
|
|||||||
195
Core/Src/octospi.c
Normal file
195
Core/Src/octospi.c
Normal file
@@ -0,0 +1,195 @@
|
|||||||
|
/* USER CODE BEGIN Header */
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file octospi.c
|
||||||
|
* @brief This file provides code for the configuration
|
||||||
|
* of the OCTOSPI instances.
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* Copyright (c) 2026 STMicroelectronics.
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* This software is licensed under terms that can be found in the LICENSE file
|
||||||
|
* in the root directory of this software component.
|
||||||
|
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
/* USER CODE END Header */
|
||||||
|
/* Includes ------------------------------------------------------------------*/
|
||||||
|
#include "octospi.h"
|
||||||
|
|
||||||
|
/* USER CODE BEGIN 0 */
|
||||||
|
|
||||||
|
/* USER CODE END 0 */
|
||||||
|
|
||||||
|
OSPI_HandleTypeDef hospi1;
|
||||||
|
|
||||||
|
/* OCTOSPI1 init function */
|
||||||
|
void MX_OCTOSPI1_Init(void)
|
||||||
|
{
|
||||||
|
|
||||||
|
/* USER CODE BEGIN OCTOSPI1_Init 0 */
|
||||||
|
|
||||||
|
/* USER CODE END OCTOSPI1_Init 0 */
|
||||||
|
|
||||||
|
OSPIM_CfgTypeDef sOspiManagerCfg = {0};
|
||||||
|
|
||||||
|
/* USER CODE BEGIN OCTOSPI1_Init 1 */
|
||||||
|
|
||||||
|
/* USER CODE END OCTOSPI1_Init 1 */
|
||||||
|
hospi1.Instance = OCTOSPI1;
|
||||||
|
hospi1.Init.FifoThreshold = 1;
|
||||||
|
hospi1.Init.DualQuad = HAL_OSPI_DUALQUAD_DISABLE;
|
||||||
|
hospi1.Init.MemoryType = HAL_OSPI_MEMTYPE_MICRON;
|
||||||
|
hospi1.Init.DeviceSize = 32;
|
||||||
|
hospi1.Init.ChipSelectHighTime = 1;
|
||||||
|
hospi1.Init.FreeRunningClock = HAL_OSPI_FREERUNCLK_DISABLE;
|
||||||
|
hospi1.Init.ClockMode = HAL_OSPI_CLOCK_MODE_0;
|
||||||
|
hospi1.Init.WrapSize = HAL_OSPI_WRAP_NOT_SUPPORTED;
|
||||||
|
hospi1.Init.ClockPrescaler = 1;
|
||||||
|
hospi1.Init.SampleShifting = HAL_OSPI_SAMPLE_SHIFTING_NONE;
|
||||||
|
hospi1.Init.DelayHoldQuarterCycle = HAL_OSPI_DHQC_DISABLE;
|
||||||
|
hospi1.Init.ChipSelectBoundary = 0;
|
||||||
|
hospi1.Init.DelayBlockBypass = HAL_OSPI_DELAY_BLOCK_BYPASSED;
|
||||||
|
hospi1.Init.MaxTran = 0;
|
||||||
|
hospi1.Init.Refresh = 0;
|
||||||
|
if (HAL_OSPI_Init(&hospi1) != HAL_OK)
|
||||||
|
{
|
||||||
|
Error_Handler();
|
||||||
|
}
|
||||||
|
sOspiManagerCfg.ClkPort = 1;
|
||||||
|
sOspiManagerCfg.NCSPort = 1;
|
||||||
|
sOspiManagerCfg.IOLowPort = HAL_OSPIM_IOPORT_1_LOW;
|
||||||
|
if (HAL_OSPIM_Config(&hospi1, &sOspiManagerCfg, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
|
||||||
|
{
|
||||||
|
Error_Handler();
|
||||||
|
}
|
||||||
|
/* USER CODE BEGIN OCTOSPI1_Init 2 */
|
||||||
|
|
||||||
|
/* USER CODE END OCTOSPI1_Init 2 */
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
void HAL_OSPI_MspInit(OSPI_HandleTypeDef* ospiHandle)
|
||||||
|
{
|
||||||
|
|
||||||
|
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
||||||
|
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
|
||||||
|
if(ospiHandle->Instance==OCTOSPI1)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN OCTOSPI1_MspInit 0 */
|
||||||
|
|
||||||
|
/* USER CODE END OCTOSPI1_MspInit 0 */
|
||||||
|
|
||||||
|
/** Initializes the peripherals clock
|
||||||
|
*/
|
||||||
|
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_OSPI;
|
||||||
|
PeriphClkInitStruct.OspiClockSelection = RCC_OSPICLKSOURCE_D1HCLK;
|
||||||
|
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
|
||||||
|
{
|
||||||
|
Error_Handler();
|
||||||
|
}
|
||||||
|
|
||||||
|
/* OCTOSPI1 clock enable */
|
||||||
|
__HAL_RCC_OCTOSPIM_CLK_ENABLE();
|
||||||
|
__HAL_RCC_OSPI1_CLK_ENABLE();
|
||||||
|
|
||||||
|
__HAL_RCC_GPIOA_CLK_ENABLE();
|
||||||
|
__HAL_RCC_GPIOB_CLK_ENABLE();
|
||||||
|
__HAL_RCC_GPIOE_CLK_ENABLE();
|
||||||
|
__HAL_RCC_GPIOD_CLK_ENABLE();
|
||||||
|
/**OCTOSPI1 GPIO Configuration
|
||||||
|
PA1 ------> OCTOSPIM_P1_IO3
|
||||||
|
PA3 ------> OCTOSPIM_P1_IO2
|
||||||
|
PB0 ------> OCTOSPIM_P1_IO1
|
||||||
|
PB2 ------> OCTOSPIM_P1_CLK
|
||||||
|
PE11 ------> OCTOSPIM_P1_NCS
|
||||||
|
PD11 ------> OCTOSPIM_P1_IO0
|
||||||
|
*/
|
||||||
|
GPIO_InitStruct.Pin = GPIO_PIN_1;
|
||||||
|
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||||
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||||
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||||
|
GPIO_InitStruct.Alternate = GPIO_AF9_OCTOSPIM_P1;
|
||||||
|
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||||
|
|
||||||
|
GPIO_InitStruct.Pin = GPIO_PIN_3;
|
||||||
|
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||||
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||||
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||||
|
GPIO_InitStruct.Alternate = GPIO_AF6_OCTOSPIM_P1;
|
||||||
|
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||||
|
|
||||||
|
GPIO_InitStruct.Pin = GPIO_PIN_0;
|
||||||
|
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||||
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||||
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||||
|
GPIO_InitStruct.Alternate = GPIO_AF4_OCTOSPIM_P1;
|
||||||
|
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
||||||
|
|
||||||
|
GPIO_InitStruct.Pin = GPIO_PIN_2;
|
||||||
|
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||||
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||||
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||||
|
GPIO_InitStruct.Alternate = GPIO_AF9_OCTOSPIM_P1;
|
||||||
|
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
||||||
|
|
||||||
|
GPIO_InitStruct.Pin = GPIO_PIN_11;
|
||||||
|
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||||
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||||
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||||
|
GPIO_InitStruct.Alternate = GPIO_AF11_OCTOSPIM_P1;
|
||||||
|
HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
|
||||||
|
|
||||||
|
GPIO_InitStruct.Pin = GPIO_PIN_11;
|
||||||
|
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||||
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||||
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||||
|
GPIO_InitStruct.Alternate = GPIO_AF9_OCTOSPIM_P1;
|
||||||
|
HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
|
||||||
|
|
||||||
|
/* USER CODE BEGIN OCTOSPI1_MspInit 1 */
|
||||||
|
|
||||||
|
/* USER CODE END OCTOSPI1_MspInit 1 */
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
void HAL_OSPI_MspDeInit(OSPI_HandleTypeDef* ospiHandle)
|
||||||
|
{
|
||||||
|
|
||||||
|
if(ospiHandle->Instance==OCTOSPI1)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN OCTOSPI1_MspDeInit 0 */
|
||||||
|
|
||||||
|
/* USER CODE END OCTOSPI1_MspDeInit 0 */
|
||||||
|
/* Peripheral clock disable */
|
||||||
|
__HAL_RCC_OCTOSPIM_CLK_DISABLE();
|
||||||
|
__HAL_RCC_OSPI1_CLK_DISABLE();
|
||||||
|
|
||||||
|
/**OCTOSPI1 GPIO Configuration
|
||||||
|
PA1 ------> OCTOSPIM_P1_IO3
|
||||||
|
PA3 ------> OCTOSPIM_P1_IO2
|
||||||
|
PB0 ------> OCTOSPIM_P1_IO1
|
||||||
|
PB2 ------> OCTOSPIM_P1_CLK
|
||||||
|
PE11 ------> OCTOSPIM_P1_NCS
|
||||||
|
PD11 ------> OCTOSPIM_P1_IO0
|
||||||
|
*/
|
||||||
|
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_1|GPIO_PIN_3);
|
||||||
|
|
||||||
|
HAL_GPIO_DeInit(GPIOB, GPIO_PIN_0|GPIO_PIN_2);
|
||||||
|
|
||||||
|
HAL_GPIO_DeInit(GPIOE, GPIO_PIN_11);
|
||||||
|
|
||||||
|
HAL_GPIO_DeInit(GPIOD, GPIO_PIN_11);
|
||||||
|
|
||||||
|
/* USER CODE BEGIN OCTOSPI1_MspDeInit 1 */
|
||||||
|
|
||||||
|
/* USER CODE END OCTOSPI1_MspDeInit 1 */
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/* USER CODE BEGIN 1 */
|
||||||
|
|
||||||
|
/* USER CODE END 1 */
|
||||||
@@ -1,4 +1,7 @@
|
|||||||
|
<<<<<<< HEAD
|
||||||
/* USER CODE BEGIN Header */
|
/* USER CODE BEGIN Header */
|
||||||
|
=======
|
||||||
|
>>>>>>> upper
|
||||||
/**
|
/**
|
||||||
******************************************************************************
|
******************************************************************************
|
||||||
* @file rng.c
|
* @file rng.c
|
||||||
@@ -7,6 +10,7 @@
|
|||||||
******************************************************************************
|
******************************************************************************
|
||||||
* @attention
|
* @attention
|
||||||
*
|
*
|
||||||
|
<<<<<<< HEAD
|
||||||
* Copyright (c) 2025 STMicroelectronics.
|
* Copyright (c) 2025 STMicroelectronics.
|
||||||
* All rights reserved.
|
* All rights reserved.
|
||||||
*
|
*
|
||||||
@@ -17,6 +21,19 @@
|
|||||||
******************************************************************************
|
******************************************************************************
|
||||||
*/
|
*/
|
||||||
/* USER CODE END Header */
|
/* USER CODE END Header */
|
||||||
|
=======
|
||||||
|
* <h2><center>© Copyright (c) 2025 STMicroelectronics.
|
||||||
|
* All rights reserved.</center></h2>
|
||||||
|
*
|
||||||
|
* This software component is licensed by ST under Ultimate Liberty license
|
||||||
|
* SLA0044, the "License"; You may not use this file except in compliance with
|
||||||
|
* the License. You may obtain a copy of the License at:
|
||||||
|
* www.st.com/SLA0044
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
>>>>>>> upper
|
||||||
/* Includes ------------------------------------------------------------------*/
|
/* Includes ------------------------------------------------------------------*/
|
||||||
#include "rng.h"
|
#include "rng.h"
|
||||||
|
|
||||||
@@ -83,3 +100,8 @@ void HAL_RNG_MspDeInit(RNG_HandleTypeDef* rngHandle)
|
|||||||
/* USER CODE BEGIN 1 */
|
/* USER CODE BEGIN 1 */
|
||||||
|
|
||||||
/* USER CODE END 1 */
|
/* USER CODE END 1 */
|
||||||
|
<<<<<<< HEAD
|
||||||
|
=======
|
||||||
|
|
||||||
|
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||||
|
>>>>>>> upper
|
||||||
|
|||||||
207
Core/Src/spi.c
207
Core/Src/spi.c
@@ -7,7 +7,7 @@
|
|||||||
******************************************************************************
|
******************************************************************************
|
||||||
* @attention
|
* @attention
|
||||||
*
|
*
|
||||||
* Copyright (c) 2025 STMicroelectronics.
|
* Copyright (c) 2026 STMicroelectronics.
|
||||||
* All rights reserved.
|
* All rights reserved.
|
||||||
*
|
*
|
||||||
* This software is licensed under terms that can be found in the LICENSE file
|
* This software is licensed under terms that can be found in the LICENSE file
|
||||||
@@ -26,8 +26,8 @@
|
|||||||
|
|
||||||
SPI_HandleTypeDef hspi1;
|
SPI_HandleTypeDef hspi1;
|
||||||
SPI_HandleTypeDef hspi2;
|
SPI_HandleTypeDef hspi2;
|
||||||
DMA_HandleTypeDef hdma_spi1_rx;
|
DMA_HandleTypeDef hdma_spi2_rx;
|
||||||
DMA_HandleTypeDef hdma_spi1_tx;
|
DMA_HandleTypeDef hdma_spi2_tx;
|
||||||
|
|
||||||
/* SPI1 init function */
|
/* SPI1 init function */
|
||||||
void MX_SPI1_Init(void)
|
void MX_SPI1_Init(void)
|
||||||
@@ -42,16 +42,26 @@ void MX_SPI1_Init(void)
|
|||||||
/* USER CODE END SPI1_Init 1 */
|
/* USER CODE END SPI1_Init 1 */
|
||||||
hspi1.Instance = SPI1;
|
hspi1.Instance = SPI1;
|
||||||
hspi1.Init.Mode = SPI_MODE_MASTER;
|
hspi1.Init.Mode = SPI_MODE_MASTER;
|
||||||
hspi1.Init.Direction = SPI_DIRECTION_2LINES;
|
hspi1.Init.Direction = SPI_DIRECTION_2LINES_TXONLY;
|
||||||
hspi1.Init.DataSize = SPI_DATASIZE_8BIT;
|
hspi1.Init.DataSize = SPI_DATASIZE_8BIT;
|
||||||
hspi1.Init.CLKPolarity = SPI_POLARITY_HIGH;
|
hspi1.Init.CLKPolarity = SPI_POLARITY_HIGH;
|
||||||
hspi1.Init.CLKPhase = SPI_PHASE_2EDGE;
|
hspi1.Init.CLKPhase = SPI_PHASE_1EDGE;
|
||||||
hspi1.Init.NSS = SPI_NSS_SOFT;
|
hspi1.Init.NSS = SPI_NSS_SOFT;
|
||||||
hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_16;
|
hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_4;
|
||||||
hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB;
|
hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB;
|
||||||
hspi1.Init.TIMode = SPI_TIMODE_DISABLE;
|
hspi1.Init.TIMode = SPI_TIMODE_DISABLE;
|
||||||
hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
|
hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
|
||||||
hspi1.Init.CRCPolynomial = 10;
|
hspi1.Init.CRCPolynomial = 0x0;
|
||||||
|
hspi1.Init.NSSPMode = SPI_NSS_PULSE_ENABLE;
|
||||||
|
hspi1.Init.NSSPolarity = SPI_NSS_POLARITY_LOW;
|
||||||
|
hspi1.Init.FifoThreshold = SPI_FIFO_THRESHOLD_01DATA;
|
||||||
|
hspi1.Init.TxCRCInitializationPattern = SPI_CRC_INITIALIZATION_ALL_ZERO_PATTERN;
|
||||||
|
hspi1.Init.RxCRCInitializationPattern = SPI_CRC_INITIALIZATION_ALL_ZERO_PATTERN;
|
||||||
|
hspi1.Init.MasterSSIdleness = SPI_MASTER_SS_IDLENESS_00CYCLE;
|
||||||
|
hspi1.Init.MasterInterDataIdleness = SPI_MASTER_INTERDATA_IDLENESS_00CYCLE;
|
||||||
|
hspi1.Init.MasterReceiverAutoSusp = SPI_MASTER_RX_AUTOSUSP_DISABLE;
|
||||||
|
hspi1.Init.MasterKeepIOState = SPI_MASTER_KEEP_IO_STATE_DISABLE;
|
||||||
|
hspi1.Init.IOSwap = SPI_IO_SWAP_DISABLE;
|
||||||
if (HAL_SPI_Init(&hspi1) != HAL_OK)
|
if (HAL_SPI_Init(&hspi1) != HAL_OK)
|
||||||
{
|
{
|
||||||
Error_Handler();
|
Error_Handler();
|
||||||
@@ -76,14 +86,24 @@ void MX_SPI2_Init(void)
|
|||||||
hspi2.Init.Mode = SPI_MODE_MASTER;
|
hspi2.Init.Mode = SPI_MODE_MASTER;
|
||||||
hspi2.Init.Direction = SPI_DIRECTION_2LINES;
|
hspi2.Init.Direction = SPI_DIRECTION_2LINES;
|
||||||
hspi2.Init.DataSize = SPI_DATASIZE_8BIT;
|
hspi2.Init.DataSize = SPI_DATASIZE_8BIT;
|
||||||
hspi2.Init.CLKPolarity = SPI_POLARITY_LOW;
|
hspi2.Init.CLKPolarity = SPI_POLARITY_HIGH;
|
||||||
hspi2.Init.CLKPhase = SPI_PHASE_1EDGE;
|
hspi2.Init.CLKPhase = SPI_PHASE_2EDGE;
|
||||||
hspi2.Init.NSS = SPI_NSS_SOFT;
|
hspi2.Init.NSS = SPI_NSS_SOFT;
|
||||||
hspi2.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_64;
|
hspi2.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_32;
|
||||||
hspi2.Init.FirstBit = SPI_FIRSTBIT_MSB;
|
hspi2.Init.FirstBit = SPI_FIRSTBIT_MSB;
|
||||||
hspi2.Init.TIMode = SPI_TIMODE_DISABLE;
|
hspi2.Init.TIMode = SPI_TIMODE_DISABLE;
|
||||||
hspi2.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
|
hspi2.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
|
||||||
hspi2.Init.CRCPolynomial = 10;
|
hspi2.Init.CRCPolynomial = 0x0;
|
||||||
|
hspi2.Init.NSSPMode = SPI_NSS_PULSE_ENABLE;
|
||||||
|
hspi2.Init.NSSPolarity = SPI_NSS_POLARITY_LOW;
|
||||||
|
hspi2.Init.FifoThreshold = SPI_FIFO_THRESHOLD_01DATA;
|
||||||
|
hspi2.Init.TxCRCInitializationPattern = SPI_CRC_INITIALIZATION_ALL_ZERO_PATTERN;
|
||||||
|
hspi2.Init.RxCRCInitializationPattern = SPI_CRC_INITIALIZATION_ALL_ZERO_PATTERN;
|
||||||
|
hspi2.Init.MasterSSIdleness = SPI_MASTER_SS_IDLENESS_00CYCLE;
|
||||||
|
hspi2.Init.MasterInterDataIdleness = SPI_MASTER_INTERDATA_IDLENESS_00CYCLE;
|
||||||
|
hspi2.Init.MasterReceiverAutoSusp = SPI_MASTER_RX_AUTOSUSP_DISABLE;
|
||||||
|
hspi2.Init.MasterKeepIOState = SPI_MASTER_KEEP_IO_STATE_DISABLE;
|
||||||
|
hspi2.Init.IOSwap = SPI_IO_SWAP_DISABLE;
|
||||||
if (HAL_SPI_Init(&hspi2) != HAL_OK)
|
if (HAL_SPI_Init(&hspi2) != HAL_OK)
|
||||||
{
|
{
|
||||||
Error_Handler();
|
Error_Handler();
|
||||||
@@ -98,72 +118,45 @@ void HAL_SPI_MspInit(SPI_HandleTypeDef* spiHandle)
|
|||||||
{
|
{
|
||||||
|
|
||||||
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
||||||
|
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
|
||||||
if(spiHandle->Instance==SPI1)
|
if(spiHandle->Instance==SPI1)
|
||||||
{
|
{
|
||||||
/* USER CODE BEGIN SPI1_MspInit 0 */
|
/* USER CODE BEGIN SPI1_MspInit 0 */
|
||||||
|
|
||||||
/* USER CODE END SPI1_MspInit 0 */
|
/* USER CODE END SPI1_MspInit 0 */
|
||||||
|
|
||||||
|
/** Initializes the peripherals clock
|
||||||
|
*/
|
||||||
|
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_SPI1;
|
||||||
|
PeriphClkInitStruct.Spi123ClockSelection = RCC_SPI123CLKSOURCE_PLL;
|
||||||
|
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
|
||||||
|
{
|
||||||
|
Error_Handler();
|
||||||
|
}
|
||||||
|
|
||||||
/* SPI1 clock enable */
|
/* SPI1 clock enable */
|
||||||
__HAL_RCC_SPI1_CLK_ENABLE();
|
__HAL_RCC_SPI1_CLK_ENABLE();
|
||||||
|
|
||||||
|
__HAL_RCC_GPIOD_CLK_ENABLE();
|
||||||
__HAL_RCC_GPIOB_CLK_ENABLE();
|
__HAL_RCC_GPIOB_CLK_ENABLE();
|
||||||
__HAL_RCC_GPIOA_CLK_ENABLE();
|
|
||||||
/**SPI1 GPIO Configuration
|
/**SPI1 GPIO Configuration
|
||||||
PB4 ------> SPI1_MISO
|
PD7 ------> SPI1_MOSI
|
||||||
PB3 ------> SPI1_SCK
|
PB3(JTDO/TRACESWO) ------> SPI1_SCK
|
||||||
PA7 ------> SPI1_MOSI
|
|
||||||
*/
|
*/
|
||||||
GPIO_InitStruct.Pin = GPIO_PIN_4|GPIO_PIN_3;
|
GPIO_InitStruct.Pin = GPIO_PIN_7;
|
||||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||||
GPIO_InitStruct.Pull = GPIO_PULLUP;
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||||
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||||
|
GPIO_InitStruct.Alternate = GPIO_AF5_SPI1;
|
||||||
|
HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
|
||||||
|
|
||||||
|
GPIO_InitStruct.Pin = GPIO_PIN_3;
|
||||||
|
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||||
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||||
GPIO_InitStruct.Alternate = GPIO_AF5_SPI1;
|
GPIO_InitStruct.Alternate = GPIO_AF5_SPI1;
|
||||||
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
||||||
|
|
||||||
GPIO_InitStruct.Pin = GPIO_PIN_7;
|
|
||||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
|
||||||
GPIO_InitStruct.Pull = GPIO_PULLUP;
|
|
||||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
|
||||||
GPIO_InitStruct.Alternate = GPIO_AF5_SPI1;
|
|
||||||
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
|
||||||
|
|
||||||
/* SPI1 DMA Init */
|
|
||||||
/* SPI1_RX Init */
|
|
||||||
hdma_spi1_rx.Instance = DMA2_Stream2;
|
|
||||||
hdma_spi1_rx.Init.Channel = DMA_CHANNEL_3;
|
|
||||||
hdma_spi1_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
|
|
||||||
hdma_spi1_rx.Init.PeriphInc = DMA_PINC_DISABLE;
|
|
||||||
hdma_spi1_rx.Init.MemInc = DMA_MINC_ENABLE;
|
|
||||||
hdma_spi1_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
|
|
||||||
hdma_spi1_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
|
|
||||||
hdma_spi1_rx.Init.Mode = DMA_NORMAL;
|
|
||||||
hdma_spi1_rx.Init.Priority = DMA_PRIORITY_VERY_HIGH;
|
|
||||||
hdma_spi1_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
|
|
||||||
if (HAL_DMA_Init(&hdma_spi1_rx) != HAL_OK)
|
|
||||||
{
|
|
||||||
Error_Handler();
|
|
||||||
}
|
|
||||||
|
|
||||||
__HAL_LINKDMA(spiHandle,hdmarx,hdma_spi1_rx);
|
|
||||||
|
|
||||||
/* SPI1_TX Init */
|
|
||||||
hdma_spi1_tx.Instance = DMA2_Stream3;
|
|
||||||
hdma_spi1_tx.Init.Channel = DMA_CHANNEL_3;
|
|
||||||
hdma_spi1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
|
|
||||||
hdma_spi1_tx.Init.PeriphInc = DMA_PINC_DISABLE;
|
|
||||||
hdma_spi1_tx.Init.MemInc = DMA_MINC_ENABLE;
|
|
||||||
hdma_spi1_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
|
|
||||||
hdma_spi1_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
|
|
||||||
hdma_spi1_tx.Init.Mode = DMA_NORMAL;
|
|
||||||
hdma_spi1_tx.Init.Priority = DMA_PRIORITY_HIGH;
|
|
||||||
hdma_spi1_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
|
|
||||||
if (HAL_DMA_Init(&hdma_spi1_tx) != HAL_OK)
|
|
||||||
{
|
|
||||||
Error_Handler();
|
|
||||||
}
|
|
||||||
|
|
||||||
__HAL_LINKDMA(spiHandle,hdmatx,hdma_spi1_tx);
|
|
||||||
|
|
||||||
/* USER CODE BEGIN SPI1_MspInit 1 */
|
/* USER CODE BEGIN SPI1_MspInit 1 */
|
||||||
|
|
||||||
/* USER CODE END SPI1_MspInit 1 */
|
/* USER CODE END SPI1_MspInit 1 */
|
||||||
@@ -173,22 +166,80 @@ void HAL_SPI_MspInit(SPI_HandleTypeDef* spiHandle)
|
|||||||
/* USER CODE BEGIN SPI2_MspInit 0 */
|
/* USER CODE BEGIN SPI2_MspInit 0 */
|
||||||
|
|
||||||
/* USER CODE END SPI2_MspInit 0 */
|
/* USER CODE END SPI2_MspInit 0 */
|
||||||
|
|
||||||
|
/** Initializes the peripherals clock
|
||||||
|
*/
|
||||||
|
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_SPI2;
|
||||||
|
PeriphClkInitStruct.Spi123ClockSelection = RCC_SPI123CLKSOURCE_PLL;
|
||||||
|
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
|
||||||
|
{
|
||||||
|
Error_Handler();
|
||||||
|
}
|
||||||
|
|
||||||
/* SPI2 clock enable */
|
/* SPI2 clock enable */
|
||||||
__HAL_RCC_SPI2_CLK_ENABLE();
|
__HAL_RCC_SPI2_CLK_ENABLE();
|
||||||
|
|
||||||
|
__HAL_RCC_GPIOC_CLK_ENABLE();
|
||||||
__HAL_RCC_GPIOB_CLK_ENABLE();
|
__HAL_RCC_GPIOB_CLK_ENABLE();
|
||||||
/**SPI2 GPIO Configuration
|
/**SPI2 GPIO Configuration
|
||||||
|
PC1 ------> SPI2_MOSI
|
||||||
|
PC2_C ------> SPI2_MISO
|
||||||
PB13 ------> SPI2_SCK
|
PB13 ------> SPI2_SCK
|
||||||
PB14 ------> SPI2_MISO
|
|
||||||
PB15 ------> SPI2_MOSI
|
|
||||||
*/
|
*/
|
||||||
GPIO_InitStruct.Pin = GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15;
|
GPIO_InitStruct.Pin = GPIO_PIN_1|GPIO_PIN_2;
|
||||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||||
GPIO_InitStruct.Pull = GPIO_PULLUP;
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||||
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||||
|
GPIO_InitStruct.Alternate = GPIO_AF5_SPI2;
|
||||||
|
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
|
||||||
|
|
||||||
|
GPIO_InitStruct.Pin = GPIO_PIN_13;
|
||||||
|
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||||
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||||
GPIO_InitStruct.Alternate = GPIO_AF5_SPI2;
|
GPIO_InitStruct.Alternate = GPIO_AF5_SPI2;
|
||||||
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
||||||
|
|
||||||
|
/* SPI2 DMA Init */
|
||||||
|
/* SPI2_RX Init */
|
||||||
|
hdma_spi2_rx.Instance = DMA1_Stream1;
|
||||||
|
hdma_spi2_rx.Init.Request = DMA_REQUEST_SPI2_RX;
|
||||||
|
hdma_spi2_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
|
||||||
|
hdma_spi2_rx.Init.PeriphInc = DMA_PINC_DISABLE;
|
||||||
|
hdma_spi2_rx.Init.MemInc = DMA_MINC_ENABLE;
|
||||||
|
hdma_spi2_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
|
||||||
|
hdma_spi2_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
|
||||||
|
hdma_spi2_rx.Init.Mode = DMA_NORMAL;
|
||||||
|
hdma_spi2_rx.Init.Priority = DMA_PRIORITY_LOW;
|
||||||
|
hdma_spi2_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
|
||||||
|
if (HAL_DMA_Init(&hdma_spi2_rx) != HAL_OK)
|
||||||
|
{
|
||||||
|
Error_Handler();
|
||||||
|
}
|
||||||
|
|
||||||
|
__HAL_LINKDMA(spiHandle,hdmarx,hdma_spi2_rx);
|
||||||
|
|
||||||
|
/* SPI2_TX Init */
|
||||||
|
hdma_spi2_tx.Instance = DMA1_Stream2;
|
||||||
|
hdma_spi2_tx.Init.Request = DMA_REQUEST_SPI2_TX;
|
||||||
|
hdma_spi2_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
|
||||||
|
hdma_spi2_tx.Init.PeriphInc = DMA_PINC_DISABLE;
|
||||||
|
hdma_spi2_tx.Init.MemInc = DMA_MINC_ENABLE;
|
||||||
|
hdma_spi2_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
|
||||||
|
hdma_spi2_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
|
||||||
|
hdma_spi2_tx.Init.Mode = DMA_NORMAL;
|
||||||
|
hdma_spi2_tx.Init.Priority = DMA_PRIORITY_LOW;
|
||||||
|
hdma_spi2_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
|
||||||
|
if (HAL_DMA_Init(&hdma_spi2_tx) != HAL_OK)
|
||||||
|
{
|
||||||
|
Error_Handler();
|
||||||
|
}
|
||||||
|
|
||||||
|
__HAL_LINKDMA(spiHandle,hdmatx,hdma_spi2_tx);
|
||||||
|
|
||||||
|
/* SPI2 interrupt Init */
|
||||||
|
HAL_NVIC_SetPriority(SPI2_IRQn, 5, 0);
|
||||||
|
HAL_NVIC_EnableIRQ(SPI2_IRQn);
|
||||||
/* USER CODE BEGIN SPI2_MspInit 1 */
|
/* USER CODE BEGIN SPI2_MspInit 1 */
|
||||||
|
|
||||||
/* USER CODE END SPI2_MspInit 1 */
|
/* USER CODE END SPI2_MspInit 1 */
|
||||||
@@ -207,17 +258,13 @@ void HAL_SPI_MspDeInit(SPI_HandleTypeDef* spiHandle)
|
|||||||
__HAL_RCC_SPI1_CLK_DISABLE();
|
__HAL_RCC_SPI1_CLK_DISABLE();
|
||||||
|
|
||||||
/**SPI1 GPIO Configuration
|
/**SPI1 GPIO Configuration
|
||||||
PB4 ------> SPI1_MISO
|
PD7 ------> SPI1_MOSI
|
||||||
PB3 ------> SPI1_SCK
|
PB3(JTDO/TRACESWO) ------> SPI1_SCK
|
||||||
PA7 ------> SPI1_MOSI
|
|
||||||
*/
|
*/
|
||||||
HAL_GPIO_DeInit(GPIOB, GPIO_PIN_4|GPIO_PIN_3);
|
HAL_GPIO_DeInit(GPIOD, GPIO_PIN_7);
|
||||||
|
|
||||||
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_7);
|
HAL_GPIO_DeInit(GPIOB, GPIO_PIN_3);
|
||||||
|
|
||||||
/* SPI1 DMA DeInit */
|
|
||||||
HAL_DMA_DeInit(spiHandle->hdmarx);
|
|
||||||
HAL_DMA_DeInit(spiHandle->hdmatx);
|
|
||||||
/* USER CODE BEGIN SPI1_MspDeInit 1 */
|
/* USER CODE BEGIN SPI1_MspDeInit 1 */
|
||||||
|
|
||||||
/* USER CODE END SPI1_MspDeInit 1 */
|
/* USER CODE END SPI1_MspDeInit 1 */
|
||||||
@@ -231,12 +278,20 @@ void HAL_SPI_MspDeInit(SPI_HandleTypeDef* spiHandle)
|
|||||||
__HAL_RCC_SPI2_CLK_DISABLE();
|
__HAL_RCC_SPI2_CLK_DISABLE();
|
||||||
|
|
||||||
/**SPI2 GPIO Configuration
|
/**SPI2 GPIO Configuration
|
||||||
|
PC1 ------> SPI2_MOSI
|
||||||
|
PC2_C ------> SPI2_MISO
|
||||||
PB13 ------> SPI2_SCK
|
PB13 ------> SPI2_SCK
|
||||||
PB14 ------> SPI2_MISO
|
|
||||||
PB15 ------> SPI2_MOSI
|
|
||||||
*/
|
*/
|
||||||
HAL_GPIO_DeInit(GPIOB, GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15);
|
HAL_GPIO_DeInit(GPIOC, GPIO_PIN_1|GPIO_PIN_2);
|
||||||
|
|
||||||
|
HAL_GPIO_DeInit(GPIOB, GPIO_PIN_13);
|
||||||
|
|
||||||
|
/* SPI2 DMA DeInit */
|
||||||
|
HAL_DMA_DeInit(spiHandle->hdmarx);
|
||||||
|
HAL_DMA_DeInit(spiHandle->hdmatx);
|
||||||
|
|
||||||
|
/* SPI2 interrupt Deinit */
|
||||||
|
HAL_NVIC_DisableIRQ(SPI2_IRQn);
|
||||||
/* USER CODE BEGIN SPI2_MspDeInit 1 */
|
/* USER CODE BEGIN SPI2_MspDeInit 1 */
|
||||||
|
|
||||||
/* USER CODE END SPI2_MspDeInit 1 */
|
/* USER CODE END SPI2_MspDeInit 1 */
|
||||||
|
|||||||
@@ -63,7 +63,10 @@
|
|||||||
*/
|
*/
|
||||||
void HAL_MspInit(void)
|
void HAL_MspInit(void)
|
||||||
{
|
{
|
||||||
|
<<<<<<< HEAD
|
||||||
|
|
||||||
|
=======
|
||||||
|
>>>>>>> upper
|
||||||
/* USER CODE BEGIN MspInit 0 */
|
/* USER CODE BEGIN MspInit 0 */
|
||||||
|
|
||||||
/* USER CODE END MspInit 0 */
|
/* USER CODE END MspInit 0 */
|
||||||
@@ -83,3 +86,8 @@ void HAL_MspInit(void)
|
|||||||
/* USER CODE BEGIN 1 */
|
/* USER CODE BEGIN 1 */
|
||||||
|
|
||||||
/* USER CODE END 1 */
|
/* USER CODE END 1 */
|
||||||
|
<<<<<<< HEAD
|
||||||
|
=======
|
||||||
|
|
||||||
|
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||||
|
>>>>>>> upper
|
||||||
|
|||||||
@@ -207,7 +207,11 @@ void EXTI0_IRQHandler(void)
|
|||||||
/* USER CODE BEGIN EXTI0_IRQn 0 */
|
/* USER CODE BEGIN EXTI0_IRQn 0 */
|
||||||
|
|
||||||
/* USER CODE END EXTI0_IRQn 0 */
|
/* USER CODE END EXTI0_IRQn 0 */
|
||||||
|
<<<<<<< HEAD
|
||||||
HAL_GPIO_EXTI_IRQHandler(USER_KEY_Pin);
|
HAL_GPIO_EXTI_IRQHandler(USER_KEY_Pin);
|
||||||
|
=======
|
||||||
|
HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_0);
|
||||||
|
>>>>>>> upper
|
||||||
/* USER CODE BEGIN EXTI0_IRQn 1 */
|
/* USER CODE BEGIN EXTI0_IRQn 1 */
|
||||||
|
|
||||||
/* USER CODE END EXTI0_IRQn 1 */
|
/* USER CODE END EXTI0_IRQn 1 */
|
||||||
@@ -221,7 +225,11 @@ void EXTI3_IRQHandler(void)
|
|||||||
/* USER CODE BEGIN EXTI3_IRQn 0 */
|
/* USER CODE BEGIN EXTI3_IRQn 0 */
|
||||||
|
|
||||||
/* USER CODE END EXTI3_IRQn 0 */
|
/* USER CODE END EXTI3_IRQn 0 */
|
||||||
|
<<<<<<< HEAD
|
||||||
HAL_GPIO_EXTI_IRQHandler(CMPS_INT_Pin);
|
HAL_GPIO_EXTI_IRQHandler(CMPS_INT_Pin);
|
||||||
|
=======
|
||||||
|
HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_3);
|
||||||
|
>>>>>>> upper
|
||||||
/* USER CODE BEGIN EXTI3_IRQn 1 */
|
/* USER CODE BEGIN EXTI3_IRQn 1 */
|
||||||
|
|
||||||
/* USER CODE END EXTI3_IRQn 1 */
|
/* USER CODE END EXTI3_IRQn 1 */
|
||||||
@@ -235,7 +243,11 @@ void EXTI4_IRQHandler(void)
|
|||||||
/* USER CODE BEGIN EXTI4_IRQn 0 */
|
/* USER CODE BEGIN EXTI4_IRQn 0 */
|
||||||
|
|
||||||
/* USER CODE END EXTI4_IRQn 0 */
|
/* USER CODE END EXTI4_IRQn 0 */
|
||||||
|
<<<<<<< HEAD
|
||||||
HAL_GPIO_EXTI_IRQHandler(ACCL_INT_Pin);
|
HAL_GPIO_EXTI_IRQHandler(ACCL_INT_Pin);
|
||||||
|
=======
|
||||||
|
HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_4);
|
||||||
|
>>>>>>> upper
|
||||||
/* USER CODE BEGIN EXTI4_IRQn 1 */
|
/* USER CODE BEGIN EXTI4_IRQn 1 */
|
||||||
|
|
||||||
/* USER CODE END EXTI4_IRQn 1 */
|
/* USER CODE END EXTI4_IRQn 1 */
|
||||||
@@ -270,6 +282,8 @@ void DMA1_Stream2_IRQHandler(void)
|
|||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
<<<<<<< HEAD
|
||||||
|
=======
|
||||||
* @brief This function handles CAN1 TX interrupts.
|
* @brief This function handles CAN1 TX interrupts.
|
||||||
*/
|
*/
|
||||||
void CAN1_TX_IRQHandler(void)
|
void CAN1_TX_IRQHandler(void)
|
||||||
@@ -284,6 +298,7 @@ void CAN1_TX_IRQHandler(void)
|
|||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
>>>>>>> upper
|
||||||
* @brief This function handles CAN1 RX0 interrupts.
|
* @brief This function handles CAN1 RX0 interrupts.
|
||||||
*/
|
*/
|
||||||
void CAN1_RX0_IRQHandler(void)
|
void CAN1_RX0_IRQHandler(void)
|
||||||
@@ -319,7 +334,11 @@ void EXTI9_5_IRQHandler(void)
|
|||||||
/* USER CODE BEGIN EXTI9_5_IRQn 0 */
|
/* USER CODE BEGIN EXTI9_5_IRQn 0 */
|
||||||
|
|
||||||
/* USER CODE END EXTI9_5_IRQn 0 */
|
/* USER CODE END EXTI9_5_IRQn 0 */
|
||||||
|
<<<<<<< HEAD
|
||||||
HAL_GPIO_EXTI_IRQHandler(GYRO_INT_Pin);
|
HAL_GPIO_EXTI_IRQHandler(GYRO_INT_Pin);
|
||||||
|
=======
|
||||||
|
HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_5);
|
||||||
|
>>>>>>> upper
|
||||||
/* USER CODE BEGIN EXTI9_5_IRQn 1 */
|
/* USER CODE BEGIN EXTI9_5_IRQn 1 */
|
||||||
|
|
||||||
/* USER CODE END EXTI9_5_IRQn 1 */
|
/* USER CODE END EXTI9_5_IRQn 1 */
|
||||||
@@ -349,6 +368,10 @@ void USART1_IRQHandler(void)
|
|||||||
/* USER CODE END USART1_IRQn 0 */
|
/* USER CODE END USART1_IRQn 0 */
|
||||||
HAL_UART_IRQHandler(&huart1);
|
HAL_UART_IRQHandler(&huart1);
|
||||||
/* USER CODE BEGIN USART1_IRQn 1 */
|
/* USER CODE BEGIN USART1_IRQn 1 */
|
||||||
|
<<<<<<< HEAD
|
||||||
|
=======
|
||||||
|
BSP_UART_IRQHandler(&huart1);
|
||||||
|
>>>>>>> upper
|
||||||
|
|
||||||
/* USER CODE END USART1_IRQn 1 */
|
/* USER CODE END USART1_IRQn 1 */
|
||||||
}
|
}
|
||||||
@@ -424,6 +447,8 @@ void DMA2_Stream3_IRQHandler(void)
|
|||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
<<<<<<< HEAD
|
||||||
|
=======
|
||||||
* @brief This function handles CAN2 TX interrupts.
|
* @brief This function handles CAN2 TX interrupts.
|
||||||
*/
|
*/
|
||||||
void CAN2_TX_IRQHandler(void)
|
void CAN2_TX_IRQHandler(void)
|
||||||
@@ -438,6 +463,7 @@ void CAN2_TX_IRQHandler(void)
|
|||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
>>>>>>> upper
|
||||||
* @brief This function handles CAN2 RX0 interrupts.
|
* @brief This function handles CAN2 RX0 interrupts.
|
||||||
*/
|
*/
|
||||||
void CAN2_RX0_IRQHandler(void)
|
void CAN2_RX0_IRQHandler(void)
|
||||||
@@ -539,3 +565,7 @@ void USART6_IRQHandler(void)
|
|||||||
/* USER CODE BEGIN 1 */
|
/* USER CODE BEGIN 1 */
|
||||||
|
|
||||||
/* USER CODE END 1 */
|
/* USER CODE END 1 */
|
||||||
|
<<<<<<< HEAD
|
||||||
|
=======
|
||||||
|
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||||
|
>>>>>>> upper
|
||||||
|
|||||||
83
Core/Src/stm32h7xx_hal_msp.c
Normal file
83
Core/Src/stm32h7xx_hal_msp.c
Normal file
@@ -0,0 +1,83 @@
|
|||||||
|
/* USER CODE BEGIN Header */
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file stm32h7xx_hal_msp.c
|
||||||
|
* @brief This file provides code for the MSP Initialization
|
||||||
|
* and de-Initialization codes.
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* Copyright (c) 2026 STMicroelectronics.
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* This software is licensed under terms that can be found in the LICENSE file
|
||||||
|
* in the root directory of this software component.
|
||||||
|
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
/* USER CODE END Header */
|
||||||
|
|
||||||
|
/* Includes ------------------------------------------------------------------*/
|
||||||
|
#include "main.h"
|
||||||
|
/* USER CODE BEGIN Includes */
|
||||||
|
|
||||||
|
/* USER CODE END Includes */
|
||||||
|
|
||||||
|
/* Private typedef -----------------------------------------------------------*/
|
||||||
|
/* USER CODE BEGIN TD */
|
||||||
|
|
||||||
|
/* USER CODE END TD */
|
||||||
|
|
||||||
|
/* Private define ------------------------------------------------------------*/
|
||||||
|
/* USER CODE BEGIN Define */
|
||||||
|
|
||||||
|
/* USER CODE END Define */
|
||||||
|
|
||||||
|
/* Private macro -------------------------------------------------------------*/
|
||||||
|
/* USER CODE BEGIN Macro */
|
||||||
|
|
||||||
|
/* USER CODE END Macro */
|
||||||
|
|
||||||
|
/* Private variables ---------------------------------------------------------*/
|
||||||
|
/* USER CODE BEGIN PV */
|
||||||
|
|
||||||
|
/* USER CODE END PV */
|
||||||
|
|
||||||
|
/* Private function prototypes -----------------------------------------------*/
|
||||||
|
/* USER CODE BEGIN PFP */
|
||||||
|
|
||||||
|
/* USER CODE END PFP */
|
||||||
|
|
||||||
|
/* External functions --------------------------------------------------------*/
|
||||||
|
/* USER CODE BEGIN ExternalFunctions */
|
||||||
|
|
||||||
|
/* USER CODE END ExternalFunctions */
|
||||||
|
|
||||||
|
/* USER CODE BEGIN 0 */
|
||||||
|
|
||||||
|
/* USER CODE END 0 */
|
||||||
|
/**
|
||||||
|
* Initializes the Global MSP.
|
||||||
|
*/
|
||||||
|
void HAL_MspInit(void)
|
||||||
|
{
|
||||||
|
|
||||||
|
/* USER CODE BEGIN MspInit 0 */
|
||||||
|
|
||||||
|
/* USER CODE END MspInit 0 */
|
||||||
|
|
||||||
|
__HAL_RCC_SYSCFG_CLK_ENABLE();
|
||||||
|
|
||||||
|
/* System interrupt init*/
|
||||||
|
/* PendSV_IRQn interrupt configuration */
|
||||||
|
HAL_NVIC_SetPriority(PendSV_IRQn, 15, 0);
|
||||||
|
|
||||||
|
/* USER CODE BEGIN MspInit 1 */
|
||||||
|
|
||||||
|
/* USER CODE END MspInit 1 */
|
||||||
|
}
|
||||||
|
|
||||||
|
/* USER CODE BEGIN 1 */
|
||||||
|
|
||||||
|
/* USER CODE END 1 */
|
||||||
121
Core/Src/stm32h7xx_hal_timebase_tim.c
Normal file
121
Core/Src/stm32h7xx_hal_timebase_tim.c
Normal file
@@ -0,0 +1,121 @@
|
|||||||
|
/* USER CODE BEGIN Header */
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file stm32h7xx_hal_timebase_tim.c
|
||||||
|
* @brief HAL time base based on the hardware TIM.
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* Copyright (c) 2026 STMicroelectronics.
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* This software is licensed under terms that can be found in the LICENSE file
|
||||||
|
* in the root directory of this software component.
|
||||||
|
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
/* USER CODE END Header */
|
||||||
|
|
||||||
|
/* Includes ------------------------------------------------------------------*/
|
||||||
|
#include "stm32h7xx_hal.h"
|
||||||
|
#include "stm32h7xx_hal_tim.h"
|
||||||
|
|
||||||
|
/* Private typedef -----------------------------------------------------------*/
|
||||||
|
/* Private define ------------------------------------------------------------*/
|
||||||
|
/* Private macro -------------------------------------------------------------*/
|
||||||
|
/* Private variables ---------------------------------------------------------*/
|
||||||
|
TIM_HandleTypeDef htim23;
|
||||||
|
/* Private function prototypes -----------------------------------------------*/
|
||||||
|
/* Private functions ---------------------------------------------------------*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief This function configures the TIM23 as a time base source.
|
||||||
|
* The time source is configured to have 1ms time base with a dedicated
|
||||||
|
* Tick interrupt priority.
|
||||||
|
* @note This function is called automatically at the beginning of program after
|
||||||
|
* reset by HAL_Init() or at any time when clock is configured, by HAL_RCC_ClockConfig().
|
||||||
|
* @param TickPriority: Tick interrupt priority.
|
||||||
|
* @retval HAL status
|
||||||
|
*/
|
||||||
|
HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
|
||||||
|
{
|
||||||
|
RCC_ClkInitTypeDef clkconfig;
|
||||||
|
uint32_t uwTimclock;
|
||||||
|
uint32_t uwPrescalerValue;
|
||||||
|
uint32_t pFLatency;
|
||||||
|
|
||||||
|
/*Configure the TIM23 IRQ priority */
|
||||||
|
if (TickPriority < (1UL << __NVIC_PRIO_BITS))
|
||||||
|
{
|
||||||
|
HAL_NVIC_SetPriority(TIM23_IRQn, TickPriority ,0);
|
||||||
|
|
||||||
|
/* Enable the TIM23 global Interrupt */
|
||||||
|
HAL_NVIC_EnableIRQ(TIM23_IRQn);
|
||||||
|
uwTickPrio = TickPriority;
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
return HAL_ERROR;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Enable TIM23 clock */
|
||||||
|
__HAL_RCC_TIM23_CLK_ENABLE();
|
||||||
|
|
||||||
|
/* Get clock configuration */
|
||||||
|
HAL_RCC_GetClockConfig(&clkconfig, &pFLatency);
|
||||||
|
|
||||||
|
/* Compute TIM23 clock */
|
||||||
|
uwTimclock = 2*HAL_RCC_GetPCLK2Freq();
|
||||||
|
|
||||||
|
/* Compute the prescaler value to have TIM23 counter clock equal to 1MHz */
|
||||||
|
uwPrescalerValue = (uint32_t) ((uwTimclock / 1000000U) - 1U);
|
||||||
|
|
||||||
|
/* Initialize TIM23 */
|
||||||
|
htim23.Instance = TIM23;
|
||||||
|
|
||||||
|
/* Initialize TIMx peripheral as follow:
|
||||||
|
* Period = [(TIM23CLK/1000) - 1]. to have a (1/1000) s time base.
|
||||||
|
* Prescaler = (uwTimclock/1000000 - 1) to have a 1MHz counter clock.
|
||||||
|
* ClockDivision = 0
|
||||||
|
* Counter direction = Up
|
||||||
|
*/
|
||||||
|
htim23.Init.Period = (1000000U / 1000U) - 1U;
|
||||||
|
htim23.Init.Prescaler = uwPrescalerValue;
|
||||||
|
htim23.Init.ClockDivision = 0;
|
||||||
|
htim23.Init.CounterMode = TIM_COUNTERMODE_UP;
|
||||||
|
|
||||||
|
if(HAL_TIM_Base_Init(&htim23) == HAL_OK)
|
||||||
|
{
|
||||||
|
/* Start the TIM time Base generation in interrupt mode */
|
||||||
|
return HAL_TIM_Base_Start_IT(&htim23);
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Return function status */
|
||||||
|
return HAL_ERROR;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Suspend Tick increment.
|
||||||
|
* @note Disable the tick increment by disabling TIM23 update interrupt.
|
||||||
|
* @param None
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
void HAL_SuspendTick(void)
|
||||||
|
{
|
||||||
|
/* Disable TIM23 update Interrupt */
|
||||||
|
__HAL_TIM_DISABLE_IT(&htim23, TIM_IT_UPDATE);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Resume Tick increment.
|
||||||
|
* @note Enable the tick increment by Enabling TIM23 update interrupt.
|
||||||
|
* @param None
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
void HAL_ResumeTick(void)
|
||||||
|
{
|
||||||
|
/* Enable TIM23 Update interrupt */
|
||||||
|
__HAL_TIM_ENABLE_IT(&htim23, TIM_IT_UPDATE);
|
||||||
|
}
|
||||||
|
|
||||||
508
Core/Src/stm32h7xx_it.c
Normal file
508
Core/Src/stm32h7xx_it.c
Normal file
@@ -0,0 +1,508 @@
|
|||||||
|
/* USER CODE BEGIN Header */
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file stm32h7xx_it.c
|
||||||
|
* @brief Interrupt Service Routines.
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* Copyright (c) 2026 STMicroelectronics.
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* This software is licensed under terms that can be found in the LICENSE file
|
||||||
|
* in the root directory of this software component.
|
||||||
|
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
/* USER CODE END Header */
|
||||||
|
|
||||||
|
/* Includes ------------------------------------------------------------------*/
|
||||||
|
#include "main.h"
|
||||||
|
#include "stm32h7xx_it.h"
|
||||||
|
/* Private includes ----------------------------------------------------------*/
|
||||||
|
/* USER CODE BEGIN Includes */
|
||||||
|
#include "bsp/uart.h"
|
||||||
|
/* USER CODE END Includes */
|
||||||
|
|
||||||
|
/* Private typedef -----------------------------------------------------------*/
|
||||||
|
/* USER CODE BEGIN TD */
|
||||||
|
|
||||||
|
/* USER CODE END TD */
|
||||||
|
|
||||||
|
/* Private define ------------------------------------------------------------*/
|
||||||
|
/* USER CODE BEGIN PD */
|
||||||
|
|
||||||
|
/* USER CODE END PD */
|
||||||
|
|
||||||
|
/* Private macro -------------------------------------------------------------*/
|
||||||
|
/* USER CODE BEGIN PM */
|
||||||
|
|
||||||
|
/* USER CODE END PM */
|
||||||
|
|
||||||
|
/* Private variables ---------------------------------------------------------*/
|
||||||
|
/* USER CODE BEGIN PV */
|
||||||
|
|
||||||
|
/* USER CODE END PV */
|
||||||
|
|
||||||
|
/* Private function prototypes -----------------------------------------------*/
|
||||||
|
/* USER CODE BEGIN PFP */
|
||||||
|
|
||||||
|
/* USER CODE END PFP */
|
||||||
|
|
||||||
|
/* Private user code ---------------------------------------------------------*/
|
||||||
|
/* USER CODE BEGIN 0 */
|
||||||
|
|
||||||
|
/* USER CODE END 0 */
|
||||||
|
|
||||||
|
/* External variables --------------------------------------------------------*/
|
||||||
|
extern DMA_HandleTypeDef hdma_adc1;
|
||||||
|
extern DMA_HandleTypeDef hdma_adc3;
|
||||||
|
extern ADC_HandleTypeDef hadc3;
|
||||||
|
extern FDCAN_HandleTypeDef hfdcan1;
|
||||||
|
extern FDCAN_HandleTypeDef hfdcan2;
|
||||||
|
extern FDCAN_HandleTypeDef hfdcan3;
|
||||||
|
extern DMA_HandleTypeDef hdma_spi2_rx;
|
||||||
|
extern DMA_HandleTypeDef hdma_spi2_tx;
|
||||||
|
extern SPI_HandleTypeDef hspi2;
|
||||||
|
extern DMA_HandleTypeDef hdma_uart5_rx;
|
||||||
|
extern DMA_HandleTypeDef hdma_usart1_tx;
|
||||||
|
extern DMA_HandleTypeDef hdma_usart1_rx;
|
||||||
|
extern UART_HandleTypeDef huart5;
|
||||||
|
extern UART_HandleTypeDef huart7;
|
||||||
|
extern UART_HandleTypeDef huart1;
|
||||||
|
extern UART_HandleTypeDef huart2;
|
||||||
|
extern UART_HandleTypeDef huart3;
|
||||||
|
extern UART_HandleTypeDef huart10;
|
||||||
|
extern TIM_HandleTypeDef htim23;
|
||||||
|
|
||||||
|
/* USER CODE BEGIN EV */
|
||||||
|
|
||||||
|
/* USER CODE END EV */
|
||||||
|
|
||||||
|
/******************************************************************************/
|
||||||
|
/* Cortex Processor Interruption and Exception Handlers */
|
||||||
|
/******************************************************************************/
|
||||||
|
/**
|
||||||
|
* @brief This function handles Non maskable interrupt.
|
||||||
|
*/
|
||||||
|
void NMI_Handler(void)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
|
||||||
|
|
||||||
|
/* USER CODE END NonMaskableInt_IRQn 0 */
|
||||||
|
/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
|
||||||
|
while (1)
|
||||||
|
{
|
||||||
|
}
|
||||||
|
/* USER CODE END NonMaskableInt_IRQn 1 */
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief This function handles Hard fault interrupt.
|
||||||
|
*/
|
||||||
|
void HardFault_Handler(void)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN HardFault_IRQn 0 */
|
||||||
|
|
||||||
|
/* USER CODE END HardFault_IRQn 0 */
|
||||||
|
while (1)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN W1_HardFault_IRQn 0 */
|
||||||
|
/* USER CODE END W1_HardFault_IRQn 0 */
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief This function handles Memory management fault.
|
||||||
|
*/
|
||||||
|
void MemManage_Handler(void)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN MemoryManagement_IRQn 0 */
|
||||||
|
|
||||||
|
/* USER CODE END MemoryManagement_IRQn 0 */
|
||||||
|
while (1)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
|
||||||
|
/* USER CODE END W1_MemoryManagement_IRQn 0 */
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief This function handles Pre-fetch fault, memory access fault.
|
||||||
|
*/
|
||||||
|
void BusFault_Handler(void)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN BusFault_IRQn 0 */
|
||||||
|
|
||||||
|
/* USER CODE END BusFault_IRQn 0 */
|
||||||
|
while (1)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN W1_BusFault_IRQn 0 */
|
||||||
|
/* USER CODE END W1_BusFault_IRQn 0 */
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief This function handles Undefined instruction or illegal state.
|
||||||
|
*/
|
||||||
|
void UsageFault_Handler(void)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN UsageFault_IRQn 0 */
|
||||||
|
|
||||||
|
/* USER CODE END UsageFault_IRQn 0 */
|
||||||
|
while (1)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN W1_UsageFault_IRQn 0 */
|
||||||
|
/* USER CODE END W1_UsageFault_IRQn 0 */
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief This function handles Debug monitor.
|
||||||
|
*/
|
||||||
|
void DebugMon_Handler(void)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN DebugMonitor_IRQn 0 */
|
||||||
|
|
||||||
|
/* USER CODE END DebugMonitor_IRQn 0 */
|
||||||
|
/* USER CODE BEGIN DebugMonitor_IRQn 1 */
|
||||||
|
|
||||||
|
/* USER CODE END DebugMonitor_IRQn 1 */
|
||||||
|
}
|
||||||
|
|
||||||
|
/******************************************************************************/
|
||||||
|
/* STM32H7xx Peripheral Interrupt Handlers */
|
||||||
|
/* Add here the Interrupt Handlers for the used peripherals. */
|
||||||
|
/* For the available peripheral interrupt handler names, */
|
||||||
|
/* please refer to the startup file (startup_stm32h7xx.s). */
|
||||||
|
/******************************************************************************/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief This function handles DMA1 stream0 global interrupt.
|
||||||
|
*/
|
||||||
|
void DMA1_Stream0_IRQHandler(void)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN DMA1_Stream0_IRQn 0 */
|
||||||
|
|
||||||
|
/* USER CODE END DMA1_Stream0_IRQn 0 */
|
||||||
|
HAL_DMA_IRQHandler(&hdma_adc1);
|
||||||
|
/* USER CODE BEGIN DMA1_Stream0_IRQn 1 */
|
||||||
|
|
||||||
|
/* USER CODE END DMA1_Stream0_IRQn 1 */
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief This function handles DMA1 stream1 global interrupt.
|
||||||
|
*/
|
||||||
|
void DMA1_Stream1_IRQHandler(void)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN DMA1_Stream1_IRQn 0 */
|
||||||
|
|
||||||
|
/* USER CODE END DMA1_Stream1_IRQn 0 */
|
||||||
|
HAL_DMA_IRQHandler(&hdma_spi2_rx);
|
||||||
|
/* USER CODE BEGIN DMA1_Stream1_IRQn 1 */
|
||||||
|
|
||||||
|
/* USER CODE END DMA1_Stream1_IRQn 1 */
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief This function handles DMA1 stream2 global interrupt.
|
||||||
|
*/
|
||||||
|
void DMA1_Stream2_IRQHandler(void)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN DMA1_Stream2_IRQn 0 */
|
||||||
|
|
||||||
|
/* USER CODE END DMA1_Stream2_IRQn 0 */
|
||||||
|
HAL_DMA_IRQHandler(&hdma_spi2_tx);
|
||||||
|
/* USER CODE BEGIN DMA1_Stream2_IRQn 1 */
|
||||||
|
|
||||||
|
/* USER CODE END DMA1_Stream2_IRQn 1 */
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief This function handles DMA1 stream3 global interrupt.
|
||||||
|
*/
|
||||||
|
void DMA1_Stream3_IRQHandler(void)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN DMA1_Stream3_IRQn 0 */
|
||||||
|
|
||||||
|
/* USER CODE END DMA1_Stream3_IRQn 0 */
|
||||||
|
HAL_DMA_IRQHandler(&hdma_uart5_rx);
|
||||||
|
/* USER CODE BEGIN DMA1_Stream3_IRQn 1 */
|
||||||
|
|
||||||
|
/* USER CODE END DMA1_Stream3_IRQn 1 */
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief This function handles DMA1 stream4 global interrupt.
|
||||||
|
*/
|
||||||
|
void DMA1_Stream4_IRQHandler(void)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN DMA1_Stream4_IRQn 0 */
|
||||||
|
|
||||||
|
/* USER CODE END DMA1_Stream4_IRQn 0 */
|
||||||
|
HAL_DMA_IRQHandler(&hdma_usart1_tx);
|
||||||
|
/* USER CODE BEGIN DMA1_Stream4_IRQn 1 */
|
||||||
|
|
||||||
|
/* USER CODE END DMA1_Stream4_IRQn 1 */
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief This function handles DMA1 stream5 global interrupt.
|
||||||
|
*/
|
||||||
|
void DMA1_Stream5_IRQHandler(void)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN DMA1_Stream5_IRQn 0 */
|
||||||
|
|
||||||
|
/* USER CODE END DMA1_Stream5_IRQn 0 */
|
||||||
|
HAL_DMA_IRQHandler(&hdma_usart1_rx);
|
||||||
|
/* USER CODE BEGIN DMA1_Stream5_IRQn 1 */
|
||||||
|
|
||||||
|
/* USER CODE END DMA1_Stream5_IRQn 1 */
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief This function handles FDCAN1 interrupt 0.
|
||||||
|
*/
|
||||||
|
void FDCAN1_IT0_IRQHandler(void)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN FDCAN1_IT0_IRQn 0 */
|
||||||
|
|
||||||
|
/* USER CODE END FDCAN1_IT0_IRQn 0 */
|
||||||
|
HAL_FDCAN_IRQHandler(&hfdcan1);
|
||||||
|
/* USER CODE BEGIN FDCAN1_IT0_IRQn 1 */
|
||||||
|
|
||||||
|
/* USER CODE END FDCAN1_IT0_IRQn 1 */
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief This function handles FDCAN2 interrupt 0.
|
||||||
|
*/
|
||||||
|
void FDCAN2_IT0_IRQHandler(void)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN FDCAN2_IT0_IRQn 0 */
|
||||||
|
|
||||||
|
/* USER CODE END FDCAN2_IT0_IRQn 0 */
|
||||||
|
HAL_FDCAN_IRQHandler(&hfdcan2);
|
||||||
|
/* USER CODE BEGIN FDCAN2_IT0_IRQn 1 */
|
||||||
|
|
||||||
|
/* USER CODE END FDCAN2_IT0_IRQn 1 */
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief This function handles FDCAN1 interrupt 1.
|
||||||
|
*/
|
||||||
|
void FDCAN1_IT1_IRQHandler(void)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN FDCAN1_IT1_IRQn 0 */
|
||||||
|
|
||||||
|
/* USER CODE END FDCAN1_IT1_IRQn 0 */
|
||||||
|
HAL_FDCAN_IRQHandler(&hfdcan1);
|
||||||
|
/* USER CODE BEGIN FDCAN1_IT1_IRQn 1 */
|
||||||
|
|
||||||
|
/* USER CODE END FDCAN1_IT1_IRQn 1 */
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief This function handles FDCAN2 interrupt 1.
|
||||||
|
*/
|
||||||
|
void FDCAN2_IT1_IRQHandler(void)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN FDCAN2_IT1_IRQn 0 */
|
||||||
|
|
||||||
|
/* USER CODE END FDCAN2_IT1_IRQn 0 */
|
||||||
|
HAL_FDCAN_IRQHandler(&hfdcan2);
|
||||||
|
/* USER CODE BEGIN FDCAN2_IT1_IRQn 1 */
|
||||||
|
|
||||||
|
/* USER CODE END FDCAN2_IT1_IRQn 1 */
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief This function handles SPI2 global interrupt.
|
||||||
|
*/
|
||||||
|
void SPI2_IRQHandler(void)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN SPI2_IRQn 0 */
|
||||||
|
|
||||||
|
/* USER CODE END SPI2_IRQn 0 */
|
||||||
|
HAL_SPI_IRQHandler(&hspi2);
|
||||||
|
/* USER CODE BEGIN SPI2_IRQn 1 */
|
||||||
|
|
||||||
|
/* USER CODE END SPI2_IRQn 1 */
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief This function handles USART1 global interrupt.
|
||||||
|
*/
|
||||||
|
void USART1_IRQHandler(void)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN USART1_IRQn 0 */
|
||||||
|
|
||||||
|
/* USER CODE END USART1_IRQn 0 */
|
||||||
|
HAL_UART_IRQHandler(&huart1);
|
||||||
|
/* USER CODE BEGIN USART1_IRQn 1 */
|
||||||
|
BSP_UART_IRQHandler(&huart1);
|
||||||
|
|
||||||
|
/* USER CODE END USART1_IRQn 1 */
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief This function handles USART2 global interrupt.
|
||||||
|
*/
|
||||||
|
void USART2_IRQHandler(void)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN USART2_IRQn 0 */
|
||||||
|
|
||||||
|
/* USER CODE END USART2_IRQn 0 */
|
||||||
|
HAL_UART_IRQHandler(&huart2);
|
||||||
|
/* USER CODE BEGIN USART2_IRQn 1 */
|
||||||
|
|
||||||
|
/* USER CODE END USART2_IRQn 1 */
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief This function handles USART3 global interrupt.
|
||||||
|
*/
|
||||||
|
void USART3_IRQHandler(void)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN USART3_IRQn 0 */
|
||||||
|
|
||||||
|
/* USER CODE END USART3_IRQn 0 */
|
||||||
|
HAL_UART_IRQHandler(&huart3);
|
||||||
|
/* USER CODE BEGIN USART3_IRQn 1 */
|
||||||
|
|
||||||
|
/* USER CODE END USART3_IRQn 1 */
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief This function handles EXTI line[15:10] interrupts.
|
||||||
|
*/
|
||||||
|
void EXTI15_10_IRQHandler(void)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN EXTI15_10_IRQn 0 */
|
||||||
|
|
||||||
|
/* USER CODE END EXTI15_10_IRQn 0 */
|
||||||
|
HAL_GPIO_EXTI_IRQHandler(ACCL_INT_Pin);
|
||||||
|
HAL_GPIO_EXTI_IRQHandler(GYRO_INT_Pin);
|
||||||
|
/* USER CODE BEGIN EXTI15_10_IRQn 1 */
|
||||||
|
|
||||||
|
/* USER CODE END EXTI15_10_IRQn 1 */
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief This function handles UART5 global interrupt.
|
||||||
|
*/
|
||||||
|
void UART5_IRQHandler(void)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN UART5_IRQn 0 */
|
||||||
|
|
||||||
|
/* USER CODE END UART5_IRQn 0 */
|
||||||
|
HAL_UART_IRQHandler(&huart5);
|
||||||
|
/* USER CODE BEGIN UART5_IRQn 1 */
|
||||||
|
BSP_UART_IRQHandler(&huart5);
|
||||||
|
|
||||||
|
/* USER CODE END UART5_IRQn 1 */
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief This function handles UART7 global interrupt.
|
||||||
|
*/
|
||||||
|
void UART7_IRQHandler(void)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN UART7_IRQn 0 */
|
||||||
|
|
||||||
|
/* USER CODE END UART7_IRQn 0 */
|
||||||
|
HAL_UART_IRQHandler(&huart7);
|
||||||
|
/* USER CODE BEGIN UART7_IRQn 1 */
|
||||||
|
|
||||||
|
/* USER CODE END UART7_IRQn 1 */
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief This function handles ADC3 global interrupt.
|
||||||
|
*/
|
||||||
|
void ADC3_IRQHandler(void)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN ADC3_IRQn 0 */
|
||||||
|
|
||||||
|
/* USER CODE END ADC3_IRQn 0 */
|
||||||
|
HAL_ADC_IRQHandler(&hadc3);
|
||||||
|
/* USER CODE BEGIN ADC3_IRQn 1 */
|
||||||
|
|
||||||
|
/* USER CODE END ADC3_IRQn 1 */
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief This function handles BDMA channel0 global interrupt.
|
||||||
|
*/
|
||||||
|
void BDMA_Channel0_IRQHandler(void)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN BDMA_Channel0_IRQn 0 */
|
||||||
|
|
||||||
|
/* USER CODE END BDMA_Channel0_IRQn 0 */
|
||||||
|
HAL_DMA_IRQHandler(&hdma_adc3);
|
||||||
|
/* USER CODE BEGIN BDMA_Channel0_IRQn 1 */
|
||||||
|
|
||||||
|
/* USER CODE END BDMA_Channel0_IRQn 1 */
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief This function handles USART10 global interrupt.
|
||||||
|
*/
|
||||||
|
void USART10_IRQHandler(void)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN USART10_IRQn 0 */
|
||||||
|
|
||||||
|
/* USER CODE END USART10_IRQn 0 */
|
||||||
|
HAL_UART_IRQHandler(&huart10);
|
||||||
|
/* USER CODE BEGIN USART10_IRQn 1 */
|
||||||
|
|
||||||
|
/* USER CODE END USART10_IRQn 1 */
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief This function handles FDCAN3 interrupt 0.
|
||||||
|
*/
|
||||||
|
void FDCAN3_IT0_IRQHandler(void)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN FDCAN3_IT0_IRQn 0 */
|
||||||
|
|
||||||
|
/* USER CODE END FDCAN3_IT0_IRQn 0 */
|
||||||
|
HAL_FDCAN_IRQHandler(&hfdcan3);
|
||||||
|
/* USER CODE BEGIN FDCAN3_IT0_IRQn 1 */
|
||||||
|
|
||||||
|
/* USER CODE END FDCAN3_IT0_IRQn 1 */
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief This function handles FDCAN3 interrupt 1.
|
||||||
|
*/
|
||||||
|
void FDCAN3_IT1_IRQHandler(void)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN FDCAN3_IT1_IRQn 0 */
|
||||||
|
|
||||||
|
/* USER CODE END FDCAN3_IT1_IRQn 0 */
|
||||||
|
HAL_FDCAN_IRQHandler(&hfdcan3);
|
||||||
|
/* USER CODE BEGIN FDCAN3_IT1_IRQn 1 */
|
||||||
|
|
||||||
|
/* USER CODE END FDCAN3_IT1_IRQn 1 */
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief This function handles TIM23 global interrupt.
|
||||||
|
*/
|
||||||
|
void TIM23_IRQHandler(void)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN TIM23_IRQn 0 */
|
||||||
|
|
||||||
|
/* USER CODE END TIM23_IRQn 0 */
|
||||||
|
HAL_TIM_IRQHandler(&htim23);
|
||||||
|
/* USER CODE BEGIN TIM23_IRQn 1 */
|
||||||
|
|
||||||
|
/* USER CODE END TIM23_IRQn 1 */
|
||||||
|
}
|
||||||
|
|
||||||
|
/* USER CODE BEGIN 1 */
|
||||||
|
|
||||||
|
/* USER CODE END 1 */
|
||||||
@@ -6,19 +6,11 @@
|
|||||||
*
|
*
|
||||||
* For more information about which c-functions
|
* For more information about which c-functions
|
||||||
* need which of these lowlevel functions
|
* need which of these lowlevel functions
|
||||||
<<<<<<< HEAD
|
|
||||||
* please consult the Newlib or Picolibc libc-manual
|
* please consult the Newlib or Picolibc libc-manual
|
||||||
******************************************************************************
|
******************************************************************************
|
||||||
* @attention
|
* @attention
|
||||||
*
|
*
|
||||||
* Copyright (c) 2020-2025 STMicroelectronics.
|
* Copyright (c) 2020-2025 STMicroelectronics.
|
||||||
=======
|
|
||||||
* please consult the Newlib libc-manual
|
|
||||||
******************************************************************************
|
|
||||||
* @attention
|
|
||||||
*
|
|
||||||
* Copyright (c) 2020-2024 STMicroelectronics.
|
|
||||||
>>>>>>> main
|
|
||||||
* All rights reserved.
|
* All rights reserved.
|
||||||
*
|
*
|
||||||
* This software is licensed under terms that can be found in the LICENSE file
|
* This software is licensed under terms that can be found in the LICENSE file
|
||||||
@@ -147,21 +139,13 @@ int _unlink(char *name)
|
|||||||
return -1;
|
return -1;
|
||||||
}
|
}
|
||||||
|
|
||||||
<<<<<<< HEAD
|
|
||||||
clock_t _times(struct tms *buf)
|
clock_t _times(struct tms *buf)
|
||||||
=======
|
|
||||||
int _times(struct tms *buf)
|
|
||||||
>>>>>>> main
|
|
||||||
{
|
{
|
||||||
(void)buf;
|
(void)buf;
|
||||||
return -1;
|
return -1;
|
||||||
}
|
}
|
||||||
|
|
||||||
<<<<<<< HEAD
|
|
||||||
int _stat(const char *file, struct stat *st)
|
int _stat(const char *file, struct stat *st)
|
||||||
=======
|
|
||||||
int _stat(char *file, struct stat *st)
|
|
||||||
>>>>>>> main
|
|
||||||
{
|
{
|
||||||
(void)file;
|
(void)file;
|
||||||
st->st_mode = S_IFCHR;
|
st->st_mode = S_IFCHR;
|
||||||
@@ -190,7 +174,6 @@ int _execve(char *name, char **argv, char **env)
|
|||||||
errno = ENOMEM;
|
errno = ENOMEM;
|
||||||
return -1;
|
return -1;
|
||||||
}
|
}
|
||||||
<<<<<<< HEAD
|
|
||||||
|
|
||||||
// --- Picolibc Specific Section ---
|
// --- Picolibc Specific Section ---
|
||||||
#if defined(__PICOLIBC__)
|
#if defined(__PICOLIBC__)
|
||||||
@@ -259,5 +242,3 @@ __strong_reference(_kill, kill);
|
|||||||
__strong_reference(_getpid, getpid);
|
__strong_reference(_getpid, getpid);
|
||||||
|
|
||||||
#endif //__PICOLIBC__
|
#endif //__PICOLIBC__
|
||||||
=======
|
|
||||||
>>>>>>> main
|
|
||||||
|
|||||||
@@ -6,19 +6,11 @@
|
|||||||
*
|
*
|
||||||
* For more information about which C functions
|
* For more information about which C functions
|
||||||
* need which of these lowlevel functions
|
* need which of these lowlevel functions
|
||||||
<<<<<<< HEAD
|
|
||||||
* please consult the Newlib or Picolibc libc manual
|
* please consult the Newlib or Picolibc libc manual
|
||||||
******************************************************************************
|
******************************************************************************
|
||||||
* @attention
|
* @attention
|
||||||
*
|
*
|
||||||
* Copyright (c) 2025 STMicroelectronics.
|
* Copyright (c) 2025 STMicroelectronics.
|
||||||
=======
|
|
||||||
* please consult the newlib libc manual
|
|
||||||
******************************************************************************
|
|
||||||
* @attention
|
|
||||||
*
|
|
||||||
* Copyright (c) 2024 STMicroelectronics.
|
|
||||||
>>>>>>> main
|
|
||||||
* All rights reserved.
|
* All rights reserved.
|
||||||
*
|
*
|
||||||
* This software is licensed under terms that can be found in the LICENSE file
|
* This software is licensed under terms that can be found in the LICENSE file
|
||||||
@@ -31,10 +23,7 @@
|
|||||||
/* Includes */
|
/* Includes */
|
||||||
#include <errno.h>
|
#include <errno.h>
|
||||||
#include <stdint.h>
|
#include <stdint.h>
|
||||||
<<<<<<< HEAD
|
|
||||||
#include <stddef.h>
|
#include <stddef.h>
|
||||||
=======
|
|
||||||
>>>>>>> main
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* Pointer to the current high watermark of the heap usage
|
* Pointer to the current high watermark of the heap usage
|
||||||
@@ -89,7 +78,6 @@ void *_sbrk(ptrdiff_t incr)
|
|||||||
|
|
||||||
return (void *)prev_heap_end;
|
return (void *)prev_heap_end;
|
||||||
}
|
}
|
||||||
<<<<<<< HEAD
|
|
||||||
|
|
||||||
#if defined(__PICOLIBC__)
|
#if defined(__PICOLIBC__)
|
||||||
// Picolibc expects syscalls without the leading underscore.
|
// Picolibc expects syscalls without the leading underscore.
|
||||||
@@ -97,5 +85,3 @@ void *_sbrk(ptrdiff_t incr)
|
|||||||
// calls to `sbrk()` are resolved to our `_sbrk()` implementation.
|
// calls to `sbrk()` are resolved to our `_sbrk()` implementation.
|
||||||
__strong_reference(_sbrk, sbrk);
|
__strong_reference(_sbrk, sbrk);
|
||||||
#endif
|
#endif
|
||||||
=======
|
|
||||||
>>>>>>> main
|
|
||||||
|
|||||||
556
Core/Src/system_stm32h7xx.c
Normal file
556
Core/Src/system_stm32h7xx.c
Normal file
@@ -0,0 +1,556 @@
|
|||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file system_stm32h7xx.c
|
||||||
|
* @author MCD Application Team
|
||||||
|
* @brief CMSIS Cortex-Mx Device Peripheral Access Layer System Source File.
|
||||||
|
*
|
||||||
|
* This file provides two functions and one global variable to be called from
|
||||||
|
* user application:
|
||||||
|
* - ExitRun0Mode(): Specifies the Power Supply source. This function is
|
||||||
|
* called at startup just after reset and before the call
|
||||||
|
* of SystemInit(). This call is made inside
|
||||||
|
* the "startup_stm32h7xx.s" file.
|
||||||
|
*
|
||||||
|
* - SystemInit(): This function is called at startup just after reset and
|
||||||
|
* before branch to main program. This call is made inside
|
||||||
|
* the "startup_stm32h7xx.s" file.
|
||||||
|
*
|
||||||
|
* - SystemCoreClock variable: Contains the core clock, it can be used
|
||||||
|
* by the user application to setup the SysTick
|
||||||
|
* timer or configure other parameters.
|
||||||
|
*
|
||||||
|
* - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
|
||||||
|
* be called whenever the core clock is changed
|
||||||
|
* during program execution.
|
||||||
|
*
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* Copyright (c) 2017 STMicroelectronics.
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* This software is licensed under terms that can be found in the LICENSE file
|
||||||
|
* in the root directory of this software component.
|
||||||
|
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup CMSIS
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup stm32h7xx_system
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup STM32H7xx_System_Private_Includes
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include "stm32h7xx.h"
|
||||||
|
#include <math.h>
|
||||||
|
|
||||||
|
#if !defined (HSE_VALUE)
|
||||||
|
#define HSE_VALUE ((uint32_t)25000000) /*!< Value of the External oscillator in Hz */
|
||||||
|
#endif /* HSE_VALUE */
|
||||||
|
|
||||||
|
#if !defined (CSI_VALUE)
|
||||||
|
#define CSI_VALUE ((uint32_t)4000000) /*!< Value of the Internal oscillator in Hz*/
|
||||||
|
#endif /* CSI_VALUE */
|
||||||
|
|
||||||
|
#if !defined (HSI_VALUE)
|
||||||
|
#define HSI_VALUE ((uint32_t)64000000) /*!< Value of the Internal oscillator in Hz*/
|
||||||
|
#endif /* HSI_VALUE */
|
||||||
|
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup STM32H7xx_System_Private_TypesDefinitions
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup STM32H7xx_System_Private_Defines
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/************************* Miscellaneous Configuration ************************/
|
||||||
|
/*!< Uncomment the following line if you need to use initialized data in D2 domain SRAM (AHB SRAM) */
|
||||||
|
/* #define DATA_IN_D2_SRAM */
|
||||||
|
|
||||||
|
/* Note: Following vector table addresses must be defined in line with linker
|
||||||
|
configuration. */
|
||||||
|
/*!< Uncomment the following line if you need to relocate the vector table
|
||||||
|
anywhere in FLASH BANK1 or AXI SRAM, else the vector table is kept at the automatic
|
||||||
|
remap of boot address selected */
|
||||||
|
/* #define USER_VECT_TAB_ADDRESS */
|
||||||
|
|
||||||
|
#if defined(USER_VECT_TAB_ADDRESS)
|
||||||
|
#if defined(DUAL_CORE) && defined(CORE_CM4)
|
||||||
|
/*!< Uncomment the following line if you need to relocate your vector Table
|
||||||
|
in D2 AXI SRAM else user remap will be done in FLASH BANK2. */
|
||||||
|
/* #define VECT_TAB_SRAM */
|
||||||
|
#if defined(VECT_TAB_SRAM)
|
||||||
|
#define VECT_TAB_BASE_ADDRESS D2_AXISRAM_BASE /*!< Vector Table base address field.
|
||||||
|
This value must be a multiple of 0x400. */
|
||||||
|
#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field.
|
||||||
|
This value must be a multiple of 0x400. */
|
||||||
|
#else
|
||||||
|
#define VECT_TAB_BASE_ADDRESS FLASH_BANK2_BASE /*!< Vector Table base address field.
|
||||||
|
This value must be a multiple of 0x400. */
|
||||||
|
#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field.
|
||||||
|
This value must be a multiple of 0x400. */
|
||||||
|
#endif /* VECT_TAB_SRAM */
|
||||||
|
#else
|
||||||
|
/*!< Uncomment the following line if you need to relocate your vector Table
|
||||||
|
in D1 AXI SRAM else user remap will be done in FLASH BANK1. */
|
||||||
|
/* #define VECT_TAB_SRAM */
|
||||||
|
#if defined(VECT_TAB_SRAM)
|
||||||
|
#define VECT_TAB_BASE_ADDRESS D1_AXISRAM_BASE /*!< Vector Table base address field.
|
||||||
|
This value must be a multiple of 0x400. */
|
||||||
|
#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field.
|
||||||
|
This value must be a multiple of 0x400. */
|
||||||
|
#else
|
||||||
|
#define VECT_TAB_BASE_ADDRESS FLASH_BANK1_BASE /*!< Vector Table base address field.
|
||||||
|
This value must be a multiple of 0x400. */
|
||||||
|
#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field.
|
||||||
|
This value must be a multiple of 0x400. */
|
||||||
|
#endif /* VECT_TAB_SRAM */
|
||||||
|
#endif /* DUAL_CORE && CORE_CM4 */
|
||||||
|
#endif /* USER_VECT_TAB_ADDRESS */
|
||||||
|
/******************************************************************************/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup STM32H7xx_System_Private_Macros
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup STM32H7xx_System_Private_Variables
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
/* This variable is updated in three ways:
|
||||||
|
1) by calling CMSIS function SystemCoreClockUpdate()
|
||||||
|
2) by calling HAL API function HAL_RCC_GetHCLKFreq()
|
||||||
|
3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
|
||||||
|
Note: If you use this function to configure the system clock; then there
|
||||||
|
is no need to call the 2 first functions listed above, since SystemCoreClock
|
||||||
|
variable is updated automatically.
|
||||||
|
*/
|
||||||
|
uint32_t SystemCoreClock = 64000000;
|
||||||
|
uint32_t SystemD2Clock = 64000000;
|
||||||
|
const uint8_t D1CorePrescTable[16] = {0, 0, 0, 0, 1, 2, 3, 4, 1, 2, 3, 4, 6, 7, 8, 9};
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup STM32H7xx_System_Private_FunctionPrototypes
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup STM32H7xx_System_Private_Functions
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Setup the microcontroller system
|
||||||
|
* Initialize the FPU setting and vector table location
|
||||||
|
* configuration.
|
||||||
|
* @param None
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
void SystemInit (void)
|
||||||
|
{
|
||||||
|
#if defined (DATA_IN_D2_SRAM)
|
||||||
|
__IO uint32_t tmpreg;
|
||||||
|
#endif /* DATA_IN_D2_SRAM */
|
||||||
|
|
||||||
|
/* FPU settings ------------------------------------------------------------*/
|
||||||
|
#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
|
||||||
|
SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2))); /* set CP10 and CP11 Full Access */
|
||||||
|
#endif
|
||||||
|
/* Reset the RCC clock configuration to the default reset state ------------*/
|
||||||
|
|
||||||
|
/* Increasing the CPU frequency */
|
||||||
|
if(FLASH_LATENCY_DEFAULT > (READ_BIT((FLASH->ACR), FLASH_ACR_LATENCY)))
|
||||||
|
{
|
||||||
|
/* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
|
||||||
|
MODIFY_REG(FLASH->ACR, FLASH_ACR_LATENCY, (uint32_t)(FLASH_LATENCY_DEFAULT));
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Set HSION bit */
|
||||||
|
RCC->CR |= RCC_CR_HSION;
|
||||||
|
|
||||||
|
/* Reset CFGR register */
|
||||||
|
RCC->CFGR = 0x00000000;
|
||||||
|
|
||||||
|
/* Reset HSEON, HSECSSON, CSION, HSI48ON, CSIKERON, PLL1ON, PLL2ON and PLL3ON bits */
|
||||||
|
RCC->CR &= 0xEAF6ED7FU;
|
||||||
|
|
||||||
|
/* Decreasing the number of wait states because of lower CPU frequency */
|
||||||
|
if(FLASH_LATENCY_DEFAULT < (READ_BIT((FLASH->ACR), FLASH_ACR_LATENCY)))
|
||||||
|
{
|
||||||
|
/* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
|
||||||
|
MODIFY_REG(FLASH->ACR, FLASH_ACR_LATENCY, (uint32_t)(FLASH_LATENCY_DEFAULT));
|
||||||
|
}
|
||||||
|
|
||||||
|
#if defined(D3_SRAM_BASE)
|
||||||
|
/* Reset D1CFGR register */
|
||||||
|
RCC->D1CFGR = 0x00000000;
|
||||||
|
|
||||||
|
/* Reset D2CFGR register */
|
||||||
|
RCC->D2CFGR = 0x00000000;
|
||||||
|
|
||||||
|
/* Reset D3CFGR register */
|
||||||
|
RCC->D3CFGR = 0x00000000;
|
||||||
|
#else
|
||||||
|
/* Reset CDCFGR1 register */
|
||||||
|
RCC->CDCFGR1 = 0x00000000;
|
||||||
|
|
||||||
|
/* Reset CDCFGR2 register */
|
||||||
|
RCC->CDCFGR2 = 0x00000000;
|
||||||
|
|
||||||
|
/* Reset SRDCFGR register */
|
||||||
|
RCC->SRDCFGR = 0x00000000;
|
||||||
|
#endif
|
||||||
|
/* Reset PLLCKSELR register */
|
||||||
|
RCC->PLLCKSELR = 0x02020200;
|
||||||
|
|
||||||
|
/* Reset PLLCFGR register */
|
||||||
|
RCC->PLLCFGR = 0x01FF0000;
|
||||||
|
/* Reset PLL1DIVR register */
|
||||||
|
RCC->PLL1DIVR = 0x01010280;
|
||||||
|
/* Reset PLL1FRACR register */
|
||||||
|
RCC->PLL1FRACR = 0x00000000;
|
||||||
|
|
||||||
|
/* Reset PLL2DIVR register */
|
||||||
|
RCC->PLL2DIVR = 0x01010280;
|
||||||
|
|
||||||
|
/* Reset PLL2FRACR register */
|
||||||
|
|
||||||
|
RCC->PLL2FRACR = 0x00000000;
|
||||||
|
/* Reset PLL3DIVR register */
|
||||||
|
RCC->PLL3DIVR = 0x01010280;
|
||||||
|
|
||||||
|
/* Reset PLL3FRACR register */
|
||||||
|
RCC->PLL3FRACR = 0x00000000;
|
||||||
|
|
||||||
|
/* Reset HSEBYP bit */
|
||||||
|
RCC->CR &= 0xFFFBFFFFU;
|
||||||
|
|
||||||
|
/* Disable all interrupts */
|
||||||
|
RCC->CIER = 0x00000000;
|
||||||
|
|
||||||
|
#if (STM32H7_DEV_ID == 0x450UL)
|
||||||
|
/* dual core CM7 or single core line */
|
||||||
|
if((DBGMCU->IDCODE & 0xFFFF0000U) < 0x20000000U)
|
||||||
|
{
|
||||||
|
/* if stm32h7 revY*/
|
||||||
|
/* Change the switch matrix read issuing capability to 1 for the AXI SRAM target (Target 7) */
|
||||||
|
*((__IO uint32_t*)0x51008108) = 0x000000001U;
|
||||||
|
}
|
||||||
|
#endif /* STM32H7_DEV_ID */
|
||||||
|
|
||||||
|
#if defined(DATA_IN_D2_SRAM)
|
||||||
|
/* in case of initialized data in D2 SRAM (AHB SRAM), enable the D2 SRAM clock (AHB SRAM clock) */
|
||||||
|
#if defined(RCC_AHB2ENR_D2SRAM3EN)
|
||||||
|
RCC->AHB2ENR |= (RCC_AHB2ENR_D2SRAM1EN | RCC_AHB2ENR_D2SRAM2EN | RCC_AHB2ENR_D2SRAM3EN);
|
||||||
|
#elif defined(RCC_AHB2ENR_D2SRAM2EN)
|
||||||
|
RCC->AHB2ENR |= (RCC_AHB2ENR_D2SRAM1EN | RCC_AHB2ENR_D2SRAM2EN);
|
||||||
|
#else
|
||||||
|
RCC->AHB2ENR |= (RCC_AHB2ENR_AHBSRAM1EN | RCC_AHB2ENR_AHBSRAM2EN);
|
||||||
|
#endif /* RCC_AHB2ENR_D2SRAM3EN */
|
||||||
|
|
||||||
|
tmpreg = RCC->AHB2ENR;
|
||||||
|
(void) tmpreg;
|
||||||
|
#endif /* DATA_IN_D2_SRAM */
|
||||||
|
|
||||||
|
#if defined(DUAL_CORE) && defined(CORE_CM4)
|
||||||
|
/* Configure the Vector Table location add offset address for cortex-M4 ------------------*/
|
||||||
|
#if defined(USER_VECT_TAB_ADDRESS)
|
||||||
|
SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal D2 AXI-RAM or in Internal FLASH */
|
||||||
|
#endif /* USER_VECT_TAB_ADDRESS */
|
||||||
|
|
||||||
|
#else
|
||||||
|
if(READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN) == 0U)
|
||||||
|
{
|
||||||
|
/* Enable the FMC interface clock */
|
||||||
|
SET_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN);
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Disable the FMC bank1 (enabled after reset).
|
||||||
|
* This, prevents CPU speculation access on this bank which blocks the use of FMC during
|
||||||
|
* 24us. During this time the others FMC master (such as LTDC) cannot use it!
|
||||||
|
*/
|
||||||
|
FMC_Bank1_R->BTCR[0] = 0x000030D2;
|
||||||
|
|
||||||
|
/* Disable the FMC interface clock */
|
||||||
|
CLEAR_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN);
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Configure the Vector Table location -------------------------------------*/
|
||||||
|
#if defined(USER_VECT_TAB_ADDRESS)
|
||||||
|
SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal D1 AXI-RAM or in Internal FLASH */
|
||||||
|
#endif /* USER_VECT_TAB_ADDRESS */
|
||||||
|
|
||||||
|
#endif /*DUAL_CORE && CORE_CM4*/
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Update SystemCoreClock variable according to Clock Register Values.
|
||||||
|
* The SystemCoreClock variable contains the core clock , it can
|
||||||
|
* be used by the user application to setup the SysTick timer or configure
|
||||||
|
* other parameters.
|
||||||
|
*
|
||||||
|
* @note Each time the core clock changes, this function must be called
|
||||||
|
* to update SystemCoreClock variable value. Otherwise, any configuration
|
||||||
|
* based on this variable will be incorrect.
|
||||||
|
*
|
||||||
|
* @note - The system frequency computed by this function is not the real
|
||||||
|
* frequency in the chip. It is calculated based on the predefined
|
||||||
|
* constant and the selected clock source:
|
||||||
|
*
|
||||||
|
* - If SYSCLK source is CSI, SystemCoreClock will contain the CSI_VALUE(*)
|
||||||
|
* - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
|
||||||
|
* - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
|
||||||
|
* - If SYSCLK source is PLL, SystemCoreClock will contain the CSI_VALUE(*),
|
||||||
|
* HSI_VALUE(**) or HSE_VALUE(***) multiplied/divided by the PLL factors.
|
||||||
|
*
|
||||||
|
* (*) CSI_VALUE is a constant defined in stm32h7xx_hal.h file (default value
|
||||||
|
* 4 MHz) but the real value may vary depending on the variations
|
||||||
|
* in voltage and temperature.
|
||||||
|
* (**) HSI_VALUE is a constant defined in stm32h7xx_hal.h file (default value
|
||||||
|
* 64 MHz) but the real value may vary depending on the variations
|
||||||
|
* in voltage and temperature.
|
||||||
|
*
|
||||||
|
* (***)HSE_VALUE is a constant defined in stm32h7xx_hal.h file (default value
|
||||||
|
* 25 MHz), user has to ensure that HSE_VALUE is same as the real
|
||||||
|
* frequency of the crystal used. Otherwise, this function may
|
||||||
|
* have wrong result.
|
||||||
|
*
|
||||||
|
* - The result of this function could be not correct when using fractional
|
||||||
|
* value for HSE crystal.
|
||||||
|
* @param None
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
void SystemCoreClockUpdate (void)
|
||||||
|
{
|
||||||
|
uint32_t pllp, pllsource, pllm, pllfracen, hsivalue, tmp;
|
||||||
|
uint32_t common_system_clock;
|
||||||
|
float_t fracn1, pllvco;
|
||||||
|
|
||||||
|
|
||||||
|
/* Get SYSCLK source -------------------------------------------------------*/
|
||||||
|
|
||||||
|
switch (RCC->CFGR & RCC_CFGR_SWS)
|
||||||
|
{
|
||||||
|
case RCC_CFGR_SWS_HSI: /* HSI used as system clock source */
|
||||||
|
common_system_clock = (uint32_t) (HSI_VALUE >> ((RCC->CR & RCC_CR_HSIDIV)>> 3));
|
||||||
|
break;
|
||||||
|
|
||||||
|
case RCC_CFGR_SWS_CSI: /* CSI used as system clock source */
|
||||||
|
common_system_clock = CSI_VALUE;
|
||||||
|
break;
|
||||||
|
|
||||||
|
case RCC_CFGR_SWS_HSE: /* HSE used as system clock source */
|
||||||
|
common_system_clock = HSE_VALUE;
|
||||||
|
break;
|
||||||
|
|
||||||
|
case RCC_CFGR_SWS_PLL1: /* PLL1 used as system clock source */
|
||||||
|
|
||||||
|
/* PLL_VCO = (HSE_VALUE or HSI_VALUE or CSI_VALUE/ PLLM) * PLLN
|
||||||
|
SYSCLK = PLL_VCO / PLLR
|
||||||
|
*/
|
||||||
|
pllsource = (RCC->PLLCKSELR & RCC_PLLCKSELR_PLLSRC);
|
||||||
|
pllm = ((RCC->PLLCKSELR & RCC_PLLCKSELR_DIVM1)>> 4) ;
|
||||||
|
pllfracen = ((RCC->PLLCFGR & RCC_PLLCFGR_PLL1FRACEN)>>RCC_PLLCFGR_PLL1FRACEN_Pos);
|
||||||
|
fracn1 = (float_t)(uint32_t)(pllfracen* ((RCC->PLL1FRACR & RCC_PLL1FRACR_FRACN1)>> 3));
|
||||||
|
|
||||||
|
if (pllm != 0U)
|
||||||
|
{
|
||||||
|
switch (pllsource)
|
||||||
|
{
|
||||||
|
case RCC_PLLCKSELR_PLLSRC_HSI: /* HSI used as PLL clock source */
|
||||||
|
|
||||||
|
hsivalue = (HSI_VALUE >> ((RCC->CR & RCC_CR_HSIDIV)>> 3)) ;
|
||||||
|
pllvco = ( (float_t)hsivalue / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1/(float_t)0x2000) +(float_t)1 );
|
||||||
|
|
||||||
|
break;
|
||||||
|
|
||||||
|
case RCC_PLLCKSELR_PLLSRC_CSI: /* CSI used as PLL clock source */
|
||||||
|
pllvco = ((float_t)CSI_VALUE / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1/(float_t)0x2000) +(float_t)1 );
|
||||||
|
break;
|
||||||
|
|
||||||
|
case RCC_PLLCKSELR_PLLSRC_HSE: /* HSE used as PLL clock source */
|
||||||
|
pllvco = ((float_t)HSE_VALUE / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1/(float_t)0x2000) +(float_t)1 );
|
||||||
|
break;
|
||||||
|
|
||||||
|
default:
|
||||||
|
hsivalue = (HSI_VALUE >> ((RCC->CR & RCC_CR_HSIDIV)>> 3)) ;
|
||||||
|
pllvco = ((float_t)hsivalue / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1/(float_t)0x2000) +(float_t)1 );
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
pllp = (((RCC->PLL1DIVR & RCC_PLL1DIVR_P1) >>9) + 1U ) ;
|
||||||
|
common_system_clock = (uint32_t)(float_t)(pllvco/(float_t)pllp);
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
common_system_clock = 0U;
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
|
||||||
|
default:
|
||||||
|
common_system_clock = (uint32_t) (HSI_VALUE >> ((RCC->CR & RCC_CR_HSIDIV)>> 3));
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Compute SystemClock frequency --------------------------------------------------*/
|
||||||
|
#if defined (RCC_D1CFGR_D1CPRE)
|
||||||
|
tmp = D1CorePrescTable[(RCC->D1CFGR & RCC_D1CFGR_D1CPRE)>> RCC_D1CFGR_D1CPRE_Pos];
|
||||||
|
|
||||||
|
/* common_system_clock frequency : CM7 CPU frequency */
|
||||||
|
common_system_clock >>= tmp;
|
||||||
|
|
||||||
|
/* SystemD2Clock frequency : CM4 CPU, AXI and AHBs Clock frequency */
|
||||||
|
SystemD2Clock = (common_system_clock >> ((D1CorePrescTable[(RCC->D1CFGR & RCC_D1CFGR_HPRE)>> RCC_D1CFGR_HPRE_Pos]) & 0x1FU));
|
||||||
|
|
||||||
|
#else
|
||||||
|
tmp = D1CorePrescTable[(RCC->CDCFGR1 & RCC_CDCFGR1_CDCPRE)>> RCC_CDCFGR1_CDCPRE_Pos];
|
||||||
|
|
||||||
|
/* common_system_clock frequency : CM7 CPU frequency */
|
||||||
|
common_system_clock >>= tmp;
|
||||||
|
|
||||||
|
/* SystemD2Clock frequency : AXI and AHBs Clock frequency */
|
||||||
|
SystemD2Clock = (common_system_clock >> ((D1CorePrescTable[(RCC->CDCFGR1 & RCC_CDCFGR1_HPRE)>> RCC_CDCFGR1_HPRE_Pos]) & 0x1FU));
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if defined(DUAL_CORE) && defined(CORE_CM4)
|
||||||
|
SystemCoreClock = SystemD2Clock;
|
||||||
|
#else
|
||||||
|
SystemCoreClock = common_system_clock;
|
||||||
|
#endif /* DUAL_CORE && CORE_CM4 */
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Exit Run* mode and Configure the system Power Supply
|
||||||
|
*
|
||||||
|
* @note This function exits the Run* mode and configures the system power supply
|
||||||
|
* according to the definition to be used at compilation preprocessing level.
|
||||||
|
* The application shall set one of the following configuration option:
|
||||||
|
* - PWR_LDO_SUPPLY
|
||||||
|
* - PWR_DIRECT_SMPS_SUPPLY
|
||||||
|
* - PWR_EXTERNAL_SOURCE_SUPPLY
|
||||||
|
* - PWR_SMPS_1V8_SUPPLIES_LDO
|
||||||
|
* - PWR_SMPS_2V5_SUPPLIES_LDO
|
||||||
|
* - PWR_SMPS_1V8_SUPPLIES_EXT_AND_LDO
|
||||||
|
* - PWR_SMPS_2V5_SUPPLIES_EXT_AND_LDO
|
||||||
|
* - PWR_SMPS_1V8_SUPPLIES_EXT
|
||||||
|
* - PWR_SMPS_2V5_SUPPLIES_EXT
|
||||||
|
*
|
||||||
|
* @note The function modifies the PWR->CR3 register to enable or disable specific
|
||||||
|
* power supply modes and waits until the voltage level flag is set, indicating
|
||||||
|
* that the power supply configuration is stable.
|
||||||
|
*
|
||||||
|
* @param None
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
void ExitRun0Mode(void)
|
||||||
|
{
|
||||||
|
#if defined(USE_PWR_LDO_SUPPLY)
|
||||||
|
#if defined(SMPS)
|
||||||
|
/* Exit Run* mode by disabling SMPS and enabling LDO */
|
||||||
|
PWR->CR3 = (PWR->CR3 & ~PWR_CR3_SMPSEN) | PWR_CR3_LDOEN;
|
||||||
|
#else
|
||||||
|
/* Enable LDO mode */
|
||||||
|
PWR->CR3 |= PWR_CR3_LDOEN;
|
||||||
|
#endif /* SMPS */
|
||||||
|
/* Wait till voltage level flag is set */
|
||||||
|
while ((PWR->CSR1 & PWR_CSR1_ACTVOSRDY) == 0U)
|
||||||
|
{}
|
||||||
|
#elif defined(USE_PWR_EXTERNAL_SOURCE_SUPPLY)
|
||||||
|
#if defined(SMPS)
|
||||||
|
/* Exit Run* mode */
|
||||||
|
PWR->CR3 = (PWR->CR3 & ~(PWR_CR3_SMPSEN | PWR_CR3_LDOEN)) | PWR_CR3_BYPASS;
|
||||||
|
#else
|
||||||
|
PWR->CR3 = (PWR->CR3 & ~(PWR_CR3_LDOEN)) | PWR_CR3_BYPASS;
|
||||||
|
#endif /* SMPS */
|
||||||
|
/* Wait till voltage level flag is set */
|
||||||
|
while ((PWR->CSR1 & PWR_CSR1_ACTVOSRDY) == 0U)
|
||||||
|
{}
|
||||||
|
#elif defined(USE_PWR_DIRECT_SMPS_SUPPLY) && defined(SMPS)
|
||||||
|
/* Exit Run* mode */
|
||||||
|
PWR->CR3 &= ~(PWR_CR3_LDOEN);
|
||||||
|
/* Wait till voltage level flag is set */
|
||||||
|
while ((PWR->CSR1 & PWR_CSR1_ACTVOSRDY) == 0U)
|
||||||
|
{}
|
||||||
|
#elif defined(USE_PWR_SMPS_1V8_SUPPLIES_LDO) && defined(SMPS)
|
||||||
|
/* Exit Run* mode */
|
||||||
|
PWR->CR3 |= PWR_CR3_SMPSLEVEL_0 | PWR_CR3_SMPSEN | PWR_CR3_LDOEN;
|
||||||
|
/* Wait till voltage level flag is set */
|
||||||
|
while ((PWR->CSR1 & PWR_CSR1_ACTVOSRDY) == 0U)
|
||||||
|
{}
|
||||||
|
#elif defined(USE_PWR_SMPS_2V5_SUPPLIES_LDO) && defined(SMPS)
|
||||||
|
/* Exit Run* mode */
|
||||||
|
PWR->CR3 |= PWR_CR3_SMPSLEVEL_1 | PWR_CR3_SMPSEN | PWR_CR3_LDOEN;
|
||||||
|
/* Wait till voltage level flag is set */
|
||||||
|
while ((PWR->CSR1 & PWR_CSR1_ACTVOSRDY) == 0U)
|
||||||
|
{}
|
||||||
|
#elif defined(USE_PWR_SMPS_1V8_SUPPLIES_EXT_AND_LDO) && defined(SMPS)
|
||||||
|
/* Exit Run* mode */
|
||||||
|
PWR->CR3 |= PWR_CR3_SMPSLEVEL_0 | PWR_CR3_SMPSEXTHP | PWR_CR3_SMPSEN | PWR_CR3_LDOEN;
|
||||||
|
/* Wait till voltage level flag is set */
|
||||||
|
while ((PWR->CSR1 & PWR_CSR1_ACTVOSRDY) == 0U)
|
||||||
|
{}
|
||||||
|
#elif defined(USE_PWR_SMPS_2V5_SUPPLIES_EXT_AND_LDO) && defined(SMPS)
|
||||||
|
/* Exit Run* mode */
|
||||||
|
PWR->CR3 |= PWR_CR3_SMPSLEVEL_1 | PWR_CR3_SMPSEXTHP | PWR_CR3_SMPSEN | PWR_CR3_LDOEN;
|
||||||
|
/* Wait till voltage level flag is set */
|
||||||
|
while ((PWR->CSR1 & PWR_CSR1_ACTVOSRDY) == 0U)
|
||||||
|
{}
|
||||||
|
#elif defined(USE_PWR_SMPS_1V8_SUPPLIES_EXT) && defined(SMPS)
|
||||||
|
/* Exit Run* mode */
|
||||||
|
PWR->CR3 = (PWR->CR3 & ~(PWR_CR3_LDOEN)) | PWR_CR3_SMPSLEVEL_0 | PWR_CR3_SMPSEXTHP | PWR_CR3_SMPSEN | PWR_CR3_BYPASS;
|
||||||
|
/* Wait till voltage level flag is set */
|
||||||
|
while ((PWR->CSR1 & PWR_CSR1_ACTVOSRDY) == 0U)
|
||||||
|
{}
|
||||||
|
#elif defined(USE_PWR_SMPS_2V5_SUPPLIES_EXT) && defined(SMPS)
|
||||||
|
/* Exit Run* mode */
|
||||||
|
PWR->CR3 = (PWR->CR3 & ~(PWR_CR3_LDOEN)) | PWR_CR3_SMPSLEVEL_1 | PWR_CR3_SMPSEXTHP | PWR_CR3_SMPSEN | PWR_CR3_BYPASS;
|
||||||
|
/* Wait till voltage level flag is set */
|
||||||
|
while ((PWR->CSR1 & PWR_CSR1_ACTVOSRDY) == 0U)
|
||||||
|
{}
|
||||||
|
#else
|
||||||
|
/* No system power supply configuration is selected at exit Run* mode */
|
||||||
|
#endif /* USE_PWR_LDO_SUPPLY */
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
676
Core/Src/tim.c
676
Core/Src/tim.c
@@ -7,7 +7,7 @@
|
|||||||
******************************************************************************
|
******************************************************************************
|
||||||
* @attention
|
* @attention
|
||||||
*
|
*
|
||||||
* Copyright (c) 2025 STMicroelectronics.
|
* Copyright (c) 2026 STMicroelectronics.
|
||||||
* All rights reserved.
|
* All rights reserved.
|
||||||
*
|
*
|
||||||
* This software is licensed under terms that can be found in the LICENSE file
|
* This software is licensed under terms that can be found in the LICENSE file
|
||||||
@@ -25,12 +25,9 @@
|
|||||||
/* USER CODE END 0 */
|
/* USER CODE END 0 */
|
||||||
|
|
||||||
TIM_HandleTypeDef htim1;
|
TIM_HandleTypeDef htim1;
|
||||||
|
TIM_HandleTypeDef htim2;
|
||||||
TIM_HandleTypeDef htim3;
|
TIM_HandleTypeDef htim3;
|
||||||
TIM_HandleTypeDef htim4;
|
TIM_HandleTypeDef htim12;
|
||||||
TIM_HandleTypeDef htim5;
|
|
||||||
TIM_HandleTypeDef htim7;
|
|
||||||
TIM_HandleTypeDef htim8;
|
|
||||||
TIM_HandleTypeDef htim10;
|
|
||||||
|
|
||||||
/* TIM1 init function */
|
/* TIM1 init function */
|
||||||
void MX_TIM1_Init(void)
|
void MX_TIM1_Init(void)
|
||||||
@@ -40,7 +37,6 @@ void MX_TIM1_Init(void)
|
|||||||
|
|
||||||
/* USER CODE END TIM1_Init 0 */
|
/* USER CODE END TIM1_Init 0 */
|
||||||
|
|
||||||
TIM_ClockConfigTypeDef sClockSourceConfig = {0};
|
|
||||||
TIM_MasterConfigTypeDef sMasterConfig = {0};
|
TIM_MasterConfigTypeDef sMasterConfig = {0};
|
||||||
TIM_OC_InitTypeDef sConfigOC = {0};
|
TIM_OC_InitTypeDef sConfigOC = {0};
|
||||||
TIM_BreakDeadTimeConfigTypeDef sBreakDeadTimeConfig = {0};
|
TIM_BreakDeadTimeConfigTypeDef sBreakDeadTimeConfig = {0};
|
||||||
@@ -49,33 +45,25 @@ void MX_TIM1_Init(void)
|
|||||||
|
|
||||||
/* USER CODE END TIM1_Init 1 */
|
/* USER CODE END TIM1_Init 1 */
|
||||||
htim1.Instance = TIM1;
|
htim1.Instance = TIM1;
|
||||||
htim1.Init.Prescaler = 167;
|
htim1.Init.Prescaler = 24;
|
||||||
htim1.Init.CounterMode = TIM_COUNTERMODE_UP;
|
htim1.Init.CounterMode = TIM_COUNTERMODE_UP;
|
||||||
htim1.Init.Period = 19999;
|
htim1.Init.Period = 10000;
|
||||||
htim1.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
|
htim1.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
|
||||||
htim1.Init.RepetitionCounter = 0;
|
htim1.Init.RepetitionCounter = 0;
|
||||||
htim1.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
|
htim1.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
|
||||||
if (HAL_TIM_Base_Init(&htim1) != HAL_OK)
|
|
||||||
{
|
|
||||||
Error_Handler();
|
|
||||||
}
|
|
||||||
sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
|
|
||||||
if (HAL_TIM_ConfigClockSource(&htim1, &sClockSourceConfig) != HAL_OK)
|
|
||||||
{
|
|
||||||
Error_Handler();
|
|
||||||
}
|
|
||||||
if (HAL_TIM_PWM_Init(&htim1) != HAL_OK)
|
if (HAL_TIM_PWM_Init(&htim1) != HAL_OK)
|
||||||
{
|
{
|
||||||
Error_Handler();
|
Error_Handler();
|
||||||
}
|
}
|
||||||
sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
|
sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
|
||||||
|
sMasterConfig.MasterOutputTrigger2 = TIM_TRGO2_RESET;
|
||||||
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
|
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
|
||||||
if (HAL_TIMEx_MasterConfigSynchronization(&htim1, &sMasterConfig) != HAL_OK)
|
if (HAL_TIMEx_MasterConfigSynchronization(&htim1, &sMasterConfig) != HAL_OK)
|
||||||
{
|
{
|
||||||
Error_Handler();
|
Error_Handler();
|
||||||
}
|
}
|
||||||
sConfigOC.OCMode = TIM_OCMODE_PWM1;
|
sConfigOC.OCMode = TIM_OCMODE_PWM1;
|
||||||
sConfigOC.Pulse = 0;
|
sConfigOC.Pulse = 5000;
|
||||||
sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
|
sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
|
||||||
sConfigOC.OCNPolarity = TIM_OCNPOLARITY_HIGH;
|
sConfigOC.OCNPolarity = TIM_OCNPOLARITY_HIGH;
|
||||||
sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
|
sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
|
||||||
@@ -85,25 +73,20 @@ void MX_TIM1_Init(void)
|
|||||||
{
|
{
|
||||||
Error_Handler();
|
Error_Handler();
|
||||||
}
|
}
|
||||||
if (HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_2) != HAL_OK)
|
|
||||||
{
|
|
||||||
Error_Handler();
|
|
||||||
}
|
|
||||||
if (HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_3) != HAL_OK)
|
if (HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_3) != HAL_OK)
|
||||||
{
|
{
|
||||||
Error_Handler();
|
Error_Handler();
|
||||||
}
|
}
|
||||||
sConfigOC.Pulse = 1000;
|
|
||||||
if (HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_4) != HAL_OK)
|
|
||||||
{
|
|
||||||
Error_Handler();
|
|
||||||
}
|
|
||||||
sBreakDeadTimeConfig.OffStateRunMode = TIM_OSSR_DISABLE;
|
sBreakDeadTimeConfig.OffStateRunMode = TIM_OSSR_DISABLE;
|
||||||
sBreakDeadTimeConfig.OffStateIDLEMode = TIM_OSSI_DISABLE;
|
sBreakDeadTimeConfig.OffStateIDLEMode = TIM_OSSI_DISABLE;
|
||||||
sBreakDeadTimeConfig.LockLevel = TIM_LOCKLEVEL_OFF;
|
sBreakDeadTimeConfig.LockLevel = TIM_LOCKLEVEL_OFF;
|
||||||
sBreakDeadTimeConfig.DeadTime = 0;
|
sBreakDeadTimeConfig.DeadTime = 0;
|
||||||
sBreakDeadTimeConfig.BreakState = TIM_BREAK_DISABLE;
|
sBreakDeadTimeConfig.BreakState = TIM_BREAK_DISABLE;
|
||||||
sBreakDeadTimeConfig.BreakPolarity = TIM_BREAKPOLARITY_HIGH;
|
sBreakDeadTimeConfig.BreakPolarity = TIM_BREAKPOLARITY_HIGH;
|
||||||
|
sBreakDeadTimeConfig.BreakFilter = 0;
|
||||||
|
sBreakDeadTimeConfig.Break2State = TIM_BREAK2_DISABLE;
|
||||||
|
sBreakDeadTimeConfig.Break2Polarity = TIM_BREAK2POLARITY_HIGH;
|
||||||
|
sBreakDeadTimeConfig.Break2Filter = 0;
|
||||||
sBreakDeadTimeConfig.AutomaticOutput = TIM_AUTOMATICOUTPUT_DISABLE;
|
sBreakDeadTimeConfig.AutomaticOutput = TIM_AUTOMATICOUTPUT_DISABLE;
|
||||||
if (HAL_TIMEx_ConfigBreakDeadTime(&htim1, &sBreakDeadTimeConfig) != HAL_OK)
|
if (HAL_TIMEx_ConfigBreakDeadTime(&htim1, &sBreakDeadTimeConfig) != HAL_OK)
|
||||||
{
|
{
|
||||||
@@ -114,6 +97,54 @@ void MX_TIM1_Init(void)
|
|||||||
/* USER CODE END TIM1_Init 2 */
|
/* USER CODE END TIM1_Init 2 */
|
||||||
HAL_TIM_MspPostInit(&htim1);
|
HAL_TIM_MspPostInit(&htim1);
|
||||||
|
|
||||||
|
}
|
||||||
|
/* TIM2 init function */
|
||||||
|
void MX_TIM2_Init(void)
|
||||||
|
{
|
||||||
|
|
||||||
|
/* USER CODE BEGIN TIM2_Init 0 */
|
||||||
|
|
||||||
|
/* USER CODE END TIM2_Init 0 */
|
||||||
|
|
||||||
|
TIM_MasterConfigTypeDef sMasterConfig = {0};
|
||||||
|
TIM_OC_InitTypeDef sConfigOC = {0};
|
||||||
|
|
||||||
|
/* USER CODE BEGIN TIM2_Init 1 */
|
||||||
|
|
||||||
|
/* USER CODE END TIM2_Init 1 */
|
||||||
|
htim2.Instance = TIM2;
|
||||||
|
htim2.Init.Prescaler = 24;
|
||||||
|
htim2.Init.CounterMode = TIM_COUNTERMODE_UP;
|
||||||
|
htim2.Init.Period = 10000;
|
||||||
|
htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
|
||||||
|
htim2.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
|
||||||
|
if (HAL_TIM_PWM_Init(&htim2) != HAL_OK)
|
||||||
|
{
|
||||||
|
Error_Handler();
|
||||||
|
}
|
||||||
|
sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
|
||||||
|
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
|
||||||
|
if (HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig) != HAL_OK)
|
||||||
|
{
|
||||||
|
Error_Handler();
|
||||||
|
}
|
||||||
|
sConfigOC.OCMode = TIM_OCMODE_PWM1;
|
||||||
|
sConfigOC.Pulse = 5000;
|
||||||
|
sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
|
||||||
|
sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
|
||||||
|
if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
|
||||||
|
{
|
||||||
|
Error_Handler();
|
||||||
|
}
|
||||||
|
if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_3) != HAL_OK)
|
||||||
|
{
|
||||||
|
Error_Handler();
|
||||||
|
}
|
||||||
|
/* USER CODE BEGIN TIM2_Init 2 */
|
||||||
|
|
||||||
|
/* USER CODE END TIM2_Init 2 */
|
||||||
|
HAL_TIM_MspPostInit(&htim2);
|
||||||
|
|
||||||
}
|
}
|
||||||
/* TIM3 init function */
|
/* TIM3 init function */
|
||||||
void MX_TIM3_Init(void)
|
void MX_TIM3_Init(void)
|
||||||
@@ -123,7 +154,6 @@ void MX_TIM3_Init(void)
|
|||||||
|
|
||||||
/* USER CODE END TIM3_Init 0 */
|
/* USER CODE END TIM3_Init 0 */
|
||||||
|
|
||||||
TIM_ClockConfigTypeDef sClockSourceConfig = {0};
|
|
||||||
TIM_MasterConfigTypeDef sMasterConfig = {0};
|
TIM_MasterConfigTypeDef sMasterConfig = {0};
|
||||||
TIM_OC_InitTypeDef sConfigOC = {0};
|
TIM_OC_InitTypeDef sConfigOC = {0};
|
||||||
|
|
||||||
@@ -131,20 +161,11 @@ void MX_TIM3_Init(void)
|
|||||||
|
|
||||||
/* USER CODE END TIM3_Init 1 */
|
/* USER CODE END TIM3_Init 1 */
|
||||||
htim3.Instance = TIM3;
|
htim3.Instance = TIM3;
|
||||||
htim3.Init.Prescaler = 0;
|
htim3.Init.Prescaler = 24-1;
|
||||||
htim3.Init.CounterMode = TIM_COUNTERMODE_UP;
|
htim3.Init.CounterMode = TIM_COUNTERMODE_UP;
|
||||||
htim3.Init.Period = 65535;
|
htim3.Init.Period = 10000-1;
|
||||||
htim3.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
|
htim3.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
|
||||||
htim3.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
|
htim3.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE;
|
||||||
if (HAL_TIM_Base_Init(&htim3) != HAL_OK)
|
|
||||||
{
|
|
||||||
Error_Handler();
|
|
||||||
}
|
|
||||||
sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
|
|
||||||
if (HAL_TIM_ConfigClockSource(&htim3, &sClockSourceConfig) != HAL_OK)
|
|
||||||
{
|
|
||||||
Error_Handler();
|
|
||||||
}
|
|
||||||
if (HAL_TIM_PWM_Init(&htim3) != HAL_OK)
|
if (HAL_TIM_PWM_Init(&htim3) != HAL_OK)
|
||||||
{
|
{
|
||||||
Error_Handler();
|
Error_Handler();
|
||||||
@@ -159,7 +180,11 @@ void MX_TIM3_Init(void)
|
|||||||
sConfigOC.Pulse = 0;
|
sConfigOC.Pulse = 0;
|
||||||
sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
|
sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
|
||||||
sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
|
sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
|
||||||
if (HAL_TIM_PWM_ConfigChannel(&htim3, &sConfigOC, TIM_CHANNEL_3) != HAL_OK)
|
if (HAL_TIM_PWM_ConfigChannel(&htim3, &sConfigOC, TIM_CHANNEL_2) != HAL_OK)
|
||||||
|
{
|
||||||
|
Error_Handler();
|
||||||
|
}
|
||||||
|
if (HAL_TIM_PWM_ConfigChannel(&htim3, &sConfigOC, TIM_CHANNEL_4) != HAL_OK)
|
||||||
{
|
{
|
||||||
Error_Handler();
|
Error_Handler();
|
||||||
}
|
}
|
||||||
@@ -169,43 +194,33 @@ void MX_TIM3_Init(void)
|
|||||||
HAL_TIM_MspPostInit(&htim3);
|
HAL_TIM_MspPostInit(&htim3);
|
||||||
|
|
||||||
}
|
}
|
||||||
/* TIM4 init function */
|
/* TIM12 init function */
|
||||||
void MX_TIM4_Init(void)
|
void MX_TIM12_Init(void)
|
||||||
{
|
{
|
||||||
|
|
||||||
/* USER CODE BEGIN TIM4_Init 0 */
|
/* USER CODE BEGIN TIM12_Init 0 */
|
||||||
|
|
||||||
/* USER CODE END TIM4_Init 0 */
|
/* USER CODE END TIM12_Init 0 */
|
||||||
|
|
||||||
TIM_ClockConfigTypeDef sClockSourceConfig = {0};
|
|
||||||
TIM_MasterConfigTypeDef sMasterConfig = {0};
|
TIM_MasterConfigTypeDef sMasterConfig = {0};
|
||||||
TIM_OC_InitTypeDef sConfigOC = {0};
|
TIM_OC_InitTypeDef sConfigOC = {0};
|
||||||
|
|
||||||
/* USER CODE BEGIN TIM4_Init 1 */
|
/* USER CODE BEGIN TIM12_Init 1 */
|
||||||
|
|
||||||
/* USER CODE END TIM4_Init 1 */
|
/* USER CODE END TIM12_Init 1 */
|
||||||
htim4.Instance = TIM4;
|
htim12.Instance = TIM12;
|
||||||
htim4.Init.Prescaler = 167;
|
htim12.Init.Prescaler = 24-1;
|
||||||
htim4.Init.CounterMode = TIM_COUNTERMODE_UP;
|
htim12.Init.CounterMode = TIM_COUNTERMODE_UP;
|
||||||
htim4.Init.Period = 65535;
|
htim12.Init.Period = 2000-1;
|
||||||
htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
|
htim12.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
|
||||||
htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
|
htim12.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
|
||||||
if (HAL_TIM_Base_Init(&htim4) != HAL_OK)
|
if (HAL_TIM_PWM_Init(&htim12) != HAL_OK)
|
||||||
{
|
|
||||||
Error_Handler();
|
|
||||||
}
|
|
||||||
sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
|
|
||||||
if (HAL_TIM_ConfigClockSource(&htim4, &sClockSourceConfig) != HAL_OK)
|
|
||||||
{
|
|
||||||
Error_Handler();
|
|
||||||
}
|
|
||||||
if (HAL_TIM_PWM_Init(&htim4) != HAL_OK)
|
|
||||||
{
|
{
|
||||||
Error_Handler();
|
Error_Handler();
|
||||||
}
|
}
|
||||||
sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
|
sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
|
||||||
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
|
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
|
||||||
if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK)
|
if (HAL_TIMEx_MasterConfigSynchronization(&htim12, &sMasterConfig) != HAL_OK)
|
||||||
{
|
{
|
||||||
Error_Handler();
|
Error_Handler();
|
||||||
}
|
}
|
||||||
@@ -213,246 +228,43 @@ void MX_TIM4_Init(void)
|
|||||||
sConfigOC.Pulse = 0;
|
sConfigOC.Pulse = 0;
|
||||||
sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
|
sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
|
||||||
sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
|
sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
|
||||||
if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_3) != HAL_OK)
|
if (HAL_TIM_PWM_ConfigChannel(&htim12, &sConfigOC, TIM_CHANNEL_2) != HAL_OK)
|
||||||
{
|
{
|
||||||
Error_Handler();
|
Error_Handler();
|
||||||
}
|
}
|
||||||
/* USER CODE BEGIN TIM4_Init 2 */
|
/* USER CODE BEGIN TIM12_Init 2 */
|
||||||
|
|
||||||
/* USER CODE END TIM4_Init 2 */
|
/* USER CODE END TIM12_Init 2 */
|
||||||
HAL_TIM_MspPostInit(&htim4);
|
HAL_TIM_MspPostInit(&htim12);
|
||||||
|
|
||||||
}
|
|
||||||
/* TIM5 init function */
|
|
||||||
void MX_TIM5_Init(void)
|
|
||||||
{
|
|
||||||
|
|
||||||
/* USER CODE BEGIN TIM5_Init 0 */
|
|
||||||
|
|
||||||
/* USER CODE END TIM5_Init 0 */
|
|
||||||
|
|
||||||
TIM_ClockConfigTypeDef sClockSourceConfig = {0};
|
|
||||||
TIM_MasterConfigTypeDef sMasterConfig = {0};
|
|
||||||
TIM_OC_InitTypeDef sConfigOC = {0};
|
|
||||||
|
|
||||||
/* USER CODE BEGIN TIM5_Init 1 */
|
|
||||||
|
|
||||||
/* USER CODE END TIM5_Init 1 */
|
|
||||||
htim5.Instance = TIM5;
|
|
||||||
htim5.Init.Prescaler = 0;
|
|
||||||
htim5.Init.CounterMode = TIM_COUNTERMODE_UP;
|
|
||||||
htim5.Init.Period = 65535;
|
|
||||||
htim5.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
|
|
||||||
htim5.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
|
|
||||||
if (HAL_TIM_Base_Init(&htim5) != HAL_OK)
|
|
||||||
{
|
|
||||||
Error_Handler();
|
|
||||||
}
|
|
||||||
sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
|
|
||||||
if (HAL_TIM_ConfigClockSource(&htim5, &sClockSourceConfig) != HAL_OK)
|
|
||||||
{
|
|
||||||
Error_Handler();
|
|
||||||
}
|
|
||||||
if (HAL_TIM_PWM_Init(&htim5) != HAL_OK)
|
|
||||||
{
|
|
||||||
Error_Handler();
|
|
||||||
}
|
|
||||||
sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
|
|
||||||
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
|
|
||||||
if (HAL_TIMEx_MasterConfigSynchronization(&htim5, &sMasterConfig) != HAL_OK)
|
|
||||||
{
|
|
||||||
Error_Handler();
|
|
||||||
}
|
|
||||||
sConfigOC.OCMode = TIM_OCMODE_PWM1;
|
|
||||||
sConfigOC.Pulse = 0;
|
|
||||||
sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
|
|
||||||
sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
|
|
||||||
if (HAL_TIM_PWM_ConfigChannel(&htim5, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
|
|
||||||
{
|
|
||||||
Error_Handler();
|
|
||||||
}
|
|
||||||
if (HAL_TIM_PWM_ConfigChannel(&htim5, &sConfigOC, TIM_CHANNEL_2) != HAL_OK)
|
|
||||||
{
|
|
||||||
Error_Handler();
|
|
||||||
}
|
|
||||||
if (HAL_TIM_PWM_ConfigChannel(&htim5, &sConfigOC, TIM_CHANNEL_3) != HAL_OK)
|
|
||||||
{
|
|
||||||
Error_Handler();
|
|
||||||
}
|
|
||||||
/* USER CODE BEGIN TIM5_Init 2 */
|
|
||||||
|
|
||||||
/* USER CODE END TIM5_Init 2 */
|
|
||||||
HAL_TIM_MspPostInit(&htim5);
|
|
||||||
|
|
||||||
}
|
|
||||||
/* TIM7 init function */
|
|
||||||
void MX_TIM7_Init(void)
|
|
||||||
{
|
|
||||||
|
|
||||||
/* USER CODE BEGIN TIM7_Init 0 */
|
|
||||||
|
|
||||||
/* USER CODE END TIM7_Init 0 */
|
|
||||||
|
|
||||||
TIM_MasterConfigTypeDef sMasterConfig = {0};
|
|
||||||
|
|
||||||
/* USER CODE BEGIN TIM7_Init 1 */
|
|
||||||
|
|
||||||
/* USER CODE END TIM7_Init 1 */
|
|
||||||
htim7.Instance = TIM7;
|
|
||||||
htim7.Init.Prescaler = 83;
|
|
||||||
htim7.Init.CounterMode = TIM_COUNTERMODE_UP;
|
|
||||||
htim7.Init.Period = 9;
|
|
||||||
htim7.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
|
|
||||||
if (HAL_TIM_Base_Init(&htim7) != HAL_OK)
|
|
||||||
{
|
|
||||||
Error_Handler();
|
|
||||||
}
|
|
||||||
sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
|
|
||||||
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
|
|
||||||
if (HAL_TIMEx_MasterConfigSynchronization(&htim7, &sMasterConfig) != HAL_OK)
|
|
||||||
{
|
|
||||||
Error_Handler();
|
|
||||||
}
|
|
||||||
/* USER CODE BEGIN TIM7_Init 2 */
|
|
||||||
|
|
||||||
/* USER CODE END TIM7_Init 2 */
|
|
||||||
|
|
||||||
}
|
|
||||||
/* TIM8 init function */
|
|
||||||
void MX_TIM8_Init(void)
|
|
||||||
{
|
|
||||||
|
|
||||||
/* USER CODE BEGIN TIM8_Init 0 */
|
|
||||||
|
|
||||||
/* USER CODE END TIM8_Init 0 */
|
|
||||||
|
|
||||||
TIM_ClockConfigTypeDef sClockSourceConfig = {0};
|
|
||||||
TIM_MasterConfigTypeDef sMasterConfig = {0};
|
|
||||||
TIM_OC_InitTypeDef sConfigOC = {0};
|
|
||||||
TIM_BreakDeadTimeConfigTypeDef sBreakDeadTimeConfig = {0};
|
|
||||||
|
|
||||||
/* USER CODE BEGIN TIM8_Init 1 */
|
|
||||||
|
|
||||||
/* USER CODE END TIM8_Init 1 */
|
|
||||||
htim8.Instance = TIM8;
|
|
||||||
htim8.Init.Prescaler = 167;
|
|
||||||
htim8.Init.CounterMode = TIM_COUNTERMODE_UP;
|
|
||||||
htim8.Init.Period = 19999;
|
|
||||||
htim8.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
|
|
||||||
htim8.Init.RepetitionCounter = 0;
|
|
||||||
htim8.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
|
|
||||||
if (HAL_TIM_Base_Init(&htim8) != HAL_OK)
|
|
||||||
{
|
|
||||||
Error_Handler();
|
|
||||||
}
|
|
||||||
sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
|
|
||||||
if (HAL_TIM_ConfigClockSource(&htim8, &sClockSourceConfig) != HAL_OK)
|
|
||||||
{
|
|
||||||
Error_Handler();
|
|
||||||
}
|
|
||||||
if (HAL_TIM_PWM_Init(&htim8) != HAL_OK)
|
|
||||||
{
|
|
||||||
Error_Handler();
|
|
||||||
}
|
|
||||||
sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
|
|
||||||
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
|
|
||||||
if (HAL_TIMEx_MasterConfigSynchronization(&htim8, &sMasterConfig) != HAL_OK)
|
|
||||||
{
|
|
||||||
Error_Handler();
|
|
||||||
}
|
|
||||||
sConfigOC.OCMode = TIM_OCMODE_PWM1;
|
|
||||||
sConfigOC.Pulse = 1000;
|
|
||||||
sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
|
|
||||||
sConfigOC.OCNPolarity = TIM_OCNPOLARITY_HIGH;
|
|
||||||
sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
|
|
||||||
sConfigOC.OCIdleState = TIM_OCIDLESTATE_RESET;
|
|
||||||
sConfigOC.OCNIdleState = TIM_OCNIDLESTATE_RESET;
|
|
||||||
if (HAL_TIM_PWM_ConfigChannel(&htim8, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
|
|
||||||
{
|
|
||||||
Error_Handler();
|
|
||||||
}
|
|
||||||
if (HAL_TIM_PWM_ConfigChannel(&htim8, &sConfigOC, TIM_CHANNEL_2) != HAL_OK)
|
|
||||||
{
|
|
||||||
Error_Handler();
|
|
||||||
}
|
|
||||||
sBreakDeadTimeConfig.OffStateRunMode = TIM_OSSR_DISABLE;
|
|
||||||
sBreakDeadTimeConfig.OffStateIDLEMode = TIM_OSSI_DISABLE;
|
|
||||||
sBreakDeadTimeConfig.LockLevel = TIM_LOCKLEVEL_OFF;
|
|
||||||
sBreakDeadTimeConfig.DeadTime = 0;
|
|
||||||
sBreakDeadTimeConfig.BreakState = TIM_BREAK_DISABLE;
|
|
||||||
sBreakDeadTimeConfig.BreakPolarity = TIM_BREAKPOLARITY_HIGH;
|
|
||||||
sBreakDeadTimeConfig.AutomaticOutput = TIM_AUTOMATICOUTPUT_DISABLE;
|
|
||||||
if (HAL_TIMEx_ConfigBreakDeadTime(&htim8, &sBreakDeadTimeConfig) != HAL_OK)
|
|
||||||
{
|
|
||||||
Error_Handler();
|
|
||||||
}
|
|
||||||
/* USER CODE BEGIN TIM8_Init 2 */
|
|
||||||
|
|
||||||
/* USER CODE END TIM8_Init 2 */
|
|
||||||
HAL_TIM_MspPostInit(&htim8);
|
|
||||||
|
|
||||||
}
|
|
||||||
/* TIM10 init function */
|
|
||||||
void MX_TIM10_Init(void)
|
|
||||||
{
|
|
||||||
|
|
||||||
/* USER CODE BEGIN TIM10_Init 0 */
|
|
||||||
|
|
||||||
/* USER CODE END TIM10_Init 0 */
|
|
||||||
|
|
||||||
TIM_OC_InitTypeDef sConfigOC = {0};
|
|
||||||
|
|
||||||
/* USER CODE BEGIN TIM10_Init 1 */
|
|
||||||
|
|
||||||
/* USER CODE END TIM10_Init 1 */
|
|
||||||
htim10.Instance = TIM10;
|
|
||||||
htim10.Init.Prescaler = 0;
|
|
||||||
htim10.Init.CounterMode = TIM_COUNTERMODE_UP;
|
|
||||||
htim10.Init.Period = 4999;
|
|
||||||
htim10.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
|
|
||||||
htim10.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
|
|
||||||
if (HAL_TIM_Base_Init(&htim10) != HAL_OK)
|
|
||||||
{
|
|
||||||
Error_Handler();
|
|
||||||
}
|
|
||||||
if (HAL_TIM_PWM_Init(&htim10) != HAL_OK)
|
|
||||||
{
|
|
||||||
Error_Handler();
|
|
||||||
}
|
|
||||||
sConfigOC.OCMode = TIM_OCMODE_PWM1;
|
|
||||||
sConfigOC.Pulse = 0;
|
|
||||||
sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
|
|
||||||
sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
|
|
||||||
if (HAL_TIM_PWM_ConfigChannel(&htim10, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
|
|
||||||
{
|
|
||||||
Error_Handler();
|
|
||||||
}
|
|
||||||
/* USER CODE BEGIN TIM10_Init 2 */
|
|
||||||
|
|
||||||
/* USER CODE END TIM10_Init 2 */
|
|
||||||
HAL_TIM_MspPostInit(&htim10);
|
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* tim_baseHandle)
|
void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef* tim_pwmHandle)
|
||||||
{
|
{
|
||||||
|
|
||||||
if(tim_baseHandle->Instance==TIM1)
|
if(tim_pwmHandle->Instance==TIM1)
|
||||||
{
|
{
|
||||||
/* USER CODE BEGIN TIM1_MspInit 0 */
|
/* USER CODE BEGIN TIM1_MspInit 0 */
|
||||||
|
|
||||||
/* USER CODE END TIM1_MspInit 0 */
|
/* USER CODE END TIM1_MspInit 0 */
|
||||||
/* TIM1 clock enable */
|
/* TIM1 clock enable */
|
||||||
__HAL_RCC_TIM1_CLK_ENABLE();
|
__HAL_RCC_TIM1_CLK_ENABLE();
|
||||||
|
|
||||||
/* TIM1 interrupt Init */
|
|
||||||
HAL_NVIC_SetPriority(TIM1_BRK_TIM9_IRQn, 5, 0);
|
|
||||||
HAL_NVIC_EnableIRQ(TIM1_BRK_TIM9_IRQn);
|
|
||||||
/* USER CODE BEGIN TIM1_MspInit 1 */
|
/* USER CODE BEGIN TIM1_MspInit 1 */
|
||||||
|
|
||||||
/* USER CODE END TIM1_MspInit 1 */
|
/* USER CODE END TIM1_MspInit 1 */
|
||||||
}
|
}
|
||||||
else if(tim_baseHandle->Instance==TIM3)
|
else if(tim_pwmHandle->Instance==TIM2)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN TIM2_MspInit 0 */
|
||||||
|
|
||||||
|
/* USER CODE END TIM2_MspInit 0 */
|
||||||
|
/* TIM2 clock enable */
|
||||||
|
__HAL_RCC_TIM2_CLK_ENABLE();
|
||||||
|
/* USER CODE BEGIN TIM2_MspInit 1 */
|
||||||
|
|
||||||
|
/* USER CODE END TIM2_MspInit 1 */
|
||||||
|
}
|
||||||
|
else if(tim_pwmHandle->Instance==TIM3)
|
||||||
{
|
{
|
||||||
/* USER CODE BEGIN TIM3_MspInit 0 */
|
/* USER CODE BEGIN TIM3_MspInit 0 */
|
||||||
|
|
||||||
@@ -463,64 +275,16 @@ void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* tim_baseHandle)
|
|||||||
|
|
||||||
/* USER CODE END TIM3_MspInit 1 */
|
/* USER CODE END TIM3_MspInit 1 */
|
||||||
}
|
}
|
||||||
else if(tim_baseHandle->Instance==TIM4)
|
else if(tim_pwmHandle->Instance==TIM12)
|
||||||
{
|
{
|
||||||
/* USER CODE BEGIN TIM4_MspInit 0 */
|
/* USER CODE BEGIN TIM12_MspInit 0 */
|
||||||
|
|
||||||
/* USER CODE END TIM4_MspInit 0 */
|
/* USER CODE END TIM12_MspInit 0 */
|
||||||
/* TIM4 clock enable */
|
/* TIM12 clock enable */
|
||||||
__HAL_RCC_TIM4_CLK_ENABLE();
|
__HAL_RCC_TIM12_CLK_ENABLE();
|
||||||
/* USER CODE BEGIN TIM4_MspInit 1 */
|
/* USER CODE BEGIN TIM12_MspInit 1 */
|
||||||
|
|
||||||
/* USER CODE END TIM4_MspInit 1 */
|
/* USER CODE END TIM12_MspInit 1 */
|
||||||
}
|
|
||||||
else if(tim_baseHandle->Instance==TIM5)
|
|
||||||
{
|
|
||||||
/* USER CODE BEGIN TIM5_MspInit 0 */
|
|
||||||
|
|
||||||
/* USER CODE END TIM5_MspInit 0 */
|
|
||||||
/* TIM5 clock enable */
|
|
||||||
__HAL_RCC_TIM5_CLK_ENABLE();
|
|
||||||
/* USER CODE BEGIN TIM5_MspInit 1 */
|
|
||||||
|
|
||||||
/* USER CODE END TIM5_MspInit 1 */
|
|
||||||
}
|
|
||||||
else if(tim_baseHandle->Instance==TIM7)
|
|
||||||
{
|
|
||||||
/* USER CODE BEGIN TIM7_MspInit 0 */
|
|
||||||
|
|
||||||
/* USER CODE END TIM7_MspInit 0 */
|
|
||||||
/* TIM7 clock enable */
|
|
||||||
__HAL_RCC_TIM7_CLK_ENABLE();
|
|
||||||
|
|
||||||
/* TIM7 interrupt Init */
|
|
||||||
HAL_NVIC_SetPriority(TIM7_IRQn, 5, 0);
|
|
||||||
HAL_NVIC_EnableIRQ(TIM7_IRQn);
|
|
||||||
/* USER CODE BEGIN TIM7_MspInit 1 */
|
|
||||||
|
|
||||||
/* USER CODE END TIM7_MspInit 1 */
|
|
||||||
}
|
|
||||||
else if(tim_baseHandle->Instance==TIM8)
|
|
||||||
{
|
|
||||||
/* USER CODE BEGIN TIM8_MspInit 0 */
|
|
||||||
|
|
||||||
/* USER CODE END TIM8_MspInit 0 */
|
|
||||||
/* TIM8 clock enable */
|
|
||||||
__HAL_RCC_TIM8_CLK_ENABLE();
|
|
||||||
/* USER CODE BEGIN TIM8_MspInit 1 */
|
|
||||||
|
|
||||||
/* USER CODE END TIM8_MspInit 1 */
|
|
||||||
}
|
|
||||||
else if(tim_baseHandle->Instance==TIM10)
|
|
||||||
{
|
|
||||||
/* USER CODE BEGIN TIM10_MspInit 0 */
|
|
||||||
|
|
||||||
/* USER CODE END TIM10_MspInit 0 */
|
|
||||||
/* TIM10 clock enable */
|
|
||||||
__HAL_RCC_TIM10_CLK_ENABLE();
|
|
||||||
/* USER CODE BEGIN TIM10_MspInit 1 */
|
|
||||||
|
|
||||||
/* USER CODE END TIM10_MspInit 1 */
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
void HAL_TIM_MspPostInit(TIM_HandleTypeDef* timHandle)
|
void HAL_TIM_MspPostInit(TIM_HandleTypeDef* timHandle)
|
||||||
@@ -534,15 +298,13 @@ void HAL_TIM_MspPostInit(TIM_HandleTypeDef* timHandle)
|
|||||||
/* USER CODE END TIM1_MspPostInit 0 */
|
/* USER CODE END TIM1_MspPostInit 0 */
|
||||||
__HAL_RCC_GPIOE_CLK_ENABLE();
|
__HAL_RCC_GPIOE_CLK_ENABLE();
|
||||||
/**TIM1 GPIO Configuration
|
/**TIM1 GPIO Configuration
|
||||||
PE13 ------> TIM1_CH3
|
|
||||||
PE9 ------> TIM1_CH1
|
PE9 ------> TIM1_CH1
|
||||||
PE11 ------> TIM1_CH2
|
PE13 ------> TIM1_CH3
|
||||||
PE14 ------> TIM1_CH4
|
|
||||||
*/
|
*/
|
||||||
GPIO_InitStruct.Pin = GPIO_PIN_13|GPIO_PIN_9|GPIO_PIN_11|GPIO_PIN_14;
|
GPIO_InitStruct.Pin = GPIO_PIN_9|GPIO_PIN_13;
|
||||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||||
GPIO_InitStruct.Pull = GPIO_PULLUP;
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||||
GPIO_InitStruct.Alternate = GPIO_AF1_TIM1;
|
GPIO_InitStruct.Alternate = GPIO_AF1_TIM1;
|
||||||
HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
|
HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
|
||||||
|
|
||||||
@@ -550,143 +312,108 @@ void HAL_TIM_MspPostInit(TIM_HandleTypeDef* timHandle)
|
|||||||
|
|
||||||
/* USER CODE END TIM1_MspPostInit 1 */
|
/* USER CODE END TIM1_MspPostInit 1 */
|
||||||
}
|
}
|
||||||
|
else if(timHandle->Instance==TIM2)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN TIM2_MspPostInit 0 */
|
||||||
|
|
||||||
|
/* USER CODE END TIM2_MspPostInit 0 */
|
||||||
|
|
||||||
|
__HAL_RCC_GPIOA_CLK_ENABLE();
|
||||||
|
/**TIM2 GPIO Configuration
|
||||||
|
PA0 ------> TIM2_CH1
|
||||||
|
PA2 ------> TIM2_CH3
|
||||||
|
*/
|
||||||
|
GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_2;
|
||||||
|
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||||
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||||
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||||
|
GPIO_InitStruct.Alternate = GPIO_AF1_TIM2;
|
||||||
|
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||||
|
|
||||||
|
/* USER CODE BEGIN TIM2_MspPostInit 1 */
|
||||||
|
|
||||||
|
/* USER CODE END TIM2_MspPostInit 1 */
|
||||||
|
}
|
||||||
else if(timHandle->Instance==TIM3)
|
else if(timHandle->Instance==TIM3)
|
||||||
{
|
{
|
||||||
/* USER CODE BEGIN TIM3_MspPostInit 0 */
|
/* USER CODE BEGIN TIM3_MspPostInit 0 */
|
||||||
|
|
||||||
/* USER CODE END TIM3_MspPostInit 0 */
|
/* USER CODE END TIM3_MspPostInit 0 */
|
||||||
|
|
||||||
__HAL_RCC_GPIOC_CLK_ENABLE();
|
__HAL_RCC_GPIOA_CLK_ENABLE();
|
||||||
|
__HAL_RCC_GPIOB_CLK_ENABLE();
|
||||||
/**TIM3 GPIO Configuration
|
/**TIM3 GPIO Configuration
|
||||||
PC8 ------> TIM3_CH3
|
PA7 ------> TIM3_CH2
|
||||||
|
PB1 ------> TIM3_CH4
|
||||||
*/
|
*/
|
||||||
GPIO_InitStruct.Pin = LASER_Pin;
|
GPIO_InitStruct.Pin = WS2812_Pin;
|
||||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||||
GPIO_InitStruct.Pull = GPIO_PULLUP;
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||||
GPIO_InitStruct.Alternate = GPIO_AF2_TIM3;
|
GPIO_InitStruct.Alternate = GPIO_AF2_TIM3;
|
||||||
HAL_GPIO_Init(LASER_GPIO_Port, &GPIO_InitStruct);
|
HAL_GPIO_Init(WS2812_GPIO_Port, &GPIO_InitStruct);
|
||||||
|
|
||||||
|
GPIO_InitStruct.Pin = IMU_HEAT_Pin;
|
||||||
|
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||||
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||||
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||||
|
GPIO_InitStruct.Alternate = GPIO_AF2_TIM3;
|
||||||
|
HAL_GPIO_Init(IMU_HEAT_GPIO_Port, &GPIO_InitStruct);
|
||||||
|
|
||||||
/* USER CODE BEGIN TIM3_MspPostInit 1 */
|
/* USER CODE BEGIN TIM3_MspPostInit 1 */
|
||||||
|
|
||||||
/* USER CODE END TIM3_MspPostInit 1 */
|
/* USER CODE END TIM3_MspPostInit 1 */
|
||||||
}
|
}
|
||||||
else if(timHandle->Instance==TIM4)
|
else if(timHandle->Instance==TIM12)
|
||||||
{
|
{
|
||||||
/* USER CODE BEGIN TIM4_MspPostInit 0 */
|
/* USER CODE BEGIN TIM12_MspPostInit 0 */
|
||||||
|
|
||||||
/* USER CODE END TIM4_MspPostInit 0 */
|
/* USER CODE END TIM12_MspPostInit 0 */
|
||||||
|
|
||||||
__HAL_RCC_GPIOD_CLK_ENABLE();
|
__HAL_RCC_GPIOB_CLK_ENABLE();
|
||||||
/**TIM4 GPIO Configuration
|
/**TIM12 GPIO Configuration
|
||||||
PD14 ------> TIM4_CH3
|
PB15 ------> TIM12_CH2
|
||||||
*/
|
*/
|
||||||
GPIO_InitStruct.Pin = BUZZER_Pin;
|
GPIO_InitStruct.Pin = BUZZER_Pin;
|
||||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||||
GPIO_InitStruct.Pull = GPIO_PULLUP;
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||||
GPIO_InitStruct.Alternate = GPIO_AF2_TIM4;
|
GPIO_InitStruct.Alternate = GPIO_AF2_TIM12;
|
||||||
HAL_GPIO_Init(BUZZER_GPIO_Port, &GPIO_InitStruct);
|
HAL_GPIO_Init(BUZZER_GPIO_Port, &GPIO_InitStruct);
|
||||||
|
|
||||||
/* USER CODE BEGIN TIM4_MspPostInit 1 */
|
/* USER CODE BEGIN TIM12_MspPostInit 1 */
|
||||||
|
|
||||||
/* USER CODE END TIM4_MspPostInit 1 */
|
/* USER CODE END TIM12_MspPostInit 1 */
|
||||||
}
|
|
||||||
else if(timHandle->Instance==TIM5)
|
|
||||||
{
|
|
||||||
/* USER CODE BEGIN TIM5_MspPostInit 0 */
|
|
||||||
|
|
||||||
/* USER CODE END TIM5_MspPostInit 0 */
|
|
||||||
|
|
||||||
__HAL_RCC_GPIOH_CLK_ENABLE();
|
|
||||||
/**TIM5 GPIO Configuration
|
|
||||||
PH12 ------> TIM5_CH3
|
|
||||||
PH11 ------> TIM5_CH2
|
|
||||||
PH10 ------> TIM5_CH1
|
|
||||||
*/
|
|
||||||
GPIO_InitStruct.Pin = LED_R_Pin|LED_G_Pin|LED_B_Pin;
|
|
||||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
|
||||||
GPIO_InitStruct.Pull = GPIO_PULLUP;
|
|
||||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
|
|
||||||
GPIO_InitStruct.Alternate = GPIO_AF2_TIM5;
|
|
||||||
HAL_GPIO_Init(GPIOH, &GPIO_InitStruct);
|
|
||||||
|
|
||||||
/* USER CODE BEGIN TIM5_MspPostInit 1 */
|
|
||||||
|
|
||||||
/* USER CODE END TIM5_MspPostInit 1 */
|
|
||||||
}
|
|
||||||
else if(timHandle->Instance==TIM8)
|
|
||||||
{
|
|
||||||
/* USER CODE BEGIN TIM8_MspPostInit 0 */
|
|
||||||
|
|
||||||
/* USER CODE END TIM8_MspPostInit 0 */
|
|
||||||
|
|
||||||
__HAL_RCC_GPIOI_CLK_ENABLE();
|
|
||||||
__HAL_RCC_GPIOC_CLK_ENABLE();
|
|
||||||
/**TIM8 GPIO Configuration
|
|
||||||
PI6 ------> TIM8_CH2
|
|
||||||
PC6 ------> TIM8_CH1
|
|
||||||
*/
|
|
||||||
GPIO_InitStruct.Pin = GPIO_PIN_6;
|
|
||||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
|
||||||
GPIO_InitStruct.Pull = GPIO_PULLUP;
|
|
||||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
|
|
||||||
GPIO_InitStruct.Alternate = GPIO_AF3_TIM8;
|
|
||||||
HAL_GPIO_Init(GPIOI, &GPIO_InitStruct);
|
|
||||||
|
|
||||||
GPIO_InitStruct.Pin = GPIO_PIN_6;
|
|
||||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
|
||||||
GPIO_InitStruct.Pull = GPIO_PULLUP;
|
|
||||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
|
|
||||||
GPIO_InitStruct.Alternate = GPIO_AF3_TIM8;
|
|
||||||
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
|
|
||||||
|
|
||||||
/* USER CODE BEGIN TIM8_MspPostInit 1 */
|
|
||||||
|
|
||||||
/* USER CODE END TIM8_MspPostInit 1 */
|
|
||||||
}
|
|
||||||
else if(timHandle->Instance==TIM10)
|
|
||||||
{
|
|
||||||
/* USER CODE BEGIN TIM10_MspPostInit 0 */
|
|
||||||
|
|
||||||
/* USER CODE END TIM10_MspPostInit 0 */
|
|
||||||
|
|
||||||
__HAL_RCC_GPIOF_CLK_ENABLE();
|
|
||||||
/**TIM10 GPIO Configuration
|
|
||||||
PF6 ------> TIM10_CH1
|
|
||||||
*/
|
|
||||||
GPIO_InitStruct.Pin = IMU_HEAT_PWM_Pin;
|
|
||||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
|
||||||
GPIO_InitStruct.Pull = GPIO_PULLDOWN;
|
|
||||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
|
|
||||||
GPIO_InitStruct.Alternate = GPIO_AF3_TIM10;
|
|
||||||
HAL_GPIO_Init(IMU_HEAT_PWM_GPIO_Port, &GPIO_InitStruct);
|
|
||||||
|
|
||||||
/* USER CODE BEGIN TIM10_MspPostInit 1 */
|
|
||||||
|
|
||||||
/* USER CODE END TIM10_MspPostInit 1 */
|
|
||||||
}
|
}
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* tim_baseHandle)
|
void HAL_TIM_PWM_MspDeInit(TIM_HandleTypeDef* tim_pwmHandle)
|
||||||
{
|
{
|
||||||
|
|
||||||
if(tim_baseHandle->Instance==TIM1)
|
if(tim_pwmHandle->Instance==TIM1)
|
||||||
{
|
{
|
||||||
/* USER CODE BEGIN TIM1_MspDeInit 0 */
|
/* USER CODE BEGIN TIM1_MspDeInit 0 */
|
||||||
|
|
||||||
/* USER CODE END TIM1_MspDeInit 0 */
|
/* USER CODE END TIM1_MspDeInit 0 */
|
||||||
/* Peripheral clock disable */
|
/* Peripheral clock disable */
|
||||||
__HAL_RCC_TIM1_CLK_DISABLE();
|
__HAL_RCC_TIM1_CLK_DISABLE();
|
||||||
|
|
||||||
/* TIM1 interrupt Deinit */
|
|
||||||
HAL_NVIC_DisableIRQ(TIM1_BRK_TIM9_IRQn);
|
|
||||||
/* USER CODE BEGIN TIM1_MspDeInit 1 */
|
/* USER CODE BEGIN TIM1_MspDeInit 1 */
|
||||||
|
|
||||||
/* USER CODE END TIM1_MspDeInit 1 */
|
/* USER CODE END TIM1_MspDeInit 1 */
|
||||||
}
|
}
|
||||||
else if(tim_baseHandle->Instance==TIM3)
|
else if(tim_pwmHandle->Instance==TIM2)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN TIM2_MspDeInit 0 */
|
||||||
|
|
||||||
|
/* USER CODE END TIM2_MspDeInit 0 */
|
||||||
|
/* Peripheral clock disable */
|
||||||
|
__HAL_RCC_TIM2_CLK_DISABLE();
|
||||||
|
/* USER CODE BEGIN TIM2_MspDeInit 1 */
|
||||||
|
|
||||||
|
/* USER CODE END TIM2_MspDeInit 1 */
|
||||||
|
}
|
||||||
|
else if(tim_pwmHandle->Instance==TIM3)
|
||||||
{
|
{
|
||||||
/* USER CODE BEGIN TIM3_MspDeInit 0 */
|
/* USER CODE BEGIN TIM3_MspDeInit 0 */
|
||||||
|
|
||||||
@@ -697,63 +424,16 @@ void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* tim_baseHandle)
|
|||||||
|
|
||||||
/* USER CODE END TIM3_MspDeInit 1 */
|
/* USER CODE END TIM3_MspDeInit 1 */
|
||||||
}
|
}
|
||||||
else if(tim_baseHandle->Instance==TIM4)
|
else if(tim_pwmHandle->Instance==TIM12)
|
||||||
{
|
{
|
||||||
/* USER CODE BEGIN TIM4_MspDeInit 0 */
|
/* USER CODE BEGIN TIM12_MspDeInit 0 */
|
||||||
|
|
||||||
/* USER CODE END TIM4_MspDeInit 0 */
|
/* USER CODE END TIM12_MspDeInit 0 */
|
||||||
/* Peripheral clock disable */
|
/* Peripheral clock disable */
|
||||||
__HAL_RCC_TIM4_CLK_DISABLE();
|
__HAL_RCC_TIM12_CLK_DISABLE();
|
||||||
/* USER CODE BEGIN TIM4_MspDeInit 1 */
|
/* USER CODE BEGIN TIM12_MspDeInit 1 */
|
||||||
|
|
||||||
/* USER CODE END TIM4_MspDeInit 1 */
|
/* USER CODE END TIM12_MspDeInit 1 */
|
||||||
}
|
|
||||||
else if(tim_baseHandle->Instance==TIM5)
|
|
||||||
{
|
|
||||||
/* USER CODE BEGIN TIM5_MspDeInit 0 */
|
|
||||||
|
|
||||||
/* USER CODE END TIM5_MspDeInit 0 */
|
|
||||||
/* Peripheral clock disable */
|
|
||||||
__HAL_RCC_TIM5_CLK_DISABLE();
|
|
||||||
/* USER CODE BEGIN TIM5_MspDeInit 1 */
|
|
||||||
|
|
||||||
/* USER CODE END TIM5_MspDeInit 1 */
|
|
||||||
}
|
|
||||||
else if(tim_baseHandle->Instance==TIM7)
|
|
||||||
{
|
|
||||||
/* USER CODE BEGIN TIM7_MspDeInit 0 */
|
|
||||||
|
|
||||||
/* USER CODE END TIM7_MspDeInit 0 */
|
|
||||||
/* Peripheral clock disable */
|
|
||||||
__HAL_RCC_TIM7_CLK_DISABLE();
|
|
||||||
|
|
||||||
/* TIM7 interrupt Deinit */
|
|
||||||
HAL_NVIC_DisableIRQ(TIM7_IRQn);
|
|
||||||
/* USER CODE BEGIN TIM7_MspDeInit 1 */
|
|
||||||
|
|
||||||
/* USER CODE END TIM7_MspDeInit 1 */
|
|
||||||
}
|
|
||||||
else if(tim_baseHandle->Instance==TIM8)
|
|
||||||
{
|
|
||||||
/* USER CODE BEGIN TIM8_MspDeInit 0 */
|
|
||||||
|
|
||||||
/* USER CODE END TIM8_MspDeInit 0 */
|
|
||||||
/* Peripheral clock disable */
|
|
||||||
__HAL_RCC_TIM8_CLK_DISABLE();
|
|
||||||
/* USER CODE BEGIN TIM8_MspDeInit 1 */
|
|
||||||
|
|
||||||
/* USER CODE END TIM8_MspDeInit 1 */
|
|
||||||
}
|
|
||||||
else if(tim_baseHandle->Instance==TIM10)
|
|
||||||
{
|
|
||||||
/* USER CODE BEGIN TIM10_MspDeInit 0 */
|
|
||||||
|
|
||||||
/* USER CODE END TIM10_MspDeInit 0 */
|
|
||||||
/* Peripheral clock disable */
|
|
||||||
__HAL_RCC_TIM10_CLK_DISABLE();
|
|
||||||
/* USER CODE BEGIN TIM10_MspDeInit 1 */
|
|
||||||
|
|
||||||
/* USER CODE END TIM10_MspDeInit 1 */
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
668
Core/Src/usart.c
668
Core/Src/usart.c
@@ -7,7 +7,7 @@
|
|||||||
******************************************************************************
|
******************************************************************************
|
||||||
* @attention
|
* @attention
|
||||||
*
|
*
|
||||||
* Copyright (c) 2025 STMicroelectronics.
|
* Copyright (c) 2026 STMicroelectronics.
|
||||||
* All rights reserved.
|
* All rights reserved.
|
||||||
*
|
*
|
||||||
* This software is licensed under terms that can be found in the LICENSE file
|
* This software is licensed under terms that can be found in the LICENSE file
|
||||||
@@ -24,15 +24,102 @@
|
|||||||
|
|
||||||
/* USER CODE END 0 */
|
/* USER CODE END 0 */
|
||||||
|
|
||||||
|
UART_HandleTypeDef huart5;
|
||||||
|
UART_HandleTypeDef huart7;
|
||||||
UART_HandleTypeDef huart1;
|
UART_HandleTypeDef huart1;
|
||||||
|
UART_HandleTypeDef huart2;
|
||||||
UART_HandleTypeDef huart3;
|
UART_HandleTypeDef huart3;
|
||||||
UART_HandleTypeDef huart6;
|
UART_HandleTypeDef huart10;
|
||||||
|
DMA_HandleTypeDef hdma_uart5_rx;
|
||||||
DMA_HandleTypeDef hdma_usart1_tx;
|
DMA_HandleTypeDef hdma_usart1_tx;
|
||||||
DMA_HandleTypeDef hdma_usart1_rx;
|
DMA_HandleTypeDef hdma_usart1_rx;
|
||||||
DMA_HandleTypeDef hdma_usart3_rx;
|
|
||||||
DMA_HandleTypeDef hdma_usart6_rx;
|
|
||||||
DMA_HandleTypeDef hdma_usart6_tx;
|
|
||||||
|
|
||||||
|
/* UART5 init function */
|
||||||
|
void MX_UART5_Init(void)
|
||||||
|
{
|
||||||
|
|
||||||
|
/* USER CODE BEGIN UART5_Init 0 */
|
||||||
|
|
||||||
|
/* USER CODE END UART5_Init 0 */
|
||||||
|
|
||||||
|
/* USER CODE BEGIN UART5_Init 1 */
|
||||||
|
|
||||||
|
/* USER CODE END UART5_Init 1 */
|
||||||
|
huart5.Instance = UART5;
|
||||||
|
huart5.Init.BaudRate = 100000;
|
||||||
|
huart5.Init.WordLength = UART_WORDLENGTH_9B;
|
||||||
|
huart5.Init.StopBits = UART_STOPBITS_2;
|
||||||
|
huart5.Init.Parity = UART_PARITY_EVEN;
|
||||||
|
huart5.Init.Mode = UART_MODE_RX;
|
||||||
|
huart5.Init.HwFlowCtl = UART_HWCONTROL_NONE;
|
||||||
|
huart5.Init.OverSampling = UART_OVERSAMPLING_16;
|
||||||
|
huart5.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
|
||||||
|
huart5.Init.ClockPrescaler = UART_PRESCALER_DIV1;
|
||||||
|
huart5.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
|
||||||
|
if (HAL_UART_Init(&huart5) != HAL_OK)
|
||||||
|
{
|
||||||
|
Error_Handler();
|
||||||
|
}
|
||||||
|
if (HAL_UARTEx_SetTxFifoThreshold(&huart5, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK)
|
||||||
|
{
|
||||||
|
Error_Handler();
|
||||||
|
}
|
||||||
|
if (HAL_UARTEx_SetRxFifoThreshold(&huart5, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK)
|
||||||
|
{
|
||||||
|
Error_Handler();
|
||||||
|
}
|
||||||
|
if (HAL_UARTEx_DisableFifoMode(&huart5) != HAL_OK)
|
||||||
|
{
|
||||||
|
Error_Handler();
|
||||||
|
}
|
||||||
|
/* USER CODE BEGIN UART5_Init 2 */
|
||||||
|
|
||||||
|
/* USER CODE END UART5_Init 2 */
|
||||||
|
|
||||||
|
}
|
||||||
|
/* UART7 init function */
|
||||||
|
void MX_UART7_Init(void)
|
||||||
|
{
|
||||||
|
|
||||||
|
/* USER CODE BEGIN UART7_Init 0 */
|
||||||
|
|
||||||
|
/* USER CODE END UART7_Init 0 */
|
||||||
|
|
||||||
|
/* USER CODE BEGIN UART7_Init 1 */
|
||||||
|
|
||||||
|
/* USER CODE END UART7_Init 1 */
|
||||||
|
huart7.Instance = UART7;
|
||||||
|
huart7.Init.BaudRate = 921600;
|
||||||
|
huart7.Init.WordLength = UART_WORDLENGTH_8B;
|
||||||
|
huart7.Init.StopBits = UART_STOPBITS_1;
|
||||||
|
huart7.Init.Parity = UART_PARITY_NONE;
|
||||||
|
huart7.Init.Mode = UART_MODE_TX_RX;
|
||||||
|
huart7.Init.HwFlowCtl = UART_HWCONTROL_NONE;
|
||||||
|
huart7.Init.OverSampling = UART_OVERSAMPLING_16;
|
||||||
|
huart7.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
|
||||||
|
huart7.Init.ClockPrescaler = UART_PRESCALER_DIV1;
|
||||||
|
huart7.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
|
||||||
|
if (HAL_UART_Init(&huart7) != HAL_OK)
|
||||||
|
{
|
||||||
|
Error_Handler();
|
||||||
|
}
|
||||||
|
if (HAL_UARTEx_SetTxFifoThreshold(&huart7, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK)
|
||||||
|
{
|
||||||
|
Error_Handler();
|
||||||
|
}
|
||||||
|
if (HAL_UARTEx_SetRxFifoThreshold(&huart7, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK)
|
||||||
|
{
|
||||||
|
Error_Handler();
|
||||||
|
}
|
||||||
|
if (HAL_UARTEx_DisableFifoMode(&huart7) != HAL_OK)
|
||||||
|
{
|
||||||
|
Error_Handler();
|
||||||
|
}
|
||||||
|
/* USER CODE BEGIN UART7_Init 2 */
|
||||||
|
|
||||||
|
/* USER CODE END UART7_Init 2 */
|
||||||
|
|
||||||
|
}
|
||||||
/* USART1 init function */
|
/* USART1 init function */
|
||||||
|
|
||||||
void MX_USART1_UART_Init(void)
|
void MX_USART1_UART_Init(void)
|
||||||
@@ -46,21 +133,80 @@ void MX_USART1_UART_Init(void)
|
|||||||
|
|
||||||
/* USER CODE END USART1_Init 1 */
|
/* USER CODE END USART1_Init 1 */
|
||||||
huart1.Instance = USART1;
|
huart1.Instance = USART1;
|
||||||
huart1.Init.BaudRate = 115200;
|
huart1.Init.BaudRate = 921600;
|
||||||
huart1.Init.WordLength = UART_WORDLENGTH_8B;
|
huart1.Init.WordLength = UART_WORDLENGTH_8B;
|
||||||
huart1.Init.StopBits = UART_STOPBITS_1;
|
huart1.Init.StopBits = UART_STOPBITS_1;
|
||||||
huart1.Init.Parity = UART_PARITY_NONE;
|
huart1.Init.Parity = UART_PARITY_NONE;
|
||||||
huart1.Init.Mode = UART_MODE_TX_RX;
|
huart1.Init.Mode = UART_MODE_TX_RX;
|
||||||
huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
|
huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
|
||||||
huart1.Init.OverSampling = UART_OVERSAMPLING_16;
|
huart1.Init.OverSampling = UART_OVERSAMPLING_16;
|
||||||
|
huart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
|
||||||
|
huart1.Init.ClockPrescaler = UART_PRESCALER_DIV1;
|
||||||
|
huart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
|
||||||
if (HAL_UART_Init(&huart1) != HAL_OK)
|
if (HAL_UART_Init(&huart1) != HAL_OK)
|
||||||
{
|
{
|
||||||
Error_Handler();
|
Error_Handler();
|
||||||
}
|
}
|
||||||
|
if (HAL_UARTEx_SetTxFifoThreshold(&huart1, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK)
|
||||||
|
{
|
||||||
|
Error_Handler();
|
||||||
|
}
|
||||||
|
if (HAL_UARTEx_SetRxFifoThreshold(&huart1, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK)
|
||||||
|
{
|
||||||
|
Error_Handler();
|
||||||
|
}
|
||||||
|
if (HAL_UARTEx_DisableFifoMode(&huart1) != HAL_OK)
|
||||||
|
{
|
||||||
|
Error_Handler();
|
||||||
|
}
|
||||||
/* USER CODE BEGIN USART1_Init 2 */
|
/* USER CODE BEGIN USART1_Init 2 */
|
||||||
|
|
||||||
/* USER CODE END USART1_Init 2 */
|
/* USER CODE END USART1_Init 2 */
|
||||||
|
|
||||||
|
}
|
||||||
|
/* USART2 init function */
|
||||||
|
|
||||||
|
void MX_USART2_UART_Init(void)
|
||||||
|
{
|
||||||
|
|
||||||
|
/* USER CODE BEGIN USART2_Init 0 */
|
||||||
|
|
||||||
|
/* USER CODE END USART2_Init 0 */
|
||||||
|
|
||||||
|
/* USER CODE BEGIN USART2_Init 1 */
|
||||||
|
|
||||||
|
/* USER CODE END USART2_Init 1 */
|
||||||
|
huart2.Instance = USART2;
|
||||||
|
huart2.Init.BaudRate = 921600;
|
||||||
|
huart2.Init.WordLength = UART_WORDLENGTH_8B;
|
||||||
|
huart2.Init.StopBits = UART_STOPBITS_1;
|
||||||
|
huart2.Init.Parity = UART_PARITY_NONE;
|
||||||
|
huart2.Init.Mode = UART_MODE_TX_RX;
|
||||||
|
huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE;
|
||||||
|
huart2.Init.OverSampling = UART_OVERSAMPLING_16;
|
||||||
|
huart2.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
|
||||||
|
huart2.Init.ClockPrescaler = UART_PRESCALER_DIV1;
|
||||||
|
huart2.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
|
||||||
|
if (HAL_RS485Ex_Init(&huart2, UART_DE_POLARITY_HIGH, 0, 0) != HAL_OK)
|
||||||
|
{
|
||||||
|
Error_Handler();
|
||||||
|
}
|
||||||
|
if (HAL_UARTEx_SetTxFifoThreshold(&huart2, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK)
|
||||||
|
{
|
||||||
|
Error_Handler();
|
||||||
|
}
|
||||||
|
if (HAL_UARTEx_SetRxFifoThreshold(&huart2, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK)
|
||||||
|
{
|
||||||
|
Error_Handler();
|
||||||
|
}
|
||||||
|
if (HAL_UARTEx_DisableFifoMode(&huart2) != HAL_OK)
|
||||||
|
{
|
||||||
|
Error_Handler();
|
||||||
|
}
|
||||||
|
/* USER CODE BEGIN USART2_Init 2 */
|
||||||
|
|
||||||
|
/* USER CODE END USART2_Init 2 */
|
||||||
|
|
||||||
}
|
}
|
||||||
/* USART3 init function */
|
/* USART3 init function */
|
||||||
|
|
||||||
@@ -75,14 +221,29 @@ void MX_USART3_UART_Init(void)
|
|||||||
|
|
||||||
/* USER CODE END USART3_Init 1 */
|
/* USER CODE END USART3_Init 1 */
|
||||||
huart3.Instance = USART3;
|
huart3.Instance = USART3;
|
||||||
huart3.Init.BaudRate = 100000;
|
huart3.Init.BaudRate = 921600;
|
||||||
huart3.Init.WordLength = UART_WORDLENGTH_8B;
|
huart3.Init.WordLength = UART_WORDLENGTH_8B;
|
||||||
huart3.Init.StopBits = UART_STOPBITS_1;
|
huart3.Init.StopBits = UART_STOPBITS_1;
|
||||||
huart3.Init.Parity = UART_PARITY_EVEN;
|
huart3.Init.Parity = UART_PARITY_NONE;
|
||||||
huart3.Init.Mode = UART_MODE_RX;
|
huart3.Init.Mode = UART_MODE_TX_RX;
|
||||||
huart3.Init.HwFlowCtl = UART_HWCONTROL_NONE;
|
huart3.Init.HwFlowCtl = UART_HWCONTROL_NONE;
|
||||||
huart3.Init.OverSampling = UART_OVERSAMPLING_16;
|
huart3.Init.OverSampling = UART_OVERSAMPLING_16;
|
||||||
if (HAL_UART_Init(&huart3) != HAL_OK)
|
huart3.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
|
||||||
|
huart3.Init.ClockPrescaler = UART_PRESCALER_DIV1;
|
||||||
|
huart3.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
|
||||||
|
if (HAL_RS485Ex_Init(&huart3, UART_DE_POLARITY_HIGH, 0, 0) != HAL_OK)
|
||||||
|
{
|
||||||
|
Error_Handler();
|
||||||
|
}
|
||||||
|
if (HAL_UARTEx_SetTxFifoThreshold(&huart3, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK)
|
||||||
|
{
|
||||||
|
Error_Handler();
|
||||||
|
}
|
||||||
|
if (HAL_UARTEx_SetRxFifoThreshold(&huart3, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK)
|
||||||
|
{
|
||||||
|
Error_Handler();
|
||||||
|
}
|
||||||
|
if (HAL_UARTEx_DisableFifoMode(&huart3) != HAL_OK)
|
||||||
{
|
{
|
||||||
Error_Handler();
|
Error_Handler();
|
||||||
}
|
}
|
||||||
@@ -91,33 +252,48 @@ void MX_USART3_UART_Init(void)
|
|||||||
/* USER CODE END USART3_Init 2 */
|
/* USER CODE END USART3_Init 2 */
|
||||||
|
|
||||||
}
|
}
|
||||||
/* USART6 init function */
|
/* USART10 init function */
|
||||||
|
|
||||||
void MX_USART6_UART_Init(void)
|
void MX_USART10_UART_Init(void)
|
||||||
{
|
{
|
||||||
|
|
||||||
/* USER CODE BEGIN USART6_Init 0 */
|
/* USER CODE BEGIN USART10_Init 0 */
|
||||||
|
|
||||||
/* USER CODE END USART6_Init 0 */
|
/* USER CODE END USART10_Init 0 */
|
||||||
|
|
||||||
/* USER CODE BEGIN USART6_Init 1 */
|
/* USER CODE BEGIN USART10_Init 1 */
|
||||||
|
|
||||||
/* USER CODE END USART6_Init 1 */
|
/* USER CODE END USART10_Init 1 */
|
||||||
huart6.Instance = USART6;
|
huart10.Instance = USART10;
|
||||||
huart6.Init.BaudRate = 115200;
|
huart10.Init.BaudRate = 921600;
|
||||||
huart6.Init.WordLength = UART_WORDLENGTH_8B;
|
huart10.Init.WordLength = UART_WORDLENGTH_8B;
|
||||||
huart6.Init.StopBits = UART_STOPBITS_1;
|
huart10.Init.StopBits = UART_STOPBITS_1;
|
||||||
huart6.Init.Parity = UART_PARITY_NONE;
|
huart10.Init.Parity = UART_PARITY_NONE;
|
||||||
huart6.Init.Mode = UART_MODE_TX_RX;
|
huart10.Init.Mode = UART_MODE_TX_RX;
|
||||||
huart6.Init.HwFlowCtl = UART_HWCONTROL_NONE;
|
huart10.Init.HwFlowCtl = UART_HWCONTROL_NONE;
|
||||||
huart6.Init.OverSampling = UART_OVERSAMPLING_16;
|
huart10.Init.OverSampling = UART_OVERSAMPLING_16;
|
||||||
if (HAL_UART_Init(&huart6) != HAL_OK)
|
huart10.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
|
||||||
|
huart10.Init.ClockPrescaler = UART_PRESCALER_DIV1;
|
||||||
|
huart10.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
|
||||||
|
if (HAL_UART_Init(&huart10) != HAL_OK)
|
||||||
{
|
{
|
||||||
Error_Handler();
|
Error_Handler();
|
||||||
}
|
}
|
||||||
/* USER CODE BEGIN USART6_Init 2 */
|
if (HAL_UARTEx_SetTxFifoThreshold(&huart10, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK)
|
||||||
|
{
|
||||||
|
Error_Handler();
|
||||||
|
}
|
||||||
|
if (HAL_UARTEx_SetRxFifoThreshold(&huart10, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK)
|
||||||
|
{
|
||||||
|
Error_Handler();
|
||||||
|
}
|
||||||
|
if (HAL_UARTEx_DisableFifoMode(&huart10) != HAL_OK)
|
||||||
|
{
|
||||||
|
Error_Handler();
|
||||||
|
}
|
||||||
|
/* USER CODE BEGIN USART10_Init 2 */
|
||||||
|
|
||||||
/* USER CODE END USART6_Init 2 */
|
/* USER CODE END USART10_Init 2 */
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -125,45 +301,149 @@ void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle)
|
|||||||
{
|
{
|
||||||
|
|
||||||
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
||||||
if(uartHandle->Instance==USART1)
|
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
|
||||||
|
if(uartHandle->Instance==UART5)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN UART5_MspInit 0 */
|
||||||
|
|
||||||
|
/* USER CODE END UART5_MspInit 0 */
|
||||||
|
|
||||||
|
/** Initializes the peripherals clock
|
||||||
|
*/
|
||||||
|
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_UART5;
|
||||||
|
PeriphClkInitStruct.Usart234578ClockSelection = RCC_USART234578CLKSOURCE_D2PCLK1;
|
||||||
|
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
|
||||||
|
{
|
||||||
|
Error_Handler();
|
||||||
|
}
|
||||||
|
|
||||||
|
/* UART5 clock enable */
|
||||||
|
__HAL_RCC_UART5_CLK_ENABLE();
|
||||||
|
|
||||||
|
__HAL_RCC_GPIOC_CLK_ENABLE();
|
||||||
|
__HAL_RCC_GPIOD_CLK_ENABLE();
|
||||||
|
/**UART5 GPIO Configuration
|
||||||
|
PC12 ------> UART5_TX
|
||||||
|
PD2 ------> UART5_RX
|
||||||
|
*/
|
||||||
|
GPIO_InitStruct.Pin = GPIO_PIN_12;
|
||||||
|
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||||
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||||
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||||
|
GPIO_InitStruct.Alternate = GPIO_AF8_UART5;
|
||||||
|
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
|
||||||
|
|
||||||
|
GPIO_InitStruct.Pin = GPIO_PIN_2;
|
||||||
|
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||||
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||||
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||||
|
GPIO_InitStruct.Alternate = GPIO_AF8_UART5;
|
||||||
|
HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
|
||||||
|
|
||||||
|
/* UART5 DMA Init */
|
||||||
|
/* UART5_RX Init */
|
||||||
|
hdma_uart5_rx.Instance = DMA1_Stream3;
|
||||||
|
hdma_uart5_rx.Init.Request = DMA_REQUEST_UART5_RX;
|
||||||
|
hdma_uart5_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
|
||||||
|
hdma_uart5_rx.Init.PeriphInc = DMA_PINC_DISABLE;
|
||||||
|
hdma_uart5_rx.Init.MemInc = DMA_MINC_ENABLE;
|
||||||
|
hdma_uart5_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
|
||||||
|
hdma_uart5_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
|
||||||
|
hdma_uart5_rx.Init.Mode = DMA_NORMAL;
|
||||||
|
hdma_uart5_rx.Init.Priority = DMA_PRIORITY_LOW;
|
||||||
|
hdma_uart5_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
|
||||||
|
if (HAL_DMA_Init(&hdma_uart5_rx) != HAL_OK)
|
||||||
|
{
|
||||||
|
Error_Handler();
|
||||||
|
}
|
||||||
|
|
||||||
|
__HAL_LINKDMA(uartHandle,hdmarx,hdma_uart5_rx);
|
||||||
|
|
||||||
|
/* UART5 interrupt Init */
|
||||||
|
HAL_NVIC_SetPriority(UART5_IRQn, 5, 0);
|
||||||
|
HAL_NVIC_EnableIRQ(UART5_IRQn);
|
||||||
|
/* USER CODE BEGIN UART5_MspInit 1 */
|
||||||
|
|
||||||
|
/* USER CODE END UART5_MspInit 1 */
|
||||||
|
}
|
||||||
|
else if(uartHandle->Instance==UART7)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN UART7_MspInit 0 */
|
||||||
|
|
||||||
|
/* USER CODE END UART7_MspInit 0 */
|
||||||
|
|
||||||
|
/** Initializes the peripherals clock
|
||||||
|
*/
|
||||||
|
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_UART7;
|
||||||
|
PeriphClkInitStruct.Usart234578ClockSelection = RCC_USART234578CLKSOURCE_D2PCLK1;
|
||||||
|
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
|
||||||
|
{
|
||||||
|
Error_Handler();
|
||||||
|
}
|
||||||
|
|
||||||
|
/* UART7 clock enable */
|
||||||
|
__HAL_RCC_UART7_CLK_ENABLE();
|
||||||
|
|
||||||
|
__HAL_RCC_GPIOE_CLK_ENABLE();
|
||||||
|
/**UART7 GPIO Configuration
|
||||||
|
PE7 ------> UART7_RX
|
||||||
|
PE8 ------> UART7_TX
|
||||||
|
*/
|
||||||
|
GPIO_InitStruct.Pin = GPIO_PIN_7|GPIO_PIN_8;
|
||||||
|
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||||
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||||
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||||
|
GPIO_InitStruct.Alternate = GPIO_AF7_UART7;
|
||||||
|
HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
|
||||||
|
|
||||||
|
/* UART7 interrupt Init */
|
||||||
|
HAL_NVIC_SetPriority(UART7_IRQn, 5, 0);
|
||||||
|
HAL_NVIC_EnableIRQ(UART7_IRQn);
|
||||||
|
/* USER CODE BEGIN UART7_MspInit 1 */
|
||||||
|
|
||||||
|
/* USER CODE END UART7_MspInit 1 */
|
||||||
|
}
|
||||||
|
else if(uartHandle->Instance==USART1)
|
||||||
{
|
{
|
||||||
/* USER CODE BEGIN USART1_MspInit 0 */
|
/* USER CODE BEGIN USART1_MspInit 0 */
|
||||||
|
|
||||||
/* USER CODE END USART1_MspInit 0 */
|
/* USER CODE END USART1_MspInit 0 */
|
||||||
|
|
||||||
|
/** Initializes the peripherals clock
|
||||||
|
*/
|
||||||
|
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART1;
|
||||||
|
PeriphClkInitStruct.Usart16ClockSelection = RCC_USART16910CLKSOURCE_D2PCLK2;
|
||||||
|
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
|
||||||
|
{
|
||||||
|
Error_Handler();
|
||||||
|
}
|
||||||
|
|
||||||
/* USART1 clock enable */
|
/* USART1 clock enable */
|
||||||
__HAL_RCC_USART1_CLK_ENABLE();
|
__HAL_RCC_USART1_CLK_ENABLE();
|
||||||
|
|
||||||
__HAL_RCC_GPIOB_CLK_ENABLE();
|
|
||||||
__HAL_RCC_GPIOA_CLK_ENABLE();
|
__HAL_RCC_GPIOA_CLK_ENABLE();
|
||||||
/**USART1 GPIO Configuration
|
/**USART1 GPIO Configuration
|
||||||
PB7 ------> USART1_RX
|
|
||||||
PA9 ------> USART1_TX
|
PA9 ------> USART1_TX
|
||||||
|
PA10 ------> USART1_RX
|
||||||
*/
|
*/
|
||||||
GPIO_InitStruct.Pin = GPIO_PIN_7;
|
GPIO_InitStruct.Pin = GPIO_PIN_9|GPIO_PIN_10;
|
||||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||||
GPIO_InitStruct.Alternate = GPIO_AF7_USART1;
|
|
||||||
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
|
||||||
|
|
||||||
GPIO_InitStruct.Pin = GPIO_PIN_9;
|
|
||||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
|
||||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
|
||||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
|
||||||
GPIO_InitStruct.Alternate = GPIO_AF7_USART1;
|
GPIO_InitStruct.Alternate = GPIO_AF7_USART1;
|
||||||
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||||
|
|
||||||
/* USART1 DMA Init */
|
/* USART1 DMA Init */
|
||||||
/* USART1_TX Init */
|
/* USART1_TX Init */
|
||||||
hdma_usart1_tx.Instance = DMA2_Stream7;
|
hdma_usart1_tx.Instance = DMA1_Stream4;
|
||||||
hdma_usart1_tx.Init.Channel = DMA_CHANNEL_4;
|
hdma_usart1_tx.Init.Request = DMA_REQUEST_USART1_TX;
|
||||||
hdma_usart1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
|
hdma_usart1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
|
||||||
hdma_usart1_tx.Init.PeriphInc = DMA_PINC_DISABLE;
|
hdma_usart1_tx.Init.PeriphInc = DMA_PINC_DISABLE;
|
||||||
hdma_usart1_tx.Init.MemInc = DMA_MINC_ENABLE;
|
hdma_usart1_tx.Init.MemInc = DMA_MINC_ENABLE;
|
||||||
hdma_usart1_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
|
hdma_usart1_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
|
||||||
hdma_usart1_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
|
hdma_usart1_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
|
||||||
hdma_usart1_tx.Init.Mode = DMA_NORMAL;
|
hdma_usart1_tx.Init.Mode = DMA_NORMAL;
|
||||||
hdma_usart1_tx.Init.Priority = DMA_PRIORITY_MEDIUM;
|
hdma_usart1_tx.Init.Priority = DMA_PRIORITY_LOW;
|
||||||
hdma_usart1_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
|
hdma_usart1_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
|
||||||
if (HAL_DMA_Init(&hdma_usart1_tx) != HAL_OK)
|
if (HAL_DMA_Init(&hdma_usart1_tx) != HAL_OK)
|
||||||
{
|
{
|
||||||
@@ -173,15 +453,15 @@ void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle)
|
|||||||
__HAL_LINKDMA(uartHandle,hdmatx,hdma_usart1_tx);
|
__HAL_LINKDMA(uartHandle,hdmatx,hdma_usart1_tx);
|
||||||
|
|
||||||
/* USART1_RX Init */
|
/* USART1_RX Init */
|
||||||
hdma_usart1_rx.Instance = DMA2_Stream5;
|
hdma_usart1_rx.Instance = DMA1_Stream5;
|
||||||
hdma_usart1_rx.Init.Channel = DMA_CHANNEL_4;
|
hdma_usart1_rx.Init.Request = DMA_REQUEST_USART1_RX;
|
||||||
hdma_usart1_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
|
hdma_usart1_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
|
||||||
hdma_usart1_rx.Init.PeriphInc = DMA_PINC_DISABLE;
|
hdma_usart1_rx.Init.PeriphInc = DMA_PINC_DISABLE;
|
||||||
hdma_usart1_rx.Init.MemInc = DMA_MINC_ENABLE;
|
hdma_usart1_rx.Init.MemInc = DMA_MINC_ENABLE;
|
||||||
hdma_usart1_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
|
hdma_usart1_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
|
||||||
hdma_usart1_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
|
hdma_usart1_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
|
||||||
hdma_usart1_rx.Init.Mode = DMA_NORMAL;
|
hdma_usart1_rx.Init.Mode = DMA_NORMAL;
|
||||||
hdma_usart1_rx.Init.Priority = DMA_PRIORITY_MEDIUM;
|
hdma_usart1_rx.Init.Priority = DMA_PRIORITY_LOW;
|
||||||
hdma_usart1_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
|
hdma_usart1_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
|
||||||
if (HAL_DMA_Init(&hdma_usart1_rx) != HAL_OK)
|
if (HAL_DMA_Init(&hdma_usart1_rx) != HAL_OK)
|
||||||
{
|
{
|
||||||
@@ -197,119 +477,185 @@ void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle)
|
|||||||
|
|
||||||
/* USER CODE END USART1_MspInit 1 */
|
/* USER CODE END USART1_MspInit 1 */
|
||||||
}
|
}
|
||||||
|
else if(uartHandle->Instance==USART2)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN USART2_MspInit 0 */
|
||||||
|
|
||||||
|
/* USER CODE END USART2_MspInit 0 */
|
||||||
|
|
||||||
|
/** Initializes the peripherals clock
|
||||||
|
*/
|
||||||
|
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART2;
|
||||||
|
PeriphClkInitStruct.Usart234578ClockSelection = RCC_USART234578CLKSOURCE_D2PCLK1;
|
||||||
|
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
|
||||||
|
{
|
||||||
|
Error_Handler();
|
||||||
|
}
|
||||||
|
|
||||||
|
/* USART2 clock enable */
|
||||||
|
__HAL_RCC_USART2_CLK_ENABLE();
|
||||||
|
|
||||||
|
__HAL_RCC_GPIOD_CLK_ENABLE();
|
||||||
|
/**USART2 GPIO Configuration
|
||||||
|
PD4 ------> USART2_DE
|
||||||
|
PD5 ------> USART2_TX
|
||||||
|
PD6 ------> USART2_RX
|
||||||
|
*/
|
||||||
|
GPIO_InitStruct.Pin = GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_6;
|
||||||
|
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||||
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||||
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||||
|
GPIO_InitStruct.Alternate = GPIO_AF7_USART2;
|
||||||
|
HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
|
||||||
|
|
||||||
|
/* USART2 interrupt Init */
|
||||||
|
HAL_NVIC_SetPriority(USART2_IRQn, 5, 0);
|
||||||
|
HAL_NVIC_EnableIRQ(USART2_IRQn);
|
||||||
|
/* USER CODE BEGIN USART2_MspInit 1 */
|
||||||
|
|
||||||
|
/* USER CODE END USART2_MspInit 1 */
|
||||||
|
}
|
||||||
else if(uartHandle->Instance==USART3)
|
else if(uartHandle->Instance==USART3)
|
||||||
{
|
{
|
||||||
/* USER CODE BEGIN USART3_MspInit 0 */
|
/* USER CODE BEGIN USART3_MspInit 0 */
|
||||||
|
|
||||||
/* USER CODE END USART3_MspInit 0 */
|
/* USER CODE END USART3_MspInit 0 */
|
||||||
/* USART3 clock enable */
|
|
||||||
__HAL_RCC_USART3_CLK_ENABLE();
|
|
||||||
|
|
||||||
__HAL_RCC_GPIOC_CLK_ENABLE();
|
/** Initializes the peripherals clock
|
||||||
/**USART3 GPIO Configuration
|
|
||||||
PC11 ------> USART3_RX
|
|
||||||
PC10 ------> USART3_TX
|
|
||||||
*/
|
*/
|
||||||
GPIO_InitStruct.Pin = GPIO_PIN_11|GPIO_PIN_10;
|
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART3;
|
||||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
PeriphClkInitStruct.Usart234578ClockSelection = RCC_USART234578CLKSOURCE_D2PCLK1;
|
||||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
|
||||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
|
||||||
GPIO_InitStruct.Alternate = GPIO_AF7_USART3;
|
|
||||||
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
|
|
||||||
|
|
||||||
/* USART3 DMA Init */
|
|
||||||
/* USART3_RX Init */
|
|
||||||
hdma_usart3_rx.Instance = DMA1_Stream1;
|
|
||||||
hdma_usart3_rx.Init.Channel = DMA_CHANNEL_4;
|
|
||||||
hdma_usart3_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
|
|
||||||
hdma_usart3_rx.Init.PeriphInc = DMA_PINC_DISABLE;
|
|
||||||
hdma_usart3_rx.Init.MemInc = DMA_MINC_ENABLE;
|
|
||||||
hdma_usart3_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
|
|
||||||
hdma_usart3_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
|
|
||||||
hdma_usart3_rx.Init.Mode = DMA_NORMAL;
|
|
||||||
hdma_usart3_rx.Init.Priority = DMA_PRIORITY_HIGH;
|
|
||||||
hdma_usart3_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
|
|
||||||
if (HAL_DMA_Init(&hdma_usart3_rx) != HAL_OK)
|
|
||||||
{
|
{
|
||||||
Error_Handler();
|
Error_Handler();
|
||||||
}
|
}
|
||||||
|
|
||||||
__HAL_LINKDMA(uartHandle,hdmarx,hdma_usart3_rx);
|
/* USART3 clock enable */
|
||||||
|
__HAL_RCC_USART3_CLK_ENABLE();
|
||||||
|
|
||||||
|
__HAL_RCC_GPIOB_CLK_ENABLE();
|
||||||
|
__HAL_RCC_GPIOD_CLK_ENABLE();
|
||||||
|
/**USART3 GPIO Configuration
|
||||||
|
PB14 ------> USART3_DE
|
||||||
|
PD8 ------> USART3_TX
|
||||||
|
PD9 ------> USART3_RX
|
||||||
|
*/
|
||||||
|
GPIO_InitStruct.Pin = GPIO_PIN_14;
|
||||||
|
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||||
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||||
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||||
|
GPIO_InitStruct.Alternate = GPIO_AF7_USART3;
|
||||||
|
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
||||||
|
|
||||||
|
GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9;
|
||||||
|
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||||
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||||
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||||
|
GPIO_InitStruct.Alternate = GPIO_AF7_USART3;
|
||||||
|
HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
|
||||||
|
|
||||||
|
/* USART3 interrupt Init */
|
||||||
|
HAL_NVIC_SetPriority(USART3_IRQn, 5, 0);
|
||||||
|
HAL_NVIC_EnableIRQ(USART3_IRQn);
|
||||||
/* USER CODE BEGIN USART3_MspInit 1 */
|
/* USER CODE BEGIN USART3_MspInit 1 */
|
||||||
|
|
||||||
/* USER CODE END USART3_MspInit 1 */
|
/* USER CODE END USART3_MspInit 1 */
|
||||||
}
|
}
|
||||||
else if(uartHandle->Instance==USART6)
|
else if(uartHandle->Instance==USART10)
|
||||||
{
|
{
|
||||||
/* USER CODE BEGIN USART6_MspInit 0 */
|
/* USER CODE BEGIN USART10_MspInit 0 */
|
||||||
|
|
||||||
/* USER CODE END USART6_MspInit 0 */
|
/* USER CODE END USART10_MspInit 0 */
|
||||||
/* USART6 clock enable */
|
|
||||||
__HAL_RCC_USART6_CLK_ENABLE();
|
|
||||||
|
|
||||||
__HAL_RCC_GPIOG_CLK_ENABLE();
|
/** Initializes the peripherals clock
|
||||||
/**USART6 GPIO Configuration
|
|
||||||
PG14 ------> USART6_TX
|
|
||||||
PG9 ------> USART6_RX
|
|
||||||
*/
|
*/
|
||||||
GPIO_InitStruct.Pin = GPIO_PIN_14|GPIO_PIN_9;
|
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART10;
|
||||||
|
PeriphClkInitStruct.Usart16ClockSelection = RCC_USART16910CLKSOURCE_D2PCLK2;
|
||||||
|
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
|
||||||
|
{
|
||||||
|
Error_Handler();
|
||||||
|
}
|
||||||
|
|
||||||
|
/* USART10 clock enable */
|
||||||
|
__HAL_RCC_USART10_CLK_ENABLE();
|
||||||
|
|
||||||
|
__HAL_RCC_GPIOE_CLK_ENABLE();
|
||||||
|
/**USART10 GPIO Configuration
|
||||||
|
PE2 ------> USART10_RX
|
||||||
|
PE3 ------> USART10_TX
|
||||||
|
*/
|
||||||
|
GPIO_InitStruct.Pin = GPIO_PIN_2;
|
||||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||||
GPIO_InitStruct.Alternate = GPIO_AF8_USART6;
|
GPIO_InitStruct.Alternate = GPIO_AF4_USART10;
|
||||||
HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
|
HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
|
||||||
|
|
||||||
/* USART6 DMA Init */
|
GPIO_InitStruct.Pin = GPIO_PIN_3;
|
||||||
/* USART6_RX Init */
|
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||||
hdma_usart6_rx.Instance = DMA2_Stream1;
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||||
hdma_usart6_rx.Init.Channel = DMA_CHANNEL_5;
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||||
hdma_usart6_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
|
GPIO_InitStruct.Alternate = GPIO_AF11_USART10;
|
||||||
hdma_usart6_rx.Init.PeriphInc = DMA_PINC_DISABLE;
|
HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
|
||||||
hdma_usart6_rx.Init.MemInc = DMA_MINC_ENABLE;
|
|
||||||
hdma_usart6_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
|
|
||||||
hdma_usart6_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
|
|
||||||
hdma_usart6_rx.Init.Mode = DMA_NORMAL;
|
|
||||||
hdma_usart6_rx.Init.Priority = DMA_PRIORITY_MEDIUM;
|
|
||||||
hdma_usart6_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
|
|
||||||
if (HAL_DMA_Init(&hdma_usart6_rx) != HAL_OK)
|
|
||||||
{
|
|
||||||
Error_Handler();
|
|
||||||
}
|
|
||||||
|
|
||||||
__HAL_LINKDMA(uartHandle,hdmarx,hdma_usart6_rx);
|
/* USART10 interrupt Init */
|
||||||
|
HAL_NVIC_SetPriority(USART10_IRQn, 5, 0);
|
||||||
|
HAL_NVIC_EnableIRQ(USART10_IRQn);
|
||||||
|
/* USER CODE BEGIN USART10_MspInit 1 */
|
||||||
|
|
||||||
/* USART6_TX Init */
|
/* USER CODE END USART10_MspInit 1 */
|
||||||
hdma_usart6_tx.Instance = DMA2_Stream6;
|
|
||||||
hdma_usart6_tx.Init.Channel = DMA_CHANNEL_5;
|
|
||||||
hdma_usart6_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
|
|
||||||
hdma_usart6_tx.Init.PeriphInc = DMA_PINC_DISABLE;
|
|
||||||
hdma_usart6_tx.Init.MemInc = DMA_MINC_ENABLE;
|
|
||||||
hdma_usart6_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
|
|
||||||
hdma_usart6_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
|
|
||||||
hdma_usart6_tx.Init.Mode = DMA_NORMAL;
|
|
||||||
hdma_usart6_tx.Init.Priority = DMA_PRIORITY_MEDIUM;
|
|
||||||
hdma_usart6_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
|
|
||||||
if (HAL_DMA_Init(&hdma_usart6_tx) != HAL_OK)
|
|
||||||
{
|
|
||||||
Error_Handler();
|
|
||||||
}
|
|
||||||
|
|
||||||
__HAL_LINKDMA(uartHandle,hdmatx,hdma_usart6_tx);
|
|
||||||
|
|
||||||
/* USART6 interrupt Init */
|
|
||||||
HAL_NVIC_SetPriority(USART6_IRQn, 5, 0);
|
|
||||||
HAL_NVIC_EnableIRQ(USART6_IRQn);
|
|
||||||
/* USER CODE BEGIN USART6_MspInit 1 */
|
|
||||||
|
|
||||||
/* USER CODE END USART6_MspInit 1 */
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
void HAL_UART_MspDeInit(UART_HandleTypeDef* uartHandle)
|
void HAL_UART_MspDeInit(UART_HandleTypeDef* uartHandle)
|
||||||
{
|
{
|
||||||
|
|
||||||
if(uartHandle->Instance==USART1)
|
if(uartHandle->Instance==UART5)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN UART5_MspDeInit 0 */
|
||||||
|
|
||||||
|
/* USER CODE END UART5_MspDeInit 0 */
|
||||||
|
/* Peripheral clock disable */
|
||||||
|
__HAL_RCC_UART5_CLK_DISABLE();
|
||||||
|
|
||||||
|
/**UART5 GPIO Configuration
|
||||||
|
PC12 ------> UART5_TX
|
||||||
|
PD2 ------> UART5_RX
|
||||||
|
*/
|
||||||
|
HAL_GPIO_DeInit(GPIOC, GPIO_PIN_12);
|
||||||
|
|
||||||
|
HAL_GPIO_DeInit(GPIOD, GPIO_PIN_2);
|
||||||
|
|
||||||
|
/* UART5 DMA DeInit */
|
||||||
|
HAL_DMA_DeInit(uartHandle->hdmarx);
|
||||||
|
|
||||||
|
/* UART5 interrupt Deinit */
|
||||||
|
HAL_NVIC_DisableIRQ(UART5_IRQn);
|
||||||
|
/* USER CODE BEGIN UART5_MspDeInit 1 */
|
||||||
|
|
||||||
|
/* USER CODE END UART5_MspDeInit 1 */
|
||||||
|
}
|
||||||
|
else if(uartHandle->Instance==UART7)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN UART7_MspDeInit 0 */
|
||||||
|
|
||||||
|
/* USER CODE END UART7_MspDeInit 0 */
|
||||||
|
/* Peripheral clock disable */
|
||||||
|
__HAL_RCC_UART7_CLK_DISABLE();
|
||||||
|
|
||||||
|
/**UART7 GPIO Configuration
|
||||||
|
PE7 ------> UART7_RX
|
||||||
|
PE8 ------> UART7_TX
|
||||||
|
*/
|
||||||
|
HAL_GPIO_DeInit(GPIOE, GPIO_PIN_7|GPIO_PIN_8);
|
||||||
|
|
||||||
|
/* UART7 interrupt Deinit */
|
||||||
|
HAL_NVIC_DisableIRQ(UART7_IRQn);
|
||||||
|
/* USER CODE BEGIN UART7_MspDeInit 1 */
|
||||||
|
|
||||||
|
/* USER CODE END UART7_MspDeInit 1 */
|
||||||
|
}
|
||||||
|
else if(uartHandle->Instance==USART1)
|
||||||
{
|
{
|
||||||
/* USER CODE BEGIN USART1_MspDeInit 0 */
|
/* USER CODE BEGIN USART1_MspDeInit 0 */
|
||||||
|
|
||||||
@@ -318,12 +664,10 @@ void HAL_UART_MspDeInit(UART_HandleTypeDef* uartHandle)
|
|||||||
__HAL_RCC_USART1_CLK_DISABLE();
|
__HAL_RCC_USART1_CLK_DISABLE();
|
||||||
|
|
||||||
/**USART1 GPIO Configuration
|
/**USART1 GPIO Configuration
|
||||||
PB7 ------> USART1_RX
|
|
||||||
PA9 ------> USART1_TX
|
PA9 ------> USART1_TX
|
||||||
|
PA10 ------> USART1_RX
|
||||||
*/
|
*/
|
||||||
HAL_GPIO_DeInit(GPIOB, GPIO_PIN_7);
|
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_9|GPIO_PIN_10);
|
||||||
|
|
||||||
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_9);
|
|
||||||
|
|
||||||
/* USART1 DMA DeInit */
|
/* USART1 DMA DeInit */
|
||||||
HAL_DMA_DeInit(uartHandle->hdmatx);
|
HAL_DMA_DeInit(uartHandle->hdmatx);
|
||||||
@@ -335,6 +679,27 @@ void HAL_UART_MspDeInit(UART_HandleTypeDef* uartHandle)
|
|||||||
|
|
||||||
/* USER CODE END USART1_MspDeInit 1 */
|
/* USER CODE END USART1_MspDeInit 1 */
|
||||||
}
|
}
|
||||||
|
else if(uartHandle->Instance==USART2)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN USART2_MspDeInit 0 */
|
||||||
|
|
||||||
|
/* USER CODE END USART2_MspDeInit 0 */
|
||||||
|
/* Peripheral clock disable */
|
||||||
|
__HAL_RCC_USART2_CLK_DISABLE();
|
||||||
|
|
||||||
|
/**USART2 GPIO Configuration
|
||||||
|
PD4 ------> USART2_DE
|
||||||
|
PD5 ------> USART2_TX
|
||||||
|
PD6 ------> USART2_RX
|
||||||
|
*/
|
||||||
|
HAL_GPIO_DeInit(GPIOD, GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_6);
|
||||||
|
|
||||||
|
/* USART2 interrupt Deinit */
|
||||||
|
HAL_NVIC_DisableIRQ(USART2_IRQn);
|
||||||
|
/* USER CODE BEGIN USART2_MspDeInit 1 */
|
||||||
|
|
||||||
|
/* USER CODE END USART2_MspDeInit 1 */
|
||||||
|
}
|
||||||
else if(uartHandle->Instance==USART3)
|
else if(uartHandle->Instance==USART3)
|
||||||
{
|
{
|
||||||
/* USER CODE BEGIN USART3_MspDeInit 0 */
|
/* USER CODE BEGIN USART3_MspDeInit 0 */
|
||||||
@@ -344,40 +709,39 @@ void HAL_UART_MspDeInit(UART_HandleTypeDef* uartHandle)
|
|||||||
__HAL_RCC_USART3_CLK_DISABLE();
|
__HAL_RCC_USART3_CLK_DISABLE();
|
||||||
|
|
||||||
/**USART3 GPIO Configuration
|
/**USART3 GPIO Configuration
|
||||||
PC11 ------> USART3_RX
|
PB14 ------> USART3_DE
|
||||||
PC10 ------> USART3_TX
|
PD8 ------> USART3_TX
|
||||||
|
PD9 ------> USART3_RX
|
||||||
*/
|
*/
|
||||||
HAL_GPIO_DeInit(GPIOC, GPIO_PIN_11|GPIO_PIN_10);
|
HAL_GPIO_DeInit(GPIOB, GPIO_PIN_14);
|
||||||
|
|
||||||
/* USART3 DMA DeInit */
|
HAL_GPIO_DeInit(GPIOD, GPIO_PIN_8|GPIO_PIN_9);
|
||||||
HAL_DMA_DeInit(uartHandle->hdmarx);
|
|
||||||
|
/* USART3 interrupt Deinit */
|
||||||
|
HAL_NVIC_DisableIRQ(USART3_IRQn);
|
||||||
/* USER CODE BEGIN USART3_MspDeInit 1 */
|
/* USER CODE BEGIN USART3_MspDeInit 1 */
|
||||||
|
|
||||||
/* USER CODE END USART3_MspDeInit 1 */
|
/* USER CODE END USART3_MspDeInit 1 */
|
||||||
}
|
}
|
||||||
else if(uartHandle->Instance==USART6)
|
else if(uartHandle->Instance==USART10)
|
||||||
{
|
{
|
||||||
/* USER CODE BEGIN USART6_MspDeInit 0 */
|
/* USER CODE BEGIN USART10_MspDeInit 0 */
|
||||||
|
|
||||||
/* USER CODE END USART6_MspDeInit 0 */
|
/* USER CODE END USART10_MspDeInit 0 */
|
||||||
/* Peripheral clock disable */
|
/* Peripheral clock disable */
|
||||||
__HAL_RCC_USART6_CLK_DISABLE();
|
__HAL_RCC_USART10_CLK_DISABLE();
|
||||||
|
|
||||||
/**USART6 GPIO Configuration
|
/**USART10 GPIO Configuration
|
||||||
PG14 ------> USART6_TX
|
PE2 ------> USART10_RX
|
||||||
PG9 ------> USART6_RX
|
PE3 ------> USART10_TX
|
||||||
*/
|
*/
|
||||||
HAL_GPIO_DeInit(GPIOG, GPIO_PIN_14|GPIO_PIN_9);
|
HAL_GPIO_DeInit(GPIOE, GPIO_PIN_2|GPIO_PIN_3);
|
||||||
|
|
||||||
/* USART6 DMA DeInit */
|
/* USART10 interrupt Deinit */
|
||||||
HAL_DMA_DeInit(uartHandle->hdmarx);
|
HAL_NVIC_DisableIRQ(USART10_IRQn);
|
||||||
HAL_DMA_DeInit(uartHandle->hdmatx);
|
/* USER CODE BEGIN USART10_MspDeInit 1 */
|
||||||
|
|
||||||
/* USART6 interrupt Deinit */
|
/* USER CODE END USART10_MspDeInit 1 */
|
||||||
HAL_NVIC_DisableIRQ(USART6_IRQn);
|
|
||||||
/* USER CODE BEGIN USART6_MspDeInit 1 */
|
|
||||||
|
|
||||||
/* USER CODE END USART6_MspDeInit 1 */
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user