添加ref
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527d2e9be4
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@ -69,6 +69,7 @@ target_sources(${CMAKE_PROJECT_NAME} PRIVATE
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User/component/pid.c
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User/component/pid.c
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User/component/user_math.c
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User/component/user_math.c
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User/component/vmc.c
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User/component/vmc.c
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User/component/ui.c
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# User/device sources
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# User/device sources
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User/device/bmi088.c
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User/device/bmi088.c
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@ -83,6 +84,8 @@ target_sources(${CMAKE_PROJECT_NAME} PRIVATE
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User/device/vision_bridge.c
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User/device/vision_bridge.c
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User/device/vofa.c
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User/device/vofa.c
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User/device/mrobot.c
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User/device/mrobot.c
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User/device/referee.c
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User/device/supercap.c
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# User/module sources
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# User/module sources
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User/module/balance_chassis.c
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User/module/balance_chassis.c
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@ -58,6 +58,7 @@ void DMA1_Stream2_IRQHandler(void);
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void DMA1_Stream3_IRQHandler(void);
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void DMA1_Stream3_IRQHandler(void);
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void DMA1_Stream4_IRQHandler(void);
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void DMA1_Stream4_IRQHandler(void);
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void DMA1_Stream5_IRQHandler(void);
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void DMA1_Stream5_IRQHandler(void);
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void DMA1_Stream6_IRQHandler(void);
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void FDCAN1_IT0_IRQHandler(void);
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void FDCAN1_IT0_IRQHandler(void);
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void FDCAN2_IT0_IRQHandler(void);
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void FDCAN2_IT0_IRQHandler(void);
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void FDCAN1_IT1_IRQHandler(void);
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void FDCAN1_IT1_IRQHandler(void);
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@ -67,6 +68,7 @@ void USART1_IRQHandler(void);
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void USART2_IRQHandler(void);
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void USART2_IRQHandler(void);
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void USART3_IRQHandler(void);
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void USART3_IRQHandler(void);
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void EXTI15_10_IRQHandler(void);
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void EXTI15_10_IRQHandler(void);
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void DMA1_Stream7_IRQHandler(void);
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void UART5_IRQHandler(void);
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void UART5_IRQHandler(void);
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void UART7_IRQHandler(void);
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void UART7_IRQHandler(void);
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void ADC3_IRQHandler(void);
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void ADC3_IRQHandler(void);
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@ -61,6 +61,12 @@ void MX_DMA_Init(void)
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/* DMA1_Stream5_IRQn interrupt configuration */
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/* DMA1_Stream5_IRQn interrupt configuration */
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HAL_NVIC_SetPriority(DMA1_Stream5_IRQn, 5, 0);
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HAL_NVIC_SetPriority(DMA1_Stream5_IRQn, 5, 0);
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HAL_NVIC_EnableIRQ(DMA1_Stream5_IRQn);
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HAL_NVIC_EnableIRQ(DMA1_Stream5_IRQn);
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/* DMA1_Stream6_IRQn interrupt configuration */
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HAL_NVIC_SetPriority(DMA1_Stream6_IRQn, 5, 0);
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HAL_NVIC_EnableIRQ(DMA1_Stream6_IRQn);
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/* DMA1_Stream7_IRQn interrupt configuration */
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HAL_NVIC_SetPriority(DMA1_Stream7_IRQn, 5, 0);
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HAL_NVIC_EnableIRQ(DMA1_Stream7_IRQn);
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}
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}
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@ -68,6 +68,8 @@ extern SPI_HandleTypeDef hspi2;
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extern DMA_HandleTypeDef hdma_uart5_rx;
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extern DMA_HandleTypeDef hdma_uart5_rx;
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extern DMA_HandleTypeDef hdma_usart1_tx;
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extern DMA_HandleTypeDef hdma_usart1_tx;
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extern DMA_HandleTypeDef hdma_usart1_rx;
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extern DMA_HandleTypeDef hdma_usart1_rx;
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extern DMA_HandleTypeDef hdma_usart10_rx;
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extern DMA_HandleTypeDef hdma_usart10_tx;
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extern UART_HandleTypeDef huart5;
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extern UART_HandleTypeDef huart5;
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extern UART_HandleTypeDef huart7;
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extern UART_HandleTypeDef huart7;
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extern UART_HandleTypeDef huart1;
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extern UART_HandleTypeDef huart1;
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@ -262,6 +264,20 @@ void DMA1_Stream5_IRQHandler(void)
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/* USER CODE END DMA1_Stream5_IRQn 1 */
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/* USER CODE END DMA1_Stream5_IRQn 1 */
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}
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}
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/**
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* @brief This function handles DMA1 stream6 global interrupt.
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*/
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void DMA1_Stream6_IRQHandler(void)
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{
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/* USER CODE BEGIN DMA1_Stream6_IRQn 0 */
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/* USER CODE END DMA1_Stream6_IRQn 0 */
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HAL_DMA_IRQHandler(&hdma_usart10_rx);
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/* USER CODE BEGIN DMA1_Stream6_IRQn 1 */
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/* USER CODE END DMA1_Stream6_IRQn 1 */
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}
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/**
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/**
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* @brief This function handles FDCAN1 interrupt 0.
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* @brief This function handles FDCAN1 interrupt 0.
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*/
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*/
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@ -390,6 +406,20 @@ void EXTI15_10_IRQHandler(void)
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/* USER CODE END EXTI15_10_IRQn 1 */
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/* USER CODE END EXTI15_10_IRQn 1 */
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}
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}
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/**
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* @brief This function handles DMA1 stream7 global interrupt.
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*/
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void DMA1_Stream7_IRQHandler(void)
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{
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/* USER CODE BEGIN DMA1_Stream7_IRQn 0 */
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/* USER CODE END DMA1_Stream7_IRQn 0 */
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HAL_DMA_IRQHandler(&hdma_usart10_tx);
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/* USER CODE BEGIN DMA1_Stream7_IRQn 1 */
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/* USER CODE END DMA1_Stream7_IRQn 1 */
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}
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/**
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/**
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* @brief This function handles UART5 global interrupt.
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* @brief This function handles UART5 global interrupt.
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*/
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*/
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@ -33,6 +33,8 @@ UART_HandleTypeDef huart10;
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DMA_HandleTypeDef hdma_uart5_rx;
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DMA_HandleTypeDef hdma_uart5_rx;
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DMA_HandleTypeDef hdma_usart1_tx;
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DMA_HandleTypeDef hdma_usart1_tx;
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DMA_HandleTypeDef hdma_usart1_rx;
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DMA_HandleTypeDef hdma_usart1_rx;
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DMA_HandleTypeDef hdma_usart10_rx;
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DMA_HandleTypeDef hdma_usart10_tx;
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/* UART5 init function */
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/* UART5 init function */
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void MX_UART5_Init(void)
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void MX_UART5_Init(void)
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@ -265,7 +267,7 @@ void MX_USART10_UART_Init(void)
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/* USER CODE END USART10_Init 1 */
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/* USER CODE END USART10_Init 1 */
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huart10.Instance = USART10;
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huart10.Instance = USART10;
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huart10.Init.BaudRate = 921600;
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huart10.Init.BaudRate = 115200;
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huart10.Init.WordLength = UART_WORDLENGTH_8B;
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huart10.Init.WordLength = UART_WORDLENGTH_8B;
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huart10.Init.StopBits = UART_STOPBITS_1;
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huart10.Init.StopBits = UART_STOPBITS_1;
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huart10.Init.Parity = UART_PARITY_NONE;
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huart10.Init.Parity = UART_PARITY_NONE;
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@ -598,6 +600,43 @@ void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle)
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GPIO_InitStruct.Alternate = GPIO_AF11_USART10;
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GPIO_InitStruct.Alternate = GPIO_AF11_USART10;
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HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
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HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
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/* USART10 DMA Init */
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/* USART10_RX Init */
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hdma_usart10_rx.Instance = DMA1_Stream6;
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hdma_usart10_rx.Init.Request = DMA_REQUEST_USART10_RX;
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hdma_usart10_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
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hdma_usart10_rx.Init.PeriphInc = DMA_PINC_DISABLE;
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hdma_usart10_rx.Init.MemInc = DMA_MINC_ENABLE;
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hdma_usart10_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
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hdma_usart10_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
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hdma_usart10_rx.Init.Mode = DMA_NORMAL;
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hdma_usart10_rx.Init.Priority = DMA_PRIORITY_LOW;
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hdma_usart10_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
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if (HAL_DMA_Init(&hdma_usart10_rx) != HAL_OK)
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{
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Error_Handler();
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}
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__HAL_LINKDMA(uartHandle,hdmarx,hdma_usart10_rx);
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/* USART10_TX Init */
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hdma_usart10_tx.Instance = DMA1_Stream7;
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hdma_usart10_tx.Init.Request = DMA_REQUEST_USART10_TX;
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hdma_usart10_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
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hdma_usart10_tx.Init.PeriphInc = DMA_PINC_DISABLE;
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hdma_usart10_tx.Init.MemInc = DMA_MINC_ENABLE;
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hdma_usart10_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
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hdma_usart10_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
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hdma_usart10_tx.Init.Mode = DMA_NORMAL;
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hdma_usart10_tx.Init.Priority = DMA_PRIORITY_LOW;
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hdma_usart10_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
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if (HAL_DMA_Init(&hdma_usart10_tx) != HAL_OK)
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{
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Error_Handler();
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}
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__HAL_LINKDMA(uartHandle,hdmatx,hdma_usart10_tx);
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/* USART10 interrupt Init */
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/* USART10 interrupt Init */
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HAL_NVIC_SetPriority(USART10_IRQn, 5, 0);
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HAL_NVIC_SetPriority(USART10_IRQn, 5, 0);
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HAL_NVIC_EnableIRQ(USART10_IRQn);
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HAL_NVIC_EnableIRQ(USART10_IRQn);
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@ -737,6 +776,10 @@ void HAL_UART_MspDeInit(UART_HandleTypeDef* uartHandle)
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*/
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*/
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HAL_GPIO_DeInit(GPIOE, GPIO_PIN_2|GPIO_PIN_3);
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HAL_GPIO_DeInit(GPIOE, GPIO_PIN_2|GPIO_PIN_3);
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/* USART10 DMA DeInit */
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HAL_DMA_DeInit(uartHandle->hdmarx);
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HAL_DMA_DeInit(uartHandle->hdmatx);
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/* USART10 interrupt Deinit */
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/* USART10 interrupt Deinit */
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HAL_NVIC_DisableIRQ(USART10_IRQn);
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HAL_NVIC_DisableIRQ(USART10_IRQn);
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/* USER CODE BEGIN USART10_MspDeInit 1 */
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/* USER CODE BEGIN USART10_MspDeInit 1 */
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@ -80,7 +80,9 @@ Dma.Request2=SPI2_TX
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Dma.Request3=UART5_RX
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Dma.Request3=UART5_RX
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Dma.Request4=USART1_TX
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Dma.Request4=USART1_TX
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Dma.Request5=USART1_RX
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Dma.Request5=USART1_RX
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Dma.RequestsNb=6
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Dma.Request6=USART10_RX
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Dma.Request7=USART10_TX
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Dma.RequestsNb=8
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Dma.SPI2_RX.1.Direction=DMA_PERIPH_TO_MEMORY
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Dma.SPI2_RX.1.Direction=DMA_PERIPH_TO_MEMORY
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Dma.SPI2_RX.1.EventEnable=DISABLE
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Dma.SPI2_RX.1.EventEnable=DISABLE
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Dma.SPI2_RX.1.FIFOMode=DMA_FIFOMODE_DISABLE
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Dma.SPI2_RX.1.FIFOMode=DMA_FIFOMODE_DISABLE
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@ -135,6 +137,42 @@ Dma.UART5_RX.3.SyncEnable=DISABLE
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Dma.UART5_RX.3.SyncPolarity=HAL_DMAMUX_SYNC_NO_EVENT
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Dma.UART5_RX.3.SyncPolarity=HAL_DMAMUX_SYNC_NO_EVENT
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Dma.UART5_RX.3.SyncRequestNumber=1
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Dma.UART5_RX.3.SyncRequestNumber=1
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Dma.UART5_RX.3.SyncSignalID=NONE
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Dma.UART5_RX.3.SyncSignalID=NONE
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Dma.USART10_RX.6.Direction=DMA_PERIPH_TO_MEMORY
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Dma.USART10_RX.6.EventEnable=DISABLE
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Dma.USART10_RX.6.FIFOMode=DMA_FIFOMODE_DISABLE
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Dma.USART10_RX.6.Instance=DMA1_Stream6
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Dma.USART10_RX.6.MemDataAlignment=DMA_MDATAALIGN_BYTE
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Dma.USART10_RX.6.MemInc=DMA_MINC_ENABLE
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Dma.USART10_RX.6.Mode=DMA_NORMAL
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Dma.USART10_RX.6.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
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Dma.USART10_RX.6.PeriphInc=DMA_PINC_DISABLE
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Dma.USART10_RX.6.Polarity=HAL_DMAMUX_REQ_GEN_RISING
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Dma.USART10_RX.6.Priority=DMA_PRIORITY_LOW
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Dma.USART10_RX.6.RequestNumber=1
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Dma.USART10_RX.6.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode,SignalID,Polarity,RequestNumber,SyncSignalID,SyncPolarity,SyncEnable,EventEnable,SyncRequestNumber
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Dma.USART10_RX.6.SignalID=NONE
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Dma.USART10_RX.6.SyncEnable=DISABLE
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Dma.USART10_RX.6.SyncPolarity=HAL_DMAMUX_SYNC_NO_EVENT
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Dma.USART10_RX.6.SyncRequestNumber=1
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Dma.USART10_RX.6.SyncSignalID=NONE
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Dma.USART10_TX.7.Direction=DMA_MEMORY_TO_PERIPH
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Dma.USART10_TX.7.EventEnable=DISABLE
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Dma.USART10_TX.7.FIFOMode=DMA_FIFOMODE_DISABLE
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Dma.USART10_TX.7.Instance=DMA1_Stream7
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Dma.USART10_TX.7.MemDataAlignment=DMA_MDATAALIGN_BYTE
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Dma.USART10_TX.7.MemInc=DMA_MINC_ENABLE
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Dma.USART10_TX.7.Mode=DMA_NORMAL
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Dma.USART10_TX.7.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
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Dma.USART10_TX.7.PeriphInc=DMA_PINC_DISABLE
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Dma.USART10_TX.7.Polarity=HAL_DMAMUX_REQ_GEN_RISING
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Dma.USART10_TX.7.Priority=DMA_PRIORITY_LOW
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Dma.USART10_TX.7.RequestNumber=1
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Dma.USART10_TX.7.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode,SignalID,Polarity,RequestNumber,SyncSignalID,SyncPolarity,SyncEnable,EventEnable,SyncRequestNumber
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Dma.USART10_TX.7.SignalID=NONE
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Dma.USART10_TX.7.SyncEnable=DISABLE
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Dma.USART10_TX.7.SyncPolarity=HAL_DMAMUX_SYNC_NO_EVENT
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Dma.USART10_TX.7.SyncRequestNumber=1
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Dma.USART10_TX.7.SyncSignalID=NONE
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Dma.USART1_RX.5.Direction=DMA_PERIPH_TO_MEMORY
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Dma.USART1_RX.5.Direction=DMA_PERIPH_TO_MEMORY
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Dma.USART1_RX.5.EventEnable=DISABLE
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Dma.USART1_RX.5.EventEnable=DISABLE
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Dma.USART1_RX.5.FIFOMode=DMA_FIFOMODE_DISABLE
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Dma.USART1_RX.5.FIFOMode=DMA_FIFOMODE_DISABLE
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@ -334,6 +372,8 @@ NVIC.DMA1_Stream2_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
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NVIC.DMA1_Stream3_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
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NVIC.DMA1_Stream3_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
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NVIC.DMA1_Stream4_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
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NVIC.DMA1_Stream4_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
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NVIC.DMA1_Stream5_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
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NVIC.DMA1_Stream5_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
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NVIC.DMA1_Stream6_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
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NVIC.DMA1_Stream7_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
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NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
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NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
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NVIC.EXTI15_10_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true
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NVIC.EXTI15_10_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true
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NVIC.FDCAN1_IT0_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true
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NVIC.FDCAN1_IT0_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true
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@ -758,7 +798,7 @@ UART7.IPParameters=BaudRate
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USART1.BaudRate=921600
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USART1.BaudRate=921600
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USART1.IPParameters=VirtualMode-Asynchronous,BaudRate
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USART1.IPParameters=VirtualMode-Asynchronous,BaudRate
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USART1.VirtualMode-Asynchronous=VM_ASYNC
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USART1.VirtualMode-Asynchronous=VM_ASYNC
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USART10.BaudRate=921600
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USART10.BaudRate=115200
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USART10.IPParameters=VirtualMode,BaudRate
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USART10.IPParameters=VirtualMode,BaudRate
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USART10.VirtualMode=VM_ASYNC
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USART10.VirtualMode=VM_ASYNC
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USART2.BaudRate=921600
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USART2.BaudRate=921600
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@ -27,6 +27,8 @@ static BSP_UART_t UART_Get(UART_HandleTypeDef *huart) {
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return BSP_UART_DR16;
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return BSP_UART_DR16;
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else if (huart->Instance == USART1)
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else if (huart->Instance == USART1)
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return BSP_UART_VOFA;
|
return BSP_UART_VOFA;
|
||||||
|
else if (huart->Instance == USART10)
|
||||||
|
return BSP_UART_REF;
|
||||||
else
|
else
|
||||||
return BSP_UART_ERR;
|
return BSP_UART_ERR;
|
||||||
}
|
}
|
||||||
@ -119,6 +121,8 @@ UART_HandleTypeDef *BSP_UART_GetHandle(BSP_UART_t uart) {
|
|||||||
return &huart5;
|
return &huart5;
|
||||||
case BSP_UART_VOFA:
|
case BSP_UART_VOFA:
|
||||||
return &huart1;
|
return &huart1;
|
||||||
|
case BSP_UART_REF:
|
||||||
|
return &huart10;
|
||||||
default:
|
default:
|
||||||
return NULL;
|
return NULL;
|
||||||
}
|
}
|
||||||
|
|||||||
@ -29,6 +29,7 @@ extern "C" {
|
|||||||
typedef enum {
|
typedef enum {
|
||||||
BSP_UART_DR16,
|
BSP_UART_DR16,
|
||||||
BSP_UART_VOFA,
|
BSP_UART_VOFA,
|
||||||
|
BSP_UART_REF,
|
||||||
BSP_UART_NUM,
|
BSP_UART_NUM,
|
||||||
BSP_UART_ERR,
|
BSP_UART_ERR,
|
||||||
} BSP_UART_t;
|
} BSP_UART_t;
|
||||||
|
|||||||
Loading…
Reference in New Issue
Block a user