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This commit is contained in:
Robofish 2026-03-12 00:51:15 +08:00
parent 527d2e9be4
commit 66e6d29808
8 changed files with 132 additions and 3 deletions
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3
CMakeLists.txt
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@ -69,6 +69,7 @@ target_sources(${CMAKE_PROJECT_NAME} PRIVATE
User/component/pid.c
User/component/user_math.c
User/component/vmc.c
User/component/ui.c
# User/device sources
User/device/bmi088.c
@ -83,6 +84,8 @@ target_sources(${CMAKE_PROJECT_NAME} PRIVATE
User/device/vision_bridge.c
User/device/vofa.c
User/device/mrobot.c
User/device/referee.c
User/device/supercap.c
# User/module sources
User/module/balance_chassis.c

2
Core/Inc/stm32h7xx_it.h
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@ -58,6 +58,7 @@ void DMA1_Stream2_IRQHandler(void);
void DMA1_Stream3_IRQHandler(void);
void DMA1_Stream4_IRQHandler(void);
void DMA1_Stream5_IRQHandler(void);
void DMA1_Stream6_IRQHandler(void);
void FDCAN1_IT0_IRQHandler(void);
void FDCAN2_IT0_IRQHandler(void);
void FDCAN1_IT1_IRQHandler(void);
@ -67,6 +68,7 @@ void USART1_IRQHandler(void);
void USART2_IRQHandler(void);
void USART3_IRQHandler(void);
void EXTI15_10_IRQHandler(void);
void DMA1_Stream7_IRQHandler(void);
void UART5_IRQHandler(void);
void UART7_IRQHandler(void);
void ADC3_IRQHandler(void);

6
Core/Src/dma.c
View File

@ -61,6 +61,12 @@ void MX_DMA_Init(void)
/* DMA1_Stream5_IRQn interrupt configuration */
HAL_NVIC_SetPriority(DMA1_Stream5_IRQn, 5, 0);
HAL_NVIC_EnableIRQ(DMA1_Stream5_IRQn);
/* DMA1_Stream6_IRQn interrupt configuration */
HAL_NVIC_SetPriority(DMA1_Stream6_IRQn, 5, 0);
HAL_NVIC_EnableIRQ(DMA1_Stream6_IRQn);
/* DMA1_Stream7_IRQn interrupt configuration */
HAL_NVIC_SetPriority(DMA1_Stream7_IRQn, 5, 0);
HAL_NVIC_EnableIRQ(DMA1_Stream7_IRQn);
}

30
Core/Src/stm32h7xx_it.c
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@ -68,6 +68,8 @@ extern SPI_HandleTypeDef hspi2;
extern DMA_HandleTypeDef hdma_uart5_rx;
extern DMA_HandleTypeDef hdma_usart1_tx;
extern DMA_HandleTypeDef hdma_usart1_rx;
extern DMA_HandleTypeDef hdma_usart10_rx;
extern DMA_HandleTypeDef hdma_usart10_tx;
extern UART_HandleTypeDef huart5;
extern UART_HandleTypeDef huart7;
extern UART_HandleTypeDef huart1;
@ -262,6 +264,20 @@ void DMA1_Stream5_IRQHandler(void)
/* USER CODE END DMA1_Stream5_IRQn 1 */
}
/**
* @brief This function handles DMA1 stream6 global interrupt.
*/
void DMA1_Stream6_IRQHandler(void)
{
/* USER CODE BEGIN DMA1_Stream6_IRQn 0 */
/* USER CODE END DMA1_Stream6_IRQn 0 */
HAL_DMA_IRQHandler(&hdma_usart10_rx);
/* USER CODE BEGIN DMA1_Stream6_IRQn 1 */
/* USER CODE END DMA1_Stream6_IRQn 1 */
}
/**
* @brief This function handles FDCAN1 interrupt 0.
*/
@ -390,6 +406,20 @@ void EXTI15_10_IRQHandler(void)
/* USER CODE END EXTI15_10_IRQn 1 */
}
/**
* @brief This function handles DMA1 stream7 global interrupt.
*/
void DMA1_Stream7_IRQHandler(void)
{
/* USER CODE BEGIN DMA1_Stream7_IRQn 0 */
/* USER CODE END DMA1_Stream7_IRQn 0 */
HAL_DMA_IRQHandler(&hdma_usart10_tx);
/* USER CODE BEGIN DMA1_Stream7_IRQn 1 */
/* USER CODE END DMA1_Stream7_IRQn 1 */
}
/**
* @brief This function handles UART5 global interrupt.
*/

45
Core/Src/usart.c
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@ -33,6 +33,8 @@ UART_HandleTypeDef huart10;
DMA_HandleTypeDef hdma_uart5_rx;
DMA_HandleTypeDef hdma_usart1_tx;
DMA_HandleTypeDef hdma_usart1_rx;
DMA_HandleTypeDef hdma_usart10_rx;
DMA_HandleTypeDef hdma_usart10_tx;
/* UART5 init function */
void MX_UART5_Init(void)
@ -265,7 +267,7 @@ void MX_USART10_UART_Init(void)
/* USER CODE END USART10_Init 1 */
huart10.Instance = USART10;
huart10.Init.BaudRate = 921600;
huart10.Init.BaudRate = 115200;
huart10.Init.WordLength = UART_WORDLENGTH_8B;
huart10.Init.StopBits = UART_STOPBITS_1;
huart10.Init.Parity = UART_PARITY_NONE;
@ -598,6 +600,43 @@ void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle)
GPIO_InitStruct.Alternate = GPIO_AF11_USART10;
HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
/* USART10 DMA Init */
/* USART10_RX Init */
hdma_usart10_rx.Instance = DMA1_Stream6;
hdma_usart10_rx.Init.Request = DMA_REQUEST_USART10_RX;
hdma_usart10_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
hdma_usart10_rx.Init.PeriphInc = DMA_PINC_DISABLE;
hdma_usart10_rx.Init.MemInc = DMA_MINC_ENABLE;
hdma_usart10_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
hdma_usart10_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
hdma_usart10_rx.Init.Mode = DMA_NORMAL;
hdma_usart10_rx.Init.Priority = DMA_PRIORITY_LOW;
hdma_usart10_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
if (HAL_DMA_Init(&hdma_usart10_rx) != HAL_OK)
{
Error_Handler();
}
__HAL_LINKDMA(uartHandle,hdmarx,hdma_usart10_rx);
/* USART10_TX Init */
hdma_usart10_tx.Instance = DMA1_Stream7;
hdma_usart10_tx.Init.Request = DMA_REQUEST_USART10_TX;
hdma_usart10_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
hdma_usart10_tx.Init.PeriphInc = DMA_PINC_DISABLE;
hdma_usart10_tx.Init.MemInc = DMA_MINC_ENABLE;
hdma_usart10_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
hdma_usart10_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
hdma_usart10_tx.Init.Mode = DMA_NORMAL;
hdma_usart10_tx.Init.Priority = DMA_PRIORITY_LOW;
hdma_usart10_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
if (HAL_DMA_Init(&hdma_usart10_tx) != HAL_OK)
{
Error_Handler();
}
__HAL_LINKDMA(uartHandle,hdmatx,hdma_usart10_tx);
/* USART10 interrupt Init */
HAL_NVIC_SetPriority(USART10_IRQn, 5, 0);
HAL_NVIC_EnableIRQ(USART10_IRQn);
@ -737,6 +776,10 @@ void HAL_UART_MspDeInit(UART_HandleTypeDef* uartHandle)
*/
HAL_GPIO_DeInit(GPIOE, GPIO_PIN_2|GPIO_PIN_3);
/* USART10 DMA DeInit */
HAL_DMA_DeInit(uartHandle->hdmarx);
HAL_DMA_DeInit(uartHandle->hdmatx);
/* USART10 interrupt Deinit */
HAL_NVIC_DisableIRQ(USART10_IRQn);
/* USER CODE BEGIN USART10_MspDeInit 1 */

44
CtrBoard-H7_ALL.ioc
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@ -80,7 +80,9 @@ Dma.Request2=SPI2_TX
Dma.Request3=UART5_RX
Dma.Request4=USART1_TX
Dma.Request5=USART1_RX
Dma.RequestsNb=6
Dma.Request6=USART10_RX
Dma.Request7=USART10_TX
Dma.RequestsNb=8
Dma.SPI2_RX.1.Direction=DMA_PERIPH_TO_MEMORY
Dma.SPI2_RX.1.EventEnable=DISABLE
Dma.SPI2_RX.1.FIFOMode=DMA_FIFOMODE_DISABLE
@ -135,6 +137,42 @@ Dma.UART5_RX.3.SyncEnable=DISABLE
Dma.UART5_RX.3.SyncPolarity=HAL_DMAMUX_SYNC_NO_EVENT
Dma.UART5_RX.3.SyncRequestNumber=1
Dma.UART5_RX.3.SyncSignalID=NONE
Dma.USART10_RX.6.Direction=DMA_PERIPH_TO_MEMORY
Dma.USART10_RX.6.EventEnable=DISABLE
Dma.USART10_RX.6.FIFOMode=DMA_FIFOMODE_DISABLE
Dma.USART10_RX.6.Instance=DMA1_Stream6
Dma.USART10_RX.6.MemDataAlignment=DMA_MDATAALIGN_BYTE
Dma.USART10_RX.6.MemInc=DMA_MINC_ENABLE
Dma.USART10_RX.6.Mode=DMA_NORMAL
Dma.USART10_RX.6.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
Dma.USART10_RX.6.PeriphInc=DMA_PINC_DISABLE
Dma.USART10_RX.6.Polarity=HAL_DMAMUX_REQ_GEN_RISING
Dma.USART10_RX.6.Priority=DMA_PRIORITY_LOW
Dma.USART10_RX.6.RequestNumber=1
Dma.USART10_RX.6.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode,SignalID,Polarity,RequestNumber,SyncSignalID,SyncPolarity,SyncEnable,EventEnable,SyncRequestNumber
Dma.USART10_RX.6.SignalID=NONE
Dma.USART10_RX.6.SyncEnable=DISABLE
Dma.USART10_RX.6.SyncPolarity=HAL_DMAMUX_SYNC_NO_EVENT
Dma.USART10_RX.6.SyncRequestNumber=1
Dma.USART10_RX.6.SyncSignalID=NONE
Dma.USART10_TX.7.Direction=DMA_MEMORY_TO_PERIPH
Dma.USART10_TX.7.EventEnable=DISABLE
Dma.USART10_TX.7.FIFOMode=DMA_FIFOMODE_DISABLE
Dma.USART10_TX.7.Instance=DMA1_Stream7
Dma.USART10_TX.7.MemDataAlignment=DMA_MDATAALIGN_BYTE
Dma.USART10_TX.7.MemInc=DMA_MINC_ENABLE
Dma.USART10_TX.7.Mode=DMA_NORMAL
Dma.USART10_TX.7.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
Dma.USART10_TX.7.PeriphInc=DMA_PINC_DISABLE
Dma.USART10_TX.7.Polarity=HAL_DMAMUX_REQ_GEN_RISING
Dma.USART10_TX.7.Priority=DMA_PRIORITY_LOW
Dma.USART10_TX.7.RequestNumber=1
Dma.USART10_TX.7.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode,SignalID,Polarity,RequestNumber,SyncSignalID,SyncPolarity,SyncEnable,EventEnable,SyncRequestNumber
Dma.USART10_TX.7.SignalID=NONE
Dma.USART10_TX.7.SyncEnable=DISABLE
Dma.USART10_TX.7.SyncPolarity=HAL_DMAMUX_SYNC_NO_EVENT
Dma.USART10_TX.7.SyncRequestNumber=1
Dma.USART10_TX.7.SyncSignalID=NONE
Dma.USART1_RX.5.Direction=DMA_PERIPH_TO_MEMORY
Dma.USART1_RX.5.EventEnable=DISABLE
Dma.USART1_RX.5.FIFOMode=DMA_FIFOMODE_DISABLE
@ -334,6 +372,8 @@ NVIC.DMA1_Stream2_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
NVIC.DMA1_Stream3_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
NVIC.DMA1_Stream4_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
NVIC.DMA1_Stream5_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
NVIC.DMA1_Stream6_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
NVIC.DMA1_Stream7_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
NVIC.EXTI15_10_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true
NVIC.FDCAN1_IT0_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true
@ -758,7 +798,7 @@ UART7.IPParameters=BaudRate
USART1.BaudRate=921600
USART1.IPParameters=VirtualMode-Asynchronous,BaudRate
USART1.VirtualMode-Asynchronous=VM_ASYNC
USART10.BaudRate=921600
USART10.BaudRate=115200
USART10.IPParameters=VirtualMode,BaudRate
USART10.VirtualMode=VM_ASYNC
USART2.BaudRate=921600

4
User/bsp/uart.c
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@ -27,6 +27,8 @@ static BSP_UART_t UART_Get(UART_HandleTypeDef *huart) {
return BSP_UART_DR16;
else if (huart->Instance == USART1)
return BSP_UART_VOFA;
else if (huart->Instance == USART10)
return BSP_UART_REF;
else
return BSP_UART_ERR;
}
@ -119,6 +121,8 @@ UART_HandleTypeDef *BSP_UART_GetHandle(BSP_UART_t uart) {
return &huart5;
case BSP_UART_VOFA:
return &huart1;
case BSP_UART_REF:
return &huart10;
default:
return NULL;
}

1
User/bsp/uart.h
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@ -29,6 +29,7 @@ extern "C" {
typedef enum {
BSP_UART_DR16,
BSP_UART_VOFA,
BSP_UART_REF,
BSP_UART_NUM,
BSP_UART_ERR,
} BSP_UART_t;