24239 lines
816 KiB
XML
24239 lines
816 KiB
XML
<?xml version="1.0" encoding="utf-8"?>
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<!-- ******************************************************************************* -->
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<!-- Copyright (C) 2013 Spansion LLC. All Rights Reserved. -->
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<!-- -->
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<!-- This software is owned and published by: -->
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<!-- Spansion LLC, 915 DeGuigne Dr. Sunnyvale, CA 94088-3453 ("Spansion"). -->
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<!-- -->
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<!-- BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND -->
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<!-- BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT. -->
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<!-- -->
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<!-- This software contains source code for use with Spansion -->
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<!-- components. This software is licensed by Spansion to be adapted only -->
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<!-- for use in systems utilizing Spansion components. Spansion shall not be -->
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<!-- responsible for misuse or illegal use of this software for devices not -->
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<!-- supported herein. Spansion is providing this software "AS IS" and will -->
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<!-- not be responsible for issues arising from incorrect user implementation -->
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<!-- of the software. -->
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<!-- -->
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<!-- SPANSION MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE, -->
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<!-- REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS), -->
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<!-- ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING, -->
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<!-- WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED -->
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<!-- WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED -->
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<!-- WARRANTY OF NONINFRINGEMENT. -->
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<!-- SPANSION SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT, -->
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<!-- NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT -->
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<!-- LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION, -->
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<!-- LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR -->
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<!-- INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT, -->
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<!-- INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA, -->
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<!-- SAVINGS OR PROFITS, -->
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<!-- EVEN IF SPANSION HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -->
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<!-- YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR -->
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<!-- INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED -->
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<!-- FROM, THE SOFTWARE. -->
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<!-- -->
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<!-- This software may be replicated in part or whole for the licensed use, -->
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<!-- with the restriction that this Disclaimer and Copyright notice must be -->
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<!-- included with each copy of this software, whether used in part or whole, -->
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<!-- at all times. -->
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<!-- ******************************************************************************* -->
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<!-- 2014.6.27 generated by svdgen_v03a -->
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<device schemaVersion="1.0" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_0.xsd">
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<name>S6E1A1</name>
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<version>1.2</version>
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<description>S6E1A1 Series</description>
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<addressUnitBits>8</addressUnitBits>
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<width>32</width>
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<size>32</size>
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<access>read-write</access>
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<resetValue>0x00000000</resetValue>
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<resetMask>0x00000000</resetMask>
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<peripherals>
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<!-- ************************************************************************************** -->
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<!-- peripheral:WorkFlashMemory -->
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<!-- ************************************************************************************** -->
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<!-- PERIPHERAL "FLASH_IF" -->
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<peripheral>
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<name>FLASH_IF</name>
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<description>Flash Memory</description>
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<groupName>FLASH_IF</groupName>
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<baseAddress>0x40000000</baseAddress>
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<!-- ADDRESS BLOCK -->
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<addressBlock>
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<offset>0x4</offset>
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<size>0x1</size>
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<usage>registers</usage>
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</addressBlock>
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<addressBlock>
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<offset>0x8</offset>
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<size>0x1</size>
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<usage>registers</usage>
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</addressBlock>
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<addressBlock>
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<offset>0x10</offset>
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<size>0x1</size>
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<usage>registers</usage>
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</addressBlock>
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<addressBlock>
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<offset>0x20</offset>
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<size>0x1</size>
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<usage>registers</usage>
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</addressBlock>
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<addressBlock>
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<offset>0x24</offset>
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<size>0x1</size>
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<usage>registers</usage>
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</addressBlock>
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<addressBlock>
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<offset>0x28</offset>
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<size>0x1</size>
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<usage>registers</usage>
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</addressBlock>
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<addressBlock>
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<offset>0x100</offset>
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<size>0x4</size>
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<usage>registers</usage>
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</addressBlock>
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<!-- INTERRUPT "BTIM0_3_FLASH" -->
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<interrupt>
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<name>BTIM0_3_FLASH</name>
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<value>31</value>
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</interrupt>
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<!-- REGISTERS -->
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<registers>
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<!-- REGISTER "FRWTR" -->
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<register>
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<name>FRWTR</name>
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<description>Flash Read Wait Register</description>
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<addressOffset>0x4</addressOffset>
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<size>8</size>
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<access>read-write</access>
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<resetValue>0x01</resetValue>
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<resetMask>0x03</resetMask>
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<!-- FIELDS -->
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<fields>
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<!-- FIELD "RWT" -->
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<field>
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<name>RWT</name>
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<description>Read Wait Cycle</description>
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<lsb>0</lsb>
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<msb>1</msb>
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<access>read-write</access>
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</field>
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</fields>
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</register>
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<!-- REGISTER "FSTR" -->
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<register>
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<name>FSTR</name>
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<description>Flash Status Register</description>
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<addressOffset>0x8</addressOffset>
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<size>8</size>
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<access>read-only</access>
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<resetValue>0x00</resetValue>
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<resetMask>0x3F</resetMask>
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<!-- FIELDS -->
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<fields>
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<!-- FIELD "PGMS" -->
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<field>
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<name>PGMS</name>
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<description>Flash Program Status</description>
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<lsb>5</lsb>
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<msb>5</msb>
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<access>read-only</access>
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</field>
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<!-- FIELD "SERS" -->
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<field>
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<name>SERS</name>
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<description>Flash Sector Erase Status</description>
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<lsb>4</lsb>
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<msb>4</msb>
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<access>read-only</access>
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</field>
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<!-- FIELD "ESPS" -->
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<field>
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<name>ESPS</name>
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<description>Flash Erase Suspend Status</description>
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<lsb>3</lsb>
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<msb>3</msb>
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<access>read-only</access>
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</field>
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<!-- FIELD "CERS" -->
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<field>
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<name>CERS</name>
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<description>Flash Chip Erase Status</description>
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<lsb>2</lsb>
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<msb>2</msb>
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<access>read-only</access>
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</field>
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<!-- FIELD "HNG" -->
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<field>
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<name>HNG</name>
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<description>Flash Hang Status</description>
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<lsb>1</lsb>
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<msb>1</msb>
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<access>read-only</access>
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</field>
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<!-- FIELD "RDY" -->
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<field>
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<name>RDY</name>
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<description>Flash Ready Status</description>
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<lsb>0</lsb>
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<msb>0</msb>
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<access>read-only</access>
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</field>
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</fields>
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</register>
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<!-- REGISTER "FSYNDN" -->
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<register>
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<name>FSYNDN</name>
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<description>Flash Sync Down Register</description>
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<addressOffset>0x10</addressOffset>
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<size>8</size>
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<access>read-write</access>
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<resetValue>0x01</resetValue>
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<resetMask>0x0F</resetMask>
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<!-- FIELDS -->
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<fields>
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<!-- FIELD "SD" -->
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<field>
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<name>SD</name>
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<description>Sync Down</description>
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<lsb>0</lsb>
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<msb>3</msb>
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<access>read-write</access>
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</field>
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</fields>
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</register>
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<!-- REGISTER "FICR" -->
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<register>
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<name>FICR</name>
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<description>Flash Interrupt Control Register</description>
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<addressOffset>0x20</addressOffset>
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<size>8</size>
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<access>read-write</access>
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<resetValue>0x00</resetValue>
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<resetMask>0x03</resetMask>
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<!-- FIELDS -->
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<fields>
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<!-- FIELD "HANGIE" -->
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<field>
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<name>HANGIE</name>
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<description>HANG Interrupt Enable</description>
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<lsb>1</lsb>
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<msb>1</msb>
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<access>read-write</access>
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</field>
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<!-- FIELD "RDYIE" -->
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<field>
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<name>RDYIE</name>
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<description>RDY Interrupt Enable</description>
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<lsb>0</lsb>
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<msb>0</msb>
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<access>read-write</access>
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</field>
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</fields>
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</register>
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<!-- REGISTER "FISR" -->
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<register>
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<name>FISR</name>
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<description>Flash Interrupt Status Register</description>
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<addressOffset>0x24</addressOffset>
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<size>8</size>
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<access>read-write</access>
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<resetValue>0x00</resetValue>
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<resetMask>0x03</resetMask>
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<!-- FIELDS -->
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<fields>
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<!-- FIELD "HANGIF" -->
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<field>
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<name>HANGIF</name>
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<description>HANG Interrupt Flag</description>
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<lsb>1</lsb>
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<msb>1</msb>
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<access>read-write</access>
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</field>
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<!-- FIELD "RDYIF" -->
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<field>
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<name>RDYIF</name>
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<description>RDY Interrupt Flag</description>
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<lsb>0</lsb>
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<msb>0</msb>
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<access>read-write</access>
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</field>
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</fields>
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</register>
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<!-- REGISTER "FICLR" -->
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<register>
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<name>FICLR</name>
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<description>Flash Interrupt Clear Register</description>
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<addressOffset>0x28</addressOffset>
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<size>8</size>
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<access>write-only</access>
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<resetValue>0x00</resetValue>
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<resetMask>0x03</resetMask>
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<!-- FIELDS -->
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<fields>
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<!-- FIELD "HANGIC" -->
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<field>
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<name>HANGIC</name>
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<description>HANG Interrupt Clear</description>
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<lsb>1</lsb>
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<msb>1</msb>
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<access>write-only</access>
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</field>
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<!-- FIELD "RDYIC" -->
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<field>
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<name>RDYIC</name>
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<description>RDY Interrupt Clear</description>
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<lsb>0</lsb>
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<msb>0</msb>
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<access>write-only</access>
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</field>
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</fields>
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</register>
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<!-- REGISTER "CRTRMM" -->
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<register>
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<name>CRTRMM</name>
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<description>CR Trimming Data Mirror Register</description>
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<addressOffset>0x100</addressOffset>
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<size>32</size>
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<access>read-only</access>
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<resetValue>0x00000000</resetValue>
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<resetMask>0x001F03FF</resetMask>
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<!-- FIELDS -->
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<fields>
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<!-- FIELD "TTRMM" -->
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<field>
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<name>TTRMM</name>
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<description>CR Temperature Trimming Data Mirror Bit</description>
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<lsb>16</lsb>
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<msb>20</msb>
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<access>read-only</access>
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</field>
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<!-- FIELD "TRMM" -->
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<field>
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<name>TRMM</name>
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<description>CR Trimming Data Mirror Bit</description>
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<lsb>0</lsb>
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<msb>9</msb>
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<access>read-only</access>
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</field>
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</fields>
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</register>
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</registers>
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</peripheral>
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<!-- PERIPHERAL "UNIQUE_ID" -->
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<peripheral>
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<name>UNIQUE_ID</name>
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<description>Unique ID</description>
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<groupName>UNIQUE_ID</groupName>
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<baseAddress>0x40000200</baseAddress>
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<!-- ADDRESS BLOCK -->
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<addressBlock>
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<offset>0x0</offset>
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<size>0x4</size>
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<usage>registers</usage>
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</addressBlock>
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<addressBlock>
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<offset>0x4</offset>
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<size>0x4</size>
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<usage>registers</usage>
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</addressBlock>
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<!-- REGISTERS -->
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<registers>
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<!-- REGISTER "UIDR0" -->
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<register>
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<name>UIDR0</name>
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<description>Unique ID Register 0</description>
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<addressOffset>0x0</addressOffset>
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<size>32</size>
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<access>read-only</access>
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<resetValue>0x00000000</resetValue>
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<resetMask>0xFFFFFFF0</resetMask>
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<!-- FIELDS -->
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<fields>
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<!-- FIELD "UID" -->
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<field>
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<name>UID</name>
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<description>Unique ID 27 through Unique ID 0</description>
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<lsb>4</lsb>
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<msb>31</msb>
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<access>read-only</access>
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</field>
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</fields>
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</register>
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<!-- REGISTER "UIDR1" -->
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<register>
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<name>UIDR1</name>
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<description>Unique ID Register 1</description>
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<addressOffset>0x4</addressOffset>
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<size>32</size>
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<access>read-only</access>
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<resetValue>0x00000000</resetValue>
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<resetMask>0x00001FFF</resetMask>
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<!-- FIELDS -->
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<fields>
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<!-- FIELD "UID" -->
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<field>
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<name>UID</name>
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<description>Unique ID 40 through Unique ID 28</description>
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<lsb>0</lsb>
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<msb>12</msb>
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<access>read-only</access>
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</field>
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</fields>
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</register>
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</registers>
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</peripheral>
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<!-- PERIPHERAL "CLOCK" -->
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<peripheral>
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<name>CLOCK</name>
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<description>Clock Unit Registers</description>
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<groupName>CLOCK</groupName>
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<baseAddress>0x40010000</baseAddress>
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<!-- ADDRESS BLOCK -->
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<addressBlock>
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<offset>0x0</offset>
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<size>0x1</size>
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<usage>registers</usage>
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</addressBlock>
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<addressBlock>
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<offset>0x4</offset>
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<size>0x1</size>
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<usage>registers</usage>
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</addressBlock>
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<addressBlock>
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<offset>0x8</offset>
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<size>0x4</size>
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<usage>registers</usage>
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</addressBlock>
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<addressBlock>
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<offset>0xC</offset>
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<size>0x2</size>
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<usage>registers</usage>
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</addressBlock>
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|
<addressBlock>
|
|
<offset>0x10</offset>
|
|
<size>0x1</size>
|
|
<usage>registers</usage>
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|
</addressBlock>
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|
<addressBlock>
|
|
<offset>0x14</offset>
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|
<size>0x1</size>
|
|
<usage>registers</usage>
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|
</addressBlock>
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|
<addressBlock>
|
|
<offset>0x18</offset>
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|
<size>0x1</size>
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<usage>registers</usage>
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</addressBlock>
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<addressBlock>
|
|
<offset>0x20</offset>
|
|
<size>0x1</size>
|
|
<usage>registers</usage>
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|
</addressBlock>
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|
<addressBlock>
|
|
<offset>0x30</offset>
|
|
<size>0x1</size>
|
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<usage>registers</usage>
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|
</addressBlock>
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|
<addressBlock>
|
|
<offset>0x34</offset>
|
|
<size>0x1</size>
|
|
<usage>registers</usage>
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|
</addressBlock>
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|
<addressBlock>
|
|
<offset>0x38</offset>
|
|
<size>0x1</size>
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|
<usage>registers</usage>
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|
</addressBlock>
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|
<addressBlock>
|
|
<offset>0x3C</offset>
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|
<size>0x1</size>
|
|
<usage>registers</usage>
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|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x40</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x44</offset>
|
|
<size>0x1</size>
|
|
<usage>registers</usage>
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|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x48</offset>
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|
<size>0x2</size>
|
|
<usage>registers</usage>
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</addressBlock>
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|
<addressBlock>
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<offset>0x4C</offset>
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<size>0x2</size>
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<usage>registers</usage>
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</addressBlock>
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<addressBlock>
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<offset>0x50</offset>
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<size>0x2</size>
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<usage>registers</usage>
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</addressBlock>
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<addressBlock>
|
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<offset>0x54</offset>
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<size>0x1</size>
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<usage>registers</usage>
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</addressBlock>
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<addressBlock>
|
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<offset>0x60</offset>
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<size>0x1</size>
|
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<usage>registers</usage>
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</addressBlock>
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|
<addressBlock>
|
|
<offset>0x64</offset>
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<size>0x1</size>
|
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<usage>registers</usage>
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</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x68</offset>
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<size>0x1</size>
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<usage>registers</usage>
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</addressBlock>
|
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<!-- INTERRUPT "CSV" -->
|
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<interrupt>
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<name>CSV</name>
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<value>0</value>
|
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</interrupt>
|
|
<!-- INTERRUPT "OSC_PLL_WC_RTC" -->
|
|
<interrupt>
|
|
<name>OSC_PLL_WC_RTC</name>
|
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<value>24</value>
|
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</interrupt>
|
|
<!-- REGISTERS -->
|
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<registers>
|
|
<!-- REGISTER "SCM_CTL" -->
|
|
<register>
|
|
<name>SCM_CTL</name>
|
|
<description>System Clock Mode Control Register</description>
|
|
<addressOffset>0x0</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x01</resetValue>
|
|
<resetMask>0xFB</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "RCS" -->
|
|
<field>
|
|
<name>RCS</name>
|
|
<description>Master clock switch control bits</description>
|
|
<lsb>5</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "PLLE" -->
|
|
<field>
|
|
<name>PLLE</name>
|
|
<description>PLL oscillation enable bit</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "SOSCE" -->
|
|
<field>
|
|
<name>SOSCE</name>
|
|
<description>Sub clock oscillation enable bit</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "MOSCE" -->
|
|
<field>
|
|
<name>MOSCE</name>
|
|
<description>Main clock oscillation enable bit</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "HCRE" -->
|
|
<field>
|
|
<name>HCRE</name>
|
|
<description>High-speed CR clock oscillation enable bit</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "SCM_STR" -->
|
|
<register>
|
|
<name>SCM_STR</name>
|
|
<description>System Clock Mode Status Register</description>
|
|
<addressOffset>0x4</addressOffset>
|
|
<size>8</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x01</resetValue>
|
|
<resetMask>0xFB</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "RCM" -->
|
|
<field>
|
|
<name>RCM</name>
|
|
<description>Master clock selection bits</description>
|
|
<lsb>5</lsb>
|
|
<msb>7</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "PLRDY" -->
|
|
<field>
|
|
<name>PLRDY</name>
|
|
<description>PLL oscillation stable bit</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "SORDY" -->
|
|
<field>
|
|
<name>SORDY</name>
|
|
<description>Sub clock oscillation stable bit</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "MORDY" -->
|
|
<field>
|
|
<name>MORDY</name>
|
|
<description>Main clock oscillation stable bit</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "HCRDY" -->
|
|
<field>
|
|
<name>HCRDY</name>
|
|
<description>High-speed CR clock oscillation stable bit</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "BSC_PSR" -->
|
|
<register>
|
|
<name>BSC_PSR</name>
|
|
<description>Base Clock Prescaler Register</description>
|
|
<addressOffset>0x10</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0x07</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "BSR" -->
|
|
<field>
|
|
<name>BSR</name>
|
|
<description>Base clock frequency division ratio setting bits</description>
|
|
<lsb>0</lsb>
|
|
<msb>2</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "APBC0_PSR" -->
|
|
<register>
|
|
<name>APBC0_PSR</name>
|
|
<description>APB0 Prescaler Register</description>
|
|
<addressOffset>0x14</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0x03</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "APBC0" -->
|
|
<field>
|
|
<name>APBC0</name>
|
|
<description>APB0 bus clock frequency division ratio setting bits</description>
|
|
<lsb>0</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "APBC1_PSR" -->
|
|
<register>
|
|
<name>APBC1_PSR</name>
|
|
<description>APB1 Prescaler Register</description>
|
|
<addressOffset>0x18</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x80</resetValue>
|
|
<resetMask>0x93</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "APBC1EN" -->
|
|
<field>
|
|
<name>APBC1EN</name>
|
|
<description>APB1 clock enable bit</description>
|
|
<lsb>7</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "APBC1RST" -->
|
|
<field>
|
|
<name>APBC1RST</name>
|
|
<description>APB1 bus reset control bit</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "APBC1" -->
|
|
<field>
|
|
<name>APBC1</name>
|
|
<description>APB1 bus clock frequency division ratio setting bits</description>
|
|
<lsb>0</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "SWC_PSR" -->
|
|
<register>
|
|
<name>SWC_PSR</name>
|
|
<description>Software Watchdog Clock Prescaler Register</description>
|
|
<addressOffset>0x20</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0x83</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "TESTB" -->
|
|
<field>
|
|
<name>TESTB</name>
|
|
<description>TEST bit</description>
|
|
<lsb>7</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "SWDS" -->
|
|
<field>
|
|
<name>SWDS</name>
|
|
<description>Software watchdog clock frequency division ratio setting bits</description>
|
|
<lsb>0</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "CSW_TMR" -->
|
|
<register>
|
|
<name>CSW_TMR</name>
|
|
<description>Clock Stabilization Wait Time Register</description>
|
|
<addressOffset>0x30</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0xFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "SOWT" -->
|
|
<field>
|
|
<name>SOWT</name>
|
|
<description>Sub clock stabilization wait time setup bits</description>
|
|
<lsb>4</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "MOWT" -->
|
|
<field>
|
|
<name>MOWT</name>
|
|
<description>Main clock stabilization wait time setup bits</description>
|
|
<lsb>0</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "PSW_TMR" -->
|
|
<register>
|
|
<name>PSW_TMR</name>
|
|
<description>PLL Clock Stabilization Wait Time Setup Register</description>
|
|
<addressOffset>0x34</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0x17</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "PINC" -->
|
|
<field>
|
|
<name>PINC</name>
|
|
<description>PLL input clock select bit</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "POWT" -->
|
|
<field>
|
|
<name>POWT</name>
|
|
<description>Main PLL clock stabilization wait time setup bits</description>
|
|
<lsb>0</lsb>
|
|
<msb>2</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "PLL_CTL1" -->
|
|
<register>
|
|
<name>PLL_CTL1</name>
|
|
<description>PLL Control Register 1</description>
|
|
<addressOffset>0x38</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0xFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "PLLK" -->
|
|
<field>
|
|
<name>PLLK</name>
|
|
<description>PLL input clock frequency division ratio setting bits</description>
|
|
<lsb>4</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "PLLM" -->
|
|
<field>
|
|
<name>PLLM</name>
|
|
<description>PLL VCO clock frequency division ratio setting bits</description>
|
|
<lsb>0</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "PLL_CTL2" -->
|
|
<register>
|
|
<name>PLL_CTL2</name>
|
|
<description>PLL Control Register 2</description>
|
|
<addressOffset>0x3C</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0x3F</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "PLLN" -->
|
|
<field>
|
|
<name>PLLN</name>
|
|
<description>PLL feedback frequency division ratio setting bits</description>
|
|
<lsb>0</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "DBWDT_CTL" -->
|
|
<register>
|
|
<name>DBWDT_CTL</name>
|
|
<description>Debug Break Watchdog Timer Control Register</description>
|
|
<addressOffset>0x54</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0xA0</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "DPHWBE" -->
|
|
<field>
|
|
<name>DPHWBE</name>
|
|
<description>HW-WDG debug mode break bit</description>
|
|
<lsb>7</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "DPSWBE" -->
|
|
<field>
|
|
<name>DPSWBE</name>
|
|
<description>SW-WDG debug mode break bit</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "INT_ENR" -->
|
|
<register>
|
|
<name>INT_ENR</name>
|
|
<description>Interrupt Enable Register</description>
|
|
<addressOffset>0x60</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0x27</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "FCSE" -->
|
|
<field>
|
|
<name>FCSE</name>
|
|
<description>Anomalous frequency detection interrupt enable bit</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "PCSE" -->
|
|
<field>
|
|
<name>PCSE</name>
|
|
<description>PLL oscillation stabilization wait completion interrupt enable bit</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "SCSE" -->
|
|
<field>
|
|
<name>SCSE</name>
|
|
<description>Sub clock oscillation stabilization wait completion interrupt enable bit</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "MCSE" -->
|
|
<field>
|
|
<name>MCSE</name>
|
|
<description>Main clock oscillation stabilization wait completion interrupt enable bit</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "INT_STR" -->
|
|
<register>
|
|
<name>INT_STR</name>
|
|
<description>Interrupt Status Register</description>
|
|
<addressOffset>0x64</addressOffset>
|
|
<size>8</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0x27</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "FCSI" -->
|
|
<field>
|
|
<name>FCSI</name>
|
|
<description>Anomalous frequency detection interrupt status bit</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "PCSI" -->
|
|
<field>
|
|
<name>PCSI</name>
|
|
<description>PLL oscillation stabilization wait completion interrupt status bit</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "SCSI" -->
|
|
<field>
|
|
<name>SCSI</name>
|
|
<description>Sub clock oscillation stabilization wait completion interrupt status bit</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "MCSI" -->
|
|
<field>
|
|
<name>MCSI</name>
|
|
<description>Main clock oscillation stabilization wait completion interrupt status bit</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "INT_CLR" -->
|
|
<register>
|
|
<name>INT_CLR</name>
|
|
<description>Interrupt Clear Register</description>
|
|
<addressOffset>0x68</addressOffset>
|
|
<size>8</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0x27</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "FCSC" -->
|
|
<field>
|
|
<name>FCSC</name>
|
|
<description>Anomalous frequency detection interrupt factor clear bit</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>write-only</access>
|
|
</field>
|
|
<!-- FIELD "PCSC" -->
|
|
<field>
|
|
<name>PCSC</name>
|
|
<description>PLL oscillation stabilization wait completion interrupt factor clear bit</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>write-only</access>
|
|
</field>
|
|
<!-- FIELD "SCSC" -->
|
|
<field>
|
|
<name>SCSC</name>
|
|
<description>Sub clock oscillation stabilization wait completion interrupt factor clear bit</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>write-only</access>
|
|
</field>
|
|
<!-- FIELD "MCSC" -->
|
|
<field>
|
|
<name>MCSC</name>
|
|
<description>Main clock oscillation stabilization wait completion interrupt factor clear bit</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "STB_CTL" -->
|
|
<register>
|
|
<name>STB_CTL</name>
|
|
<description>Standby Mode Control Register</description>
|
|
<addressOffset>0x8</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0xFFFF0017</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "KEY" -->
|
|
<field>
|
|
<name>KEY</name>
|
|
<description>Standby mode control write control bits</description>
|
|
<lsb>16</lsb>
|
|
<msb>31</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "SPL" -->
|
|
<field>
|
|
<name>SPL</name>
|
|
<description>Standby pin level setting bit</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "DSTM" -->
|
|
<field>
|
|
<name>DSTM</name>
|
|
<description>Deep standby mode select bit</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "STM" -->
|
|
<field>
|
|
<name>STM</name>
|
|
<description>Standby mode selection bits</description>
|
|
<lsb>0</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "RST_STR" -->
|
|
<register>
|
|
<name>RST_STR</name>
|
|
<description>Reset Cause Register</description>
|
|
<addressOffset>0xC</addressOffset>
|
|
<size>16</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x0001</resetValue>
|
|
<resetMask>0x01F3</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "SRST" -->
|
|
<field>
|
|
<name>SRST</name>
|
|
<description>Software reset flag</description>
|
|
<lsb>8</lsb>
|
|
<msb>8</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "FCSR" -->
|
|
<field>
|
|
<name>FCSR</name>
|
|
<description>Flag for anomalous frequency detection reset</description>
|
|
<lsb>7</lsb>
|
|
<msb>7</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "CSVR" -->
|
|
<field>
|
|
<name>CSVR</name>
|
|
<description>Clock failure detection reset flag</description>
|
|
<lsb>6</lsb>
|
|
<msb>6</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "HWDT" -->
|
|
<field>
|
|
<name>HWDT</name>
|
|
<description>Hardware watchdog reset flag</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "SWDT" -->
|
|
<field>
|
|
<name>SWDT</name>
|
|
<description>Software watchdog reset flag</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "INITX" -->
|
|
<field>
|
|
<name>INITX</name>
|
|
<description>INITX pin input reset flag</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "PONR" -->
|
|
<field>
|
|
<name>PONR</name>
|
|
<description>Power-on reset/low-voltage detection reset flag</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "CSV_CTL" -->
|
|
<register>
|
|
<name>CSV_CTL</name>
|
|
<description>CSV control register</description>
|
|
<addressOffset>0x40</addressOffset>
|
|
<size>16</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x7003</resetValue>
|
|
<resetMask>0x7303</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "FCD" -->
|
|
<field>
|
|
<name>FCD</name>
|
|
<description>FCS count cycle setting bits</description>
|
|
<lsb>12</lsb>
|
|
<msb>14</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "FCSRE" -->
|
|
<field>
|
|
<name>FCSRE</name>
|
|
<description>FCS reset output enable bit</description>
|
|
<lsb>9</lsb>
|
|
<msb>9</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "FCSDE" -->
|
|
<field>
|
|
<name>FCSDE</name>
|
|
<description>FCS function enable bit</description>
|
|
<lsb>8</lsb>
|
|
<msb>8</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "SCSVE" -->
|
|
<field>
|
|
<name>SCSVE</name>
|
|
<description>Sub CSV function enable bit</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "MCSVE" -->
|
|
<field>
|
|
<name>MCSVE</name>
|
|
<description>Main CSV function enable bit</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "CSV_STR" -->
|
|
<register>
|
|
<name>CSV_STR</name>
|
|
<description>CSV status register</description>
|
|
<addressOffset>0x44</addressOffset>
|
|
<size>8</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0x03</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "SCMF" -->
|
|
<field>
|
|
<name>SCMF</name>
|
|
<description>Sub clock failure detection flag</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "MCMF" -->
|
|
<field>
|
|
<name>MCMF</name>
|
|
<description>Main clock failure detection flag</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "FCSWH_CTL" -->
|
|
<register>
|
|
<name>FCSWH_CTL</name>
|
|
<description>Frequency detection window setting register</description>
|
|
<addressOffset>0x48</addressOffset>
|
|
<size>16</size>
|
|
<access>read-write</access>
|
|
<resetValue>0xFFFF</resetValue>
|
|
<resetMask>0xFFFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "FWH" -->
|
|
<field>
|
|
<name>FWH</name>
|
|
<description>Frequency detection window setting bits (Upper)</description>
|
|
<lsb>0</lsb>
|
|
<msb>15</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "FCSWL_CTL" -->
|
|
<register>
|
|
<name>FCSWL_CTL</name>
|
|
<description>Frequency detection window setting register</description>
|
|
<addressOffset>0x4C</addressOffset>
|
|
<size>16</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<resetMask>0xFFFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "FWL" -->
|
|
<field>
|
|
<name>FWL</name>
|
|
<description>Frequency detection window setting bits (Lower)</description>
|
|
<lsb>0</lsb>
|
|
<msb>15</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "FCSWD_CTL" -->
|
|
<register>
|
|
<name>FCSWD_CTL</name>
|
|
<description>Frequency detection counter register</description>
|
|
<addressOffset>0x50</addressOffset>
|
|
<size>16</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<resetMask>0xFFFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "FWD" -->
|
|
<field>
|
|
<name>FWD</name>
|
|
<description>Frequency detection count data</description>
|
|
<lsb>0</lsb>
|
|
<msb>15</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral>
|
|
<!-- PERIPHERAL "HWWDT" -->
|
|
<peripheral>
|
|
<name>HWWDT</name>
|
|
<description>Hardware Watchdog Timer</description>
|
|
<groupName>HWWDT</groupName>
|
|
<baseAddress>0x40011000</baseAddress>
|
|
<!-- ADDRESS BLOCK -->
|
|
<addressBlock>
|
|
<offset>0x0</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x4</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x8</offset>
|
|
<size>0x1</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0xC</offset>
|
|
<size>0x1</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x10</offset>
|
|
<size>0x1</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0xC00</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<!-- REGISTERS -->
|
|
<registers>
|
|
<!-- REGISTER "WDG_LDR" -->
|
|
<register>
|
|
<name>WDG_LDR</name>
|
|
<description>Hardware Watchdog Timer Load Register</description>
|
|
<addressOffset>0x0</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000FFFF</resetValue>
|
|
<resetMask>0xFFFFFFFF</resetMask>
|
|
</register>
|
|
<!-- REGISTER "WDG_VLR" -->
|
|
<register>
|
|
<name>WDG_VLR</name>
|
|
<description>Hardware Watchdog Timer Value Register</description>
|
|
<addressOffset>0x4</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0xFFFFFFFF</resetMask>
|
|
</register>
|
|
<!-- REGISTER "WDG_CTL" -->
|
|
<register>
|
|
<name>WDG_CTL</name>
|
|
<description>Hardware Watchdog Timer Control Register</description>
|
|
<addressOffset>0x8</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x03</resetValue>
|
|
<resetMask>0x03</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "RESEN" -->
|
|
<field>
|
|
<name>RESEN</name>
|
|
<description>Hardware watchdog reset enable bit</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "INTEN" -->
|
|
<field>
|
|
<name>INTEN</name>
|
|
<description>Hardware watchdog interrupt and counter enable bit</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "WDG_ICL" -->
|
|
<register>
|
|
<name>WDG_ICL</name>
|
|
<description>Hardware Watchdog Timer Clear Register</description>
|
|
<addressOffset>0xC</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0xFF</resetMask>
|
|
</register>
|
|
<!-- REGISTER "WDG_RIS" -->
|
|
<register>
|
|
<name>WDG_RIS</name>
|
|
<description>Hardware Watchdog Timer Interrupt Status Register</description>
|
|
<addressOffset>0x10</addressOffset>
|
|
<size>8</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0x01</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "RIS" -->
|
|
<field>
|
|
<name>RIS</name>
|
|
<description>Hardware watchdog interrupt status bit</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "WDG_LCK" -->
|
|
<register>
|
|
<name>WDG_LCK</name>
|
|
<description>Hardware Watchdog Timer Lock Register</description>
|
|
<addressOffset>0xC00</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<resetMask>0xFFFFFFFF</resetMask>
|
|
</register>
|
|
</registers>
|
|
</peripheral>
|
|
<!-- PERIPHERAL "SWWDT" -->
|
|
<peripheral>
|
|
<name>SWWDT</name>
|
|
<description>Software Watchdog Timer</description>
|
|
<groupName>SWWDT</groupName>
|
|
<baseAddress>0x40012000</baseAddress>
|
|
<!-- ADDRESS BLOCK -->
|
|
<addressBlock>
|
|
<offset>0x0</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x4</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x8</offset>
|
|
<size>0x1</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0xC</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x10</offset>
|
|
<size>0x1</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x18</offset>
|
|
<size>0x1</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0xC00</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<!-- INTERRUPT "SWDT" -->
|
|
<interrupt>
|
|
<name>SWDT</name>
|
|
<value>1</value>
|
|
</interrupt>
|
|
<!-- REGISTERS -->
|
|
<registers>
|
|
<!-- REGISTER "WDOGLOAD" -->
|
|
<register>
|
|
<name>WDOGLOAD</name>
|
|
<description>Software Watchdog Timer Load Register</description>
|
|
<addressOffset>0x0</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0xFFFFFFFF</resetValue>
|
|
<resetMask>0xFFFFFFFF</resetMask>
|
|
</register>
|
|
<!-- REGISTER "WDOGVALUE" -->
|
|
<register>
|
|
<name>WDOGVALUE</name>
|
|
<description>Software Watchdog Timer Value Register</description>
|
|
<addressOffset>0x4</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0xFFFFFFFF</resetValue>
|
|
<resetMask>0xFFFFFFFF</resetMask>
|
|
</register>
|
|
<!-- REGISTER "WDOGCONTROL" -->
|
|
<register>
|
|
<name>WDOGCONTROL</name>
|
|
<description>Software Watchdog Timer Control Register</description>
|
|
<addressOffset>0x8</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0x1F</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "SPM" -->
|
|
<field>
|
|
<name>SPM</name>
|
|
<description>Software Watchdog window watchdog mode enable bit</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TWD" -->
|
|
<field>
|
|
<name>TWD</name>
|
|
<description>Timing window setting bit of the software watchdog</description>
|
|
<lsb>2</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "RESEN" -->
|
|
<field>
|
|
<name>RESEN</name>
|
|
<description>Reset enable bit of the software watchdog</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "INTEN" -->
|
|
<field>
|
|
<name>INTEN</name>
|
|
<description>Interrupt and counter enable bit of the software watchdog</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "WDOGINTCLR" -->
|
|
<register>
|
|
<name>WDOGINTCLR</name>
|
|
<description>Software Watchdog Timer Clear Register</description>
|
|
<addressOffset>0xC</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0xFFFFFFFF</resetMask>
|
|
</register>
|
|
<!-- REGISTER "WDOGRIS" -->
|
|
<register>
|
|
<name>WDOGRIS</name>
|
|
<description>Software Watchdog Timer Interrupt Status Register</description>
|
|
<addressOffset>0x10</addressOffset>
|
|
<size>8</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0x01</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "RIS" -->
|
|
<field>
|
|
<name>RIS</name>
|
|
<description>Software watchdog interrupt status bit</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "WDOGSPMC" -->
|
|
<register>
|
|
<name>WDOGSPMC</name>
|
|
<description>Software Watchdog Timer Window Watchdog Mode Control Register</description>
|
|
<addressOffset>0x18</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0x01</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "TGR" -->
|
|
<field>
|
|
<name>TGR</name>
|
|
<description>Software watchdog trigger type bit</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "WDOGLOCK" -->
|
|
<register>
|
|
<name>WDOGLOCK</name>
|
|
<description>Software Watchdog Timer Lock Register</description>
|
|
<addressOffset>0xC00</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0xFFFFFFFF</resetMask>
|
|
</register>
|
|
</registers>
|
|
</peripheral>
|
|
<!-- PERIPHERAL "DTIM" -->
|
|
<peripheral>
|
|
<name>DTIM</name>
|
|
<description>Dual Timer</description>
|
|
<groupName>DTIM</groupName>
|
|
<baseAddress>0x40015000</baseAddress>
|
|
<!-- ADDRESS BLOCK -->
|
|
<addressBlock>
|
|
<offset>0x0</offset>
|
|
<size>0x1C</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x20</offset>
|
|
<size>0x1C</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<!-- INTERRUPT "DTIM_QDU" -->
|
|
<interrupt>
|
|
<name>DTIM_QDU</name>
|
|
<value>6</value>
|
|
</interrupt>
|
|
<!-- REGISTERS -->
|
|
<registers>
|
|
<!-- REGISTER "TIMER1LOAD" -->
|
|
<register>
|
|
<name>TIMER1LOAD</name>
|
|
<description>Load Register</description>
|
|
<alternateGroup>DualTimer1</alternateGroup>
|
|
<addressOffset>0x0</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0xFFFFFFFF</resetMask>
|
|
</register>
|
|
<!-- REGISTER "TIMER1VALUE" -->
|
|
<register>
|
|
<name>TIMER1VALUE</name>
|
|
<description>Value Register</description>
|
|
<addressOffset>0x4</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0xFFFFFFFF</resetValue>
|
|
<resetMask>0xFFFFFFFF</resetMask>
|
|
</register>
|
|
<!-- REGISTER "TIMER1CONTROL" -->
|
|
<register>
|
|
<name>TIMER1CONTROL</name>
|
|
<description>Control Register</description>
|
|
<addressOffset>0x8</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000020</resetValue>
|
|
<resetMask>0x000000EF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "TimerEn" -->
|
|
<field>
|
|
<name>TimerEn</name>
|
|
<description>Enable bit</description>
|
|
<lsb>7</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TimerMode" -->
|
|
<field>
|
|
<name>TimerMode</name>
|
|
<description>Mode bit</description>
|
|
<lsb>6</lsb>
|
|
<msb>6</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "IntEnable" -->
|
|
<field>
|
|
<name>IntEnable</name>
|
|
<description>Interrupt enable bit</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TimerPre" -->
|
|
<field>
|
|
<name>TimerPre</name>
|
|
<description>Prescale bits</description>
|
|
<lsb>2</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TimerSize" -->
|
|
<field>
|
|
<name>TimerSize</name>
|
|
<description>Counter size bit</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "OneShot" -->
|
|
<field>
|
|
<name>OneShot</name>
|
|
<description>One-shot mode bit</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "TIMER1INTCLR" -->
|
|
<register>
|
|
<name>TIMER1INTCLR</name>
|
|
<description>Interrupt Clear Register</description>
|
|
<addressOffset>0xC</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0xFFFFFFFF</resetMask>
|
|
</register>
|
|
<!-- REGISTER "TIMER1RIS" -->
|
|
<register>
|
|
<name>TIMER1RIS</name>
|
|
<description>Interrupt Status Register</description>
|
|
<addressOffset>0x10</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000001</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "TIMER1RIS" -->
|
|
<field>
|
|
<name>TIMER1RIS</name>
|
|
<description>Interrupt Status Register bit</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "TIMER1MIS" -->
|
|
<register>
|
|
<name>TIMER1MIS</name>
|
|
<description>Masked Interrupt Status Register</description>
|
|
<addressOffset>0x14</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000001</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "TIMER1MIS" -->
|
|
<field>
|
|
<name>TIMER1MIS</name>
|
|
<description>Masked Interrupt Status bit</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "TIMER1BGLOAD" -->
|
|
<register>
|
|
<name>TIMER1BGLOAD</name>
|
|
<description>Background Load Register</description>
|
|
<addressOffset>0x18</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0xFFFFFFFF</resetMask>
|
|
</register>
|
|
<!-- REGISTER "TIMER2LOAD" -->
|
|
<register derivedFrom="TIMER1LOAD">
|
|
<name>TIMER2LOAD</name>
|
|
<description>Load Register</description>
|
|
<addressOffset>0x20</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "TIMER2VALUE" -->
|
|
<register derivedFrom="TIMER1VALUE">
|
|
<name>TIMER2VALUE</name>
|
|
<description>Value Register</description>
|
|
<addressOffset>0x24</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "TIMER2CONTROL" -->
|
|
<register derivedFrom="TIMER1CONTROL">
|
|
<name>TIMER2CONTROL</name>
|
|
<description>Control Register</description>
|
|
<addressOffset>0x28</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "TIMER2INTCLR" -->
|
|
<register derivedFrom="TIMER1INTCLR">
|
|
<name>TIMER2INTCLR</name>
|
|
<description>Interrupt Clear Register</description>
|
|
<addressOffset>0x2C</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "TIMER2RIS" -->
|
|
<register derivedFrom="TIMER1RIS">
|
|
<name>TIMER2RIS</name>
|
|
<description>Interrupt Status Register</description>
|
|
<addressOffset>0x30</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "TIMER2MIS" -->
|
|
<register derivedFrom="TIMER1MIS">
|
|
<name>TIMER2MIS</name>
|
|
<description>Masked Interrupt Status Register</description>
|
|
<addressOffset>0x34</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "TIMER2BGLOAD" -->
|
|
<register derivedFrom="TIMER1BGLOAD">
|
|
<name>TIMER2BGLOAD</name>
|
|
<description>Background Load Register</description>
|
|
<addressOffset>0x38</addressOffset>
|
|
</register>
|
|
</registers>
|
|
</peripheral>
|
|
<!-- PERIPHERAL "MFT0" -->
|
|
<peripheral>
|
|
<name>MFT0</name>
|
|
<description>Multifunction Timer 0</description>
|
|
<groupName>MFT0</groupName>
|
|
<baseAddress>0x40020000</baseAddress>
|
|
<!-- ADDRESS BLOCK -->
|
|
<addressBlock>
|
|
<offset>0x102</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x106</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x10A</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x10E</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x112</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x116</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x118</offset>
|
|
<size>0x3</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x11C</offset>
|
|
<size>0x3</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x120</offset>
|
|
<size>0x3</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x125</offset>
|
|
<size>0x1</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x128</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x12C</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x130</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x134</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x138</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x13C</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x142</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x146</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x148</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x14E</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x152</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x154</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x15A</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x15E</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x160</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x164</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x168</offset>
|
|
<size>0x3</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x16C</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x170</offset>
|
|
<size>0x3</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x176</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x17A</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x17E</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x182</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x184</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x188</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x18E</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x190</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x196</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x198</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x19E</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x1A0</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x1A4</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x1A8</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x1AC</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x1B0</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x1B4</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x1BA</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x1BE</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x1C2</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x1C6</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x1CA</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x1CE</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x1D0</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x1D4</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x1D8</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x1DC</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x1E0</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x1E4</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x1E8</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<!-- INTERRUPT "WFG_DTIF" -->
|
|
<interrupt>
|
|
<name>WFG_DTIF</name>
|
|
<value>3</value>
|
|
</interrupt>
|
|
<!-- INTERRUPT "FRTIM" -->
|
|
<interrupt>
|
|
<name>FRTIM</name>
|
|
<value>28</value>
|
|
</interrupt>
|
|
<!-- INTERRUPT "INCAP" -->
|
|
<interrupt>
|
|
<name>INCAP</name>
|
|
<value>29</value>
|
|
</interrupt>
|
|
<!-- INTERRUPT "OUTCOMP" -->
|
|
<interrupt>
|
|
<name>OUTCOMP</name>
|
|
<value>30</value>
|
|
</interrupt>
|
|
<!-- REGISTERS -->
|
|
<registers>
|
|
<!-- REGISTER "FRT_TCCP0" -->
|
|
<register>
|
|
<name>FRT_TCCP0</name>
|
|
<description>FRT-ch.0 Cycle Setting Register</description>
|
|
<addressOffset>0x142</addressOffset>
|
|
<size>16</size>
|
|
<access>read-write</access>
|
|
<resetValue>0xFFFF</resetValue>
|
|
<resetMask>0xFFFF</resetMask>
|
|
</register>
|
|
<!-- REGISTER "FRT_TCDT0" -->
|
|
<register>
|
|
<name>FRT_TCDT0</name>
|
|
<description>FRT-ch.0 Count Value Register</description>
|
|
<addressOffset>0x146</addressOffset>
|
|
<size>16</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<resetMask>0xFFFF</resetMask>
|
|
</register>
|
|
<!-- REGISTER "FRT_TCSA0" -->
|
|
<register>
|
|
<name>FRT_TCSA0</name>
|
|
<description>FRT-ch.0 Control Register A</description>
|
|
<addressOffset>0x148</addressOffset>
|
|
<size>16</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0040</resetValue>
|
|
<resetMask>0xE3FF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "ECKE" -->
|
|
<field>
|
|
<name>ECKE</name>
|
|
<description>Uses an external input clock (FRCK) as FRT's count clock</description>
|
|
<lsb>15</lsb>
|
|
<msb>15</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "IRQZF" -->
|
|
<field>
|
|
<name>IRQZF</name>
|
|
<description>Zero interrupt flag</description>
|
|
<lsb>14</lsb>
|
|
<msb>14</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "IRQZE" -->
|
|
<field>
|
|
<name>IRQZE</name>
|
|
<description>Generates interrupt@ when "1" is set to TCSA.IRQZF</description>
|
|
<lsb>13</lsb>
|
|
<msb>13</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "ICLR" -->
|
|
<field>
|
|
<name>ICLR</name>
|
|
<description>Interrupt flag</description>
|
|
<lsb>9</lsb>
|
|
<msb>9</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "ICRE" -->
|
|
<field>
|
|
<name>ICRE</name>
|
|
<description>Generates interrupt when "1" is set to TCSA.ICLR</description>
|
|
<lsb>8</lsb>
|
|
<msb>8</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "BFE" -->
|
|
<field>
|
|
<name>BFE</name>
|
|
<description>Enables TCCP's buffer function</description>
|
|
<lsb>7</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "STOP" -->
|
|
<field>
|
|
<name>STOP</name>
|
|
<description>Puts FRT in stopping state</description>
|
|
<lsb>6</lsb>
|
|
<msb>6</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "MODE" -->
|
|
<field>
|
|
<name>MODE</name>
|
|
<description>FRT's count mode</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "SCLR" -->
|
|
<field>
|
|
<name>SCLR</name>
|
|
<description>FRT operation state initialization request</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>write-only</access>
|
|
</field>
|
|
<!-- FIELD "CLK" -->
|
|
<field>
|
|
<name>CLK</name>
|
|
<description>FRT clock cycle</description>
|
|
<lsb>0</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "FRT_TCSC0" -->
|
|
<register>
|
|
<name>FRT_TCSC0</name>
|
|
<description>FRT-ch.0 Control Register C</description>
|
|
<addressOffset>0x14A</addressOffset>
|
|
<size>16</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<resetMask>0xFFFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "MSPC" -->
|
|
<field>
|
|
<name>MSPC</name>
|
|
<description>Reads the current counter value from a Peak value detection mask counter</description>
|
|
<lsb>12</lsb>
|
|
<msb>15</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "MSZC" -->
|
|
<field>
|
|
<name>MSZC</name>
|
|
<description>Reads the current counter value from a Zero value detection mask counter</description>
|
|
<lsb>8</lsb>
|
|
<msb>11</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "MSPI" -->
|
|
<field>
|
|
<name>MSPI</name>
|
|
<description>Sets the number of masked Peak value detections</description>
|
|
<lsb>4</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "MSZI" -->
|
|
<field>
|
|
<name>MSZI</name>
|
|
<description>Sets the number of masked Zero value detections</description>
|
|
<lsb>0</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "FRT_TCCP1" -->
|
|
<register derivedFrom="FRT_TCCP0">
|
|
<name>FRT_TCCP1</name>
|
|
<description>FRT-ch.1 Cycle Setting Register</description>
|
|
<addressOffset>0x14E</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "FRT_TCDT1" -->
|
|
<register derivedFrom="FRT_TCDT0">
|
|
<name>FRT_TCDT1</name>
|
|
<description>FRT-ch.1 Count Value Register</description>
|
|
<addressOffset>0x152</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "FRT_TCSA1" -->
|
|
<register derivedFrom="FRT_TCSA0">
|
|
<name>FRT_TCSA1</name>
|
|
<description>FRT-ch.1 Control Register A</description>
|
|
<addressOffset>0x154</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "FRT_TCSC1" -->
|
|
<register derivedFrom="FRT_TCSC0">
|
|
<name>FRT_TCSC1</name>
|
|
<description>FRT-ch.1 Control Register C</description>
|
|
<addressOffset>0x156</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "FRT_TCCP2" -->
|
|
<register derivedFrom="FRT_TCCP0">
|
|
<name>FRT_TCCP2</name>
|
|
<description>FRT-ch.2 Cycle Setting Register</description>
|
|
<addressOffset>0x15A</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "FRT_TCDT2" -->
|
|
<register derivedFrom="FRT_TCDT0">
|
|
<name>FRT_TCDT2</name>
|
|
<description>FRT-ch.2 Count Value Register</description>
|
|
<addressOffset>0x15E</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "FRT_TCSA2" -->
|
|
<register derivedFrom="FRT_TCSA0">
|
|
<name>FRT_TCSA2</name>
|
|
<description>FRT-ch.2 Control Register A</description>
|
|
<addressOffset>0x160</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "FRT_TCSC2" -->
|
|
<register derivedFrom="FRT_TCSC0">
|
|
<name>FRT_TCSC2</name>
|
|
<description>FRT-ch.2 Control Register C</description>
|
|
<addressOffset>0x162</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "FRT_TCAL" -->
|
|
<register>
|
|
<name>FRT_TCAL</name>
|
|
<description>FRT Simultaneous Start Control Register</description>
|
|
<addressOffset>0x164</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000FFFF</resetValue>
|
|
<resetMask>0x01FF01FF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "SCLR22" -->
|
|
<field>
|
|
<name>SCLR22</name>
|
|
<description>Mirror register of the SCLR bit located in TCSA2 register of MFT-unit2</description>
|
|
<lsb>24</lsb>
|
|
<msb>24</msb>
|
|
<access>write-only</access>
|
|
</field>
|
|
<!-- FIELD "SCLR21" -->
|
|
<field>
|
|
<name>SCLR21</name>
|
|
<description>Mirror register of the SCLR bit located in TCSA1 register of MFT-unit2</description>
|
|
<lsb>23</lsb>
|
|
<msb>23</msb>
|
|
<access>write-only</access>
|
|
</field>
|
|
<!-- FIELD "SCLR20" -->
|
|
<field>
|
|
<name>SCLR20</name>
|
|
<description>Mirror register of the SCLR bit located in TCSA0 register of MFT-unit2</description>
|
|
<lsb>22</lsb>
|
|
<msb>22</msb>
|
|
<access>write-only</access>
|
|
</field>
|
|
<!-- FIELD "SCLR12" -->
|
|
<field>
|
|
<name>SCLR12</name>
|
|
<description>Mirror register of the SCLR bit located in TCSA2 register of MFT-unit1</description>
|
|
<lsb>21</lsb>
|
|
<msb>21</msb>
|
|
<access>write-only</access>
|
|
</field>
|
|
<!-- FIELD "SCLR11" -->
|
|
<field>
|
|
<name>SCLR11</name>
|
|
<description>Mirror register of the SCLR bit located in TCSA1 register of MFT-unit1</description>
|
|
<lsb>20</lsb>
|
|
<msb>20</msb>
|
|
<access>write-only</access>
|
|
</field>
|
|
<!-- FIELD "SCLR10" -->
|
|
<field>
|
|
<name>SCLR10</name>
|
|
<description>Mirror register of the SCLR bit located in TCSA0 register of MFT-unit1</description>
|
|
<lsb>19</lsb>
|
|
<msb>19</msb>
|
|
<access>write-only</access>
|
|
</field>
|
|
<!-- FIELD "SCLR02" -->
|
|
<field>
|
|
<name>SCLR02</name>
|
|
<description>Mirror register of the SCLR bit located in TCSA2 register of MFT-unit0</description>
|
|
<lsb>18</lsb>
|
|
<msb>18</msb>
|
|
<access>write-only</access>
|
|
</field>
|
|
<!-- FIELD "SCLR01" -->
|
|
<field>
|
|
<name>SCLR01</name>
|
|
<description>Mirror register of the SCLR bit located in TCSA1 register of MFT-unit0</description>
|
|
<lsb>17</lsb>
|
|
<msb>17</msb>
|
|
<access>write-only</access>
|
|
</field>
|
|
<!-- FIELD "SCLR00" -->
|
|
<field>
|
|
<name>SCLR00</name>
|
|
<description>Mirror register of the SCLR bit located in TCSA0 register of MFT-unit0</description>
|
|
<lsb>16</lsb>
|
|
<msb>16</msb>
|
|
<access>write-only</access>
|
|
</field>
|
|
<!-- FIELD "STOP22" -->
|
|
<field>
|
|
<name>STOP22</name>
|
|
<description>Mirror register of the STOP bit located in TCSA2 register of MFT-unit2</description>
|
|
<lsb>8</lsb>
|
|
<msb>8</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "STOP21" -->
|
|
<field>
|
|
<name>STOP21</name>
|
|
<description>Mirror register of the STOP bit located in TCSA1 register of MFT-unit2</description>
|
|
<lsb>7</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "STOP20" -->
|
|
<field>
|
|
<name>STOP20</name>
|
|
<description>Mirror register of the STOP bit located in TCSA0 register of MFT-unit2</description>
|
|
<lsb>6</lsb>
|
|
<msb>6</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "STOP12" -->
|
|
<field>
|
|
<name>STOP12</name>
|
|
<description>Mirror register of the STOP bit located in TCSA2 register of MFT-unit1</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "STOP11" -->
|
|
<field>
|
|
<name>STOP11</name>
|
|
<description>Mirror register of the STOP bit located in TCSA1 register of MFT-unit1</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "STOP10" -->
|
|
<field>
|
|
<name>STOP10</name>
|
|
<description>Mirror register of the STOP bit located in TCSA0 register of MFT-unit1</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "STOP02" -->
|
|
<field>
|
|
<name>STOP02</name>
|
|
<description>Mirror register of the STOP bit located in TCSA2 register of MFT-unit0</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "STOP01" -->
|
|
<field>
|
|
<name>STOP01</name>
|
|
<description>Mirror register of the STOP bit located in TCSA1 register of MFT-unit0</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "STOP00" -->
|
|
<field>
|
|
<name>STOP00</name>
|
|
<description>Mirror register of the STOP bit located in TCSA0 register of MFT-unit0</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "OCU_OCCP0" -->
|
|
<register>
|
|
<name>OCU_OCCP0</name>
|
|
<description>OCU ch.0 Compare Value Store Register</description>
|
|
<addressOffset>0x102</addressOffset>
|
|
<size>16</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<resetMask>0xFFFF</resetMask>
|
|
</register>
|
|
<!-- REGISTER "OCU_OCCP1" -->
|
|
<register derivedFrom="OCU_OCCP0">
|
|
<name>OCU_OCCP1</name>
|
|
<description>OCU ch.1 Compare Value Store Register</description>
|
|
<addressOffset>0x106</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "OCU_OCCP2" -->
|
|
<register derivedFrom="OCU_OCCP0">
|
|
<name>OCU_OCCP2</name>
|
|
<description>OCU ch.2 Compare Value Store Register</description>
|
|
<addressOffset>0x10A</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "OCU_OCCP3" -->
|
|
<register derivedFrom="OCU_OCCP0">
|
|
<name>OCU_OCCP3</name>
|
|
<description>OCU ch.3 Compare Value Store Register</description>
|
|
<addressOffset>0x10E</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "OCU_OCCP4" -->
|
|
<register derivedFrom="OCU_OCCP0">
|
|
<name>OCU_OCCP4</name>
|
|
<description>OCU ch.4 Compare Value Store Register</description>
|
|
<addressOffset>0x112</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "OCU_OCCP5" -->
|
|
<register derivedFrom="OCU_OCCP0">
|
|
<name>OCU_OCCP5</name>
|
|
<description>OCU ch.5 Compare Value Store Register</description>
|
|
<addressOffset>0x116</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "OCU_OCSA10" -->
|
|
<register>
|
|
<name>OCU_OCSA10</name>
|
|
<description>OCU ch.0/1 Control Register A</description>
|
|
<addressOffset>0x118</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0xF3</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "IOP1" -->
|
|
<field>
|
|
<name>IOP1</name>
|
|
<description>Indicates that a match has already been detected between FRT's count value and OCCP(1) value at OCU ch.(1).</description>
|
|
<lsb>7</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "IOP0" -->
|
|
<field>
|
|
<name>IOP0</name>
|
|
<description>Indicates that a match has already been detected between FRT's count value and OCCP(0) value at OCU ch.(0).</description>
|
|
<lsb>6</lsb>
|
|
<msb>6</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "IOE1" -->
|
|
<field>
|
|
<name>IOE1</name>
|
|
<description>Generates interrupt@ when "1" is set to OCSA.IOP1</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "IOE0" -->
|
|
<field>
|
|
<name>IOE0</name>
|
|
<description>Generates interrupt@ when "1" is set to OCSA.IOP0</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "CST1" -->
|
|
<field>
|
|
<name>CST1</name>
|
|
<description>Enables the operation of OCU ch.(1)</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "CST0" -->
|
|
<field>
|
|
<name>CST0</name>
|
|
<description>Enables the operation of OCU ch.(0)</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "OCU_OCSB10" -->
|
|
<register>
|
|
<name>OCU_OCSB10</name>
|
|
<description>OCU ch.0/1 Control Register B</description>
|
|
<addressOffset>0x119</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0x93</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "FM4" -->
|
|
<field>
|
|
<name>FM4</name>
|
|
<description>Selects FM4 mode for operating mode</description>
|
|
<lsb>7</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "CMOD" -->
|
|
<field>
|
|
<name>CMOD</name>
|
|
<description>Selects OCU's operation mode in combination with OCSC.MOD0 to MOD5</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "OTD1" -->
|
|
<field>
|
|
<name>OTD1</name>
|
|
<description>Indicates that the RT(1) output pin is in the High-level output state.</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "OTD0" -->
|
|
<field>
|
|
<name>OTD0</name>
|
|
<description>Indicates that the RT(0) output pin is in the High-level output state.</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "OCU_OCSD10" -->
|
|
<register>
|
|
<name>OCU_OCSD10</name>
|
|
<description>OCU ch.0/1 Control Register D</description>
|
|
<addressOffset>0x11A</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0xFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "OCSE1BUFE" -->
|
|
<field>
|
|
<name>OCSE1BUFE</name>
|
|
<description>Enable buffer register function of OCSE(1)</description>
|
|
<lsb>6</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "OCSE0BUFE" -->
|
|
<field>
|
|
<name>OCSE0BUFE</name>
|
|
<description>Enable buffer register function of OCSE(0)</description>
|
|
<lsb>4</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "OCCP1BUFE" -->
|
|
<field>
|
|
<name>OCCP1BUFE</name>
|
|
<description>Enable buffer register function of OCCP(1)</description>
|
|
<lsb>2</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "OCCP0BUFE" -->
|
|
<field>
|
|
<name>OCCP0BUFE</name>
|
|
<description>Enable buffer register function of OCCP(0)</description>
|
|
<lsb>0</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "OCU_OCSA32" -->
|
|
<register derivedFrom="OCU_OCSA10">
|
|
<name>OCU_OCSA32</name>
|
|
<description>OCU ch.2/3 Control Register A</description>
|
|
<addressOffset>0x11C</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "OCU_OCSB32" -->
|
|
<register derivedFrom="OCU_OCSB10">
|
|
<name>OCU_OCSB32</name>
|
|
<description>OCU ch.2/3 Control Register B</description>
|
|
<addressOffset>0x11D</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "OCU_OCSD32" -->
|
|
<register derivedFrom="OCU_OCSD10">
|
|
<name>OCU_OCSD32</name>
|
|
<description>OCU ch.2/3 Control Register D</description>
|
|
<addressOffset>0x11E</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "OCU_OCSA54" -->
|
|
<register derivedFrom="OCU_OCSA10">
|
|
<name>OCU_OCSA54</name>
|
|
<description>OCU ch.4/5 Control Register A</description>
|
|
<addressOffset>0x120</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "OCU_OCSB54" -->
|
|
<register derivedFrom="OCU_OCSB10">
|
|
<name>OCU_OCSB54</name>
|
|
<description>OCU ch.4/5 Control Register B</description>
|
|
<addressOffset>0x121</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "OCU_OCSD54" -->
|
|
<register derivedFrom="OCU_OCSD10">
|
|
<name>OCU_OCSD54</name>
|
|
<description>OCU ch.4/5 Control Register D</description>
|
|
<addressOffset>0x122</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "OCU_OCSC" -->
|
|
<register>
|
|
<name>OCU_OCSC</name>
|
|
<description>OCU Control Register C</description>
|
|
<addressOffset>0x125</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0x3F</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "MOD5" -->
|
|
<field>
|
|
<name>MOD5</name>
|
|
<description>OCSC.MOD4 and OCSC.MOD5 determine the operation mode of OCU ch.4/ch.5 in combination with OCSB54.CMOD</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "MOD4" -->
|
|
<field>
|
|
<name>MOD4</name>
|
|
<description>OCSC.MOD4 and OCSC.MOD5 determine the operation mode of OCU ch.4/ch.5 in combination with OCSB54.CMOD</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "MOD3" -->
|
|
<field>
|
|
<name>MOD3</name>
|
|
<description>OCSC.MOD2 and OCSC.MOD3 determine the operation mode of OCU ch.2/ch.3 in combination with OCSB32.CMOD</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "MOD2" -->
|
|
<field>
|
|
<name>MOD2</name>
|
|
<description>OCSC.MOD2 and OCSC.MOD3 determine the operation mode of OCU ch.2/ch.3 in combination with OCSB32.CMOD</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "MOD1" -->
|
|
<field>
|
|
<name>MOD1</name>
|
|
<description>OCSC.MOD0 and OCSC.MOD1 determine the operation mode of OCU ch.0/ch.1 in combination with OCSB10.CMOD</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "MOD0" -->
|
|
<field>
|
|
<name>MOD0</name>
|
|
<description>OCSC.MOD0 and OCSC.MOD1 determine the operation mode of OCU ch.0/ch.1 in combination with OCSB10.CMOD</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "OCU_OCSE0" -->
|
|
<register>
|
|
<name>OCU_OCSE0</name>
|
|
<description>OCU ch.0 Control Register E</description>
|
|
<addressOffset>0x128</addressOffset>
|
|
<size>16</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<resetMask>0xFFFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "OCSE" -->
|
|
<field>
|
|
<name>OCSE</name>
|
|
<description>Specify the setting conditions of the OCU's matching detection register (IOP0)</description>
|
|
<lsb>0</lsb>
|
|
<msb>15</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "OCU_OCSE1" -->
|
|
<register>
|
|
<name>OCU_OCSE1</name>
|
|
<description>OCU ch.1 Control Register E</description>
|
|
<addressOffset>0x12C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0xFFFFFFFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "OCSE" -->
|
|
<field>
|
|
<name>OCSE</name>
|
|
<description>Specify the setting conditions of the OCU's matching detection register (IOP0/IOP1)</description>
|
|
<lsb>0</lsb>
|
|
<msb>31</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "OCU_OCSE2" -->
|
|
<register derivedFrom="OCU_OCSE0">
|
|
<name>OCU_OCSE2</name>
|
|
<description>OCU ch.2 Control Register E</description>
|
|
<addressOffset>0x130</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "OCU_OCSE3" -->
|
|
<register derivedFrom="OCU_OCSE1">
|
|
<name>OCU_OCSE3</name>
|
|
<description>OCU ch.3 Control Register E</description>
|
|
<addressOffset>0x134</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "OCU_OCSE4" -->
|
|
<register derivedFrom="OCU_OCSE0">
|
|
<name>OCU_OCSE4</name>
|
|
<description>OCU ch.4 Control Register E</description>
|
|
<addressOffset>0x138</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "OCU_OCSE5" -->
|
|
<register derivedFrom="OCU_OCSE1">
|
|
<name>OCU_OCSE5</name>
|
|
<description>OCU ch.5 Control Register E</description>
|
|
<addressOffset>0x13C</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "OCU_OCFS10" -->
|
|
<register>
|
|
<name>OCU_OCFS10</name>
|
|
<description>OCU ch.0/1 Connecting FRT Select Register</description>
|
|
<addressOffset>0x168</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0xFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "FSO1" -->
|
|
<field>
|
|
<name>FSO1</name>
|
|
<description>Connects FRT ch.x to OCU ch.1</description>
|
|
<lsb>4</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "FSO0" -->
|
|
<field>
|
|
<name>FSO0</name>
|
|
<description>Connects FRT ch.x to OCU ch.0</description>
|
|
<lsb>0</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "OCU_OCFS32" -->
|
|
<register derivedFrom="OCU_OCFS10">
|
|
<name>OCU_OCFS32</name>
|
|
<description>OCU ch.2/3 Connecting FRT Select Register</description>
|
|
<addressOffset>0x169</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "OCU_OCFS54" -->
|
|
<register derivedFrom="OCU_OCFS10">
|
|
<name>OCU_OCFS54</name>
|
|
<description>OCU ch.4/5 Connecting FRT Select Register</description>
|
|
<addressOffset>0x16A</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "WFG_WFTF10" -->
|
|
<register>
|
|
<name>WFG_WFTF10</name>
|
|
<description>Pulse Counter Value Register for WFG ch.0/1</description>
|
|
<addressOffset>0x18E</addressOffset>
|
|
<size>16</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<resetMask>0xFFFF</resetMask>
|
|
</register>
|
|
<!-- REGISTER "WFG_WFTA10" -->
|
|
<register>
|
|
<name>WFG_WFTA10</name>
|
|
<description>WFG Timer Value Register for WFG ch.0/1</description>
|
|
<addressOffset>0x190</addressOffset>
|
|
<size>16</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<resetMask>0xFFFF</resetMask>
|
|
</register>
|
|
<!-- REGISTER "WFG_WFTB10" -->
|
|
<register>
|
|
<name>WFG_WFTB10</name>
|
|
<description>WFG Timer Value Register for WFG ch.0/1</description>
|
|
<addressOffset>0x192</addressOffset>
|
|
<size>16</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<resetMask>0xFFFF</resetMask>
|
|
</register>
|
|
<!-- REGISTER "WFG_WFTF32" -->
|
|
<register>
|
|
<name>WFG_WFTF32</name>
|
|
<description>Pulse Counter Value Register for WFG ch.2/3</description>
|
|
<addressOffset>0x196</addressOffset>
|
|
<size>16</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<resetMask>0xFFFF</resetMask>
|
|
</register>
|
|
<!-- REGISTER "WFG_WFTA32" -->
|
|
<register>
|
|
<name>WFG_WFTA32</name>
|
|
<description>WFG Timer Value Register for WFG ch.2/3</description>
|
|
<addressOffset>0x198</addressOffset>
|
|
<size>16</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<resetMask>0xFFFF</resetMask>
|
|
</register>
|
|
<!-- REGISTER "WFG_WFTB32" -->
|
|
<register>
|
|
<name>WFG_WFTB32</name>
|
|
<description>WFG Timer Value Register for WFG ch.2/3</description>
|
|
<addressOffset>0x19A</addressOffset>
|
|
<size>16</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<resetMask>0xFFFF</resetMask>
|
|
</register>
|
|
<!-- REGISTER "WFG_WFTF54" -->
|
|
<register>
|
|
<name>WFG_WFTF54</name>
|
|
<description>Pulse Counter Value Register for WFG ch.4/5</description>
|
|
<addressOffset>0x19E</addressOffset>
|
|
<size>16</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<resetMask>0xFFFF</resetMask>
|
|
</register>
|
|
<!-- REGISTER "WFG_WFTA54" -->
|
|
<register>
|
|
<name>WFG_WFTA54</name>
|
|
<description>WFG Timer Value Register for WFG ch.4/5</description>
|
|
<addressOffset>0x1A0</addressOffset>
|
|
<size>16</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<resetMask>0xFFFF</resetMask>
|
|
</register>
|
|
<!-- REGISTER "WFG_WFTB54" -->
|
|
<register>
|
|
<name>WFG_WFTB54</name>
|
|
<description>WFG Timer Value Register for WFG ch.4/5</description>
|
|
<addressOffset>0x1A2</addressOffset>
|
|
<size>16</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<resetMask>0xFFFF</resetMask>
|
|
</register>
|
|
<!-- REGISTER "WFG_WFSA10" -->
|
|
<register>
|
|
<name>WFG_WFSA10</name>
|
|
<description>WFG Control Register A for WFG ch.0/1</description>
|
|
<addressOffset>0x1A4</addressOffset>
|
|
<size>16</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<resetMask>0x3FFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "DMOD" -->
|
|
<field>
|
|
<name>DMOD</name>
|
|
<description>Specifies polarity for RTO(0) and RTO(1) signal outputs</description>
|
|
<lsb>12</lsb>
|
|
<msb>13</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "PGEN" -->
|
|
<field>
|
|
<name>PGEN</name>
|
|
<description>Specifies how to reflect the CH_PPG signal for each channel of the WFG</description>
|
|
<lsb>10</lsb>
|
|
<msb>11</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "PSEL" -->
|
|
<field>
|
|
<name>PSEL</name>
|
|
<description>Select the PPG timer unit to be used for each channel of the WFG</description>
|
|
<lsb>8</lsb>
|
|
<msb>9</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "GTEN" -->
|
|
<field>
|
|
<name>GTEN</name>
|
|
<description>Selects the output conditions for the CH_GATE output signal of the WFG</description>
|
|
<lsb>6</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TMD" -->
|
|
<field>
|
|
<name>TMD</name>
|
|
<description>Select the WFG's operation mode</description>
|
|
<lsb>3</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "DCK" -->
|
|
<field>
|
|
<name>DCK</name>
|
|
<description>Set the count clock cycle for the WFG timer and Pulse counter</description>
|
|
<lsb>0</lsb>
|
|
<msb>2</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "WFG_WFSA32" -->
|
|
<register derivedFrom="WFG_WFSA10">
|
|
<name>WFG_WFSA32</name>
|
|
<description>WFG Control Register A for WFG ch.2/3</description>
|
|
<addressOffset>0x1A8</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "WFG_WFSA54" -->
|
|
<register derivedFrom="WFG_WFSA10">
|
|
<name>WFG_WFSA54</name>
|
|
<description>WFG Control Register A for WFG ch.4/5</description>
|
|
<addressOffset>0x1AC</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "WFG_WFIR" -->
|
|
<register>
|
|
<name>WFG_WFIR</name>
|
|
<description>WFG Interrupt Control Register</description>
|
|
<addressOffset>0x1B0</addressOffset>
|
|
<size>16</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<resetMask>0xFFFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "TMIS54" -->
|
|
<field>
|
|
<name>TMIS54</name>
|
|
<description>Stops the WFG54 reload timer and clears TMIF54</description>
|
|
<lsb>15</lsb>
|
|
<msb>15</msb>
|
|
<access>write-only</access>
|
|
</field>
|
|
<!-- FIELD "TMIE54" -->
|
|
<field>
|
|
<name>TMIE54</name>
|
|
<description>Starts WFG54 reload timer and checks the operation state of it</description>
|
|
<lsb>14</lsb>
|
|
<msb>14</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TMIC54" -->
|
|
<field>
|
|
<name>TMIC54</name>
|
|
<description>Clears TIMF54 bit</description>
|
|
<lsb>13</lsb>
|
|
<msb>13</msb>
|
|
<access>write-only</access>
|
|
</field>
|
|
<!-- FIELD "TMIF54" -->
|
|
<field>
|
|
<name>TMIF54</name>
|
|
<description>Detects the event of WFG54 reload timer interrupt occurrence</description>
|
|
<lsb>12</lsb>
|
|
<msb>12</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "TMIS32" -->
|
|
<field>
|
|
<name>TMIS32</name>
|
|
<description>Stops the WFG32 reload timer and clears TMIF32</description>
|
|
<lsb>11</lsb>
|
|
<msb>11</msb>
|
|
<access>write-only</access>
|
|
</field>
|
|
<!-- FIELD "TMIE32" -->
|
|
<field>
|
|
<name>TMIE32</name>
|
|
<description>Starts WFG32 reload timer and checks the operation state of it</description>
|
|
<lsb>10</lsb>
|
|
<msb>10</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TMIC32" -->
|
|
<field>
|
|
<name>TMIC32</name>
|
|
<description>Clears TIMF32 bit</description>
|
|
<lsb>9</lsb>
|
|
<msb>9</msb>
|
|
<access>write-only</access>
|
|
</field>
|
|
<!-- FIELD "TMIF32" -->
|
|
<field>
|
|
<name>TMIF32</name>
|
|
<description>Detects the event of WFG32 reload timer interrupt occurrence</description>
|
|
<lsb>8</lsb>
|
|
<msb>8</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "TMIS10" -->
|
|
<field>
|
|
<name>TMIS10</name>
|
|
<description>Stops the WFG10 reload timer and clears TMIF10</description>
|
|
<lsb>7</lsb>
|
|
<msb>7</msb>
|
|
<access>write-only</access>
|
|
</field>
|
|
<!-- FIELD "TMIE10" -->
|
|
<field>
|
|
<name>TMIE10</name>
|
|
<description>Starts WFG10 reload timer and checks the operation state of it</description>
|
|
<lsb>6</lsb>
|
|
<msb>6</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TMIC10" -->
|
|
<field>
|
|
<name>TMIC10</name>
|
|
<description>Clears TIMF10 bit</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>write-only</access>
|
|
</field>
|
|
<!-- FIELD "TMIF10" -->
|
|
<field>
|
|
<name>TMIF10</name>
|
|
<description>Detects the event of WFG10 reload timer interrupt occurrence</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "DTICB" -->
|
|
<field>
|
|
<name>DTICB</name>
|
|
<description>Clears DTIFB bit</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>write-only</access>
|
|
</field>
|
|
<!-- FIELD "DTIFB" -->
|
|
<field>
|
|
<name>DTIFB</name>
|
|
<description>Detects DTTIX signal input via analog noise filter</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "DTICA" -->
|
|
<field>
|
|
<name>DTICA</name>
|
|
<description>Clears the DTIFA interrupt flag</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>write-only</access>
|
|
</field>
|
|
<!-- FIELD "DTIFA" -->
|
|
<field>
|
|
<name>DTIFA</name>
|
|
<description>Detects the event of DTTIX signal input via digital noise-canceller</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "WFG_NZCL" -->
|
|
<register>
|
|
<name>WFG_NZCL</name>
|
|
<description>NZCL Control Register</description>
|
|
<addressOffset>0x1B4</addressOffset>
|
|
<size>16</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<resetMask>0x733F</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "WIM54" -->
|
|
<field>
|
|
<name>WIM54</name>
|
|
<description>Selects whether a WFG54 reload timer interrupt is masked when the WFIR.TMIF54 flag is set</description>
|
|
<lsb>14</lsb>
|
|
<msb>14</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "WIM32" -->
|
|
<field>
|
|
<name>WIM32</name>
|
|
<description>Selects whether a WFG32 reload timer interrupt is masked when the WFIR.TMIF32 flag is set</description>
|
|
<lsb>13</lsb>
|
|
<msb>13</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "WIM10" -->
|
|
<field>
|
|
<name>WIM10</name>
|
|
<description>Selects whether a WFG10 reload timer interrupt is masked when the WFIR.TMIF10 flag is set</description>
|
|
<lsb>12</lsb>
|
|
<msb>12</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "DIMB" -->
|
|
<field>
|
|
<name>DIMB</name>
|
|
<description>Selects whether a DTIF interrupt is masked when the WFIR.TIFDTIFB flag is set</description>
|
|
<lsb>9</lsb>
|
|
<msb>9</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "DIMA" -->
|
|
<field>
|
|
<name>DIMA</name>
|
|
<description>Selects whether a DTIF interrupt is masked when the WFIR.DTIFA flag is set</description>
|
|
<lsb>8</lsb>
|
|
<msb>8</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "DTIEB" -->
|
|
<field>
|
|
<name>DTIEB</name>
|
|
<description>Selects whether to set the WFIR.DTIFB flag for the path from the DTTIX pin for input signal to an analog noise filter</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "SDTI" -->
|
|
<field>
|
|
<name>SDTI</name>
|
|
<description>Sets the WFIR.DTIFA register by writing to the register from the CPU</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>write-only</access>
|
|
</field>
|
|
<!-- FIELD "NWS" -->
|
|
<field>
|
|
<name>NWS</name>
|
|
<description>Set the noise-canceling width for a digital noise-canceller</description>
|
|
<lsb>1</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "DTIEA" -->
|
|
<field>
|
|
<name>DTIEA</name>
|
|
<description>Selects whether the WFIR.DTIFA register is set for the path via digital noise filter from the DTTIX input pin</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "ICU_ICFS10" -->
|
|
<register>
|
|
<name>ICU_ICFS10</name>
|
|
<description>ICU ch.0/1 Connecting FRT Select Register</description>
|
|
<addressOffset>0x16C</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0xFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "FSI1" -->
|
|
<field>
|
|
<name>FSI1</name>
|
|
<description>Connects FRT ch.x to ICU ch.(1)</description>
|
|
<lsb>4</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "FSI0" -->
|
|
<field>
|
|
<name>FSI0</name>
|
|
<description>Connects FRT ch.x to ICU ch.(0)</description>
|
|
<lsb>0</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "ICU_ICFS32" -->
|
|
<register derivedFrom="ICU_ICFS10">
|
|
<name>ICU_ICFS32</name>
|
|
<description>ICU ch.2/3 Connecting FRT Select Register</description>
|
|
<addressOffset>0x16D</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "ICU_ICCP0" -->
|
|
<register>
|
|
<name>ICU_ICCP0</name>
|
|
<description>ICU-ch.0 Capture Value Store Register</description>
|
|
<addressOffset>0x176</addressOffset>
|
|
<size>16</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<resetMask>0xFFFF</resetMask>
|
|
</register>
|
|
<!-- REGISTER "ICU_ICCP1" -->
|
|
<register derivedFrom="ICU_ICCP0">
|
|
<name>ICU_ICCP1</name>
|
|
<description>ICU-ch.1 Capture Value Store Register</description>
|
|
<addressOffset>0x17A</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "ICU_ICCP2" -->
|
|
<register derivedFrom="ICU_ICCP0">
|
|
<name>ICU_ICCP2</name>
|
|
<description>ICU-ch.2 Capture Value Store Register</description>
|
|
<addressOffset>0x17E</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "ICU_ICCP3" -->
|
|
<register derivedFrom="ICU_ICCP0">
|
|
<name>ICU_ICCP3</name>
|
|
<description>ICU-ch.3 Capture Value Store Register</description>
|
|
<addressOffset>0x182</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "ICU_ICSA10" -->
|
|
<register>
|
|
<name>ICU_ICSA10</name>
|
|
<description>ICU ch.0/1 Control Register A</description>
|
|
<addressOffset>0x184</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0xFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "ICP1" -->
|
|
<field>
|
|
<name>ICP1</name>
|
|
<description>Indicates that a valid edge has been detected at ICU ch.(1) and the capture operation has been performed</description>
|
|
<lsb>7</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "ICP0" -->
|
|
<field>
|
|
<name>ICP0</name>
|
|
<description>Indicates that a valid edge has been detected at ICU ch.(0) and the capture operation has been performed</description>
|
|
<lsb>6</lsb>
|
|
<msb>6</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "ICE1" -->
|
|
<field>
|
|
<name>ICE1</name>
|
|
<description>Generates interrupt@ when "1" is set to ICSA.ICP1.</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "ICE0" -->
|
|
<field>
|
|
<name>ICE0</name>
|
|
<description>Generates interrupt@ when "1" is set to ICSA.ICP0.</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "EG1" -->
|
|
<field>
|
|
<name>EG1</name>
|
|
<description>Enables/disables the operation of ICU-ch.(1) and selects a valid edge(s)</description>
|
|
<lsb>2</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "EG0" -->
|
|
<field>
|
|
<name>EG0</name>
|
|
<description>Enables/disables the operation of ICU-ch.(0) and selects a valid edge(s)</description>
|
|
<lsb>0</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "ICU_ICSB10" -->
|
|
<register>
|
|
<name>ICU_ICSB10</name>
|
|
<description>ICU ch.0/1 Control Register B</description>
|
|
<addressOffset>0x185</addressOffset>
|
|
<size>8</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0x03</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "IEI1" -->
|
|
<field>
|
|
<name>IEI1</name>
|
|
<description>Indicates the latest valid edge of ICU ch.(1)</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "IEI0" -->
|
|
<field>
|
|
<name>IEI0</name>
|
|
<description>Indicates the latest valid edge of ICU ch.(0)</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "ICU_ICSA32" -->
|
|
<register derivedFrom="ICU_ICSA10">
|
|
<name>ICU_ICSA32</name>
|
|
<description>ICU ch.2/3 Control Register A</description>
|
|
<addressOffset>0x188</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "ICU_ICSB32" -->
|
|
<register derivedFrom="ICU_ICSB10">
|
|
<name>ICU_ICSB32</name>
|
|
<description>ICU ch.2/3 Control Register B</description>
|
|
<addressOffset>0x189</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "ADCMP_ACFS10" -->
|
|
<register>
|
|
<name>ADCMP_ACFS10</name>
|
|
<description>ADCMP ch.0/1 Connecting FRT Select Register</description>
|
|
<addressOffset>0x170</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0xFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "FSA1" -->
|
|
<field>
|
|
<name>FSA1</name>
|
|
<description>Specify the FRT to be connected to ADCMP ch.(1)</description>
|
|
<lsb>4</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "FSA0" -->
|
|
<field>
|
|
<name>FSA0</name>
|
|
<description>Specify the FRT to be connected to ADCMP ch.(0)</description>
|
|
<lsb>0</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "ADCMP_ACFS32" -->
|
|
<register derivedFrom="ADCMP_ACFS10">
|
|
<name>ADCMP_ACFS32</name>
|
|
<description>ADCMP ch.2/3 Connecting FRT Select Register</description>
|
|
<addressOffset>0x171</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "ADCMP_ACFS54" -->
|
|
<register derivedFrom="ADCMP_ACFS10">
|
|
<name>ADCMP_ACFS54</name>
|
|
<description>ADCMP ch.4/5 Connecting FRT Select Register</description>
|
|
<addressOffset>0x172</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "ADCMP_ACMP0" -->
|
|
<register>
|
|
<name>ADCMP_ACMP0</name>
|
|
<description>ADCMP ch.0 Compare Value Store Register</description>
|
|
<addressOffset>0x1BA</addressOffset>
|
|
<size>16</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<resetMask>0xFFFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "ACMP" -->
|
|
<field>
|
|
<name>ACMP</name>
|
|
<description>Specifies an AD conversion start time</description>
|
|
<lsb>0</lsb>
|
|
<msb>15</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "ADCMP_ACMP1" -->
|
|
<register derivedFrom="ADCMP_ACMP0">
|
|
<name>ADCMP_ACMP1</name>
|
|
<description>ADCMP ch.1 Compare Value Store Register</description>
|
|
<addressOffset>0x1BE</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "ADCMP_ACMP2" -->
|
|
<register derivedFrom="ADCMP_ACMP0">
|
|
<name>ADCMP_ACMP2</name>
|
|
<description>ADCMP ch.2 Compare Value Store Register</description>
|
|
<addressOffset>0x1C2</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "ADCMP_ACMP3" -->
|
|
<register derivedFrom="ADCMP_ACMP0">
|
|
<name>ADCMP_ACMP3</name>
|
|
<description>ADCMP ch.3 Compare Value Store Register</description>
|
|
<addressOffset>0x1C6</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "ADCMP_ACMP4" -->
|
|
<register derivedFrom="ADCMP_ACMP0">
|
|
<name>ADCMP_ACMP4</name>
|
|
<description>ADCMP ch.4 Compare Value Store Register</description>
|
|
<addressOffset>0x1CA</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "ADCMP_ACMP5" -->
|
|
<register derivedFrom="ADCMP_ACMP0">
|
|
<name>ADCMP_ACMP5</name>
|
|
<description>ADCMP ch.5 Compare Value Store Register</description>
|
|
<addressOffset>0x1CE</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "ADCMP_ACSA" -->
|
|
<register>
|
|
<name>ADCMP_ACSA</name>
|
|
<description>ADCMP Control Register A</description>
|
|
<addressOffset>0x1D0</addressOffset>
|
|
<size>16</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<resetMask>0x3F3F</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "SEL54" -->
|
|
<field>
|
|
<name>SEL54</name>
|
|
<description>Selects compatible operation of ADCMP ch.5 and ch.4 with FM3 Family products</description>
|
|
<lsb>12</lsb>
|
|
<msb>13</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "SEL32" -->
|
|
<field>
|
|
<name>SEL32</name>
|
|
<description>Selects compatible operation of ADCMP ch.3 and ch.2 with FM3 Family products</description>
|
|
<lsb>10</lsb>
|
|
<msb>11</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "SEL10" -->
|
|
<field>
|
|
<name>SEL10</name>
|
|
<description>Selects compatible operation of ADCMP ch.1 and ch.0 with FM3 Family products</description>
|
|
<lsb>8</lsb>
|
|
<msb>9</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "CE54" -->
|
|
<field>
|
|
<name>CE54</name>
|
|
<description>Enables/disables compatibility of ADCMP ch.5 and ch.4 with FM3 Family products</description>
|
|
<lsb>4</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "CE32" -->
|
|
<field>
|
|
<name>CE32</name>
|
|
<description>Enables/disables compatibility of ADCMP ch.3 and ch.2 with FM3 Family products</description>
|
|
<lsb>2</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "CE10" -->
|
|
<field>
|
|
<name>CE10</name>
|
|
<description>Enables/disables compatibility of ADCMP ch.1 and ch.0 with FM3 Family products</description>
|
|
<lsb>0</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "ADCMP_ACSC0" -->
|
|
<register>
|
|
<name>ADCMP_ACSC0</name>
|
|
<description>ADCMP ch.0 Control Register C</description>
|
|
<addressOffset>0x1D4</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0x1F</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "ADSEL" -->
|
|
<field>
|
|
<name>ADSEL</name>
|
|
<description>Specify the destinations of ADC start signals that are output by ADCMP</description>
|
|
<lsb>2</lsb>
|
|
<msb>4</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "BUFE" -->
|
|
<field>
|
|
<name>BUFE</name>
|
|
<description>Select enable/disable and transfer timing for buffer function of the ACMP register</description>
|
|
<lsb>0</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "ADCMP_ACSD0" -->
|
|
<register>
|
|
<name>ADCMP_ACSD0</name>
|
|
<description>ADCMP ch.0 Control Register D</description>
|
|
<addressOffset>0x1D5</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0xF3</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "ZE" -->
|
|
<field>
|
|
<name>ZE</name>
|
|
<description>Enables/disables the operation of the ADCMP when the FRT is "0x0000"</description>
|
|
<lsb>7</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "UE" -->
|
|
<field>
|
|
<name>UE</name>
|
|
<description>Enables/disables the operation of the ADCMP that is counting up for the connected FRT</description>
|
|
<lsb>6</lsb>
|
|
<msb>6</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "PE" -->
|
|
<field>
|
|
<name>PE</name>
|
|
<description>Enables/disables the operation of the ADCMP that is counting down at the Peak value of the connected FRT</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "DE" -->
|
|
<field>
|
|
<name>DE</name>
|
|
<description>Enables/disables the operation of the ADCMP that is counting down for the connected FRT</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "OCUS" -->
|
|
<field>
|
|
<name>OCUS</name>
|
|
<description>Selects the OCU OCCP register that will become the start for offset start</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "AMOD" -->
|
|
<field>
|
|
<name>AMOD</name>
|
|
<description>Selects operation mode for ADCMP</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "ADCMP_ACSC1" -->
|
|
<register derivedFrom="ADCMP_ACSC0">
|
|
<name>ADCMP_ACSC1</name>
|
|
<description>ADCMP ch.1 Control Register C</description>
|
|
<addressOffset>0x1D8</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "ADCMP_ACSD1" -->
|
|
<register derivedFrom="ADCMP_ACSD0">
|
|
<name>ADCMP_ACSD1</name>
|
|
<description>ADCMP ch.1 Control Register D</description>
|
|
<addressOffset>0x1D9</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "ADCMP_ACSC2" -->
|
|
<register derivedFrom="ADCMP_ACSC0">
|
|
<name>ADCMP_ACSC2</name>
|
|
<description>ADCMP ch.2 Control Register C</description>
|
|
<addressOffset>0x1DC</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "ADCMP_ACSD2" -->
|
|
<register derivedFrom="ADCMP_ACSD0">
|
|
<name>ADCMP_ACSD2</name>
|
|
<description>ADCMP ch.2 Control Register D</description>
|
|
<addressOffset>0x1DD</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "ADCMP_ACSC3" -->
|
|
<register derivedFrom="ADCMP_ACSC0">
|
|
<name>ADCMP_ACSC3</name>
|
|
<description>ADCMP ch.3 Control Register C</description>
|
|
<addressOffset>0x1E0</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "ADCMP_ACSD3" -->
|
|
<register derivedFrom="ADCMP_ACSD0">
|
|
<name>ADCMP_ACSD3</name>
|
|
<description>ADCMP ch.3 Control Register D</description>
|
|
<addressOffset>0x1E1</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "ADCMP_ACSC4" -->
|
|
<register derivedFrom="ADCMP_ACSC0">
|
|
<name>ADCMP_ACSC4</name>
|
|
<description>ADCMP ch.4 Control Register C</description>
|
|
<addressOffset>0x1E4</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "ADCMP_ACSD4" -->
|
|
<register derivedFrom="ADCMP_ACSD0">
|
|
<name>ADCMP_ACSD4</name>
|
|
<description>ADCMP ch.4 Control Register D</description>
|
|
<addressOffset>0x1E5</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "ADCMP_ACSC5" -->
|
|
<register derivedFrom="ADCMP_ACSC0">
|
|
<name>ADCMP_ACSC5</name>
|
|
<description>ADCMP ch.5 Control Register C</description>
|
|
<addressOffset>0x1E8</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "ADCMP_ACSD5" -->
|
|
<register derivedFrom="ADCMP_ACSD0">
|
|
<name>ADCMP_ACSD5</name>
|
|
<description>ADCMP ch.5 Control Register D</description>
|
|
<addressOffset>0x1E9</addressOffset>
|
|
</register>
|
|
</registers>
|
|
</peripheral>
|
|
<!-- PERIPHERAL "MFT_PPG" -->
|
|
<peripheral>
|
|
<name>MFT_PPG</name>
|
|
<description>PPG Configuration Registers</description>
|
|
<groupName>MFT_PPG</groupName>
|
|
<baseAddress>0x40024000</baseAddress>
|
|
<!-- ADDRESS BLOCK -->
|
|
<addressBlock>
|
|
<offset>0x0</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x8</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0xC</offset>
|
|
<size>0x1</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x10</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x14</offset>
|
|
<size>0x1</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x20</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x28</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x2C</offset>
|
|
<size>0x1</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x30</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x34</offset>
|
|
<size>0x1</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x40</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x48</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x4C</offset>
|
|
<size>0x1</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x50</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x54</offset>
|
|
<size>0x1</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x100</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x104</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x140</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x144</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x200</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x204</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x208</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x20C</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x210</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x214</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x218</offset>
|
|
<size>0x1</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x240</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x244</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x248</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x24C</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x250</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x254</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x258</offset>
|
|
<size>0x1</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x280</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x284</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x288</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x28C</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x290</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x294</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x298</offset>
|
|
<size>0x1</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x2C0</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x2C4</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x2C8</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x2CC</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x2D0</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x2D4</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x2D8</offset>
|
|
<size>0x1</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x300</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x304</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x308</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x30C</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x310</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x314</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x318</offset>
|
|
<size>0x1</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x340</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x344</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x348</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x34C</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x350</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x354</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x358</offset>
|
|
<size>0x1</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x380</offset>
|
|
<size>0x1</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<!-- INTERRUPT "PPG" -->
|
|
<interrupt>
|
|
<name>PPG</name>
|
|
<value>23</value>
|
|
</interrupt>
|
|
<!-- REGISTERS -->
|
|
<registers>
|
|
<!-- REGISTER "TTCR0" -->
|
|
<register>
|
|
<name>TTCR0</name>
|
|
<description>PPG Start Trigger Control Register 0</description>
|
|
<addressOffset>0x0</addressOffset>
|
|
<size>16</size>
|
|
<access>read-write</access>
|
|
<resetValue>0xF000</resetValue>
|
|
<resetMask>0xFF00</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "TRG6O" -->
|
|
<field>
|
|
<name>TRG6O</name>
|
|
<description>PPG6 trigger stop bit</description>
|
|
<lsb>15</lsb>
|
|
<msb>15</msb>
|
|
<access>write-only</access>
|
|
</field>
|
|
<!-- FIELD "TRG4O" -->
|
|
<field>
|
|
<name>TRG4O</name>
|
|
<description>PPG4 trigger stop bit</description>
|
|
<lsb>14</lsb>
|
|
<msb>14</msb>
|
|
<access>write-only</access>
|
|
</field>
|
|
<!-- FIELD "TRG2O" -->
|
|
<field>
|
|
<name>TRG2O</name>
|
|
<description>PPG2 trigger stop bit</description>
|
|
<lsb>13</lsb>
|
|
<msb>13</msb>
|
|
<access>write-only</access>
|
|
</field>
|
|
<!-- FIELD "TRG0O" -->
|
|
<field>
|
|
<name>TRG0O</name>
|
|
<description>PPG0 trigger stop bit</description>
|
|
<lsb>12</lsb>
|
|
<msb>12</msb>
|
|
<access>write-only</access>
|
|
</field>
|
|
<!-- FIELD "CS0" -->
|
|
<field>
|
|
<name>CS0</name>
|
|
<description>8-bit UP counter clock select bits for comparison</description>
|
|
<lsb>10</lsb>
|
|
<msb>11</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "MONI0" -->
|
|
<field>
|
|
<name>MONI0</name>
|
|
<description>8-bit UP counter operation state monitor bit for comparison</description>
|
|
<lsb>9</lsb>
|
|
<msb>9</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "STR0" -->
|
|
<field>
|
|
<name>STR0</name>
|
|
<description>8-bit UP counter operation enable bit for comparison</description>
|
|
<lsb>8</lsb>
|
|
<msb>8</msb>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "TTCR1" -->
|
|
<register>
|
|
<name>TTCR1</name>
|
|
<description>PPG Start Trigger Control Register 1</description>
|
|
<addressOffset>0x20</addressOffset>
|
|
<size>16</size>
|
|
<access>read-write</access>
|
|
<resetValue>0xF000</resetValue>
|
|
<resetMask>0xFF00</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "TRG7O" -->
|
|
<field>
|
|
<name>TRG7O</name>
|
|
<description>PPG7 trigger stop bit</description>
|
|
<lsb>15</lsb>
|
|
<msb>15</msb>
|
|
<access>write-only</access>
|
|
</field>
|
|
<!-- FIELD "TRG5O" -->
|
|
<field>
|
|
<name>TRG5O</name>
|
|
<description>PPG5 trigger stop bit</description>
|
|
<lsb>14</lsb>
|
|
<msb>14</msb>
|
|
<access>write-only</access>
|
|
</field>
|
|
<!-- FIELD "TRG3O" -->
|
|
<field>
|
|
<name>TRG3O</name>
|
|
<description>PPG3 trigger stop bit</description>
|
|
<lsb>13</lsb>
|
|
<msb>13</msb>
|
|
<access>write-only</access>
|
|
</field>
|
|
<!-- FIELD "TRG1O" -->
|
|
<field>
|
|
<name>TRG1O</name>
|
|
<description>PPG1 trigger stop bit</description>
|
|
<lsb>12</lsb>
|
|
<msb>12</msb>
|
|
<access>write-only</access>
|
|
</field>
|
|
<!-- FIELD "CS1" -->
|
|
<field>
|
|
<name>CS1</name>
|
|
<description>8-bit UP counter clock select bits for comparison</description>
|
|
<lsb>10</lsb>
|
|
<msb>11</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "MONI1" -->
|
|
<field>
|
|
<name>MONI1</name>
|
|
<description>8-bit UP counter operation state monitor bit for comparison</description>
|
|
<lsb>9</lsb>
|
|
<msb>9</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "STR1" -->
|
|
<field>
|
|
<name>STR1</name>
|
|
<description>8-bit UP counter operation enable bit for comparison</description>
|
|
<lsb>8</lsb>
|
|
<msb>8</msb>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "TTCR2" -->
|
|
<register>
|
|
<name>TTCR2</name>
|
|
<description>PPG Start Trigger Control Register 2</description>
|
|
<addressOffset>0x40</addressOffset>
|
|
<size>16</size>
|
|
<access>read-write</access>
|
|
<resetValue>0xF000</resetValue>
|
|
<resetMask>0xFF00</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "TRG22O" -->
|
|
<field>
|
|
<name>TRG22O</name>
|
|
<description>PPG22 trigger stop bit</description>
|
|
<lsb>15</lsb>
|
|
<msb>15</msb>
|
|
<access>write-only</access>
|
|
</field>
|
|
<!-- FIELD "TRG20O" -->
|
|
<field>
|
|
<name>TRG20O</name>
|
|
<description>PPG20 trigger stop bit</description>
|
|
<lsb>14</lsb>
|
|
<msb>14</msb>
|
|
<access>write-only</access>
|
|
</field>
|
|
<!-- FIELD "TRG18O" -->
|
|
<field>
|
|
<name>TRG18O</name>
|
|
<description>PPG18 trigger stop bit</description>
|
|
<lsb>13</lsb>
|
|
<msb>13</msb>
|
|
<access>write-only</access>
|
|
</field>
|
|
<!-- FIELD "TRG16O" -->
|
|
<field>
|
|
<name>TRG16O</name>
|
|
<description>PPG16 trigger stop bit</description>
|
|
<lsb>12</lsb>
|
|
<msb>12</msb>
|
|
<access>write-only</access>
|
|
</field>
|
|
<!-- FIELD "CS2" -->
|
|
<field>
|
|
<name>CS2</name>
|
|
<description>8-bit UP counter clock select bits for comparison</description>
|
|
<lsb>10</lsb>
|
|
<msb>11</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "MONI2" -->
|
|
<field>
|
|
<name>MONI2</name>
|
|
<description>8-bit UP counter operation state monitor bit for comparison</description>
|
|
<lsb>9</lsb>
|
|
<msb>9</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "STR2" -->
|
|
<field>
|
|
<name>STR2</name>
|
|
<description>8-bit UP counter operation enable bit for comparison</description>
|
|
<lsb>8</lsb>
|
|
<msb>8</msb>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "COMP0" -->
|
|
<register>
|
|
<name>COMP0</name>
|
|
<description>PPG Compare Register 0</description>
|
|
<addressOffset>0x9</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0xFF</resetMask>
|
|
</register>
|
|
<!-- REGISTER "COMP2" -->
|
|
<register>
|
|
<name>COMP2</name>
|
|
<description>PPG Compare Register 2</description>
|
|
<addressOffset>0xC</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0xFF</resetMask>
|
|
</register>
|
|
<!-- REGISTER "COMP4" -->
|
|
<register derivedFrom="COMP0">
|
|
<name>COMP4</name>
|
|
<description>PPG Compare Register 4</description>
|
|
<addressOffset>0x11</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "COMP6" -->
|
|
<register derivedFrom="COMP2">
|
|
<name>COMP6</name>
|
|
<description>PPG Compare Register 6</description>
|
|
<addressOffset>0x14</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "COMP1" -->
|
|
<register derivedFrom="COMP0">
|
|
<name>COMP1</name>
|
|
<description>PPG Compare Register 1</description>
|
|
<addressOffset>0x29</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "COMP3" -->
|
|
<register derivedFrom="COMP2">
|
|
<name>COMP3</name>
|
|
<description>PPG Compare Register 3</description>
|
|
<addressOffset>0x2C</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "COMP5" -->
|
|
<register derivedFrom="COMP0">
|
|
<name>COMP5</name>
|
|
<description>PPG Compare Register 5</description>
|
|
<addressOffset>0x31</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "COMP7" -->
|
|
<register derivedFrom="COMP2">
|
|
<name>COMP7</name>
|
|
<description>PPG Compare Register 7</description>
|
|
<addressOffset>0x34</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "COMP8" -->
|
|
<register derivedFrom="COMP0">
|
|
<name>COMP8</name>
|
|
<description>PPG Compare Register 8</description>
|
|
<addressOffset>0x49</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "COMP10" -->
|
|
<register derivedFrom="COMP2">
|
|
<name>COMP10</name>
|
|
<description>PPG Compare Register 10</description>
|
|
<addressOffset>0x4C</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "COMP12" -->
|
|
<register derivedFrom="COMP0">
|
|
<name>COMP12</name>
|
|
<description>PPG Compare Register 12</description>
|
|
<addressOffset>0x51</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "COMP14" -->
|
|
<register derivedFrom="COMP2">
|
|
<name>COMP14</name>
|
|
<description>PPG Compare Register 14</description>
|
|
<addressOffset>0x54</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "TRG0" -->
|
|
<register>
|
|
<name>TRG0</name>
|
|
<description>PPG Start Register 0</description>
|
|
<addressOffset>0x100</addressOffset>
|
|
<size>16</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<resetMask>0xFFFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "PEN15" -->
|
|
<field>
|
|
<name>PEN15</name>
|
|
<description>PPG15 Start Trigger bit</description>
|
|
<lsb>15</lsb>
|
|
<msb>15</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "PEN14" -->
|
|
<field>
|
|
<name>PEN14</name>
|
|
<description>PPG14 Start Trigger bit</description>
|
|
<lsb>14</lsb>
|
|
<msb>14</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "PEN13" -->
|
|
<field>
|
|
<name>PEN13</name>
|
|
<description>PPG13 Start Trigger bit</description>
|
|
<lsb>13</lsb>
|
|
<msb>13</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "PEN12" -->
|
|
<field>
|
|
<name>PEN12</name>
|
|
<description>PPG12 Start Trigger bit</description>
|
|
<lsb>12</lsb>
|
|
<msb>12</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "PEN11" -->
|
|
<field>
|
|
<name>PEN11</name>
|
|
<description>PPG11 Start Trigger bit</description>
|
|
<lsb>11</lsb>
|
|
<msb>11</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "PEN10" -->
|
|
<field>
|
|
<name>PEN10</name>
|
|
<description>PPG10 Start Trigger bit</description>
|
|
<lsb>10</lsb>
|
|
<msb>10</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "PEN09" -->
|
|
<field>
|
|
<name>PEN09</name>
|
|
<description>PPG9 Start Trigger bit</description>
|
|
<lsb>9</lsb>
|
|
<msb>9</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "PEN08" -->
|
|
<field>
|
|
<name>PEN08</name>
|
|
<description>PPG8 Start Trigger bit</description>
|
|
<lsb>8</lsb>
|
|
<msb>8</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "PEN07" -->
|
|
<field>
|
|
<name>PEN07</name>
|
|
<description>PPG7 Start Trigger bit</description>
|
|
<lsb>7</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "PEN06" -->
|
|
<field>
|
|
<name>PEN06</name>
|
|
<description>PPG6 Start Trigger bit</description>
|
|
<lsb>6</lsb>
|
|
<msb>6</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "PEN05" -->
|
|
<field>
|
|
<name>PEN05</name>
|
|
<description>PPG5 Start Trigger bit</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "PEN04" -->
|
|
<field>
|
|
<name>PEN04</name>
|
|
<description>PPG4 Start Trigger bit</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "PEN03" -->
|
|
<field>
|
|
<name>PEN03</name>
|
|
<description>PPG3 Start Trigger bit</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "PEN02" -->
|
|
<field>
|
|
<name>PEN02</name>
|
|
<description>PPG2 Start Trigger bit</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "PEN01" -->
|
|
<field>
|
|
<name>PEN01</name>
|
|
<description>PPG1 Start Trigger bit</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "PEN00" -->
|
|
<field>
|
|
<name>PEN00</name>
|
|
<description>PPG0 Start Trigger bit</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "TRG1" -->
|
|
<register>
|
|
<name>TRG1</name>
|
|
<description>PPG Start Register 1</description>
|
|
<addressOffset>0x140</addressOffset>
|
|
<size>16</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<resetMask>0x00FF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "PEN23" -->
|
|
<field>
|
|
<name>PEN23</name>
|
|
<description>PPG23 Start Trigger bit</description>
|
|
<lsb>7</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "PEN22" -->
|
|
<field>
|
|
<name>PEN22</name>
|
|
<description>PPG22 Start Trigger bit</description>
|
|
<lsb>6</lsb>
|
|
<msb>6</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "PEN21" -->
|
|
<field>
|
|
<name>PEN21</name>
|
|
<description>PPG21 Start Trigger bit</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "PEN20" -->
|
|
<field>
|
|
<name>PEN20</name>
|
|
<description>PPG20 Start Trigger bit</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "PEN19" -->
|
|
<field>
|
|
<name>PEN19</name>
|
|
<description>PPG19 Start Trigger bit</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "PEN18" -->
|
|
<field>
|
|
<name>PEN18</name>
|
|
<description>PPG18 Start Trigger bit</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "PEN17" -->
|
|
<field>
|
|
<name>PEN17</name>
|
|
<description>PPG17 Start Trigger bit</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "PEN16" -->
|
|
<field>
|
|
<name>PEN16</name>
|
|
<description>PPG16 Start Trigger bit</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "REVC0" -->
|
|
<register>
|
|
<name>REVC0</name>
|
|
<description>Output Reverse Register 0</description>
|
|
<addressOffset>0x104</addressOffset>
|
|
<size>16</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<resetMask>0xFFFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "REV15" -->
|
|
<field>
|
|
<name>REV15</name>
|
|
<description>PPG15 Output Reverse Enable bit</description>
|
|
<lsb>15</lsb>
|
|
<msb>15</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "REV14" -->
|
|
<field>
|
|
<name>REV14</name>
|
|
<description>PPG14 Output Reverse Enable bit</description>
|
|
<lsb>14</lsb>
|
|
<msb>14</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "REV13" -->
|
|
<field>
|
|
<name>REV13</name>
|
|
<description>PPG13 Output Reverse Enable bit</description>
|
|
<lsb>13</lsb>
|
|
<msb>13</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "REV12" -->
|
|
<field>
|
|
<name>REV12</name>
|
|
<description>PPG12 Output Reverse Enable bit</description>
|
|
<lsb>12</lsb>
|
|
<msb>12</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "REV11" -->
|
|
<field>
|
|
<name>REV11</name>
|
|
<description>PPG11 Output Reverse Enable bit</description>
|
|
<lsb>11</lsb>
|
|
<msb>11</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "REV10" -->
|
|
<field>
|
|
<name>REV10</name>
|
|
<description>PPG10 Output Reverse Enable bit</description>
|
|
<lsb>10</lsb>
|
|
<msb>10</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "REV09" -->
|
|
<field>
|
|
<name>REV09</name>
|
|
<description>PPG9 Output Reverse Enable bit</description>
|
|
<lsb>9</lsb>
|
|
<msb>9</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "REV08" -->
|
|
<field>
|
|
<name>REV08</name>
|
|
<description>PPG8 Output Reverse Enable bit</description>
|
|
<lsb>8</lsb>
|
|
<msb>8</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "REV07" -->
|
|
<field>
|
|
<name>REV07</name>
|
|
<description>PPG7 Output Reverse Enable bit</description>
|
|
<lsb>7</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "REV06" -->
|
|
<field>
|
|
<name>REV06</name>
|
|
<description>PPG6 Output Reverse Enable bit</description>
|
|
<lsb>6</lsb>
|
|
<msb>6</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "REV05" -->
|
|
<field>
|
|
<name>REV05</name>
|
|
<description>PPG5 Output Reverse Enable bit</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "REV04" -->
|
|
<field>
|
|
<name>REV04</name>
|
|
<description>PPG4 Output Reverse Enable bit</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "REV03" -->
|
|
<field>
|
|
<name>REV03</name>
|
|
<description>PPG3 Output Reverse Enable bit</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "REV02" -->
|
|
<field>
|
|
<name>REV02</name>
|
|
<description>PPG2 Output Reverse Enable bit</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "REV01" -->
|
|
<field>
|
|
<name>REV01</name>
|
|
<description>PPG1 Output Reverse Enable bit</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "REV00" -->
|
|
<field>
|
|
<name>REV00</name>
|
|
<description>PPG0 Output Reverse Enable bit</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "REVC1" -->
|
|
<register>
|
|
<name>REVC1</name>
|
|
<description>Output Reverse Register 1</description>
|
|
<addressOffset>0x144</addressOffset>
|
|
<size>16</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<resetMask>0x00FF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "REV23" -->
|
|
<field>
|
|
<name>REV23</name>
|
|
<description>PPG23 Output Reverse Enable bit</description>
|
|
<lsb>7</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "REV22" -->
|
|
<field>
|
|
<name>REV22</name>
|
|
<description>PPG22 Output Reverse Enable bit</description>
|
|
<lsb>6</lsb>
|
|
<msb>6</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "REV21" -->
|
|
<field>
|
|
<name>REV21</name>
|
|
<description>PPG21 Output Reverse Enable bit</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "REV20" -->
|
|
<field>
|
|
<name>REV20</name>
|
|
<description>PPG20 Output Reverse Enable bit</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "REV19" -->
|
|
<field>
|
|
<name>REV19</name>
|
|
<description>PPG19 Output Reverse Enable bit</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "REV18" -->
|
|
<field>
|
|
<name>REV18</name>
|
|
<description>PPG18 Output Reverse Enable bit</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "REV17" -->
|
|
<field>
|
|
<name>REV17</name>
|
|
<description>PPG17 Output Reverse Enable bit</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "REV16" -->
|
|
<field>
|
|
<name>REV16</name>
|
|
<description>PPG16 Output Reverse Enable bit</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "PPGC0" -->
|
|
<register>
|
|
<name>PPGC0</name>
|
|
<description>PPG Operation Mode Control Register 0</description>
|
|
<addressOffset>0x201</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0xFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "PIE" -->
|
|
<field>
|
|
<name>PIE</name>
|
|
<description>PPG Interrupt Enable bit</description>
|
|
<lsb>7</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "PUF" -->
|
|
<field>
|
|
<name>PUF</name>
|
|
<description>PPG Counter Underflow bit</description>
|
|
<lsb>6</lsb>
|
|
<msb>6</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "INTM" -->
|
|
<field>
|
|
<name>INTM</name>
|
|
<description>Interrupt Mode Select bit</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "PCS" -->
|
|
<field>
|
|
<name>PCS</name>
|
|
<description>PPG DOWN Counter Operation Clock Select bits</description>
|
|
<lsb>3</lsb>
|
|
<msb>4</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "MD" -->
|
|
<field>
|
|
<name>MD</name>
|
|
<description>PPG Operation Mode Set bits</description>
|
|
<lsb>1</lsb>
|
|
<msb>2</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TTRG" -->
|
|
<field>
|
|
<name>TTRG</name>
|
|
<description>PPG start trigger select bit</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "PPGC1" -->
|
|
<register>
|
|
<name>PPGC1</name>
|
|
<description>PPG Operation Mode Control Register 1</description>
|
|
<addressOffset>0x200</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0xF8</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "PIE" -->
|
|
<field>
|
|
<name>PIE</name>
|
|
<description>PPG Interrupt Enable bit</description>
|
|
<lsb>7</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "PUF" -->
|
|
<field>
|
|
<name>PUF</name>
|
|
<description>PPG Counter Underflow bit</description>
|
|
<lsb>6</lsb>
|
|
<msb>6</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "INTM" -->
|
|
<field>
|
|
<name>INTM</name>
|
|
<description>Interrupt Mode Select bit</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "PCS" -->
|
|
<field>
|
|
<name>PCS</name>
|
|
<description>PPG DOWN Counter Operation Clock Select bits</description>
|
|
<lsb>3</lsb>
|
|
<msb>4</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "MD" -->
|
|
<field>
|
|
<name>MD</name>
|
|
<description>PPG Operation Mode Set bits</description>
|
|
<lsb>1</lsb>
|
|
<msb>2</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "PPGC2" -->
|
|
<register derivedFrom="PPGC0">
|
|
<name>PPGC2</name>
|
|
<description>PPG Operation Mode Control Register 2</description>
|
|
<addressOffset>0x205</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "PPGC3" -->
|
|
<register derivedFrom="PPGC1">
|
|
<name>PPGC3</name>
|
|
<description>PPG Operation Mode Control Register 3</description>
|
|
<addressOffset>0x204</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "PPGC4" -->
|
|
<register derivedFrom="PPGC0">
|
|
<name>PPGC4</name>
|
|
<description>PPG Operation Mode Control Register 4</description>
|
|
<addressOffset>0x241</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "PPGC5" -->
|
|
<register derivedFrom="PPGC1">
|
|
<name>PPGC5</name>
|
|
<description>PPG Operation Mode Control Register 5</description>
|
|
<addressOffset>0x240</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "PPGC6" -->
|
|
<register derivedFrom="PPGC0">
|
|
<name>PPGC6</name>
|
|
<description>PPG Operation Mode Control Register 6</description>
|
|
<addressOffset>0x245</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "PPGC7" -->
|
|
<register derivedFrom="PPGC1">
|
|
<name>PPGC7</name>
|
|
<description>PPG Operation Mode Control Register 7</description>
|
|
<addressOffset>0x244</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "PPGC8" -->
|
|
<register derivedFrom="PPGC0">
|
|
<name>PPGC8</name>
|
|
<description>PPG Operation Mode Control Register 8</description>
|
|
<addressOffset>0x281</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "PPGC9" -->
|
|
<register derivedFrom="PPGC1">
|
|
<name>PPGC9</name>
|
|
<description>PPG Operation Mode Control Register 9</description>
|
|
<addressOffset>0x280</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "PPGC10" -->
|
|
<register derivedFrom="PPGC0">
|
|
<name>PPGC10</name>
|
|
<description>PPG Operation Mode Control Register 10</description>
|
|
<addressOffset>0x285</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "PPGC11" -->
|
|
<register derivedFrom="PPGC1">
|
|
<name>PPGC11</name>
|
|
<description>PPG Operation Mode Control Register 11</description>
|
|
<addressOffset>0x284</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "PPGC12" -->
|
|
<register derivedFrom="PPGC0">
|
|
<name>PPGC12</name>
|
|
<description>PPG Operation Mode Control Register 12</description>
|
|
<addressOffset>0x2C1</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "PPGC13" -->
|
|
<register derivedFrom="PPGC1">
|
|
<name>PPGC13</name>
|
|
<description>PPG Operation Mode Control Register 13</description>
|
|
<addressOffset>0x2C0</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "PPGC14" -->
|
|
<register derivedFrom="PPGC0">
|
|
<name>PPGC14</name>
|
|
<description>PPG Operation Mode Control Register 14</description>
|
|
<addressOffset>0x2C5</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "PPGC15" -->
|
|
<register derivedFrom="PPGC1">
|
|
<name>PPGC15</name>
|
|
<description>PPG Operation Mode Control Register 15</description>
|
|
<addressOffset>0x2C4</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "PPGC16" -->
|
|
<register derivedFrom="PPGC0">
|
|
<name>PPGC16</name>
|
|
<description>PPG Operation Mode Control Register 16</description>
|
|
<addressOffset>0x301</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "PPGC17" -->
|
|
<register derivedFrom="PPGC1">
|
|
<name>PPGC17</name>
|
|
<description>PPG Operation Mode Control Register 17</description>
|
|
<addressOffset>0x300</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "PPGC18" -->
|
|
<register derivedFrom="PPGC0">
|
|
<name>PPGC18</name>
|
|
<description>PPG Operation Mode Control Register 18</description>
|
|
<addressOffset>0x305</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "PPGC19" -->
|
|
<register derivedFrom="PPGC1">
|
|
<name>PPGC19</name>
|
|
<description>PPG Operation Mode Control Register 19</description>
|
|
<addressOffset>0x304</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "PPGC20" -->
|
|
<register derivedFrom="PPGC0">
|
|
<name>PPGC20</name>
|
|
<description>PPG Operation Mode Control Register 20</description>
|
|
<addressOffset>0x341</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "PPGC21" -->
|
|
<register derivedFrom="PPGC1">
|
|
<name>PPGC21</name>
|
|
<description>PPG Operation Mode Control Register 21</description>
|
|
<addressOffset>0x340</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "PPGC22" -->
|
|
<register derivedFrom="PPGC0">
|
|
<name>PPGC22</name>
|
|
<description>PPG Operation Mode Control Register 22</description>
|
|
<addressOffset>0x345</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "PPGC23" -->
|
|
<register derivedFrom="PPGC1">
|
|
<name>PPGC23</name>
|
|
<description>PPG Operation Mode Control Register 23</description>
|
|
<addressOffset>0x344</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "PRLH0" -->
|
|
<register>
|
|
<name>PRLH0</name>
|
|
<description>PPG0 Reload Registers High</description>
|
|
<addressOffset>0x209</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0xFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "PRLH" -->
|
|
<field>
|
|
<name>PRLH</name>
|
|
<description>Reload Registers High</description>
|
|
<lsb>0</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "PRLL0" -->
|
|
<register>
|
|
<name>PRLL0</name>
|
|
<description>PPG0 Reload Registers Low</description>
|
|
<addressOffset>0x208</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0xFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "PRLL" -->
|
|
<field>
|
|
<name>PRLL</name>
|
|
<description>Reload Registers Low</description>
|
|
<lsb>0</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "PRLH1" -->
|
|
<register derivedFrom="PRLH0">
|
|
<name>PRLH1</name>
|
|
<description>PPG1 Reload Registers High</description>
|
|
<addressOffset>0x20D</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "PRLL1" -->
|
|
<register derivedFrom="PRLL0">
|
|
<name>PRLL1</name>
|
|
<description>PPG1 Reload Registers Low</description>
|
|
<addressOffset>0x20C</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "PRLH2" -->
|
|
<register derivedFrom="PRLH0">
|
|
<name>PRLH2</name>
|
|
<description>PPG2 Reload Registers High</description>
|
|
<addressOffset>0x211</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "PRLL2" -->
|
|
<register derivedFrom="PRLL0">
|
|
<name>PRLL2</name>
|
|
<description>PPG2 Reload Registers Low</description>
|
|
<addressOffset>0x210</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "PRLH3" -->
|
|
<register derivedFrom="PRLH0">
|
|
<name>PRLH3</name>
|
|
<description>PPG3 Reload Registers High</description>
|
|
<addressOffset>0x215</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "PRLL3" -->
|
|
<register derivedFrom="PRLL0">
|
|
<name>PRLL3</name>
|
|
<description>PPG3 Reload Registers Low</description>
|
|
<addressOffset>0x214</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "PRLH4" -->
|
|
<register derivedFrom="PRLH0">
|
|
<name>PRLH4</name>
|
|
<description>PPG4 Reload Registers High</description>
|
|
<addressOffset>0x249</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "PRLL4" -->
|
|
<register derivedFrom="PRLL0">
|
|
<name>PRLL4</name>
|
|
<description>PPG4 Reload Registers Low</description>
|
|
<addressOffset>0x248</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "PRLH5" -->
|
|
<register derivedFrom="PRLH0">
|
|
<name>PRLH5</name>
|
|
<description>PPG5 Reload Registers High</description>
|
|
<addressOffset>0x24D</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "PRLL5" -->
|
|
<register derivedFrom="PRLL0">
|
|
<name>PRLL5</name>
|
|
<description>PPG5 Reload Registers Low</description>
|
|
<addressOffset>0x24C</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "PRLH6" -->
|
|
<register derivedFrom="PRLH0">
|
|
<name>PRLH6</name>
|
|
<description>PPG6 Reload Registers High</description>
|
|
<addressOffset>0x251</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "PRLL6" -->
|
|
<register derivedFrom="PRLL0">
|
|
<name>PRLL6</name>
|
|
<description>PPG6 Reload Registers Low</description>
|
|
<addressOffset>0x250</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "PRLH7" -->
|
|
<register derivedFrom="PRLH0">
|
|
<name>PRLH7</name>
|
|
<description>PPG7 Reload Registers High</description>
|
|
<addressOffset>0x255</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "PRLL7" -->
|
|
<register derivedFrom="PRLL0">
|
|
<name>PRLL7</name>
|
|
<description>PPG7 Reload Registers Low</description>
|
|
<addressOffset>0x254</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "PRLH8" -->
|
|
<register derivedFrom="PRLH0">
|
|
<name>PRLH8</name>
|
|
<description>PPG8 Reload Registers High</description>
|
|
<addressOffset>0x289</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "PRLL8" -->
|
|
<register derivedFrom="PRLL0">
|
|
<name>PRLL8</name>
|
|
<description>PPG8 Reload Registers Low</description>
|
|
<addressOffset>0x288</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "PRLH9" -->
|
|
<register derivedFrom="PRLH0">
|
|
<name>PRLH9</name>
|
|
<description>PPG9 Reload Registers High</description>
|
|
<addressOffset>0x28D</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "PRLL9" -->
|
|
<register derivedFrom="PRLL0">
|
|
<name>PRLL9</name>
|
|
<description>PPG9 Reload Registers Low</description>
|
|
<addressOffset>0x28C</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "PRLH10" -->
|
|
<register derivedFrom="PRLH0">
|
|
<name>PRLH10</name>
|
|
<description>PPG10 Reload Registers High</description>
|
|
<addressOffset>0x291</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "PRLL10" -->
|
|
<register derivedFrom="PRLL0">
|
|
<name>PRLL10</name>
|
|
<description>PPG10 Reload Registers Low</description>
|
|
<addressOffset>0x290</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "PRLH11" -->
|
|
<register derivedFrom="PRLH0">
|
|
<name>PRLH11</name>
|
|
<description>PPG11 Reload Registers High</description>
|
|
<addressOffset>0x295</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "PRLL11" -->
|
|
<register derivedFrom="PRLL0">
|
|
<name>PRLL11</name>
|
|
<description>PPG11 Reload Registers Low</description>
|
|
<addressOffset>0x294</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "PRLH12" -->
|
|
<register derivedFrom="PRLH0">
|
|
<name>PRLH12</name>
|
|
<description>PPG12 Reload Registers High</description>
|
|
<addressOffset>0x2C9</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "PRLL12" -->
|
|
<register derivedFrom="PRLL0">
|
|
<name>PRLL12</name>
|
|
<description>PPG12 Reload Registers Low</description>
|
|
<addressOffset>0x2C8</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "PRLH13" -->
|
|
<register derivedFrom="PRLH0">
|
|
<name>PRLH13</name>
|
|
<description>PPG13 Reload Registers High</description>
|
|
<addressOffset>0x2CD</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "PRLL13" -->
|
|
<register derivedFrom="PRLL0">
|
|
<name>PRLL13</name>
|
|
<description>PPG13 Reload Registers Low</description>
|
|
<addressOffset>0x2CC</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "PRLH14" -->
|
|
<register derivedFrom="PRLH0">
|
|
<name>PRLH14</name>
|
|
<description>PPG14 Reload Registers High</description>
|
|
<addressOffset>0x2D1</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "PRLL14" -->
|
|
<register derivedFrom="PRLL0">
|
|
<name>PRLL14</name>
|
|
<description>PPG14 Reload Registers Low</description>
|
|
<addressOffset>0x2D0</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "PRLH15" -->
|
|
<register derivedFrom="PRLH0">
|
|
<name>PRLH15</name>
|
|
<description>PPG15 Reload Registers High</description>
|
|
<addressOffset>0x2D5</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "PRLL15" -->
|
|
<register derivedFrom="PRLL0">
|
|
<name>PRLL15</name>
|
|
<description>PPG15 Reload Registers Low</description>
|
|
<addressOffset>0x2D4</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "PRLH16" -->
|
|
<register derivedFrom="PRLH0">
|
|
<name>PRLH16</name>
|
|
<description>PPG16 Reload Registers High</description>
|
|
<addressOffset>0x309</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "PRLL16" -->
|
|
<register derivedFrom="PRLL0">
|
|
<name>PRLL16</name>
|
|
<description>PPG16 Reload Registers Low</description>
|
|
<addressOffset>0x308</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "PRLH17" -->
|
|
<register derivedFrom="PRLH0">
|
|
<name>PRLH17</name>
|
|
<description>PPG17 Reload Registers High</description>
|
|
<addressOffset>0x30D</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "PRLL17" -->
|
|
<register derivedFrom="PRLL0">
|
|
<name>PRLL17</name>
|
|
<description>PPG17 Reload Registers Low</description>
|
|
<addressOffset>0x30C</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "PRLH18" -->
|
|
<register derivedFrom="PRLH0">
|
|
<name>PRLH18</name>
|
|
<description>PPG18 Reload Registers High</description>
|
|
<addressOffset>0x311</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "PRLL18" -->
|
|
<register derivedFrom="PRLL0">
|
|
<name>PRLL18</name>
|
|
<description>PPG18 Reload Registers Low</description>
|
|
<addressOffset>0x310</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "PRLH19" -->
|
|
<register derivedFrom="PRLH0">
|
|
<name>PRLH19</name>
|
|
<description>PPG19 Reload Registers High</description>
|
|
<addressOffset>0x315</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "PRLL19" -->
|
|
<register derivedFrom="PRLL0">
|
|
<name>PRLL19</name>
|
|
<description>PPG19 Reload Registers Low</description>
|
|
<addressOffset>0x314</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "PRLH20" -->
|
|
<register derivedFrom="PRLH0">
|
|
<name>PRLH20</name>
|
|
<description>PPG20 Reload Registers High</description>
|
|
<addressOffset>0x349</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "PRLL20" -->
|
|
<register derivedFrom="PRLL0">
|
|
<name>PRLL20</name>
|
|
<description>PPG20 Reload Registers Low</description>
|
|
<addressOffset>0x348</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "PRLH21" -->
|
|
<register derivedFrom="PRLH0">
|
|
<name>PRLH21</name>
|
|
<description>PPG21 Reload Registers High</description>
|
|
<addressOffset>0x34D</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "PRLL21" -->
|
|
<register derivedFrom="PRLL0">
|
|
<name>PRLL21</name>
|
|
<description>PPG21 Reload Registers Low</description>
|
|
<addressOffset>0x34C</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "PRLH22" -->
|
|
<register derivedFrom="PRLH0">
|
|
<name>PRLH22</name>
|
|
<description>PPG22 Reload Registers High</description>
|
|
<addressOffset>0x351</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "PRLL22" -->
|
|
<register derivedFrom="PRLL0">
|
|
<name>PRLL22</name>
|
|
<description>PPG22 Reload Registers Low</description>
|
|
<addressOffset>0x350</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "PRLH23" -->
|
|
<register derivedFrom="PRLH0">
|
|
<name>PRLH23</name>
|
|
<description>PPG23 Reload Registers High</description>
|
|
<addressOffset>0x355</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "PRLL23" -->
|
|
<register derivedFrom="PRLL0">
|
|
<name>PRLL23</name>
|
|
<description>PPG23 Reload Registers Low</description>
|
|
<addressOffset>0x354</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "GATEC0" -->
|
|
<register>
|
|
<name>GATEC0</name>
|
|
<description>PPG Gate Function Control Register 0</description>
|
|
<addressOffset>0x218</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0x33</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "STRG2" -->
|
|
<field>
|
|
<name>STRG2</name>
|
|
<description>Select trigger bit for PPG2</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "EDGE2" -->
|
|
<field>
|
|
<name>EDGE2</name>
|
|
<description>Start Effective Level Select bit for PPG2</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "STRG0" -->
|
|
<field>
|
|
<name>STRG0</name>
|
|
<description>Select trigger bit for PPG0</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "EDGE0" -->
|
|
<field>
|
|
<name>EDGE0</name>
|
|
<description>Start Effective Level Select bit for PPG0</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "GATEC4" -->
|
|
<register>
|
|
<name>GATEC4</name>
|
|
<description>PPG Gate Function Control Register 4</description>
|
|
<addressOffset>0x258</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0x33</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "STRG6" -->
|
|
<field>
|
|
<name>STRG6</name>
|
|
<description>Select trigger bit for PPG6</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "EDGE6" -->
|
|
<field>
|
|
<name>EDGE6</name>
|
|
<description>Start Effective Level Select bit for PPG6</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "STRG4" -->
|
|
<field>
|
|
<name>STRG4</name>
|
|
<description>Select trigger bit for PPG4</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "EDGE4" -->
|
|
<field>
|
|
<name>EDGE4</name>
|
|
<description>Start Effective Level Select bit for PPG4</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "GATEC8" -->
|
|
<register>
|
|
<name>GATEC8</name>
|
|
<description>PPG Gate Function Control Register 8</description>
|
|
<addressOffset>0x298</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0x33</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "STRG10" -->
|
|
<field>
|
|
<name>STRG10</name>
|
|
<description>Select trigger bit for PPG10</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "EDGE10" -->
|
|
<field>
|
|
<name>EDGE10</name>
|
|
<description>Start Effective Level Select bit for PPG10</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "STRG8" -->
|
|
<field>
|
|
<name>STRG8</name>
|
|
<description>Select trigger bit for PPG8</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "EDGE8" -->
|
|
<field>
|
|
<name>EDGE8</name>
|
|
<description>Start Effective Level Select bit for PPG8</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "GATEC12" -->
|
|
<register>
|
|
<name>GATEC12</name>
|
|
<description>PPG Gate Function Control Register 12</description>
|
|
<addressOffset>0x2D8</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0x33</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "STRG14" -->
|
|
<field>
|
|
<name>STRG14</name>
|
|
<description>Select trigger bit for PPG14</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "EDGE14" -->
|
|
<field>
|
|
<name>EDGE14</name>
|
|
<description>Start Effective Level Select bit for PPG14</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "STRG12" -->
|
|
<field>
|
|
<name>STRG12</name>
|
|
<description>Select trigger bit for PPG12</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "EDGE12" -->
|
|
<field>
|
|
<name>EDGE12</name>
|
|
<description>Start Effective Level Select bit for PPG12</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "GATEC16" -->
|
|
<register>
|
|
<name>GATEC16</name>
|
|
<description>PPG Gate Function Control Register 16</description>
|
|
<addressOffset>0x318</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0x33</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "STRG18" -->
|
|
<field>
|
|
<name>STRG18</name>
|
|
<description>Select trigger bit for PPG18</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "EDGE18" -->
|
|
<field>
|
|
<name>EDGE18</name>
|
|
<description>Start Effective Level Select bit for PPG18</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "STRG16" -->
|
|
<field>
|
|
<name>STRG16</name>
|
|
<description>Select trigger bit for PPG16</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "EDGE16" -->
|
|
<field>
|
|
<name>EDGE16</name>
|
|
<description>Start Effective Level Select bit for PPG16</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "GATEC20" -->
|
|
<register>
|
|
<name>GATEC20</name>
|
|
<description>PPG Gate Function Control Register 20</description>
|
|
<addressOffset>0x358</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0x33</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "STRG22" -->
|
|
<field>
|
|
<name>STRG22</name>
|
|
<description>Select trigger bit for PPG22</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "EDGE22" -->
|
|
<field>
|
|
<name>EDGE22</name>
|
|
<description>Start Effective Level Select bit for PPG22</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "STRG20" -->
|
|
<field>
|
|
<name>STRG20</name>
|
|
<description>Select trigger bit for PPG20</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "EDGE20" -->
|
|
<field>
|
|
<name>EDGE20</name>
|
|
<description>Start Effective Level Select bit for PPG20</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "IGBTC" -->
|
|
<register>
|
|
<name>IGBTC</name>
|
|
<description>IGBT Mode Control Register</description>
|
|
<addressOffset>0x380</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0xFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "IGATIH" -->
|
|
<field>
|
|
<name>IGATIH</name>
|
|
<description>Stop prohibition mode selection in output active bit</description>
|
|
<lsb>7</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "IGNFW" -->
|
|
<field>
|
|
<name>IGNFW</name>
|
|
<description>Noise filter width selection bit</description>
|
|
<lsb>4</lsb>
|
|
<msb>6</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "IGOSEL" -->
|
|
<field>
|
|
<name>IGOSEL</name>
|
|
<description>Output level selection bit</description>
|
|
<lsb>2</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "IGTRGLV" -->
|
|
<field>
|
|
<name>IGTRGLV</name>
|
|
<description>Trigger input level selection bit</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "IGBTMD" -->
|
|
<field>
|
|
<name>IGBTMD</name>
|
|
<description>IGBT mode selection bit</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral>
|
|
<!-- PERIPHERAL "BT0" -->
|
|
<peripheral>
|
|
<name>BT0</name>
|
|
<description>Base Timer 0</description>
|
|
<groupName>BT0</groupName>
|
|
<baseAddress>0x40025000</baseAddress>
|
|
<!-- ADDRESS BLOCK -->
|
|
<addressBlock>
|
|
<offset>0x0</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x4</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x8</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0xC</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x10</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<!-- INTERRUPT "BTIM0_3_FLASH" -->
|
|
<interrupt>
|
|
<name>BTIM0_3_FLASH</name>
|
|
<value>31</value>
|
|
</interrupt>
|
|
<!-- REGISTERS -->
|
|
<registers>
|
|
<!-- REGISTER "PWM_TMCR" -->
|
|
<register>
|
|
<name>PWM_TMCR</name>
|
|
<description>Timer Control Register</description>
|
|
<alternateGroup>PWM</alternateGroup>
|
|
<addressOffset>0xC</addressOffset>
|
|
<size>16</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<resetMask>0x7F7F</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "CKS" -->
|
|
<field>
|
|
<name>CKS</name>
|
|
<description>Count clock selection bits</description>
|
|
<lsb>12</lsb>
|
|
<msb>14</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "RTGEN" -->
|
|
<field>
|
|
<name>RTGEN</name>
|
|
<description>Restart enable bit</description>
|
|
<lsb>11</lsb>
|
|
<msb>11</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "PMSK" -->
|
|
<field>
|
|
<name>PMSK</name>
|
|
<description>Pulse output mask bit</description>
|
|
<lsb>10</lsb>
|
|
<msb>10</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "EGS" -->
|
|
<field>
|
|
<name>EGS</name>
|
|
<description>Trigger input edge selection bits</description>
|
|
<lsb>8</lsb>
|
|
<msb>9</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "FMD" -->
|
|
<field>
|
|
<name>FMD</name>
|
|
<description>Timer function selection bits</description>
|
|
<lsb>4</lsb>
|
|
<msb>6</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "OSEL" -->
|
|
<field>
|
|
<name>OSEL</name>
|
|
<description>Output polarity specification bit</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "MDSE" -->
|
|
<field>
|
|
<name>MDSE</name>
|
|
<description>Mode selection bit</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "CTEN" -->
|
|
<field>
|
|
<name>CTEN</name>
|
|
<description>Count operation enable bit</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "STRG" -->
|
|
<field>
|
|
<name>STRG</name>
|
|
<description>Software trigger bit</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "PWM_TMCR2" -->
|
|
<register>
|
|
<name>PWM_TMCR2</name>
|
|
<description>Timer Control Register 2</description>
|
|
<alternateGroup>PWM</alternateGroup>
|
|
<addressOffset>0x11</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0x01</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "CKS3" -->
|
|
<field>
|
|
<name>CKS3</name>
|
|
<description>Count clock selection bit</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "PWM_STC" -->
|
|
<register>
|
|
<name>PWM_STC</name>
|
|
<description>Status Control Register</description>
|
|
<alternateGroup>PWM</alternateGroup>
|
|
<addressOffset>0x10</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0x77</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "TGIE" -->
|
|
<field>
|
|
<name>TGIE</name>
|
|
<description>Trigger interrupt request enable bit</description>
|
|
<lsb>6</lsb>
|
|
<msb>6</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "DTIE" -->
|
|
<field>
|
|
<name>DTIE</name>
|
|
<description>Duty match interrupt request enable bit</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "UDIE" -->
|
|
<field>
|
|
<name>UDIE</name>
|
|
<description>Underflow interrupt request enable bit</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TGIR" -->
|
|
<field>
|
|
<name>TGIR</name>
|
|
<description>Trigger interrupt request bit</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "DTIR" -->
|
|
<field>
|
|
<name>DTIR</name>
|
|
<description>Duty match interrupt request bit</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "UDIR" -->
|
|
<field>
|
|
<name>UDIR</name>
|
|
<description>Underflow interrupt request bit</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "PWM_PCSR" -->
|
|
<register>
|
|
<name>PWM_PCSR</name>
|
|
<description>PWM Cycle Set Register</description>
|
|
<alternateGroup>PWM</alternateGroup>
|
|
<addressOffset>0x0</addressOffset>
|
|
<size>16</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<resetMask>0xFFFF</resetMask>
|
|
</register>
|
|
<!-- REGISTER "PWM_PDUT" -->
|
|
<register>
|
|
<name>PWM_PDUT</name>
|
|
<description>PWM Duty Set Register</description>
|
|
<alternateGroup>PWM</alternateGroup>
|
|
<addressOffset>0x4</addressOffset>
|
|
<size>16</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<resetMask>0xFFFF</resetMask>
|
|
</register>
|
|
<!-- REGISTER "PWM_TMR" -->
|
|
<register>
|
|
<name>PWM_TMR</name>
|
|
<description>Timer Register</description>
|
|
<alternateGroup>PWM</alternateGroup>
|
|
<addressOffset>0x8</addressOffset>
|
|
<size>16</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<resetMask>0xFFFF</resetMask>
|
|
</register>
|
|
<!-- REGISTER "PPG_TMCR" -->
|
|
<register>
|
|
<name>PPG_TMCR</name>
|
|
<description>Timer Control Register</description>
|
|
<alternateGroup>PPG</alternateGroup>
|
|
<addressOffset>0xC</addressOffset>
|
|
<size>16</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<resetMask>0x7F7F</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "CKS" -->
|
|
<field>
|
|
<name>CKS</name>
|
|
<description>Count clock selection bits</description>
|
|
<lsb>12</lsb>
|
|
<msb>14</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "RTGEN" -->
|
|
<field>
|
|
<name>RTGEN</name>
|
|
<description>Restart enable bit</description>
|
|
<lsb>11</lsb>
|
|
<msb>11</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "PMSK" -->
|
|
<field>
|
|
<name>PMSK</name>
|
|
<description> Pulse output mask bit</description>
|
|
<lsb>10</lsb>
|
|
<msb>10</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "EGS" -->
|
|
<field>
|
|
<name>EGS</name>
|
|
<description>Trigger input edge selection bits</description>
|
|
<lsb>8</lsb>
|
|
<msb>9</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "FMD" -->
|
|
<field>
|
|
<name>FMD</name>
|
|
<description>Timer function selection bits</description>
|
|
<lsb>4</lsb>
|
|
<msb>6</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "OSEL" -->
|
|
<field>
|
|
<name>OSEL</name>
|
|
<description>Output polarity specification bit</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "MDSE" -->
|
|
<field>
|
|
<name>MDSE</name>
|
|
<description>Mode selection bit</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "CTEN" -->
|
|
<field>
|
|
<name>CTEN</name>
|
|
<description>Count operation enable bit</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "STRG" -->
|
|
<field>
|
|
<name>STRG</name>
|
|
<description>Software trigger bit</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "PPG_TMCR2" -->
|
|
<register>
|
|
<name>PPG_TMCR2</name>
|
|
<description>Timer Control Register 2</description>
|
|
<alternateGroup>PPG</alternateGroup>
|
|
<addressOffset>0x11</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0x01</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "CKS3" -->
|
|
<field>
|
|
<name>CKS3</name>
|
|
<description>Count clock selection bit</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "PPG_STC" -->
|
|
<register>
|
|
<name>PPG_STC</name>
|
|
<description>Status Control Register</description>
|
|
<alternateGroup>PPG</alternateGroup>
|
|
<addressOffset>0x10</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0x55</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "TGIE" -->
|
|
<field>
|
|
<name>TGIE</name>
|
|
<description>Trigger interrupt request enable bit</description>
|
|
<lsb>6</lsb>
|
|
<msb>6</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "UDIE" -->
|
|
<field>
|
|
<name>UDIE</name>
|
|
<description>Underflow interrupt request enable bit</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TGIR" -->
|
|
<field>
|
|
<name>TGIR</name>
|
|
<description>Trigger interrupt request bit</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "UDIR" -->
|
|
<field>
|
|
<name>UDIR</name>
|
|
<description>Underflow interrupt request bit</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "PPG_PRLL" -->
|
|
<register>
|
|
<name>PPG_PRLL</name>
|
|
<description>LOW Width Reload Register</description>
|
|
<alternateGroup>PPG</alternateGroup>
|
|
<addressOffset>0x0</addressOffset>
|
|
<size>16</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<resetMask>0xFFFF</resetMask>
|
|
</register>
|
|
<!-- REGISTER "PPG_PRLH" -->
|
|
<register>
|
|
<name>PPG_PRLH</name>
|
|
<description>HIGH Width Reload Register</description>
|
|
<alternateGroup>PPG</alternateGroup>
|
|
<addressOffset>0x4</addressOffset>
|
|
<size>16</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<resetMask>0xFFFF</resetMask>
|
|
</register>
|
|
<!-- REGISTER "PPG_TMR" -->
|
|
<register>
|
|
<name>PPG_TMR</name>
|
|
<description>Timer Register</description>
|
|
<alternateGroup>PPG</alternateGroup>
|
|
<addressOffset>0x8</addressOffset>
|
|
<size>16</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<resetMask>0xFFFF</resetMask>
|
|
</register>
|
|
<!-- REGISTER "RT_TMCR" -->
|
|
<register>
|
|
<name>RT_TMCR</name>
|
|
<description>Timer Control Register</description>
|
|
<alternateGroup>RT</alternateGroup>
|
|
<addressOffset>0xC</addressOffset>
|
|
<size>16</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<resetMask>0x73FF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "CKS" -->
|
|
<field>
|
|
<name>CKS</name>
|
|
<description>Count clock selection bits</description>
|
|
<lsb>12</lsb>
|
|
<msb>14</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "EGS" -->
|
|
<field>
|
|
<name>EGS</name>
|
|
<description>Slection bits of trigger input edge and gate function level</description>
|
|
<lsb>8</lsb>
|
|
<msb>9</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "T32" -->
|
|
<field>
|
|
<name>T32</name>
|
|
<description>32-bit timer selection bit</description>
|
|
<lsb>7</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "FMD" -->
|
|
<field>
|
|
<name>FMD</name>
|
|
<description>Timer function selection bits</description>
|
|
<lsb>4</lsb>
|
|
<msb>6</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "OSEL" -->
|
|
<field>
|
|
<name>OSEL</name>
|
|
<description>Output polarity specification bit</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "MDSE" -->
|
|
<field>
|
|
<name>MDSE</name>
|
|
<description>Mode selection bit</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "CTEN" -->
|
|
<field>
|
|
<name>CTEN</name>
|
|
<description>Timer enable bit</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "STRG" -->
|
|
<field>
|
|
<name>STRG</name>
|
|
<description>Software trigger bit</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "RT_TMCR2" -->
|
|
<register>
|
|
<name>RT_TMCR2</name>
|
|
<description>Timer Control Register 2</description>
|
|
<alternateGroup>RT</alternateGroup>
|
|
<addressOffset>0x11</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0x81</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "GATE" -->
|
|
<field>
|
|
<name>GATE</name>
|
|
<description>Gate Input Enable bit</description>
|
|
<lsb>7</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "CKS3" -->
|
|
<field>
|
|
<name>CKS3</name>
|
|
<description>Count clock selection bit</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "RT_STC" -->
|
|
<register>
|
|
<name>RT_STC</name>
|
|
<description>Status Control Register</description>
|
|
<alternateGroup>RT</alternateGroup>
|
|
<addressOffset>0x10</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0x55</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "TGIE" -->
|
|
<field>
|
|
<name>TGIE</name>
|
|
<description>Trigger interrupt request enable bit</description>
|
|
<lsb>6</lsb>
|
|
<msb>6</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "UDIE" -->
|
|
<field>
|
|
<name>UDIE</name>
|
|
<description>Underflow interrupt request enable bit</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TGIR" -->
|
|
<field>
|
|
<name>TGIR</name>
|
|
<description>Trigger interrupt request bit</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "UDIR" -->
|
|
<field>
|
|
<name>UDIR</name>
|
|
<description>Underflow interrupt request bit</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "RT_PCSR" -->
|
|
<register>
|
|
<name>RT_PCSR</name>
|
|
<description>Cycle Set Register</description>
|
|
<alternateGroup>RT</alternateGroup>
|
|
<addressOffset>0x0</addressOffset>
|
|
<size>16</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<resetMask>0xFFFF</resetMask>
|
|
</register>
|
|
<!-- REGISTER "RT_TMR" -->
|
|
<register>
|
|
<name>RT_TMR</name>
|
|
<description>Timer Register</description>
|
|
<alternateGroup>RT</alternateGroup>
|
|
<addressOffset>0x8</addressOffset>
|
|
<size>16</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<resetMask>0xFFFF</resetMask>
|
|
</register>
|
|
<!-- REGISTER "PWC_TMCR" -->
|
|
<register>
|
|
<name>PWC_TMCR</name>
|
|
<description>Timer Control Register</description>
|
|
<alternateGroup>PWC</alternateGroup>
|
|
<addressOffset>0xC</addressOffset>
|
|
<size>16</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<resetMask>0x77F6</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "CKS" -->
|
|
<field>
|
|
<name>CKS</name>
|
|
<description>Count clock selection bits</description>
|
|
<lsb>12</lsb>
|
|
<msb>14</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "EGS" -->
|
|
<field>
|
|
<name>EGS</name>
|
|
<description>Measurement edge selection bits</description>
|
|
<lsb>8</lsb>
|
|
<msb>10</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "T32" -->
|
|
<field>
|
|
<name>T32</name>
|
|
<description>32-bit timer selection bit</description>
|
|
<lsb>7</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "FMD" -->
|
|
<field>
|
|
<name>FMD</name>
|
|
<description>Timer function selection bits</description>
|
|
<lsb>4</lsb>
|
|
<msb>6</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "MDSE" -->
|
|
<field>
|
|
<name>MDSE</name>
|
|
<description>Mode selection bit</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "CTEN" -->
|
|
<field>
|
|
<name>CTEN</name>
|
|
<description>Timer enable bit</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "PWC_TMCR2" -->
|
|
<register>
|
|
<name>PWC_TMCR2</name>
|
|
<description>Timer Control Register 2</description>
|
|
<alternateGroup>PWC</alternateGroup>
|
|
<addressOffset>0x11</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0x01</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "CKS3" -->
|
|
<field>
|
|
<name>CKS3</name>
|
|
<description>Count clock selection bit</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "PWC_STC" -->
|
|
<register>
|
|
<name>PWC_STC</name>
|
|
<description>Status Control Register</description>
|
|
<alternateGroup>PWC</alternateGroup>
|
|
<addressOffset>0x10</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0xD5</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "ERR" -->
|
|
<field>
|
|
<name>ERR</name>
|
|
<description>Error flag bit</description>
|
|
<lsb>7</lsb>
|
|
<msb>7</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "EDIE" -->
|
|
<field>
|
|
<name>EDIE</name>
|
|
<description>Measurement completion interrupt request enable bit</description>
|
|
<lsb>6</lsb>
|
|
<msb>6</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "OVIE" -->
|
|
<field>
|
|
<name>OVIE</name>
|
|
<description>Overflow interrupt request enable bit</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "EDIR" -->
|
|
<field>
|
|
<name>EDIR</name>
|
|
<description>Measurement completion interrupt request bit</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "OVIR" -->
|
|
<field>
|
|
<name>OVIR</name>
|
|
<description>Overflow interrupt request bit</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "PWC_DTBF" -->
|
|
<register>
|
|
<name>PWC_DTBF</name>
|
|
<description>Data Buffer Register</description>
|
|
<alternateGroup>PWC</alternateGroup>
|
|
<addressOffset>0x4</addressOffset>
|
|
<size>16</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<resetMask>0xFFFF</resetMask>
|
|
</register>
|
|
</registers>
|
|
</peripheral>
|
|
<!-- PERIPHERAL "BT1" -->
|
|
<peripheral derivedFrom="BT0">
|
|
<name>BT1</name>
|
|
<baseAddress>0x40025040</baseAddress>
|
|
<!-- INTERRUPT "BTIM0_3_FLASH" -->
|
|
<interrupt>
|
|
<name>BTIM0_3_FLASH</name>
|
|
<value>31</value>
|
|
</interrupt>
|
|
</peripheral>
|
|
<!-- PERIPHERAL "BT2" -->
|
|
<peripheral derivedFrom="BT0">
|
|
<name>BT2</name>
|
|
<baseAddress>0x40025080</baseAddress>
|
|
<!-- INTERRUPT "BTIM0_3_FLASH" -->
|
|
<interrupt>
|
|
<name>BTIM0_3_FLASH</name>
|
|
<value>31</value>
|
|
</interrupt>
|
|
</peripheral>
|
|
<!-- PERIPHERAL "BT3" -->
|
|
<peripheral derivedFrom="BT0">
|
|
<name>BT3</name>
|
|
<baseAddress>0x400250C0</baseAddress>
|
|
<!-- INTERRUPT "BTIM0_3_FLASH" -->
|
|
<interrupt>
|
|
<name>BTIM0_3_FLASH</name>
|
|
<value>31</value>
|
|
</interrupt>
|
|
</peripheral>
|
|
<!-- PERIPHERAL "BTIOSEL03" -->
|
|
<peripheral>
|
|
<name>BTIOSEL03</name>
|
|
<description>Base Timer I/O Select</description>
|
|
<groupName>BTIOSEL03</groupName>
|
|
<baseAddress>0x40025100</baseAddress>
|
|
<!-- ADDRESS BLOCK -->
|
|
<addressBlock>
|
|
<offset>0x0</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<!-- REGISTERS -->
|
|
<registers>
|
|
<!-- REGISTER "BTSEL0123" -->
|
|
<register>
|
|
<name>BTSEL0123</name>
|
|
<description>I/O Select Register</description>
|
|
<addressOffset>0x00</addressOffset>
|
|
<size>16</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<resetMask>0xFF00</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "SEL23" -->
|
|
<field>
|
|
<name>SEL23</name>
|
|
<description>I/O select bits for Ch.2/Ch.3</description>
|
|
<lsb>12</lsb>
|
|
<msb>15</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "SEL01" -->
|
|
<field>
|
|
<name>SEL01</name>
|
|
<description>I/O select bits for Ch.0/Ch.1</description>
|
|
<lsb>8</lsb>
|
|
<msb>11</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral>
|
|
<!-- PERIPHERAL "SBSSR" -->
|
|
<peripheral>
|
|
<name>SBSSR</name>
|
|
<description>Software-based Simultaneous Startup Register</description>
|
|
<groupName>SBSSR</groupName>
|
|
<baseAddress>0x40025F00</baseAddress>
|
|
<!-- ADDRESS BLOCK -->
|
|
<addressBlock>
|
|
<offset>0x0FC</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<!-- REGISTERS -->
|
|
<registers>
|
|
<!-- REGISTER "BTSSSR" -->
|
|
<register>
|
|
<name>BTSSSR</name>
|
|
<description>Software-based Simultaneous Startup Register</description>
|
|
<addressOffset>0xFC</addressOffset>
|
|
<size>16</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<resetMask>0x000F</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "SSSR3" -->
|
|
<field>
|
|
<name>SSSR3</name>
|
|
<description>Software-based simultaneous startup bit of Ch.3</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>write-only</access>
|
|
</field>
|
|
<!-- FIELD "SSSR2" -->
|
|
<field>
|
|
<name>SSSR2</name>
|
|
<description>Software-based simultaneous startup bit of Ch.2</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>write-only</access>
|
|
</field>
|
|
<!-- FIELD "SSSR1" -->
|
|
<field>
|
|
<name>SSSR1</name>
|
|
<description>Software-based simultaneous startup bit of Ch.1</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>write-only</access>
|
|
</field>
|
|
<!-- FIELD "SSSR0" -->
|
|
<field>
|
|
<name>SSSR0</name>
|
|
<description>Software-based simultaneous startup bit of Ch.0</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral>
|
|
<!-- PERIPHERAL "QPRC0" -->
|
|
<peripheral>
|
|
<name>QPRC0</name>
|
|
<description>Quadrature Position/Revolution Counter 0</description>
|
|
<groupName>QPRC0</groupName>
|
|
<baseAddress>0x40026000</baseAddress>
|
|
<!-- ADDRESS BLOCK -->
|
|
<addressBlock>
|
|
<offset>0x0</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x4</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x8</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0xC</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x10</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x14</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x18</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x1C</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x3C</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<!-- INTERRUPT "DTIM_QDU" -->
|
|
<interrupt>
|
|
<name>DTIM_QDU</name>
|
|
<value>6</value>
|
|
</interrupt>
|
|
<!-- REGISTERS -->
|
|
<registers>
|
|
<!-- REGISTER "QPCR" -->
|
|
<register>
|
|
<name>QPCR</name>
|
|
<description>QPRC Position Count Register</description>
|
|
<addressOffset>0x0</addressOffset>
|
|
<size>16</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<resetMask>0xFFFF</resetMask>
|
|
</register>
|
|
<!-- REGISTER "QRCR" -->
|
|
<register>
|
|
<name>QRCR</name>
|
|
<description>QPRC Revolution Count Register</description>
|
|
<addressOffset>0x4</addressOffset>
|
|
<size>16</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<resetMask>0xFFFF</resetMask>
|
|
</register>
|
|
<!-- REGISTER "QPCCR" -->
|
|
<register>
|
|
<name>QPCCR</name>
|
|
<description>QPRC Position Counter Compare Register</description>
|
|
<addressOffset>0x8</addressOffset>
|
|
<size>16</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<resetMask>0xFFFF</resetMask>
|
|
</register>
|
|
<!-- REGISTER "QPRCR" -->
|
|
<register>
|
|
<name>QPRCR</name>
|
|
<description>QPRC Position and Revolution Counter Compare Register</description>
|
|
<addressOffset>0xC</addressOffset>
|
|
<size>16</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<resetMask>0xFFFF</resetMask>
|
|
</register>
|
|
<!-- REGISTER "QCRH" -->
|
|
<register>
|
|
<name>QCRH</name>
|
|
<description>High-Order Bytes of QPRC Control Register</description>
|
|
<addressOffset>0x19</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0xFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "CGE" -->
|
|
<field>
|
|
<name>CGE</name>
|
|
<description>Detection edge selection bits</description>
|
|
<lsb>6</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "BES" -->
|
|
<field>
|
|
<name>BES</name>
|
|
<description>BIN detection edge selection bits</description>
|
|
<lsb>4</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "AES" -->
|
|
<field>
|
|
<name>AES</name>
|
|
<description>AIN detection edge selection bits</description>
|
|
<lsb>2</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "PCRM" -->
|
|
<field>
|
|
<name>PCRM</name>
|
|
<description>Position counter reset mask bits</description>
|
|
<lsb>0</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "QCRL" -->
|
|
<register>
|
|
<name>QCRL</name>
|
|
<description>Low-Order Bytes of QPRC Control Register</description>
|
|
<addressOffset>0x18</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0xFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "SWAP" -->
|
|
<field>
|
|
<name>SWAP</name>
|
|
<description>Swap bit</description>
|
|
<lsb>7</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "RSEL" -->
|
|
<field>
|
|
<name>RSEL</name>
|
|
<description>Register function selection bit</description>
|
|
<lsb>6</lsb>
|
|
<msb>6</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "CGSC" -->
|
|
<field>
|
|
<name>CGSC</name>
|
|
<description>Count clear or gate selection bit</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "PSTP" -->
|
|
<field>
|
|
<name>PSTP</name>
|
|
<description>Position counter stop bit</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "RCM" -->
|
|
<field>
|
|
<name>RCM</name>
|
|
<description>Revolution counter mode bits</description>
|
|
<lsb>2</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "PCM" -->
|
|
<field>
|
|
<name>PCM</name>
|
|
<description>Position counter mode bits</description>
|
|
<lsb>0</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "QECR" -->
|
|
<register>
|
|
<name>QECR</name>
|
|
<description>QPRC Extension Control Register</description>
|
|
<addressOffset>0x1C</addressOffset>
|
|
<size>16</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<resetMask>0x0007</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "ORNGIE" -->
|
|
<field>
|
|
<name>ORNGIE</name>
|
|
<description>Outrange interrupt enable bit</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "ORNGF" -->
|
|
<field>
|
|
<name>ORNGF</name>
|
|
<description>Outrange interrupt request flag bit</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "ORNGMD" -->
|
|
<field>
|
|
<name>ORNGMD</name>
|
|
<description>Outrange mode selection bit</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "QICRL" -->
|
|
<register>
|
|
<name>QICRL</name>
|
|
<description>Low-Order Bytes of QPRC Interrupt Control Register</description>
|
|
<addressOffset>0x14</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0xFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "ZIIF" -->
|
|
<field>
|
|
<name>ZIIF</name>
|
|
<description>Zero index interrupt request flag bit</description>
|
|
<lsb>7</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "OFDF" -->
|
|
<field>
|
|
<name>OFDF</name>
|
|
<description>Overflow interrupt request flag bit</description>
|
|
<lsb>6</lsb>
|
|
<msb>6</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "UFDF" -->
|
|
<field>
|
|
<name>UFDF</name>
|
|
<description>Underflow interrupt request flag bit</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "OUZIE" -->
|
|
<field>
|
|
<name>OUZIE</name>
|
|
<description>Overflow@ underflow@ or zero index interrupt enable bit</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "QPRCMF" -->
|
|
<field>
|
|
<name>QPRCMF</name>
|
|
<description>PC and RC match interrupt request flag bit</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "QPRCMIE" -->
|
|
<field>
|
|
<name>QPRCMIE</name>
|
|
<description>PC and RC match interrupt enable bit</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "QPCMF" -->
|
|
<field>
|
|
<name>QPCMF</name>
|
|
<description>PC match interrupt request flag bit</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "QPCMIE" -->
|
|
<field>
|
|
<name>QPCMIE</name>
|
|
<description>PC match interrupt enable bit</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "QICRH" -->
|
|
<register>
|
|
<name>QICRH</name>
|
|
<description>High-Order Bytes of QPRC Interrupt Control Register</description>
|
|
<addressOffset>0x15</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0x3F</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "QPCNRCMF" -->
|
|
<field>
|
|
<name>QPCNRCMF</name>
|
|
<description>PC match and RC match interrupt request flag bit</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "QPCNRCMIE" -->
|
|
<field>
|
|
<name>QPCNRCMIE</name>
|
|
<description>PC match and RC match interrupt enable bit</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "DIROU" -->
|
|
<field>
|
|
<name>DIROU</name>
|
|
<description>Last position counter flow direction bit</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "DIRPC" -->
|
|
<field>
|
|
<name>DIRPC</name>
|
|
<description>Last position counter direction bit</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "CDCF" -->
|
|
<field>
|
|
<name>CDCF</name>
|
|
<description>Count inversion interrupt request flag bit</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "CDCIE" -->
|
|
<field>
|
|
<name>CDCIE</name>
|
|
<description>Count inversion interrupt enable bit</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "QMPR" -->
|
|
<register>
|
|
<name>QMPR</name>
|
|
<description>QPRC Maximum Position Register</description>
|
|
<addressOffset>0x10</addressOffset>
|
|
<size>16</size>
|
|
<access>read-write</access>
|
|
<resetValue>0xFFFF</resetValue>
|
|
<resetMask>0xFFFF</resetMask>
|
|
</register>
|
|
<!-- REGISTER "QPRCRR" -->
|
|
<register>
|
|
<name>QPRCRR</name>
|
|
<description>Quad Counter Position Rotation Count Register</description>
|
|
<addressOffset>0x3C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0xFFFFFFFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "QRCRR" -->
|
|
<field>
|
|
<name>QRCRR</name>
|
|
<description>Quad counter rotation count display bit</description>
|
|
<lsb>16</lsb>
|
|
<msb>31</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "QPCRR" -->
|
|
<field>
|
|
<name>QPCRR</name>
|
|
<description>Quad counter position count display bit</description>
|
|
<lsb>0</lsb>
|
|
<msb>15</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral>
|
|
<!-- PERIPHERAL "QPRC0_NF" -->
|
|
<peripheral>
|
|
<name>QPRC0_NF</name>
|
|
<description>Quadrature Position/Revolution Counter 0 Noise Filter</description>
|
|
<groupName>QPRC0_NF</groupName>
|
|
<baseAddress>0x40026100</baseAddress>
|
|
<!-- ADDRESS BLOCK -->
|
|
<addressBlock>
|
|
<offset>0x0</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x4</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x8</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<!-- REGISTERS -->
|
|
<registers>
|
|
<!-- REGISTER "NFCTLA" -->
|
|
<register>
|
|
<name>NFCTLA</name>
|
|
<description>AIN Noise Control Register</description>
|
|
<addressOffset>0x0</addressOffset>
|
|
<size>16</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<resetMask>0x0037</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "AINMD" -->
|
|
<field>
|
|
<name>AINMD</name>
|
|
<description>Mask bit</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "AINLV" -->
|
|
<field>
|
|
<name>AINLV</name>
|
|
<description>Input invert bit</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "AINNWS" -->
|
|
<field>
|
|
<name>AINNWS</name>
|
|
<description>Noise filter width select bits</description>
|
|
<lsb>0</lsb>
|
|
<msb>2</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "NFCTLB" -->
|
|
<register>
|
|
<name>NFCTLB</name>
|
|
<description>BIN Noise Control Register</description>
|
|
<addressOffset>0x4</addressOffset>
|
|
<size>16</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<resetMask>0x0037</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "BINMD" -->
|
|
<field>
|
|
<name>BINMD</name>
|
|
<description>Mask bit</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "BINLV" -->
|
|
<field>
|
|
<name>BINLV</name>
|
|
<description>Input invert bit</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "BINNWS" -->
|
|
<field>
|
|
<name>BINNWS</name>
|
|
<description>Noise filter width select bits</description>
|
|
<lsb>0</lsb>
|
|
<msb>2</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "NFCTLZ" -->
|
|
<register>
|
|
<name>NFCTLZ</name>
|
|
<description>ZIN Noise Control Register</description>
|
|
<addressOffset>0x8</addressOffset>
|
|
<size>16</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<resetMask>0x0037</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "ZINMD" -->
|
|
<field>
|
|
<name>ZINMD</name>
|
|
<description>Mask bit</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "ZINLV" -->
|
|
<field>
|
|
<name>ZINLV</name>
|
|
<description>Input invert bit</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "ZINNWS" -->
|
|
<field>
|
|
<name>ZINNWS</name>
|
|
<description>Noise filter width select bits</description>
|
|
<lsb>0</lsb>
|
|
<msb>2</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral>
|
|
<!-- PERIPHERAL "ADC0" -->
|
|
<peripheral>
|
|
<name>ADC0</name>
|
|
<description>ADC0 Registers</description>
|
|
<groupName>ADC0</groupName>
|
|
<baseAddress>0x40027000</baseAddress>
|
|
<!-- ADDRESS BLOCK -->
|
|
<addressBlock>
|
|
<offset>0x0</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x8</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0xC</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x10</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x14</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x18</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x1C</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x20</offset>
|
|
<size>0x1</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x24</offset>
|
|
<size>0x1</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x26</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x28</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x2C</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x30</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x34</offset>
|
|
<size>0x1</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x38</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x3C</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x44</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x48</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x4C</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x50</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<!-- INTERRUPT "ADC0" -->
|
|
<interrupt>
|
|
<name>ADC0</name>
|
|
<value>25</value>
|
|
</interrupt>
|
|
<!-- REGISTERS -->
|
|
<registers>
|
|
<!-- REGISTER "ADCR" -->
|
|
<register>
|
|
<name>ADCR</name>
|
|
<description>A/D Control Register</description>
|
|
<addressOffset>0x1</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0xEF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "SCIF" -->
|
|
<field>
|
|
<name>SCIF</name>
|
|
<description>Scan conversion interrupt request bit</description>
|
|
<lsb>7</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "PCIF" -->
|
|
<field>
|
|
<name>PCIF</name>
|
|
<description>Priority conversion interrupt request bit</description>
|
|
<lsb>6</lsb>
|
|
<msb>6</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "CMPIF" -->
|
|
<field>
|
|
<name>CMPIF</name>
|
|
<description>Conversion result comparison interrupt request bit</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "SCIE" -->
|
|
<field>
|
|
<name>SCIE</name>
|
|
<description>Scan conversion interrupt enable bit</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "PCIE" -->
|
|
<field>
|
|
<name>PCIE</name>
|
|
<description>Priority conversion interrupt enable bit</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "CMPIE" -->
|
|
<field>
|
|
<name>CMPIE</name>
|
|
<description>Conversion result comparison interrupt enable bit</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "OVRIE" -->
|
|
<field>
|
|
<name>OVRIE</name>
|
|
<description>FIFO overrun interrupt enable bit</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "ADSR" -->
|
|
<register>
|
|
<name>ADSR</name>
|
|
<description>A/D Status Register</description>
|
|
<addressOffset>0x0</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0xC7</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "ADSTP" -->
|
|
<field>
|
|
<name>ADSTP</name>
|
|
<description>A/D conversion forced stop bit</description>
|
|
<lsb>7</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "FDAS" -->
|
|
<field>
|
|
<name>FDAS</name>
|
|
<description>FIFO data placement selection bit</description>
|
|
<lsb>6</lsb>
|
|
<msb>6</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "PCNS" -->
|
|
<field>
|
|
<name>PCNS</name>
|
|
<description>Priority conversion pending flag</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "PCS" -->
|
|
<field>
|
|
<name>PCS</name>
|
|
<description>Priority conversion status flag</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "SCS" -->
|
|
<field>
|
|
<name>SCS</name>
|
|
<description>Scan conversion status flag</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "SCCR" -->
|
|
<register>
|
|
<name>SCCR</name>
|
|
<description>Scan Conversion Control Register</description>
|
|
<addressOffset>0x9</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x80</resetValue>
|
|
<resetMask>0xF7</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "SEMP" -->
|
|
<field>
|
|
<name>SEMP</name>
|
|
<description>Scan conversion FIFO empty bit</description>
|
|
<lsb>7</lsb>
|
|
<msb>7</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "SFUL" -->
|
|
<field>
|
|
<name>SFUL</name>
|
|
<description>Scan conversion FIFO full bit</description>
|
|
<lsb>6</lsb>
|
|
<msb>6</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "SOVR" -->
|
|
<field>
|
|
<name>SOVR</name>
|
|
<description>Scan conversion overrun flag</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "SFCLR" -->
|
|
<field>
|
|
<name>SFCLR</name>
|
|
<description>Scan conversion FIFO clear bit</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "RPT" -->
|
|
<field>
|
|
<name>RPT</name>
|
|
<description>Scan conversion repeat bit</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "SHEN" -->
|
|
<field>
|
|
<name>SHEN</name>
|
|
<description>Scan conversion timer start enable bit</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "SSTR" -->
|
|
<field>
|
|
<name>SSTR</name>
|
|
<description>Scan conversion start bit</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "SFNS" -->
|
|
<register>
|
|
<name>SFNS</name>
|
|
<description>Scan Conversion FIFO Stage Count Setup Register</description>
|
|
<addressOffset>0x8</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0x0F</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "SFS" -->
|
|
<field>
|
|
<name>SFS</name>
|
|
<description>Scan conversion FIFO stage count setting bits</description>
|
|
<lsb>0</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "SCFD" -->
|
|
<register>
|
|
<name>SCFD</name>
|
|
<description>Scan Conversion FIFO Data Register</description>
|
|
<addressOffset>0xC</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00001000</resetValue>
|
|
<resetMask>0xFFF0131F</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "SD" -->
|
|
<field>
|
|
<name>SD</name>
|
|
<description>Scan conversion result</description>
|
|
<lsb>20</lsb>
|
|
<msb>31</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "INVL" -->
|
|
<field>
|
|
<name>INVL</name>
|
|
<description>A/D conversion result disable bit</description>
|
|
<lsb>12</lsb>
|
|
<msb>12</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "RS" -->
|
|
<field>
|
|
<name>RS</name>
|
|
<description>Scan conversion start factor</description>
|
|
<lsb>8</lsb>
|
|
<msb>9</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "SC" -->
|
|
<field>
|
|
<name>SC</name>
|
|
<description>Conversion input channel bits</description>
|
|
<lsb>0</lsb>
|
|
<msb>4</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "SCIS3" -->
|
|
<register>
|
|
<name>SCIS3</name>
|
|
<description>Scan Conversion Input Selection Register 3</description>
|
|
<addressOffset>0x11</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0xFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "AN31" -->
|
|
<field>
|
|
<name>AN31</name>
|
|
<description>AN31 analog input selection bit</description>
|
|
<lsb>7</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "AN30" -->
|
|
<field>
|
|
<name>AN30</name>
|
|
<description>AN30 analog input selection bit</description>
|
|
<lsb>6</lsb>
|
|
<msb>6</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "AN29" -->
|
|
<field>
|
|
<name>AN29</name>
|
|
<description>AN29 analog input selection bit</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "AN28" -->
|
|
<field>
|
|
<name>AN28</name>
|
|
<description>AN28 analog input selection bit</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "AN27" -->
|
|
<field>
|
|
<name>AN27</name>
|
|
<description>AN27 analog input selection bit</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "AN26" -->
|
|
<field>
|
|
<name>AN26</name>
|
|
<description>AN26 analog input selection bit</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "AN25" -->
|
|
<field>
|
|
<name>AN25</name>
|
|
<description>AN25 analog input selection bit</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "AN24" -->
|
|
<field>
|
|
<name>AN24</name>
|
|
<description>AN24 analog input selection bit</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "SCIS2" -->
|
|
<register>
|
|
<name>SCIS2</name>
|
|
<description>Scan Conversion Input Selection Register 2</description>
|
|
<addressOffset>0x10</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0xFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "AN23" -->
|
|
<field>
|
|
<name>AN23</name>
|
|
<description>AN23 analog input selection bit</description>
|
|
<lsb>7</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "AN22" -->
|
|
<field>
|
|
<name>AN22</name>
|
|
<description>AN22 analog input selection bit</description>
|
|
<lsb>6</lsb>
|
|
<msb>6</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "AN21" -->
|
|
<field>
|
|
<name>AN21</name>
|
|
<description>AN21 analog input selection bit</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "AN20" -->
|
|
<field>
|
|
<name>AN20</name>
|
|
<description>AN20 analog input selection bit</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "AN19" -->
|
|
<field>
|
|
<name>AN19</name>
|
|
<description>AN19 analog input selection bit</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "AN18" -->
|
|
<field>
|
|
<name>AN18</name>
|
|
<description>AN18 analog input selection bit</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "AN17" -->
|
|
<field>
|
|
<name>AN17</name>
|
|
<description>AN17 analog input selection bit</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "AN16" -->
|
|
<field>
|
|
<name>AN16</name>
|
|
<description>AN16 analog input selection bit</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "SCIS1" -->
|
|
<register>
|
|
<name>SCIS1</name>
|
|
<description>Scan Conversion Input Selection Register 1</description>
|
|
<addressOffset>0x15</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0xFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "AN15" -->
|
|
<field>
|
|
<name>AN15</name>
|
|
<description>AN15 analog input selection bit</description>
|
|
<lsb>7</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "AN14" -->
|
|
<field>
|
|
<name>AN14</name>
|
|
<description>AN14 analog input selection bit</description>
|
|
<lsb>6</lsb>
|
|
<msb>6</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "AN13" -->
|
|
<field>
|
|
<name>AN13</name>
|
|
<description>AN13 analog input selection bit</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "AN12" -->
|
|
<field>
|
|
<name>AN12</name>
|
|
<description>AN12 analog input selection bit</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "AN11" -->
|
|
<field>
|
|
<name>AN11</name>
|
|
<description>AN11 analog input selection bit</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "AN10" -->
|
|
<field>
|
|
<name>AN10</name>
|
|
<description>AN10 analog input selection bit</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "AN9" -->
|
|
<field>
|
|
<name>AN9</name>
|
|
<description>AN9 analog input selection bit</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "AN8" -->
|
|
<field>
|
|
<name>AN8</name>
|
|
<description>AN8 analog input selection bit</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "SCIS0" -->
|
|
<register>
|
|
<name>SCIS0</name>
|
|
<description>Scan Conversion Input Selection Register 0</description>
|
|
<addressOffset>0x14</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0xFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "AN7" -->
|
|
<field>
|
|
<name>AN7</name>
|
|
<description>AN7 analog input selection bit</description>
|
|
<lsb>7</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "AN6" -->
|
|
<field>
|
|
<name>AN6</name>
|
|
<description>AN6 analog input selection bit</description>
|
|
<lsb>6</lsb>
|
|
<msb>6</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "AN5" -->
|
|
<field>
|
|
<name>AN5</name>
|
|
<description>AN5 analog input selection bit</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "AN4" -->
|
|
<field>
|
|
<name>AN4</name>
|
|
<description>AN4 analog input selection bit</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "AN3" -->
|
|
<field>
|
|
<name>AN3</name>
|
|
<description>AN3 analog input selection bit</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "AN2" -->
|
|
<field>
|
|
<name>AN2</name>
|
|
<description>AN2 analog input selection bit</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "AN1" -->
|
|
<field>
|
|
<name>AN1</name>
|
|
<description>AN1 analog input selection bit</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "AN0" -->
|
|
<field>
|
|
<name>AN0</name>
|
|
<description>AN0 analog input selection bit</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "PFNS" -->
|
|
<register>
|
|
<name>PFNS</name>
|
|
<description>Priority Conversion FIFO Stage Count Setup Register</description>
|
|
<addressOffset>0x18</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0x33</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "TEST" -->
|
|
<field>
|
|
<name>TEST</name>
|
|
<description>Test bits</description>
|
|
<lsb>4</lsb>
|
|
<msb>5</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "PFS" -->
|
|
<field>
|
|
<name>PFS</name>
|
|
<description>Priority conversion FIFO stage count setting bits</description>
|
|
<lsb>0</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "PCCR" -->
|
|
<register>
|
|
<name>PCCR</name>
|
|
<description>Priority Conversion Control Register</description>
|
|
<addressOffset>0x19</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x80</resetValue>
|
|
<resetMask>0xFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "PEMP" -->
|
|
<field>
|
|
<name>PEMP</name>
|
|
<description>Priority conversion FIFO empty bit</description>
|
|
<lsb>7</lsb>
|
|
<msb>7</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "PFUL" -->
|
|
<field>
|
|
<name>PFUL</name>
|
|
<description>Priority conversion FIFO full bit</description>
|
|
<lsb>6</lsb>
|
|
<msb>6</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "POVR" -->
|
|
<field>
|
|
<name>POVR</name>
|
|
<description>Priority conversion overrun flag</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "PFCLR" -->
|
|
<field>
|
|
<name>PFCLR</name>
|
|
<description>Priority conversion FIFO clear bit</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "ESCE" -->
|
|
<field>
|
|
<name>ESCE</name>
|
|
<description>External trigger analog input selection bit</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "PEEN" -->
|
|
<field>
|
|
<name>PEEN</name>
|
|
<description>Priority conversion external start enable bit</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "PHEN" -->
|
|
<field>
|
|
<name>PHEN</name>
|
|
<description>Priority conversion timer start enable bit</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "PSTR" -->
|
|
<field>
|
|
<name>PSTR</name>
|
|
<description>Priority conversion start bit</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "PCFD" -->
|
|
<register>
|
|
<name>PCFD</name>
|
|
<description>Priority Conversion FIFO Data Register</description>
|
|
<addressOffset>0x1C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00001000</resetValue>
|
|
<resetMask>0xFFF0171F</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "PD" -->
|
|
<field>
|
|
<name>PD</name>
|
|
<description>Priority conversion result</description>
|
|
<lsb>20</lsb>
|
|
<msb>31</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "INVL" -->
|
|
<field>
|
|
<name>INVL</name>
|
|
<description>A/D conversion result disable bit</description>
|
|
<lsb>12</lsb>
|
|
<msb>12</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "RS" -->
|
|
<field>
|
|
<name>RS</name>
|
|
<description>Scan conversion start factor</description>
|
|
<lsb>8</lsb>
|
|
<msb>10</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "PC" -->
|
|
<field>
|
|
<name>PC</name>
|
|
<description>Conversion input channel bits</description>
|
|
<lsb>0</lsb>
|
|
<msb>4</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "PCIS" -->
|
|
<register>
|
|
<name>PCIS</name>
|
|
<description>Priority Conversion Input Selection Register</description>
|
|
<addressOffset>0x20</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0xFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "P2A" -->
|
|
<field>
|
|
<name>P2A</name>
|
|
<description>Priority level 2 analog input selection</description>
|
|
<lsb>3</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "P1A" -->
|
|
<field>
|
|
<name>P1A</name>
|
|
<description>Priority level 1 analog input selection</description>
|
|
<lsb>0</lsb>
|
|
<msb>2</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "CMPCR" -->
|
|
<register>
|
|
<name>CMPCR</name>
|
|
<description>A/D Comparison Control Register</description>
|
|
<addressOffset>0x24</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0xFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "CMPEN" -->
|
|
<field>
|
|
<name>CMPEN</name>
|
|
<description>Conversion result comparison function operation enable bit</description>
|
|
<lsb>7</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "CMD1" -->
|
|
<field>
|
|
<name>CMD1</name>
|
|
<description>Comparison mode 1</description>
|
|
<lsb>6</lsb>
|
|
<msb>6</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "CMD0" -->
|
|
<field>
|
|
<name>CMD0</name>
|
|
<description>Comparison mode 0</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "CCH" -->
|
|
<field>
|
|
<name>CCH</name>
|
|
<description>Comparison target analog input channel</description>
|
|
<lsb>0</lsb>
|
|
<msb>4</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "CMPD" -->
|
|
<register>
|
|
<name>CMPD</name>
|
|
<description>A/D Comparison Value Setup Register</description>
|
|
<addressOffset>0x26</addressOffset>
|
|
<size>16</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<resetMask>0xFFC0</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "CMAD" -->
|
|
<field>
|
|
<name>CMAD</name>
|
|
<description>A/D conversion compare value setting bits</description>
|
|
<lsb>6</lsb>
|
|
<msb>15</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "ADSS3" -->
|
|
<register>
|
|
<name>ADSS3</name>
|
|
<description>Sampling Time Selection Register 3</description>
|
|
<addressOffset>0x29</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0xFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "TS31" -->
|
|
<field>
|
|
<name>TS31</name>
|
|
<description>AN31 sampling time selection bit</description>
|
|
<lsb>7</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TS30" -->
|
|
<field>
|
|
<name>TS30</name>
|
|
<description>AN30 sampling time selection bit</description>
|
|
<lsb>6</lsb>
|
|
<msb>6</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TS29" -->
|
|
<field>
|
|
<name>TS29</name>
|
|
<description>AN29 sampling time selection bit</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TS28" -->
|
|
<field>
|
|
<name>TS28</name>
|
|
<description>AN28 sampling time selection bit</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TS27" -->
|
|
<field>
|
|
<name>TS27</name>
|
|
<description>AN27 sampling time selection bit</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TS26" -->
|
|
<field>
|
|
<name>TS26</name>
|
|
<description>AN26 sampling time selection bit</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TS25" -->
|
|
<field>
|
|
<name>TS25</name>
|
|
<description>AN25 sampling time selection bit</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TS24" -->
|
|
<field>
|
|
<name>TS24</name>
|
|
<description>AN24 sampling time selection bit</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "ADSS2" -->
|
|
<register>
|
|
<name>ADSS2</name>
|
|
<description>Sampling Time Selection Register 2</description>
|
|
<addressOffset>0x28</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0xFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "TS23" -->
|
|
<field>
|
|
<name>TS23</name>
|
|
<description>AN23 sampling time selection bit</description>
|
|
<lsb>7</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TS22" -->
|
|
<field>
|
|
<name>TS22</name>
|
|
<description>AN22 sampling time selection bit</description>
|
|
<lsb>6</lsb>
|
|
<msb>6</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TS21" -->
|
|
<field>
|
|
<name>TS21</name>
|
|
<description>AN21 sampling time selection bit</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TS20" -->
|
|
<field>
|
|
<name>TS20</name>
|
|
<description>AN20 sampling time selection bit</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TS19" -->
|
|
<field>
|
|
<name>TS19</name>
|
|
<description>AN19 sampling time selection bit</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TS18" -->
|
|
<field>
|
|
<name>TS18</name>
|
|
<description>AN18 sampling time selection bit</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TS17" -->
|
|
<field>
|
|
<name>TS17</name>
|
|
<description>AN17 sampling time selection bit</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TS16" -->
|
|
<field>
|
|
<name>TS16</name>
|
|
<description>AN16 sampling time selection bit</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "ADSS1" -->
|
|
<register>
|
|
<name>ADSS1</name>
|
|
<description>Sampling Time Selection Register 1</description>
|
|
<addressOffset>0x2D</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0xFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "TS15" -->
|
|
<field>
|
|
<name>TS15</name>
|
|
<description>AN15 sampling time selection bit</description>
|
|
<lsb>7</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TS14" -->
|
|
<field>
|
|
<name>TS14</name>
|
|
<description>AN14 sampling time selection bit</description>
|
|
<lsb>6</lsb>
|
|
<msb>6</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TS13" -->
|
|
<field>
|
|
<name>TS13</name>
|
|
<description>AN13 sampling time selection bit</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TS12" -->
|
|
<field>
|
|
<name>TS12</name>
|
|
<description>AN12 sampling time selection bit</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TS11" -->
|
|
<field>
|
|
<name>TS11</name>
|
|
<description>AN11 sampling time selection bit</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TS10" -->
|
|
<field>
|
|
<name>TS10</name>
|
|
<description>AN10 sampling time selection bit</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TS9" -->
|
|
<field>
|
|
<name>TS9</name>
|
|
<description>AN9 sampling time selection bit</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TS8" -->
|
|
<field>
|
|
<name>TS8</name>
|
|
<description>AN8 sampling time selection bit</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "ADSS0" -->
|
|
<register>
|
|
<name>ADSS0</name>
|
|
<description>Sampling Time Selection Register 0</description>
|
|
<addressOffset>0x2C</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0xFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "TS7" -->
|
|
<field>
|
|
<name>TS7</name>
|
|
<description>AN7 sampling time selection bit</description>
|
|
<lsb>7</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TS6" -->
|
|
<field>
|
|
<name>TS6</name>
|
|
<description>AN6 sampling time selection bit</description>
|
|
<lsb>6</lsb>
|
|
<msb>6</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TS5" -->
|
|
<field>
|
|
<name>TS5</name>
|
|
<description>AN5 sampling time selection bit</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TS4" -->
|
|
<field>
|
|
<name>TS4</name>
|
|
<description>AN4 sampling time selection bit</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TS3" -->
|
|
<field>
|
|
<name>TS3</name>
|
|
<description>AN3 sampling time selection bit</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TS2" -->
|
|
<field>
|
|
<name>TS2</name>
|
|
<description>AN2 sampling time selection bit</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TS1" -->
|
|
<field>
|
|
<name>TS1</name>
|
|
<description>AN1 sampling time selection bit</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TS0" -->
|
|
<field>
|
|
<name>TS0</name>
|
|
<description>AN0 sampling time selection bit</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "ADST1" -->
|
|
<register>
|
|
<name>ADST1</name>
|
|
<description>Sampling Time Setup Register 1</description>
|
|
<addressOffset>0x30</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x10</resetValue>
|
|
<resetMask>0xFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "STX1" -->
|
|
<field>
|
|
<name>STX1</name>
|
|
<description>Sampling time N times setting bits</description>
|
|
<lsb>5</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "ST1" -->
|
|
<field>
|
|
<name>ST1</name>
|
|
<description>Sampling time setting bits</description>
|
|
<lsb>0</lsb>
|
|
<msb>4</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "ADST0" -->
|
|
<register>
|
|
<name>ADST0</name>
|
|
<description>Sampling Time Setup Register 0</description>
|
|
<addressOffset>0x31</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x10</resetValue>
|
|
<resetMask>0xFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "STX0" -->
|
|
<field>
|
|
<name>STX0</name>
|
|
<description>Sampling time N times setting bits</description>
|
|
<lsb>5</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "ST0" -->
|
|
<field>
|
|
<name>ST0</name>
|
|
<description>Sampling time setting bits</description>
|
|
<lsb>0</lsb>
|
|
<msb>4</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "ADCT" -->
|
|
<register>
|
|
<name>ADCT</name>
|
|
<description>Frequency Division Ratio Setup Register</description>
|
|
<addressOffset>0x34</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x07</resetValue>
|
|
<resetMask>0xFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "CT" -->
|
|
<field>
|
|
<name>CT</name>
|
|
<description>Frequency division ratio setting bits</description>
|
|
<lsb>0</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "PRTSL" -->
|
|
<register>
|
|
<name>PRTSL</name>
|
|
<description>Priority Conversion Timer Trigger Selection Register</description>
|
|
<addressOffset>0x38</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0x0F</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "PRTSL" -->
|
|
<field>
|
|
<name>PRTSL</name>
|
|
<description>Priority conversion timer trigger selection bits</description>
|
|
<lsb>0</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "SCTSL" -->
|
|
<register>
|
|
<name>SCTSL</name>
|
|
<description>Scan Conversion Timer Trigger Selection Register</description>
|
|
<addressOffset>0x39</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0x0F</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "SCTSL" -->
|
|
<field>
|
|
<name>SCTSL</name>
|
|
<description>Scan conversion timer trigger selection bits</description>
|
|
<lsb>0</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "ADCEN" -->
|
|
<register>
|
|
<name>ADCEN</name>
|
|
<description>A/D Operation Enable Setup Register</description>
|
|
<addressOffset>0x3C</addressOffset>
|
|
<size>16</size>
|
|
<access>read-write</access>
|
|
<resetValue>0xFF00</resetValue>
|
|
<resetMask>0xFF03</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "ENBLTIME" -->
|
|
<field>
|
|
<name>ENBLTIME</name>
|
|
<description>Operation enable state transition cycle selection bits</description>
|
|
<lsb>8</lsb>
|
|
<msb>15</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "READY" -->
|
|
<field>
|
|
<name>READY</name>
|
|
<description>A/D operation enable state bit</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "ENBL" -->
|
|
<field>
|
|
<name>ENBL</name>
|
|
<description>A/D operation enable bit</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "WCMRCIF" -->
|
|
<register>
|
|
<name>WCMRCIF</name>
|
|
<description>Range Comparison Flag Register</description>
|
|
<addressOffset>0x44</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000001</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "RCINT" -->
|
|
<field>
|
|
<name>RCINT</name>
|
|
<description>Range comparison interrupt factor flag bit</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "WCMRCOT" -->
|
|
<register>
|
|
<name>WCMRCOT</name>
|
|
<description>Range Comparison Threshold Excess Flag Register</description>
|
|
<addressOffset>0x48</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000001</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "RCOOF" -->
|
|
<field>
|
|
<name>RCOOF</name>
|
|
<description>Threshold excess flag bit</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "WCMPCR" -->
|
|
<register>
|
|
<name>WCMPCR</name>
|
|
<description>Range Comparison Control Register</description>
|
|
<addressOffset>0x4C</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x20</resetValue>
|
|
<resetMask>0xFC</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "RCOCD" -->
|
|
<field>
|
|
<name>RCOCD</name>
|
|
<description>Continuous detection specification count/state indication bits</description>
|
|
<lsb>5</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "RCOIRS" -->
|
|
<field>
|
|
<name>RCOIRS</name>
|
|
<description>Selection bit of within-range and out-of- range confirmation</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "RCOIE" -->
|
|
<field>
|
|
<name>RCOIE</name>
|
|
<description>Range comparison interrupt request enable bit</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "RCOE" -->
|
|
<field>
|
|
<name>RCOE</name>
|
|
<description>Range comparison execution enable bit</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "WCMPSR" -->
|
|
<register>
|
|
<name>WCMPSR</name>
|
|
<description>Range Comparison Channel Select Register</description>
|
|
<addressOffset>0x4D</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0x3F</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "WCMD" -->
|
|
<field>
|
|
<name>WCMD</name>
|
|
<description>Comparison mode select bit</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "WCCH" -->
|
|
<field>
|
|
<name>WCCH</name>
|
|
<description>Comparison target analog input channel</description>
|
|
<lsb>0</lsb>
|
|
<msb>4</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "WCMPDL" -->
|
|
<register>
|
|
<name>WCMPDL</name>
|
|
<description>Lower Limit Threshold Setup Register</description>
|
|
<addressOffset>0x50</addressOffset>
|
|
<size>16</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<resetMask>0xFFC0</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "CMLD" -->
|
|
<field>
|
|
<name>CMLD</name>
|
|
<description>Lower limit threshold bits</description>
|
|
<lsb>6</lsb>
|
|
<msb>15</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "WCMPDH" -->
|
|
<register>
|
|
<name>WCMPDH</name>
|
|
<description>Upper Limit Setup Register</description>
|
|
<addressOffset>0x52</addressOffset>
|
|
<size>16</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<resetMask>0xFFC0</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "CMHD" -->
|
|
<field>
|
|
<name>CMHD</name>
|
|
<description>Upper limit threshold bits</description>
|
|
<lsb>6</lsb>
|
|
<msb>15</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral>
|
|
<!-- PERIPHERAL "CRTRIM" -->
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|
<peripheral>
|
|
<name>CRTRIM</name>
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|
<description>CR Trimming Registers</description>
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|
<groupName>CRTRIM</groupName>
|
|
<baseAddress>0x4002E000</baseAddress>
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|
<!-- ADDRESS BLOCK -->
|
|
<addressBlock>
|
|
<offset>0x0</offset>
|
|
<size>0x1</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x4</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x8</offset>
|
|
<size>0x1</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0xC</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
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|
<!-- REGISTERS -->
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|
<registers>
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|
<!-- REGISTER "MCR_PSR" -->
|
|
<register>
|
|
<name>MCR_PSR</name>
|
|
<description>High-speed CR Oscillation Frequency Division Setup Register</description>
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|
<addressOffset>0x0</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x01</resetValue>
|
|
<resetMask>0x07</resetMask>
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|
<!-- FIELDS -->
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|
<fields>
|
|
<!-- FIELD "CSR" -->
|
|
<field>
|
|
<name>CSR</name>
|
|
<description>High-speed CR oscillation frequency division ratio setting bits</description>
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<lsb>0</lsb>
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<msb>2</msb>
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|
<access>read-write</access>
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|
</field>
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|
</fields>
|
|
</register>
|
|
<!-- REGISTER "MCR_FTRM" -->
|
|
<register>
|
|
<name>MCR_FTRM</name>
|
|
<description>High-speed CR Oscillation Frequency Trimming Register</description>
|
|
<addressOffset>0x4</addressOffset>
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|
<size>16</size>
|
|
<access>read-write</access>
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|
<resetValue>0x01EF</resetValue>
|
|
<resetMask>0x03FF</resetMask>
|
|
<!-- FIELDS -->
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|
<fields>
|
|
<!-- FIELD "TRD" -->
|
|
<field>
|
|
<name>TRD</name>
|
|
<description>Frequency trimming setup bits</description>
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<lsb>0</lsb>
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<msb>9</msb>
|
|
<access>read-write</access>
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|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "MCR_TTRM" -->
|
|
<register>
|
|
<name>MCR_TTRM</name>
|
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<description>High-speed CR Oscillation Temperature Trimming Setup Register</description>
|
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<addressOffset>0x8</addressOffset>
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<size>8</size>
|
|
<access>read-write</access>
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<resetValue>0x10</resetValue>
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|
<resetMask>0x1F</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "TRT" -->
|
|
<field>
|
|
<name>TRT</name>
|
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<description>Temperature trimming setup bits</description>
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|
<lsb>0</lsb>
|
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<msb>4</msb>
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<access>read-write</access>
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|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "MCR_RLR" -->
|
|
<register>
|
|
<name>MCR_RLR</name>
|
|
<description>High-Speed CR Oscillation Register Write-Protect Register</description>
|
|
<addressOffset>0xC</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<resetMask>0xFFFFFFFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "TRMLCK" -->
|
|
<field>
|
|
<name>TRMLCK</name>
|
|
<description>Register write-protect bits</description>
|
|
<lsb>0</lsb>
|
|
<msb>31</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral>
|
|
<!-- PERIPHERAL "EXTI" -->
|
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<peripheral>
|
|
<name>EXTI</name>
|
|
<description>External Interrupt and NMI Control</description>
|
|
<groupName>EXTI</groupName>
|
|
<baseAddress>0x40030000</baseAddress>
|
|
<!-- ADDRESS BLOCK -->
|
|
<addressBlock>
|
|
<offset>0x0</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x4</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x8</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0xC</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x10</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x14</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x18</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<!-- INTERRUPT "EXINT0_7" -->
|
|
<interrupt>
|
|
<name>EXINT0_7</name>
|
|
<value>4</value>
|
|
</interrupt>
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<!-- REGISTERS -->
|
|
<registers>
|
|
<!-- REGISTER "ENIR" -->
|
|
<register>
|
|
<name>ENIR</name>
|
|
<description>External Interrupt Enable Register</description>
|
|
<addressOffset>0x0</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0xFFFFFFFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "EN31" -->
|
|
<field>
|
|
<name>EN31</name>
|
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<description>External interrupt Ch.31 enable bit</description>
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<lsb>31</lsb>
|
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<msb>31</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "EN30" -->
|
|
<field>
|
|
<name>EN30</name>
|
|
<description>External interrupt Ch.30 enable bit</description>
|
|
<lsb>30</lsb>
|
|
<msb>30</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "EN29" -->
|
|
<field>
|
|
<name>EN29</name>
|
|
<description>External interrupt Ch.29 enable bit</description>
|
|
<lsb>29</lsb>
|
|
<msb>29</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "EN28" -->
|
|
<field>
|
|
<name>EN28</name>
|
|
<description>External interrupt Ch.28 enable bit</description>
|
|
<lsb>28</lsb>
|
|
<msb>28</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "EN27" -->
|
|
<field>
|
|
<name>EN27</name>
|
|
<description>External interrupt Ch.27 enable bit</description>
|
|
<lsb>27</lsb>
|
|
<msb>27</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "EN26" -->
|
|
<field>
|
|
<name>EN26</name>
|
|
<description>External interrupt Ch.26 enable bit</description>
|
|
<lsb>26</lsb>
|
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<msb>26</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "EN25" -->
|
|
<field>
|
|
<name>EN25</name>
|
|
<description>External interrupt Ch.25 enable bit</description>
|
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<lsb>25</lsb>
|
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<msb>25</msb>
|
|
<access>read-write</access>
|
|
</field>
|
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<!-- FIELD "EN24" -->
|
|
<field>
|
|
<name>EN24</name>
|
|
<description>External interrupt Ch.24 enable bit</description>
|
|
<lsb>24</lsb>
|
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<msb>24</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "EN23" -->
|
|
<field>
|
|
<name>EN23</name>
|
|
<description>External interrupt Ch.23 enable bit</description>
|
|
<lsb>23</lsb>
|
|
<msb>23</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "EN22" -->
|
|
<field>
|
|
<name>EN22</name>
|
|
<description>External interrupt Ch.22 enable bit</description>
|
|
<lsb>22</lsb>
|
|
<msb>22</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "EN21" -->
|
|
<field>
|
|
<name>EN21</name>
|
|
<description>External interrupt Ch.21 enable bit</description>
|
|
<lsb>21</lsb>
|
|
<msb>21</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "EN20" -->
|
|
<field>
|
|
<name>EN20</name>
|
|
<description>External interrupt Ch.20 enable bit</description>
|
|
<lsb>20</lsb>
|
|
<msb>20</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "EN19" -->
|
|
<field>
|
|
<name>EN19</name>
|
|
<description>External interrupt Ch.19 enable bit</description>
|
|
<lsb>19</lsb>
|
|
<msb>19</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "EN18" -->
|
|
<field>
|
|
<name>EN18</name>
|
|
<description>External interrupt Ch.18 enable bit</description>
|
|
<lsb>18</lsb>
|
|
<msb>18</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "EN17" -->
|
|
<field>
|
|
<name>EN17</name>
|
|
<description>External interrupt Ch.17 enable bit</description>
|
|
<lsb>17</lsb>
|
|
<msb>17</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "EN16" -->
|
|
<field>
|
|
<name>EN16</name>
|
|
<description>External interrupt Ch.16 enable bit</description>
|
|
<lsb>16</lsb>
|
|
<msb>16</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "EN15" -->
|
|
<field>
|
|
<name>EN15</name>
|
|
<description>External interrupt Ch.15 enable bit</description>
|
|
<lsb>15</lsb>
|
|
<msb>15</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "EN14" -->
|
|
<field>
|
|
<name>EN14</name>
|
|
<description>External interrupt Ch.14 enable bit</description>
|
|
<lsb>14</lsb>
|
|
<msb>14</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "EN13" -->
|
|
<field>
|
|
<name>EN13</name>
|
|
<description>External interrupt Ch.13 enable bit</description>
|
|
<lsb>13</lsb>
|
|
<msb>13</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "EN12" -->
|
|
<field>
|
|
<name>EN12</name>
|
|
<description>External interrupt Ch.12 enable bit</description>
|
|
<lsb>12</lsb>
|
|
<msb>12</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "EN11" -->
|
|
<field>
|
|
<name>EN11</name>
|
|
<description>External interrupt Ch.11 enable bit</description>
|
|
<lsb>11</lsb>
|
|
<msb>11</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "EN10" -->
|
|
<field>
|
|
<name>EN10</name>
|
|
<description>External interrupt Ch.10 enable bit</description>
|
|
<lsb>10</lsb>
|
|
<msb>10</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "EN9" -->
|
|
<field>
|
|
<name>EN9</name>
|
|
<description>External interrupt Ch.9 enable bit</description>
|
|
<lsb>9</lsb>
|
|
<msb>9</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "EN8" -->
|
|
<field>
|
|
<name>EN8</name>
|
|
<description>External interrupt Ch.8 enable bit</description>
|
|
<lsb>8</lsb>
|
|
<msb>8</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "EN7" -->
|
|
<field>
|
|
<name>EN7</name>
|
|
<description>External interrupt Ch.7 enable bit</description>
|
|
<lsb>7</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "EN6" -->
|
|
<field>
|
|
<name>EN6</name>
|
|
<description>External interrupt Ch.6 enable bit</description>
|
|
<lsb>6</lsb>
|
|
<msb>6</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "EN5" -->
|
|
<field>
|
|
<name>EN5</name>
|
|
<description>External interrupt Ch.5 enable bit</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "EN4" -->
|
|
<field>
|
|
<name>EN4</name>
|
|
<description>External interrupt Ch.4 enable bit</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "EN3" -->
|
|
<field>
|
|
<name>EN3</name>
|
|
<description>External interrupt Ch.3 enable bit</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "EN2" -->
|
|
<field>
|
|
<name>EN2</name>
|
|
<description>External interrupt Ch.2 enable bit</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "EN1" -->
|
|
<field>
|
|
<name>EN1</name>
|
|
<description>External interrupt Ch.1 enable bit</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "EN0" -->
|
|
<field>
|
|
<name>EN0</name>
|
|
<description>External interrupt Ch.0 enable bit</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "EIRR" -->
|
|
<register>
|
|
<name>EIRR</name>
|
|
<description>External Interrupt Factor Register</description>
|
|
<addressOffset>0x4</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0xFFFFFFFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "ER31" -->
|
|
<field>
|
|
<name>ER31</name>
|
|
<description>External interrupt Ch.31 request detection bit</description>
|
|
<lsb>31</lsb>
|
|
<msb>31</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "ER30" -->
|
|
<field>
|
|
<name>ER30</name>
|
|
<description>External interrupt Ch.30 request detection bit</description>
|
|
<lsb>30</lsb>
|
|
<msb>30</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "ER29" -->
|
|
<field>
|
|
<name>ER29</name>
|
|
<description>External interrupt Ch.29 request detection bit</description>
|
|
<lsb>29</lsb>
|
|
<msb>29</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "ER28" -->
|
|
<field>
|
|
<name>ER28</name>
|
|
<description>External interrupt Ch.28 request detection bit</description>
|
|
<lsb>28</lsb>
|
|
<msb>28</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "ER27" -->
|
|
<field>
|
|
<name>ER27</name>
|
|
<description>External interrupt Ch.27 request detection bit</description>
|
|
<lsb>27</lsb>
|
|
<msb>27</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "ER26" -->
|
|
<field>
|
|
<name>ER26</name>
|
|
<description>External interrupt Ch.26 request detection bit</description>
|
|
<lsb>26</lsb>
|
|
<msb>26</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "ER25" -->
|
|
<field>
|
|
<name>ER25</name>
|
|
<description>External interrupt Ch.25 request detection bit</description>
|
|
<lsb>25</lsb>
|
|
<msb>25</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "ER24" -->
|
|
<field>
|
|
<name>ER24</name>
|
|
<description>External interrupt Ch.24 request detection bit</description>
|
|
<lsb>24</lsb>
|
|
<msb>24</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "ER23" -->
|
|
<field>
|
|
<name>ER23</name>
|
|
<description>External interrupt Ch.23 request detection bit</description>
|
|
<lsb>23</lsb>
|
|
<msb>23</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "ER22" -->
|
|
<field>
|
|
<name>ER22</name>
|
|
<description>External interrupt Ch.22 request detection bit</description>
|
|
<lsb>22</lsb>
|
|
<msb>22</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "ER21" -->
|
|
<field>
|
|
<name>ER21</name>
|
|
<description>External interrupt Ch.21 request detection bit</description>
|
|
<lsb>21</lsb>
|
|
<msb>21</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "ER20" -->
|
|
<field>
|
|
<name>ER20</name>
|
|
<description>External interrupt Ch.20 request detection bit</description>
|
|
<lsb>20</lsb>
|
|
<msb>20</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "ER19" -->
|
|
<field>
|
|
<name>ER19</name>
|
|
<description>External interrupt Ch.19 request detection bit</description>
|
|
<lsb>19</lsb>
|
|
<msb>19</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "ER18" -->
|
|
<field>
|
|
<name>ER18</name>
|
|
<description>External interrupt Ch.18 request detection bit</description>
|
|
<lsb>18</lsb>
|
|
<msb>18</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "ER17" -->
|
|
<field>
|
|
<name>ER17</name>
|
|
<description>External interrupt Ch.17 request detection bit</description>
|
|
<lsb>17</lsb>
|
|
<msb>17</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "ER16" -->
|
|
<field>
|
|
<name>ER16</name>
|
|
<description>External interrupt Ch.16 request detection bit</description>
|
|
<lsb>16</lsb>
|
|
<msb>16</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "ER15" -->
|
|
<field>
|
|
<name>ER15</name>
|
|
<description>External interrupt Ch.15 request detection bit</description>
|
|
<lsb>15</lsb>
|
|
<msb>15</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "ER14" -->
|
|
<field>
|
|
<name>ER14</name>
|
|
<description>External interrupt Ch.14 request detection bit</description>
|
|
<lsb>14</lsb>
|
|
<msb>14</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "ER13" -->
|
|
<field>
|
|
<name>ER13</name>
|
|
<description>External interrupt Ch.13 request detection bit</description>
|
|
<lsb>13</lsb>
|
|
<msb>13</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "ER12" -->
|
|
<field>
|
|
<name>ER12</name>
|
|
<description>External interrupt Ch.12 request detection bit</description>
|
|
<lsb>12</lsb>
|
|
<msb>12</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "ER11" -->
|
|
<field>
|
|
<name>ER11</name>
|
|
<description>External interrupt Ch.11 request detection bit</description>
|
|
<lsb>11</lsb>
|
|
<msb>11</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "ER10" -->
|
|
<field>
|
|
<name>ER10</name>
|
|
<description>External interrupt Ch.10 request detection bit</description>
|
|
<lsb>10</lsb>
|
|
<msb>10</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "ER9" -->
|
|
<field>
|
|
<name>ER9</name>
|
|
<description>External interrupt Ch.9 request detection bit</description>
|
|
<lsb>9</lsb>
|
|
<msb>9</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "ER8" -->
|
|
<field>
|
|
<name>ER8</name>
|
|
<description>External interrupt Ch.8 request detection bit</description>
|
|
<lsb>8</lsb>
|
|
<msb>8</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "ER7" -->
|
|
<field>
|
|
<name>ER7</name>
|
|
<description>External interrupt Ch.7 request detection bit</description>
|
|
<lsb>7</lsb>
|
|
<msb>7</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "ER6" -->
|
|
<field>
|
|
<name>ER6</name>
|
|
<description>External interrupt Ch.6 request detection bit</description>
|
|
<lsb>6</lsb>
|
|
<msb>6</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "ER5" -->
|
|
<field>
|
|
<name>ER5</name>
|
|
<description>External interrupt Ch.5 request detection bit</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "ER4" -->
|
|
<field>
|
|
<name>ER4</name>
|
|
<description>External interrupt Ch.4 request detection bit</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "ER3" -->
|
|
<field>
|
|
<name>ER3</name>
|
|
<description>External interrupt Ch.3 request detection bit</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "ER2" -->
|
|
<field>
|
|
<name>ER2</name>
|
|
<description>External interrupt Ch.2 request detection bit</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "ER1" -->
|
|
<field>
|
|
<name>ER1</name>
|
|
<description>External interrupt Ch.1 request detection bit</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "ER0" -->
|
|
<field>
|
|
<name>ER0</name>
|
|
<description>External interrupt Ch.0 request detection bit</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "EICL" -->
|
|
<register>
|
|
<name>EICL</name>
|
|
<description>External Interrupt Factor Clear Register</description>
|
|
<addressOffset>0x8</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0xFFFFFFFF</resetValue>
|
|
<resetMask>0xFFFFFFFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "ECL31" -->
|
|
<field>
|
|
<name>ECL31</name>
|
|
<description>External interrupt Ch.31 factor clear bit</description>
|
|
<lsb>31</lsb>
|
|
<msb>31</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "ECL30" -->
|
|
<field>
|
|
<name>ECL30</name>
|
|
<description>External interrupt Ch.30 factor clear bit</description>
|
|
<lsb>30</lsb>
|
|
<msb>30</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "ECL29" -->
|
|
<field>
|
|
<name>ECL29</name>
|
|
<description>External interrupt Ch.29 factor clear bit</description>
|
|
<lsb>29</lsb>
|
|
<msb>29</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "ECL28" -->
|
|
<field>
|
|
<name>ECL28</name>
|
|
<description>External interrupt Ch.28 factor clear bit</description>
|
|
<lsb>28</lsb>
|
|
<msb>28</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "ECL27" -->
|
|
<field>
|
|
<name>ECL27</name>
|
|
<description>External interrupt Ch.27 factor clear bit</description>
|
|
<lsb>27</lsb>
|
|
<msb>27</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "ECL26" -->
|
|
<field>
|
|
<name>ECL26</name>
|
|
<description>External interrupt Ch.26 factor clear bit</description>
|
|
<lsb>26</lsb>
|
|
<msb>26</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "ECL25" -->
|
|
<field>
|
|
<name>ECL25</name>
|
|
<description>External interrupt Ch.25 factor clear bit</description>
|
|
<lsb>25</lsb>
|
|
<msb>25</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "ECL24" -->
|
|
<field>
|
|
<name>ECL24</name>
|
|
<description>External interrupt Ch.24 factor clear bit</description>
|
|
<lsb>24</lsb>
|
|
<msb>24</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "ECL23" -->
|
|
<field>
|
|
<name>ECL23</name>
|
|
<description>External interrupt Ch.23 factor clear bit</description>
|
|
<lsb>23</lsb>
|
|
<msb>23</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "ECL22" -->
|
|
<field>
|
|
<name>ECL22</name>
|
|
<description>External interrupt Ch.22 factor clear bit</description>
|
|
<lsb>22</lsb>
|
|
<msb>22</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "ECL21" -->
|
|
<field>
|
|
<name>ECL21</name>
|
|
<description>External interrupt Ch.21 factor clear bit</description>
|
|
<lsb>21</lsb>
|
|
<msb>21</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "ECL20" -->
|
|
<field>
|
|
<name>ECL20</name>
|
|
<description>External interrupt Ch.20 factor clear bit</description>
|
|
<lsb>20</lsb>
|
|
<msb>20</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "ECL19" -->
|
|
<field>
|
|
<name>ECL19</name>
|
|
<description>External interrupt Ch.19 factor clear bit</description>
|
|
<lsb>19</lsb>
|
|
<msb>19</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "ECL18" -->
|
|
<field>
|
|
<name>ECL18</name>
|
|
<description>External interrupt Ch.18 factor clear bit</description>
|
|
<lsb>18</lsb>
|
|
<msb>18</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "ECL17" -->
|
|
<field>
|
|
<name>ECL17</name>
|
|
<description>External interrupt Ch.17 factor clear bit</description>
|
|
<lsb>17</lsb>
|
|
<msb>17</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "ECL16" -->
|
|
<field>
|
|
<name>ECL16</name>
|
|
<description>External interrupt Ch.16 factor clear bit</description>
|
|
<lsb>16</lsb>
|
|
<msb>16</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "ECL15" -->
|
|
<field>
|
|
<name>ECL15</name>
|
|
<description>External interrupt Ch.15 factor clear bit</description>
|
|
<lsb>15</lsb>
|
|
<msb>15</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "ECL14" -->
|
|
<field>
|
|
<name>ECL14</name>
|
|
<description>External interrupt Ch.14 factor clear bit</description>
|
|
<lsb>14</lsb>
|
|
<msb>14</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "ECL13" -->
|
|
<field>
|
|
<name>ECL13</name>
|
|
<description>External interrupt Ch.13 factor clear bit</description>
|
|
<lsb>13</lsb>
|
|
<msb>13</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "ECL12" -->
|
|
<field>
|
|
<name>ECL12</name>
|
|
<description>External interrupt Ch.12 factor clear bit</description>
|
|
<lsb>12</lsb>
|
|
<msb>12</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "ECL11" -->
|
|
<field>
|
|
<name>ECL11</name>
|
|
<description>External interrupt Ch.11 factor clear bit</description>
|
|
<lsb>11</lsb>
|
|
<msb>11</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "ECL10" -->
|
|
<field>
|
|
<name>ECL10</name>
|
|
<description>External interrupt Ch.10 factor clear bit</description>
|
|
<lsb>10</lsb>
|
|
<msb>10</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "ECL9" -->
|
|
<field>
|
|
<name>ECL9</name>
|
|
<description>External interrupt Ch.9 factor clear bit</description>
|
|
<lsb>9</lsb>
|
|
<msb>9</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "ECL8" -->
|
|
<field>
|
|
<name>ECL8</name>
|
|
<description>External interrupt Ch.8 factor clear bit</description>
|
|
<lsb>8</lsb>
|
|
<msb>8</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "ECL7" -->
|
|
<field>
|
|
<name>ECL7</name>
|
|
<description>External interrupt Ch.7 factor clear bit</description>
|
|
<lsb>7</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "ECL6" -->
|
|
<field>
|
|
<name>ECL6</name>
|
|
<description>External interrupt Ch.6 factor clear bit</description>
|
|
<lsb>6</lsb>
|
|
<msb>6</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "ECL5" -->
|
|
<field>
|
|
<name>ECL5</name>
|
|
<description>External interrupt Ch.5 factor clear bit</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "ECL4" -->
|
|
<field>
|
|
<name>ECL4</name>
|
|
<description>External interrupt Ch.4 factor clear bit</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "ECL3" -->
|
|
<field>
|
|
<name>ECL3</name>
|
|
<description>External interrupt Ch.3 factor clear bit</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "ECL2" -->
|
|
<field>
|
|
<name>ECL2</name>
|
|
<description>External interrupt Ch.2 factor clear bit</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "ECL1" -->
|
|
<field>
|
|
<name>ECL1</name>
|
|
<description>External interrupt Ch.1 factor clear bit</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "ECL0" -->
|
|
<field>
|
|
<name>ECL0</name>
|
|
<description>External interrupt Ch.0 factor clear bit</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "ELVR" -->
|
|
<register>
|
|
<name>ELVR</name>
|
|
<description>External Interrupt Factor Level Register</description>
|
|
<addressOffset>0xC</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0xFFFFFFFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "LB15" -->
|
|
<field>
|
|
<name>LB15</name>
|
|
<description>Bit31 of ELVR</description>
|
|
<lsb>31</lsb>
|
|
<msb>31</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "LA15" -->
|
|
<field>
|
|
<name>LA15</name>
|
|
<description>Bit30 of ELVR</description>
|
|
<lsb>30</lsb>
|
|
<msb>30</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "LB14" -->
|
|
<field>
|
|
<name>LB14</name>
|
|
<description>Bit29 of ELVR</description>
|
|
<lsb>29</lsb>
|
|
<msb>29</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "LA14" -->
|
|
<field>
|
|
<name>LA14</name>
|
|
<description>Bit28 of ELVR</description>
|
|
<lsb>28</lsb>
|
|
<msb>28</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "LB13" -->
|
|
<field>
|
|
<name>LB13</name>
|
|
<description>Bit27 of ELVR</description>
|
|
<lsb>27</lsb>
|
|
<msb>27</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "LA13" -->
|
|
<field>
|
|
<name>LA13</name>
|
|
<description>Bit26 of ELVR</description>
|
|
<lsb>26</lsb>
|
|
<msb>26</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "LB12" -->
|
|
<field>
|
|
<name>LB12</name>
|
|
<description>Bit25 of ELVR</description>
|
|
<lsb>25</lsb>
|
|
<msb>25</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "LA12" -->
|
|
<field>
|
|
<name>LA12</name>
|
|
<description>Bit24 of ELVR</description>
|
|
<lsb>24</lsb>
|
|
<msb>24</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "LB11" -->
|
|
<field>
|
|
<name>LB11</name>
|
|
<description>Bit23 of ELVR</description>
|
|
<lsb>23</lsb>
|
|
<msb>23</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "LA11" -->
|
|
<field>
|
|
<name>LA11</name>
|
|
<description>Bit22 of ELVR</description>
|
|
<lsb>22</lsb>
|
|
<msb>22</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "LB10" -->
|
|
<field>
|
|
<name>LB10</name>
|
|
<description>Bit21 of ELVR</description>
|
|
<lsb>21</lsb>
|
|
<msb>21</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "LA10" -->
|
|
<field>
|
|
<name>LA10</name>
|
|
<description>Bit20 of ELVR</description>
|
|
<lsb>20</lsb>
|
|
<msb>20</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "LB9" -->
|
|
<field>
|
|
<name>LB9</name>
|
|
<description>Bit19 of ELVR</description>
|
|
<lsb>19</lsb>
|
|
<msb>19</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "LA9" -->
|
|
<field>
|
|
<name>LA9</name>
|
|
<description>Bit18 of ELVR</description>
|
|
<lsb>18</lsb>
|
|
<msb>18</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "LB8" -->
|
|
<field>
|
|
<name>LB8</name>
|
|
<description>Bit17 of ELVR</description>
|
|
<lsb>17</lsb>
|
|
<msb>17</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "LA8" -->
|
|
<field>
|
|
<name>LA8</name>
|
|
<description>Bit16 of ELVR</description>
|
|
<lsb>16</lsb>
|
|
<msb>16</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "LB7" -->
|
|
<field>
|
|
<name>LB7</name>
|
|
<description>Bit15 of ELVR</description>
|
|
<lsb>15</lsb>
|
|
<msb>15</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "LA7" -->
|
|
<field>
|
|
<name>LA7</name>
|
|
<description>Bit14 of ELVR</description>
|
|
<lsb>14</lsb>
|
|
<msb>14</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "LB6" -->
|
|
<field>
|
|
<name>LB6</name>
|
|
<description>Bit13 of ELVR</description>
|
|
<lsb>13</lsb>
|
|
<msb>13</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "LA6" -->
|
|
<field>
|
|
<name>LA6</name>
|
|
<description>Bit12 of ELVR</description>
|
|
<lsb>12</lsb>
|
|
<msb>12</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "LB5" -->
|
|
<field>
|
|
<name>LB5</name>
|
|
<description>Bit11 of ELVR</description>
|
|
<lsb>11</lsb>
|
|
<msb>11</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "LA5" -->
|
|
<field>
|
|
<name>LA5</name>
|
|
<description>Bit10 of ELVR</description>
|
|
<lsb>10</lsb>
|
|
<msb>10</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "LB4" -->
|
|
<field>
|
|
<name>LB4</name>
|
|
<description>Bit9 of ELVR</description>
|
|
<lsb>9</lsb>
|
|
<msb>9</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "LA4" -->
|
|
<field>
|
|
<name>LA4</name>
|
|
<description>Bit8 of ELVR</description>
|
|
<lsb>8</lsb>
|
|
<msb>8</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "LB3" -->
|
|
<field>
|
|
<name>LB3</name>
|
|
<description>Bit7 of ELVR</description>
|
|
<lsb>7</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "LA3" -->
|
|
<field>
|
|
<name>LA3</name>
|
|
<description>Bit6 of ELVR</description>
|
|
<lsb>6</lsb>
|
|
<msb>6</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "LB2" -->
|
|
<field>
|
|
<name>LB2</name>
|
|
<description>Bit5 of ELVR</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "LA2" -->
|
|
<field>
|
|
<name>LA2</name>
|
|
<description>Bit4 of ELVR</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "LB1" -->
|
|
<field>
|
|
<name>LB1</name>
|
|
<description>Bit3 of ELVR</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "LA1" -->
|
|
<field>
|
|
<name>LA1</name>
|
|
<description>Bit2 of ELVR</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "LB0" -->
|
|
<field>
|
|
<name>LB0</name>
|
|
<description>Bit1 of ELVR</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "LA0" -->
|
|
<field>
|
|
<name>LA0</name>
|
|
<description>Bit0 of ELVR</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "ELVR1" -->
|
|
<register>
|
|
<name>ELVR1</name>
|
|
<description>External Interrupt Factor Level Register 1</description>
|
|
<addressOffset>0x10</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0xFFFFFFFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "LB31" -->
|
|
<field>
|
|
<name>LB31</name>
|
|
<description>Bit31 of ELVR1</description>
|
|
<lsb>31</lsb>
|
|
<msb>31</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "LA31" -->
|
|
<field>
|
|
<name>LA31</name>
|
|
<description>Bit30 of ELVR1</description>
|
|
<lsb>30</lsb>
|
|
<msb>30</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "LB30" -->
|
|
<field>
|
|
<name>LB30</name>
|
|
<description>Bit29 of ELVR1</description>
|
|
<lsb>29</lsb>
|
|
<msb>29</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "LA30" -->
|
|
<field>
|
|
<name>LA30</name>
|
|
<description>Bit28 of ELVR1</description>
|
|
<lsb>28</lsb>
|
|
<msb>28</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "LB29" -->
|
|
<field>
|
|
<name>LB29</name>
|
|
<description>Bit27 of ELVR1</description>
|
|
<lsb>27</lsb>
|
|
<msb>27</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "LA29" -->
|
|
<field>
|
|
<name>LA29</name>
|
|
<description>Bit26 of ELVR1</description>
|
|
<lsb>26</lsb>
|
|
<msb>26</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "LB28" -->
|
|
<field>
|
|
<name>LB28</name>
|
|
<description>Bit25 of ELVR1</description>
|
|
<lsb>25</lsb>
|
|
<msb>25</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "LA28" -->
|
|
<field>
|
|
<name>LA28</name>
|
|
<description>Bit24 of ELVR1</description>
|
|
<lsb>24</lsb>
|
|
<msb>24</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "LB27" -->
|
|
<field>
|
|
<name>LB27</name>
|
|
<description>Bit23 of ELVR1</description>
|
|
<lsb>23</lsb>
|
|
<msb>23</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "LA27" -->
|
|
<field>
|
|
<name>LA27</name>
|
|
<description>Bit22 of ELVR1</description>
|
|
<lsb>22</lsb>
|
|
<msb>22</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "LB26" -->
|
|
<field>
|
|
<name>LB26</name>
|
|
<description>Bit21 of ELVR1</description>
|
|
<lsb>21</lsb>
|
|
<msb>21</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "LA26" -->
|
|
<field>
|
|
<name>LA26</name>
|
|
<description>Bit20 of ELVR1</description>
|
|
<lsb>20</lsb>
|
|
<msb>20</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "LB25" -->
|
|
<field>
|
|
<name>LB25</name>
|
|
<description>Bit19 of ELVR1</description>
|
|
<lsb>19</lsb>
|
|
<msb>19</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "LA25" -->
|
|
<field>
|
|
<name>LA25</name>
|
|
<description>Bit18 of ELVR1</description>
|
|
<lsb>18</lsb>
|
|
<msb>18</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "LB24" -->
|
|
<field>
|
|
<name>LB24</name>
|
|
<description>Bit17 of ELVR1</description>
|
|
<lsb>17</lsb>
|
|
<msb>17</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "LA24" -->
|
|
<field>
|
|
<name>LA24</name>
|
|
<description>Bit16 of ELVR1</description>
|
|
<lsb>16</lsb>
|
|
<msb>16</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "LB23" -->
|
|
<field>
|
|
<name>LB23</name>
|
|
<description>Bit15 of ELVR1</description>
|
|
<lsb>15</lsb>
|
|
<msb>15</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "LA23" -->
|
|
<field>
|
|
<name>LA23</name>
|
|
<description>Bit14 of ELVR1</description>
|
|
<lsb>14</lsb>
|
|
<msb>14</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "LB22" -->
|
|
<field>
|
|
<name>LB22</name>
|
|
<description>Bit13 of ELVR1</description>
|
|
<lsb>13</lsb>
|
|
<msb>13</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "LA22" -->
|
|
<field>
|
|
<name>LA22</name>
|
|
<description>Bit12 of ELVR1</description>
|
|
<lsb>12</lsb>
|
|
<msb>12</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "LB21" -->
|
|
<field>
|
|
<name>LB21</name>
|
|
<description>Bit11 of ELVR1</description>
|
|
<lsb>11</lsb>
|
|
<msb>11</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "LA21" -->
|
|
<field>
|
|
<name>LA21</name>
|
|
<description>Bit10 of ELVR1</description>
|
|
<lsb>10</lsb>
|
|
<msb>10</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "LB20" -->
|
|
<field>
|
|
<name>LB20</name>
|
|
<description>Bit9 of ELVR1</description>
|
|
<lsb>9</lsb>
|
|
<msb>9</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "LA20" -->
|
|
<field>
|
|
<name>LA20</name>
|
|
<description>Bit8 of ELVR1</description>
|
|
<lsb>8</lsb>
|
|
<msb>8</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "LB19" -->
|
|
<field>
|
|
<name>LB19</name>
|
|
<description>Bit7 of ELVR1</description>
|
|
<lsb>7</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "LA19" -->
|
|
<field>
|
|
<name>LA19</name>
|
|
<description>Bit6 of ELVR1</description>
|
|
<lsb>6</lsb>
|
|
<msb>6</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "LB18" -->
|
|
<field>
|
|
<name>LB18</name>
|
|
<description>Bit5 of ELVR1</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "LA18" -->
|
|
<field>
|
|
<name>LA18</name>
|
|
<description>Bit4 of ELVR1</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "LB17" -->
|
|
<field>
|
|
<name>LB17</name>
|
|
<description>Bit3 of ELVR1</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "LA17" -->
|
|
<field>
|
|
<name>LA17</name>
|
|
<description>Bit2 of ELVR1</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "LB16" -->
|
|
<field>
|
|
<name>LB16</name>
|
|
<description>Bit1 of ELVR1</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "LA16" -->
|
|
<field>
|
|
<name>LA16</name>
|
|
<description>Bit0 of ELVR1</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "NMIRR" -->
|
|
<register>
|
|
<name>NMIRR</name>
|
|
<description>Non Maskable Interrupt Factor Register</description>
|
|
<addressOffset>0x14</addressOffset>
|
|
<size>16</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<resetMask>0x0001</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "NR" -->
|
|
<field>
|
|
<name>NR</name>
|
|
<description>NMI interrupt request detection bit</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "NMICL" -->
|
|
<register>
|
|
<name>NMICL</name>
|
|
<description>Non Maskable Interrupt Factor Clear Register</description>
|
|
<addressOffset>0x18</addressOffset>
|
|
<size>16</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0001</resetValue>
|
|
<resetMask>0x0001</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "NCL" -->
|
|
<field>
|
|
<name>NCL</name>
|
|
<description>NMI interrupt factor clear bit</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral>
|
|
<!-- PERIPHERAL "INTREQ" -->
|
|
<peripheral>
|
|
<name>INTREQ</name>
|
|
<description>Interrupts</description>
|
|
<groupName>INTREQ</groupName>
|
|
<baseAddress>0x40031000</baseAddress>
|
|
<!-- ADDRESS BLOCK -->
|
|
<addressBlock>
|
|
<offset>0x0</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0xC</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x10</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x14</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x18</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x1C</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x20</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x24</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x28</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x2C</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x30</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x34</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x38</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x3C</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x40</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x44</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x48</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x4C</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x50</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x54</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x58</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x5C</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x60</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x64</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x68</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x6C</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x70</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x74</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x78</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x7C</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x80</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x84</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x88</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x8C</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x90</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x210</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x214</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<!-- REGISTERS -->
|
|
<registers>
|
|
<!-- REGISTER "DRQSEL" -->
|
|
<register>
|
|
<name>DRQSEL</name>
|
|
<description>DMA Request Selection Register</description>
|
|
<addressOffset>0x0</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0xFFFFFFE0</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "EXINT3" -->
|
|
<field>
|
|
<name>EXINT3</name>
|
|
<description>The interrupt signal of the external interrupt ch.3 is output as a transfer request to the DMAC</description>
|
|
<lsb>31</lsb>
|
|
<msb>31</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "EXINT2" -->
|
|
<field>
|
|
<name>EXINT2</name>
|
|
<description>The interrupt signal of the external interrupt ch.2 is output as a transfer request to the DMAC</description>
|
|
<lsb>30</lsb>
|
|
<msb>30</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "EXINT1" -->
|
|
<field>
|
|
<name>EXINT1</name>
|
|
<description>The interrupt signal of the external interrupt ch.1 is output as a transfer request to the DMAC</description>
|
|
<lsb>29</lsb>
|
|
<msb>29</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "EXINT0" -->
|
|
<field>
|
|
<name>EXINT0</name>
|
|
<description>The interrupt signal of the external interrupt ch.0 is output as a transfer request to the DMAC</description>
|
|
<lsb>28</lsb>
|
|
<msb>28</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "MFS7TX" -->
|
|
<field>
|
|
<name>MFS7TX</name>
|
|
<description>The transmission interrupt signal of the MFS ch.7 is output as a transfer request to the DMAC</description>
|
|
<lsb>27</lsb>
|
|
<msb>27</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "MFS7RX" -->
|
|
<field>
|
|
<name>MFS7RX</name>
|
|
<description>The reception interrupt signal of the MFS ch.7 is output as a transfer request to the DMAC</description>
|
|
<lsb>26</lsb>
|
|
<msb>26</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "MFS6TX" -->
|
|
<field>
|
|
<name>MFS6TX</name>
|
|
<description>The transmission interrupt signal of the MFS ch.6 is output as a transfer request to the DMAC</description>
|
|
<lsb>25</lsb>
|
|
<msb>25</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "MFS6RX" -->
|
|
<field>
|
|
<name>MFS6RX</name>
|
|
<description>The reception interrupt signal of the MFS ch.6 is output as a transfer request to the DMAC</description>
|
|
<lsb>24</lsb>
|
|
<msb>24</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "MFS5TX" -->
|
|
<field>
|
|
<name>MFS5TX</name>
|
|
<description>The transmission interrupt signal of the MFS ch.5 is output as a transfer request to the DMAC</description>
|
|
<lsb>23</lsb>
|
|
<msb>23</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "MFS5RX" -->
|
|
<field>
|
|
<name>MFS5RX</name>
|
|
<description>The reception interrupt signal of the MFS ch.5 is output as a transfer request to the DMAC</description>
|
|
<lsb>22</lsb>
|
|
<msb>22</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "MFS4TX" -->
|
|
<field>
|
|
<name>MFS4TX</name>
|
|
<description>The transmission interrupt signal of the MFS ch.4 is output as a transfer request to the DMAC</description>
|
|
<lsb>21</lsb>
|
|
<msb>21</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "MFS4RX" -->
|
|
<field>
|
|
<name>MFS4RX</name>
|
|
<description>The reception interrupt signal of the MFS ch.4 is output as a transfer request to the DMAC</description>
|
|
<lsb>20</lsb>
|
|
<msb>20</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "MFS3TX" -->
|
|
<field>
|
|
<name>MFS3TX</name>
|
|
<description>The transmission interrupt signal of the MFS ch.3 is output as a transfer request to the DMAC</description>
|
|
<lsb>19</lsb>
|
|
<msb>19</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "MFS3RX" -->
|
|
<field>
|
|
<name>MFS3RX</name>
|
|
<description>The reception interrupt signal of the MFS ch.3 is output as a transfer request to the DMAC</description>
|
|
<lsb>18</lsb>
|
|
<msb>18</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "MFS2TX" -->
|
|
<field>
|
|
<name>MFS2TX</name>
|
|
<description>The transmission interrupt signal of the MFS ch.2 is output as a transfer request to the DMAC</description>
|
|
<lsb>17</lsb>
|
|
<msb>17</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "MFS2RX" -->
|
|
<field>
|
|
<name>MFS2RX</name>
|
|
<description>The reception interrupt signal of the MFS ch.2 is output as a transfer request to the DMAC</description>
|
|
<lsb>16</lsb>
|
|
<msb>16</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "MFS1TX" -->
|
|
<field>
|
|
<name>MFS1TX</name>
|
|
<description>The transmission interrupt signal of the MFS ch.1 is output as a transfer request to the DMAC</description>
|
|
<lsb>15</lsb>
|
|
<msb>15</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "MFS1RX" -->
|
|
<field>
|
|
<name>MFS1RX</name>
|
|
<description>The reception interrupt signal of the MFS ch.1 is output as a transfer request to the DMAC</description>
|
|
<lsb>14</lsb>
|
|
<msb>14</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "MFS0TX" -->
|
|
<field>
|
|
<name>MFS0TX</name>
|
|
<description>The transmission interrupt signal of the MFS ch.0 is output as a transfer request to the DMAC</description>
|
|
<lsb>13</lsb>
|
|
<msb>13</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "MFS0RX" -->
|
|
<field>
|
|
<name>MFS0RX</name>
|
|
<description>The reception interrupt signal of the MFS ch.0 is output as a transfer request to the DMAC</description>
|
|
<lsb>12</lsb>
|
|
<msb>12</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "IRQ0BT6" -->
|
|
<field>
|
|
<name>IRQ0BT6</name>
|
|
<description>The IRQ0 interrupt signal of the base timer ch.6 is output as a transfer request to the DMAC</description>
|
|
<lsb>11</lsb>
|
|
<msb>11</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "IRQ0BT4" -->
|
|
<field>
|
|
<name>IRQ0BT4</name>
|
|
<description>The IRQ0 interrupt signal of the base timer ch.4 is output as a transfer request to the DMAC</description>
|
|
<lsb>10</lsb>
|
|
<msb>10</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "IRQ0BT2" -->
|
|
<field>
|
|
<name>IRQ0BT2</name>
|
|
<description>The IRQ0 interrupt signal of the base timer ch.2 is output as a transfer request to the DMAC</description>
|
|
<lsb>9</lsb>
|
|
<msb>9</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "IRQ0BT0" -->
|
|
<field>
|
|
<name>IRQ0BT0</name>
|
|
<description>The IRQ0 interrupt signal of the base timer ch.0 is output as a transfer request to the DMAC</description>
|
|
<lsb>8</lsb>
|
|
<msb>8</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "ADCSCAN2" -->
|
|
<field>
|
|
<name>ADCSCAN2</name>
|
|
<description>The scan conversion interrupt signal of the A/D converter unit 2 is output as a transfer request to the DMAC</description>
|
|
<lsb>7</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "ADCSCAN1" -->
|
|
<field>
|
|
<name>ADCSCAN1</name>
|
|
<description>The scan conversion interrupt signal of the A/D converter unit 1 is output as a transfer request to the DMAC</description>
|
|
<lsb>6</lsb>
|
|
<msb>6</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "ADCSCAN0" -->
|
|
<field>
|
|
<name>ADCSCAN0</name>
|
|
<description>The scan conversion interrupt signal of the A/D converter unit 0 is output as a transfer request to the DMAC</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "IRQCMODE" -->
|
|
<register>
|
|
<name>IRQCMODE</name>
|
|
<description>Interrupt Factor Vector Relocate Setting Register</description>
|
|
<addressOffset>0xC</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000001</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "IRQCMODE" -->
|
|
<field>
|
|
<name>IRQCMODE</name>
|
|
<description>Assigns the interrupt factor vector according to Table 1-1 in chapter "Interrupt B"</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "EXC02MON" -->
|
|
<register>
|
|
<name>EXC02MON</name>
|
|
<description>EXC02 Batch Read Register</description>
|
|
<addressOffset>0x10</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000003</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "HWINT" -->
|
|
<field>
|
|
<name>HWINT</name>
|
|
<description>Hardware watchdog timer interrupt request</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "NMI" -->
|
|
<field>
|
|
<name>NMI</name>
|
|
<description>NMIX external pin interrupt request</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "IRQ00MON" -->
|
|
<register>
|
|
<name>IRQ00MON</name>
|
|
<description>IRQ00 Batch Read Register</description>
|
|
<addressOffset>0x14</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000001</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "FCSINT" -->
|
|
<field>
|
|
<name>FCSINT</name>
|
|
<description>Anomalous frequency detection by CSV interrupt request</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "IRQ01MON" -->
|
|
<register>
|
|
<name>IRQ01MON</name>
|
|
<description>IRQ01 Batch Read Register</description>
|
|
<addressOffset>0x18</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000001</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "SWWDTINT" -->
|
|
<field>
|
|
<name>SWWDTINT</name>
|
|
<description>Software watchdog timer interrupt request</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "IRQ02MON" -->
|
|
<register>
|
|
<name>IRQ02MON</name>
|
|
<description>IRQ02 Batch Read Register</description>
|
|
<addressOffset>0x1C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000001</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "LVDINT" -->
|
|
<field>
|
|
<name>LVDINT</name>
|
|
<description>Low voltage detection (LVD) interrupt request</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "IRQ03MON" -->
|
|
<register>
|
|
<name>IRQ03MON</name>
|
|
<description>IRQ03 Batch Read Register</description>
|
|
<addressOffset>0x20</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000FFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "WAVE2INT3" -->
|
|
<field>
|
|
<name>WAVE2INT3</name>
|
|
<description>WFG timer 54 interrupt request in MFT unit 2</description>
|
|
<lsb>11</lsb>
|
|
<msb>11</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "WAVE2INT2" -->
|
|
<field>
|
|
<name>WAVE2INT2</name>
|
|
<description>WFG timer 32 interrupt request in MFT unit 2</description>
|
|
<lsb>10</lsb>
|
|
<msb>10</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "WAVE2INT1" -->
|
|
<field>
|
|
<name>WAVE2INT1</name>
|
|
<description>WFG timer 10 interrupt request in MFT unit 2</description>
|
|
<lsb>9</lsb>
|
|
<msb>9</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "WAVE2INT0" -->
|
|
<field>
|
|
<name>WAVE2INT0</name>
|
|
<description>DTIF (motor emergency stop) interrupt request in MFT unit 2</description>
|
|
<lsb>8</lsb>
|
|
<msb>8</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "WAVE1INT3" -->
|
|
<field>
|
|
<name>WAVE1INT3</name>
|
|
<description>WFG timer 54 interrupt request in MFT unit 1</description>
|
|
<lsb>7</lsb>
|
|
<msb>7</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "WAVE1INT2" -->
|
|
<field>
|
|
<name>WAVE1INT2</name>
|
|
<description>WFG timer 32 interrupt request in MFT unit 1</description>
|
|
<lsb>6</lsb>
|
|
<msb>6</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "WAVE1INT1" -->
|
|
<field>
|
|
<name>WAVE1INT1</name>
|
|
<description>WFG timer 10 interrupt request in MFT unit 1</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "WAVE1INT0" -->
|
|
<field>
|
|
<name>WAVE1INT0</name>
|
|
<description>DTIF (motor emergency stop) interrupt request in MFT unit 1</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "WAVE0INT3" -->
|
|
<field>
|
|
<name>WAVE0INT3</name>
|
|
<description>WFG timer 54 interrupt request in MFT unit 0</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "WAVE0INT2" -->
|
|
<field>
|
|
<name>WAVE0INT2</name>
|
|
<description>WFG timer 32 interrupt request in MFT unit 0</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "WAVE0INT1" -->
|
|
<field>
|
|
<name>WAVE0INT1</name>
|
|
<description>WFG timer 10 interrupt request in MFT unit 0</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "WAVE0INT0" -->
|
|
<field>
|
|
<name>WAVE0INT0</name>
|
|
<description>DTIF (motor emergency stop) interrupt request in MFT unit 0</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "IRQ04MON" -->
|
|
<register>
|
|
<name>IRQ04MON</name>
|
|
<description>IRQ04 Batch Read Register</description>
|
|
<addressOffset>0x24</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x000000FF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "EXTINT7" -->
|
|
<field>
|
|
<name>EXTINT7</name>
|
|
<description>Interrupt request of external interrupt ch.7</description>
|
|
<lsb>7</lsb>
|
|
<msb>7</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "EXTINT6" -->
|
|
<field>
|
|
<name>EXTINT6</name>
|
|
<description>Interrupt request of external interrupt ch.6</description>
|
|
<lsb>6</lsb>
|
|
<msb>6</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "EXTINT5" -->
|
|
<field>
|
|
<name>EXTINT5</name>
|
|
<description>Interrupt request of external interrupt ch.5</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "EXTINT4" -->
|
|
<field>
|
|
<name>EXTINT4</name>
|
|
<description>Interrupt request of external interrupt ch.4</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "EXTINT3" -->
|
|
<field>
|
|
<name>EXTINT3</name>
|
|
<description>Interrupt request of external interrupt ch.3</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "EXTINT2" -->
|
|
<field>
|
|
<name>EXTINT2</name>
|
|
<description>Interrupt request of external interrupt ch.2</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "EXTINT1" -->
|
|
<field>
|
|
<name>EXTINT1</name>
|
|
<description>Interrupt request of external interrupt ch.1</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "EXTINT0" -->
|
|
<field>
|
|
<name>EXTINT0</name>
|
|
<description>Interrupt request of external interrupt ch.0</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "IRQ05MON" -->
|
|
<register>
|
|
<name>IRQ05MON</name>
|
|
<description>IRQ05 Batch Read Register</description>
|
|
<addressOffset>0x28</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00FFFFFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "EXTINT31" -->
|
|
<field>
|
|
<name>EXTINT31</name>
|
|
<description>Interrupt request of external interrupt ch.31</description>
|
|
<lsb>23</lsb>
|
|
<msb>23</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "EXTINT30" -->
|
|
<field>
|
|
<name>EXTINT30</name>
|
|
<description>Interrupt request of external interrupt ch.30</description>
|
|
<lsb>22</lsb>
|
|
<msb>22</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "EXTINT29" -->
|
|
<field>
|
|
<name>EXTINT29</name>
|
|
<description>Interrupt request of external interrupt ch.29</description>
|
|
<lsb>21</lsb>
|
|
<msb>21</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "EXTINT28" -->
|
|
<field>
|
|
<name>EXTINT28</name>
|
|
<description>Interrupt request of external interrupt ch.28</description>
|
|
<lsb>20</lsb>
|
|
<msb>20</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "EXTINT27" -->
|
|
<field>
|
|
<name>EXTINT27</name>
|
|
<description>Interrupt request of external interrupt ch.27</description>
|
|
<lsb>19</lsb>
|
|
<msb>19</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "EXTINT26" -->
|
|
<field>
|
|
<name>EXTINT26</name>
|
|
<description>Interrupt request of external interrupt ch.26</description>
|
|
<lsb>18</lsb>
|
|
<msb>18</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "EXTINT25" -->
|
|
<field>
|
|
<name>EXTINT25</name>
|
|
<description>Interrupt request of external interrupt ch.25</description>
|
|
<lsb>17</lsb>
|
|
<msb>17</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "EXTINT24" -->
|
|
<field>
|
|
<name>EXTINT24</name>
|
|
<description>Interrupt request of external interrupt ch.24</description>
|
|
<lsb>16</lsb>
|
|
<msb>16</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "EXTINT23" -->
|
|
<field>
|
|
<name>EXTINT23</name>
|
|
<description>Interrupt request of external interrupt ch.23</description>
|
|
<lsb>15</lsb>
|
|
<msb>15</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "EXTINT22" -->
|
|
<field>
|
|
<name>EXTINT22</name>
|
|
<description>Interrupt request of external interrupt ch.22</description>
|
|
<lsb>14</lsb>
|
|
<msb>14</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "EXTINT21" -->
|
|
<field>
|
|
<name>EXTINT21</name>
|
|
<description>Interrupt request of external interrupt ch.21</description>
|
|
<lsb>13</lsb>
|
|
<msb>13</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "EXTINT20" -->
|
|
<field>
|
|
<name>EXTINT20</name>
|
|
<description>Interrupt request of external interrupt ch.20</description>
|
|
<lsb>12</lsb>
|
|
<msb>12</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "EXTINT19" -->
|
|
<field>
|
|
<name>EXTINT19</name>
|
|
<description>Interrupt request of external interrupt ch.19</description>
|
|
<lsb>11</lsb>
|
|
<msb>11</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "EXTINT18" -->
|
|
<field>
|
|
<name>EXTINT18</name>
|
|
<description>Interrupt request of external interrupt ch.18</description>
|
|
<lsb>10</lsb>
|
|
<msb>10</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "EXTINT17" -->
|
|
<field>
|
|
<name>EXTINT17</name>
|
|
<description>Interrupt request of external interrupt ch.17</description>
|
|
<lsb>9</lsb>
|
|
<msb>9</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "EXTINT16" -->
|
|
<field>
|
|
<name>EXTINT16</name>
|
|
<description>Interrupt request of external interrupt ch.16</description>
|
|
<lsb>8</lsb>
|
|
<msb>8</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "EXTINT15" -->
|
|
<field>
|
|
<name>EXTINT15</name>
|
|
<description>Interrupt request of external interrupt ch.15</description>
|
|
<lsb>7</lsb>
|
|
<msb>7</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "EXTINT14" -->
|
|
<field>
|
|
<name>EXTINT14</name>
|
|
<description>Interrupt request of external interrupt ch.14</description>
|
|
<lsb>6</lsb>
|
|
<msb>6</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "EXTINT13" -->
|
|
<field>
|
|
<name>EXTINT13</name>
|
|
<description>Interrupt request of external interrupt ch.13</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "EXTINT12" -->
|
|
<field>
|
|
<name>EXTINT12</name>
|
|
<description>Interrupt request of external interrupt ch.12</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "EXTINT11" -->
|
|
<field>
|
|
<name>EXTINT11</name>
|
|
<description>Interrupt request of external interrupt ch.11</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "EXTINT10" -->
|
|
<field>
|
|
<name>EXTINT10</name>
|
|
<description>Interrupt request of external interrupt ch.10</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "EXTINT9" -->
|
|
<field>
|
|
<name>EXTINT9</name>
|
|
<description>Interrupt request of external interrupt ch.9</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "EXTINT8" -->
|
|
<field>
|
|
<name>EXTINT8</name>
|
|
<description>Interrupt request of external interrupt ch.8</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "IRQ06MON" -->
|
|
<register>
|
|
<name>IRQ06MON</name>
|
|
<description>IRQ06 Batch Read Register</description>
|
|
<addressOffset>0x2C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x000FFFFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "QUD2INT5" -->
|
|
<field>
|
|
<name>QUD2INT5</name>
|
|
<description>PC match and RC match interrupt request of QPRC ch.2</description>
|
|
<lsb>19</lsb>
|
|
<msb>19</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "QUD2INT4" -->
|
|
<field>
|
|
<name>QUD2INT4</name>
|
|
<description>Interrupt request detected RC out of range of QPRC ch.2</description>
|
|
<lsb>18</lsb>
|
|
<msb>18</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "QUD2INT3" -->
|
|
<field>
|
|
<name>QUD2INT3</name>
|
|
<description>PC count invert interrupt request of QPRC ch.2</description>
|
|
<lsb>17</lsb>
|
|
<msb>17</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "QUD2INT2" -->
|
|
<field>
|
|
<name>QUD2INT2</name>
|
|
<description>Overflow/underflow/zero index interrupt request of QPRC ch.2</description>
|
|
<lsb>16</lsb>
|
|
<msb>16</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "QUD2INT1" -->
|
|
<field>
|
|
<name>QUD2INT1</name>
|
|
<description>PC and RC match interrupt request of QPRC ch.2</description>
|
|
<lsb>15</lsb>
|
|
<msb>15</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "QUD2INT0" -->
|
|
<field>
|
|
<name>QUD2INT0</name>
|
|
<description>PC match interrupt request of QPRC ch.2</description>
|
|
<lsb>14</lsb>
|
|
<msb>14</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "QUD1INT5" -->
|
|
<field>
|
|
<name>QUD1INT5</name>
|
|
<description>PC match and RC match interrupt request of QPRC ch.1</description>
|
|
<lsb>13</lsb>
|
|
<msb>13</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "QUD1INT4" -->
|
|
<field>
|
|
<name>QUD1INT4</name>
|
|
<description>Interrupt request detected RC out of range of QPRC ch.1</description>
|
|
<lsb>12</lsb>
|
|
<msb>12</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "QUD1INT3" -->
|
|
<field>
|
|
<name>QUD1INT3</name>
|
|
<description>PC count invert interrupt request of QPRC ch.1</description>
|
|
<lsb>11</lsb>
|
|
<msb>11</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "QUD1INT2" -->
|
|
<field>
|
|
<name>QUD1INT2</name>
|
|
<description>Overflow/underflow/zero index interrupt request of QPRC ch.1</description>
|
|
<lsb>10</lsb>
|
|
<msb>10</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "QUD1INT1" -->
|
|
<field>
|
|
<name>QUD1INT1</name>
|
|
<description>PC and RC match interrupt request of QPRC ch.1</description>
|
|
<lsb>9</lsb>
|
|
<msb>9</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "QUD1INT0" -->
|
|
<field>
|
|
<name>QUD1INT0</name>
|
|
<description>PC match interrupt request of QPRC ch.1</description>
|
|
<lsb>8</lsb>
|
|
<msb>8</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "QUD0INT5" -->
|
|
<field>
|
|
<name>QUD0INT5</name>
|
|
<description>PC match and RC match interrupt request of QPRC ch.0</description>
|
|
<lsb>7</lsb>
|
|
<msb>7</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "QUD0INT4" -->
|
|
<field>
|
|
<name>QUD0INT4</name>
|
|
<description>Interrupt request detected RC out of range of QPRC ch.0</description>
|
|
<lsb>6</lsb>
|
|
<msb>6</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "QUD0INT3" -->
|
|
<field>
|
|
<name>QUD0INT3</name>
|
|
<description>PC count invert interrupt request of QPRC ch.0</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "QUD0INT2" -->
|
|
<field>
|
|
<name>QUD0INT2</name>
|
|
<description>Overflow/underflow/zero index interrupt request of QPRC ch.0</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "QUD0INT1" -->
|
|
<field>
|
|
<name>QUD0INT1</name>
|
|
<description>PC and RC match interrupt request of QPRC ch.0</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "QUD0INT0" -->
|
|
<field>
|
|
<name>QUD0INT0</name>
|
|
<description>PC match interrupt request of QPRC ch.0</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "TIMINT2" -->
|
|
<field>
|
|
<name>TIMINT2</name>
|
|
<description>Dual timer TIMINT2 interrupt request</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "TIMINT1" -->
|
|
<field>
|
|
<name>TIMINT1</name>
|
|
<description>Dual timer TIMINT1 interrupt request</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "IRQ07MON" -->
|
|
<register>
|
|
<name>IRQ07MON</name>
|
|
<description>IRQ07 Batch Read Register</description>
|
|
<addressOffset>0x30</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000003</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "MFSINT1" -->
|
|
<field>
|
|
<name>MFSINT1</name>
|
|
<description>Reception interrupt request of MFS channel 8</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "MFSINT0" -->
|
|
<field>
|
|
<name>MFSINT0</name>
|
|
<description>Reception interrupt request of MFS channel 0</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "IRQ08MON" -->
|
|
<register>
|
|
<name>IRQ08MON</name>
|
|
<description>IRQ08 Batch Read Register</description>
|
|
<addressOffset>0x34</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000000F</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "MFSINT3" -->
|
|
<field>
|
|
<name>MFSINT3</name>
|
|
<description>Status interrupt request of MFS channel 8</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "MFSINT2" -->
|
|
<field>
|
|
<name>MFSINT2</name>
|
|
<description>Transmission interrupt request of MFS channel 8</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "MFSINT1" -->
|
|
<field>
|
|
<name>MFSINT1</name>
|
|
<description>Status interrupt request of MFS channel 0</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "MFSINT0" -->
|
|
<field>
|
|
<name>MFSINT0</name>
|
|
<description>Transmission interrupt request of MFS channel 0</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "IRQ09MON" -->
|
|
<register>
|
|
<name>IRQ09MON</name>
|
|
<description>IRQ09 Batch Read Register</description>
|
|
<addressOffset>0x38</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000003</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "MFSINT1" -->
|
|
<field>
|
|
<name>MFSINT1</name>
|
|
<description>Reception interrupt request of MFS channel 9</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "MFSINT0" -->
|
|
<field>
|
|
<name>MFSINT0</name>
|
|
<description>Reception interrupt request of MFS channel 1</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "IRQ10MON" -->
|
|
<register>
|
|
<name>IRQ10MON</name>
|
|
<description>IRQ10 Batch Read Register</description>
|
|
<addressOffset>0x3C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000000F</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "MFSINT3" -->
|
|
<field>
|
|
<name>MFSINT3</name>
|
|
<description>Status interrupt request of MFS channel 9</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "MFSINT2" -->
|
|
<field>
|
|
<name>MFSINT2</name>
|
|
<description>Transmission interrupt request of MFS channel 9</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "MFSINT1" -->
|
|
<field>
|
|
<name>MFSINT1</name>
|
|
<description>Status interrupt request of MFS channel 1</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "MFSINT0" -->
|
|
<field>
|
|
<name>MFSINT0</name>
|
|
<description>Transmission interrupt request of MFS channel 1</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "IRQ11MON" -->
|
|
<register>
|
|
<name>IRQ11MON</name>
|
|
<description>IRQ11 Batch Read Register</description>
|
|
<addressOffset>0x40</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000003</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "MFSINT1" -->
|
|
<field>
|
|
<name>MFSINT1</name>
|
|
<description>Reception interrupt request of MFS channel 10</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "MFSINT0" -->
|
|
<field>
|
|
<name>MFSINT0</name>
|
|
<description>Reception interrupt request of MFS channel 2</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "IRQ12MON" -->
|
|
<register>
|
|
<name>IRQ12MON</name>
|
|
<description>IRQ12 Batch Read Register</description>
|
|
<addressOffset>0x44</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000000F</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "MFSINT3" -->
|
|
<field>
|
|
<name>MFSINT3</name>
|
|
<description>Status interrupt request of MFS channel 10</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "MFSINT2" -->
|
|
<field>
|
|
<name>MFSINT2</name>
|
|
<description>Transmission interrupt request of MFS channel 10</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "MFSINT1" -->
|
|
<field>
|
|
<name>MFSINT1</name>
|
|
<description>Status interrupt request of MFS channel 2</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "MFSINT0" -->
|
|
<field>
|
|
<name>MFSINT0</name>
|
|
<description>Transmission interrupt request of MFS channel 2</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "IRQ13MON" -->
|
|
<register>
|
|
<name>IRQ13MON</name>
|
|
<description>IRQ13 Batch Read Register</description>
|
|
<addressOffset>0x48</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000003</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "MFSINT1" -->
|
|
<field>
|
|
<name>MFSINT1</name>
|
|
<description>Reception interrupt request of MFS channel 11</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "MFSINT0" -->
|
|
<field>
|
|
<name>MFSINT0</name>
|
|
<description>Reception interrupt request of MFS channel 3</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "IRQ14MON" -->
|
|
<register>
|
|
<name>IRQ14MON</name>
|
|
<description>IRQ14 Batch Read Register</description>
|
|
<addressOffset>0x4C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000000F</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "MFSINT3" -->
|
|
<field>
|
|
<name>MFSINT3</name>
|
|
<description>Status interrupt request of MFS channel 11</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "MFSINT2" -->
|
|
<field>
|
|
<name>MFSINT2</name>
|
|
<description>Transmission interrupt request of MFS channel 11</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "MFSINT1" -->
|
|
<field>
|
|
<name>MFSINT1</name>
|
|
<description>Status interrupt request of MFS channel 3</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "MFSINT0" -->
|
|
<field>
|
|
<name>MFSINT0</name>
|
|
<description>Transmission interrupt request of MFS channel 3</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "IRQ15MON" -->
|
|
<register>
|
|
<name>IRQ15MON</name>
|
|
<description>IRQ15 Batch Read Register</description>
|
|
<addressOffset>0x50</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000003</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "MFSINT1" -->
|
|
<field>
|
|
<name>MFSINT1</name>
|
|
<description>Reception interrupt request of MFS channel 12</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "MFSINT0" -->
|
|
<field>
|
|
<name>MFSINT0</name>
|
|
<description>Reception interrupt request of MFS channel 4</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "IRQ16MON" -->
|
|
<register>
|
|
<name>IRQ16MON</name>
|
|
<description>IRQ16 Batch Read Register</description>
|
|
<addressOffset>0x54</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000000F</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "MFSINT3" -->
|
|
<field>
|
|
<name>MFSINT3</name>
|
|
<description>Status interrupt request of MFS channel 12</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "MFSINT2" -->
|
|
<field>
|
|
<name>MFSINT2</name>
|
|
<description>Transmission interrupt request of MFS channel 12</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "MFSINT1" -->
|
|
<field>
|
|
<name>MFSINT1</name>
|
|
<description>Status interrupt request of MFS channel 4</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "MFSINT0" -->
|
|
<field>
|
|
<name>MFSINT0</name>
|
|
<description>Transmission interrupt request of MFS channel 4</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "IRQ17MON" -->
|
|
<register>
|
|
<name>IRQ17MON</name>
|
|
<description>IRQ17 Batch Read Register</description>
|
|
<addressOffset>0x58</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000003</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "MFSINT1" -->
|
|
<field>
|
|
<name>MFSINT1</name>
|
|
<description>Reception interrupt request of MFS channel 13</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "MFSINT0" -->
|
|
<field>
|
|
<name>MFSINT0</name>
|
|
<description>Reception interrupt request of MFS channel 5</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "IRQ18MON" -->
|
|
<register>
|
|
<name>IRQ18MON</name>
|
|
<description>IRQ18 Batch Read Register</description>
|
|
<addressOffset>0x5C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000000F</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "MFSINT3" -->
|
|
<field>
|
|
<name>MFSINT3</name>
|
|
<description>Status interrupt request of MFS channel 13</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "MFSINT2" -->
|
|
<field>
|
|
<name>MFSINT2</name>
|
|
<description>Transmission interrupt request of MFS channel 13</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "MFSINT1" -->
|
|
<field>
|
|
<name>MFSINT1</name>
|
|
<description>Status interrupt request of MFS channel 5</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "MFSINT0" -->
|
|
<field>
|
|
<name>MFSINT0</name>
|
|
<description>Transmission interrupt request of MFS channel 5</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "IRQ19MON" -->
|
|
<register>
|
|
<name>IRQ19MON</name>
|
|
<description>IRQ19 Batch Read Register</description>
|
|
<addressOffset>0x60</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000013</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "DMAINT" -->
|
|
<field>
|
|
<name>DMAINT</name>
|
|
<description>Interrupt request of DMAC ch.0</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "MFSINT1" -->
|
|
<field>
|
|
<name>MFSINT1</name>
|
|
<description>Reception interrupt request of MFS channel 14</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "MFSINT0" -->
|
|
<field>
|
|
<name>MFSINT0</name>
|
|
<description>Reception interrupt request of MFS channel 6</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "IRQ20MON" -->
|
|
<register>
|
|
<name>IRQ20MON</name>
|
|
<description>IRQ20 Batch Read Register</description>
|
|
<addressOffset>0x64</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000001F</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "DMAINT" -->
|
|
<field>
|
|
<name>DMAINT</name>
|
|
<description>Interrupt request of DMAC ch.1</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "MFSINT3" -->
|
|
<field>
|
|
<name>MFSINT3</name>
|
|
<description>Status interrupt request of MFS channel 14</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "MFSINT2" -->
|
|
<field>
|
|
<name>MFSINT2</name>
|
|
<description>Transmission interrupt request of MFS channel 14</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "MFSINT1" -->
|
|
<field>
|
|
<name>MFSINT1</name>
|
|
<description>Status interrupt request of MFS channel 6</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "MFSINT0" -->
|
|
<field>
|
|
<name>MFSINT0</name>
|
|
<description>Transmission interrupt request of MFS channel 6</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "IRQ21MON" -->
|
|
<register>
|
|
<name>IRQ21MON</name>
|
|
<description>IRQ21 Batch Read Register</description>
|
|
<addressOffset>0x68</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000013</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "DMAINT" -->
|
|
<field>
|
|
<name>DMAINT</name>
|
|
<description>Interrupt request of DMAC ch.2</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "MFSINT1" -->
|
|
<field>
|
|
<name>MFSINT1</name>
|
|
<description>Reception interrupt request of MFS channel 15</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "MFSINT0" -->
|
|
<field>
|
|
<name>MFSINT0</name>
|
|
<description>Reception interrupt request of MFS channel 7</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "IRQ22MON" -->
|
|
<register>
|
|
<name>IRQ22MON</name>
|
|
<description>IRQ22 Batch Read Register</description>
|
|
<addressOffset>0x6C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000001F</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "DMAINT" -->
|
|
<field>
|
|
<name>DMAINT</name>
|
|
<description>Interrupt request of DMAC ch.3</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "MFSINT3" -->
|
|
<field>
|
|
<name>MFSINT3</name>
|
|
<description>Status interrupt request of MFS channel 15</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "MFSINT2" -->
|
|
<field>
|
|
<name>MFSINT2</name>
|
|
<description>Transmission interrupt request of MFS channel 15</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "MFSINT1" -->
|
|
<field>
|
|
<name>MFSINT1</name>
|
|
<description>Status interrupt request of MFS channel 7</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "MFSINT0" -->
|
|
<field>
|
|
<name>MFSINT0</name>
|
|
<description>Transmission interrupt request of MFS channel 7</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "IRQ23MON" -->
|
|
<register>
|
|
<name>IRQ23MON</name>
|
|
<description>IRQ23 Batch Read Register</description>
|
|
<addressOffset>0x70</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x000001FF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "PPGINT8" -->
|
|
<field>
|
|
<name>PPGINT8</name>
|
|
<description>Interrupt request of PPG ch.20</description>
|
|
<lsb>8</lsb>
|
|
<msb>8</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "PPGINT7" -->
|
|
<field>
|
|
<name>PPGINT7</name>
|
|
<description>Interrupt request of PPG ch.18</description>
|
|
<lsb>7</lsb>
|
|
<msb>7</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "PPGINT6" -->
|
|
<field>
|
|
<name>PPGINT6</name>
|
|
<description>Interrupt request of PPG ch.16</description>
|
|
<lsb>6</lsb>
|
|
<msb>6</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "PPGINT5" -->
|
|
<field>
|
|
<name>PPGINT5</name>
|
|
<description>Interrupt request of PPG ch.12</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "PPGINT4" -->
|
|
<field>
|
|
<name>PPGINT4</name>
|
|
<description>Interrupt request of PPG ch.10</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "PPGINT3" -->
|
|
<field>
|
|
<name>PPGINT3</name>
|
|
<description>Interrupt request of PPG ch.8</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "PPGINT2" -->
|
|
<field>
|
|
<name>PPGINT2</name>
|
|
<description>Interrupt request of PPG ch.4</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "PPGINT1" -->
|
|
<field>
|
|
<name>PPGINT1</name>
|
|
<description>Interrupt request of PPG ch.2</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "PPGINT0" -->
|
|
<field>
|
|
<name>PPGINT0</name>
|
|
<description>Interrupt request of PPG ch.0</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "IRQ24MON" -->
|
|
<register>
|
|
<name>IRQ24MON</name>
|
|
<description>IRQ24 Batch Read Register</description>
|
|
<addressOffset>0x74</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000037</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "RTCINT" -->
|
|
<field>
|
|
<name>RTCINT</name>
|
|
<description>RTC interrupt request</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "WCINT" -->
|
|
<field>
|
|
<name>WCINT</name>
|
|
<description>Watch counter interrupt request</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "MPLLINT" -->
|
|
<field>
|
|
<name>MPLLINT</name>
|
|
<description>Stabilization wait completion interrupt request for main PLL oscillation</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "SOSCINT" -->
|
|
<field>
|
|
<name>SOSCINT</name>
|
|
<description>Stabilization wait completion interrupt request for sub-clock oscillation</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "MOSCINT" -->
|
|
<field>
|
|
<name>MOSCINT</name>
|
|
<description>Stabilization wait completion interrupt request for main clock oscillation</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "IRQ25MON" -->
|
|
<register>
|
|
<name>IRQ25MON</name>
|
|
<description>IRQ25 Batch Read Register</description>
|
|
<addressOffset>0x78</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000001F</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "ADCINT4" -->
|
|
<field>
|
|
<name>ADCINT4</name>
|
|
<description>Range comparison result interrupt request in the A/D converter unit 0</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "ADCINT3" -->
|
|
<field>
|
|
<name>ADCINT3</name>
|
|
<description>Conversion result comparison interrupt request in the A/D converter unit 0</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "ADCINT2" -->
|
|
<field>
|
|
<name>ADCINT2</name>
|
|
<description>FIFO overrun interrupt request in the A/D converter unit 0</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "ADCINT1" -->
|
|
<field>
|
|
<name>ADCINT1</name>
|
|
<description>Scan conversion interrupt request in the A/D converter unit 0</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "ADCINT0" -->
|
|
<field>
|
|
<name>ADCINT0</name>
|
|
<description>Priority conversion interrupt request in the A/D converter unit 0</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "IRQ26MON" -->
|
|
<register>
|
|
<name>IRQ26MON</name>
|
|
<description>IRQ26 Batch Read Register</description>
|
|
<addressOffset>0x7C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000001F</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "ADCINT4" -->
|
|
<field>
|
|
<name>ADCINT4</name>
|
|
<description>Range comparison result interrupt request in the A/D converter unit 1</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "ADCINT3" -->
|
|
<field>
|
|
<name>ADCINT3</name>
|
|
<description>Conversion result comparison interrupt request in the A/D converter unit 1</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "ADCINT2" -->
|
|
<field>
|
|
<name>ADCINT2</name>
|
|
<description>FIFO overrun interrupt request in the A/D converter unit 1</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "ADCINT1" -->
|
|
<field>
|
|
<name>ADCINT1</name>
|
|
<description>Scan conversion interrupt request in the A/D converter unit 1</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "ADCINT0" -->
|
|
<field>
|
|
<name>ADCINT0</name>
|
|
<description>Priority conversion interrupt request in the A/D converter unit 1</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "IRQ27MON" -->
|
|
<register>
|
|
<name>IRQ27MON</name>
|
|
<description>IRQ27 Batch Read Register</description>
|
|
<addressOffset>0x80</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000003F</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "LCDCINT" -->
|
|
<field>
|
|
<name>LCDCINT</name>
|
|
<description>Interrupt request for LCD controller</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "ADCINT4" -->
|
|
<field>
|
|
<name>ADCINT4</name>
|
|
<description>Range comparison result interrupt request in the A/D converter unit 2</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "ADCINT3" -->
|
|
<field>
|
|
<name>ADCINT3</name>
|
|
<description>Conversion result comparison interrupt request in the A/D converter unit 2</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "ADCINT2" -->
|
|
<field>
|
|
<name>ADCINT2</name>
|
|
<description>FIFO overrun interrupt request in the A/D converter unit 2</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "ADCINT1" -->
|
|
<field>
|
|
<name>ADCINT1</name>
|
|
<description>Scan conversion interrupt request in the A/D converter unit 2</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "ADCINT0" -->
|
|
<field>
|
|
<name>ADCINT0</name>
|
|
<description>Priority conversion interrupt request in the A/D converter unit 2</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "IRQ28MON" -->
|
|
<register>
|
|
<name>IRQ28MON</name>
|
|
<description>IRQ28 Batch Read Register</description>
|
|
<addressOffset>0x84</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0003FFFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "FRT2INT5" -->
|
|
<field>
|
|
<name>FRT2INT5</name>
|
|
<description>Zero detection interrupt request of the free run timer ch.2 in the MFT unit 2</description>
|
|
<lsb>17</lsb>
|
|
<msb>17</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "FRT2INT4" -->
|
|
<field>
|
|
<name>FRT2INT4</name>
|
|
<description>Zero detection interrupt request of the free run timer ch.1 in the MFT unit 2</description>
|
|
<lsb>16</lsb>
|
|
<msb>16</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "FRT2INT3" -->
|
|
<field>
|
|
<name>FRT2INT3</name>
|
|
<description>Zero detection interrupt request of the free run timer ch.0 in the MFT unit 2</description>
|
|
<lsb>15</lsb>
|
|
<msb>15</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "FRT2INT2" -->
|
|
<field>
|
|
<name>FRT2INT2</name>
|
|
<description>Peak value detection interrupt request of the free run timer ch.2 in the MFT unit 2</description>
|
|
<lsb>14</lsb>
|
|
<msb>14</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "FRT2INT1" -->
|
|
<field>
|
|
<name>FRT2INT1</name>
|
|
<description>Peak value detection interrupt request of the free run timer ch.1 in the MFT unit 2</description>
|
|
<lsb>13</lsb>
|
|
<msb>13</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "FRT2INT0" -->
|
|
<field>
|
|
<name>FRT2INT0</name>
|
|
<description>Peak value detection interrupt request of the free run timer ch.0 in the MFT unit 2</description>
|
|
<lsb>12</lsb>
|
|
<msb>12</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "FRT1INT5" -->
|
|
<field>
|
|
<name>FRT1INT5</name>
|
|
<description>Zero detection interrupt request of the free run timer ch.2 in the MFT unit 1</description>
|
|
<lsb>11</lsb>
|
|
<msb>11</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "FRT1INT4" -->
|
|
<field>
|
|
<name>FRT1INT4</name>
|
|
<description>Zero detection interrupt request of the free run timer ch.1 in the MFT unit 1</description>
|
|
<lsb>10</lsb>
|
|
<msb>10</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "FRT1INT3" -->
|
|
<field>
|
|
<name>FRT1INT3</name>
|
|
<description>Zero detection interrupt request of the free run timer ch.0 in the MFT unit 1</description>
|
|
<lsb>9</lsb>
|
|
<msb>9</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "FRT1INT2" -->
|
|
<field>
|
|
<name>FRT1INT2</name>
|
|
<description>Peak value detection interrupt request of the free run timer ch.2 in the MFT unit 1</description>
|
|
<lsb>8</lsb>
|
|
<msb>8</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "FRT1INT1" -->
|
|
<field>
|
|
<name>FRT1INT1</name>
|
|
<description>Peak value detection interrupt request of the free run timer ch.1 in the MFT unit 1</description>
|
|
<lsb>7</lsb>
|
|
<msb>7</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "FRT1INT0" -->
|
|
<field>
|
|
<name>FRT1INT0</name>
|
|
<description>Peak value detection interrupt request of the free run timer ch.0 in the MFT unit 1</description>
|
|
<lsb>6</lsb>
|
|
<msb>6</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "FRT0INT5" -->
|
|
<field>
|
|
<name>FRT0INT5</name>
|
|
<description>Zero detection interrupt request of the free run timer ch.2 in the MFT unit 0</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "FRT0INT4" -->
|
|
<field>
|
|
<name>FRT0INT4</name>
|
|
<description>Zero detection interrupt request of the free run timer ch.1 in the MFT unit 0</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "FRT0INT3" -->
|
|
<field>
|
|
<name>FRT0INT3</name>
|
|
<description>Zero detection interrupt request of the free run timer ch.0 in the MFT unit 0</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "FRT0INT2" -->
|
|
<field>
|
|
<name>FRT0INT2</name>
|
|
<description>Peak value detection interrupt request of the free run timer ch.2 in the MFT unit 0</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "FRT0INT1" -->
|
|
<field>
|
|
<name>FRT0INT1</name>
|
|
<description>Peak value detection interrupt request of the free run timer ch.1 in the MFT unit 0</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "FRT0INT0" -->
|
|
<field>
|
|
<name>FRT0INT0</name>
|
|
<description>Peak value detection interrupt request of the free run timer ch.0 in the MFT unit 0</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "IRQ29MON" -->
|
|
<register>
|
|
<name>IRQ29MON</name>
|
|
<description>IRQ29 Batch Read Register</description>
|
|
<addressOffset>0x88</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000FFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "ICU2INT3" -->
|
|
<field>
|
|
<name>ICU2INT3</name>
|
|
<description>Interrupt request of the input capture ch.3 in the MFT unit 2</description>
|
|
<lsb>11</lsb>
|
|
<msb>11</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "ICU2INT2" -->
|
|
<field>
|
|
<name>ICU2INT2</name>
|
|
<description>Interrupt request of the input capture ch.2 in the MFT unit 2</description>
|
|
<lsb>10</lsb>
|
|
<msb>10</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "ICU2INT1" -->
|
|
<field>
|
|
<name>ICU2INT1</name>
|
|
<description>Interrupt request of the input capture ch.1 in the MFT unit 2</description>
|
|
<lsb>9</lsb>
|
|
<msb>9</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "ICU2INT0" -->
|
|
<field>
|
|
<name>ICU2INT0</name>
|
|
<description>Interrupt request of the input capture ch.0 in the MFT unit 2</description>
|
|
<lsb>8</lsb>
|
|
<msb>8</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "ICU1INT3" -->
|
|
<field>
|
|
<name>ICU1INT3</name>
|
|
<description>Interrupt request of the input capture ch.3 in the MFT unit 1</description>
|
|
<lsb>7</lsb>
|
|
<msb>7</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "ICU1INT2" -->
|
|
<field>
|
|
<name>ICU1INT2</name>
|
|
<description>Interrupt request of the input capture ch.2 in the MFT unit 1</description>
|
|
<lsb>6</lsb>
|
|
<msb>6</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "ICU1INT1" -->
|
|
<field>
|
|
<name>ICU1INT1</name>
|
|
<description>Interrupt request of the input capture ch.1 in the MFT unit 1</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "ICU1INT0" -->
|
|
<field>
|
|
<name>ICU1INT0</name>
|
|
<description>Interrupt request of the input capture ch.0 in the MFT unit 1</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "ICU0INT3" -->
|
|
<field>
|
|
<name>ICU0INT3</name>
|
|
<description>Interrupt request of the input capture ch.3 in the MFT unit 0</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "ICU0INT2" -->
|
|
<field>
|
|
<name>ICU0INT2</name>
|
|
<description>Interrupt request of the input capture ch.2 in the MFT unit 0</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "ICU0INT1" -->
|
|
<field>
|
|
<name>ICU0INT1</name>
|
|
<description>Interrupt request of the input capture ch.1 in the MFT unit 0</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "ICU0INT0" -->
|
|
<field>
|
|
<name>ICU0INT0</name>
|
|
<description>Interrupt request of the input capture ch.0 in the MFT unit 0</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "IRQ30MON" -->
|
|
<register>
|
|
<name>IRQ30MON</name>
|
|
<description>IRQ30 Batch Read Register</description>
|
|
<addressOffset>0x8C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0003FFFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "OCU2INT5" -->
|
|
<field>
|
|
<name>OCU2INT5</name>
|
|
<description>Interrupt request of the output compare ch.5 in the MFT unit 2</description>
|
|
<lsb>17</lsb>
|
|
<msb>17</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "OCU2INT4" -->
|
|
<field>
|
|
<name>OCU2INT4</name>
|
|
<description>Interrupt request of the output compare ch.4 in the MFT unit 2</description>
|
|
<lsb>16</lsb>
|
|
<msb>16</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "OCU2INT3" -->
|
|
<field>
|
|
<name>OCU2INT3</name>
|
|
<description>Interrupt request of the output compare ch.3 in the MFT unit 2</description>
|
|
<lsb>15</lsb>
|
|
<msb>15</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "OCU2INT2" -->
|
|
<field>
|
|
<name>OCU2INT2</name>
|
|
<description>Interrupt request of the output compare ch.2 in the MFT unit 2</description>
|
|
<lsb>14</lsb>
|
|
<msb>14</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "OCU2INT1" -->
|
|
<field>
|
|
<name>OCU2INT1</name>
|
|
<description>Interrupt request of the output compare ch.1 in the MFT unit 2</description>
|
|
<lsb>13</lsb>
|
|
<msb>13</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "OCU2INT0" -->
|
|
<field>
|
|
<name>OCU2INT0</name>
|
|
<description>Interrupt request of the output compare ch.0 in the MFT unit 2</description>
|
|
<lsb>12</lsb>
|
|
<msb>12</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "OCU1INT5" -->
|
|
<field>
|
|
<name>OCU1INT5</name>
|
|
<description>Interrupt request of the output compare ch.5 in the MFT unit 1</description>
|
|
<lsb>11</lsb>
|
|
<msb>11</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "OCU1INT4" -->
|
|
<field>
|
|
<name>OCU1INT4</name>
|
|
<description>Interrupt request of the output compare ch.4 in the MFT unit 1</description>
|
|
<lsb>10</lsb>
|
|
<msb>10</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "OCU1INT3" -->
|
|
<field>
|
|
<name>OCU1INT3</name>
|
|
<description>Interrupt request of the output compare ch.3 in the MFT unit 1</description>
|
|
<lsb>9</lsb>
|
|
<msb>9</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "OCU1INT2" -->
|
|
<field>
|
|
<name>OCU1INT2</name>
|
|
<description>Interrupt request of the output compare ch.2 in the MFT unit 1</description>
|
|
<lsb>8</lsb>
|
|
<msb>8</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "OCU1INT1" -->
|
|
<field>
|
|
<name>OCU1INT1</name>
|
|
<description>Interrupt request of the output compare ch.1 in the MFT unit 1</description>
|
|
<lsb>7</lsb>
|
|
<msb>7</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "OCU1INT0" -->
|
|
<field>
|
|
<name>OCU1INT0</name>
|
|
<description>Interrupt request of the output compare ch.0 in the MFT unit 1</description>
|
|
<lsb>6</lsb>
|
|
<msb>6</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "OCU0INT5" -->
|
|
<field>
|
|
<name>OCU0INT5</name>
|
|
<description>Interrupt request of the output compare ch.5 in the MFT unit 0</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "OCU0INT4" -->
|
|
<field>
|
|
<name>OCU0INT4</name>
|
|
<description>Interrupt request of the output compare ch.4 in the MFT unit 0</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "OCU0INT3" -->
|
|
<field>
|
|
<name>OCU0INT3</name>
|
|
<description>Interrupt request of the output compare ch.3 in the MFT unit 0</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "OCU0INT2" -->
|
|
<field>
|
|
<name>OCU0INT2</name>
|
|
<description>Interrupt request of the output compare ch.2 in the MFT unit 0</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "OCU0INT1" -->
|
|
<field>
|
|
<name>OCU0INT1</name>
|
|
<description>Interrupt request of the output compare ch.1 in the MFT unit 0</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "OCU0INT0" -->
|
|
<field>
|
|
<name>OCU0INT0</name>
|
|
<description>Interrupt request of the output compare ch.0 in the MFT unit 0</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "IRQ31MON" -->
|
|
<register>
|
|
<name>IRQ31MON</name>
|
|
<description>IRQ31 Batch Read Register</description>
|
|
<addressOffset>0x90</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0800FFFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "FLASHINT" -->
|
|
<field>
|
|
<name>FLASHINT</name>
|
|
<description>RDY/HANG interrupt request for f lash memory</description>
|
|
<lsb>27</lsb>
|
|
<msb>27</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "BTINT15" -->
|
|
<field>
|
|
<name>BTINT15</name>
|
|
<description>IRQ1 interrupt request of the base timer ch.7</description>
|
|
<lsb>15</lsb>
|
|
<msb>15</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "BTINT14" -->
|
|
<field>
|
|
<name>BTINT14</name>
|
|
<description>IRQ0 interrupt request of the base timer ch.7</description>
|
|
<lsb>14</lsb>
|
|
<msb>14</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "BTINT13" -->
|
|
<field>
|
|
<name>BTINT13</name>
|
|
<description>IRQ1 interrupt request of the base timer ch.6</description>
|
|
<lsb>13</lsb>
|
|
<msb>13</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "BTINT12" -->
|
|
<field>
|
|
<name>BTINT12</name>
|
|
<description>IRQ0 interrupt request of the base timer ch.6</description>
|
|
<lsb>12</lsb>
|
|
<msb>12</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "BTINT11" -->
|
|
<field>
|
|
<name>BTINT11</name>
|
|
<description>IRQ1 interrupt request of the base timer ch.5</description>
|
|
<lsb>11</lsb>
|
|
<msb>11</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "BTINT10" -->
|
|
<field>
|
|
<name>BTINT10</name>
|
|
<description>IRQ0 interrupt request of the base timer ch.5</description>
|
|
<lsb>10</lsb>
|
|
<msb>10</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "BTINT9" -->
|
|
<field>
|
|
<name>BTINT9</name>
|
|
<description>IRQ1 interrupt request of the base timer ch.4</description>
|
|
<lsb>9</lsb>
|
|
<msb>9</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "BTINT8" -->
|
|
<field>
|
|
<name>BTINT8</name>
|
|
<description>IRQ0 interrupt request of the base timer ch.4</description>
|
|
<lsb>8</lsb>
|
|
<msb>8</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "BTINT7" -->
|
|
<field>
|
|
<name>BTINT7</name>
|
|
<description>IRQ1 interrupt request of the base timer ch.3</description>
|
|
<lsb>7</lsb>
|
|
<msb>7</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "BTINT6" -->
|
|
<field>
|
|
<name>BTINT6</name>
|
|
<description>IRQ0 interrupt request of the base timer ch.3</description>
|
|
<lsb>6</lsb>
|
|
<msb>6</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "BTINT5" -->
|
|
<field>
|
|
<name>BTINT5</name>
|
|
<description>IRQ1 interrupt request of the base timer ch.2</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "BTINT4" -->
|
|
<field>
|
|
<name>BTINT4</name>
|
|
<description>IRQ0 interrupt request of the base timer ch.2</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "BTINT3" -->
|
|
<field>
|
|
<name>BTINT3</name>
|
|
<description>IRQ1 interrupt request of the base timer ch.1</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "BTINT2" -->
|
|
<field>
|
|
<name>BTINT2</name>
|
|
<description>IRQ0 interrupt request of the base timer ch.1</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "BTINT1" -->
|
|
<field>
|
|
<name>BTINT1</name>
|
|
<description>IRQ1 interrupt request of the base timer ch.0</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "BTINT0" -->
|
|
<field>
|
|
<name>BTINT0</name>
|
|
<description>IRQ0 interrupt request of the base timer ch.0</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "RCINTSEL0" -->
|
|
<register>
|
|
<name>RCINTSEL0</name>
|
|
<description>Interrupt Factor Selection Register 0</description>
|
|
<addressOffset>0x210</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0</resetValue>
|
|
<resetMask>0xFFFFFFFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "INTSEL3" -->
|
|
<field>
|
|
<name>INTSEL3</name>
|
|
<description>Select the interrupt factor for the interrupt vector No.22</description>
|
|
<lsb>24</lsb>
|
|
<msb>31</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "INTSEL2" -->
|
|
<field>
|
|
<name>INTSEL2</name>
|
|
<description>Select the interrupt factor for the interrupt vector No.21</description>
|
|
<lsb>16</lsb>
|
|
<msb>23</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "INTSEL1" -->
|
|
<field>
|
|
<name>INTSEL1</name>
|
|
<description>Select the interrupt factor for the interrupt vector No.20</description>
|
|
<lsb>8</lsb>
|
|
<msb>15</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "INTSEL0" -->
|
|
<field>
|
|
<name>INTSEL0</name>
|
|
<description>Select the interrupt factor for the interrupt vector No.19</description>
|
|
<lsb>0</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "RCINTSEL1" -->
|
|
<register>
|
|
<name>RCINTSEL1</name>
|
|
<description>Interrupt Factor Selection Register 1</description>
|
|
<addressOffset>0x214</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0</resetValue>
|
|
<resetMask>0xFFFFFFFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "INTSEL7" -->
|
|
<field>
|
|
<name>INTSEL7</name>
|
|
<description>Select the interrupt factor for the interrupt vector No.26</description>
|
|
<lsb>24</lsb>
|
|
<msb>31</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "INTSEL6" -->
|
|
<field>
|
|
<name>INTSEL6</name>
|
|
<description>Select the interrupt factor for the interrupt vector No.25</description>
|
|
<lsb>16</lsb>
|
|
<msb>23</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "INTSEL5" -->
|
|
<field>
|
|
<name>INTSEL5</name>
|
|
<description>Select the interrupt factor for the interrupt vector No.24</description>
|
|
<lsb>8</lsb>
|
|
<msb>15</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "INTSEL4" -->
|
|
<field>
|
|
<name>INTSEL4</name>
|
|
<description>Select the interrupt factor for the interrupt vector No.23</description>
|
|
<lsb>0</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral>
|
|
<!-- PERIPHERAL "GPIO" -->
|
|
<peripheral>
|
|
<name>GPIO</name>
|
|
<description>I/O Port Registers</description>
|
|
<groupName>GPIO</groupName>
|
|
<baseAddress>0x40033000</baseAddress>
|
|
<!-- ADDRESS BLOCK -->
|
|
<addressBlock>
|
|
<offset>0x0</offset>
|
|
<size>0x40</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x100</offset>
|
|
<size>0x40</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x200</offset>
|
|
<size>0x40</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x300</offset>
|
|
<size>0x40</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x400</offset>
|
|
<size>0x40</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x500</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x580</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x600</offset>
|
|
<size>0x2C</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x630</offset>
|
|
<size>0x1C</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x654</offset>
|
|
<size>0x8</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x700</offset>
|
|
<size>0x40</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x900</offset>
|
|
<size>0x40</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<!-- REGISTERS -->
|
|
<registers>
|
|
<!-- REGISTER "PFR0" -->
|
|
<register>
|
|
<name>PFR0</name>
|
|
<description>Port Function Setting Register 0</description>
|
|
<addressOffset>0x0</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000000A</resetValue>
|
|
<resetMask>0x0000801F</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "P0F" -->
|
|
<field>
|
|
<name>P0F</name>
|
|
<description>Bit15 of PFR0</description>
|
|
<lsb>15</lsb>
|
|
<msb>15</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "P04" -->
|
|
<field>
|
|
<name>P04</name>
|
|
<description>Bit4 of PFR0</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "P03" -->
|
|
<field>
|
|
<name>P03</name>
|
|
<description>Bit3 of PFR0</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "P02" -->
|
|
<field>
|
|
<name>P02</name>
|
|
<description>Bit2 of PFR0</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "P01" -->
|
|
<field>
|
|
<name>P01</name>
|
|
<description>Bit1 of PFR0</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "P00" -->
|
|
<field>
|
|
<name>P00</name>
|
|
<description>Bit0 of PFR0</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "PFR1" -->
|
|
<register>
|
|
<name>PFR1</name>
|
|
<description>Port Function Setting Register 1</description>
|
|
<addressOffset>0x4</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000003F</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "P15" -->
|
|
<field>
|
|
<name>P15</name>
|
|
<description>Bit5 of PFR1</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "P14" -->
|
|
<field>
|
|
<name>P14</name>
|
|
<description>Bit4 of PFR1</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "P13" -->
|
|
<field>
|
|
<name>P13</name>
|
|
<description>Bit3 of PFR1</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "P12" -->
|
|
<field>
|
|
<name>P12</name>
|
|
<description>Bit2 of PFR1</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "P11" -->
|
|
<field>
|
|
<name>P11</name>
|
|
<description>Bit1 of PFR1</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "P10" -->
|
|
<field>
|
|
<name>P10</name>
|
|
<description>Bit0 of PFR1</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "PFR2" -->
|
|
<register>
|
|
<name>PFR2</name>
|
|
<description>Port Function Setting Register 2</description>
|
|
<addressOffset>0x8</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000000E</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "P23" -->
|
|
<field>
|
|
<name>P23</name>
|
|
<description>Bit3 of PFR2</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "P22" -->
|
|
<field>
|
|
<name>P22</name>
|
|
<description>Bit2 of PFR2</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "P21" -->
|
|
<field>
|
|
<name>P21</name>
|
|
<description>Bit1 of PFR2</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "PFR3" -->
|
|
<register>
|
|
<name>PFR3</name>
|
|
<description>Port Function Setting Register 3</description>
|
|
<addressOffset>0xC</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FE00</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "P3F" -->
|
|
<field>
|
|
<name>P3F</name>
|
|
<description>Bit15 of PFR3</description>
|
|
<lsb>15</lsb>
|
|
<msb>15</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "P3E" -->
|
|
<field>
|
|
<name>P3E</name>
|
|
<description>Bit14 of PFR3</description>
|
|
<lsb>14</lsb>
|
|
<msb>14</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "P3D" -->
|
|
<field>
|
|
<name>P3D</name>
|
|
<description>Bit13 of PFR3</description>
|
|
<lsb>13</lsb>
|
|
<msb>13</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "P3C" -->
|
|
<field>
|
|
<name>P3C</name>
|
|
<description>Bit12 of PFR3</description>
|
|
<lsb>12</lsb>
|
|
<msb>12</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "P3B" -->
|
|
<field>
|
|
<name>P3B</name>
|
|
<description>Bit11 of PFR3</description>
|
|
<lsb>11</lsb>
|
|
<msb>11</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "P3A" -->
|
|
<field>
|
|
<name>P3A</name>
|
|
<description>Bit10 of PFR3</description>
|
|
<lsb>10</lsb>
|
|
<msb>10</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "P39" -->
|
|
<field>
|
|
<name>P39</name>
|
|
<description>Bit9 of PFR3</description>
|
|
<lsb>9</lsb>
|
|
<msb>9</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "PFR4" -->
|
|
<register>
|
|
<name>PFR4</name>
|
|
<description>Port Function Setting Register 4</description>
|
|
<addressOffset>0x10</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x000006C0</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "P4A" -->
|
|
<field>
|
|
<name>P4A</name>
|
|
<description>Bit10 of PFR4</description>
|
|
<lsb>10</lsb>
|
|
<msb>10</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "P49" -->
|
|
<field>
|
|
<name>P49</name>
|
|
<description>Bit9 of PFR4</description>
|
|
<lsb>9</lsb>
|
|
<msb>9</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "P47" -->
|
|
<field>
|
|
<name>P47</name>
|
|
<description>Bit7 of PFR4</description>
|
|
<lsb>7</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "P46" -->
|
|
<field>
|
|
<name>P46</name>
|
|
<description>Bit6 of PFR4</description>
|
|
<lsb>6</lsb>
|
|
<msb>6</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "PFR5" -->
|
|
<register>
|
|
<name>PFR5</name>
|
|
<description>Port Function Setting Register 5</description>
|
|
<addressOffset>0x14</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000007</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "P52" -->
|
|
<field>
|
|
<name>P52</name>
|
|
<description>Bit2 of PFR5</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "P51" -->
|
|
<field>
|
|
<name>P51</name>
|
|
<description>Bit1 of PFR5</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "P50" -->
|
|
<field>
|
|
<name>P50</name>
|
|
<description>Bit0 of PFR5</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "PFR6" -->
|
|
<register>
|
|
<name>PFR6</name>
|
|
<description>Port Function Setting Register 6</description>
|
|
<addressOffset>0x18</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000003</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "P61" -->
|
|
<field>
|
|
<name>P61</name>
|
|
<description>Bit1 of PFR6</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "P60" -->
|
|
<field>
|
|
<name>P60</name>
|
|
<description>Bit0 of PFR6</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "PFR8" -->
|
|
<register>
|
|
<name>PFR8</name>
|
|
<description>Port Function Setting Register 8</description>
|
|
<addressOffset>0x20</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000007</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "P82" -->
|
|
<field>
|
|
<name>P82</name>
|
|
<description>Bit2 of PFR8</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "P81" -->
|
|
<field>
|
|
<name>P81</name>
|
|
<description>Bit1 of PFR8</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "P80" -->
|
|
<field>
|
|
<name>P80</name>
|
|
<description>Bit0 of PFR8</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "PFRE" -->
|
|
<register>
|
|
<name>PFRE</name>
|
|
<description>Port Function Setting Register E</description>
|
|
<addressOffset>0x38</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000000D</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "PE3" -->
|
|
<field>
|
|
<name>PE3</name>
|
|
<description>Bit3 of PFRE</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "PE2" -->
|
|
<field>
|
|
<name>PE2</name>
|
|
<description>Bit2 of PFRE</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "PE0" -->
|
|
<field>
|
|
<name>PE0</name>
|
|
<description>Bit0 of PFRE</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "PCR0" -->
|
|
<register derivedFrom="PFR0">
|
|
<name>PCR0</name>
|
|
<description>Pull-up Setting Register 0</description>
|
|
<addressOffset>0x100</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "PCR1" -->
|
|
<register derivedFrom="PFR1">
|
|
<name>PCR1</name>
|
|
<description>Pull-up Setting Register 1</description>
|
|
<addressOffset>0x104</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "PCR2" -->
|
|
<register derivedFrom="PFR2">
|
|
<name>PCR2</name>
|
|
<description>Pull-up Setting Register 2</description>
|
|
<addressOffset>0x108</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "PCR3" -->
|
|
<register derivedFrom="PFR3">
|
|
<name>PCR3</name>
|
|
<description>Pull-up Setting Register 3</description>
|
|
<addressOffset>0x10C</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "PCR4" -->
|
|
<register derivedFrom="PFR4">
|
|
<name>PCR4</name>
|
|
<description>Pull-up Setting Register 4</description>
|
|
<addressOffset>0x110</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "PCR5" -->
|
|
<register derivedFrom="PFR5">
|
|
<name>PCR5</name>
|
|
<description>Pull-up Setting Register 5</description>
|
|
<addressOffset>0x114</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "PCR6" -->
|
|
<register derivedFrom="PFR6">
|
|
<name>PCR6</name>
|
|
<description>Pull-up Setting Register 6</description>
|
|
<addressOffset>0x118</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "PCR8" -->
|
|
<register derivedFrom="PFR8">
|
|
<name>PCR8</name>
|
|
<description>Pull-up Setting Register 8</description>
|
|
<addressOffset>0x120</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "PCRE" -->
|
|
<register derivedFrom="PFRE">
|
|
<name>PCRE</name>
|
|
<description>Pull-up Setting Register E</description>
|
|
<addressOffset>0x138</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "DDR0" -->
|
|
<register>
|
|
<name>DDR0</name>
|
|
<description>Port input/output Direction Setting Register 0</description>
|
|
<addressOffset>0x200</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000801F</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "P0F" -->
|
|
<field>
|
|
<name>P0F</name>
|
|
<description>Bit15 of DDR0</description>
|
|
<lsb>15</lsb>
|
|
<msb>15</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "P04" -->
|
|
<field>
|
|
<name>P04</name>
|
|
<description>Bit4 of DDR0</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "P03" -->
|
|
<field>
|
|
<name>P03</name>
|
|
<description>Bit3 of DDR0</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "P02" -->
|
|
<field>
|
|
<name>P02</name>
|
|
<description>Bit2 of DDR0</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "P01" -->
|
|
<field>
|
|
<name>P01</name>
|
|
<description>Bit1 of DDR0</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "P00" -->
|
|
<field>
|
|
<name>P00</name>
|
|
<description>Bit0 of DDR0</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "DDR1" -->
|
|
<register derivedFrom="PFR1">
|
|
<name>DDR1</name>
|
|
<description>Port input/output Direction Setting Register 1</description>
|
|
<addressOffset>0x204</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "DDR2" -->
|
|
<register derivedFrom="PFR2">
|
|
<name>DDR2</name>
|
|
<description>Port input/output Direction Setting Register 2</description>
|
|
<addressOffset>0x208</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "DDR3" -->
|
|
<register derivedFrom="PFR3">
|
|
<name>DDR3</name>
|
|
<description>Port input/output Direction Setting Register 3</description>
|
|
<addressOffset>0x20C</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "DDR4" -->
|
|
<register derivedFrom="PFR4">
|
|
<name>DDR4</name>
|
|
<description>Port input/output Direction Setting Register 4</description>
|
|
<addressOffset>0x210</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "DDR5" -->
|
|
<register derivedFrom="PFR5">
|
|
<name>DDR5</name>
|
|
<description>Port input/output Direction Setting Register 5</description>
|
|
<addressOffset>0x214</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "DDR6" -->
|
|
<register derivedFrom="PFR6">
|
|
<name>DDR6</name>
|
|
<description>Port input/output Direction Setting Register 6</description>
|
|
<addressOffset>0x218</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "DDR8" -->
|
|
<register derivedFrom="PFR8">
|
|
<name>DDR8</name>
|
|
<description>Port input/output Direction Setting Register 8</description>
|
|
<addressOffset>0x220</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "DDRE" -->
|
|
<register derivedFrom="PFRE">
|
|
<name>DDRE</name>
|
|
<description>Port input/output Direction Setting Register E</description>
|
|
<addressOffset>0x238</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "PDIR0" -->
|
|
<register>
|
|
<name>PDIR0</name>
|
|
<description>Port Input Data Register 0</description>
|
|
<addressOffset>0x300</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000801F</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "P0F" -->
|
|
<field>
|
|
<name>P0F</name>
|
|
<description>Bit15 of PDIR0</description>
|
|
<lsb>15</lsb>
|
|
<msb>15</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "P04" -->
|
|
<field>
|
|
<name>P04</name>
|
|
<description>Bit4 of PDIR0</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "P03" -->
|
|
<field>
|
|
<name>P03</name>
|
|
<description>Bit3 of PDIR0</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "P02" -->
|
|
<field>
|
|
<name>P02</name>
|
|
<description>Bit2 of PDIR0</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "P01" -->
|
|
<field>
|
|
<name>P01</name>
|
|
<description>Bit1 of PDIR0</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "P00" -->
|
|
<field>
|
|
<name>P00</name>
|
|
<description>Bit0 of PDIR0</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "PDIR1" -->
|
|
<register>
|
|
<name>PDIR1</name>
|
|
<description>Port Input Data Register 1</description>
|
|
<addressOffset>0x304</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000003F</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "P15" -->
|
|
<field>
|
|
<name>P15</name>
|
|
<description>Bit5 of PDIR1</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "P14" -->
|
|
<field>
|
|
<name>P14</name>
|
|
<description>Bit4 of PDIR1</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "P13" -->
|
|
<field>
|
|
<name>P13</name>
|
|
<description>Bit3 of PDIR1</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "P12" -->
|
|
<field>
|
|
<name>P12</name>
|
|
<description>Bit2 of PDIR1</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "P11" -->
|
|
<field>
|
|
<name>P11</name>
|
|
<description>Bit1 of PDIR1</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "P10" -->
|
|
<field>
|
|
<name>P10</name>
|
|
<description>Bit0 of PDIR1</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "PDIR2" -->
|
|
<register>
|
|
<name>PDIR2</name>
|
|
<description>Port Input Data Register 2</description>
|
|
<addressOffset>0x308</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000000E</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "P23" -->
|
|
<field>
|
|
<name>P23</name>
|
|
<description>Bit3 of PDIR2</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "P22" -->
|
|
<field>
|
|
<name>P22</name>
|
|
<description>Bit2 of PDIR2</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "P21" -->
|
|
<field>
|
|
<name>P21</name>
|
|
<description>Bit1 of PDIR2</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "PDIR3" -->
|
|
<register>
|
|
<name>PDIR3</name>
|
|
<description>Port Input Data Register 3</description>
|
|
<addressOffset>0x30C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FE00</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "P3F" -->
|
|
<field>
|
|
<name>P3F</name>
|
|
<description>Bit15 of PDIR3</description>
|
|
<lsb>15</lsb>
|
|
<msb>15</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "P3E" -->
|
|
<field>
|
|
<name>P3E</name>
|
|
<description>Bit14 of PDIR3</description>
|
|
<lsb>14</lsb>
|
|
<msb>14</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "P3D" -->
|
|
<field>
|
|
<name>P3D</name>
|
|
<description>Bit13 of PDIR3</description>
|
|
<lsb>13</lsb>
|
|
<msb>13</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "P3C" -->
|
|
<field>
|
|
<name>P3C</name>
|
|
<description>Bit12 of PDIR3</description>
|
|
<lsb>12</lsb>
|
|
<msb>12</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "P3B" -->
|
|
<field>
|
|
<name>P3B</name>
|
|
<description>Bit11 of PDIR3</description>
|
|
<lsb>11</lsb>
|
|
<msb>11</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "P3A" -->
|
|
<field>
|
|
<name>P3A</name>
|
|
<description>Bit10 of PDIR3</description>
|
|
<lsb>10</lsb>
|
|
<msb>10</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "P39" -->
|
|
<field>
|
|
<name>P39</name>
|
|
<description>Bit9 of PDIR3</description>
|
|
<lsb>9</lsb>
|
|
<msb>9</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "PDIR4" -->
|
|
<register>
|
|
<name>PDIR4</name>
|
|
<description>Port Input Data Register 4</description>
|
|
<addressOffset>0x310</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x000006C0</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "P4A" -->
|
|
<field>
|
|
<name>P4A</name>
|
|
<description>Bit10 of PDIR4</description>
|
|
<lsb>10</lsb>
|
|
<msb>10</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "P49" -->
|
|
<field>
|
|
<name>P49</name>
|
|
<description>Bit9 of PDIR4</description>
|
|
<lsb>9</lsb>
|
|
<msb>9</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "P47" -->
|
|
<field>
|
|
<name>P47</name>
|
|
<description>Bit7 of PDIR4</description>
|
|
<lsb>7</lsb>
|
|
<msb>7</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "P46" -->
|
|
<field>
|
|
<name>P46</name>
|
|
<description>Bit6 of PDIR4</description>
|
|
<lsb>6</lsb>
|
|
<msb>6</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "PDIR5" -->
|
|
<register>
|
|
<name>PDIR5</name>
|
|
<description>Port Input Data Register 5</description>
|
|
<addressOffset>0x314</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000007</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "P52" -->
|
|
<field>
|
|
<name>P52</name>
|
|
<description>Bit2 of PDIR5</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "P51" -->
|
|
<field>
|
|
<name>P51</name>
|
|
<description>Bit1 of PDIR5</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "P50" -->
|
|
<field>
|
|
<name>P50</name>
|
|
<description>Bit0 of PDIR5</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "PDIR6" -->
|
|
<register>
|
|
<name>PDIR6</name>
|
|
<description>Port Input Data Register 6</description>
|
|
<addressOffset>0x318</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000003</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "P61" -->
|
|
<field>
|
|
<name>P61</name>
|
|
<description>Bit1 of PDIR6</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "P60" -->
|
|
<field>
|
|
<name>P60</name>
|
|
<description>Bit0 of PDIR6</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "PDIR8" -->
|
|
<register>
|
|
<name>PDIR8</name>
|
|
<description>Port Input Data Register 8</description>
|
|
<addressOffset>0x320</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000007</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "P82" -->
|
|
<field>
|
|
<name>P82</name>
|
|
<description>Bit2 of PDIR8</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "P81" -->
|
|
<field>
|
|
<name>P81</name>
|
|
<description>Bit1 of PDIR8</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "P80" -->
|
|
<field>
|
|
<name>P80</name>
|
|
<description>Bit0 of PDIR8</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "PDIRE" -->
|
|
<register>
|
|
<name>PDIRE</name>
|
|
<description>Port Input Data Register E</description>
|
|
<addressOffset>0x338</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000000D</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "PE3" -->
|
|
<field>
|
|
<name>PE3</name>
|
|
<description>Bit3 of PDIRE</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "PE2" -->
|
|
<field>
|
|
<name>PE2</name>
|
|
<description>Bit2 of PDIRE</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "PE0" -->
|
|
<field>
|
|
<name>PE0</name>
|
|
<description>Bit0 of PDIRE</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "PDOR0" -->
|
|
<register derivedFrom="DDR0">
|
|
<name>PDOR0</name>
|
|
<description>Port Output Data Register 0</description>
|
|
<addressOffset>0x400</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "PDOR1" -->
|
|
<register derivedFrom="DDR1">
|
|
<name>PDOR1</name>
|
|
<description>Port Output Data Register 1</description>
|
|
<addressOffset>0x404</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "PDOR2" -->
|
|
<register derivedFrom="DDR2">
|
|
<name>PDOR2</name>
|
|
<description>Port Output Data Register 2</description>
|
|
<addressOffset>0x408</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "PDOR3" -->
|
|
<register derivedFrom="DDR3">
|
|
<name>PDOR3</name>
|
|
<description>Port Output Data Register 3</description>
|
|
<addressOffset>0x40C</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "PDOR4" -->
|
|
<register derivedFrom="DDR4">
|
|
<name>PDOR4</name>
|
|
<description>Port Output Data Register 4</description>
|
|
<addressOffset>0x410</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "PDOR5" -->
|
|
<register derivedFrom="DDR5">
|
|
<name>PDOR5</name>
|
|
<description>Port Output Data Register 5</description>
|
|
<addressOffset>0x414</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "PDOR6" -->
|
|
<register derivedFrom="DDR6">
|
|
<name>PDOR6</name>
|
|
<description>Port Output Data Register 6</description>
|
|
<addressOffset>0x418</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "PDOR8" -->
|
|
<register derivedFrom="DDR8">
|
|
<name>PDOR8</name>
|
|
<description>Port Output Data Register 8</description>
|
|
<addressOffset>0x420</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "PDORE" -->
|
|
<register derivedFrom="DDRE">
|
|
<name>PDORE</name>
|
|
<description>Port Output Data Register E</description>
|
|
<addressOffset>0x438</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "ADE" -->
|
|
<register>
|
|
<name>ADE</name>
|
|
<description>Analog Input Setting Register</description>
|
|
<addressOffset>0x500</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0xFFFFFFFF</resetValue>
|
|
<resetMask>0xFFFFFFFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "AN31" -->
|
|
<field>
|
|
<name>AN31</name>
|
|
<description>Analog Input Ch.31 Setting Register</description>
|
|
<lsb>31</lsb>
|
|
<msb>31</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "AN30" -->
|
|
<field>
|
|
<name>AN30</name>
|
|
<description>Analog Input Ch.30 Setting Register</description>
|
|
<lsb>30</lsb>
|
|
<msb>30</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "AN29" -->
|
|
<field>
|
|
<name>AN29</name>
|
|
<description>Analog Input Ch.29 Setting Register</description>
|
|
<lsb>29</lsb>
|
|
<msb>29</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "AN28" -->
|
|
<field>
|
|
<name>AN28</name>
|
|
<description>Analog Input Ch.28 Setting Register</description>
|
|
<lsb>28</lsb>
|
|
<msb>28</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "AN27" -->
|
|
<field>
|
|
<name>AN27</name>
|
|
<description>Analog Input Ch.27 Setting Register</description>
|
|
<lsb>27</lsb>
|
|
<msb>27</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "AN26" -->
|
|
<field>
|
|
<name>AN26</name>
|
|
<description>Analog Input Ch.26 Setting Register</description>
|
|
<lsb>26</lsb>
|
|
<msb>26</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "AN25" -->
|
|
<field>
|
|
<name>AN25</name>
|
|
<description>Analog Input Ch.25 Setting Register</description>
|
|
<lsb>25</lsb>
|
|
<msb>25</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "AN24" -->
|
|
<field>
|
|
<name>AN24</name>
|
|
<description>Analog Input Ch.24 Setting Register</description>
|
|
<lsb>24</lsb>
|
|
<msb>24</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "AN23" -->
|
|
<field>
|
|
<name>AN23</name>
|
|
<description>Analog Input Ch.23 Setting Register</description>
|
|
<lsb>23</lsb>
|
|
<msb>23</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "AN22" -->
|
|
<field>
|
|
<name>AN22</name>
|
|
<description>Analog Input Ch.22 Setting Register</description>
|
|
<lsb>22</lsb>
|
|
<msb>22</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "AN21" -->
|
|
<field>
|
|
<name>AN21</name>
|
|
<description>Analog Input Ch.21 Setting Register</description>
|
|
<lsb>21</lsb>
|
|
<msb>21</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "AN20" -->
|
|
<field>
|
|
<name>AN20</name>
|
|
<description>Analog Input Ch.20 Setting Register</description>
|
|
<lsb>20</lsb>
|
|
<msb>20</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "AN19" -->
|
|
<field>
|
|
<name>AN19</name>
|
|
<description>Analog Input Ch.19 Setting Register</description>
|
|
<lsb>19</lsb>
|
|
<msb>19</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "AN18" -->
|
|
<field>
|
|
<name>AN18</name>
|
|
<description>Analog Input Ch.18 Setting Register</description>
|
|
<lsb>18</lsb>
|
|
<msb>18</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "AN17" -->
|
|
<field>
|
|
<name>AN17</name>
|
|
<description>Analog Input Ch.17 Setting Register</description>
|
|
<lsb>17</lsb>
|
|
<msb>17</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "AN16" -->
|
|
<field>
|
|
<name>AN16</name>
|
|
<description>Analog Input Ch.16 Setting Register</description>
|
|
<lsb>16</lsb>
|
|
<msb>16</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "AN15" -->
|
|
<field>
|
|
<name>AN15</name>
|
|
<description>Analog Input Ch.15 Setting Register</description>
|
|
<lsb>15</lsb>
|
|
<msb>15</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "AN14" -->
|
|
<field>
|
|
<name>AN14</name>
|
|
<description>Analog Input Ch.14 Setting Register</description>
|
|
<lsb>14</lsb>
|
|
<msb>14</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "AN13" -->
|
|
<field>
|
|
<name>AN13</name>
|
|
<description>Analog Input Ch.13 Setting Register</description>
|
|
<lsb>13</lsb>
|
|
<msb>13</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "AN12" -->
|
|
<field>
|
|
<name>AN12</name>
|
|
<description>Analog Input Ch.12 Setting Register</description>
|
|
<lsb>12</lsb>
|
|
<msb>12</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "AN11" -->
|
|
<field>
|
|
<name>AN11</name>
|
|
<description>Analog Input Ch.11 Setting Register</description>
|
|
<lsb>11</lsb>
|
|
<msb>11</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "AN10" -->
|
|
<field>
|
|
<name>AN10</name>
|
|
<description>Analog Input Ch.10 Setting Register</description>
|
|
<lsb>10</lsb>
|
|
<msb>10</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "AN09" -->
|
|
<field>
|
|
<name>AN09</name>
|
|
<description>Analog Input Ch.9 Setting Register</description>
|
|
<lsb>9</lsb>
|
|
<msb>9</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "AN08" -->
|
|
<field>
|
|
<name>AN08</name>
|
|
<description>Analog Input Ch.8 Setting Register</description>
|
|
<lsb>8</lsb>
|
|
<msb>8</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "AN07" -->
|
|
<field>
|
|
<name>AN07</name>
|
|
<description>Analog Input Ch.7 Setting Register</description>
|
|
<lsb>7</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "AN06" -->
|
|
<field>
|
|
<name>AN06</name>
|
|
<description>Analog Input Ch.6 Setting Register</description>
|
|
<lsb>6</lsb>
|
|
<msb>6</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "AN05" -->
|
|
<field>
|
|
<name>AN05</name>
|
|
<description>Analog Input Ch.5 Setting Register</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "AN04" -->
|
|
<field>
|
|
<name>AN04</name>
|
|
<description>Analog Input Ch.4 Setting Register</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "AN03" -->
|
|
<field>
|
|
<name>AN03</name>
|
|
<description>Analog Input Ch.3 Setting Register</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "AN02" -->
|
|
<field>
|
|
<name>AN02</name>
|
|
<description>Analog Input Ch.2 Setting Register</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "AN01" -->
|
|
<field>
|
|
<name>AN01</name>
|
|
<description>Analog Input Ch.1 Setting Register</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "AN00" -->
|
|
<field>
|
|
<name>AN00</name>
|
|
<description>Analog Input Ch.0 Setting Register</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "SPSR" -->
|
|
<register>
|
|
<name>SPSR</name>
|
|
<description>Special Port Setting Register</description>
|
|
<addressOffset>0x580</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000005</resetValue>
|
|
<resetMask>0x0000000F</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "MAINXC" -->
|
|
<field>
|
|
<name>MAINXC</name>
|
|
<description>Main Clock (Oscillation) Pin Setting Register</description>
|
|
<lsb>2</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "SUBXC" -->
|
|
<field>
|
|
<name>SUBXC</name>
|
|
<description>Sub Clock (Oscillation) Pin Setting Register</description>
|
|
<lsb>0</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "EPFR00" -->
|
|
<register>
|
|
<name>EPFR00</name>
|
|
<description>Extended Pin Function Setting Register 00</description>
|
|
<addressOffset>0x600</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00010000</resetValue>
|
|
<resetMask>0x000100F7</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "SWDEN" -->
|
|
<field>
|
|
<name>SWDEN</name>
|
|
<description>Serial Wire Debug Function Select bit</description>
|
|
<lsb>16</lsb>
|
|
<msb>16</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "SUBOUTE" -->
|
|
<field>
|
|
<name>SUBOUTE</name>
|
|
<description>Sub clock divide output function select bit</description>
|
|
<lsb>6</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "RTCCOE" -->
|
|
<field>
|
|
<name>RTCCOE</name>
|
|
<description>RTC clock output select bit</description>
|
|
<lsb>4</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "CROUTE" -->
|
|
<field>
|
|
<name>CROUTE</name>
|
|
<description>Internal high-speed CR Oscillation Output Function Select bit</description>
|
|
<lsb>1</lsb>
|
|
<msb>2</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "NMIS" -->
|
|
<field>
|
|
<name>NMIS</name>
|
|
<description>NMIX Function Select bit</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "EPFR01" -->
|
|
<register>
|
|
<name>EPFR01</name>
|
|
<description>Extended Pin Function Setting Register 01</description>
|
|
<addressOffset>0x604</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0xFFFF1FFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "IC03S" -->
|
|
<field>
|
|
<name>IC03S</name>
|
|
<description>IC03 Input Select bits</description>
|
|
<lsb>29</lsb>
|
|
<msb>31</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "IC02S" -->
|
|
<field>
|
|
<name>IC02S</name>
|
|
<description>IC02 Input Select bits</description>
|
|
<lsb>26</lsb>
|
|
<msb>28</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "IC01S" -->
|
|
<field>
|
|
<name>IC01S</name>
|
|
<description>IC01 Input Select bits</description>
|
|
<lsb>23</lsb>
|
|
<msb>25</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "IC00S" -->
|
|
<field>
|
|
<name>IC00S</name>
|
|
<description>IC00 Input Select bits</description>
|
|
<lsb>20</lsb>
|
|
<msb>22</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "FRCK0S" -->
|
|
<field>
|
|
<name>FRCK0S</name>
|
|
<description>FRCK0 Input Select bits</description>
|
|
<lsb>18</lsb>
|
|
<msb>19</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "DTTI0S" -->
|
|
<field>
|
|
<name>DTTI0S</name>
|
|
<description>DTTIX0 Input Select bits</description>
|
|
<lsb>16</lsb>
|
|
<msb>17</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "DTTI0C" -->
|
|
<field>
|
|
<name>DTTI0C</name>
|
|
<description>DTTIX0 Function Select bit</description>
|
|
<lsb>12</lsb>
|
|
<msb>12</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "RTO05E" -->
|
|
<field>
|
|
<name>RTO05E</name>
|
|
<description>RTO05 Output Select bits</description>
|
|
<lsb>10</lsb>
|
|
<msb>11</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "RTO04E" -->
|
|
<field>
|
|
<name>RTO04E</name>
|
|
<description>RTO04 Output Select bits</description>
|
|
<lsb>8</lsb>
|
|
<msb>9</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "RTO03E" -->
|
|
<field>
|
|
<name>RTO03E</name>
|
|
<description>RTO03 Output Select bits</description>
|
|
<lsb>6</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "RTO02E" -->
|
|
<field>
|
|
<name>RTO02E</name>
|
|
<description>RTO02 Output Select bits</description>
|
|
<lsb>4</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "RTO01E" -->
|
|
<field>
|
|
<name>RTO01E</name>
|
|
<description>RTO01 Output Select bits</description>
|
|
<lsb>2</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "RTO00E" -->
|
|
<field>
|
|
<name>RTO00E</name>
|
|
<description>RTO00 Output Select bits</description>
|
|
<lsb>0</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "EPFR02" -->
|
|
<register>
|
|
<name>EPFR02</name>
|
|
<description>Extended Pin Function Setting Register 02</description>
|
|
<addressOffset>0x608</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0xFFFF3FFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "IC13S" -->
|
|
<field>
|
|
<name>IC13S</name>
|
|
<description>IC13 Input Select bits</description>
|
|
<lsb>29</lsb>
|
|
<msb>31</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "IC12S" -->
|
|
<field>
|
|
<name>IC12S</name>
|
|
<description>IC12 Input Select bits</description>
|
|
<lsb>26</lsb>
|
|
<msb>28</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "IC11S" -->
|
|
<field>
|
|
<name>IC11S</name>
|
|
<description>IC11 Input Select bits</description>
|
|
<lsb>23</lsb>
|
|
<msb>25</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "IC10S" -->
|
|
<field>
|
|
<name>IC10S</name>
|
|
<description>IC10 Input Select bits</description>
|
|
<lsb>20</lsb>
|
|
<msb>22</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "FRCK1S" -->
|
|
<field>
|
|
<name>FRCK1S</name>
|
|
<description>FRCK1 Input Select bits</description>
|
|
<lsb>18</lsb>
|
|
<msb>19</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "DTTI1S" -->
|
|
<field>
|
|
<name>DTTI1S</name>
|
|
<description>DTTIX1 Input Select bits</description>
|
|
<lsb>16</lsb>
|
|
<msb>17</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "IGTRG0" -->
|
|
<field>
|
|
<name>IGTRG0</name>
|
|
<description>IGTRG0 Input Select bit</description>
|
|
<lsb>13</lsb>
|
|
<msb>13</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "DTTI1C" -->
|
|
<field>
|
|
<name>DTTI1C</name>
|
|
<description>DTTIX1 Function Select bit</description>
|
|
<lsb>12</lsb>
|
|
<msb>12</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "RTO15E" -->
|
|
<field>
|
|
<name>RTO15E</name>
|
|
<description>RTO15 Output Select bits</description>
|
|
<lsb>10</lsb>
|
|
<msb>11</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "RTO14E" -->
|
|
<field>
|
|
<name>RTO14E</name>
|
|
<description>RTO14 Output Select bits</description>
|
|
<lsb>8</lsb>
|
|
<msb>9</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "RTO13E" -->
|
|
<field>
|
|
<name>RTO13E</name>
|
|
<description>RTO13 Output Select bits</description>
|
|
<lsb>6</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "RTO12E" -->
|
|
<field>
|
|
<name>RTO12E</name>
|
|
<description>RTO12 Output Select bits</description>
|
|
<lsb>4</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "RTO11E" -->
|
|
<field>
|
|
<name>RTO11E</name>
|
|
<description>RTO11 Output Select bits</description>
|
|
<lsb>2</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "RTO10E" -->
|
|
<field>
|
|
<name>RTO10E</name>
|
|
<description>RTO10 Output Select bits</description>
|
|
<lsb>0</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "EPFR03" -->
|
|
<register>
|
|
<name>EPFR03</name>
|
|
<description>Extended Pin Function Setting Register 03</description>
|
|
<addressOffset>0x60C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0xFFFF1FFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "IC23S" -->
|
|
<field>
|
|
<name>IC23S</name>
|
|
<description>IC23 Input Select bits</description>
|
|
<lsb>29</lsb>
|
|
<msb>31</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "IC22S" -->
|
|
<field>
|
|
<name>IC22S</name>
|
|
<description>IC22 Input Select bits</description>
|
|
<lsb>26</lsb>
|
|
<msb>28</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "IC21S" -->
|
|
<field>
|
|
<name>IC21S</name>
|
|
<description>IC21 Input Select bits</description>
|
|
<lsb>23</lsb>
|
|
<msb>25</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "IC20S" -->
|
|
<field>
|
|
<name>IC20S</name>
|
|
<description>IC20 Input Select bits</description>
|
|
<lsb>20</lsb>
|
|
<msb>22</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "FRCK2S" -->
|
|
<field>
|
|
<name>FRCK2S</name>
|
|
<description>FRCK2 Input Select bits</description>
|
|
<lsb>18</lsb>
|
|
<msb>19</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "DTTI2S" -->
|
|
<field>
|
|
<name>DTTI2S</name>
|
|
<description>DTTIX2 Input Select bits</description>
|
|
<lsb>16</lsb>
|
|
<msb>17</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "DTTI2C" -->
|
|
<field>
|
|
<name>DTTI2C</name>
|
|
<description>DTTIX2 Function Select bit</description>
|
|
<lsb>12</lsb>
|
|
<msb>12</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "RTO25E" -->
|
|
<field>
|
|
<name>RTO25E</name>
|
|
<description>RTO25 Output Select bits</description>
|
|
<lsb>10</lsb>
|
|
<msb>11</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "RTO24E" -->
|
|
<field>
|
|
<name>RTO24E</name>
|
|
<description>RTO24 Output Select bits</description>
|
|
<lsb>8</lsb>
|
|
<msb>9</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "RTO23E" -->
|
|
<field>
|
|
<name>RTO23E</name>
|
|
<description>RTO23 Output Select bits</description>
|
|
<lsb>6</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "RTO22E" -->
|
|
<field>
|
|
<name>RTO22E</name>
|
|
<description>RTO22 Output Select bits</description>
|
|
<lsb>4</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "RTO21E" -->
|
|
<field>
|
|
<name>RTO21E</name>
|
|
<description>RTO21 Output Select bits</description>
|
|
<lsb>2</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "RTO20E" -->
|
|
<field>
|
|
<name>RTO20E</name>
|
|
<description>RTO20 Output Select bits</description>
|
|
<lsb>0</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "EPFR04" -->
|
|
<register>
|
|
<name>EPFR04</name>
|
|
<description>Extended Pin Function Setting Register 04</description>
|
|
<addressOffset>0x610</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x3F3C3F7C</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "TIOB3S" -->
|
|
<field>
|
|
<name>TIOB3S</name>
|
|
<description>TIOB3 Input Select bits</description>
|
|
<lsb>28</lsb>
|
|
<msb>29</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TIOA3E" -->
|
|
<field>
|
|
<name>TIOA3E</name>
|
|
<description>TIOA3 Output Select bits</description>
|
|
<lsb>26</lsb>
|
|
<msb>27</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TIOA3S" -->
|
|
<field>
|
|
<name>TIOA3S</name>
|
|
<description>TIOA3 Input Select bits</description>
|
|
<lsb>24</lsb>
|
|
<msb>25</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TIOB2S" -->
|
|
<field>
|
|
<name>TIOB2S</name>
|
|
<description>TIOB2 Input Select bits</description>
|
|
<lsb>20</lsb>
|
|
<msb>21</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TIOA2E" -->
|
|
<field>
|
|
<name>TIOA2E</name>
|
|
<description>TIOA2 Output Select bits</description>
|
|
<lsb>18</lsb>
|
|
<msb>19</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TIOB1S" -->
|
|
<field>
|
|
<name>TIOB1S</name>
|
|
<description>TIOB1 Input Select bits</description>
|
|
<lsb>12</lsb>
|
|
<msb>13</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TIOA1E" -->
|
|
<field>
|
|
<name>TIOA1E</name>
|
|
<description>TIOA1 Output Select bits</description>
|
|
<lsb>10</lsb>
|
|
<msb>11</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TIOA1S" -->
|
|
<field>
|
|
<name>TIOA1S</name>
|
|
<description>TIOA1 Input Select bits</description>
|
|
<lsb>8</lsb>
|
|
<msb>9</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TIOB0S" -->
|
|
<field>
|
|
<name>TIOB0S</name>
|
|
<description>TIOB0 Input Select bits</description>
|
|
<lsb>4</lsb>
|
|
<msb>6</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TIOA0E" -->
|
|
<field>
|
|
<name>TIOA0E</name>
|
|
<description>TIOA0 Output Select bits</description>
|
|
<lsb>2</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "EPFR05" -->
|
|
<register>
|
|
<name>EPFR05</name>
|
|
<description>Extended Pin Function Setting Register 05</description>
|
|
<addressOffset>0x614</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x3F3C3F3C</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "TIOB7S" -->
|
|
<field>
|
|
<name>TIOB7S</name>
|
|
<description>TIOB7 Input Select bits</description>
|
|
<lsb>28</lsb>
|
|
<msb>29</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TIOA7E" -->
|
|
<field>
|
|
<name>TIOA7E</name>
|
|
<description>TIOA7 Output Select bits</description>
|
|
<lsb>26</lsb>
|
|
<msb>27</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TIOA7S" -->
|
|
<field>
|
|
<name>TIOA7S</name>
|
|
<description>TIOA7 Input Select bits</description>
|
|
<lsb>24</lsb>
|
|
<msb>25</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TIOB6S" -->
|
|
<field>
|
|
<name>TIOB6S</name>
|
|
<description>TIOB6 Input Select bits</description>
|
|
<lsb>20</lsb>
|
|
<msb>21</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TIOA6E" -->
|
|
<field>
|
|
<name>TIOA6E</name>
|
|
<description>TIOA6 Output Select bits</description>
|
|
<lsb>18</lsb>
|
|
<msb>19</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TIOB5S" -->
|
|
<field>
|
|
<name>TIOB5S</name>
|
|
<description>TIOB5 Input Select bits</description>
|
|
<lsb>12</lsb>
|
|
<msb>13</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TIOA5E" -->
|
|
<field>
|
|
<name>TIOA5E</name>
|
|
<description>TIOA5 Output Select bits</description>
|
|
<lsb>10</lsb>
|
|
<msb>11</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TIOA5S" -->
|
|
<field>
|
|
<name>TIOA5S</name>
|
|
<description>TIOA5 Input Select bits</description>
|
|
<lsb>8</lsb>
|
|
<msb>9</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TIOB4S" -->
|
|
<field>
|
|
<name>TIOB4S</name>
|
|
<description>TIOB4 Input Select bits</description>
|
|
<lsb>4</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TIOA4E" -->
|
|
<field>
|
|
<name>TIOA4E</name>
|
|
<description>TIOA4 Output Select bits</description>
|
|
<lsb>2</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "EPFR06" -->
|
|
<register>
|
|
<name>EPFR06</name>
|
|
<description>Extended Pin Function Setting Register 06</description>
|
|
<addressOffset>0x618</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0xFFFFFFFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "EINT15S" -->
|
|
<field>
|
|
<name>EINT15S</name>
|
|
<description>External Interrupt 15 Input Select bits</description>
|
|
<lsb>30</lsb>
|
|
<msb>31</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "EINT14S" -->
|
|
<field>
|
|
<name>EINT14S</name>
|
|
<description>External Interrupt 14 Input Select bits</description>
|
|
<lsb>28</lsb>
|
|
<msb>29</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "EINT13S" -->
|
|
<field>
|
|
<name>EINT13S</name>
|
|
<description>External Interrupt 13 Input Select bits</description>
|
|
<lsb>26</lsb>
|
|
<msb>27</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "EINT12S" -->
|
|
<field>
|
|
<name>EINT12S</name>
|
|
<description>External Interrupt 12 Input Select bits</description>
|
|
<lsb>24</lsb>
|
|
<msb>25</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "EINT11S" -->
|
|
<field>
|
|
<name>EINT11S</name>
|
|
<description>External Interrupt 11 Input Select bits</description>
|
|
<lsb>22</lsb>
|
|
<msb>23</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "EINT10S" -->
|
|
<field>
|
|
<name>EINT10S</name>
|
|
<description>External Interrupt 10 Input Select bits</description>
|
|
<lsb>20</lsb>
|
|
<msb>21</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "EINT09S" -->
|
|
<field>
|
|
<name>EINT09S</name>
|
|
<description>External Interrupt 09 Input Select bits</description>
|
|
<lsb>18</lsb>
|
|
<msb>19</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "EINT08S" -->
|
|
<field>
|
|
<name>EINT08S</name>
|
|
<description>External Interrupt 08 Input Select bits</description>
|
|
<lsb>16</lsb>
|
|
<msb>17</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "EINT07S" -->
|
|
<field>
|
|
<name>EINT07S</name>
|
|
<description>External Interrupt 07 Input Select bits</description>
|
|
<lsb>14</lsb>
|
|
<msb>15</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "EINT06S" -->
|
|
<field>
|
|
<name>EINT06S</name>
|
|
<description>External Interrupt 06 Input Select bits</description>
|
|
<lsb>12</lsb>
|
|
<msb>13</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "EINT05S" -->
|
|
<field>
|
|
<name>EINT05S</name>
|
|
<description>External Interrupt 05 Input Select bits</description>
|
|
<lsb>10</lsb>
|
|
<msb>11</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "EINT04S" -->
|
|
<field>
|
|
<name>EINT04S</name>
|
|
<description>External Interrupt 04 Input Select bits</description>
|
|
<lsb>8</lsb>
|
|
<msb>9</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "EINT03S" -->
|
|
<field>
|
|
<name>EINT03S</name>
|
|
<description>External Interrupt 03 Input Select bits</description>
|
|
<lsb>6</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "EINT02S" -->
|
|
<field>
|
|
<name>EINT02S</name>
|
|
<description>External Interrupt 02 Input Select bits</description>
|
|
<lsb>4</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "EINT01S" -->
|
|
<field>
|
|
<name>EINT01S</name>
|
|
<description>External Interrupt 01 Input Select bits</description>
|
|
<lsb>2</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "EINT00S" -->
|
|
<field>
|
|
<name>EINT00S</name>
|
|
<description>External Interrupt 00 Input Select bits</description>
|
|
<lsb>0</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "EPFR07" -->
|
|
<register>
|
|
<name>EPFR07</name>
|
|
<description>Extended Pin Function Setting Register 07</description>
|
|
<addressOffset>0x61C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0FFFFFF0</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "SCK3B" -->
|
|
<field>
|
|
<name>SCK3B</name>
|
|
<description>SCK3 Input/Output Select bits</description>
|
|
<lsb>26</lsb>
|
|
<msb>27</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "SOT3B" -->
|
|
<field>
|
|
<name>SOT3B</name>
|
|
<description>SOT3 Input/Output Select bits</description>
|
|
<lsb>24</lsb>
|
|
<msb>25</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "SIN3S" -->
|
|
<field>
|
|
<name>SIN3S</name>
|
|
<description>SIN3 Input Select bits</description>
|
|
<lsb>22</lsb>
|
|
<msb>23</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "SCK2B" -->
|
|
<field>
|
|
<name>SCK2B</name>
|
|
<description>SCK2 Input/Output Select bits</description>
|
|
<lsb>20</lsb>
|
|
<msb>21</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "SOT2B" -->
|
|
<field>
|
|
<name>SOT2B</name>
|
|
<description>SOT2 Input/Output Select bits</description>
|
|
<lsb>18</lsb>
|
|
<msb>19</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "SIN2S" -->
|
|
<field>
|
|
<name>SIN2S</name>
|
|
<description>SIN2 Input Select bits</description>
|
|
<lsb>16</lsb>
|
|
<msb>17</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "SCK1B" -->
|
|
<field>
|
|
<name>SCK1B</name>
|
|
<description>SCK1 Input/Output Select bits</description>
|
|
<lsb>14</lsb>
|
|
<msb>15</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "SOT1B" -->
|
|
<field>
|
|
<name>SOT1B</name>
|
|
<description>SOT1 Input/Output Select bits</description>
|
|
<lsb>12</lsb>
|
|
<msb>13</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "SIN1S" -->
|
|
<field>
|
|
<name>SIN1S</name>
|
|
<description>SIN1 Input Select bits</description>
|
|
<lsb>10</lsb>
|
|
<msb>11</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "SCK0B" -->
|
|
<field>
|
|
<name>SCK0B</name>
|
|
<description>SCK0 Input/Output Select bits</description>
|
|
<lsb>8</lsb>
|
|
<msb>9</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "SOT0B" -->
|
|
<field>
|
|
<name>SOT0B</name>
|
|
<description>SOT0 Input/Output Select bits</description>
|
|
<lsb>6</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "SIN0S" -->
|
|
<field>
|
|
<name>SIN0S</name>
|
|
<description>SIN0 Input Select bits</description>
|
|
<lsb>4</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "EPFR08" -->
|
|
<register>
|
|
<name>EPFR08</name>
|
|
<description>Extended Pin Function Setting Register 08</description>
|
|
<addressOffset>0x620</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0FFFFFFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "SCK7B" -->
|
|
<field>
|
|
<name>SCK7B</name>
|
|
<description>SCK7 Input/Output Select bits</description>
|
|
<lsb>26</lsb>
|
|
<msb>27</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "SOT7B" -->
|
|
<field>
|
|
<name>SOT7B</name>
|
|
<description>SOT7 Input/Output Select bits</description>
|
|
<lsb>24</lsb>
|
|
<msb>25</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "SIN7S" -->
|
|
<field>
|
|
<name>SIN7S</name>
|
|
<description>SIN7 Input Select bits</description>
|
|
<lsb>22</lsb>
|
|
<msb>23</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "SCK6B" -->
|
|
<field>
|
|
<name>SCK6B</name>
|
|
<description>SCK6 Input/Output Select bits</description>
|
|
<lsb>20</lsb>
|
|
<msb>21</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "SOT6B" -->
|
|
<field>
|
|
<name>SOT6B</name>
|
|
<description>SOT6 Input/Output Select bits</description>
|
|
<lsb>18</lsb>
|
|
<msb>19</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "SIN6S" -->
|
|
<field>
|
|
<name>SIN6S</name>
|
|
<description>SIN6 Input Select bits</description>
|
|
<lsb>16</lsb>
|
|
<msb>17</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "SCK5B" -->
|
|
<field>
|
|
<name>SCK5B</name>
|
|
<description>SCK5 Input/Output Select bits</description>
|
|
<lsb>14</lsb>
|
|
<msb>15</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "SOT5B" -->
|
|
<field>
|
|
<name>SOT5B</name>
|
|
<description>SOT5 Input/Output Select bits</description>
|
|
<lsb>12</lsb>
|
|
<msb>13</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "SIN5S" -->
|
|
<field>
|
|
<name>SIN5S</name>
|
|
<description>SIN5 Input Select bits</description>
|
|
<lsb>10</lsb>
|
|
<msb>11</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "SCK4B" -->
|
|
<field>
|
|
<name>SCK4B</name>
|
|
<description>SCK4 Input/Output Select bits</description>
|
|
<lsb>8</lsb>
|
|
<msb>9</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "SOT4B" -->
|
|
<field>
|
|
<name>SOT4B</name>
|
|
<description>SOT4 Input/Output Select bits</description>
|
|
<lsb>6</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "SIN4S" -->
|
|
<field>
|
|
<name>SIN4S</name>
|
|
<description>SIN4 Input Select bits</description>
|
|
<lsb>4</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "CTS4S" -->
|
|
<field>
|
|
<name>CTS4S</name>
|
|
<description>CTS4 Input Select bits</description>
|
|
<lsb>2</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "RTS4E" -->
|
|
<field>
|
|
<name>RTS4E</name>
|
|
<description>RTS4 Output Select bits</description>
|
|
<lsb>0</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "EPFR09" -->
|
|
<register>
|
|
<name>EPFR09</name>
|
|
<description>Extended Pin Function Setting Register 09</description>
|
|
<addressOffset>0x624</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0xFFFFFFFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "CTX1E" -->
|
|
<field>
|
|
<name>CTX1E</name>
|
|
<description>CTX1E Output Select bits</description>
|
|
<lsb>30</lsb>
|
|
<msb>31</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "CRX1S" -->
|
|
<field>
|
|
<name>CRX1S</name>
|
|
<description>CRX1S Input Select bits</description>
|
|
<lsb>28</lsb>
|
|
<msb>29</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "CTX0E" -->
|
|
<field>
|
|
<name>CTX0E</name>
|
|
<description>CTX0E Output Select bits</description>
|
|
<lsb>26</lsb>
|
|
<msb>27</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "CRX0S" -->
|
|
<field>
|
|
<name>CRX0S</name>
|
|
<description>CRX0S Input Select bits</description>
|
|
<lsb>24</lsb>
|
|
<msb>25</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "ADTRG2S" -->
|
|
<field>
|
|
<name>ADTRG2S</name>
|
|
<description>ADTRG2 Input Select bits</description>
|
|
<lsb>20</lsb>
|
|
<msb>23</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "ADTRG1S" -->
|
|
<field>
|
|
<name>ADTRG1S</name>
|
|
<description>ADTRG1 Input Select bits</description>
|
|
<lsb>16</lsb>
|
|
<msb>19</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "ADTRG0S" -->
|
|
<field>
|
|
<name>ADTRG0S</name>
|
|
<description>ADTRG0 Input Select bits</description>
|
|
<lsb>12</lsb>
|
|
<msb>15</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "QZIN1S" -->
|
|
<field>
|
|
<name>QZIN1S</name>
|
|
<description>QZIN1S Input Select bits</description>
|
|
<lsb>10</lsb>
|
|
<msb>11</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "QBIN1S" -->
|
|
<field>
|
|
<name>QBIN1S</name>
|
|
<description>QBIN1S Input Select bits</description>
|
|
<lsb>8</lsb>
|
|
<msb>9</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "QAIN1S" -->
|
|
<field>
|
|
<name>QAIN1S</name>
|
|
<description>QAIN1S Input Select bits</description>
|
|
<lsb>6</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "QZIN0S" -->
|
|
<field>
|
|
<name>QZIN0S</name>
|
|
<description>QZIN0S Input Select bits</description>
|
|
<lsb>4</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "QBIN0S" -->
|
|
<field>
|
|
<name>QBIN0S</name>
|
|
<description>QBIN0S Input Select bits</description>
|
|
<lsb>2</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "QAIN0S" -->
|
|
<field>
|
|
<name>QAIN0S</name>
|
|
<description>QAIN0S Input Select bits</description>
|
|
<lsb>0</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "EPFR12" -->
|
|
<register>
|
|
<name>EPFR12</name>
|
|
<description>Extended Pin Function Setting Register 12</description>
|
|
<addressOffset>0x630</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x3F3C3F3C</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "TIOB11S" -->
|
|
<field>
|
|
<name>TIOB11S</name>
|
|
<description>TIOB11 Input Select bits</description>
|
|
<lsb>28</lsb>
|
|
<msb>29</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TIOA11E" -->
|
|
<field>
|
|
<name>TIOA11E</name>
|
|
<description>TIOA11 Output Select bits</description>
|
|
<lsb>26</lsb>
|
|
<msb>27</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TIOA11S" -->
|
|
<field>
|
|
<name>TIOA11S</name>
|
|
<description>TIOA11 Input Select bits</description>
|
|
<lsb>24</lsb>
|
|
<msb>25</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TIOB10S" -->
|
|
<field>
|
|
<name>TIOB10S</name>
|
|
<description>TIOB10 Input Select bits</description>
|
|
<lsb>20</lsb>
|
|
<msb>21</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TIOA10E" -->
|
|
<field>
|
|
<name>TIOA10E</name>
|
|
<description>TIOA10 Output Select bits</description>
|
|
<lsb>18</lsb>
|
|
<msb>19</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TIOB9S" -->
|
|
<field>
|
|
<name>TIOB9S</name>
|
|
<description>TIOB9 Input Select bits</description>
|
|
<lsb>12</lsb>
|
|
<msb>13</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TIOA9E" -->
|
|
<field>
|
|
<name>TIOA9E</name>
|
|
<description>TIOA9 Output Select bits</description>
|
|
<lsb>10</lsb>
|
|
<msb>11</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TIOA9S" -->
|
|
<field>
|
|
<name>TIOA9S</name>
|
|
<description>TIOA9 Input Select bits</description>
|
|
<lsb>8</lsb>
|
|
<msb>9</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TIOB8S" -->
|
|
<field>
|
|
<name>TIOB8S</name>
|
|
<description>TIOB8 Input Select bits</description>
|
|
<lsb>4</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TIOA8E" -->
|
|
<field>
|
|
<name>TIOA8E</name>
|
|
<description>TIOA8 Output Select bits</description>
|
|
<lsb>2</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "EPFR13" -->
|
|
<register>
|
|
<name>EPFR13</name>
|
|
<description>Extended Pin Function Setting Register 13</description>
|
|
<addressOffset>0x634</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x3F3C3F3C</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "TIOB15S" -->
|
|
<field>
|
|
<name>TIOB15S</name>
|
|
<description>TIOB15 Input Select bits</description>
|
|
<lsb>28</lsb>
|
|
<msb>29</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TIOA15E" -->
|
|
<field>
|
|
<name>TIOA15E</name>
|
|
<description>TIOA15 Output Select bits</description>
|
|
<lsb>26</lsb>
|
|
<msb>27</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TIOA15S" -->
|
|
<field>
|
|
<name>TIOA15S</name>
|
|
<description>TIOA15 Input Select bits</description>
|
|
<lsb>24</lsb>
|
|
<msb>25</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TIOB14S" -->
|
|
<field>
|
|
<name>TIOB14S</name>
|
|
<description>TIOB14 Input Select bits</description>
|
|
<lsb>20</lsb>
|
|
<msb>21</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TIOA14E" -->
|
|
<field>
|
|
<name>TIOA14E</name>
|
|
<description>TIOA14 Output Select bits</description>
|
|
<lsb>18</lsb>
|
|
<msb>19</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TIOB13S" -->
|
|
<field>
|
|
<name>TIOB13S</name>
|
|
<description>TIOB13 Input Select bits</description>
|
|
<lsb>12</lsb>
|
|
<msb>13</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TIOA13E" -->
|
|
<field>
|
|
<name>TIOA13E</name>
|
|
<description>TIOA13 Output Select bits</description>
|
|
<lsb>10</lsb>
|
|
<msb>11</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TIOA13S" -->
|
|
<field>
|
|
<name>TIOA13S</name>
|
|
<description>TIOA13 Input Select bits</description>
|
|
<lsb>8</lsb>
|
|
<msb>9</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TIOB12S" -->
|
|
<field>
|
|
<name>TIOB12S</name>
|
|
<description>TIOB12 Input Select bits</description>
|
|
<lsb>4</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TIOA12E" -->
|
|
<field>
|
|
<name>TIOA12E</name>
|
|
<description>TIOA12 Output Select bits</description>
|
|
<lsb>2</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "EPFR14" -->
|
|
<register>
|
|
<name>EPFR14</name>
|
|
<description>Extended Pin Function Setting Register 14</description>
|
|
<addressOffset>0x638</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000003F</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "QZIN2S" -->
|
|
<field>
|
|
<name>QZIN2S</name>
|
|
<description>QPRC-ch.2 ZIN Input Pin bits</description>
|
|
<lsb>4</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "QBIN2S" -->
|
|
<field>
|
|
<name>QBIN2S</name>
|
|
<description>QPRC-ch.2 BIN Input Pin bits</description>
|
|
<lsb>2</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "QAIN2S" -->
|
|
<field>
|
|
<name>QAIN2S</name>
|
|
<description>QPRC-ch.2 AIN Input Pin bits</description>
|
|
<lsb>0</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "EPFR15" -->
|
|
<register>
|
|
<name>EPFR15</name>
|
|
<description>Extended Pin Function Setting Register 15</description>
|
|
<addressOffset>0x63C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0xFFFFFFFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "EINT31S" -->
|
|
<field>
|
|
<name>EINT31S</name>
|
|
<description>External Interrupt 31 Input Select bits</description>
|
|
<lsb>30</lsb>
|
|
<msb>31</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "EINT30S" -->
|
|
<field>
|
|
<name>EINT30S</name>
|
|
<description>External Interrupt 30 Input Select bits</description>
|
|
<lsb>28</lsb>
|
|
<msb>29</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "EINT29S" -->
|
|
<field>
|
|
<name>EINT29S</name>
|
|
<description>External Interrupt 29 Input Select bits</description>
|
|
<lsb>26</lsb>
|
|
<msb>27</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "EINT28S" -->
|
|
<field>
|
|
<name>EINT28S</name>
|
|
<description>External Interrupt 28 Input Select bits</description>
|
|
<lsb>24</lsb>
|
|
<msb>25</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "EINT27S" -->
|
|
<field>
|
|
<name>EINT27S</name>
|
|
<description>External Interrupt 27 Input Select bits</description>
|
|
<lsb>22</lsb>
|
|
<msb>23</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "EINT26S" -->
|
|
<field>
|
|
<name>EINT26S</name>
|
|
<description>External Interrupt 26 Input Select bits</description>
|
|
<lsb>20</lsb>
|
|
<msb>21</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "EINT25S" -->
|
|
<field>
|
|
<name>EINT25S</name>
|
|
<description>External Interrupt 25 Input Select bits</description>
|
|
<lsb>18</lsb>
|
|
<msb>19</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "EINT24S" -->
|
|
<field>
|
|
<name>EINT24S</name>
|
|
<description>External Interrupt 24 Input Select bits</description>
|
|
<lsb>16</lsb>
|
|
<msb>17</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "EINT23S" -->
|
|
<field>
|
|
<name>EINT23S</name>
|
|
<description>External Interrupt 23 Input Select bits</description>
|
|
<lsb>14</lsb>
|
|
<msb>15</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "EINT22S" -->
|
|
<field>
|
|
<name>EINT22S</name>
|
|
<description>External Interrupt 22 Input Select bits</description>
|
|
<lsb>12</lsb>
|
|
<msb>13</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "EINT21S" -->
|
|
<field>
|
|
<name>EINT21S</name>
|
|
<description>External Interrupt 21 Input Select bits</description>
|
|
<lsb>10</lsb>
|
|
<msb>11</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "EINT20S" -->
|
|
<field>
|
|
<name>EINT20S</name>
|
|
<description>External Interrupt 20 Input Select bits</description>
|
|
<lsb>8</lsb>
|
|
<msb>9</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "EINT19S" -->
|
|
<field>
|
|
<name>EINT19S</name>
|
|
<description>External Interrupt 19 Input Select bits</description>
|
|
<lsb>6</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "EINT18S" -->
|
|
<field>
|
|
<name>EINT18S</name>
|
|
<description>External Interrupt 18 Input Select bits</description>
|
|
<lsb>4</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "EINT17S" -->
|
|
<field>
|
|
<name>EINT17S</name>
|
|
<description>External Interrupt 17 Input Select bits</description>
|
|
<lsb>2</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "EINT16S" -->
|
|
<field>
|
|
<name>EINT16S</name>
|
|
<description>External Interrupt 16 Input Select bits</description>
|
|
<lsb>0</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "EPFR16" -->
|
|
<register>
|
|
<name>EPFR16</name>
|
|
<description>Extended Pin Function Setting Register 16</description>
|
|
<addressOffset>0x640</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0FFFFFF0</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "SCK11B" -->
|
|
<field>
|
|
<name>SCK11B</name>
|
|
<description>SCK11 Input/Output Select bits</description>
|
|
<lsb>26</lsb>
|
|
<msb>27</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "SOT11B" -->
|
|
<field>
|
|
<name>SOT11B</name>
|
|
<description>SOT11 Input/Output Select bits</description>
|
|
<lsb>24</lsb>
|
|
<msb>25</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "SIN11S" -->
|
|
<field>
|
|
<name>SIN11S</name>
|
|
<description>SIN11 Input Select bits</description>
|
|
<lsb>22</lsb>
|
|
<msb>23</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "SCK10B" -->
|
|
<field>
|
|
<name>SCK10B</name>
|
|
<description>SCK10 Input/Output Select bits</description>
|
|
<lsb>20</lsb>
|
|
<msb>21</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "SOT10B" -->
|
|
<field>
|
|
<name>SOT10B</name>
|
|
<description>SOT10 Input/Output Select bits</description>
|
|
<lsb>18</lsb>
|
|
<msb>19</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "SIN10S" -->
|
|
<field>
|
|
<name>SIN10S</name>
|
|
<description>SIN10 Input Select bits</description>
|
|
<lsb>16</lsb>
|
|
<msb>17</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "SCK9B" -->
|
|
<field>
|
|
<name>SCK9B</name>
|
|
<description>SCK9 Input/Output Select bits</description>
|
|
<lsb>14</lsb>
|
|
<msb>15</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "SOT9B" -->
|
|
<field>
|
|
<name>SOT9B</name>
|
|
<description>SOT9 Input/Output Select bits</description>
|
|
<lsb>12</lsb>
|
|
<msb>13</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "SIN9S" -->
|
|
<field>
|
|
<name>SIN9S</name>
|
|
<description>SIN9 Input Select bits</description>
|
|
<lsb>10</lsb>
|
|
<msb>11</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "SCK8B" -->
|
|
<field>
|
|
<name>SCK8B</name>
|
|
<description>SCK8 Input/Output Select bits</description>
|
|
<lsb>8</lsb>
|
|
<msb>9</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "SOT8B" -->
|
|
<field>
|
|
<name>SOT8B</name>
|
|
<description>SOT8 Input/Output Select bits</description>
|
|
<lsb>6</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "SIN8S" -->
|
|
<field>
|
|
<name>SIN8S</name>
|
|
<description>SIN8 Input Select bits</description>
|
|
<lsb>4</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "EPFR17" -->
|
|
<register>
|
|
<name>EPFR17</name>
|
|
<description>Extended Pin Function Setting Register 17</description>
|
|
<addressOffset>0x644</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0FFFFFF0</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "SCK15B" -->
|
|
<field>
|
|
<name>SCK15B</name>
|
|
<description>SCK15 Input/Output Select bits</description>
|
|
<lsb>26</lsb>
|
|
<msb>27</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "SOT15B" -->
|
|
<field>
|
|
<name>SOT15B</name>
|
|
<description>SOT15 Input/Output Select bits</description>
|
|
<lsb>24</lsb>
|
|
<msb>25</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "SIN15S" -->
|
|
<field>
|
|
<name>SIN15S</name>
|
|
<description>SIN15 Input Select bits</description>
|
|
<lsb>22</lsb>
|
|
<msb>23</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "SCK14B" -->
|
|
<field>
|
|
<name>SCK14B</name>
|
|
<description>SCK14 Input/Output Select bits</description>
|
|
<lsb>20</lsb>
|
|
<msb>21</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "SOT14B" -->
|
|
<field>
|
|
<name>SOT14B</name>
|
|
<description>SOT14 Input/Output Select bits</description>
|
|
<lsb>18</lsb>
|
|
<msb>19</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "SIN14S" -->
|
|
<field>
|
|
<name>SIN14S</name>
|
|
<description>SIN14 Input Select bits</description>
|
|
<lsb>16</lsb>
|
|
<msb>17</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "SCK13B" -->
|
|
<field>
|
|
<name>SCK13B</name>
|
|
<description>SCK13 Input/Output Select bits</description>
|
|
<lsb>14</lsb>
|
|
<msb>15</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "SOT13B" -->
|
|
<field>
|
|
<name>SOT13B</name>
|
|
<description>SOT13 Input/Output Select bits</description>
|
|
<lsb>12</lsb>
|
|
<msb>13</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "SIN13S" -->
|
|
<field>
|
|
<name>SIN13S</name>
|
|
<description>SIN13 Input Select bits</description>
|
|
<lsb>10</lsb>
|
|
<msb>11</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "SCK12B" -->
|
|
<field>
|
|
<name>SCK12B</name>
|
|
<description>SCK12 Input/Output Select bits</description>
|
|
<lsb>8</lsb>
|
|
<msb>9</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "SOT12B" -->
|
|
<field>
|
|
<name>SOT12B</name>
|
|
<description>SOT12 Input/Output Select bits</description>
|
|
<lsb>6</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "SIN12S" -->
|
|
<field>
|
|
<name>SIN12S</name>
|
|
<description>SIN12 Input Select bits</description>
|
|
<lsb>4</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "EPFR18" -->
|
|
<register>
|
|
<name>EPFR18</name>
|
|
<description>Extended Pin Function Setting Register 18</description>
|
|
<addressOffset>0x648</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000000F</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "CECR1B" -->
|
|
<field>
|
|
<name>CECR1B</name>
|
|
<description>CEC1 input/output selection bits</description>
|
|
<lsb>2</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "CECR0B" -->
|
|
<field>
|
|
<name>CECR0B</name>
|
|
<description>CEC0 input/output selection bits</description>
|
|
<lsb>0</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "EPFR21" -->
|
|
<register>
|
|
<name>EPFR21</name>
|
|
<description>Extended Pin Function Setting Register 21</description>
|
|
<addressOffset>0x654</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000007</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "QZIN0S" -->
|
|
<field>
|
|
<name>QZIN0S</name>
|
|
<description>QPRC-ch.0 ZIN Input Pin bits</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "QBIN0S" -->
|
|
<field>
|
|
<name>QBIN0S</name>
|
|
<description>QPRC-ch.0 BIN Input Pin bits</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "QAIN0S" -->
|
|
<field>
|
|
<name>QAIN0S</name>
|
|
<description>QPRC-ch.0 AIN Input Pin bits</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "EPFR22" -->
|
|
<register>
|
|
<name>EPFR22</name>
|
|
<description>Extended Pin Function Setting Register 22</description>
|
|
<addressOffset>0x658</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000F0F0</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "SCS31E" -->
|
|
<field>
|
|
<name>SCS31E</name>
|
|
<description>SCS31 Output Select bits</description>
|
|
<lsb>14</lsb>
|
|
<msb>15</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "SCS30B" -->
|
|
<field>
|
|
<name>SCS30B</name>
|
|
<description>SCS30 Input/Output Select bits</description>
|
|
<lsb>12</lsb>
|
|
<msb>13</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "SCS11E" -->
|
|
<field>
|
|
<name>SCS11E</name>
|
|
<description>SCS11 Output Select bits</description>
|
|
<lsb>6</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "SCS10B" -->
|
|
<field>
|
|
<name>SCS10B</name>
|
|
<description>SCS10 Input/Output Select bits</description>
|
|
<lsb>4</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "PZR0" -->
|
|
<register derivedFrom="DDR0">
|
|
<name>PZR0</name>
|
|
<description>Port Pseudo Open Drain Setting Register 0</description>
|
|
<addressOffset>0x700</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "PZR1" -->
|
|
<register derivedFrom="DDR1">
|
|
<name>PZR1</name>
|
|
<description>Port Pseudo Open Drain Setting Register 1</description>
|
|
<addressOffset>0x704</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "PZR2" -->
|
|
<register derivedFrom="DDR2">
|
|
<name>PZR2</name>
|
|
<description>Port Pseudo Open Drain Setting Register 2</description>
|
|
<addressOffset>0x708</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "PZR3" -->
|
|
<register derivedFrom="DDR3">
|
|
<name>PZR3</name>
|
|
<description>Port Pseudo Open Drain Setting Register 3</description>
|
|
<addressOffset>0x70C</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "PZR4" -->
|
|
<register derivedFrom="DDR4">
|
|
<name>PZR4</name>
|
|
<description>Port Pseudo Open Drain Setting Register 4</description>
|
|
<addressOffset>0x710</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "PZR5" -->
|
|
<register derivedFrom="DDR5">
|
|
<name>PZR5</name>
|
|
<description>Port Pseudo Open Drain Setting Register 5</description>
|
|
<addressOffset>0x714</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "PZR6" -->
|
|
<register derivedFrom="DDR6">
|
|
<name>PZR6</name>
|
|
<description>Port Pseudo Open Drain Setting Register 6</description>
|
|
<addressOffset>0x718</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "PZR8" -->
|
|
<register derivedFrom="DDR8">
|
|
<name>PZR8</name>
|
|
<description>Port Pseudo Open Drain Setting Register 8</description>
|
|
<addressOffset>0x720</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "PZRE" -->
|
|
<register derivedFrom="DDRE">
|
|
<name>PZRE</name>
|
|
<description>Port Pseudo Open Drain Setting Register E</description>
|
|
<addressOffset>0x738</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "FPOER0" -->
|
|
<register>
|
|
<name>FPOER0</name>
|
|
<description>Fast GPIO Output Enable Register 0</description>
|
|
<addressOffset>0x900</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000801F</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "P0F" -->
|
|
<field>
|
|
<name>P0F</name>
|
|
<description>Bit15 of FPOER0</description>
|
|
<lsb>15</lsb>
|
|
<msb>15</msb>
|
|
<access>write-only</access>
|
|
</field>
|
|
<!-- FIELD "P04" -->
|
|
<field>
|
|
<name>P04</name>
|
|
<description>Bit4 of FPOER0</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>write-only</access>
|
|
</field>
|
|
<!-- FIELD "P03" -->
|
|
<field>
|
|
<name>P03</name>
|
|
<description>Bit3 of FPOER0</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>write-only</access>
|
|
</field>
|
|
<!-- FIELD "P02" -->
|
|
<field>
|
|
<name>P02</name>
|
|
<description>Bit2 of FPOER0</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>write-only</access>
|
|
</field>
|
|
<!-- FIELD "P01" -->
|
|
<field>
|
|
<name>P01</name>
|
|
<description>Bit1 of FPOER0</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>write-only</access>
|
|
</field>
|
|
<!-- FIELD "P00" -->
|
|
<field>
|
|
<name>P00</name>
|
|
<description>Bit0 of FPOER0</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "FPOER1" -->
|
|
<register>
|
|
<name>FPOER1</name>
|
|
<description>Fast GPIO Output Enable Register 1</description>
|
|
<addressOffset>0x904</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000003F</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "P15" -->
|
|
<field>
|
|
<name>P15</name>
|
|
<description>Bit5 of FPOER1</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>write-only</access>
|
|
</field>
|
|
<!-- FIELD "P14" -->
|
|
<field>
|
|
<name>P14</name>
|
|
<description>Bit4 of FPOER1</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>write-only</access>
|
|
</field>
|
|
<!-- FIELD "P13" -->
|
|
<field>
|
|
<name>P13</name>
|
|
<description>Bit3 of FPOER1</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>write-only</access>
|
|
</field>
|
|
<!-- FIELD "P12" -->
|
|
<field>
|
|
<name>P12</name>
|
|
<description>Bit2 of FPOER1</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>write-only</access>
|
|
</field>
|
|
<!-- FIELD "P11" -->
|
|
<field>
|
|
<name>P11</name>
|
|
<description>Bit1 of FPOER1</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>write-only</access>
|
|
</field>
|
|
<!-- FIELD "P10" -->
|
|
<field>
|
|
<name>P10</name>
|
|
<description>Bit0 of FPOER1</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "FPOER2" -->
|
|
<register>
|
|
<name>FPOER2</name>
|
|
<description>Fast GPIO Output Enable Register 2</description>
|
|
<addressOffset>0x908</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000000E</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "P23" -->
|
|
<field>
|
|
<name>P23</name>
|
|
<description>Bit3 of FPOER2</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>write-only</access>
|
|
</field>
|
|
<!-- FIELD "P22" -->
|
|
<field>
|
|
<name>P22</name>
|
|
<description>Bit2 of FPOER2</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>write-only</access>
|
|
</field>
|
|
<!-- FIELD "P21" -->
|
|
<field>
|
|
<name>P21</name>
|
|
<description>Bit1 of FPOER2</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "FPOER3" -->
|
|
<register>
|
|
<name>FPOER3</name>
|
|
<description>Fast GPIO Output Enable Register 3</description>
|
|
<addressOffset>0x90C</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FE00</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "P3F" -->
|
|
<field>
|
|
<name>P3F</name>
|
|
<description>Bit15 of FPOER3</description>
|
|
<lsb>15</lsb>
|
|
<msb>15</msb>
|
|
<access>write-only</access>
|
|
</field>
|
|
<!-- FIELD "P3E" -->
|
|
<field>
|
|
<name>P3E</name>
|
|
<description>Bit14 of FPOER3</description>
|
|
<lsb>14</lsb>
|
|
<msb>14</msb>
|
|
<access>write-only</access>
|
|
</field>
|
|
<!-- FIELD "P3D" -->
|
|
<field>
|
|
<name>P3D</name>
|
|
<description>Bit13 of FPOER3</description>
|
|
<lsb>13</lsb>
|
|
<msb>13</msb>
|
|
<access>write-only</access>
|
|
</field>
|
|
<!-- FIELD "P3C" -->
|
|
<field>
|
|
<name>P3C</name>
|
|
<description>Bit12 of FPOER3</description>
|
|
<lsb>12</lsb>
|
|
<msb>12</msb>
|
|
<access>write-only</access>
|
|
</field>
|
|
<!-- FIELD "P3B" -->
|
|
<field>
|
|
<name>P3B</name>
|
|
<description>Bit11 of FPOER3</description>
|
|
<lsb>11</lsb>
|
|
<msb>11</msb>
|
|
<access>write-only</access>
|
|
</field>
|
|
<!-- FIELD "P3A" -->
|
|
<field>
|
|
<name>P3A</name>
|
|
<description>Bit10 of FPOER3</description>
|
|
<lsb>10</lsb>
|
|
<msb>10</msb>
|
|
<access>write-only</access>
|
|
</field>
|
|
<!-- FIELD "P39" -->
|
|
<field>
|
|
<name>P39</name>
|
|
<description>Bit9 of FPOER3</description>
|
|
<lsb>9</lsb>
|
|
<msb>9</msb>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "FPOER4" -->
|
|
<register>
|
|
<name>FPOER4</name>
|
|
<description>Fast GPIO Output Enable Register 4</description>
|
|
<addressOffset>0x910</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x000006C0</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "P4A" -->
|
|
<field>
|
|
<name>P4A</name>
|
|
<description>Bit10 of FPOER4</description>
|
|
<lsb>10</lsb>
|
|
<msb>10</msb>
|
|
<access>write-only</access>
|
|
</field>
|
|
<!-- FIELD "P49" -->
|
|
<field>
|
|
<name>P49</name>
|
|
<description>Bit9 of FPOER4</description>
|
|
<lsb>9</lsb>
|
|
<msb>9</msb>
|
|
<access>write-only</access>
|
|
</field>
|
|
<!-- FIELD "P47" -->
|
|
<field>
|
|
<name>P47</name>
|
|
<description>Bit7 of FPOER4</description>
|
|
<lsb>7</lsb>
|
|
<msb>7</msb>
|
|
<access>write-only</access>
|
|
</field>
|
|
<!-- FIELD "P46" -->
|
|
<field>
|
|
<name>P46</name>
|
|
<description>Bit6 of FPOER4</description>
|
|
<lsb>6</lsb>
|
|
<msb>6</msb>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "FPOER5" -->
|
|
<register>
|
|
<name>FPOER5</name>
|
|
<description>Fast GPIO Output Enable Register 5</description>
|
|
<addressOffset>0x914</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000007</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "P52" -->
|
|
<field>
|
|
<name>P52</name>
|
|
<description>Bit2 of FPOER5</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>write-only</access>
|
|
</field>
|
|
<!-- FIELD "P51" -->
|
|
<field>
|
|
<name>P51</name>
|
|
<description>Bit1 of FPOER5</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>write-only</access>
|
|
</field>
|
|
<!-- FIELD "P50" -->
|
|
<field>
|
|
<name>P50</name>
|
|
<description>Bit0 of FPOER5</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "FPOER6" -->
|
|
<register>
|
|
<name>FPOER6</name>
|
|
<description>Fast GPIO Output Enable Register 6</description>
|
|
<addressOffset>0x918</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000003</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "P61" -->
|
|
<field>
|
|
<name>P61</name>
|
|
<description>Bit1 of FPOER6</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>write-only</access>
|
|
</field>
|
|
<!-- FIELD "P60" -->
|
|
<field>
|
|
<name>P60</name>
|
|
<description>Bit0 of FPOER6</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "FPOER8" -->
|
|
<register>
|
|
<name>FPOER8</name>
|
|
<description>Fast GPIO Output Enable Register 8</description>
|
|
<addressOffset>0x920</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000007</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "P82" -->
|
|
<field>
|
|
<name>P82</name>
|
|
<description>Bit2 of FPOER8</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>write-only</access>
|
|
</field>
|
|
<!-- FIELD "P81" -->
|
|
<field>
|
|
<name>P81</name>
|
|
<description>Bit1 of FPOER8</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>write-only</access>
|
|
</field>
|
|
<!-- FIELD "P80" -->
|
|
<field>
|
|
<name>P80</name>
|
|
<description>Bit0 of FPOER8</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "FPOERE" -->
|
|
<register>
|
|
<name>FPOERE</name>
|
|
<description>Fast GPIO Output Enable Register E</description>
|
|
<addressOffset>0x938</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000000D</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "PE3" -->
|
|
<field>
|
|
<name>PE3</name>
|
|
<description>Bit3 of FPOERE</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>write-only</access>
|
|
</field>
|
|
<!-- FIELD "PE2" -->
|
|
<field>
|
|
<name>PE2</name>
|
|
<description>Bit2 of FPOERE</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>write-only</access>
|
|
</field>
|
|
<!-- FIELD "PE0" -->
|
|
<field>
|
|
<name>PE0</name>
|
|
<description>Bit0 of FPOERE</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral>
|
|
<!-- PERIPHERAL "LVD" -->
|
|
<peripheral>
|
|
<name>LVD</name>
|
|
<description>Low-voltage Detection</description>
|
|
<groupName>LVD</groupName>
|
|
<baseAddress>0x40035000</baseAddress>
|
|
<!-- ADDRESS BLOCK -->
|
|
<addressBlock>
|
|
<offset>0x0</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x4</offset>
|
|
<size>0x1</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x8</offset>
|
|
<size>0x1</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0xC</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x10</offset>
|
|
<size>0x1</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<!-- INTERRUPT "LVD" -->
|
|
<interrupt>
|
|
<name>LVD</name>
|
|
<value>2</value>
|
|
</interrupt>
|
|
<!-- REGISTERS -->
|
|
<registers>
|
|
<!-- REGISTER "LVD_CTL" -->
|
|
<register>
|
|
<name>LVD_CTL</name>
|
|
<description>Low-voltage Detection Voltage Control Register</description>
|
|
<addressOffset>0x0</addressOffset>
|
|
<size>16</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x800C</resetValue>
|
|
<resetMask>0xFCFC</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "LVDRE" -->
|
|
<field>
|
|
<name>LVDRE</name>
|
|
<description>Low-voltage detection reset operation enable bit</description>
|
|
<lsb>15</lsb>
|
|
<msb>15</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "SVHR" -->
|
|
<field>
|
|
<name>SVHR</name>
|
|
<description>Low-voltage detection reset voltage setting bits</description>
|
|
<lsb>10</lsb>
|
|
<msb>14</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "LVDIE" -->
|
|
<field>
|
|
<name>LVDIE</name>
|
|
<description>Low-voltage detection interrupt enable bit</description>
|
|
<lsb>7</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "SVHI" -->
|
|
<field>
|
|
<name>SVHI</name>
|
|
<description>Low-voltage detection interrupt voltage setting bits</description>
|
|
<lsb>2</lsb>
|
|
<msb>6</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "LVD_STR" -->
|
|
<register>
|
|
<name>LVD_STR</name>
|
|
<description>Low-voltage Detection Interrupt Factor Register</description>
|
|
<addressOffset>0x4</addressOffset>
|
|
<size>8</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0x80</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "LVDIR" -->
|
|
<field>
|
|
<name>LVDIR</name>
|
|
<description>Low-voltage detection interrupt factor bit</description>
|
|
<lsb>7</lsb>
|
|
<msb>7</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "LVD_CLR" -->
|
|
<register>
|
|
<name>LVD_CLR</name>
|
|
<description>Low-voltage Detection Interrupt Factor Clear Register</description>
|
|
<addressOffset>0x8</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x80</resetValue>
|
|
<resetMask>0x80</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "LVDCL" -->
|
|
<field>
|
|
<name>LVDCL</name>
|
|
<description>Low-voltage detection interrupt factor clear bit</description>
|
|
<lsb>7</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "LVD_RLR" -->
|
|
<register>
|
|
<name>LVD_RLR</name>
|
|
<description>Low-voltage Detection Voltage Protection Register</description>
|
|
<addressOffset>0xC</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<resetMask>0xFFFFFFFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "LVDLCK" -->
|
|
<field>
|
|
<name>LVDLCK</name>
|
|
<description>Low-voltage Detection Voltage Control Register protection bits</description>
|
|
<lsb>0</lsb>
|
|
<msb>31</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "LVD_STR2" -->
|
|
<register>
|
|
<name>LVD_STR2</name>
|
|
<description>Low-voltage Detection Circuit Status Register</description>
|
|
<addressOffset>0x10</addressOffset>
|
|
<size>8</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x40</resetValue>
|
|
<resetMask>0xC0</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "LVDIRDY" -->
|
|
<field>
|
|
<name>LVDIRDY</name>
|
|
<description>Low-voltage detection interrupt status flag</description>
|
|
<lsb>7</lsb>
|
|
<msb>7</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "LVDRRDY" -->
|
|
<field>
|
|
<name>LVDRRDY</name>
|
|
<description>Low-voltage detection reset status flag</description>
|
|
<lsb>6</lsb>
|
|
<msb>6</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral>
|
|
<!-- PERIPHERAL "DS" -->
|
|
<peripheral>
|
|
<name>DS</name>
|
|
<description>Low Power Consumption Mode Registers</description>
|
|
<groupName>DS</groupName>
|
|
<baseAddress>0x40035100</baseAddress>
|
|
<!-- ADDRESS BLOCK -->
|
|
<addressBlock>
|
|
<offset>0x0</offset>
|
|
<size>0x1</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x4</offset>
|
|
<size>0x1</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x700</offset>
|
|
<size>0x1</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x704</offset>
|
|
<size>0x1</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x708</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x70C</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x710</offset>
|
|
<size>0x1</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x714</offset>
|
|
<size>0x1</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x800</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x804</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x808</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x80C</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<!-- REGISTERS -->
|
|
<registers>
|
|
<!-- REGISTER "REG_CTL" -->
|
|
<register>
|
|
<name>REG_CTL</name>
|
|
<description>Sub Oscillation Circuit Power Supply Control Register</description>
|
|
<addressOffset>0x0</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x04</resetValue>
|
|
<resetMask>0x06</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "ISUBSEL" -->
|
|
<field>
|
|
<name>ISUBSEL</name>
|
|
<description>Sub oscillation circuit current setting bits</description>
|
|
<lsb>1</lsb>
|
|
<msb>2</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "RCK_CTL" -->
|
|
<register>
|
|
<name>RCK_CTL</name>
|
|
<description>Sub Clock Control Register</description>
|
|
<addressOffset>0x4</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x01</resetValue>
|
|
<resetMask>0x03</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "CECCKE" -->
|
|
<field>
|
|
<name>CECCKE</name>
|
|
<description>CEC clock control bit</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "RTCCKE" -->
|
|
<field>
|
|
<name>RTCCKE</name>
|
|
<description>RTC clock control bit</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "PMD_CTL" -->
|
|
<register>
|
|
<name>PMD_CTL</name>
|
|
<description>RTC Mode Control Register</description>
|
|
<addressOffset>0x700</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0x01</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "RTCE" -->
|
|
<field>
|
|
<name>RTCE</name>
|
|
<description>RTC mode control bit</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "WRFSR" -->
|
|
<register>
|
|
<name>WRFSR</name>
|
|
<description>Deep Standby Return Factor Register 1</description>
|
|
<addressOffset>0x704</addressOffset>
|
|
<size>8</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0x03</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "WLVDH" -->
|
|
<field>
|
|
<name>WLVDH</name>
|
|
<description>Low-voltage detection reset return bit</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "WINITX" -->
|
|
<field>
|
|
<name>WINITX</name>
|
|
<description>INITX pin input reset return bit</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "WIFSR" -->
|
|
<register>
|
|
<name>WIFSR</name>
|
|
<description>Deep Standby Return Factor Register 2</description>
|
|
<addressOffset>0x708</addressOffset>
|
|
<size>16</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<resetMask>0x03FF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "WCEC1I" -->
|
|
<field>
|
|
<name>WCEC1I</name>
|
|
<description>CEC ch.1 interrupt return bit</description>
|
|
<lsb>9</lsb>
|
|
<msb>9</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "WCEC0I" -->
|
|
<field>
|
|
<name>WCEC0I</name>
|
|
<description>CEC ch.0 interrupt return bit</description>
|
|
<lsb>8</lsb>
|
|
<msb>8</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "WUI5" -->
|
|
<field>
|
|
<name>WUI5</name>
|
|
<description>WKUP5 pin input return bit</description>
|
|
<lsb>7</lsb>
|
|
<msb>7</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "WUI4" -->
|
|
<field>
|
|
<name>WUI4</name>
|
|
<description>WKUP4 pin input return bit</description>
|
|
<lsb>6</lsb>
|
|
<msb>6</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "WUI3" -->
|
|
<field>
|
|
<name>WUI3</name>
|
|
<description>WKUP3 pin input return bit</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "WUI2" -->
|
|
<field>
|
|
<name>WUI2</name>
|
|
<description>WKUP2 pin input return bit</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "WUI1" -->
|
|
<field>
|
|
<name>WUI1</name>
|
|
<description>WKUP1 pin input return bit</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "WUI0" -->
|
|
<field>
|
|
<name>WUI0</name>
|
|
<description>WKUP0 pin input return bit</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "WLVDI" -->
|
|
<field>
|
|
<name>WLVDI</name>
|
|
<description>LVD interrupt return bit</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "WRTCI" -->
|
|
<field>
|
|
<name>WRTCI</name>
|
|
<description>RTC interrupt return bit</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "WIER" -->
|
|
<register>
|
|
<name>WIER</name>
|
|
<description>Deep Standby Return Enable Register</description>
|
|
<addressOffset>0x70C</addressOffset>
|
|
<size>16</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<resetMask>0x03FB</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "WCEC1E" -->
|
|
<field>
|
|
<name>WCEC1E</name>
|
|
<description>HDMI-CEC/ Remote Control Reception ch.1 interrupt return enable bit</description>
|
|
<lsb>9</lsb>
|
|
<msb>9</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "WCEC0E" -->
|
|
<field>
|
|
<name>WCEC0E</name>
|
|
<description>HDMI-CEC/ Remote Control Reception ch.0 interrupt return enable bit</description>
|
|
<lsb>8</lsb>
|
|
<msb>8</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "WUI5E" -->
|
|
<field>
|
|
<name>WUI5E</name>
|
|
<description>WKUP5 pin input return enable bit</description>
|
|
<lsb>7</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "WUI4E" -->
|
|
<field>
|
|
<name>WUI4E</name>
|
|
<description>WKUP4 pin input return enable bit</description>
|
|
<lsb>6</lsb>
|
|
<msb>6</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "WUI3E" -->
|
|
<field>
|
|
<name>WUI3E</name>
|
|
<description>WKUP3 pin input return enable bit</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "WUI2E" -->
|
|
<field>
|
|
<name>WUI2E</name>
|
|
<description>WKUP2 pin input return enable bit</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "WUI1E" -->
|
|
<field>
|
|
<name>WUI1E</name>
|
|
<description>WKUP1 pin input return enable bit</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "WLVDE" -->
|
|
<field>
|
|
<name>WLVDE</name>
|
|
<description>LVD interrupt return enable bit</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "WRTCE" -->
|
|
<field>
|
|
<name>WRTCE</name>
|
|
<description>RTC interrupt return enable bit</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "WILVR" -->
|
|
<register>
|
|
<name>WILVR</name>
|
|
<description>WKUP Pin Input Level Register</description>
|
|
<addressOffset>0x710</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0x1F</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "WUI5LV" -->
|
|
<field>
|
|
<name>WUI5LV</name>
|
|
<description>WKUP5 pin input level select bit</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "WUI4LV" -->
|
|
<field>
|
|
<name>WUI4LV</name>
|
|
<description>WKUP4 pin input level select bit</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "WUI3LV" -->
|
|
<field>
|
|
<name>WUI3LV</name>
|
|
<description>WKUP3 pin input level select bit</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "WUI2LV" -->
|
|
<field>
|
|
<name>WUI2LV</name>
|
|
<description>WKUP2 pin input level select bit</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "WUI1LV" -->
|
|
<field>
|
|
<name>WUI1LV</name>
|
|
<description>WKUP1 pin input level select bit</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "DSRAMR" -->
|
|
<register>
|
|
<name>DSRAMR</name>
|
|
<description>Deep Standby RAM Retention Register</description>
|
|
<addressOffset>0x714</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0x03</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "SRAMR" -->
|
|
<field>
|
|
<name>SRAMR</name>
|
|
<description>On-chip SRAM retention control bits</description>
|
|
<lsb>0</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "BUR01" -->
|
|
<register>
|
|
<name>BUR01</name>
|
|
<description>Backup Register 01</description>
|
|
<addressOffset>0x800</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0xFF</resetMask>
|
|
</register>
|
|
<!-- REGISTER "BUR02" -->
|
|
<register>
|
|
<name>BUR02</name>
|
|
<description>Backup Register 02</description>
|
|
<addressOffset>0x801</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0xFF</resetMask>
|
|
</register>
|
|
<!-- REGISTER "BUR03" -->
|
|
<register>
|
|
<name>BUR03</name>
|
|
<description>Backup Register 03</description>
|
|
<addressOffset>0x802</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0xFF</resetMask>
|
|
</register>
|
|
<!-- REGISTER "BUR04" -->
|
|
<register>
|
|
<name>BUR04</name>
|
|
<description>Backup Register 04</description>
|
|
<addressOffset>0x803</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0xFF</resetMask>
|
|
</register>
|
|
<!-- REGISTER "BUR05" -->
|
|
<register>
|
|
<name>BUR05</name>
|
|
<description>Backup Register 05</description>
|
|
<addressOffset>0x804</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0xFF</resetMask>
|
|
</register>
|
|
<!-- REGISTER "BUR06" -->
|
|
<register>
|
|
<name>BUR06</name>
|
|
<description>Backup Register 06</description>
|
|
<addressOffset>0x805</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0xFF</resetMask>
|
|
</register>
|
|
<!-- REGISTER "BUR07" -->
|
|
<register>
|
|
<name>BUR07</name>
|
|
<description>Backup Register 07</description>
|
|
<addressOffset>0x806</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0xFF</resetMask>
|
|
</register>
|
|
<!-- REGISTER "BUR08" -->
|
|
<register>
|
|
<name>BUR08</name>
|
|
<description>Backup Register 08</description>
|
|
<addressOffset>0x807</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0xFF</resetMask>
|
|
</register>
|
|
<!-- REGISTER "BUR09" -->
|
|
<register>
|
|
<name>BUR09</name>
|
|
<description>Backup Register 09</description>
|
|
<addressOffset>0x808</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0xFF</resetMask>
|
|
</register>
|
|
<!-- REGISTER "BUR10" -->
|
|
<register>
|
|
<name>BUR10</name>
|
|
<description>Backup Register 10</description>
|
|
<addressOffset>0x809</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0xFF</resetMask>
|
|
</register>
|
|
<!-- REGISTER "BUR11" -->
|
|
<register>
|
|
<name>BUR11</name>
|
|
<description>Backup Register 11</description>
|
|
<addressOffset>0x80A</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0xFF</resetMask>
|
|
</register>
|
|
<!-- REGISTER "BUR12" -->
|
|
<register>
|
|
<name>BUR12</name>
|
|
<description>Backup Register 12</description>
|
|
<addressOffset>0x80B</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0xFF</resetMask>
|
|
</register>
|
|
<!-- REGISTER "BUR13" -->
|
|
<register>
|
|
<name>BUR13</name>
|
|
<description>Backup Register 13</description>
|
|
<addressOffset>0x80C</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0xFF</resetMask>
|
|
</register>
|
|
<!-- REGISTER "BUR14" -->
|
|
<register>
|
|
<name>BUR14</name>
|
|
<description>Backup Register 14</description>
|
|
<addressOffset>0x80D</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0xFF</resetMask>
|
|
</register>
|
|
<!-- REGISTER "BUR15" -->
|
|
<register>
|
|
<name>BUR15</name>
|
|
<description>Backup Register 15</description>
|
|
<addressOffset>0x80E</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0xFF</resetMask>
|
|
</register>
|
|
<!-- REGISTER "BUR16" -->
|
|
<register>
|
|
<name>BUR16</name>
|
|
<description>Backup Register 16</description>
|
|
<addressOffset>0x80F</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0xFF</resetMask>
|
|
</register>
|
|
</registers>
|
|
</peripheral>
|
|
<!-- PERIPHERAL "MFS0" -->
|
|
<peripheral>
|
|
<name>MFS0</name>
|
|
<description>Multi-function Serial Interface 0</description>
|
|
<groupName>MFS0</groupName>
|
|
<baseAddress>0x40038000</baseAddress>
|
|
<!-- ADDRESS BLOCK -->
|
|
<addressBlock>
|
|
<offset>0x0</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x4</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x8</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0xC</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x10</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x14</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x18</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x1C</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x20</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x24</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x28</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x2C</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x30</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x34</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x38</offset>
|
|
<size>0x1</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x3C</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x40</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<!-- INTERRUPT "MFS0RX" -->
|
|
<interrupt>
|
|
<name>MFS0RX</name>
|
|
<value>7</value>
|
|
</interrupt>
|
|
<!-- INTERRUPT "MFS0TX" -->
|
|
<interrupt>
|
|
<name>MFS0TX</name>
|
|
<value>8</value>
|
|
</interrupt>
|
|
<!-- REGISTERS -->
|
|
<registers>
|
|
<!-- REGISTER "UART_SCR" -->
|
|
<register>
|
|
<name>UART_SCR</name>
|
|
<description>Serial Control Register</description>
|
|
<alternateGroup>UART</alternateGroup>
|
|
<addressOffset>0x1</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0x9F</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "UPCL" -->
|
|
<field>
|
|
<name>UPCL</name>
|
|
<description>Programmable Clear bit</description>
|
|
<lsb>7</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "RIE" -->
|
|
<field>
|
|
<name>RIE</name>
|
|
<description>Received interrupt enable bit</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TIE" -->
|
|
<field>
|
|
<name>TIE</name>
|
|
<description>Transmit interrupt enable bit</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TBIE" -->
|
|
<field>
|
|
<name>TBIE</name>
|
|
<description>Transmit bus idle interrupt enable bit</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "RXE" -->
|
|
<field>
|
|
<name>RXE</name>
|
|
<description>Received operation enable bit</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TXE" -->
|
|
<field>
|
|
<name>TXE</name>
|
|
<description>Transmission operation enable bit</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "UART_SMR" -->
|
|
<register>
|
|
<name>UART_SMR</name>
|
|
<description>Serial Mode Register</description>
|
|
<alternateGroup>UART</alternateGroup>
|
|
<addressOffset>0x0</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0xED</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "MD" -->
|
|
<field>
|
|
<name>MD</name>
|
|
<description>Operation mode set bit</description>
|
|
<lsb>5</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "SBL" -->
|
|
<field>
|
|
<name>SBL</name>
|
|
<description>Stop bit length select bit</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "BDS" -->
|
|
<field>
|
|
<name>BDS</name>
|
|
<description>Transfer direction select bit</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "SOE" -->
|
|
<field>
|
|
<name>SOE</name>
|
|
<description>Serial data output enable bit</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "UART_SSR" -->
|
|
<register>
|
|
<name>UART_SSR</name>
|
|
<description>Serial Status Register</description>
|
|
<alternateGroup>UART</alternateGroup>
|
|
<addressOffset>0x5</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x03</resetValue>
|
|
<resetMask>0xBF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "REC" -->
|
|
<field>
|
|
<name>REC</name>
|
|
<description>Received error flag clear bit</description>
|
|
<lsb>7</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "PE" -->
|
|
<field>
|
|
<name>PE</name>
|
|
<description>Parity error flag bit (only functions in operation mode 0)</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "FRE" -->
|
|
<field>
|
|
<name>FRE</name>
|
|
<description>Framing error flag bit</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "ORE" -->
|
|
<field>
|
|
<name>ORE</name>
|
|
<description>Overrun error flag bit</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "RDRF" -->
|
|
<field>
|
|
<name>RDRF</name>
|
|
<description>Received data full flag bit</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "TDRE" -->
|
|
<field>
|
|
<name>TDRE</name>
|
|
<description>Transmit data empty flag bit</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "TBI" -->
|
|
<field>
|
|
<name>TBI</name>
|
|
<description>Transmit bus idle flag</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "UART_ESCR" -->
|
|
<register>
|
|
<name>UART_ESCR</name>
|
|
<description>Extended Communication Control Register</description>
|
|
<alternateGroup>UART</alternateGroup>
|
|
<addressOffset>0x4</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0xFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "FLWEN" -->
|
|
<field>
|
|
<name>FLWEN</name>
|
|
<description>Flow control enable bit</description>
|
|
<lsb>7</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "ESBL" -->
|
|
<field>
|
|
<name>ESBL</name>
|
|
<description>Extension stop bit length select bit</description>
|
|
<lsb>6</lsb>
|
|
<msb>6</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "INV" -->
|
|
<field>
|
|
<name>INV</name>
|
|
<description>Inverted serial data format bit</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "PEN" -->
|
|
<field>
|
|
<name>PEN</name>
|
|
<description>Parity enable bit (only functions in operation mode 0)</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "P" -->
|
|
<field>
|
|
<name>P</name>
|
|
<description>Parity select bit (only functions in operation mode 0)</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "L" -->
|
|
<field>
|
|
<name>L</name>
|
|
<description>Data length select bit</description>
|
|
<lsb>0</lsb>
|
|
<msb>2</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "UART_RDR" -->
|
|
<register>
|
|
<name>UART_RDR</name>
|
|
<description>Received Data Register</description>
|
|
<alternateGroup>UART</alternateGroup>
|
|
<addressOffset>0x8</addressOffset>
|
|
<size>16</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<resetMask>0x01FF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "D" -->
|
|
<field>
|
|
<name>D</name>
|
|
<description>Data</description>
|
|
<lsb>0</lsb>
|
|
<msb>8</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "UART_TDR" -->
|
|
<register>
|
|
<name>UART_TDR</name>
|
|
<description>Transmit Data Register</description>
|
|
<alternateGroup>UART</alternateGroup>
|
|
<addressOffset>0x8</addressOffset>
|
|
<size>16</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x01FF</resetValue>
|
|
<resetMask>0x01FF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "D" -->
|
|
<field>
|
|
<name>D</name>
|
|
<description>Data</description>
|
|
<lsb>0</lsb>
|
|
<msb>8</msb>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "UART_BGR" -->
|
|
<register>
|
|
<name>UART_BGR</name>
|
|
<description>Baud Rate Generator Registers</description>
|
|
<alternateGroup>UART</alternateGroup>
|
|
<addressOffset>0xC</addressOffset>
|
|
<size>16</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<resetMask>0xFFFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "EXT" -->
|
|
<field>
|
|
<name>EXT</name>
|
|
<description>External clock select bit</description>
|
|
<lsb>15</lsb>
|
|
<msb>15</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "BGR1" -->
|
|
<field>
|
|
<name>BGR1</name>
|
|
<description>Baud Rate Generator Register 1</description>
|
|
<lsb>8</lsb>
|
|
<msb>14</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "BGR0" -->
|
|
<field>
|
|
<name>BGR0</name>
|
|
<description>Baud Rate Generator Register 0</description>
|
|
<lsb>0</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "UART_FCR1" -->
|
|
<register>
|
|
<name>UART_FCR1</name>
|
|
<description>FIFO Control Register 1</description>
|
|
<alternateGroup>UART</alternateGroup>
|
|
<addressOffset>0x15</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x04</resetValue>
|
|
<resetMask>0x1F</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "FLSTE" -->
|
|
<field>
|
|
<name>FLSTE</name>
|
|
<description>Re-transmission data lost detect enable bit</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "FRIIE" -->
|
|
<field>
|
|
<name>FRIIE</name>
|
|
<description>Received FIFO idle detection enable bit</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "FDRQ" -->
|
|
<field>
|
|
<name>FDRQ</name>
|
|
<description>Transmit FIFO data request bit</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "FTIE" -->
|
|
<field>
|
|
<name>FTIE</name>
|
|
<description>Transmit FIFO interrupt enable bit</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "FSEL" -->
|
|
<field>
|
|
<name>FSEL</name>
|
|
<description>FIFO select bit</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "UART_FCR0" -->
|
|
<register>
|
|
<name>UART_FCR0</name>
|
|
<description>FIFO Control Register 0</description>
|
|
<alternateGroup>UART</alternateGroup>
|
|
<addressOffset>0x14</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0x7F</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "FLST" -->
|
|
<field>
|
|
<name>FLST</name>
|
|
<description>FIFO re-transmit data lost flag bit</description>
|
|
<lsb>6</lsb>
|
|
<msb>6</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "FLD" -->
|
|
<field>
|
|
<name>FLD</name>
|
|
<description>FIFO pointer reload bit</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "FSET" -->
|
|
<field>
|
|
<name>FSET</name>
|
|
<description>FIFO pointer save bit</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "FCL2" -->
|
|
<field>
|
|
<name>FCL2</name>
|
|
<description>FIFO2 reset bit</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "FCL1" -->
|
|
<field>
|
|
<name>FCL1</name>
|
|
<description>FIFO1 reset bit</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "FE2" -->
|
|
<field>
|
|
<name>FE2</name>
|
|
<description>FIFO2 operation enable bit</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "FE1" -->
|
|
<field>
|
|
<name>FE1</name>
|
|
<description>FIFO1 operation enable bit</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "UART_FBYTE1" -->
|
|
<register>
|
|
<name>UART_FBYTE1</name>
|
|
<description>FIFO Byte Register 1</description>
|
|
<alternateGroup>UART</alternateGroup>
|
|
<addressOffset>0x18</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0xFF</resetMask>
|
|
</register>
|
|
<!-- REGISTER "UART_FBYTE2" -->
|
|
<register>
|
|
<name>UART_FBYTE2</name>
|
|
<description>FIFO Byte Register 2</description>
|
|
<alternateGroup>UART</alternateGroup>
|
|
<addressOffset>0x19</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0xFF</resetMask>
|
|
</register>
|
|
<!-- REGISTER "CSIO_SCR" -->
|
|
<register>
|
|
<name>CSIO_SCR</name>
|
|
<description>Serial Control Register</description>
|
|
<alternateGroup>CSIO</alternateGroup>
|
|
<addressOffset>0x1</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0xFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "UPCL" -->
|
|
<field>
|
|
<name>UPCL</name>
|
|
<description>Programmable clear bit</description>
|
|
<lsb>7</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "MS" -->
|
|
<field>
|
|
<name>MS</name>
|
|
<description>Master/Slave function select bit</description>
|
|
<lsb>6</lsb>
|
|
<msb>6</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "SPI" -->
|
|
<field>
|
|
<name>SPI</name>
|
|
<description>SPI corresponding bit</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "RIE" -->
|
|
<field>
|
|
<name>RIE</name>
|
|
<description>Received interrupt enable bit</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TIE" -->
|
|
<field>
|
|
<name>TIE</name>
|
|
<description>Transmit interrupt enable bit</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TBIE" -->
|
|
<field>
|
|
<name>TBIE</name>
|
|
<description>Transmit bus idle interrupt enable bit</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "RXE" -->
|
|
<field>
|
|
<name>RXE</name>
|
|
<description>Data received enable bit</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TXE" -->
|
|
<field>
|
|
<name>TXE</name>
|
|
<description>Data transmission enable bit</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "CSIO_SMR" -->
|
|
<register>
|
|
<name>CSIO_SMR</name>
|
|
<description>Serial Mode Register</description>
|
|
<alternateGroup>CSIO</alternateGroup>
|
|
<addressOffset>0x0</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0xEF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "MD" -->
|
|
<field>
|
|
<name>MD</name>
|
|
<description>Operation mode set bits</description>
|
|
<lsb>5</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "SCINV" -->
|
|
<field>
|
|
<name>SCINV</name>
|
|
<description>Serial clock invert bit</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "BDS" -->
|
|
<field>
|
|
<name>BDS</name>
|
|
<description>Transfer direction select bit</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "SCKE" -->
|
|
<field>
|
|
<name>SCKE</name>
|
|
<description>Master mode serial clock output enable bit</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "SOE" -->
|
|
<field>
|
|
<name>SOE</name>
|
|
<description>Serial data output enable bit</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "CSIO_SSR" -->
|
|
<register>
|
|
<name>CSIO_SSR</name>
|
|
<description>Serial Status Register</description>
|
|
<alternateGroup>CSIO</alternateGroup>
|
|
<addressOffset>0x5</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x03</resetValue>
|
|
<resetMask>0x9F</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "REC" -->
|
|
<field>
|
|
<name>REC</name>
|
|
<description>Received error flag clear bit</description>
|
|
<lsb>7</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "ORE" -->
|
|
<field>
|
|
<name>ORE</name>
|
|
<description>Overrun error flag bit</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "RDRF" -->
|
|
<field>
|
|
<name>RDRF</name>
|
|
<description>Received data full flag bit</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "TDRE" -->
|
|
<field>
|
|
<name>TDRE</name>
|
|
<description>Transmit data empty flag bit</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "TBI" -->
|
|
<field>
|
|
<name>TBI</name>
|
|
<description>Transmit bus idle flag bit</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "CSIO_ESCR" -->
|
|
<register>
|
|
<name>CSIO_ESCR</name>
|
|
<description>Extended Communication Control Register</description>
|
|
<alternateGroup>CSIO</alternateGroup>
|
|
<addressOffset>0x4</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0xFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "SOP" -->
|
|
<field>
|
|
<name>SOP</name>
|
|
<description>Serial output pin set bit</description>
|
|
<lsb>7</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "L3" -->
|
|
<field>
|
|
<name>L3</name>
|
|
<description>Bit3 of Data length select bits</description>
|
|
<lsb>6</lsb>
|
|
<msb>6</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "CSFE" -->
|
|
<field>
|
|
<name>CSFE</name>
|
|
<description>Serial Chip Select Format enable bit</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "WT" -->
|
|
<field>
|
|
<name>WT</name>
|
|
<description>Data transmit/received wait select bits</description>
|
|
<lsb>3</lsb>
|
|
<msb>4</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "L" -->
|
|
<field>
|
|
<name>L</name>
|
|
<description>Bit0-2 of Data length select bits</description>
|
|
<lsb>0</lsb>
|
|
<msb>2</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "CSIO_RDR" -->
|
|
<register>
|
|
<name>CSIO_RDR</name>
|
|
<description>Received Data Register</description>
|
|
<alternateGroup>CSIO</alternateGroup>
|
|
<addressOffset>0x8</addressOffset>
|
|
<size>16</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<resetMask>0xFFFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "D" -->
|
|
<field>
|
|
<name>D</name>
|
|
<description>Data</description>
|
|
<lsb>0</lsb>
|
|
<msb>15</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "CSIO_TDR" -->
|
|
<register>
|
|
<name>CSIO_TDR</name>
|
|
<description>Transmit Data Register</description>
|
|
<alternateGroup>CSIO</alternateGroup>
|
|
<addressOffset>0x8</addressOffset>
|
|
<size>16</size>
|
|
<access>write-only</access>
|
|
<resetValue>0xFFFF</resetValue>
|
|
<resetMask>0xFFFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "D" -->
|
|
<field>
|
|
<name>D</name>
|
|
<description>Data</description>
|
|
<lsb>0</lsb>
|
|
<msb>15</msb>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "CSIO_BGR" -->
|
|
<register>
|
|
<name>CSIO_BGR</name>
|
|
<description>Baud Rate Generator Registers</description>
|
|
<alternateGroup>CSIO</alternateGroup>
|
|
<addressOffset>0xC</addressOffset>
|
|
<size>16</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<resetMask>0x7FFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "BGR1" -->
|
|
<field>
|
|
<name>BGR1</name>
|
|
<description>Baud Rate Generator Register 1</description>
|
|
<lsb>8</lsb>
|
|
<msb>14</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "BGR0" -->
|
|
<field>
|
|
<name>BGR0</name>
|
|
<description>Baud Rate Generator Register 0</description>
|
|
<lsb>0</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "CSIO_FCR1" -->
|
|
<register>
|
|
<name>CSIO_FCR1</name>
|
|
<description>FIFO Control Register 1</description>
|
|
<alternateGroup>CSIO</alternateGroup>
|
|
<addressOffset>0x15</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x04</resetValue>
|
|
<resetMask>0x1F</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "FLSTE" -->
|
|
<field>
|
|
<name>FLSTE</name>
|
|
<description>Re-transmission data lost detect enable bit</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "FRIIE" -->
|
|
<field>
|
|
<name>FRIIE</name>
|
|
<description>Received FIFO idle detection enable bit</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "FDRQ" -->
|
|
<field>
|
|
<name>FDRQ</name>
|
|
<description>Transmit FIFO data request bit</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "FTIE" -->
|
|
<field>
|
|
<name>FTIE</name>
|
|
<description>Transmit FIFO interrupt enable bit</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "FSEL" -->
|
|
<field>
|
|
<name>FSEL</name>
|
|
<description>FIFO select bit</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "CSIO_FCR0" -->
|
|
<register>
|
|
<name>CSIO_FCR0</name>
|
|
<description>FIFO Control Register 0</description>
|
|
<alternateGroup>CSIO</alternateGroup>
|
|
<addressOffset>0x14</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0x7F</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "FLST" -->
|
|
<field>
|
|
<name>FLST</name>
|
|
<description>FIFO re-transmit data lost flag bit</description>
|
|
<lsb>6</lsb>
|
|
<msb>6</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "FLD" -->
|
|
<field>
|
|
<name>FLD</name>
|
|
<description>FIFO pointer reload bit</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "FSET" -->
|
|
<field>
|
|
<name>FSET</name>
|
|
<description>FIFO pointer save bit</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "FCL2" -->
|
|
<field>
|
|
<name>FCL2</name>
|
|
<description>FIFO2 reset bit</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "FCL1" -->
|
|
<field>
|
|
<name>FCL1</name>
|
|
<description>FIFO1 reset bit</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "FE2" -->
|
|
<field>
|
|
<name>FE2</name>
|
|
<description>FIFO2 operation enable bit</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "FE1" -->
|
|
<field>
|
|
<name>FE1</name>
|
|
<description>FIFO1 operation enable bit</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "CSIO_FBYTE1" -->
|
|
<register>
|
|
<name>CSIO_FBYTE1</name>
|
|
<description>FIFO Byte Register 1</description>
|
|
<alternateGroup>CSIO</alternateGroup>
|
|
<addressOffset>0x18</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0xFF</resetMask>
|
|
</register>
|
|
<!-- REGISTER "CSIO_FBYTE2" -->
|
|
<register>
|
|
<name>CSIO_FBYTE2</name>
|
|
<description>FIFO Byte Register 2</description>
|
|
<alternateGroup>CSIO</alternateGroup>
|
|
<addressOffset>0x19</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0xFF</resetMask>
|
|
</register>
|
|
<!-- REGISTER "CSIO_SCSTR0" -->
|
|
<register>
|
|
<name>CSIO_SCSTR0</name>
|
|
<description>Serial Chip Select Timing Register 0</description>
|
|
<alternateGroup>CSIO</alternateGroup>
|
|
<addressOffset>0x1C</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0xFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "CSHD" -->
|
|
<field>
|
|
<name>CSHD</name>
|
|
<description>Serial Chip Select Hold Delay bits</description>
|
|
<lsb>0</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "CSIO_SCSTR1" -->
|
|
<register>
|
|
<name>CSIO_SCSTR1</name>
|
|
<description>Serial Chip Select Timing Register 1</description>
|
|
<alternateGroup>CSIO</alternateGroup>
|
|
<addressOffset>0x1D</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0xFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "CSSU" -->
|
|
<field>
|
|
<name>CSSU</name>
|
|
<description>Serial Chip Select Setup Delay bits</description>
|
|
<lsb>0</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "CSIO_SCSTR2" -->
|
|
<register>
|
|
<name>CSIO_SCSTR2</name>
|
|
<description>Serial Chip Select Timing Registers 2/3</description>
|
|
<alternateGroup>CSIO</alternateGroup>
|
|
<addressOffset>0x20</addressOffset>
|
|
<size>16</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<resetMask>0xFFFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "CSDS" -->
|
|
<field>
|
|
<name>CSDS</name>
|
|
<description>Serial Chip Deselect bits</description>
|
|
<lsb>0</lsb>
|
|
<msb>15</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "CSIO_SACSR" -->
|
|
<register>
|
|
<name>CSIO_SACSR</name>
|
|
<description>Serial Support Control Register</description>
|
|
<alternateGroup>CSIO</alternateGroup>
|
|
<addressOffset>0x24</addressOffset>
|
|
<size>16</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<resetMask>0x39DF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "TBEEN" -->
|
|
<field>
|
|
<name>TBEEN</name>
|
|
<description>Transfer Byte Error Enable bit</description>
|
|
<lsb>13</lsb>
|
|
<msb>13</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "CSEIE" -->
|
|
<field>
|
|
<name>CSEIE</name>
|
|
<description>Chip Select Error Interupt Enable bit</description>
|
|
<lsb>12</lsb>
|
|
<msb>12</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "CSE" -->
|
|
<field>
|
|
<name>CSE</name>
|
|
<description>Chip Select Error Flag</description>
|
|
<lsb>11</lsb>
|
|
<msb>11</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TINT" -->
|
|
<field>
|
|
<name>TINT</name>
|
|
<description>Timer Interrupt Flag</description>
|
|
<lsb>8</lsb>
|
|
<msb>8</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TINTE" -->
|
|
<field>
|
|
<name>TINTE</name>
|
|
<description>Timer Interrupt Enable bit</description>
|
|
<lsb>7</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TSYNE" -->
|
|
<field>
|
|
<name>TSYNE</name>
|
|
<description>Synchronous Transmission Enable bit</description>
|
|
<lsb>6</lsb>
|
|
<msb>6</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TDIV" -->
|
|
<field>
|
|
<name>TDIV</name>
|
|
<description>Timer Operation Clock Division bit</description>
|
|
<lsb>1</lsb>
|
|
<msb>4</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TMRE" -->
|
|
<field>
|
|
<name>TMRE</name>
|
|
<description>Serial Timer Enable bit</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "CSIO_STMR" -->
|
|
<register>
|
|
<name>CSIO_STMR</name>
|
|
<description>Serial Timer Register</description>
|
|
<alternateGroup>CSIO</alternateGroup>
|
|
<addressOffset>0x28</addressOffset>
|
|
<size>16</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<resetMask>0xFFFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "TM" -->
|
|
<field>
|
|
<name>TM</name>
|
|
<description>Timer Data bits</description>
|
|
<lsb>0</lsb>
|
|
<msb>15</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "CSIO_STMCR" -->
|
|
<register>
|
|
<name>CSIO_STMCR</name>
|
|
<description>Serial Timer Comparison Register</description>
|
|
<alternateGroup>CSIO</alternateGroup>
|
|
<addressOffset>0x2C</addressOffset>
|
|
<size>16</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<resetMask>0xFFFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "TC" -->
|
|
<field>
|
|
<name>TC</name>
|
|
<description>Compare bits</description>
|
|
<lsb>0</lsb>
|
|
<msb>15</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "CSIO_SCSCR" -->
|
|
<register>
|
|
<name>CSIO_SCSCR</name>
|
|
<description>Serial Chip Select Control Status Register</description>
|
|
<alternateGroup>CSIO</alternateGroup>
|
|
<addressOffset>0x30</addressOffset>
|
|
<size>16</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0020</resetValue>
|
|
<resetMask>0xFFFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "SST" -->
|
|
<field>
|
|
<name>SST</name>
|
|
<description>Serial Chip Select Active Start bit</description>
|
|
<lsb>14</lsb>
|
|
<msb>15</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "SED" -->
|
|
<field>
|
|
<name>SED</name>
|
|
<description>Serial Chip Select Active End bit</description>
|
|
<lsb>12</lsb>
|
|
<msb>13</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "SCD" -->
|
|
<field>
|
|
<name>SCD</name>
|
|
<description>Serial Chip Select Active Display bit</description>
|
|
<lsb>10</lsb>
|
|
<msb>11</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "SCAM" -->
|
|
<field>
|
|
<name>SCAM</name>
|
|
<description>Serial Chip Select Active Hold bit</description>
|
|
<lsb>9</lsb>
|
|
<msb>9</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "CDIV" -->
|
|
<field>
|
|
<name>CDIV</name>
|
|
<description>Serial Chip Select Timing Operation Clock Division bit</description>
|
|
<lsb>6</lsb>
|
|
<msb>8</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "CSLVL" -->
|
|
<field>
|
|
<name>CSLVL</name>
|
|
<description>Serial Chip Select Level Setting bit</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "CSEN3" -->
|
|
<field>
|
|
<name>CSEN3</name>
|
|
<description>Serial Chip Select Enable bit</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "CSEN2" -->
|
|
<field>
|
|
<name>CSEN2</name>
|
|
<description>Serial Chip Select Enable bit</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "CSEN1" -->
|
|
<field>
|
|
<name>CSEN1</name>
|
|
<description>Serial Chip Select Enable bit</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "CSEN0" -->
|
|
<field>
|
|
<name>CSEN0</name>
|
|
<description>Serial Chip Select Enable bit</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "CSOE" -->
|
|
<field>
|
|
<name>CSOE</name>
|
|
<description>Serial Chip Select Output Enable bit</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "CSIO_SCSFR0" -->
|
|
<register>
|
|
<name>CSIO_SCSFR0</name>
|
|
<description>Serial Chip Select Format Register 0</description>
|
|
<alternateGroup>CSIO</alternateGroup>
|
|
<addressOffset>0x34</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x80</resetValue>
|
|
<resetMask>0xFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "CS1CSLVL" -->
|
|
<field>
|
|
<name>CS1CSLVL</name>
|
|
<description>Serial Chip Select 1 Level Setting bit</description>
|
|
<lsb>7</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "CS1SCINV" -->
|
|
<field>
|
|
<name>CS1SCINV</name>
|
|
<description>Serial Clock Invert bit of Serial Chip Select 1</description>
|
|
<lsb>6</lsb>
|
|
<msb>6</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "CS1SPI" -->
|
|
<field>
|
|
<name>CS1SPI</name>
|
|
<description>SPI corresponding bit of Serial Chip Select 1</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "CS1BDS" -->
|
|
<field>
|
|
<name>CS1BDS</name>
|
|
<description>Transfer direction select bit of Serial Chip Select 1</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "CS1L" -->
|
|
<field>
|
|
<name>CS1L</name>
|
|
<description>Data length select bits of Serial Chip Select 1</description>
|
|
<lsb>0</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "CSIO_SCSFR1" -->
|
|
<register>
|
|
<name>CSIO_SCSFR1</name>
|
|
<description>Serial Chip Select Format Register 1</description>
|
|
<alternateGroup>CSIO</alternateGroup>
|
|
<addressOffset>0x35</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x80</resetValue>
|
|
<resetMask>0xFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "CS2CSLVL" -->
|
|
<field>
|
|
<name>CS2CSLVL</name>
|
|
<description>Serial Chip Select 2 Level Setting bit</description>
|
|
<lsb>7</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "CS2SCINV" -->
|
|
<field>
|
|
<name>CS2SCINV</name>
|
|
<description>Serial Clock Invert bit of Serial Chip Select 2</description>
|
|
<lsb>6</lsb>
|
|
<msb>6</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "CS2SPI" -->
|
|
<field>
|
|
<name>CS2SPI</name>
|
|
<description>SPI corresponding bit of Serial Chip Select 2</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "CS2BDS" -->
|
|
<field>
|
|
<name>CS2BDS</name>
|
|
<description>Transfer direction select bit of Serial Chip Select 2</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "CS2L" -->
|
|
<field>
|
|
<name>CS2L</name>
|
|
<description>Data length select bits of Serial Chip Select 2</description>
|
|
<lsb>0</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "CSIO_SCSFR2" -->
|
|
<register>
|
|
<name>CSIO_SCSFR2</name>
|
|
<description>Serial Chip Select Format Register 0</description>
|
|
<alternateGroup>CSIO</alternateGroup>
|
|
<addressOffset>0x38</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x80</resetValue>
|
|
<resetMask>0xFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "CS0CSLVL" -->
|
|
<field>
|
|
<name>CS0CSLVL</name>
|
|
<description>Serial Chip Select 0 Level Setting bit</description>
|
|
<lsb>7</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "CS0SCINV" -->
|
|
<field>
|
|
<name>CS0SCINV</name>
|
|
<description>Serial Clock Invert bit of Serial Chip Select 0</description>
|
|
<lsb>6</lsb>
|
|
<msb>6</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "CS0SPI" -->
|
|
<field>
|
|
<name>CS0SPI</name>
|
|
<description>SPI corresponding bit of Serial Chip Select 0</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "CS0BDS" -->
|
|
<field>
|
|
<name>CS0BDS</name>
|
|
<description>Transfer direction select bit of Serial Chip Select 0</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "CS0L" -->
|
|
<field>
|
|
<name>CS0L</name>
|
|
<description>Data length select bits of Serial Chip Select 0</description>
|
|
<lsb>0</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "CSIO_TBYTE0" -->
|
|
<register>
|
|
<name>CSIO_TBYTE0</name>
|
|
<description>Transfer Byte Register 0</description>
|
|
<alternateGroup>CSIO</alternateGroup>
|
|
<addressOffset>0x3C</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0xFF</resetMask>
|
|
</register>
|
|
<!-- REGISTER "CSIO_TBYTE1" -->
|
|
<register>
|
|
<name>CSIO_TBYTE1</name>
|
|
<description>Transfer Byte Register 1</description>
|
|
<alternateGroup>CSIO</alternateGroup>
|
|
<addressOffset>0x3D</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0xFF</resetMask>
|
|
</register>
|
|
<!-- REGISTER "CSIO_TBYTE2" -->
|
|
<register>
|
|
<name>CSIO_TBYTE2</name>
|
|
<description>Transfer Byte Register 2</description>
|
|
<alternateGroup>CSIO</alternateGroup>
|
|
<addressOffset>0x40</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0xFF</resetMask>
|
|
</register>
|
|
<!-- REGISTER "CSIO_TBYTE3" -->
|
|
<register>
|
|
<name>CSIO_TBYTE3</name>
|
|
<description>Transfer Byte Register 3</description>
|
|
<alternateGroup>CSIO</alternateGroup>
|
|
<addressOffset>0x41</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0xFF</resetMask>
|
|
</register>
|
|
<!-- REGISTER "LIN_SCR" -->
|
|
<register>
|
|
<name>LIN_SCR</name>
|
|
<description>Serial Control Register</description>
|
|
<alternateGroup>LIN</alternateGroup>
|
|
<addressOffset>0x1</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0xFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "UPCL" -->
|
|
<field>
|
|
<name>UPCL</name>
|
|
<description>Programmable clear bit</description>
|
|
<lsb>7</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "MS" -->
|
|
<field>
|
|
<name>MS</name>
|
|
<description>Master/Slave function select bit</description>
|
|
<lsb>6</lsb>
|
|
<msb>6</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "LBR" -->
|
|
<field>
|
|
<name>LBR</name>
|
|
<description>LIN Break Field setting bit (valid in master mode only)</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "RIE" -->
|
|
<field>
|
|
<name>RIE</name>
|
|
<description>Received interrupt enable bit</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TIE" -->
|
|
<field>
|
|
<name>TIE</name>
|
|
<description>Transmit interrupt enable bit</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TBIE" -->
|
|
<field>
|
|
<name>TBIE</name>
|
|
<description>Transmit bus idle interrupt enable bit</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "RXE" -->
|
|
<field>
|
|
<name>RXE</name>
|
|
<description>Data reception enable bit</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TXE" -->
|
|
<field>
|
|
<name>TXE</name>
|
|
<description>Data transmission enable bit</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "LIN_SMR" -->
|
|
<register>
|
|
<name>LIN_SMR</name>
|
|
<description>Serial Mode Register</description>
|
|
<alternateGroup>LIN</alternateGroup>
|
|
<addressOffset>0x0</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0xE9</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "MD" -->
|
|
<field>
|
|
<name>MD</name>
|
|
<description>Operation mode setting bits</description>
|
|
<lsb>5</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "SBL" -->
|
|
<field>
|
|
<name>SBL</name>
|
|
<description>Stop bit length select bit</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "SOE" -->
|
|
<field>
|
|
<name>SOE</name>
|
|
<description>Serial data output enable bit</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "LIN_SSR" -->
|
|
<register>
|
|
<name>LIN_SSR</name>
|
|
<description>Serial Status Register</description>
|
|
<alternateGroup>LIN</alternateGroup>
|
|
<addressOffset>0x5</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x03</resetValue>
|
|
<resetMask>0xBF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "REC" -->
|
|
<field>
|
|
<name>REC</name>
|
|
<description>Received Error flag clear bit</description>
|
|
<lsb>7</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "LBD" -->
|
|
<field>
|
|
<name>LBD</name>
|
|
<description>LIN Break field detection flag bit</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "FRE" -->
|
|
<field>
|
|
<name>FRE</name>
|
|
<description>Framing error flag bit</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "ORE" -->
|
|
<field>
|
|
<name>ORE</name>
|
|
<description>Overrun error flag bit</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "RDRF" -->
|
|
<field>
|
|
<name>RDRF</name>
|
|
<description>Received data full flag bit</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "TDRE" -->
|
|
<field>
|
|
<name>TDRE</name>
|
|
<description>Transmit data empty flag bit</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "TBI" -->
|
|
<field>
|
|
<name>TBI</name>
|
|
<description>Transmit bus idle flag bit</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "LIN_ESCR" -->
|
|
<register>
|
|
<name>LIN_ESCR</name>
|
|
<description>Extended Communication Control Register</description>
|
|
<alternateGroup>LIN</alternateGroup>
|
|
<addressOffset>0x4</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0x5F</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "ESBL" -->
|
|
<field>
|
|
<name>ESBL</name>
|
|
<description>Extended stop bit length select bit</description>
|
|
<lsb>6</lsb>
|
|
<msb>6</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "LBIE" -->
|
|
<field>
|
|
<name>LBIE</name>
|
|
<description>LIN Break field detect interrupt enable bit</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "LBL" -->
|
|
<field>
|
|
<name>LBL</name>
|
|
<description>LIN Break field length select bits (valid in master mode only)</description>
|
|
<lsb>2</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "DEL" -->
|
|
<field>
|
|
<name>DEL</name>
|
|
<description>LIN Break delimiter length select bits (valid in master mode only)</description>
|
|
<lsb>0</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "LIN_RDR" -->
|
|
<register>
|
|
<name>LIN_RDR</name>
|
|
<description>Received Data Register</description>
|
|
<alternateGroup>LIN</alternateGroup>
|
|
<addressOffset>0x8</addressOffset>
|
|
<size>16</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<resetMask>0x00FF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "D" -->
|
|
<field>
|
|
<name>D</name>
|
|
<description>Data</description>
|
|
<lsb>0</lsb>
|
|
<msb>7</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "LIN_TDR" -->
|
|
<register>
|
|
<name>LIN_TDR</name>
|
|
<description>Transmit Data Register</description>
|
|
<alternateGroup>LIN</alternateGroup>
|
|
<addressOffset>0x8</addressOffset>
|
|
<size>16</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00FF</resetValue>
|
|
<resetMask>0x00FF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "D" -->
|
|
<field>
|
|
<name>D</name>
|
|
<description>Data</description>
|
|
<lsb>0</lsb>
|
|
<msb>7</msb>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "LIN_BGR" -->
|
|
<register>
|
|
<name>LIN_BGR</name>
|
|
<description>Baud Rate Generator Registers</description>
|
|
<alternateGroup>LIN</alternateGroup>
|
|
<addressOffset>0xC</addressOffset>
|
|
<size>16</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<resetMask>0xFFFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "EXT" -->
|
|
<field>
|
|
<name>EXT</name>
|
|
<description>External clock select bit</description>
|
|
<lsb>15</lsb>
|
|
<msb>15</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "BGR1" -->
|
|
<field>
|
|
<name>BGR1</name>
|
|
<description>Baud Rate Generator Registers 1</description>
|
|
<lsb>8</lsb>
|
|
<msb>14</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "BGR0" -->
|
|
<field>
|
|
<name>BGR0</name>
|
|
<description>Baud Rate Generator Registers 0</description>
|
|
<lsb>0</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "LIN_FCR1" -->
|
|
<register>
|
|
<name>LIN_FCR1</name>
|
|
<description>FIFO Control Register 1</description>
|
|
<alternateGroup>LIN</alternateGroup>
|
|
<addressOffset>0x15</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x04</resetValue>
|
|
<resetMask>0x1F</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "FLSTE" -->
|
|
<field>
|
|
<name>FLSTE</name>
|
|
<description>Re-transmission data lost detect enable bit</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "FRIIE" -->
|
|
<field>
|
|
<name>FRIIE</name>
|
|
<description>Received FIFO idle detection enable bit</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "FDRQ" -->
|
|
<field>
|
|
<name>FDRQ</name>
|
|
<description>Transmit FIFO data request bit</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "FTIE" -->
|
|
<field>
|
|
<name>FTIE</name>
|
|
<description>Transmit FIFO interrupt enable bit</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "FSEL" -->
|
|
<field>
|
|
<name>FSEL</name>
|
|
<description>FIFO select bit</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "LIN_FCR0" -->
|
|
<register>
|
|
<name>LIN_FCR0</name>
|
|
<description>FIFO Control Register 0</description>
|
|
<alternateGroup>LIN</alternateGroup>
|
|
<addressOffset>0x14</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0x7F</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "FLST" -->
|
|
<field>
|
|
<name>FLST</name>
|
|
<description>FIFO re-transmit data lost flag bit</description>
|
|
<lsb>6</lsb>
|
|
<msb>6</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "FLD" -->
|
|
<field>
|
|
<name>FLD</name>
|
|
<description>FIFO pointer reload bit</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "FSET" -->
|
|
<field>
|
|
<name>FSET</name>
|
|
<description>FIFO pointer save bit</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "FCL2" -->
|
|
<field>
|
|
<name>FCL2</name>
|
|
<description>FIFO2 reset bit</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "FCL1" -->
|
|
<field>
|
|
<name>FCL1</name>
|
|
<description>FIFO1 reset bit</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "FE2" -->
|
|
<field>
|
|
<name>FE2</name>
|
|
<description>FIFO2 operation enable bit</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "FE1" -->
|
|
<field>
|
|
<name>FE1</name>
|
|
<description>FIFO1 operation enable bit</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "LIN_FBYTE1" -->
|
|
<register>
|
|
<name>LIN_FBYTE1</name>
|
|
<description>FIFO Byte Register 1</description>
|
|
<alternateGroup>LIN</alternateGroup>
|
|
<addressOffset>0x18</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0xFF</resetMask>
|
|
</register>
|
|
<!-- REGISTER "LIN_FBYTE2" -->
|
|
<register>
|
|
<name>LIN_FBYTE2</name>
|
|
<description>FIFO Byte Register 2</description>
|
|
<alternateGroup>LIN</alternateGroup>
|
|
<addressOffset>0x19</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0xFF</resetMask>
|
|
</register>
|
|
<!-- REGISTER "I2C_IBCR" -->
|
|
<register>
|
|
<name>I2C_IBCR</name>
|
|
<description>I2C Bus Control Register</description>
|
|
<alternateGroup>I2C</alternateGroup>
|
|
<addressOffset>0x1</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0xFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "MSS" -->
|
|
<field>
|
|
<name>MSS</name>
|
|
<description>Master/slave select bit</description>
|
|
<lsb>7</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "ACT_SCC" -->
|
|
<field>
|
|
<name>ACT_SCC</name>
|
|
<description>Operation flag/iteration start condition generation bit</description>
|
|
<lsb>6</lsb>
|
|
<msb>6</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "ACKE" -->
|
|
<field>
|
|
<name>ACKE</name>
|
|
<description>Data byte acknowledge enable bit</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "WSEL" -->
|
|
<field>
|
|
<name>WSEL</name>
|
|
<description>Wait selection bit</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "CNDE" -->
|
|
<field>
|
|
<name>CNDE</name>
|
|
<description>Condition detection interrupt enable bit</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "INTE" -->
|
|
<field>
|
|
<name>INTE</name>
|
|
<description>Interrupt enable bit</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "BER" -->
|
|
<field>
|
|
<name>BER</name>
|
|
<description>Bus error flag bit</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "INT" -->
|
|
<field>
|
|
<name>INT</name>
|
|
<description>Interrupt flag bit</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "I2C_SMR" -->
|
|
<register>
|
|
<name>I2C_SMR</name>
|
|
<description>Serial Mode Register</description>
|
|
<alternateGroup>I2C</alternateGroup>
|
|
<addressOffset>0x0</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0xEC</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "MD" -->
|
|
<field>
|
|
<name>MD</name>
|
|
<description>Operation mode set bits</description>
|
|
<lsb>5</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "RIE" -->
|
|
<field>
|
|
<name>RIE</name>
|
|
<description>Received interrupt enable bit</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TIE" -->
|
|
<field>
|
|
<name>TIE</name>
|
|
<description>Transmit interrupt enable bit</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "I2C_IBSR" -->
|
|
<register>
|
|
<name>I2C_IBSR</name>
|
|
<description>I2C Bus Status Register</description>
|
|
<alternateGroup>I2C</alternateGroup>
|
|
<addressOffset>0x4</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0xFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "FBT" -->
|
|
<field>
|
|
<name>FBT</name>
|
|
<description>First byte bit</description>
|
|
<lsb>7</lsb>
|
|
<msb>7</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "RACK" -->
|
|
<field>
|
|
<name>RACK</name>
|
|
<description>Acknowledge flag bit</description>
|
|
<lsb>6</lsb>
|
|
<msb>6</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "RSA" -->
|
|
<field>
|
|
<name>RSA</name>
|
|
<description>Reserved address detection bit</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "TRX" -->
|
|
<field>
|
|
<name>TRX</name>
|
|
<description>Data direction bit</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "AL" -->
|
|
<field>
|
|
<name>AL</name>
|
|
<description>Arbitration lost bit</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "RSC" -->
|
|
<field>
|
|
<name>RSC</name>
|
|
<description>Iteration start condition check bit</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "SPC" -->
|
|
<field>
|
|
<name>SPC</name>
|
|
<description>Stop condition check bit</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "BB" -->
|
|
<field>
|
|
<name>BB</name>
|
|
<description>Bus state bit</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "I2C_SSR" -->
|
|
<register>
|
|
<name>I2C_SSR</name>
|
|
<description>Serial Status Register</description>
|
|
<alternateGroup>I2C</alternateGroup>
|
|
<addressOffset>0x5</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x03</resetValue>
|
|
<resetMask>0xFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "REC" -->
|
|
<field>
|
|
<name>REC</name>
|
|
<description>Received error flag clear bit</description>
|
|
<lsb>7</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TSET" -->
|
|
<field>
|
|
<name>TSET</name>
|
|
<description>Transmit empty flag set bit</description>
|
|
<lsb>6</lsb>
|
|
<msb>6</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "DMA" -->
|
|
<field>
|
|
<name>DMA</name>
|
|
<description>DMA mode enable bit</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TBIE" -->
|
|
<field>
|
|
<name>TBIE</name>
|
|
<description>Transmit bus idle interrupt enable bit (Effective only when DMA mode is enabled)</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "ORE" -->
|
|
<field>
|
|
<name>ORE</name>
|
|
<description>Overrun error flag bit</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "RDRF" -->
|
|
<field>
|
|
<name>RDRF</name>
|
|
<description>Received data full flag bit</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "TDRE" -->
|
|
<field>
|
|
<name>TDRE</name>
|
|
<description>Transmit data empty flag bit</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "TBI" -->
|
|
<field>
|
|
<name>TBI</name>
|
|
<description>Transmit bus idle flag bit (Effective only when DMA mode is enabled)</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "I2C_RDR" -->
|
|
<register>
|
|
<name>I2C_RDR</name>
|
|
<description>Received Data Register</description>
|
|
<alternateGroup>I2C</alternateGroup>
|
|
<addressOffset>0x8</addressOffset>
|
|
<size>16</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<resetMask>0x00FF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "D" -->
|
|
<field>
|
|
<name>D</name>
|
|
<description>Data</description>
|
|
<lsb>0</lsb>
|
|
<msb>7</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "I2C_TDR" -->
|
|
<register>
|
|
<name>I2C_TDR</name>
|
|
<description>Transmit Data Register</description>
|
|
<alternateGroup>I2C</alternateGroup>
|
|
<addressOffset>0x8</addressOffset>
|
|
<size>16</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00FF</resetValue>
|
|
<resetMask>0x00FF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "D" -->
|
|
<field>
|
|
<name>D</name>
|
|
<description>Data</description>
|
|
<lsb>0</lsb>
|
|
<msb>7</msb>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "I2C_BGR" -->
|
|
<register>
|
|
<name>I2C_BGR</name>
|
|
<description>Baud Rate Generator Registers</description>
|
|
<alternateGroup>I2C</alternateGroup>
|
|
<addressOffset>0xC</addressOffset>
|
|
<size>16</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<resetMask>0x7FFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "BGR1" -->
|
|
<field>
|
|
<name>BGR1</name>
|
|
<description>Baud Rate Generator Register 1</description>
|
|
<lsb>8</lsb>
|
|
<msb>14</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "BGR0" -->
|
|
<field>
|
|
<name>BGR0</name>
|
|
<description>Baud Rate Generator Register 0</description>
|
|
<lsb>0</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "I2C_ISMK" -->
|
|
<register>
|
|
<name>I2C_ISMK</name>
|
|
<description>7-bit Slave Address Mask Register</description>
|
|
<alternateGroup>I2C</alternateGroup>
|
|
<addressOffset>0x11</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x7F</resetValue>
|
|
<resetMask>0xFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "EN" -->
|
|
<field>
|
|
<name>EN</name>
|
|
<description>I2C interface operation enable bit</description>
|
|
<lsb>7</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "SM" -->
|
|
<field>
|
|
<name>SM</name>
|
|
<description>Slave address mask bits</description>
|
|
<lsb>0</lsb>
|
|
<msb>6</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "I2C_ISBA" -->
|
|
<register>
|
|
<name>I2C_ISBA</name>
|
|
<description>7-bit Slave Address Register</description>
|
|
<alternateGroup>I2C</alternateGroup>
|
|
<addressOffset>0x10</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0xFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "SAEN" -->
|
|
<field>
|
|
<name>SAEN</name>
|
|
<description>Slave address enable bit</description>
|
|
<lsb>7</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "SA" -->
|
|
<field>
|
|
<name>SA</name>
|
|
<description>7-bit slave address</description>
|
|
<lsb>0</lsb>
|
|
<msb>6</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "I2C_FCR1" -->
|
|
<register>
|
|
<name>I2C_FCR1</name>
|
|
<description>FIFO Control Register 1</description>
|
|
<alternateGroup>I2C</alternateGroup>
|
|
<addressOffset>0x15</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x04</resetValue>
|
|
<resetMask>0x1F</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "FLSTE" -->
|
|
<field>
|
|
<name>FLSTE</name>
|
|
<description>Re-transmission data lost detect enable bit</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "FRIIE" -->
|
|
<field>
|
|
<name>FRIIE</name>
|
|
<description>Received FIFO idle detection enable bit</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "FDRQ" -->
|
|
<field>
|
|
<name>FDRQ</name>
|
|
<description>Transmit FIFO data request bit</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "FTIE" -->
|
|
<field>
|
|
<name>FTIE</name>
|
|
<description>Transmit FIFO interrupt enable bit</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "FSEL" -->
|
|
<field>
|
|
<name>FSEL</name>
|
|
<description>FIFO select bit</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "I2C_FCR0" -->
|
|
<register>
|
|
<name>I2C_FCR0</name>
|
|
<description>FIFO Control Register 0</description>
|
|
<alternateGroup>I2C</alternateGroup>
|
|
<addressOffset>0x14</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0x7F</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "FLST" -->
|
|
<field>
|
|
<name>FLST</name>
|
|
<description>FIFO re-transmit data lost flag bit</description>
|
|
<lsb>6</lsb>
|
|
<msb>6</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "FLD" -->
|
|
<field>
|
|
<name>FLD</name>
|
|
<description>FIFO pointer reload bit</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "FSET" -->
|
|
<field>
|
|
<name>FSET</name>
|
|
<description>FIFO pointer save bit</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "FCL2" -->
|
|
<field>
|
|
<name>FCL2</name>
|
|
<description>FIFO2 reset bit</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "FCL1" -->
|
|
<field>
|
|
<name>FCL1</name>
|
|
<description>FIFO1 reset bit</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "FE2" -->
|
|
<field>
|
|
<name>FE2</name>
|
|
<description>FIFO2 operation enable bit</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "FE1" -->
|
|
<field>
|
|
<name>FE1</name>
|
|
<description>FIFO1 operation enable bit</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "I2C_FBYTE1" -->
|
|
<register>
|
|
<name>I2C_FBYTE1</name>
|
|
<description>FIFO Byte Register 1</description>
|
|
<alternateGroup>I2C</alternateGroup>
|
|
<addressOffset>0x18</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<resetMask>0xFFFF</resetMask>
|
|
</register>
|
|
<!-- REGISTER "I2C_FBYTE2" -->
|
|
<register>
|
|
<name>I2C_FBYTE2</name>
|
|
<description>FIFO Byte Register 2</description>
|
|
<alternateGroup>I2C</alternateGroup>
|
|
<addressOffset>0x19</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<resetMask>0xFFFF</resetMask>
|
|
</register>
|
|
<!-- REGISTER "I2C_NFCR" -->
|
|
<register>
|
|
<name>I2C_NFCR</name>
|
|
<description>Noise Filter Control Register</description>
|
|
<alternateGroup>I2C</alternateGroup>
|
|
<addressOffset>0x1C</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0x1F</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "NFT" -->
|
|
<field>
|
|
<name>NFT</name>
|
|
<description>Noise Filter Time Select bits</description>
|
|
<lsb>0</lsb>
|
|
<msb>4</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "I2C_EIBCR" -->
|
|
<register>
|
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<name>I2C_EIBCR</name>
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<description>Extension I2C Bus Control Register</description>
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<alternateGroup>I2C</alternateGroup>
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<addressOffset>0x1D</addressOffset>
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<size>8</size>
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<access>read-write</access>
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<resetValue>0x0C</resetValue>
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<resetMask>0x3F</resetMask>
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<!-- FIELDS -->
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<fields>
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<!-- FIELD "SDAS" -->
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<field>
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<name>SDAS</name>
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<description>SDA status bit</description>
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<lsb>5</lsb>
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<msb>5</msb>
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<access>read-only</access>
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</field>
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<!-- FIELD "SCLS" -->
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<field>
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<name>SCLS</name>
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<description>SCL status bit</description>
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<lsb>4</lsb>
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<msb>4</msb>
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<access>read-only</access>
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</field>
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<!-- FIELD "SDAC" -->
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<field>
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<name>SDAC</name>
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<description>SDA output control bit</description>
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<lsb>3</lsb>
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<msb>3</msb>
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<access>read-write</access>
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</field>
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<!-- FIELD "SCLC" -->
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<field>
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<name>SCLC</name>
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<description>SCL output control bit</description>
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<lsb>2</lsb>
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<msb>2</msb>
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<access>read-write</access>
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</field>
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<!-- FIELD "SOCE" -->
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<field>
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<name>SOCE</name>
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<description>Serial output enabled bit</description>
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<lsb>1</lsb>
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<msb>1</msb>
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<access>read-write</access>
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</field>
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<!-- FIELD "BEC" -->
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<field>
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<name>BEC</name>
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<description>Bus error control bit</description>
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<lsb>0</lsb>
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<msb>0</msb>
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<access>read-write</access>
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</field>
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</fields>
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</register>
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</registers>
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</peripheral>
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<!-- PERIPHERAL "MFS1" -->
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<peripheral derivedFrom="MFS0">
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<name>MFS1</name>
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<baseAddress>0x40038100</baseAddress>
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<!-- INTERRUPT "MFS1RX" -->
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<interrupt>
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<name>MFS1RX</name>
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<value>9</value>
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</interrupt>
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<!-- INTERRUPT "MFS1TX" -->
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<interrupt>
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<name>MFS1TX</name>
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<value>10</value>
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</interrupt>
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</peripheral>
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<!-- PERIPHERAL "MFS3" -->
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<peripheral derivedFrom="MFS0">
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<name>MFS3</name>
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<baseAddress>0x40038300</baseAddress>
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<!-- INTERRUPT "MFS3RX" -->
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<interrupt>
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<name>MFS3RX</name>
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<value>13</value>
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</interrupt>
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<!-- INTERRUPT "MFS3TX" -->
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<interrupt>
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<name>MFS3TX</name>
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<value>14</value>
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</interrupt>
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</peripheral>
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<!-- PERIPHERAL "CRC" -->
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<peripheral>
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<name>CRC</name>
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<description>CRC Registers</description>
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<groupName>CRC</groupName>
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<baseAddress>0x40039000</baseAddress>
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<!-- ADDRESS BLOCK -->
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<addressBlock>
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<offset>0x0</offset>
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<size>0x1</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x4</offset>
|
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<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
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<offset>0x8</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0xC</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
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<!-- REGISTERS -->
|
|
<registers>
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<!-- REGISTER "CRCCR" -->
|
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<register>
|
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<name>CRCCR</name>
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<description>CRC Control Register</description>
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<addressOffset>0x0</addressOffset>
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<size>8</size>
|
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<access>read-write</access>
|
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<resetValue>0x00</resetValue>
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<resetMask>0x7F</resetMask>
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<!-- FIELDS -->
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|
<fields>
|
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<!-- FIELD "FXOR" -->
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<field>
|
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<name>FXOR</name>
|
|
<description>Final XOR control bit</description>
|
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<lsb>6</lsb>
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<msb>6</msb>
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<access>read-write</access>
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</field>
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<!-- FIELD "CRCLSF" -->
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<field>
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|
<name>CRCLSF</name>
|
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<description>CRC result bit-order setting bit</description>
|
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<lsb>5</lsb>
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<msb>5</msb>
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<access>read-write</access>
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</field>
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<!-- FIELD "CRCLTE" -->
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|
<field>
|
|
<name>CRCLTE</name>
|
|
<description>CRC result byte-order setting bit</description>
|
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<lsb>4</lsb>
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<msb>4</msb>
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<access>read-write</access>
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</field>
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<!-- FIELD "LSBFST" -->
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<field>
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<name>LSBFST</name>
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<description>Bit-order setting bit</description>
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<lsb>3</lsb>
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<msb>3</msb>
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<access>read-write</access>
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</field>
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<!-- FIELD "LTLEND" -->
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|
<field>
|
|
<name>LTLEND</name>
|
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<description>Byte-order setting bit</description>
|
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<lsb>2</lsb>
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<msb>2</msb>
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<access>read-write</access>
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</field>
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<!-- FIELD "CRC32" -->
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<field>
|
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<name>CRC32</name>
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<description>CRC mode selection bit</description>
|
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<lsb>1</lsb>
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<msb>1</msb>
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<access>read-write</access>
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</field>
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<!-- FIELD "INIT" -->
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<field>
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<name>INIT</name>
|
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<description>Initialization bit</description>
|
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<lsb>0</lsb>
|
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<msb>0</msb>
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<access>read-write</access>
|
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</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "CRCINIT" -->
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|
<register>
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<name>CRCINIT</name>
|
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<description>Initial Value Register</description>
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<addressOffset>0x4</addressOffset>
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|
<size>32</size>
|
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<access>read-write</access>
|
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<resetValue>0xFFFFFFFF</resetValue>
|
|
<resetMask>0xFFFFFFFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "D" -->
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|
<field>
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|
<name>D</name>
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<description>Initial value bits</description>
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<lsb>0</lsb>
|
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<msb>31</msb>
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<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
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<!-- REGISTER "CRCIN" -->
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|
<register>
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|
<name>CRCIN</name>
|
|
<description>Input Data Register</description>
|
|
<addressOffset>0x8</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0xFFFFFFFF</resetMask>
|
|
<!-- FIELDS -->
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|
<fields>
|
|
<!-- FIELD "D" -->
|
|
<field>
|
|
<name>D</name>
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<description>Input data bits</description>
|
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<lsb>0</lsb>
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<msb>31</msb>
|
|
<access>read-write</access>
|
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</field>
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</fields>
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|
</register>
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<!-- REGISTER "CRCR" -->
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|
<register>
|
|
<name>CRCR</name>
|
|
<description>CRC Register</description>
|
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<addressOffset>0xC</addressOffset>
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<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0xFFFFFFFF</resetValue>
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|
<resetMask>0xFFFFFFFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
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<!-- FIELD "D" -->
|
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<field>
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<name>D</name>
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<description>CRC bits</description>
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<lsb>0</lsb>
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<msb>31</msb>
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<access>read-only</access>
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</field>
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</fields>
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</register>
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</registers>
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</peripheral>
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<!-- PERIPHERAL "WC" -->
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|
<peripheral>
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<name>WC</name>
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<description>Watch Counter</description>
|
|
<groupName>WC</groupName>
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|
<baseAddress>0x4003A000</baseAddress>
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|
<!-- ADDRESS BLOCK -->
|
|
<addressBlock>
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<offset>0x0</offset>
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|
<size>0x3</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x10</offset>
|
|
<size>0x2</size>
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|
<usage>registers</usage>
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|
</addressBlock>
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|
<addressBlock>
|
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<offset>0x14</offset>
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|
<size>0x1</size>
|
|
<usage>registers</usage>
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|
</addressBlock>
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<!-- INTERRUPT "OSC_PLL_WC_RTC" -->
|
|
<interrupt>
|
|
<name>OSC_PLL_WC_RTC</name>
|
|
<value>24</value>
|
|
</interrupt>
|
|
<!-- REGISTERS -->
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<registers>
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<!-- REGISTER "WCRD" -->
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|
<register>
|
|
<name>WCRD</name>
|
|
<description>Watch Counter Read Register</description>
|
|
<addressOffset>0x0</addressOffset>
|
|
<size>8</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0x3F</resetMask>
|
|
<!-- FIELDS -->
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|
<fields>
|
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<!-- FIELD "CTR" -->
|
|
<field>
|
|
<name>CTR</name>
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|
<description>Counter read bits</description>
|
|
<lsb>0</lsb>
|
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<msb>5</msb>
|
|
<access>read-only</access>
|
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</field>
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</fields>
|
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</register>
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<!-- REGISTER "WCRL" -->
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<register>
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<name>WCRL</name>
|
|
<description>Watch Counter Reload Register</description>
|
|
<addressOffset>0x1</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0x3F</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "RLC" -->
|
|
<field>
|
|
<name>RLC</name>
|
|
<description>Counter reload value setting bits</description>
|
|
<lsb>0</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
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<!-- REGISTER "WCCR" -->
|
|
<register>
|
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<name>WCCR</name>
|
|
<description>Watch Counter Control Register</description>
|
|
<addressOffset>0x2</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0xCF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "WCEN" -->
|
|
<field>
|
|
<name>WCEN</name>
|
|
<description>Watch counter operation enable bit</description>
|
|
<lsb>7</lsb>
|
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<msb>7</msb>
|
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<access>read-write</access>
|
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</field>
|
|
<!-- FIELD "WCOP" -->
|
|
<field>
|
|
<name>WCOP</name>
|
|
<description>Watch counter operating state flag</description>
|
|
<lsb>6</lsb>
|
|
<msb>6</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "CS" -->
|
|
<field>
|
|
<name>CS</name>
|
|
<description>Count clock select bits</description>
|
|
<lsb>2</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "WCIE" -->
|
|
<field>
|
|
<name>WCIE</name>
|
|
<description>Interrupt request enable bit</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "WCIF" -->
|
|
<field>
|
|
<name>WCIF</name>
|
|
<description>Interrupt request flag bit</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "CLK_SEL" -->
|
|
<register>
|
|
<name>CLK_SEL</name>
|
|
<description>Clock Selection Register</description>
|
|
<addressOffset>0x10</addressOffset>
|
|
<size>16</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<resetMask>0x0703</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "SEL_OUT" -->
|
|
<field>
|
|
<name>SEL_OUT</name>
|
|
<description>Output clock selection bit</description>
|
|
<lsb>8</lsb>
|
|
<msb>10</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "SEL_IN" -->
|
|
<field>
|
|
<name>SEL_IN</name>
|
|
<description>Input clock selection bit</description>
|
|
<lsb>0</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "CLK_EN" -->
|
|
<register>
|
|
<name>CLK_EN</name>
|
|
<description>Division Clock Enable Register</description>
|
|
<addressOffset>0x14</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0x03</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "CLK_EN_R" -->
|
|
<field>
|
|
<name>CLK_EN_R</name>
|
|
<description>Division clock enable read bit</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "CLK_EN" -->
|
|
<field>
|
|
<name>CLK_EN</name>
|
|
<description>Division clock enable bit</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral>
|
|
<!-- PERIPHERAL "RTC" -->
|
|
<peripheral>
|
|
<name>RTC</name>
|
|
<description>REAL-TIME CLOCK</description>
|
|
<groupName>RTC</groupName>
|
|
<baseAddress>0x4003B000</baseAddress>
|
|
<!-- ADDRESS BLOCK -->
|
|
<addressBlock>
|
|
<offset>0x0</offset>
|
|
<size>0x13</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x15</offset>
|
|
<size>0x3</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x19</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x1C</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x20</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x24</offset>
|
|
<size>0x3</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x28</offset>
|
|
<size>0x2</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x2C</offset>
|
|
<size>0x1</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x30</offset>
|
|
<size>0x1</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<!-- INTERRUPT "OSC_PLL_WC_RTC" -->
|
|
<interrupt>
|
|
<name>OSC_PLL_WC_RTC</name>
|
|
<value>24</value>
|
|
</interrupt>
|
|
<!-- REGISTERS -->
|
|
<registers>
|
|
<!-- REGISTER "WTCR1" -->
|
|
<register>
|
|
<name>WTCR1</name>
|
|
<description>Control Register 1</description>
|
|
<addressOffset>0x0</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0xFFFF1F7D</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "INTCRIE" -->
|
|
<field>
|
|
<name>INTCRIE</name>
|
|
<description>Year/month/date/hour/minute/second/day of the week counter value read completion interrupt enable bit</description>
|
|
<lsb>31</lsb>
|
|
<msb>31</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "INTERIE" -->
|
|
<field>
|
|
<name>INTERIE</name>
|
|
<description>Time rewrite error interrupt enable bit</description>
|
|
<lsb>30</lsb>
|
|
<msb>30</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "INTALIE" -->
|
|
<field>
|
|
<name>INTALIE</name>
|
|
<description>Alarm interrupt enable bit</description>
|
|
<lsb>29</lsb>
|
|
<msb>29</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "INTTMIE" -->
|
|
<field>
|
|
<name>INTTMIE</name>
|
|
<description>Timer interrupt enable bit</description>
|
|
<lsb>28</lsb>
|
|
<msb>28</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "INTHIE" -->
|
|
<field>
|
|
<name>INTHIE</name>
|
|
<description>1-hour interrupt enable bit</description>
|
|
<lsb>27</lsb>
|
|
<msb>27</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "INTMIE" -->
|
|
<field>
|
|
<name>INTMIE</name>
|
|
<description>1-minute interrupt enable bit</description>
|
|
<lsb>26</lsb>
|
|
<msb>26</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "INTSIE" -->
|
|
<field>
|
|
<name>INTSIE</name>
|
|
<description>1-second interrupt enable bit</description>
|
|
<lsb>25</lsb>
|
|
<msb>25</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "INTSSIE" -->
|
|
<field>
|
|
<name>INTSSIE</name>
|
|
<description>0.5-second interrupt enable bit</description>
|
|
<lsb>24</lsb>
|
|
<msb>24</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "INTCRI" -->
|
|
<field>
|
|
<name>INTCRI</name>
|
|
<description>Year/month/date/hour/minute/second/day of the week counter value read completion interrupt flag bit</description>
|
|
<lsb>23</lsb>
|
|
<msb>23</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "INTERI" -->
|
|
<field>
|
|
<name>INTERI</name>
|
|
<description>Time rewrite error interrupt flag bit</description>
|
|
<lsb>22</lsb>
|
|
<msb>22</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "INTALI" -->
|
|
<field>
|
|
<name>INTALI</name>
|
|
<description>Alarm interrupt flag bit</description>
|
|
<lsb>21</lsb>
|
|
<msb>21</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "INTTMI" -->
|
|
<field>
|
|
<name>INTTMI</name>
|
|
<description>Timer interrupt flag bit</description>
|
|
<lsb>20</lsb>
|
|
<msb>20</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "INTHI" -->
|
|
<field>
|
|
<name>INTHI</name>
|
|
<description>1-hour interrupt flag bit</description>
|
|
<lsb>19</lsb>
|
|
<msb>19</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "INTMI" -->
|
|
<field>
|
|
<name>INTMI</name>
|
|
<description>1-minute interrupt flag bit</description>
|
|
<lsb>18</lsb>
|
|
<msb>18</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "INTSI" -->
|
|
<field>
|
|
<name>INTSI</name>
|
|
<description>1-second interrupt flag bit</description>
|
|
<lsb>17</lsb>
|
|
<msb>17</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "INTSSI" -->
|
|
<field>
|
|
<name>INTSSI</name>
|
|
<description>0.5-second interrupt flag bit</description>
|
|
<lsb>16</lsb>
|
|
<msb>16</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "YEN" -->
|
|
<field>
|
|
<name>YEN</name>
|
|
<description>Alarm year register enable bit</description>
|
|
<lsb>12</lsb>
|
|
<msb>12</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "MOEN" -->
|
|
<field>
|
|
<name>MOEN</name>
|
|
<description>Alarm month register enable bit</description>
|
|
<lsb>11</lsb>
|
|
<msb>11</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "DEN" -->
|
|
<field>
|
|
<name>DEN</name>
|
|
<description>Alarm date register enable bit</description>
|
|
<lsb>10</lsb>
|
|
<msb>10</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "HEN" -->
|
|
<field>
|
|
<name>HEN</name>
|
|
<description>Alarm hour register enable bit</description>
|
|
<lsb>9</lsb>
|
|
<msb>9</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "MIEN" -->
|
|
<field>
|
|
<name>MIEN</name>
|
|
<description>Alarm minute register enable bit</description>
|
|
<lsb>8</lsb>
|
|
<msb>8</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "BUSY" -->
|
|
<field>
|
|
<name>BUSY</name>
|
|
<description>Busy bit</description>
|
|
<lsb>6</lsb>
|
|
<msb>6</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "SCRST" -->
|
|
<field>
|
|
<name>SCRST</name>
|
|
<description>Sub second generation/1-second generation counter reset bit</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "SCST" -->
|
|
<field>
|
|
<name>SCST</name>
|
|
<description>1-second clock output stop bit</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "SRST" -->
|
|
<field>
|
|
<name>SRST</name>
|
|
<description>RTC reset bit</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "RUN" -->
|
|
<field>
|
|
<name>RUN</name>
|
|
<description>RTC count block operation bit</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "ST" -->
|
|
<field>
|
|
<name>ST</name>
|
|
<description>Start bit</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "WTCR2" -->
|
|
<register>
|
|
<name>WTCR2</name>
|
|
<description>Control Register 2</description>
|
|
<addressOffset>0x4</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000701</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "TMRUN" -->
|
|
<field>
|
|
<name>TMRUN</name>
|
|
<description>Timer counter operation bit</description>
|
|
<lsb>10</lsb>
|
|
<msb>10</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "TMEN" -->
|
|
<field>
|
|
<name>TMEN</name>
|
|
<description>Timer counter control bit</description>
|
|
<lsb>9</lsb>
|
|
<msb>9</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TMST" -->
|
|
<field>
|
|
<name>TMST</name>
|
|
<description>Timer counter start bit</description>
|
|
<lsb>8</lsb>
|
|
<msb>8</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "CREAD" -->
|
|
<field>
|
|
<name>CREAD</name>
|
|
<description>Year/month/date/hour/minute/second/day of the week counter value read control bit</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "WTBR" -->
|
|
<register>
|
|
<name>WTBR</name>
|
|
<description>Counter Cycle Setting Register</description>
|
|
<addressOffset>0x8</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00FFFFFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "BR23" -->
|
|
<field>
|
|
<name>BR23</name>
|
|
<description>Bit23 of WTBR</description>
|
|
<lsb>23</lsb>
|
|
<msb>23</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "BR22" -->
|
|
<field>
|
|
<name>BR22</name>
|
|
<description>Bit22 of WTBR</description>
|
|
<lsb>22</lsb>
|
|
<msb>22</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "BR21" -->
|
|
<field>
|
|
<name>BR21</name>
|
|
<description>Bit21 of WTBR</description>
|
|
<lsb>21</lsb>
|
|
<msb>21</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "BR20" -->
|
|
<field>
|
|
<name>BR20</name>
|
|
<description>Bit20 of WTBR</description>
|
|
<lsb>20</lsb>
|
|
<msb>20</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "BR19" -->
|
|
<field>
|
|
<name>BR19</name>
|
|
<description>Bit19 of WTBR</description>
|
|
<lsb>19</lsb>
|
|
<msb>19</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "BR18" -->
|
|
<field>
|
|
<name>BR18</name>
|
|
<description>Bit18 of WTBR</description>
|
|
<lsb>18</lsb>
|
|
<msb>18</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "BR17" -->
|
|
<field>
|
|
<name>BR17</name>
|
|
<description>Bit17 of WTBR</description>
|
|
<lsb>17</lsb>
|
|
<msb>17</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "BR16" -->
|
|
<field>
|
|
<name>BR16</name>
|
|
<description>Bit16 of WTBR</description>
|
|
<lsb>16</lsb>
|
|
<msb>16</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "BR15" -->
|
|
<field>
|
|
<name>BR15</name>
|
|
<description>Bit15 of WTBR</description>
|
|
<lsb>15</lsb>
|
|
<msb>15</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "BR14" -->
|
|
<field>
|
|
<name>BR14</name>
|
|
<description>Bit14 of WTBR</description>
|
|
<lsb>14</lsb>
|
|
<msb>14</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "BR13" -->
|
|
<field>
|
|
<name>BR13</name>
|
|
<description>Bit13 of WTBR</description>
|
|
<lsb>13</lsb>
|
|
<msb>13</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "BR12" -->
|
|
<field>
|
|
<name>BR12</name>
|
|
<description>Bit12 of WTBR</description>
|
|
<lsb>12</lsb>
|
|
<msb>12</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "BR11" -->
|
|
<field>
|
|
<name>BR11</name>
|
|
<description>Bit11 of WTBR</description>
|
|
<lsb>11</lsb>
|
|
<msb>11</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "BR10" -->
|
|
<field>
|
|
<name>BR10</name>
|
|
<description>Bit10 of WTBR</description>
|
|
<lsb>10</lsb>
|
|
<msb>10</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "BR9" -->
|
|
<field>
|
|
<name>BR9</name>
|
|
<description>Bit9 of WTBR</description>
|
|
<lsb>9</lsb>
|
|
<msb>9</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "BR8" -->
|
|
<field>
|
|
<name>BR8</name>
|
|
<description>Bit8 of WTBR</description>
|
|
<lsb>8</lsb>
|
|
<msb>8</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "BR7" -->
|
|
<field>
|
|
<name>BR7</name>
|
|
<description>Bit7 of WTBR</description>
|
|
<lsb>7</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "BR6" -->
|
|
<field>
|
|
<name>BR6</name>
|
|
<description>Bit6 of WTBR</description>
|
|
<lsb>6</lsb>
|
|
<msb>6</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "BR5" -->
|
|
<field>
|
|
<name>BR5</name>
|
|
<description>Bit5 of WTBR</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "BR4" -->
|
|
<field>
|
|
<name>BR4</name>
|
|
<description>Bit4 of WTBR</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "BR3" -->
|
|
<field>
|
|
<name>BR3</name>
|
|
<description>Bit3 of WTBR</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "BR2" -->
|
|
<field>
|
|
<name>BR2</name>
|
|
<description>Bit2 of WTBR</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "BR1" -->
|
|
<field>
|
|
<name>BR1</name>
|
|
<description>Bit1 of WTBR</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "BR0" -->
|
|
<field>
|
|
<name>BR0</name>
|
|
<description>Bit0 of WTBR</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "WTDR" -->
|
|
<register>
|
|
<name>WTDR</name>
|
|
<description>Date Register</description>
|
|
<addressOffset>0xF</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0x3F</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "TD" -->
|
|
<field>
|
|
<name>TD</name>
|
|
<description>The second digit of the date</description>
|
|
<lsb>4</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "D" -->
|
|
<field>
|
|
<name>D</name>
|
|
<description>The first digit of the date</description>
|
|
<lsb>0</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "WTHR" -->
|
|
<register>
|
|
<name>WTHR</name>
|
|
<description>Hour register</description>
|
|
<addressOffset>0xE</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0x3F</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "TH" -->
|
|
<field>
|
|
<name>TH</name>
|
|
<description>The second digit of the hour</description>
|
|
<lsb>4</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "H" -->
|
|
<field>
|
|
<name>H</name>
|
|
<description>The first digit of the hour</description>
|
|
<lsb>0</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "WTMIR" -->
|
|
<register>
|
|
<name>WTMIR</name>
|
|
<description>Minute Register</description>
|
|
<addressOffset>0xD</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0x7F</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "TMI" -->
|
|
<field>
|
|
<name>TMI</name>
|
|
<description>The second digit of the minute</description>
|
|
<lsb>4</lsb>
|
|
<msb>6</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "MI" -->
|
|
<field>
|
|
<name>MI</name>
|
|
<description>The first digit of the minute</description>
|
|
<lsb>0</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "WTSR" -->
|
|
<register>
|
|
<name>WTSR</name>
|
|
<description>Second Register</description>
|
|
<addressOffset>0xC</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0x7F</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "TS" -->
|
|
<field>
|
|
<name>TS</name>
|
|
<description>The second digit of the second</description>
|
|
<lsb>4</lsb>
|
|
<msb>6</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "S" -->
|
|
<field>
|
|
<name>S</name>
|
|
<description>The first digit of the second</description>
|
|
<lsb>0</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "WTYR" -->
|
|
<register>
|
|
<name>WTYR</name>
|
|
<description>Year Register</description>
|
|
<addressOffset>0x12</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0xFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "TY" -->
|
|
<field>
|
|
<name>TY</name>
|
|
<description>The second digit of the year</description>
|
|
<lsb>4</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "Y" -->
|
|
<field>
|
|
<name>Y</name>
|
|
<description>The first digit of the year</description>
|
|
<lsb>0</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "WTMOR" -->
|
|
<register>
|
|
<name>WTMOR</name>
|
|
<description>Month Register</description>
|
|
<addressOffset>0x11</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0x1F</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "TMO0" -->
|
|
<field>
|
|
<name>TMO0</name>
|
|
<description>The second digit in the month</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "MO" -->
|
|
<field>
|
|
<name>MO</name>
|
|
<description>The first digit of the month</description>
|
|
<lsb>0</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "WTDW" -->
|
|
<register>
|
|
<name>WTDW</name>
|
|
<description>Day of the Week Register</description>
|
|
<addressOffset>0x10</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0x07</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "DW" -->
|
|
<field>
|
|
<name>DW</name>
|
|
<description>Day of the week</description>
|
|
<lsb>0</lsb>
|
|
<msb>2</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "ALDR" -->
|
|
<register>
|
|
<name>ALDR</name>
|
|
<description>Alarm Date Register</description>
|
|
<addressOffset>0x17</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0x3F</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "TAD" -->
|
|
<field>
|
|
<name>TAD</name>
|
|
<description>The second digit of the alarm-set date</description>
|
|
<lsb>4</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "AD" -->
|
|
<field>
|
|
<name>AD</name>
|
|
<description>The first digit of the alarm-set date</description>
|
|
<lsb>0</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "ALHR" -->
|
|
<register>
|
|
<name>ALHR</name>
|
|
<description>Alarm Hour Register</description>
|
|
<addressOffset>0x16</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0x3F</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "TAH" -->
|
|
<field>
|
|
<name>TAH</name>
|
|
<description>The second digit of the alarm-set hour</description>
|
|
<lsb>4</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "AH" -->
|
|
<field>
|
|
<name>AH</name>
|
|
<description>The first digit of the alarm-set hour</description>
|
|
<lsb>0</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "ALMIR" -->
|
|
<register>
|
|
<name>ALMIR</name>
|
|
<description>Alarm Minute Register</description>
|
|
<addressOffset>0x15</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0x7F</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "TAMI" -->
|
|
<field>
|
|
<name>TAMI</name>
|
|
<description>The second digit of the alarm-set minute</description>
|
|
<lsb>4</lsb>
|
|
<msb>6</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "AMI" -->
|
|
<field>
|
|
<name>AMI</name>
|
|
<description>The first digit of the alarm-set minute</description>
|
|
<lsb>0</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "ALYR" -->
|
|
<register>
|
|
<name>ALYR</name>
|
|
<description>Alarm Years Register</description>
|
|
<addressOffset>0x1A</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0xFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "TAY" -->
|
|
<field>
|
|
<name>TAY</name>
|
|
<description>The second digit of the alarm-set year</description>
|
|
<lsb>4</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "AY" -->
|
|
<field>
|
|
<name>AY</name>
|
|
<description>The first digit of the alarm-set year</description>
|
|
<lsb>0</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "ALMOR" -->
|
|
<register>
|
|
<name>ALMOR</name>
|
|
<description>Alarm Month Register</description>
|
|
<addressOffset>0x19</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0x1F</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "TAMO0" -->
|
|
<field>
|
|
<name>TAMO0</name>
|
|
<description>The second digit of the alarm-set month</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "AMO" -->
|
|
<field>
|
|
<name>AMO</name>
|
|
<description>The first digit of the alarm-set month</description>
|
|
<lsb>0</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "WTTR" -->
|
|
<register>
|
|
<name>WTTR</name>
|
|
<description>Timer Setting Register</description>
|
|
<addressOffset>0x1C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0003FFFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "TM" -->
|
|
<field>
|
|
<name>TM</name>
|
|
<description>Timer setting register</description>
|
|
<lsb>0</lsb>
|
|
<msb>17</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "WTCLKS" -->
|
|
<register>
|
|
<name>WTCLKS</name>
|
|
<description>Clock Selection Register</description>
|
|
<addressOffset>0x20</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0x01</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "WTCLKS" -->
|
|
<field>
|
|
<name>WTCLKS</name>
|
|
<description>Input clock selection bit</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "WTCLKM" -->
|
|
<register>
|
|
<name>WTCLKM</name>
|
|
<description>Selection Clock Status Register</description>
|
|
<addressOffset>0x21</addressOffset>
|
|
<size>8</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0x03</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "WTCLKM" -->
|
|
<field>
|
|
<name>WTCLKM</name>
|
|
<description>Clock selection status bits</description>
|
|
<lsb>0</lsb>
|
|
<msb>1</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "WTCAL" -->
|
|
<register>
|
|
<name>WTCAL</name>
|
|
<description>Frequency Correction Value Setting Register</description>
|
|
<addressOffset>0x24</addressOffset>
|
|
<size>16</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<resetMask>0x03FF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "WTCAL" -->
|
|
<field>
|
|
<name>WTCAL</name>
|
|
<description>Frequency correction value setting bits</description>
|
|
<lsb>0</lsb>
|
|
<msb>9</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "WTCALEN" -->
|
|
<register>
|
|
<name>WTCALEN</name>
|
|
<description>Frequency Correction Enable Register</description>
|
|
<addressOffset>0x26</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0x01</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "WTCALEN" -->
|
|
<field>
|
|
<name>WTCALEN</name>
|
|
<description>Frequency correction enable bit</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "WTDIV" -->
|
|
<register>
|
|
<name>WTDIV</name>
|
|
<description>Divider Ratio Setting Register</description>
|
|
<addressOffset>0x28</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0x0F</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "WTDIV" -->
|
|
<field>
|
|
<name>WTDIV</name>
|
|
<description>Divider ratio setting bits</description>
|
|
<lsb>0</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "WTDIVEN" -->
|
|
<register>
|
|
<name>WTDIVEN</name>
|
|
<description>Divider Output Enable Register</description>
|
|
<addressOffset>0x29</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0x03</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "WTDIVRDY" -->
|
|
<field>
|
|
<name>WTDIVRDY</name>
|
|
<description>Divider status bit</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "WTDIVEN" -->
|
|
<field>
|
|
<name>WTDIVEN</name>
|
|
<description>Divider enable bit</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "WTCALPRD" -->
|
|
<register>
|
|
<name>WTCALPRD</name>
|
|
<description>Frequency Correction Cycle Setting Register</description>
|
|
<addressOffset>0x2C</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x13</resetValue>
|
|
<resetMask>0x3F</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "WTCALPRD" -->
|
|
<field>
|
|
<name>WTCALPRD</name>
|
|
<description>Frequency correction value setting bits</description>
|
|
<lsb>0</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "WTCOSEL" -->
|
|
<register>
|
|
<name>WTCOSEL</name>
|
|
<description>RTCCO Output Selection Register</description>
|
|
<addressOffset>0x30</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0x01</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "WTCOSEL" -->
|
|
<field>
|
|
<name>WTCOSEL</name>
|
|
<description>RTCCO output selection bit</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral>
|
|
<!-- PERIPHERAL "LSCRP" -->
|
|
<peripheral>
|
|
<name>LSCRP</name>
|
|
<description>Low-speed CR Prescaler Register</description>
|
|
<groupName>LSCRP</groupName>
|
|
<baseAddress>0x4003C000</baseAddress>
|
|
<!-- ADDRESS BLOCK -->
|
|
<addressBlock>
|
|
<offset>0x0</offset>
|
|
<size>0x1</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<!-- REGISTERS -->
|
|
<registers>
|
|
<!-- REGISTER "LCR_PRSLD" -->
|
|
<register>
|
|
<name>LCR_PRSLD</name>
|
|
<description>Low-speed CR Prescaler Control Register</description>
|
|
<addressOffset>0x0</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0x3F</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "LCR_PRSLD" -->
|
|
<field>
|
|
<name>LCR_PRSLD</name>
|
|
<description>Low-speed CR Prescaler Load</description>
|
|
<lsb>0</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral>
|
|
<!-- PERIPHERAL "PCG" -->
|
|
<peripheral>
|
|
<name>PCG</name>
|
|
<description>Peripheral Clock Gating Registers</description>
|
|
<groupName>PCG</groupName>
|
|
<baseAddress>0x4003C100</baseAddress>
|
|
<!-- ADDRESS BLOCK -->
|
|
<addressBlock>
|
|
<offset>0x0</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x4</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x10</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x14</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x20</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x24</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<!-- REGISTERS -->
|
|
<registers>
|
|
<!-- REGISTER "CKEN0" -->
|
|
<register>
|
|
<name>CKEN0</name>
|
|
<description>Peripheral Function Clock Control Register 0</description>
|
|
<addressOffset>0x0</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x110FFFFF</resetValue>
|
|
<resetMask>0x110FFFFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "GIOCK" -->
|
|
<field>
|
|
<name>GIOCK</name>
|
|
<description>Software clock control of GPIO/Fast GPIO function</description>
|
|
<lsb>28</lsb>
|
|
<msb>28</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "DMACK" -->
|
|
<field>
|
|
<name>DMACK</name>
|
|
<description>Supplying and gating settings of DMAC operation clock</description>
|
|
<lsb>24</lsb>
|
|
<msb>24</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "ADCCK3" -->
|
|
<field>
|
|
<name>ADCCK3</name>
|
|
<description>Settings for operation clock supplying and gating to A/D converter unit 3</description>
|
|
<lsb>19</lsb>
|
|
<msb>19</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "ADCCK2" -->
|
|
<field>
|
|
<name>ADCCK2</name>
|
|
<description>Settings for operation clock supplying and gating to A/D converter unit 2</description>
|
|
<lsb>18</lsb>
|
|
<msb>18</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "ADCCK1" -->
|
|
<field>
|
|
<name>ADCCK1</name>
|
|
<description>Settings for operation clock supplying and gating to A/D converter unit 1</description>
|
|
<lsb>17</lsb>
|
|
<msb>17</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "ADCCK0" -->
|
|
<field>
|
|
<name>ADCCK0</name>
|
|
<description>Settings for operation clock supplying and gating to A/D converter unit 0</description>
|
|
<lsb>16</lsb>
|
|
<msb>16</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "MFSCK15" -->
|
|
<field>
|
|
<name>MFSCK15</name>
|
|
<description>Settings for operation clock supply and gating to multi-function serial interface ch.15</description>
|
|
<lsb>15</lsb>
|
|
<msb>15</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "MFSCK14" -->
|
|
<field>
|
|
<name>MFSCK14</name>
|
|
<description>Settings for operation clock supply and gating to multi-function serial interface ch.14</description>
|
|
<lsb>14</lsb>
|
|
<msb>14</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "MFSCK13" -->
|
|
<field>
|
|
<name>MFSCK13</name>
|
|
<description>Settings for operation clock supply and gating to multi-function serial interface ch.13</description>
|
|
<lsb>13</lsb>
|
|
<msb>13</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "MFSCK12" -->
|
|
<field>
|
|
<name>MFSCK12</name>
|
|
<description>Settings for operation clock supply and gating to multi-function serial interface ch.12</description>
|
|
<lsb>12</lsb>
|
|
<msb>12</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "MFSCK11" -->
|
|
<field>
|
|
<name>MFSCK11</name>
|
|
<description>Settings for operation clock supply and gating to multi-function serial interface ch.11</description>
|
|
<lsb>11</lsb>
|
|
<msb>11</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "MFSCK10" -->
|
|
<field>
|
|
<name>MFSCK10</name>
|
|
<description>Settings for operation clock supply and gating to multi-function serial interface ch.10</description>
|
|
<lsb>10</lsb>
|
|
<msb>10</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "MFSCK9" -->
|
|
<field>
|
|
<name>MFSCK9</name>
|
|
<description>Settings for operation clock supply and gating to multi-function serial interface ch.9</description>
|
|
<lsb>9</lsb>
|
|
<msb>9</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "MFSCK8" -->
|
|
<field>
|
|
<name>MFSCK8</name>
|
|
<description>Settings for operation clock supply and gating to multi-function serial interface ch.8</description>
|
|
<lsb>8</lsb>
|
|
<msb>8</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "MFSCK7" -->
|
|
<field>
|
|
<name>MFSCK7</name>
|
|
<description>Settings for operation clock supply and gating to multi-function serial interface ch.7</description>
|
|
<lsb>7</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "MFSCK6" -->
|
|
<field>
|
|
<name>MFSCK6</name>
|
|
<description>Settings for operation clock supply and gating to multi-function serial interface ch.6</description>
|
|
<lsb>6</lsb>
|
|
<msb>6</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "MFSCK5" -->
|
|
<field>
|
|
<name>MFSCK5</name>
|
|
<description>Settings for operation clock supply and gating to multi-function serial interface ch.5</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "MFSCK4" -->
|
|
<field>
|
|
<name>MFSCK4</name>
|
|
<description>Settings for operation clock supply and gating to multi-function serial interface ch.4</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "MFSCK3" -->
|
|
<field>
|
|
<name>MFSCK3</name>
|
|
<description>Settings for operation clock supply and gating to multi-function serial interface ch.3</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "MFSCK2" -->
|
|
<field>
|
|
<name>MFSCK2</name>
|
|
<description>Settings for operation clock supply and gating to multi-function serial interface ch.2</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "MFSCK1" -->
|
|
<field>
|
|
<name>MFSCK1</name>
|
|
<description>Settings for operation clock supply and gating to multi-function serial interface ch.1</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "MFSCK0" -->
|
|
<field>
|
|
<name>MFSCK0</name>
|
|
<description>Settings for operation clock supply and gating to multi-function serial interface ch.0</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "MRST0" -->
|
|
<register>
|
|
<name>MRST0</name>
|
|
<description>Peripheral Function Reset Control Register 0</description>
|
|
<addressOffset>0x4</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x010FFFFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "DMARST" -->
|
|
<field>
|
|
<name>DMARST</name>
|
|
<description>Reset control of DMAC</description>
|
|
<lsb>24</lsb>
|
|
<msb>24</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "ADCRST3" -->
|
|
<field>
|
|
<name>ADCRST3</name>
|
|
<description>Reset control of A/D converter unit 3</description>
|
|
<lsb>19</lsb>
|
|
<msb>19</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "ADCRST2" -->
|
|
<field>
|
|
<name>ADCRST2</name>
|
|
<description>Reset control of A/D converter unit 2</description>
|
|
<lsb>18</lsb>
|
|
<msb>18</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "ADCRST1" -->
|
|
<field>
|
|
<name>ADCRST1</name>
|
|
<description>Reset control of A/D converter unit 1</description>
|
|
<lsb>17</lsb>
|
|
<msb>17</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "ADCRST0" -->
|
|
<field>
|
|
<name>ADCRST0</name>
|
|
<description>Reset control of A/D converter unit 0</description>
|
|
<lsb>16</lsb>
|
|
<msb>16</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "MFSRST15" -->
|
|
<field>
|
|
<name>MFSRST15</name>
|
|
<description>Control of software reset of multi-function serial interface ch.15</description>
|
|
<lsb>15</lsb>
|
|
<msb>15</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "MFSRST14" -->
|
|
<field>
|
|
<name>MFSRST14</name>
|
|
<description>Control of software reset of multi-function serial interface ch.14</description>
|
|
<lsb>14</lsb>
|
|
<msb>14</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "MFSRST13" -->
|
|
<field>
|
|
<name>MFSRST13</name>
|
|
<description>Control of software reset of multi-function serial interface ch.13</description>
|
|
<lsb>13</lsb>
|
|
<msb>13</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "MFSRST12" -->
|
|
<field>
|
|
<name>MFSRST12</name>
|
|
<description>Control of software reset of multi-function serial interface ch.12</description>
|
|
<lsb>12</lsb>
|
|
<msb>12</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "MFSRST11" -->
|
|
<field>
|
|
<name>MFSRST11</name>
|
|
<description>Control of software reset of multi-function serial interface ch.11</description>
|
|
<lsb>11</lsb>
|
|
<msb>11</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "MFSRST10" -->
|
|
<field>
|
|
<name>MFSRST10</name>
|
|
<description>Control of software reset of multi-function serial interface ch.10</description>
|
|
<lsb>10</lsb>
|
|
<msb>10</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "MFSRST9" -->
|
|
<field>
|
|
<name>MFSRST9</name>
|
|
<description>Control of software reset of multi-function serial interface ch.9</description>
|
|
<lsb>9</lsb>
|
|
<msb>9</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "MFSRST8" -->
|
|
<field>
|
|
<name>MFSRST8</name>
|
|
<description>Control of software reset of multi-function serial interface ch.8</description>
|
|
<lsb>8</lsb>
|
|
<msb>8</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "MFSRST7" -->
|
|
<field>
|
|
<name>MFSRST7</name>
|
|
<description>Control of software reset of multi-function serial interface ch.7</description>
|
|
<lsb>7</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "MFSRST6" -->
|
|
<field>
|
|
<name>MFSRST6</name>
|
|
<description>Control of software reset of multi-function serial interface ch.6</description>
|
|
<lsb>6</lsb>
|
|
<msb>6</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "MFSRST5" -->
|
|
<field>
|
|
<name>MFSRST5</name>
|
|
<description>Control of software reset of multi-function serial interface ch.5</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "MFSRST4" -->
|
|
<field>
|
|
<name>MFSRST4</name>
|
|
<description>Control of software reset of multi-function serial interface ch.4</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "MFSRST3" -->
|
|
<field>
|
|
<name>MFSRST3</name>
|
|
<description>Control of software reset of multi-function serial interface ch.3</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "MFSRST2" -->
|
|
<field>
|
|
<name>MFSRST2</name>
|
|
<description>Control of software reset of multi-function serial interface ch.2</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "MFSRST1" -->
|
|
<field>
|
|
<name>MFSRST1</name>
|
|
<description>Control of software reset of multi-function serial interface ch.1</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "MFSRST0" -->
|
|
<field>
|
|
<name>MFSRST0</name>
|
|
<description>Control of software reset of multi-function serial interface ch.0</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "CKEN1" -->
|
|
<register>
|
|
<name>CKEN1</name>
|
|
<description>Peripheral Function Clock Control Register 1</description>
|
|
<addressOffset>0x10</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x000F0F0F</resetValue>
|
|
<resetMask>0x000F0F0F</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "QDUCK3" -->
|
|
<field>
|
|
<name>QDUCK3</name>
|
|
<description>Settings for operation clock supply and gating of quad counter unit 3</description>
|
|
<lsb>19</lsb>
|
|
<msb>19</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "QDUCK2" -->
|
|
<field>
|
|
<name>QDUCK2</name>
|
|
<description>Settings for operation clock supply and gating of quad counter unit 2</description>
|
|
<lsb>18</lsb>
|
|
<msb>18</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "QDUCK1" -->
|
|
<field>
|
|
<name>QDUCK1</name>
|
|
<description>Settings for operation clock supply and gating of quad counter unit 1</description>
|
|
<lsb>17</lsb>
|
|
<msb>17</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "QDUCK0" -->
|
|
<field>
|
|
<name>QDUCK0</name>
|
|
<description>Settings for operation clock supply and gating of quad counter unit 0</description>
|
|
<lsb>16</lsb>
|
|
<msb>16</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "MFTCK3" -->
|
|
<field>
|
|
<name>MFTCK3</name>
|
|
<description>Settings for operation clock supply and gating of multi-function timer 3 and PPG 24/26/28/30</description>
|
|
<lsb>11</lsb>
|
|
<msb>11</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "MFTCK2" -->
|
|
<field>
|
|
<name>MFTCK2</name>
|
|
<description>Settings for operation clock supply and gating of multi-function timer 2 and PPG 16/18/20/22</description>
|
|
<lsb>10</lsb>
|
|
<msb>10</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "MFTCK1" -->
|
|
<field>
|
|
<name>MFTCK1</name>
|
|
<description>Settings for operation clock supply and gating of multi-function timer 1 and PPG 8/10/12/14</description>
|
|
<lsb>9</lsb>
|
|
<msb>9</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "MFTCK0" -->
|
|
<field>
|
|
<name>MFTCK0</name>
|
|
<description>Settings for operation clock supply and gating of multi-function timer 0 and PPG 0/2/4/6</description>
|
|
<lsb>8</lsb>
|
|
<msb>8</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "BTMCK3" -->
|
|
<field>
|
|
<name>BTMCK3</name>
|
|
<description>Settings operation clock supply and gating to base timer 12/13/14/15</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "BTMCK2" -->
|
|
<field>
|
|
<name>BTMCK2</name>
|
|
<description>Settings operation clock supply and gating to base timer 8/9/10/11</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "BTMCK1" -->
|
|
<field>
|
|
<name>BTMCK1</name>
|
|
<description>Settings operation clock supply and gating to base timer 4/5/6/7</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "BTMCK0" -->
|
|
<field>
|
|
<name>BTMCK0</name>
|
|
<description>Settings operation clock supply and gating to base timer 0/1/2/3</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "MRST1" -->
|
|
<register>
|
|
<name>MRST1</name>
|
|
<description>Peripheral Function Reset Control Register 1</description>
|
|
<addressOffset>0x14</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x000F0F0F</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "QDURST3" -->
|
|
<field>
|
|
<name>QDURST3</name>
|
|
<description>Reset control of quad counter unit 3</description>
|
|
<lsb>19</lsb>
|
|
<msb>19</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "QDURST2" -->
|
|
<field>
|
|
<name>QDURST2</name>
|
|
<description>Reset control of quad counter unit 2</description>
|
|
<lsb>18</lsb>
|
|
<msb>18</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "QDURST1" -->
|
|
<field>
|
|
<name>QDURST1</name>
|
|
<description>Reset control of quad counter unit 1</description>
|
|
<lsb>17</lsb>
|
|
<msb>17</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "QDURST0" -->
|
|
<field>
|
|
<name>QDURST0</name>
|
|
<description>Reset control of quad counter unit 0</description>
|
|
<lsb>16</lsb>
|
|
<msb>16</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "MFTRST3" -->
|
|
<field>
|
|
<name>MFTRST3</name>
|
|
<description>Control of multi-function timer 3 and PPG 24/26/28/30 reset control</description>
|
|
<lsb>11</lsb>
|
|
<msb>11</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "MFTRST2" -->
|
|
<field>
|
|
<name>MFTRST2</name>
|
|
<description>Control of multi-function timer 2 and PPG 16/18/20/22 reset control</description>
|
|
<lsb>10</lsb>
|
|
<msb>10</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "MFTRST1" -->
|
|
<field>
|
|
<name>MFTRST1</name>
|
|
<description>Control of multi-function timer 1 and PPG 8/10/12/14 reset control</description>
|
|
<lsb>9</lsb>
|
|
<msb>9</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "MFTRST0" -->
|
|
<field>
|
|
<name>MFTRST0</name>
|
|
<description>Control of multi-function timer 0 and PPG 0/2/4/6 reset control</description>
|
|
<lsb>8</lsb>
|
|
<msb>8</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "BTMRST3" -->
|
|
<field>
|
|
<name>BTMRST3</name>
|
|
<description>Reset control of base timer 12/13/14/15</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "BTMRST2" -->
|
|
<field>
|
|
<name>BTMRST2</name>
|
|
<description>Reset control of base timer 8/9/10/11</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "BTMRST1" -->
|
|
<field>
|
|
<name>BTMRST1</name>
|
|
<description>Reset control of base timer 4/5/6/7</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "BTMRST0" -->
|
|
<field>
|
|
<name>BTMRST0</name>
|
|
<description>Reset control of base timer 0/1/2/3</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "CKEN2" -->
|
|
<register>
|
|
<name>CKEN2</name>
|
|
<description>Peripheral Function Clock Control Register 2</description>
|
|
<addressOffset>0x20</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000030</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "CANCK1" -->
|
|
<field>
|
|
<name>CANCK1</name>
|
|
<description>Peripheral Function Clock Control Register 2</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "CANCK0" -->
|
|
<field>
|
|
<name>CANCK0</name>
|
|
<description>$</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "MRST2" -->
|
|
<register>
|
|
<name>MRST2</name>
|
|
<description>Peripheral Function Reset Control Register 2</description>
|
|
<addressOffset>0x24</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000030</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "CANRST1" -->
|
|
<field>
|
|
<name>CANRST1</name>
|
|
<description>Peripheral Function Reset Control Register 2</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "CANRST0" -->
|
|
<field>
|
|
<name>CANRST0</name>
|
|
<description>$</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral>
|
|
<!-- PERIPHERAL "DMAC" -->
|
|
<peripheral>
|
|
<name>DMAC</name>
|
|
<description>DMAC Registers</description>
|
|
<groupName>DMAC</groupName>
|
|
<baseAddress>0x40060000</baseAddress>
|
|
<!-- ADDRESS BLOCK -->
|
|
<addressBlock>
|
|
<offset>0x0</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x10</offset>
|
|
<size>0x80</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<!-- INTERRUPT "DMAC0" -->
|
|
<interrupt>
|
|
<name>DMAC0</name>
|
|
<value>19</value>
|
|
</interrupt>
|
|
<!-- INTERRUPT "DMAC1" -->
|
|
<interrupt>
|
|
<name>DMAC1</name>
|
|
<value>20</value>
|
|
</interrupt>
|
|
<!-- REGISTERS -->
|
|
<registers>
|
|
<!-- REGISTER "DMACR" -->
|
|
<register>
|
|
<name>DMACR</name>
|
|
<description>Entire DMAC Configuration Register</description>
|
|
<addressOffset>0x0</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0xDF000000</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "DE" -->
|
|
<field>
|
|
<name>DE</name>
|
|
<description>DMA Enable (all-channel operation enable bit)</description>
|
|
<lsb>31</lsb>
|
|
<msb>31</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "DS" -->
|
|
<field>
|
|
<name>DS</name>
|
|
<description>DMA Stop</description>
|
|
<lsb>30</lsb>
|
|
<msb>30</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "PR" -->
|
|
<field>
|
|
<name>PR</name>
|
|
<description>Priority Rotation</description>
|
|
<lsb>28</lsb>
|
|
<msb>28</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "DH" -->
|
|
<field>
|
|
<name>DH</name>
|
|
<description>DMA Halt (All-channel pause bit)</description>
|
|
<lsb>24</lsb>
|
|
<msb>27</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "DMACA0" -->
|
|
<register>
|
|
<name>DMACA0</name>
|
|
<description>Configuration A Register</description>
|
|
<addressOffset>0x10</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0xFF8FFFFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "EB" -->
|
|
<field>
|
|
<name>EB</name>
|
|
<description>Enable bit (individual-channel operation enable bit)</description>
|
|
<lsb>31</lsb>
|
|
<msb>31</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "PB" -->
|
|
<field>
|
|
<name>PB</name>
|
|
<description>Pause bit (individual-channel pause bit)</description>
|
|
<lsb>30</lsb>
|
|
<msb>30</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "ST" -->
|
|
<field>
|
|
<name>ST</name>
|
|
<description>Software Trigger</description>
|
|
<lsb>29</lsb>
|
|
<msb>29</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "IS" -->
|
|
<field>
|
|
<name>IS</name>
|
|
<description>Input Select</description>
|
|
<lsb>23</lsb>
|
|
<msb>28</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "BC" -->
|
|
<field>
|
|
<name>BC</name>
|
|
<description>Block Count</description>
|
|
<lsb>16</lsb>
|
|
<msb>19</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TC" -->
|
|
<field>
|
|
<name>TC</name>
|
|
<description>Transfer Count</description>
|
|
<lsb>0</lsb>
|
|
<msb>15</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "DMACB0" -->
|
|
<register>
|
|
<name>DMACB0</name>
|
|
<description>Configuration B Register</description>
|
|
<addressOffset>0x14</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x3FFF0001</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "MS" -->
|
|
<field>
|
|
<name>MS</name>
|
|
<description>Mode Select</description>
|
|
<lsb>28</lsb>
|
|
<msb>29</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "TW" -->
|
|
<field>
|
|
<name>TW</name>
|
|
<description>Transfer Width</description>
|
|
<lsb>26</lsb>
|
|
<msb>27</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "FS" -->
|
|
<field>
|
|
<name>FS</name>
|
|
<description>Fixed Source</description>
|
|
<lsb>25</lsb>
|
|
<msb>25</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "FD" -->
|
|
<field>
|
|
<name>FD</name>
|
|
<description>Fixed Destination</description>
|
|
<lsb>24</lsb>
|
|
<msb>24</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "RC" -->
|
|
<field>
|
|
<name>RC</name>
|
|
<description>Reload Count (BC/TC reload)</description>
|
|
<lsb>23</lsb>
|
|
<msb>23</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "RS" -->
|
|
<field>
|
|
<name>RS</name>
|
|
<description>Reload Source</description>
|
|
<lsb>22</lsb>
|
|
<msb>22</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "RD" -->
|
|
<field>
|
|
<name>RD</name>
|
|
<description>Reload Destination</description>
|
|
<lsb>21</lsb>
|
|
<msb>21</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "EI" -->
|
|
<field>
|
|
<name>EI</name>
|
|
<description>Error Interrupt (unsuccessful transfer completion interrupt enable)</description>
|
|
<lsb>20</lsb>
|
|
<msb>20</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "CI" -->
|
|
<field>
|
|
<name>CI</name>
|
|
<description>Completion Interrupt (successful transfer completion interrupt enable)</description>
|
|
<lsb>19</lsb>
|
|
<msb>19</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "SS" -->
|
|
<field>
|
|
<name>SS</name>
|
|
<description>Stop Status (stop status notification)</description>
|
|
<lsb>16</lsb>
|
|
<msb>18</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "EM" -->
|
|
<field>
|
|
<name>EM</name>
|
|
<description>Enable bit Mask (EB bit clear mask)</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "DMACSA0" -->
|
|
<register>
|
|
<name>DMACSA0</name>
|
|
<description>Transfer Source Address Register 0</description>
|
|
<addressOffset>0x18</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0xFFFFFFFF</resetMask>
|
|
</register>
|
|
<!-- REGISTER "DMACDA0" -->
|
|
<register>
|
|
<name>DMACDA0</name>
|
|
<description>Transfer Destination Address Register 0</description>
|
|
<addressOffset>0x1C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0xFFFFFFFF</resetMask>
|
|
</register>
|
|
<!-- REGISTER "DMACA1" -->
|
|
<register derivedFrom="DMACA0">
|
|
<name>DMACA1</name>
|
|
<description>Configuration A Register 1</description>
|
|
<addressOffset>0x20</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "DMACB1" -->
|
|
<register derivedFrom="DMACB0">
|
|
<name>DMACB1</name>
|
|
<description>Configuration B Register 1</description>
|
|
<addressOffset>0x24</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "DMACSA1" -->
|
|
<register derivedFrom="DMACSA0">
|
|
<name>DMACSA1</name>
|
|
<description>Transfer Source Address Register 1</description>
|
|
<addressOffset>0x28</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "DMACDA1" -->
|
|
<register derivedFrom="DMACDA0">
|
|
<name>DMACDA1</name>
|
|
<description>Transfer Destination Address Register 1</description>
|
|
<addressOffset>0x2C</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "DMACA2" -->
|
|
<register derivedFrom="DMACA0">
|
|
<name>DMACA2</name>
|
|
<description>Configuration A Register 2</description>
|
|
<addressOffset>0x30</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "DMACB2" -->
|
|
<register derivedFrom="DMACB0">
|
|
<name>DMACB2</name>
|
|
<description>Configuration B Register 2</description>
|
|
<addressOffset>0x34</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "DMACSA2" -->
|
|
<register derivedFrom="DMACSA0">
|
|
<name>DMACSA2</name>
|
|
<description>Transfer Source Address Register 2</description>
|
|
<addressOffset>0x38</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "DMACDA2" -->
|
|
<register derivedFrom="DMACDA0">
|
|
<name>DMACDA2</name>
|
|
<description>Transfer Destination Address Register 2</description>
|
|
<addressOffset>0x3C</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "DMACA3" -->
|
|
<register derivedFrom="DMACA0">
|
|
<name>DMACA3</name>
|
|
<description>Configuration A Register 3</description>
|
|
<addressOffset>0x40</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "DMACB3" -->
|
|
<register derivedFrom="DMACB0">
|
|
<name>DMACB3</name>
|
|
<description>Configuration B Register 3</description>
|
|
<addressOffset>0x44</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "DMACSA3" -->
|
|
<register derivedFrom="DMACSA0">
|
|
<name>DMACSA3</name>
|
|
<description>Transfer Source Address Register 3</description>
|
|
<addressOffset>0x48</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "DMACDA3" -->
|
|
<register derivedFrom="DMACDA0">
|
|
<name>DMACDA3</name>
|
|
<description>Transfer Destination Address Register 3</description>
|
|
<addressOffset>0x4C</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "DMACA4" -->
|
|
<register derivedFrom="DMACA0">
|
|
<name>DMACA4</name>
|
|
<description>Configuration A Register 4</description>
|
|
<addressOffset>0x50</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "DMACB4" -->
|
|
<register derivedFrom="DMACB0">
|
|
<name>DMACB4</name>
|
|
<description>Configuration B Register 4</description>
|
|
<addressOffset>0x54</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "DMACSA4" -->
|
|
<register derivedFrom="DMACSA0">
|
|
<name>DMACSA4</name>
|
|
<description>Transfer Source Address Register 4</description>
|
|
<addressOffset>0x58</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "DMACDA4" -->
|
|
<register derivedFrom="DMACDA0">
|
|
<name>DMACDA4</name>
|
|
<description>Transfer Destination Address Register 4</description>
|
|
<addressOffset>0x5C</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "DMACA5" -->
|
|
<register derivedFrom="DMACA0">
|
|
<name>DMACA5</name>
|
|
<description>Configuration A Register 5</description>
|
|
<addressOffset>0x60</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "DMACB5" -->
|
|
<register derivedFrom="DMACB0">
|
|
<name>DMACB5</name>
|
|
<description>Configuration B Register 5</description>
|
|
<addressOffset>0x64</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "DMACSA5" -->
|
|
<register derivedFrom="DMACSA0">
|
|
<name>DMACSA5</name>
|
|
<description>Transfer Source Address Register 5</description>
|
|
<addressOffset>0x68</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "DMACDA5" -->
|
|
<register derivedFrom="DMACDA0">
|
|
<name>DMACDA5</name>
|
|
<description>Transfer Destination Address Register 5</description>
|
|
<addressOffset>0x6C</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "DMACA6" -->
|
|
<register derivedFrom="DMACA0">
|
|
<name>DMACA6</name>
|
|
<description>Configuration A Register 6</description>
|
|
<addressOffset>0x70</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "DMACB6" -->
|
|
<register derivedFrom="DMACB0">
|
|
<name>DMACB6</name>
|
|
<description>Configuration B Register 6</description>
|
|
<addressOffset>0x74</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "DMACSA6" -->
|
|
<register derivedFrom="DMACSA0">
|
|
<name>DMACSA6</name>
|
|
<description>Transfer Source Address Register 6</description>
|
|
<addressOffset>0x78</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "DMACDA6" -->
|
|
<register derivedFrom="DMACDA0">
|
|
<name>DMACDA6</name>
|
|
<description>Transfer Destination Address Register 6</description>
|
|
<addressOffset>0x7C</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "DMACA7" -->
|
|
<register derivedFrom="DMACA0">
|
|
<name>DMACA7</name>
|
|
<description>Configuration A Register 7</description>
|
|
<addressOffset>0x80</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "DMACB7" -->
|
|
<register derivedFrom="DMACB0">
|
|
<name>DMACB7</name>
|
|
<description>Configuration B Register 7</description>
|
|
<addressOffset>0x84</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "DMACSA7" -->
|
|
<register derivedFrom="DMACSA0">
|
|
<name>DMACSA7</name>
|
|
<description>Transfer Source Address Register 7</description>
|
|
<addressOffset>0x88</addressOffset>
|
|
</register>
|
|
<!-- REGISTER "DMACDA7" -->
|
|
<register derivedFrom="DMACDA0">
|
|
<name>DMACDA7</name>
|
|
<description>Transfer Destination Address Register 7</description>
|
|
<addressOffset>0x8C</addressOffset>
|
|
</register>
|
|
</registers>
|
|
</peripheral>
|
|
<!-- PERIPHERAL "MTB_DWT" -->
|
|
<peripheral>
|
|
<name>MTB_DWT</name>
|
|
<description>Micro Trace Buffer Data Watchpoint and Trace Registers</description>
|
|
<groupName>MTB_DWT</groupName>
|
|
<baseAddress>0xF0001000</baseAddress>
|
|
<!-- ADDRESS BLOCK -->
|
|
<addressBlock>
|
|
<offset>0x0</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x4</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x8</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x10</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x14</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x18</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0x20</offset>
|
|
<size>0x1</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0xFD0</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0xFD4</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0xFD8</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0xFDC</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0xFE0</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0xFE4</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0xFE8</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0xFEC</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0xFF0</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0xFF4</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0xFF8</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<addressBlock>
|
|
<offset>0xFFC</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<!-- REGISTERS -->
|
|
<registers>
|
|
<!-- REGISTER "CMP_ADDR_START" -->
|
|
<register>
|
|
<name>CMP_ADDR_START</name>
|
|
<description>MTB_DWT Address Compare Start trace Register</description>
|
|
<addressOffset>0x0</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0xFFFFFFFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "ADCMP_STA" -->
|
|
<field>
|
|
<name>ADCMP_STA</name>
|
|
<description>MTB_DWT address comparison start trace bits</description>
|
|
<lsb>0</lsb>
|
|
<msb>31</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "CMP_DATA_START" -->
|
|
<register>
|
|
<name>CMP_DATA_START</name>
|
|
<description>MTB_DWT Data Compare Start trace Register</description>
|
|
<addressOffset>0x4</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0xFFFFFFFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "DTCMP_STA" -->
|
|
<field>
|
|
<name>DTCMP_STA</name>
|
|
<description>MTB_DWT data comparison start trace bits</description>
|
|
<lsb>0</lsb>
|
|
<msb>31</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "CMP_MASK_START" -->
|
|
<register>
|
|
<name>CMP_MASK_START</name>
|
|
<description>MTB_DWT Mask Data Compare Start Trace Register</description>
|
|
<addressOffset>0x8</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0xFFFFFFFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "MSK_STA" -->
|
|
<field>
|
|
<name>MSK_STA</name>
|
|
<description>MTB_DWT data compare start trace register mask bits</description>
|
|
<lsb>0</lsb>
|
|
<msb>31</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "CMP_ADDR_STOP" -->
|
|
<register>
|
|
<name>CMP_ADDR_STOP</name>
|
|
<description>MTB_DWT Address Compare Stop trace Register</description>
|
|
<addressOffset>0x10</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0xFFFFFFFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "ADCMP_STO" -->
|
|
<field>
|
|
<name>ADCMP_STO</name>
|
|
<description>MTB_DWT address comparison stop trace bits</description>
|
|
<lsb>0</lsb>
|
|
<msb>31</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "CMP_DATA_STOP" -->
|
|
<register>
|
|
<name>CMP_DATA_STOP</name>
|
|
<description>MTB_DWT Data Compare Stop trace Register</description>
|
|
<addressOffset>0x14</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0xFFFFFFFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "DTCMP_STO" -->
|
|
<field>
|
|
<name>DTCMP_STO</name>
|
|
<description>MTB_DWT data comparison stop trace bits</description>
|
|
<lsb>0</lsb>
|
|
<msb>31</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "CMP_MASK_STOP" -->
|
|
<register>
|
|
<name>CMP_MASK_STOP</name>
|
|
<description>MTB_DWT Mask Data Compare Stop Trace Register</description>
|
|
<addressOffset>0x18</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0xFFFFFFFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "MSK_STO" -->
|
|
<field>
|
|
<name>MSK_STO</name>
|
|
<description>MTB_DWT data compare stop trace register mask bits</description>
|
|
<lsb>0</lsb>
|
|
<msb>31</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "FCT" -->
|
|
<register>
|
|
<name>FCT</name>
|
|
<description>MTB_DWT Function Register</description>
|
|
<addressOffset>0x20</addressOffset>
|
|
<size>8</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<resetMask>0xFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "DSTP" -->
|
|
<field>
|
|
<name>DSTP</name>
|
|
<description>Data size stop bits</description>
|
|
<lsb>6</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "DSTA" -->
|
|
<field>
|
|
<name>DSTA</name>
|
|
<description>Data size start bits</description>
|
|
<lsb>4</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "STPEN" -->
|
|
<field>
|
|
<name>STPEN</name>
|
|
<description>Enable MTB_DWT stop MTB function bits</description>
|
|
<lsb>2</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "STAEN" -->
|
|
<field>
|
|
<name>STAEN</name>
|
|
<description>Enable MTB_DWT start MTB function bits</description>
|
|
<lsb>0</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "PID4" -->
|
|
<register>
|
|
<name>PID4</name>
|
|
<description>Peripheral ID4 Register</description>
|
|
<addressOffset>0xFD0</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0xFFFFFFFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "PERID" -->
|
|
<field>
|
|
<name>PERID</name>
|
|
<description>Peripheral ID bits</description>
|
|
<lsb>0</lsb>
|
|
<msb>31</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "PID5" -->
|
|
<register>
|
|
<name>PID5</name>
|
|
<description>Peripheral ID5 Register</description>
|
|
<addressOffset>0xFD4</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0xFFFFFFFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "PERID" -->
|
|
<field>
|
|
<name>PERID</name>
|
|
<description>Peripheral ID bits</description>
|
|
<lsb>0</lsb>
|
|
<msb>31</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "PID6" -->
|
|
<register>
|
|
<name>PID6</name>
|
|
<description>Peripheral ID6 Register</description>
|
|
<addressOffset>0xFD8</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0xFFFFFFFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "PERID" -->
|
|
<field>
|
|
<name>PERID</name>
|
|
<description>Peripheral ID bits</description>
|
|
<lsb>0</lsb>
|
|
<msb>31</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "PID7" -->
|
|
<register>
|
|
<name>PID7</name>
|
|
<description>Peripheral ID7 Register</description>
|
|
<addressOffset>0xFDC</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0xFFFFFFFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "PERID" -->
|
|
<field>
|
|
<name>PERID</name>
|
|
<description>Peripheral ID bits</description>
|
|
<lsb>0</lsb>
|
|
<msb>31</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "PID0" -->
|
|
<register>
|
|
<name>PID0</name>
|
|
<description>Peripheral ID0 Register</description>
|
|
<addressOffset>0xFE0</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000016</resetValue>
|
|
<resetMask>0xFFFFFFFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "PERID" -->
|
|
<field>
|
|
<name>PERID</name>
|
|
<description>Peripheral ID bits</description>
|
|
<lsb>0</lsb>
|
|
<msb>31</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "PID1" -->
|
|
<register>
|
|
<name>PID1</name>
|
|
<description>Peripheral ID1 Register</description>
|
|
<addressOffset>0xFE4</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000048</resetValue>
|
|
<resetMask>0xFFFFFFFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "PERID" -->
|
|
<field>
|
|
<name>PERID</name>
|
|
<description>Peripheral ID bits</description>
|
|
<lsb>0</lsb>
|
|
<msb>31</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "PID2" -->
|
|
<register>
|
|
<name>PID2</name>
|
|
<description>Peripheral ID2 Register</description>
|
|
<addressOffset>0xFE8</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000008</resetValue>
|
|
<resetMask>0xFFFFFFFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "PERID" -->
|
|
<field>
|
|
<name>PERID</name>
|
|
<description>Peripheral ID bits</description>
|
|
<lsb>0</lsb>
|
|
<msb>31</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "PID3" -->
|
|
<register>
|
|
<name>PID3</name>
|
|
<description>Peripheral ID3 Register</description>
|
|
<addressOffset>0xFEC</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0xFFFFFFFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "PERID" -->
|
|
<field>
|
|
<name>PERID</name>
|
|
<description>Peripheral ID bits</description>
|
|
<lsb>0</lsb>
|
|
<msb>31</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "CID0" -->
|
|
<register>
|
|
<name>CID0</name>
|
|
<description>Component ID0 Register</description>
|
|
<addressOffset>0xFF0</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x0000000D</resetValue>
|
|
<resetMask>0xFFFFFFFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "CPNTID" -->
|
|
<field>
|
|
<name>CPNTID</name>
|
|
<description>Component ID bits</description>
|
|
<lsb>0</lsb>
|
|
<msb>31</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "CID1" -->
|
|
<register>
|
|
<name>CID1</name>
|
|
<description>Component ID1 Register</description>
|
|
<addressOffset>0xFF4</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000090</resetValue>
|
|
<resetMask>0xFFFFFFFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "CPNTID" -->
|
|
<field>
|
|
<name>CPNTID</name>
|
|
<description>Component ID bits</description>
|
|
<lsb>0</lsb>
|
|
<msb>31</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "CID2" -->
|
|
<register>
|
|
<name>CID2</name>
|
|
<description>Component ID2 Register</description>
|
|
<addressOffset>0xFF8</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000005</resetValue>
|
|
<resetMask>0xFFFFFFFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "CPNTID" -->
|
|
<field>
|
|
<name>CPNTID</name>
|
|
<description>Component ID bits</description>
|
|
<lsb>0</lsb>
|
|
<msb>31</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "CID3" -->
|
|
<register>
|
|
<name>CID3</name>
|
|
<description>Component ID3 Register</description>
|
|
<addressOffset>0xFFC</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x000000B1</resetValue>
|
|
<resetMask>0xFFFFFFFF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "CPNTID" -->
|
|
<field>
|
|
<name>CPNTID</name>
|
|
<description>Component ID bits</description>
|
|
<lsb>0</lsb>
|
|
<msb>31</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral>
|
|
<!-- PERIPHERAL "FASTIO" -->
|
|
<peripheral>
|
|
<name>FASTIO</name>
|
|
<description>Fast GPIO Registers</description>
|
|
<groupName>FASTIO</groupName>
|
|
<baseAddress>0xF8000000</baseAddress>
|
|
<!-- ADDRESS BLOCK -->
|
|
<addressBlock>
|
|
<offset>0x0</offset>
|
|
<size>0x100</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<!-- REGISTERS -->
|
|
<registers>
|
|
<!-- REGISTER "FPDIR0" -->
|
|
<register>
|
|
<name>FPDIR0</name>
|
|
<description>Fast GPIO Input Data Register 0</description>
|
|
<addressOffset>0x0</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000801F</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "P0F" -->
|
|
<field>
|
|
<name>P0F</name>
|
|
<description>Bit15 of FPDIR0</description>
|
|
<lsb>15</lsb>
|
|
<msb>15</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "P04" -->
|
|
<field>
|
|
<name>P04</name>
|
|
<description>Bit4 of FPDIR0</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "P03" -->
|
|
<field>
|
|
<name>P03</name>
|
|
<description>Bit3 of FPDIR0</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "P02" -->
|
|
<field>
|
|
<name>P02</name>
|
|
<description>Bit2 of FPDIR0</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "P01" -->
|
|
<field>
|
|
<name>P01</name>
|
|
<description>Bit1 of FPDIR0</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "P00" -->
|
|
<field>
|
|
<name>P00</name>
|
|
<description>Bit0 of FPDIR0</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "FPDIR1" -->
|
|
<register>
|
|
<name>FPDIR1</name>
|
|
<description>Fast GPIO Input Data Register 1</description>
|
|
<addressOffset>0x4</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000003F</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "P15" -->
|
|
<field>
|
|
<name>P15</name>
|
|
<description>Bit5 of FPDIR1</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "P14" -->
|
|
<field>
|
|
<name>P14</name>
|
|
<description>Bit4 of FPDIR1</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "P13" -->
|
|
<field>
|
|
<name>P13</name>
|
|
<description>Bit3 of FPDIR1</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "P12" -->
|
|
<field>
|
|
<name>P12</name>
|
|
<description>Bit2 of FPDIR1</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "P11" -->
|
|
<field>
|
|
<name>P11</name>
|
|
<description>Bit1 of FPDIR1</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "P10" -->
|
|
<field>
|
|
<name>P10</name>
|
|
<description>Bit0 of FPDIR1</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "FPDIR2" -->
|
|
<register>
|
|
<name>FPDIR2</name>
|
|
<description>Fast GPIO Input Data Register 2</description>
|
|
<addressOffset>0x8</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000000E</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "P23" -->
|
|
<field>
|
|
<name>P23</name>
|
|
<description>Bit3 of FPDIR2</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "P22" -->
|
|
<field>
|
|
<name>P22</name>
|
|
<description>Bit2 of FPDIR2</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "P21" -->
|
|
<field>
|
|
<name>P21</name>
|
|
<description>Bit1 of FPDIR2</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "FPDIR3" -->
|
|
<register>
|
|
<name>FPDIR3</name>
|
|
<description>Fast GPIO Input Data Register 3</description>
|
|
<addressOffset>0xC</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FE00</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "P3F" -->
|
|
<field>
|
|
<name>P3F</name>
|
|
<description>Bit15 of FPDIR3</description>
|
|
<lsb>15</lsb>
|
|
<msb>15</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "P3E" -->
|
|
<field>
|
|
<name>P3E</name>
|
|
<description>Bit14 of FPDIR3</description>
|
|
<lsb>14</lsb>
|
|
<msb>14</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "P3D" -->
|
|
<field>
|
|
<name>P3D</name>
|
|
<description>Bit13 of FPDIR3</description>
|
|
<lsb>13</lsb>
|
|
<msb>13</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "P3C" -->
|
|
<field>
|
|
<name>P3C</name>
|
|
<description>Bit12 of FPDIR3</description>
|
|
<lsb>12</lsb>
|
|
<msb>12</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "P3B" -->
|
|
<field>
|
|
<name>P3B</name>
|
|
<description>Bit11 of FPDIR3</description>
|
|
<lsb>11</lsb>
|
|
<msb>11</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "P3A" -->
|
|
<field>
|
|
<name>P3A</name>
|
|
<description>Bit10 of FPDIR3</description>
|
|
<lsb>10</lsb>
|
|
<msb>10</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "P39" -->
|
|
<field>
|
|
<name>P39</name>
|
|
<description>Bit9 of FPDIR3</description>
|
|
<lsb>9</lsb>
|
|
<msb>9</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "FPDIR4" -->
|
|
<register>
|
|
<name>FPDIR4</name>
|
|
<description>Fast GPIO Input Data Register 4</description>
|
|
<addressOffset>0x10</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x000006C0</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "P4A" -->
|
|
<field>
|
|
<name>P4A</name>
|
|
<description>Bit10 of FPDIR4</description>
|
|
<lsb>10</lsb>
|
|
<msb>10</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "P49" -->
|
|
<field>
|
|
<name>P49</name>
|
|
<description>Bit9 of FPDIR4</description>
|
|
<lsb>9</lsb>
|
|
<msb>9</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "P47" -->
|
|
<field>
|
|
<name>P47</name>
|
|
<description>Bit7 of FPDIR4</description>
|
|
<lsb>7</lsb>
|
|
<msb>7</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "P46" -->
|
|
<field>
|
|
<name>P46</name>
|
|
<description>Bit6 of FPDIR4</description>
|
|
<lsb>6</lsb>
|
|
<msb>6</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "FPDIR5" -->
|
|
<register>
|
|
<name>FPDIR5</name>
|
|
<description>Fast GPIO Input Data Register 5</description>
|
|
<addressOffset>0x14</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000007</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "P52" -->
|
|
<field>
|
|
<name>P52</name>
|
|
<description>Bit2 of FPDIR5</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "P51" -->
|
|
<field>
|
|
<name>P51</name>
|
|
<description>Bit1 of FPDIR5</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "P50" -->
|
|
<field>
|
|
<name>P50</name>
|
|
<description>Bit0 of FPDIR5</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "FPDIR6" -->
|
|
<register>
|
|
<name>FPDIR6</name>
|
|
<description>Fast GPIO Input Data Register 6</description>
|
|
<addressOffset>0x18</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000003</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "P61" -->
|
|
<field>
|
|
<name>P61</name>
|
|
<description>Bit1 of FPDIR6</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "P60" -->
|
|
<field>
|
|
<name>P60</name>
|
|
<description>Bit0 of FPDIR6</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "FPDIR8" -->
|
|
<register>
|
|
<name>FPDIR8</name>
|
|
<description>Fast GPIO Input Data Register 8</description>
|
|
<addressOffset>0x20</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000007</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "P82" -->
|
|
<field>
|
|
<name>P82</name>
|
|
<description>Bit2 of FPDIR8</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "P81" -->
|
|
<field>
|
|
<name>P81</name>
|
|
<description>Bit1 of FPDIR8</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "P80" -->
|
|
<field>
|
|
<name>P80</name>
|
|
<description>Bit0 of FPDIR8</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "FPDIRE" -->
|
|
<register>
|
|
<name>FPDIRE</name>
|
|
<description>Fast GPIO Input Data Register E</description>
|
|
<addressOffset>0x38</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000000D</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "PE3" -->
|
|
<field>
|
|
<name>PE3</name>
|
|
<description>Bit3 of FPDIRE</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "PE2" -->
|
|
<field>
|
|
<name>PE2</name>
|
|
<description>Bit2 of FPDIRE</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "PE0" -->
|
|
<field>
|
|
<name>PE0</name>
|
|
<description>Bit0 of FPDIRE</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "FPDOR0" -->
|
|
<register>
|
|
<name>FPDOR0</name>
|
|
<description>Fast GPIO Output Data Register 0</description>
|
|
<addressOffset>0x40</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000801F</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "P0F" -->
|
|
<field>
|
|
<name>P0F</name>
|
|
<description>Bit15 of FPDOR0</description>
|
|
<lsb>15</lsb>
|
|
<msb>15</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "P04" -->
|
|
<field>
|
|
<name>P04</name>
|
|
<description>Bit4 of FPDOR0</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "P03" -->
|
|
<field>
|
|
<name>P03</name>
|
|
<description>Bit3 of FPDOR0</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "P02" -->
|
|
<field>
|
|
<name>P02</name>
|
|
<description>Bit2 of FPDOR0</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "P01" -->
|
|
<field>
|
|
<name>P01</name>
|
|
<description>Bit1 of FPDOR0</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "P00" -->
|
|
<field>
|
|
<name>P00</name>
|
|
<description>Bit0 of FPDOR0</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "FPDOR1" -->
|
|
<register>
|
|
<name>FPDOR1</name>
|
|
<description>Fast GPIO Output Data Register 1</description>
|
|
<addressOffset>0x44</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000003F</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "P15" -->
|
|
<field>
|
|
<name>P15</name>
|
|
<description>Bit5 of FPDOR1</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "P14" -->
|
|
<field>
|
|
<name>P14</name>
|
|
<description>Bit4 of FPDOR1</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "P13" -->
|
|
<field>
|
|
<name>P13</name>
|
|
<description>Bit3 of FPDOR1</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "P12" -->
|
|
<field>
|
|
<name>P12</name>
|
|
<description>Bit2 of FPDOR1</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "P11" -->
|
|
<field>
|
|
<name>P11</name>
|
|
<description>Bit1 of FPDOR1</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "P10" -->
|
|
<field>
|
|
<name>P10</name>
|
|
<description>Bit0 of FPDOR1</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "FPDOR2" -->
|
|
<register>
|
|
<name>FPDOR2</name>
|
|
<description>Fast GPIO Output Data Register 2</description>
|
|
<addressOffset>0x48</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000000E</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "P23" -->
|
|
<field>
|
|
<name>P23</name>
|
|
<description>Bit3 of FPDOR2</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "P22" -->
|
|
<field>
|
|
<name>P22</name>
|
|
<description>Bit2 of FPDOR2</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "P21" -->
|
|
<field>
|
|
<name>P21</name>
|
|
<description>Bit1 of FPDOR2</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "FPDOR3" -->
|
|
<register>
|
|
<name>FPDOR3</name>
|
|
<description>Fast GPIO Output Data Register 3</description>
|
|
<addressOffset>0x4C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FE00</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "P3F" -->
|
|
<field>
|
|
<name>P3F</name>
|
|
<description>Bit15 of FPDOR3</description>
|
|
<lsb>15</lsb>
|
|
<msb>15</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "P3E" -->
|
|
<field>
|
|
<name>P3E</name>
|
|
<description>Bit14 of FPDOR3</description>
|
|
<lsb>14</lsb>
|
|
<msb>14</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "P3D" -->
|
|
<field>
|
|
<name>P3D</name>
|
|
<description>Bit13 of FPDOR3</description>
|
|
<lsb>13</lsb>
|
|
<msb>13</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "P3C" -->
|
|
<field>
|
|
<name>P3C</name>
|
|
<description>Bit12 of FPDOR3</description>
|
|
<lsb>12</lsb>
|
|
<msb>12</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "P3B" -->
|
|
<field>
|
|
<name>P3B</name>
|
|
<description>Bit11 of FPDOR3</description>
|
|
<lsb>11</lsb>
|
|
<msb>11</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "P3A" -->
|
|
<field>
|
|
<name>P3A</name>
|
|
<description>Bit10 of FPDOR3</description>
|
|
<lsb>10</lsb>
|
|
<msb>10</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "P39" -->
|
|
<field>
|
|
<name>P39</name>
|
|
<description>Bit9 of FPDOR3</description>
|
|
<lsb>9</lsb>
|
|
<msb>9</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "FPDOR4" -->
|
|
<register>
|
|
<name>FPDOR4</name>
|
|
<description>Fast GPIO Output Data Register 4</description>
|
|
<addressOffset>0x50</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x000006C0</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "P4A" -->
|
|
<field>
|
|
<name>P4A</name>
|
|
<description>Bit10 of FPDOR4</description>
|
|
<lsb>10</lsb>
|
|
<msb>10</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "P49" -->
|
|
<field>
|
|
<name>P49</name>
|
|
<description>Bit9 of FPDOR4</description>
|
|
<lsb>9</lsb>
|
|
<msb>9</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "P47" -->
|
|
<field>
|
|
<name>P47</name>
|
|
<description>Bit7 of FPDOR4</description>
|
|
<lsb>7</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "P46" -->
|
|
<field>
|
|
<name>P46</name>
|
|
<description>Bit6 of FPDOR4</description>
|
|
<lsb>6</lsb>
|
|
<msb>6</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "FPDOR5" -->
|
|
<register>
|
|
<name>FPDOR5</name>
|
|
<description>Fast GPIO Output Data Register 5</description>
|
|
<addressOffset>0x54</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000007</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "P52" -->
|
|
<field>
|
|
<name>P52</name>
|
|
<description>Bit2 of FPDOR5</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "P51" -->
|
|
<field>
|
|
<name>P51</name>
|
|
<description>Bit1 of FPDOR5</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "P50" -->
|
|
<field>
|
|
<name>P50</name>
|
|
<description>Bit0 of FPDOR5</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "FPDOR6" -->
|
|
<register>
|
|
<name>FPDOR6</name>
|
|
<description>Fast GPIO Output Data Register 6</description>
|
|
<addressOffset>0x58</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000003</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "P61" -->
|
|
<field>
|
|
<name>P61</name>
|
|
<description>Bit1 of FPDOR6</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "P60" -->
|
|
<field>
|
|
<name>P60</name>
|
|
<description>Bit0 of FPDOR6</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "FPDOR8" -->
|
|
<register>
|
|
<name>FPDOR8</name>
|
|
<description>Fast GPIO Output Data Register 8</description>
|
|
<addressOffset>0x60</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000007</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "P82" -->
|
|
<field>
|
|
<name>P82</name>
|
|
<description>Bit2 of FPDOR8</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "P81" -->
|
|
<field>
|
|
<name>P81</name>
|
|
<description>Bit1 of FPDOR8</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "P80" -->
|
|
<field>
|
|
<name>P80</name>
|
|
<description>Bit0 of FPDOR8</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "FPDORE" -->
|
|
<register>
|
|
<name>FPDORE</name>
|
|
<description>Fast GPIO Output Data Register E</description>
|
|
<addressOffset>0x78</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000000D</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "PE3" -->
|
|
<field>
|
|
<name>PE3</name>
|
|
<description>Bit3 of FPDORE</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "PE2" -->
|
|
<field>
|
|
<name>PE2</name>
|
|
<description>Bit2 of FPDORE</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "PE0" -->
|
|
<field>
|
|
<name>PE0</name>
|
|
<description>Bit0 of FPDORE</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "M_FPDIR0" -->
|
|
<register>
|
|
<name>M_FPDIR0</name>
|
|
<description>Mirror Fast GPIO Input Data Register 0</description>
|
|
<addressOffset>0x80</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x000000FF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "P22" -->
|
|
<field>
|
|
<name>P22</name>
|
|
<description>Bit7 of M_FPDIR0</description>
|
|
<lsb>7</lsb>
|
|
<msb>7</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "P23" -->
|
|
<field>
|
|
<name>P23</name>
|
|
<description>Bit6 of M_FPDIR0</description>
|
|
<lsb>6</lsb>
|
|
<msb>6</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "P15" -->
|
|
<field>
|
|
<name>P15</name>
|
|
<description>Bit5 of M_FPDIR0</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "P14" -->
|
|
<field>
|
|
<name>P14</name>
|
|
<description>Bit4 of M_FPDIR0</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "P13" -->
|
|
<field>
|
|
<name>P13</name>
|
|
<description>Bit3 of M_FPDIR0</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "P12" -->
|
|
<field>
|
|
<name>P12</name>
|
|
<description>Bit2 of M_FPDIR0</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "P11" -->
|
|
<field>
|
|
<name>P11</name>
|
|
<description>Bit1 of M_FPDIR0</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "P10" -->
|
|
<field>
|
|
<name>P10</name>
|
|
<description>Bit0 of M_FPDIR0</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "M_FPDIR1" -->
|
|
<register>
|
|
<name>M_FPDIR1</name>
|
|
<description>Mirror Fast GPIO Input Data Register 1</description>
|
|
<addressOffset>0x84</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x000000FF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "P47" -->
|
|
<field>
|
|
<name>P47</name>
|
|
<description>Bit7 of M_FPDIR1</description>
|
|
<lsb>7</lsb>
|
|
<msb>7</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "P46" -->
|
|
<field>
|
|
<name>P46</name>
|
|
<description>Bit6 of M_FPDIR1</description>
|
|
<lsb>6</lsb>
|
|
<msb>6</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "P3F" -->
|
|
<field>
|
|
<name>P3F</name>
|
|
<description>Bit5 of M_FPDIR1</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "P3E" -->
|
|
<field>
|
|
<name>P3E</name>
|
|
<description>Bit4 of M_FPDIR1</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "P3D" -->
|
|
<field>
|
|
<name>P3D</name>
|
|
<description>Bit3 of M_FPDIR1</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "P3C" -->
|
|
<field>
|
|
<name>P3C</name>
|
|
<description>Bit2 of M_FPDIR1</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "P3B" -->
|
|
<field>
|
|
<name>P3B</name>
|
|
<description>Bit1 of M_FPDIR1</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
<!-- FIELD "P3A" -->
|
|
<field>
|
|
<name>P3A</name>
|
|
<description>Bit0 of M_FPDIR1</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "M_FPDOR0" -->
|
|
<register>
|
|
<name>M_FPDOR0</name>
|
|
<description>Mirror Fast GPIO Output Data Register 0</description>
|
|
<addressOffset>0xC0</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x000000FF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "P22" -->
|
|
<field>
|
|
<name>P22</name>
|
|
<description>Bit7 of M_FPDOR0</description>
|
|
<lsb>7</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "P23" -->
|
|
<field>
|
|
<name>P23</name>
|
|
<description>Bit6 of M_FPDOR0</description>
|
|
<lsb>6</lsb>
|
|
<msb>6</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "P15" -->
|
|
<field>
|
|
<name>P15</name>
|
|
<description>Bit5 of M_FPDOR0</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "P14" -->
|
|
<field>
|
|
<name>P14</name>
|
|
<description>Bit4 of M_FPDOR0</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "P13" -->
|
|
<field>
|
|
<name>P13</name>
|
|
<description>Bit3 of M_FPDOR0</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "P12" -->
|
|
<field>
|
|
<name>P12</name>
|
|
<description>Bit2 of M_FPDOR0</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "P11" -->
|
|
<field>
|
|
<name>P11</name>
|
|
<description>Bit1 of M_FPDOR0</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "P10" -->
|
|
<field>
|
|
<name>P10</name>
|
|
<description>Bit0 of M_FPDOR0</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<!-- REGISTER "M_FPDOR1" -->
|
|
<register>
|
|
<name>M_FPDOR1</name>
|
|
<description>Mirror Fast GPIO Output Data Register 1</description>
|
|
<addressOffset>0xC4</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x000000FF</resetMask>
|
|
<!-- FIELDS -->
|
|
<fields>
|
|
<!-- FIELD "P47" -->
|
|
<field>
|
|
<name>P47</name>
|
|
<description>Bit7 of M_FPDOR1</description>
|
|
<lsb>7</lsb>
|
|
<msb>7</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "P46" -->
|
|
<field>
|
|
<name>P46</name>
|
|
<description>Bit6 of M_FPDOR1</description>
|
|
<lsb>6</lsb>
|
|
<msb>6</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "P3F" -->
|
|
<field>
|
|
<name>P3F</name>
|
|
<description>Bit5 of M_FPDOR1</description>
|
|
<lsb>5</lsb>
|
|
<msb>5</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "P3E" -->
|
|
<field>
|
|
<name>P3E</name>
|
|
<description>Bit4 of M_FPDOR1</description>
|
|
<lsb>4</lsb>
|
|
<msb>4</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "P3D" -->
|
|
<field>
|
|
<name>P3D</name>
|
|
<description>Bit3 of M_FPDOR1</description>
|
|
<lsb>3</lsb>
|
|
<msb>3</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "P3C" -->
|
|
<field>
|
|
<name>P3C</name>
|
|
<description>Bit2 of M_FPDOR1</description>
|
|
<lsb>2</lsb>
|
|
<msb>2</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "P3B" -->
|
|
<field>
|
|
<name>P3B</name>
|
|
<description>Bit1 of M_FPDOR1</description>
|
|
<lsb>1</lsb>
|
|
<msb>1</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
<!-- FIELD "P3A" -->
|
|
<field>
|
|
<name>P3A</name>
|
|
<description>Bit0 of M_FPDOR1</description>
|
|
<lsb>0</lsb>
|
|
<msb>0</msb>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral>
|
|
</peripherals>
|
|
</device> |