538 lines
13 KiB
C
538 lines
13 KiB
C
/* USER CODE BEGIN Header */
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/**
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******************************************************************************
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* @file stm32h7xx_it.c
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* @brief Interrupt Service Routines.
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2025 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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*/
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/* USER CODE END Header */
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/* Includes ------------------------------------------------------------------*/
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#include "main.h"
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#include "stm32h7xx_it.h"
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/* Private includes ----------------------------------------------------------*/
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/* USER CODE BEGIN Includes */
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#include "bsp/uart.h"
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/* USER CODE END Includes */
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/* Private typedef -----------------------------------------------------------*/
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/* USER CODE BEGIN TD */
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/* USER CODE END TD */
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/* Private define ------------------------------------------------------------*/
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/* USER CODE BEGIN PD */
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/* USER CODE END PD */
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/* Private macro -------------------------------------------------------------*/
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/* USER CODE BEGIN PM */
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/* USER CODE END PM */
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/* Private variables ---------------------------------------------------------*/
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/* USER CODE BEGIN PV */
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/* USER CODE END PV */
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/* Private function prototypes -----------------------------------------------*/
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/* USER CODE BEGIN PFP */
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/* USER CODE END PFP */
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/* Private user code ---------------------------------------------------------*/
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/* USER CODE BEGIN 0 */
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/* USER CODE END 0 */
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/* External variables --------------------------------------------------------*/
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extern PCD_HandleTypeDef hpcd_USB_OTG_HS;
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extern DMA_HandleTypeDef hdma_adc1;
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extern FDCAN_HandleTypeDef hfdcan1;
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extern FDCAN_HandleTypeDef hfdcan2;
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extern FDCAN_HandleTypeDef hfdcan3;
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extern DMA_HandleTypeDef hdma_spi2_rx;
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extern DMA_HandleTypeDef hdma_spi2_tx;
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extern SPI_HandleTypeDef hspi2;
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extern DMA_HandleTypeDef hdma_uart5_rx;
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extern DMA_HandleTypeDef hdma_usart2_rx;
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extern DMA_HandleTypeDef hdma_usart2_tx;
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extern DMA_HandleTypeDef hdma_usart3_rx;
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extern DMA_HandleTypeDef hdma_usart3_tx;
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extern DMA_HandleTypeDef hdma_usart10_tx;
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extern UART_HandleTypeDef huart5;
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extern UART_HandleTypeDef huart7;
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extern UART_HandleTypeDef huart1;
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extern UART_HandleTypeDef huart2;
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extern UART_HandleTypeDef huart3;
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extern UART_HandleTypeDef huart10;
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extern TIM_HandleTypeDef htim23;
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/* USER CODE BEGIN EV */
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/* USER CODE END EV */
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/******************************************************************************/
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/* Cortex Processor Interruption and Exception Handlers */
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/******************************************************************************/
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/**
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* @brief This function handles Non maskable interrupt.
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*/
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void NMI_Handler(void)
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{
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/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
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/* USER CODE END NonMaskableInt_IRQn 0 */
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/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
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while (1)
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{
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}
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/* USER CODE END NonMaskableInt_IRQn 1 */
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}
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/**
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* @brief This function handles Hard fault interrupt.
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*/
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void HardFault_Handler(void)
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{
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/* USER CODE BEGIN HardFault_IRQn 0 */
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/* USER CODE END HardFault_IRQn 0 */
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while (1)
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{
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/* USER CODE BEGIN W1_HardFault_IRQn 0 */
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/* USER CODE END W1_HardFault_IRQn 0 */
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}
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}
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/**
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* @brief This function handles Memory management fault.
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*/
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void MemManage_Handler(void)
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{
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/* USER CODE BEGIN MemoryManagement_IRQn 0 */
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/* USER CODE END MemoryManagement_IRQn 0 */
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while (1)
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{
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/* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
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/* USER CODE END W1_MemoryManagement_IRQn 0 */
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}
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}
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/**
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* @brief This function handles Pre-fetch fault, memory access fault.
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*/
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void BusFault_Handler(void)
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{
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/* USER CODE BEGIN BusFault_IRQn 0 */
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/* USER CODE END BusFault_IRQn 0 */
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while (1)
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{
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/* USER CODE BEGIN W1_BusFault_IRQn 0 */
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/* USER CODE END W1_BusFault_IRQn 0 */
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}
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}
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/**
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* @brief This function handles Undefined instruction or illegal state.
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*/
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void UsageFault_Handler(void)
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{
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/* USER CODE BEGIN UsageFault_IRQn 0 */
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/* USER CODE END UsageFault_IRQn 0 */
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while (1)
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{
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/* USER CODE BEGIN W1_UsageFault_IRQn 0 */
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/* USER CODE END W1_UsageFault_IRQn 0 */
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}
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}
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/**
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* @brief This function handles Debug monitor.
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*/
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void DebugMon_Handler(void)
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{
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/* USER CODE BEGIN DebugMonitor_IRQn 0 */
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/* USER CODE END DebugMonitor_IRQn 0 */
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/* USER CODE BEGIN DebugMonitor_IRQn 1 */
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/* USER CODE END DebugMonitor_IRQn 1 */
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}
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/******************************************************************************/
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/* STM32H7xx Peripheral Interrupt Handlers */
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/* Add here the Interrupt Handlers for the used peripherals. */
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/* For the available peripheral interrupt handler names, */
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/* please refer to the startup file (startup_stm32h7xx.s). */
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/******************************************************************************/
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/**
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* @brief This function handles DMA1 stream0 global interrupt.
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*/
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void DMA1_Stream0_IRQHandler(void)
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{
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/* USER CODE BEGIN DMA1_Stream0_IRQn 0 */
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/* USER CODE END DMA1_Stream0_IRQn 0 */
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HAL_DMA_IRQHandler(&hdma_adc1);
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/* USER CODE BEGIN DMA1_Stream0_IRQn 1 */
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/* USER CODE END DMA1_Stream0_IRQn 1 */
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}
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/**
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* @brief This function handles DMA1 stream1 global interrupt.
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*/
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void DMA1_Stream1_IRQHandler(void)
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{
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/* USER CODE BEGIN DMA1_Stream1_IRQn 0 */
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/* USER CODE END DMA1_Stream1_IRQn 0 */
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HAL_DMA_IRQHandler(&hdma_uart5_rx);
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/* USER CODE BEGIN DMA1_Stream1_IRQn 1 */
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/* USER CODE END DMA1_Stream1_IRQn 1 */
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}
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/**
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* @brief This function handles DMA1 stream2 global interrupt.
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*/
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void DMA1_Stream2_IRQHandler(void)
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{
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/* USER CODE BEGIN DMA1_Stream2_IRQn 0 */
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/* USER CODE END DMA1_Stream2_IRQn 0 */
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HAL_DMA_IRQHandler(&hdma_spi2_rx);
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/* USER CODE BEGIN DMA1_Stream2_IRQn 1 */
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/* USER CODE END DMA1_Stream2_IRQn 1 */
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}
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/**
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* @brief This function handles DMA1 stream3 global interrupt.
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*/
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void DMA1_Stream3_IRQHandler(void)
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{
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/* USER CODE BEGIN DMA1_Stream3_IRQn 0 */
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/* USER CODE END DMA1_Stream3_IRQn 0 */
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HAL_DMA_IRQHandler(&hdma_spi2_tx);
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/* USER CODE BEGIN DMA1_Stream3_IRQn 1 */
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/* USER CODE END DMA1_Stream3_IRQn 1 */
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}
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/**
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* @brief This function handles DMA1 stream4 global interrupt.
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*/
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void DMA1_Stream4_IRQHandler(void)
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{
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/* USER CODE BEGIN DMA1_Stream4_IRQn 0 */
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/* USER CODE END DMA1_Stream4_IRQn 0 */
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HAL_DMA_IRQHandler(&hdma_usart3_rx);
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/* USER CODE BEGIN DMA1_Stream4_IRQn 1 */
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/* USER CODE END DMA1_Stream4_IRQn 1 */
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}
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/**
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* @brief This function handles DMA1 stream5 global interrupt.
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*/
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void DMA1_Stream5_IRQHandler(void)
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{
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/* USER CODE BEGIN DMA1_Stream5_IRQn 0 */
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/* USER CODE END DMA1_Stream5_IRQn 0 */
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HAL_DMA_IRQHandler(&hdma_usart3_tx);
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/* USER CODE BEGIN DMA1_Stream5_IRQn 1 */
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/* USER CODE END DMA1_Stream5_IRQn 1 */
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}
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/**
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* @brief This function handles DMA1 stream6 global interrupt.
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*/
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void DMA1_Stream6_IRQHandler(void)
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{
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/* USER CODE BEGIN DMA1_Stream6_IRQn 0 */
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/* USER CODE END DMA1_Stream6_IRQn 0 */
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HAL_DMA_IRQHandler(&hdma_usart2_rx);
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/* USER CODE BEGIN DMA1_Stream6_IRQn 1 */
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/* USER CODE END DMA1_Stream6_IRQn 1 */
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}
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/**
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* @brief This function handles FDCAN1 interrupt 0.
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*/
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void FDCAN1_IT0_IRQHandler(void)
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{
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/* USER CODE BEGIN FDCAN1_IT0_IRQn 0 */
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/* USER CODE END FDCAN1_IT0_IRQn 0 */
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HAL_FDCAN_IRQHandler(&hfdcan1);
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/* USER CODE BEGIN FDCAN1_IT0_IRQn 1 */
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/* USER CODE END FDCAN1_IT0_IRQn 1 */
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}
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/**
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* @brief This function handles FDCAN2 interrupt 0.
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*/
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void FDCAN2_IT0_IRQHandler(void)
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{
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/* USER CODE BEGIN FDCAN2_IT0_IRQn 0 */
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/* USER CODE END FDCAN2_IT0_IRQn 0 */
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HAL_FDCAN_IRQHandler(&hfdcan2);
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/* USER CODE BEGIN FDCAN2_IT0_IRQn 1 */
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/* USER CODE END FDCAN2_IT0_IRQn 1 */
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}
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/**
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* @brief This function handles FDCAN1 interrupt 1.
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*/
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void FDCAN1_IT1_IRQHandler(void)
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{
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/* USER CODE BEGIN FDCAN1_IT1_IRQn 0 */
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/* USER CODE END FDCAN1_IT1_IRQn 0 */
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HAL_FDCAN_IRQHandler(&hfdcan1);
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/* USER CODE BEGIN FDCAN1_IT1_IRQn 1 */
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/* USER CODE END FDCAN1_IT1_IRQn 1 */
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}
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/**
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* @brief This function handles FDCAN2 interrupt 1.
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*/
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void FDCAN2_IT1_IRQHandler(void)
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{
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/* USER CODE BEGIN FDCAN2_IT1_IRQn 0 */
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/* USER CODE END FDCAN2_IT1_IRQn 0 */
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HAL_FDCAN_IRQHandler(&hfdcan2);
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/* USER CODE BEGIN FDCAN2_IT1_IRQn 1 */
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/* USER CODE END FDCAN2_IT1_IRQn 1 */
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}
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/**
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* @brief This function handles SPI2 global interrupt.
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*/
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void SPI2_IRQHandler(void)
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{
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/* USER CODE BEGIN SPI2_IRQn 0 */
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/* USER CODE END SPI2_IRQn 0 */
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HAL_SPI_IRQHandler(&hspi2);
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/* USER CODE BEGIN SPI2_IRQn 1 */
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/* USER CODE END SPI2_IRQn 1 */
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}
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/**
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* @brief This function handles USART1 global interrupt.
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*/
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void USART1_IRQHandler(void)
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{
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/* USER CODE BEGIN USART1_IRQn 0 */
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/* USER CODE END USART1_IRQn 0 */
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HAL_UART_IRQHandler(&huart1);
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/* USER CODE BEGIN USART1_IRQn 1 */
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/* USER CODE END USART1_IRQn 1 */
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}
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/**
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* @brief This function handles USART2 global interrupt.
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*/
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void USART2_IRQHandler(void)
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{
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/* USER CODE BEGIN USART2_IRQn 0 */
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/* USER CODE END USART2_IRQn 0 */
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HAL_UART_IRQHandler(&huart2);
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/* USER CODE BEGIN USART2_IRQn 1 */
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BSP_UART_IRQHandler(&huart2);
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/* USER CODE END USART2_IRQn 1 */
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}
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/**
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* @brief This function handles USART3 global interrupt.
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*/
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void USART3_IRQHandler(void)
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{
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/* USER CODE BEGIN USART3_IRQn 0 */
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/* USER CODE END USART3_IRQn 0 */
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HAL_UART_IRQHandler(&huart3);
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/* USER CODE BEGIN USART3_IRQn 1 */
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BSP_UART_IRQHandler(&huart3);
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/* USER CODE END USART3_IRQn 1 */
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}
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/**
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* @brief This function handles EXTI line[15:10] interrupts.
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*/
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void EXTI15_10_IRQHandler(void)
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{
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/* USER CODE BEGIN EXTI15_10_IRQn 0 */
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/* USER CODE END EXTI15_10_IRQn 0 */
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HAL_GPIO_EXTI_IRQHandler(ACCL_INT_Pin);
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HAL_GPIO_EXTI_IRQHandler(GYRO_INT_Pin);
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HAL_GPIO_EXTI_IRQHandler(USER_KEY_Pin);
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/* USER CODE BEGIN EXTI15_10_IRQn 1 */
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/* USER CODE END EXTI15_10_IRQn 1 */
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}
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/**
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* @brief This function handles DMA1 stream7 global interrupt.
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*/
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void DMA1_Stream7_IRQHandler(void)
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{
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/* USER CODE BEGIN DMA1_Stream7_IRQn 0 */
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/* USER CODE END DMA1_Stream7_IRQn 0 */
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HAL_DMA_IRQHandler(&hdma_usart2_tx);
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/* USER CODE BEGIN DMA1_Stream7_IRQn 1 */
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/* USER CODE END DMA1_Stream7_IRQn 1 */
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}
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/**
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* @brief This function handles UART5 global interrupt.
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*/
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void UART5_IRQHandler(void)
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{
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/* USER CODE BEGIN UART5_IRQn 0 */
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/* USER CODE END UART5_IRQn 0 */
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HAL_UART_IRQHandler(&huart5);
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/* USER CODE BEGIN UART5_IRQn 1 */
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/* USER CODE END UART5_IRQn 1 */
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}
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/**
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* @brief This function handles DMA2 stream0 global interrupt.
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*/
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void DMA2_Stream0_IRQHandler(void)
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{
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/* USER CODE BEGIN DMA2_Stream0_IRQn 0 */
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/* USER CODE END DMA2_Stream0_IRQn 0 */
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HAL_DMA_IRQHandler(&hdma_usart10_tx);
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/* USER CODE BEGIN DMA2_Stream0_IRQn 1 */
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/* USER CODE END DMA2_Stream0_IRQn 1 */
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}
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/**
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* @brief This function handles USB On The Go HS global interrupt.
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*/
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void OTG_HS_IRQHandler(void)
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{
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/* USER CODE BEGIN OTG_HS_IRQn 0 */
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/* USER CODE END OTG_HS_IRQn 0 */
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HAL_PCD_IRQHandler(&hpcd_USB_OTG_HS);
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/* USER CODE BEGIN OTG_HS_IRQn 1 */
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/* USER CODE END OTG_HS_IRQn 1 */
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}
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/**
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* @brief This function handles UART7 global interrupt.
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*/
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void UART7_IRQHandler(void)
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{
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/* USER CODE BEGIN UART7_IRQn 0 */
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/* USER CODE END UART7_IRQn 0 */
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HAL_UART_IRQHandler(&huart7);
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/* USER CODE BEGIN UART7_IRQn 1 */
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/* USER CODE END UART7_IRQn 1 */
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}
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/**
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* @brief This function handles USART10 global interrupt.
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*/
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void USART10_IRQHandler(void)
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{
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/* USER CODE BEGIN USART10_IRQn 0 */
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/* USER CODE END USART10_IRQn 0 */
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HAL_UART_IRQHandler(&huart10);
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/* USER CODE BEGIN USART10_IRQn 1 */
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/* USER CODE END USART10_IRQn 1 */
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}
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/**
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* @brief This function handles FDCAN3 interrupt 0.
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*/
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void FDCAN3_IT0_IRQHandler(void)
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{
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/* USER CODE BEGIN FDCAN3_IT0_IRQn 0 */
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/* USER CODE END FDCAN3_IT0_IRQn 0 */
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HAL_FDCAN_IRQHandler(&hfdcan3);
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/* USER CODE BEGIN FDCAN3_IT0_IRQn 1 */
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/* USER CODE END FDCAN3_IT0_IRQn 1 */
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}
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/**
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* @brief This function handles FDCAN3 interrupt 1.
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*/
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void FDCAN3_IT1_IRQHandler(void)
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{
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/* USER CODE BEGIN FDCAN3_IT1_IRQn 0 */
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/* USER CODE END FDCAN3_IT1_IRQn 0 */
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HAL_FDCAN_IRQHandler(&hfdcan3);
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/* USER CODE BEGIN FDCAN3_IT1_IRQn 1 */
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/* USER CODE END FDCAN3_IT1_IRQn 1 */
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}
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/**
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* @brief This function handles TIM23 global interrupt.
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*/
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void TIM23_IRQHandler(void)
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{
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/* USER CODE BEGIN TIM23_IRQn 0 */
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/* USER CODE END TIM23_IRQn 0 */
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HAL_TIM_IRQHandler(&htim23);
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/* USER CODE BEGIN TIM23_IRQn 1 */
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/* USER CODE END TIM23_IRQn 1 */
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}
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/* USER CODE BEGIN 1 */
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/* USER CODE END 1 */
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