MR16/MDK-ARM/MR16/MR16.htm
2025-11-22 15:32:30 +08:00

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<title>Static Call Graph - [MR16\MR16.axf]</title></head>
<body><HR>
<H1>Static Call Graph for image MR16\MR16.axf</H1><HR>
<BR><P>#&#060CALLGRAPH&#062# ARM Linker, 5060960: Last Updated: Sat Nov 22 15:32:16 2025
<BR><P>
<H3>Maximum Stack Usage = 240 bytes + Unknown(Functions without stacksize, Cycles, Untraceable Function Pointers)</H3><H3>
Call chain for Maximum Stack Depth:</H3>
__rt_entry_main &rArr; main &rArr; SX1281ProcessIrqs &rArr; SX1281GetIrqStatus &rArr; SX1281HalReadCommand &rArr; SpiInOut &rArr; BSP_SPI_TransmitReceive &rArr; HAL_SPI_TransmitReceive &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
<P>
<H3>
Functions with no stack information
</H3><UL>
<LI><a href="#[c0]">__user_initial_stackheap</a>
</UL>
</UL>
<P>
<H3>
Mutually Recursive functions
</H3> <LI><a href="#[25]">ADC1_2_IRQHandler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[25]">ADC1_2_IRQHandler</a><BR>
<LI><a href="#[d]">BusFault_Handler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[d]">BusFault_Handler</a><BR>
<LI><a href="#[b]">HardFault_Handler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[b]">HardFault_Handler</a><BR>
<LI><a href="#[c]">MemManage_Handler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[c]">MemManage_Handler</a><BR>
<LI><a href="#[a]">NMI_Handler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[a]">NMI_Handler</a><BR>
<LI><a href="#[e]">UsageFault_Handler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[e]">UsageFault_Handler</a><BR>
<LI><a href="#[13b]">UART_EndRxTransfer</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[13b]">UART_EndRxTransfer</a><BR>
</UL>
<P>
<H3>
Function Pointers
</H3><UL>
<LI><a href="#[25]">ADC1_2_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
<LI><a href="#[d]">BusFault_Handler</a> from stm32f1xx_it.o(i.BusFault_Handler) referenced from startup_stm32f103xb.o(RESET)
<LI><a href="#[28]">CAN1_RX1_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
<LI><a href="#[29]">CAN1_SCE_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
<LI><a href="#[1e]">DMA1_Channel1_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
<LI><a href="#[1f]">DMA1_Channel2_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
<LI><a href="#[20]">DMA1_Channel3_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
<LI><a href="#[21]">DMA1_Channel4_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
<LI><a href="#[22]">DMA1_Channel5_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
<LI><a href="#[23]">DMA1_Channel6_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
<LI><a href="#[24]">DMA1_Channel7_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
<LI><a href="#[10]">DebugMon_Handler</a> from stm32f1xx_it.o(i.DebugMon_Handler) referenced from startup_stm32f103xb.o(RESET)
<LI><a href="#[19]">EXTI0_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
<LI><a href="#[3b]">EXTI15_10_IRQHandler</a> from stm32f1xx_it.o(i.EXTI15_10_IRQHandler) referenced from startup_stm32f103xb.o(RESET)
<LI><a href="#[1a]">EXTI1_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
<LI><a href="#[1b]">EXTI2_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
<LI><a href="#[1c]">EXTI3_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
<LI><a href="#[1d]">EXTI4_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
<LI><a href="#[2a]">EXTI9_5_IRQHandler</a> from stm32f1xx_it.o(i.EXTI9_5_IRQHandler) referenced from startup_stm32f103xb.o(RESET)
<LI><a href="#[17]">FLASH_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
<LI><a href="#[b]">HardFault_Handler</a> from stm32f1xx_it.o(i.HardFault_Handler) referenced from startup_stm32f103xb.o(RESET)
<LI><a href="#[33]">I2C1_ER_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
<LI><a href="#[32]">I2C1_EV_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
<LI><a href="#[35]">I2C2_ER_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
<LI><a href="#[34]">I2C2_EV_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
<LI><a href="#[c]">MemManage_Handler</a> from stm32f1xx_it.o(i.MemManage_Handler) referenced from startup_stm32f103xb.o(RESET)
<LI><a href="#[a]">NMI_Handler</a> from stm32f1xx_it.o(i.NMI_Handler) referenced from startup_stm32f103xb.o(RESET)
<LI><a href="#[85]">OnRxDone</a> from main.o(i.OnRxDone) referenced from main.o(.data)
<LI><a href="#[88]">OnRxError</a> from main.o(i.OnRxError) referenced from main.o(.data)
<LI><a href="#[87]">OnRxTimeout</a> from main.o(i.OnRxTimeout) referenced from main.o(.data)
<LI><a href="#[84]">OnTxDone</a> from main.o(i.OnTxDone) referenced from main.o(.data)
<LI><a href="#[86]">OnTxTimeout</a> from main.o(i.OnTxTimeout) referenced from main.o(.data)
<LI><a href="#[14]">PVD_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
<LI><a href="#[11]">PendSV_Handler</a> from stm32f1xx_it.o(i.PendSV_Handler) referenced from startup_stm32f103xb.o(RESET)
<LI><a href="#[18]">RCC_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
<LI><a href="#[3c]">RTC_Alarm_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
<LI><a href="#[16]">RTC_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
<LI><a href="#[9]">Reset_Handler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
<LI><a href="#[36]">SPI1_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
<LI><a href="#[37]">SPI2_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
<LI><a href="#[44]">SPI_DMAError</a> from stm32f1xx_hal_spi.o(i.SPI_DMAError) referenced from stm32f1xx_hal_spi.o(i.HAL_SPI_TransmitReceive_DMA)
<LI><a href="#[44]">SPI_DMAError</a> from stm32f1xx_hal_spi.o(i.SPI_DMAError) referenced from stm32f1xx_hal_spi.o(i.HAL_SPI_Transmit_DMA)
<LI><a href="#[45]">SPI_DMAHalfReceiveCplt</a> from stm32f1xx_hal_spi.o(i.SPI_DMAHalfReceiveCplt) referenced from stm32f1xx_hal_spi.o(i.HAL_SPI_TransmitReceive_DMA)
<LI><a href="#[47]">SPI_DMAHalfTransmitCplt</a> from stm32f1xx_hal_spi.o(i.SPI_DMAHalfTransmitCplt) referenced from stm32f1xx_hal_spi.o(i.HAL_SPI_Transmit_DMA)
<LI><a href="#[42]">SPI_DMAHalfTransmitReceiveCplt</a> from stm32f1xx_hal_spi.o(i.SPI_DMAHalfTransmitReceiveCplt) referenced from stm32f1xx_hal_spi.o(i.HAL_SPI_TransmitReceive_DMA)
<LI><a href="#[46]">SPI_DMAReceiveCplt</a> from stm32f1xx_hal_spi.o(i.SPI_DMAReceiveCplt) referenced from stm32f1xx_hal_spi.o(i.HAL_SPI_TransmitReceive_DMA)
<LI><a href="#[48]">SPI_DMATransmitCplt</a> from stm32f1xx_hal_spi.o(i.SPI_DMATransmitCplt) referenced from stm32f1xx_hal_spi.o(i.HAL_SPI_Transmit_DMA)
<LI><a href="#[43]">SPI_DMATransmitReceiveCplt</a> from stm32f1xx_hal_spi.o(i.SPI_DMATransmitReceiveCplt) referenced from stm32f1xx_hal_spi.o(i.HAL_SPI_TransmitReceive_DMA)
<LI><a href="#[f]">SVC_Handler</a> from stm32f1xx_it.o(i.SVC_Handler) referenced from startup_stm32f103xb.o(RESET)
<LI><a href="#[77]">SX1281Calibrate</a> from sx1281.o(i.SX1281Calibrate) referenced from sx1281-hal.o(.constdata)
<LI><a href="#[76]">SX1281ClearIrqStatus</a> from sx1281.o(i.SX1281ClearIrqStatus) referenced from sx1281-hal.o(.constdata)
<LI><a href="#[57]">SX1281GetFirmwareVersion</a> from sx1281.o(i.SX1281GetFirmwareVersion) referenced from sx1281-hal.o(.constdata)
<LI><a href="#[83]">SX1281GetFrequencyError</a> from sx1281.o(i.SX1281GetFrequencyError) referenced from sx1281-hal.o(.constdata)
<LI><a href="#[75]">SX1281GetIrqStatus</a> from sx1281.o(i.SX1281GetIrqStatus) referenced from sx1281-hal.o(.constdata)
<LI><a href="#[68]">SX1281GetOpMode</a> from sx1281.o(i.SX1281GetOpMode) referenced from sx1281-hal.o(.constdata)
<LI><a href="#[73]">SX1281GetPacketStatus</a> from sx1281.o(i.SX1281GetPacketStatus) referenced from sx1281-hal.o(.constdata)
<LI><a href="#[70]">SX1281GetPacketType</a> from sx1281.o(i.SX1281GetPacketType) referenced from sx1281-hal.o(.constdata)
<LI><a href="#[63]">SX1281GetPayload</a> from sx1281.o(i.SX1281GetPayload) referenced from sx1281-hal.o(.constdata)
<LI><a href="#[74]">SX1281GetRssiInst</a> from sx1281.o(i.SX1281GetRssiInst) referenced from sx1281-hal.o(.constdata)
<LI><a href="#[72]">SX1281GetRxBufferStatus</a> from sx1281.o(i.SX1281GetRxBufferStatus) referenced from sx1281-hal.o(.constdata)
<LI><a href="#[4d]">SX1281GetStatus</a> from sx1281.o(i.SX1281GetStatus) referenced from sx1281-hal.o(.constdata)
<LI><a href="#[56]">SX1281HalGetDioStatus</a> from sx1281-hal.o(i.SX1281HalGetDioStatus) referenced from sx1281-hal.o(.constdata)
<LI><a href="#[55]">SX1281HalReadBuffer</a> from sx1281-hal.o(i.SX1281HalReadBuffer) referenced from sx1281-hal.o(.constdata)
<LI><a href="#[4f]">SX1281HalReadCommand</a> from sx1281-hal.o(i.SX1281HalReadCommand) referenced from sx1281-hal.o(.constdata)
<LI><a href="#[53]">SX1281HalReadRegister</a> from sx1281-hal.o(i.SX1281HalReadRegister) referenced from sx1281-hal.o(.constdata)
<LI><a href="#[52]">SX1281HalReadRegisters</a> from sx1281-hal.o(i.SX1281HalReadRegisters) referenced from sx1281-hal.o(.constdata)
<LI><a href="#[4c]">SX1281HalReset</a> from sx1281-hal.o(i.SX1281HalReset) referenced from sx1281-hal.o(.constdata)
<LI><a href="#[54]">SX1281HalWriteBuffer</a> from sx1281-hal.o(i.SX1281HalWriteBuffer) referenced from sx1281-hal.o(.constdata)
<LI><a href="#[4e]">SX1281HalWriteCommand</a> from sx1281-hal.o(i.SX1281HalWriteCommand) referenced from sx1281-hal.o(.constdata)
<LI><a href="#[51]">SX1281HalWriteRegister</a> from sx1281-hal.o(i.SX1281HalWriteRegister) referenced from sx1281-hal.o(.constdata)
<LI><a href="#[50]">SX1281HalWriteRegisters</a> from sx1281-hal.o(i.SX1281HalWriteRegisters) referenced from sx1281-hal.o(.constdata)
<LI><a href="#[4b]">SX1281Init</a> from sx1281.o(i.SX1281Init) referenced from sx1281-hal.o(.constdata)
<LI><a href="#[89]">SX1281OnDioIrq</a> from sx1281.o(i.SX1281OnDioIrq) referenced from sx1281.o(.data)
<LI><a href="#[64]">SX1281SendPayload</a> from sx1281.o(i.SX1281SendPayload) referenced from sx1281-hal.o(.constdata)
<LI><a href="#[7a]">SX1281SetAutoFS</a> from sx1281.o(i.SX1281SetAutoFS) referenced from sx1281-hal.o(.constdata)
<LI><a href="#[79]">SX1281SetAutoTx</a> from sx1281.o(i.SX1281SetAutoTx) referenced from sx1281-hal.o(.constdata)
<LI><a href="#[7f]">SX1281SetBleAccessAddress</a> from sx1281.o(i.SX1281SetBleAccessAddress) referenced from sx1281-hal.o(.constdata)
<LI><a href="#[80]">SX1281SetBleAdvertizerAccessAddress</a> from sx1281.o(i.SX1281SetBleAdvertizerAccessAddress) referenced from sx1281-hal.o(.constdata)
<LI><a href="#[5e]">SX1281SetBufferBaseAddresses</a> from sx1281.o(i.SX1281SetBufferBaseAddresses) referenced from sx1281-hal.o(.constdata)
<LI><a href="#[6d]">SX1281SetCad</a> from sx1281.o(i.SX1281SetCad) referenced from sx1281-hal.o(.constdata)
<LI><a href="#[71]">SX1281SetCadParams</a> from sx1281.o(i.SX1281SetCadParams) referenced from sx1281-hal.o(.constdata)
<LI><a href="#[81]">SX1281SetCrcPolynomial</a> from sx1281.o(i.SX1281SetCrcPolynomial) referenced from sx1281-hal.o(.constdata)
<LI><a href="#[7e]">SX1281SetCrcSeed</a> from sx1281.o(i.SX1281SetCrcSeed) referenced from sx1281-hal.o(.constdata)
<LI><a href="#[60]">SX1281SetDioIrqParams</a> from sx1281.o(i.SX1281SetDioIrqParams) referenced from sx1281-hal.o(.constdata)
<LI><a href="#[6a]">SX1281SetFs</a> from sx1281.o(i.SX1281SetFs) referenced from sx1281-hal.o(.constdata)
<LI><a href="#[66]">SX1281SetInterruptMode</a> from sx1281.o(i.SX1281SetInterruptMode) referenced from sx1281-hal.o(.constdata)
<LI><a href="#[7b]">SX1281SetLongPreamble</a> from sx1281.o(i.SX1281SetLongPreamble) referenced from sx1281-hal.o(.constdata)
<LI><a href="#[5b]">SX1281SetModulationParams</a> from sx1281.o(i.SX1281SetModulationParams) referenced from sx1281-hal.o(.constdata)
<LI><a href="#[5c]">SX1281SetPacketParams</a> from sx1281.o(i.SX1281SetPacketParams) referenced from sx1281-hal.o(.constdata)
<LI><a href="#[5a]">SX1281SetPacketType</a> from sx1281.o(i.SX1281SetPacketType) referenced from sx1281-hal.o(.constdata)
<LI><a href="#[7c]">SX1281SetPayload</a> from sx1281.o(i.SX1281SetPayload) referenced from sx1281-hal.o(.constdata)
<LI><a href="#[65]">SX1281SetPollingMode</a> from sx1281.o(i.SX1281SetPollingMode) referenced from sx1281-hal.o(.constdata)
<LI><a href="#[67]">SX1281SetRegistersDefault</a> from sx1281.o(i.SX1281SetRegistersDefault) referenced from sx1281-hal.o(.constdata)
<LI><a href="#[58]">SX1281SetRegulatorMode</a> from sx1281.o(i.SX1281SetRegulatorMode) referenced from sx1281-hal.o(.constdata)
<LI><a href="#[5d]">SX1281SetRfFrequency</a> from sx1281.o(i.SX1281SetRfFrequency) referenced from sx1281-hal.o(.constdata)
<LI><a href="#[62]">SX1281SetRx</a> from sx1281.o(i.SX1281SetRx) referenced from sx1281-hal.o(.constdata)
<LI><a href="#[6c]">SX1281SetRxDutyCycle</a> from sx1281.o(i.SX1281SetRxDutyCycle) referenced from sx1281-hal.o(.constdata)
<LI><a href="#[78]">SX1281SetSaveContext</a> from sx1281.o(i.SX1281SetSaveContext) referenced from sx1281-hal.o(.constdata)
<LI><a href="#[69]">SX1281SetSleep</a> from sx1281.o(i.SX1281SetSleep) referenced from sx1281-hal.o(.constdata)
<LI><a href="#[59]">SX1281SetStandby</a> from sx1281.o(i.SX1281SetStandby) referenced from sx1281-hal.o(.constdata)
<LI><a href="#[61]">SX1281SetSyncWord</a> from sx1281.o(i.SX1281SetSyncWord) referenced from sx1281-hal.o(.constdata)
<LI><a href="#[7d]">SX1281SetSyncWordErrorTolerance</a> from sx1281.o(i.SX1281SetSyncWordErrorTolerance) referenced from sx1281-hal.o(.constdata)
<LI><a href="#[6b]">SX1281SetTx</a> from sx1281.o(i.SX1281SetTx) referenced from sx1281-hal.o(.constdata)
<LI><a href="#[6f]">SX1281SetTxContinuousPreamble</a> from sx1281.o(i.SX1281SetTxContinuousPreamble) referenced from sx1281-hal.o(.constdata)
<LI><a href="#[6e]">SX1281SetTxContinuousWave</a> from sx1281.o(i.SX1281SetTxContinuousWave) referenced from sx1281-hal.o(.constdata)
<LI><a href="#[5f]">SX1281SetTxParams</a> from sx1281.o(i.SX1281SetTxParams) referenced from sx1281-hal.o(.constdata)
<LI><a href="#[82]">SX1281SetWhiteningSeed</a> from sx1281.o(i.SX1281SetWhiteningSeed) referenced from sx1281-hal.o(.constdata)
<LI><a href="#[12]">SysTick_Handler</a> from stm32f1xx_it.o(i.SysTick_Handler) referenced from startup_stm32f103xb.o(RESET)
<LI><a href="#[3e]">SystemInit</a> from system_stm32f1xx.o(i.SystemInit) referenced from startup_stm32f103xb.o(.text)
<LI><a href="#[15]">TAMPER_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
<LI><a href="#[2b]">TIM1_BRK_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
<LI><a href="#[2e]">TIM1_CC_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
<LI><a href="#[2d]">TIM1_TRG_COM_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
<LI><a href="#[2c]">TIM1_UP_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
<LI><a href="#[2f]">TIM2_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
<LI><a href="#[30]">TIM3_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
<LI><a href="#[31]">TIM4_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
<LI><a href="#[38]">USART1_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
<LI><a href="#[39]">USART2_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
<LI><a href="#[3a]">USART3_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
<LI><a href="#[3d]">USBWakeUp_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
<LI><a href="#[26]">USB_HP_CAN1_TX_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
<LI><a href="#[27]">USB_LP_CAN1_RX0_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
<LI><a href="#[e]">UsageFault_Handler</a> from stm32f1xx_it.o(i.UsageFault_Handler) referenced from startup_stm32f103xb.o(RESET)
<LI><a href="#[13]">WWDG_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
<LI><a href="#[8a]">__main</a> from __main.o(!!!main) referenced from startup_stm32f103xb.o(.text)
<LI><a href="#[41]">_printf_input_char</a> from _printf_char_common.o(.text) referenced from _printf_char_common.o(.text)
<LI><a href="#[40]">fputc</a> from main.o(i.fputc) referenced from _printf_char_file.o(.text)
<LI><a href="#[4a]">tx_cplt_cb</a> from hw-spi.o(i.tx_cplt_cb) referenced from hw-spi.o(i.SpiInit)
<LI><a href="#[49]">txrx_cplt_cb</a> from hw-spi.o(i.txrx_cplt_cb) referenced from hw-spi.o(i.SpiInit)
</UL>
<P>
<H3>
Global Symbols
</H3>
<P><STRONG><a name="[8a]"></a>__main</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, __main.o(!!!main))
<BR><BR>[Calls]<UL><LI><a href="#[8c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_entry
<LI><a href="#[8b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__scatterload
</UL>
<P><STRONG><a name="[8b]"></a>__scatterload</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, __scatter.o(!!!scatter))
<BR><BR>[Called By]<UL><LI><a href="#[8a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__main
</UL>
<P><STRONG><a name="[8d]"></a>__scatterload_rt2</STRONG> (Thumb, 44 bytes, Stack size unknown bytes, __scatter.o(!!!scatter), UNUSED)
<BR><BR>[Calls]<UL><LI><a href="#[8c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_entry
</UL>
<P><STRONG><a name="[144]"></a>__scatterload_rt2_thumb_only</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, __scatter.o(!!!scatter), UNUSED)
<P><STRONG><a name="[145]"></a>__scatterload_null</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, __scatter.o(!!!scatter), UNUSED)
<P><STRONG><a name="[8e]"></a>__scatterload_copy</STRONG> (Thumb, 26 bytes, Stack size unknown bytes, __scatter_copy.o(!!handler_copy), UNUSED)
<BR><BR>[Calls]<UL><LI><a href="#[8e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__scatterload_copy
</UL>
<BR>[Called By]<UL><LI><a href="#[8e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__scatterload_copy
</UL>
<P><STRONG><a name="[146]"></a>__scatterload_zeroinit</STRONG> (Thumb, 28 bytes, Stack size unknown bytes, __scatter_zi.o(!!handler_zi), UNUSED)
<P><STRONG><a name="[8f]"></a>_printf_d</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, _printf_d.o(.ARM.Collect$$_printf_percent$$00000009))
<BR><BR>[Stack]<UL><LI>Max Depth = 72 + Unknown Stack Size
<LI>Call Chain = _printf_d &rArr; _printf_int_dec &rArr; _printf_int_common &rArr; _printf_post_padding
</UL>
<BR>[Calls]<UL><LI><a href="#[90]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_printf_int_dec
</UL>
<P><STRONG><a name="[ae]"></a>_printf_percent</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, _printf_percent.o(.ARM.Collect$$_printf_percent$$00000000))
<BR><BR>[Called By]<UL><LI><a href="#[ac]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__printf
</UL>
<P><STRONG><a name="[91]"></a>_printf_x</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, _printf_x.o(.ARM.Collect$$_printf_percent$$0000000C))
<BR><BR>[Stack]<UL><LI>Max Depth = 64 + Unknown Stack Size
<LI>Call Chain = _printf_x &rArr; _printf_int_hex &rArr; _printf_int_common &rArr; _printf_post_padding
</UL>
<BR>[Calls]<UL><LI><a href="#[92]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_printf_int_hex
</UL>
<P><STRONG><a name="[93]"></a>_printf_s</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, _printf_s.o(.ARM.Collect$$_printf_percent$$00000014))
<BR><BR>[Stack]<UL><LI>Max Depth = 40 + Unknown Stack Size
<LI>Call Chain = _printf_s &rArr; _printf_string &rArr; _printf_cs_common &rArr; _printf_str &rArr; _printf_post_padding
</UL>
<BR>[Calls]<UL><LI><a href="#[94]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_printf_string
</UL>
<P><STRONG><a name="[147]"></a>_printf_percent_end</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, _printf_percent_end.o(.ARM.Collect$$_printf_percent$$00000017))
<P><STRONG><a name="[9e]"></a>__rt_lib_init</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit.o(.ARM.Collect$$libinit$$00000000))
<BR><BR>[Called By]<UL><LI><a href="#[9d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_entry_li
</UL>
<P><STRONG><a name="[148]"></a>__rt_lib_init_fp_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000002))
<P><STRONG><a name="[95]"></a>__rt_lib_init_heap_2</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000005))
<BR><BR>[Stack]<UL><LI>Max Depth = 64 + Unknown Stack Size
<LI>Call Chain = __rt_lib_init_heap_2 &rArr; _init_alloc &rArr; __rt_SIGRTMEM &rArr; __rt_SIGRTMEM_inner &rArr; __default_signal_display &rArr; _ttywrch
</UL>
<BR>[Calls]<UL><LI><a href="#[96]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_init_alloc
</UL>
<P><STRONG><a name="[149]"></a>__rt_lib_init_preinit_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000004))
<P><STRONG><a name="[14a]"></a>__rt_lib_init_atexit_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$0000001B))
<P><STRONG><a name="[14b]"></a>__rt_lib_init_clock_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000021))
<P><STRONG><a name="[14c]"></a>__rt_lib_init_fp_trap_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$0000001F))
<P><STRONG><a name="[14d]"></a>__rt_lib_init_getenv_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000023))
<P><STRONG><a name="[14e]"></a>__rt_lib_init_heap_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$0000000A))
<P><STRONG><a name="[14f]"></a>__rt_lib_init_lc_collate_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000011))
<P><STRONG><a name="[150]"></a>__rt_lib_init_lc_ctype_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000013))
<P><STRONG><a name="[151]"></a>__rt_lib_init_lc_monetary_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000015))
<P><STRONG><a name="[152]"></a>__rt_lib_init_lc_numeric_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000017))
<P><STRONG><a name="[153]"></a>__rt_lib_init_lc_time_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000019))
<P><STRONG><a name="[154]"></a>__rt_lib_init_rand_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$0000000E))
<P><STRONG><a name="[155]"></a>__rt_lib_init_signal_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$0000001D))
<P><STRONG><a name="[97]"></a>__rt_lib_init_stdio_2</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000024))
<BR><BR>[Stack]<UL><LI>Max Depth = 136 + Unknown Stack Size
<LI>Call Chain = __rt_lib_init_stdio_2 &rArr; _initio &rArr; freopen &rArr; _fclose_internal &rArr; _fflush &rArr; _writebuf &rArr; _sys_write
</UL>
<BR>[Calls]<UL><LI><a href="#[98]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_initio
</UL>
<P><STRONG><a name="[156]"></a>__rt_lib_init_user_alloc_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$0000000C))
<P><STRONG><a name="[157]"></a>__rt_lib_init_alloca_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$0000002E))
<P><STRONG><a name="[158]"></a>__rt_lib_init_argv_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$0000002C))
<P><STRONG><a name="[159]"></a>__rt_lib_init_cpp_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000032))
<P><STRONG><a name="[15a]"></a>__rt_lib_init_exceptions_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000030))
<P><STRONG><a name="[15b]"></a>__rt_lib_init_return</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000033))
<P><STRONG><a name="[15c]"></a>__rt_lib_init_stdio_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000025))
<P><STRONG><a name="[a3]"></a>__rt_lib_shutdown</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libshutdown.o(.ARM.Collect$$libshutdown$$00000000))
<BR><BR>[Called By]<UL><LI><a href="#[a2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_exit_ls
</UL>
<P><STRONG><a name="[15d]"></a>__rt_lib_shutdown_cpp_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libshutdown2.o(.ARM.Collect$$libshutdown$$00000004))
<P><STRONG><a name="[15e]"></a>__rt_lib_shutdown_fini_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libshutdown2.o(.ARM.Collect$$libshutdown$$00000002))
<P><STRONG><a name="[99]"></a>__rt_lib_shutdown_stdio_2</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libshutdown2.o(.ARM.Collect$$libshutdown$$00000005))
<BR><BR>[Stack]<UL><LI>Max Depth = 120 + Unknown Stack Size
<LI>Call Chain = __rt_lib_shutdown_stdio_2 &rArr; _terminateio &rArr; _fclose_internal &rArr; _fflush &rArr; _writebuf &rArr; _sys_write
</UL>
<BR>[Calls]<UL><LI><a href="#[9a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_terminateio
</UL>
<P><STRONG><a name="[15f]"></a>__rt_lib_shutdown_fp_trap_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libshutdown2.o(.ARM.Collect$$libshutdown$$00000009))
<P><STRONG><a name="[160]"></a>__rt_lib_shutdown_heap_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libshutdown2.o(.ARM.Collect$$libshutdown$$00000011))
<P><STRONG><a name="[161]"></a>__rt_lib_shutdown_return</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libshutdown2.o(.ARM.Collect$$libshutdown$$00000012))
<P><STRONG><a name="[162]"></a>__rt_lib_shutdown_signal_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libshutdown2.o(.ARM.Collect$$libshutdown$$0000000C))
<P><STRONG><a name="[163]"></a>__rt_lib_shutdown_stdio_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libshutdown2.o(.ARM.Collect$$libshutdown$$00000006))
<P><STRONG><a name="[164]"></a>__rt_lib_shutdown_user_alloc_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libshutdown2.o(.ARM.Collect$$libshutdown$$0000000E))
<P><STRONG><a name="[8c]"></a>__rt_entry</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, __rtentry.o(.ARM.Collect$$rtentry$$00000000))
<BR><BR>[Called By]<UL><LI><a href="#[8a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__main
<LI><a href="#[8d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__scatterload_rt2
</UL>
<P><STRONG><a name="[165]"></a>__rt_entry_presh_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, __rtentry2.o(.ARM.Collect$$rtentry$$00000002))
<P><STRONG><a name="[9b]"></a>__rt_entry_sh</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, __rtentry4.o(.ARM.Collect$$rtentry$$00000004))
<BR><BR>[Stack]<UL><LI>Max Depth = 8 + Unknown Stack Size
<LI>Call Chain = __rt_entry_sh &rArr; __user_setup_stackheap
</UL>
<BR>[Calls]<UL><LI><a href="#[9c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__user_setup_stackheap
</UL>
<P><STRONG><a name="[9d]"></a>__rt_entry_li</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, __rtentry2.o(.ARM.Collect$$rtentry$$0000000A))
<BR><BR>[Calls]<UL><LI><a href="#[9e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_lib_init
</UL>
<P><STRONG><a name="[166]"></a>__rt_entry_postsh_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, __rtentry2.o(.ARM.Collect$$rtentry$$00000009))
<P><STRONG><a name="[9f]"></a>__rt_entry_main</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, __rtentry2.o(.ARM.Collect$$rtentry$$0000000D))
<BR><BR>[Stack]<UL><LI>Max Depth = 240 + Unknown Stack Size
<LI>Call Chain = __rt_entry_main &rArr; main &rArr; SX1281ProcessIrqs &rArr; SX1281GetIrqStatus &rArr; SX1281HalReadCommand &rArr; SpiInOut &rArr; BSP_SPI_TransmitReceive &rArr; HAL_SPI_TransmitReceive &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
<LI><a href="#[a1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;exit
</UL>
<P><STRONG><a name="[167]"></a>__rt_entry_postli_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, __rtentry2.o(.ARM.Collect$$rtentry$$0000000C))
<P><STRONG><a name="[c7]"></a>__rt_exit</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, rtexit.o(.ARM.Collect$$rtexit$$00000000))
<BR><BR>[Called By]<UL><LI><a href="#[a1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;exit
</UL>
<P><STRONG><a name="[a2]"></a>__rt_exit_ls</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, rtexit2.o(.ARM.Collect$$rtexit$$00000003))
<BR><BR>[Calls]<UL><LI><a href="#[a3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_lib_shutdown
</UL>
<P><STRONG><a name="[168]"></a>__rt_exit_prels_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, rtexit2.o(.ARM.Collect$$rtexit$$00000002))
<P><STRONG><a name="[a4]"></a>__rt_exit_exit</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, rtexit2.o(.ARM.Collect$$rtexit$$00000004))
<BR><BR>[Calls]<UL><LI><a href="#[a5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_sys_exit
</UL>
<P><STRONG><a name="[9]"></a>Reset_Handler</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[169]"></a>_maybe_terminate_alloc</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, maybetermalloc1.o(.emb_text), UNUSED)
<P><STRONG><a name="[25]"></a>ADC1_2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR><BR>[Calls]<UL><LI><a href="#[25]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC1_2_IRQHandler
</UL>
<BR>[Called By]<UL><LI><a href="#[25]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC1_2_IRQHandler
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[28]"></a>CAN1_RX1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[29]"></a>CAN1_SCE_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[1e]"></a>DMA1_Channel1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[1f]"></a>DMA1_Channel2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[20]"></a>DMA1_Channel3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[21]"></a>DMA1_Channel4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[22]"></a>DMA1_Channel5_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[23]"></a>DMA1_Channel6_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[24]"></a>DMA1_Channel7_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[19]"></a>EXTI0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[1a]"></a>EXTI1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[1b]"></a>EXTI2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[1c]"></a>EXTI3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[1d]"></a>EXTI4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[17]"></a>FLASH_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[33]"></a>I2C1_ER_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[32]"></a>I2C1_EV_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[35]"></a>I2C2_ER_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[34]"></a>I2C2_EV_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[14]"></a>PVD_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[18]"></a>RCC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[3c]"></a>RTC_Alarm_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[16]"></a>RTC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[36]"></a>SPI1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[37]"></a>SPI2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[15]"></a>TAMPER_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[2b]"></a>TIM1_BRK_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[2e]"></a>TIM1_CC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[2d]"></a>TIM1_TRG_COM_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[2c]"></a>TIM1_UP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[2f]"></a>TIM2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[30]"></a>TIM3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[31]"></a>TIM4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[38]"></a>USART1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[39]"></a>USART2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[3a]"></a>USART3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[3d]"></a>USBWakeUp_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[26]"></a>USB_HP_CAN1_TX_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[27]"></a>USB_LP_CAN1_RX0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[13]"></a>WWDG_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[c0]"></a>__user_initial_stackheap</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, startup_stm32f103xb.o(.text))
<BR><BR>[Called By]<UL><LI><a href="#[9c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__user_setup_stackheap
</UL>
<P><STRONG><a name="[a6]"></a>__2printf</STRONG> (Thumb, 20 bytes, Stack size 24 bytes, noretval__2printf.o(.text))
<BR><BR>[Stack]<UL><LI>Max Depth = 144 + Unknown Stack Size
<LI>Call Chain = __2printf &rArr; _printf_char_file &rArr; _printf_char_common &rArr; __printf
</UL>
<BR>[Calls]<UL><LI><a href="#[a7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_printf_char_file
</UL>
<BR>[Called By]<UL><LI><a href="#[a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
<LI><a href="#[86]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;OnTxTimeout
<LI><a href="#[84]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;OnTxDone
<LI><a href="#[87]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;OnRxTimeout
<LI><a href="#[88]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;OnRxError
<LI><a href="#[85]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;OnRxDone
</UL>
<P><STRONG><a name="[a9]"></a>_printf_pre_padding</STRONG> (Thumb, 44 bytes, Stack size 16 bytes, _printf_pad.o(.text))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = _printf_pre_padding
</UL>
<BR>[Called By]<UL><LI><a href="#[ab]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_printf_int_common
<LI><a href="#[a8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_printf_str
</UL>
<P><STRONG><a name="[aa]"></a>_printf_post_padding</STRONG> (Thumb, 34 bytes, Stack size 16 bytes, _printf_pad.o(.text))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = _printf_post_padding
</UL>
<BR>[Called By]<UL><LI><a href="#[ab]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_printf_int_common
<LI><a href="#[a8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_printf_str
</UL>
<P><STRONG><a name="[a8]"></a>_printf_str</STRONG> (Thumb, 82 bytes, Stack size 16 bytes, _printf_str.o(.text))
<BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = _printf_str &rArr; _printf_post_padding
</UL>
<BR>[Calls]<UL><LI><a href="#[aa]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_printf_post_padding
<LI><a href="#[a9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_printf_pre_padding
</UL>
<BR>[Called By]<UL><LI><a href="#[b3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_printf_cs_common
</UL>
<P><STRONG><a name="[90]"></a>_printf_int_dec</STRONG> (Thumb, 104 bytes, Stack size 24 bytes, _printf_dec.o(.text))
<BR><BR>[Stack]<UL><LI>Max Depth = 72<LI>Call Chain = _printf_int_dec &rArr; _printf_int_common &rArr; _printf_post_padding
</UL>
<BR>[Calls]<UL><LI><a href="#[ab]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_printf_int_common
</UL>
<BR>[Called By]<UL><LI><a href="#[8f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_printf_d
</UL>
<P><STRONG><a name="[92]"></a>_printf_int_hex</STRONG> (Thumb, 84 bytes, Stack size 16 bytes, _printf_hex_int.o(.text))
<BR><BR>[Stack]<UL><LI>Max Depth = 64<LI>Call Chain = _printf_int_hex &rArr; _printf_int_common &rArr; _printf_post_padding
</UL>
<BR>[Calls]<UL><LI><a href="#[ab]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_printf_int_common
</UL>
<BR>[Called By]<UL><LI><a href="#[91]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_printf_x
</UL>
<P><STRONG><a name="[16a]"></a>_printf_longlong_hex</STRONG> (Thumb, 0 bytes, Stack size 16 bytes, _printf_hex_int.o(.text), UNUSED)
<P><STRONG><a name="[ac]"></a>__printf</STRONG> (Thumb, 388 bytes, Stack size 40 bytes, __printf_flags_ss_wp.o(.text))
<BR><BR>[Stack]<UL><LI>Max Depth = 40 + Unknown Stack Size
<LI>Call Chain = __printf
</UL>
<BR>[Calls]<UL><LI><a href="#[ae]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_printf_percent
<LI><a href="#[ad]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_is_digit
</UL>
<BR>[Called By]<UL><LI><a href="#[b5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_printf_char_common
</UL>
<P><STRONG><a name="[be]"></a>strlen</STRONG> (Thumb, 62 bytes, Stack size 8 bytes, strlen.o(.text))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = strlen
</UL>
<BR>[Called By]<UL><LI><a href="#[bd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_sys_open
</UL>
<P><STRONG><a name="[133]"></a>__aeabi_memcpy</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, rt_memcpy_v6.o(.text))
<BR><BR>[Called By]<UL><LI><a href="#[52]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281HalReadRegisters
<LI><a href="#[50]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281HalWriteRegisters
<LI><a href="#[4e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281HalWriteCommand
<LI><a href="#[54]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281HalWriteBuffer
<LI><a href="#[4f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281HalReadCommand
<LI><a href="#[55]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281HalReadBuffer
</UL>
<P><STRONG><a name="[af]"></a>__rt_memcpy</STRONG> (Thumb, 138 bytes, Stack size 0 bytes, rt_memcpy_v6.o(.text), UNUSED)
<BR><BR>[Calls]<UL><LI><a href="#[b0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memcpy4
</UL>
<P><STRONG><a name="[16b]"></a>_memcpy_lastbytes</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, rt_memcpy_v6.o(.text), UNUSED)
<P><STRONG><a name="[13e]"></a>__aeabi_memclr</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, rt_memclr.o(.text))
<BR><BR>[Called By]<UL><LI><a href="#[a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>
<P><STRONG><a name="[b1]"></a>__rt_memclr</STRONG> (Thumb, 68 bytes, Stack size 0 bytes, rt_memclr.o(.text), UNUSED)
<BR><BR>[Calls]<UL><LI><a href="#[b2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_memset_w
</UL>
<P><STRONG><a name="[16c]"></a>_memset</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, rt_memclr.o(.text), UNUSED)
<P><STRONG><a name="[b7]"></a>__aeabi_memclr4</STRONG> (Thumb, 0 bytes, Stack size 4 bytes, rt_memclr_w.o(.text))
<BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = __aeabi_memclr4
</UL>
<BR>[Called By]<UL><LI><a href="#[124]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_TIM1_Init
<LI><a href="#[13a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SystemClock_Config
<LI><a href="#[bb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_fclose_internal
<LI><a href="#[c3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fopen
<LI><a href="#[98]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_initio
</UL>
<P><STRONG><a name="[16d]"></a>__aeabi_memclr8</STRONG> (Thumb, 0 bytes, Stack size 4 bytes, rt_memclr_w.o(.text), UNUSED)
<P><STRONG><a name="[16e]"></a>__rt_memclr_w</STRONG> (Thumb, 78 bytes, Stack size 4 bytes, rt_memclr_w.o(.text), UNUSED)
<P><STRONG><a name="[b2]"></a>_memset_w</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, rt_memclr_w.o(.text), UNUSED)
<BR><BR>[Called By]<UL><LI><a href="#[b1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_memclr
</UL>
<P><STRONG><a name="[16f]"></a>__use_two_region_memory</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, heapauxi.o(.text), UNUSED)
<P><STRONG><a name="[6]"></a>__rt_heap_escrow</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, heapauxi.o(.text), UNUSED)
<P><STRONG><a name="[5]"></a>__rt_heap_expand</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, heapauxi.o(.text), UNUSED)
<P><STRONG><a name="[ab]"></a>_printf_int_common</STRONG> (Thumb, 178 bytes, Stack size 32 bytes, _printf_intcommon.o(.text))
<BR><BR>[Stack]<UL><LI>Max Depth = 48<LI>Call Chain = _printf_int_common &rArr; _printf_post_padding
</UL>
<BR>[Calls]<UL><LI><a href="#[aa]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_printf_post_padding
<LI><a href="#[a9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_printf_pre_padding
</UL>
<BR>[Called By]<UL><LI><a href="#[92]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_printf_int_hex
<LI><a href="#[90]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_printf_int_dec
</UL>
<P><STRONG><a name="[b3]"></a>_printf_cs_common</STRONG> (Thumb, 20 bytes, Stack size 8 bytes, _printf_char.o(.text))
<BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = _printf_cs_common &rArr; _printf_str &rArr; _printf_post_padding
</UL>
<BR>[Calls]<UL><LI><a href="#[a8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_printf_str
</UL>
<BR>[Called By]<UL><LI><a href="#[94]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_printf_string
<LI><a href="#[b4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_printf_char
</UL>
<P><STRONG><a name="[b4]"></a>_printf_char</STRONG> (Thumb, 16 bytes, Stack size 0 bytes, _printf_char.o(.text), UNUSED)
<BR><BR>[Calls]<UL><LI><a href="#[b3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_printf_cs_common
</UL>
<P><STRONG><a name="[94]"></a>_printf_string</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, _printf_char.o(.text))
<BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = _printf_string &rArr; _printf_cs_common &rArr; _printf_str &rArr; _printf_post_padding
</UL>
<BR>[Calls]<UL><LI><a href="#[b3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_printf_cs_common
</UL>
<BR>[Called By]<UL><LI><a href="#[93]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_printf_s
</UL>
<P><STRONG><a name="[a7]"></a>_printf_char_file</STRONG> (Thumb, 32 bytes, Stack size 16 bytes, _printf_char_file.o(.text))
<BR><BR>[Stack]<UL><LI>Max Depth = 120 + Unknown Stack Size
<LI>Call Chain = _printf_char_file &rArr; _printf_char_common &rArr; __printf
</UL>
<BR>[Calls]<UL><LI><a href="#[b6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ferror
<LI><a href="#[b5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_printf_char_common
</UL>
<BR>[Called By]<UL><LI><a href="#[a6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__2printf
</UL>
<P><STRONG><a name="[b0]"></a>__aeabi_memcpy4</STRONG> (Thumb, 0 bytes, Stack size 8 bytes, rt_memcpy_w.o(.text), UNUSED)
<BR><BR>[Called By]<UL><LI><a href="#[af]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_memcpy
</UL>
<P><STRONG><a name="[170]"></a>__aeabi_memcpy8</STRONG> (Thumb, 0 bytes, Stack size 8 bytes, rt_memcpy_w.o(.text), UNUSED)
<P><STRONG><a name="[171]"></a>__rt_memcpy_w</STRONG> (Thumb, 100 bytes, Stack size 8 bytes, rt_memcpy_w.o(.text), UNUSED)
<P><STRONG><a name="[172]"></a>_memcpy_lastbytes_aligned</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, rt_memcpy_w.o(.text), UNUSED)
<P><STRONG><a name="[b5]"></a>_printf_char_common</STRONG> (Thumb, 32 bytes, Stack size 64 bytes, _printf_char_common.o(.text))
<BR><BR>[Stack]<UL><LI>Max Depth = 104 + Unknown Stack Size
<LI>Call Chain = _printf_char_common &rArr; __printf
</UL>
<BR>[Calls]<UL><LI><a href="#[ac]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__printf
</UL>
<BR>[Called By]<UL><LI><a href="#[a7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_printf_char_file
</UL>
<P><STRONG><a name="[b6]"></a>ferror</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, ferror.o(.text))
<BR><BR>[Called By]<UL><LI><a href="#[a7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_printf_char_file
</UL>
<P><STRONG><a name="[98]"></a>_initio</STRONG> (Thumb, 210 bytes, Stack size 8 bytes, initio.o(.text))
<BR><BR>[Stack]<UL><LI>Max Depth = 136<LI>Call Chain = _initio &rArr; freopen &rArr; _fclose_internal &rArr; _fflush &rArr; _writebuf &rArr; _sys_write
</UL>
<BR>[Calls]<UL><LI><a href="#[b9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_SIGRTRED
<LI><a href="#[b8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;freopen
<LI><a href="#[ba]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;setvbuf
<LI><a href="#[b7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memclr4
</UL>
<BR>[Called By]<UL><LI><a href="#[97]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_lib_init_stdio_2
</UL>
<P><STRONG><a name="[9a]"></a>_terminateio</STRONG> (Thumb, 56 bytes, Stack size 16 bytes, initio.o(.text))
<BR><BR>[Stack]<UL><LI>Max Depth = 120<LI>Call Chain = _terminateio &rArr; _fclose_internal &rArr; _fflush &rArr; _writebuf &rArr; _sys_write
</UL>
<BR>[Calls]<UL><LI><a href="#[bb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_fclose_internal
<LI><a href="#[bc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;free
</UL>
<BR>[Called By]<UL><LI><a href="#[99]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_lib_shutdown_stdio_2
</UL>
<P><STRONG><a name="[bd]"></a>_sys_open</STRONG> (Thumb, 20 bytes, Stack size 16 bytes, sys_io.o(.text))
<BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = _sys_open &rArr; strlen
</UL>
<BR>[Calls]<UL><LI><a href="#[be]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;strlen
</UL>
<BR>[Called By]<UL><LI><a href="#[b8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;freopen
</UL>
<P><STRONG><a name="[c6]"></a>_sys_close</STRONG> (Thumb, 12 bytes, Stack size 8 bytes, sys_io.o(.text))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = _sys_close
</UL>
<BR>[Called By]<UL><LI><a href="#[bb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_fclose_internal
</UL>
<P><STRONG><a name="[d5]"></a>_sys_write</STRONG> (Thumb, 16 bytes, Stack size 24 bytes, sys_io.o(.text))
<BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = _sys_write
</UL>
<BR>[Called By]<UL><LI><a href="#[d3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_writebuf
</UL>
<P><STRONG><a name="[173]"></a>_sys_read</STRONG> (Thumb, 14 bytes, Stack size 24 bytes, sys_io.o(.text), UNUSED)
<P><STRONG><a name="[cf]"></a>_sys_istty</STRONG> (Thumb, 12 bytes, Stack size 8 bytes, sys_io.o(.text))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = _sys_istty
</UL>
<BR>[Called By]<UL><LI><a href="#[c2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_fseek
</UL>
<P><STRONG><a name="[d4]"></a>_sys_seek</STRONG> (Thumb, 14 bytes, Stack size 16 bytes, sys_io.o(.text))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = _sys_seek
</UL>
<BR>[Called By]<UL><LI><a href="#[d3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_writebuf
</UL>
<P><STRONG><a name="[174]"></a>_sys_ensure</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, sys_io.o(.text), UNUSED)
<P><STRONG><a name="[d1]"></a>_sys_flen</STRONG> (Thumb, 12 bytes, Stack size 8 bytes, sys_io.o(.text))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = _sys_flen
</UL>
<BR>[Called By]<UL><LI><a href="#[c2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_fseek
</UL>
<P><STRONG><a name="[9c]"></a>__user_setup_stackheap</STRONG> (Thumb, 74 bytes, Stack size 8 bytes, sys_stackheap_outer.o(.text))
<BR><BR>[Stack]<UL><LI>Max Depth = 8 + Unknown Stack Size
<LI>Call Chain = __user_setup_stackheap
</UL>
<BR>[Calls]<UL><LI><a href="#[c0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__user_initial_stackheap
<LI><a href="#[bf]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__user_perproc_libspace
</UL>
<BR>[Called By]<UL><LI><a href="#[9b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_entry_sh
</UL>
<P><STRONG><a name="[bc]"></a>free</STRONG> (Thumb, 78 bytes, Stack size 16 bytes, h1_free.o(.text))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = free
</UL>
<BR>[Calls]<UL><LI><a href="#[c1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_heap_descriptor
</UL>
<BR>[Called By]<UL><LI><a href="#[bb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_fclose_internal
<LI><a href="#[9a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_terminateio
<LI><a href="#[cb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__Heap_ProvideMemory
</UL>
<P><STRONG><a name="[ba]"></a>setvbuf</STRONG> (Thumb, 70 bytes, Stack size 16 bytes, setvbuf.o(.text))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = setvbuf
</UL>
<BR>[Called By]<UL><LI><a href="#[98]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_initio
</UL>
<P><STRONG><a name="[b8]"></a>freopen</STRONG> (Thumb, 158 bytes, Stack size 24 bytes, fopen.o(.text))
<BR><BR>[Stack]<UL><LI>Max Depth = 128<LI>Call Chain = freopen &rArr; _fclose_internal &rArr; _fflush &rArr; _writebuf &rArr; _sys_write
</UL>
<BR>[Calls]<UL><LI><a href="#[bb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_fclose_internal
<LI><a href="#[bd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_sys_open
<LI><a href="#[c2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_fseek
</UL>
<BR>[Called By]<UL><LI><a href="#[c3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fopen
<LI><a href="#[98]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_initio
</UL>
<P><STRONG><a name="[c3]"></a>fopen</STRONG> (Thumb, 74 bytes, Stack size 24 bytes, fopen.o(.text), UNUSED)
<BR><BR>[Calls]<UL><LI><a href="#[b8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;freopen
<LI><a href="#[b7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memclr4
<LI><a href="#[c4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;malloc
</UL>
<P><STRONG><a name="[bb]"></a>_fclose_internal</STRONG> (Thumb, 76 bytes, Stack size 32 bytes, fclose.o(.text))
<BR><BR>[Stack]<UL><LI>Max Depth = 104<LI>Call Chain = _fclose_internal &rArr; _fflush &rArr; _writebuf &rArr; _sys_write
</UL>
<BR>[Calls]<UL><LI><a href="#[bc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;free
<LI><a href="#[c6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_sys_close
<LI><a href="#[b7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memclr4
<LI><a href="#[c5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_fflush
</UL>
<BR>[Called By]<UL><LI><a href="#[b8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;freopen
<LI><a href="#[9a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_terminateio
</UL>
<P><STRONG><a name="[175]"></a>fclose</STRONG> (Thumb, 0 bytes, Stack size 32 bytes, fclose.o(.text), UNUSED)
<P><STRONG><a name="[a1]"></a>exit</STRONG> (Thumb, 18 bytes, Stack size 8 bytes, exit.o(.text))
<BR><BR>[Stack]<UL><LI>Max Depth = 8 + Unknown Stack Size
<LI>Call Chain = exit
</UL>
<BR>[Calls]<UL><LI><a href="#[c7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_exit
</UL>
<BR>[Called By]<UL><LI><a href="#[9f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_entry_main
</UL>
<P><STRONG><a name="[b9]"></a>__rt_SIGRTRED</STRONG> (Thumb, 14 bytes, Stack size 8 bytes, defsig_rtred_outer.o(.text))
<BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = __rt_SIGRTRED &rArr; __rt_SIGRTRED_inner &rArr; __default_signal_display &rArr; _ttywrch
</UL>
<BR>[Calls]<UL><LI><a href="#[c8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_SIGRTRED_inner
<LI><a href="#[c9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__sig_exit
</UL>
<BR>[Called By]<UL><LI><a href="#[98]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_initio
</UL>
<P><STRONG><a name="[176]"></a>__user_libspace</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, libspace.o(.text), UNUSED)
<P><STRONG><a name="[bf]"></a>__user_perproc_libspace</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, libspace.o(.text))
<BR><BR>[Called By]<UL><LI><a href="#[9c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__user_setup_stackheap
</UL>
<P><STRONG><a name="[177]"></a>__user_perthread_libspace</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, libspace.o(.text), UNUSED)
<P><STRONG><a name="[178]"></a>__I$use$semihosting</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, use_no_semi.o(.text), UNUSED)
<P><STRONG><a name="[179]"></a>__use_no_semihosting_swi</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, use_no_semi.o(.text), UNUSED)
<P><STRONG><a name="[17a]"></a>__semihosting_library_function</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, indicate_semi.o(.text), UNUSED)
<P><STRONG><a name="[c1]"></a>__rt_heap_descriptor</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, rt_heap_descriptor_intlibspace.o(.text))
<BR><BR>[Called By]<UL><LI><a href="#[bc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;free
<LI><a href="#[c4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;malloc
<LI><a href="#[96]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_init_alloc
</UL>
<P><STRONG><a name="[17b]"></a>__use_no_heap</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, hguard.o(.text), UNUSED)
<P><STRONG><a name="[17c]"></a>__heap$guard</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, hguard.o(.text), UNUSED)
<P><STRONG><a name="[4]"></a>_terminate_user_alloc</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, init_alloc.o(.text), UNUSED)
<P><STRONG><a name="[3]"></a>_init_user_alloc</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, init_alloc.o(.text), UNUSED)
<P><STRONG><a name="[ca]"></a>__Heap_Full</STRONG> (Thumb, 34 bytes, Stack size 16 bytes, init_alloc.o(.text), UNUSED)
<BR><BR>[Calls]<UL><LI><a href="#[cb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__Heap_ProvideMemory
</UL>
<BR>[Called By]<UL><LI><a href="#[c4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;malloc
</UL>
<P><STRONG><a name="[cc]"></a>__Heap_Broken</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, init_alloc.o(.text), UNUSED)
<BR><BR>[Calls]<UL><LI><a href="#[cd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_SIGRTMEM
</UL>
<P><STRONG><a name="[96]"></a>_init_alloc</STRONG> (Thumb, 94 bytes, Stack size 24 bytes, init_alloc.o(.text))
<BR><BR>[Stack]<UL><LI>Max Depth = 64<LI>Call Chain = _init_alloc &rArr; __rt_SIGRTMEM &rArr; __rt_SIGRTMEM_inner &rArr; __default_signal_display &rArr; _ttywrch
</UL>
<BR>[Calls]<UL><LI><a href="#[cd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_SIGRTMEM
<LI><a href="#[cb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__Heap_ProvideMemory
<LI><a href="#[ce]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__Heap_Initialize
<LI><a href="#[c1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_heap_descriptor
</UL>
<BR>[Called By]<UL><LI><a href="#[95]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_lib_init_heap_2
</UL>
<P><STRONG><a name="[c4]"></a>malloc</STRONG> (Thumb, 94 bytes, Stack size 16 bytes, h1_alloc.o(.text), UNUSED)
<BR><BR>[Calls]<UL><LI><a href="#[ca]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__Heap_Full
<LI><a href="#[c1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_heap_descriptor
</UL>
<BR>[Called By]<UL><LI><a href="#[c3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fopen
</UL>
<P><STRONG><a name="[c2]"></a>_fseek</STRONG> (Thumb, 242 bytes, Stack size 24 bytes, fseek.o(.text))
<BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = _fseek &rArr; _sys_flen
</UL>
<BR>[Calls]<UL><LI><a href="#[d1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_sys_flen
<LI><a href="#[cf]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_sys_istty
<LI><a href="#[d0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_ftell_internal
<LI><a href="#[d2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_seterr
</UL>
<BR>[Called By]<UL><LI><a href="#[b8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;freopen
</UL>
<P><STRONG><a name="[17d]"></a>fseek</STRONG> (Thumb, 0 bytes, Stack size 24 bytes, fseek.o(.text), UNUSED)
<P><STRONG><a name="[d2]"></a>_seterr</STRONG> (Thumb, 20 bytes, Stack size 0 bytes, stdio.o(.text))
<BR><BR>[Called By]<UL><LI><a href="#[d3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_writebuf
<LI><a href="#[c2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_fseek
</UL>
<P><STRONG><a name="[d3]"></a>_writebuf</STRONG> (Thumb, 84 bytes, Stack size 32 bytes, stdio.o(.text))
<BR><BR>[Stack]<UL><LI>Max Depth = 56<LI>Call Chain = _writebuf &rArr; _sys_write
</UL>
<BR>[Calls]<UL><LI><a href="#[d4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_sys_seek
<LI><a href="#[d5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_sys_write
<LI><a href="#[d2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_seterr
</UL>
<BR>[Called By]<UL><LI><a href="#[c5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_fflush
</UL>
<P><STRONG><a name="[c5]"></a>_fflush</STRONG> (Thumb, 70 bytes, Stack size 16 bytes, stdio.o(.text))
<BR><BR>[Stack]<UL><LI>Max Depth = 72<LI>Call Chain = _fflush &rArr; _writebuf &rArr; _sys_write
</UL>
<BR>[Calls]<UL><LI><a href="#[d3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_writebuf
</UL>
<BR>[Called By]<UL><LI><a href="#[bb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_fclose_internal
<LI><a href="#[d6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_deferredlazyseek
</UL>
<P><STRONG><a name="[d6]"></a>_deferredlazyseek</STRONG> (Thumb, 60 bytes, Stack size 8 bytes, stdio.o(.text), UNUSED)
<BR><BR>[Calls]<UL><LI><a href="#[c5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_fflush
</UL>
<P><STRONG><a name="[c9]"></a>__sig_exit</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, defsig_exit.o(.text))
<BR><BR>[Calls]<UL><LI><a href="#[a5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_sys_exit
</UL>
<BR>[Called By]<UL><LI><a href="#[b9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_SIGRTRED
<LI><a href="#[cd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_SIGRTMEM
</UL>
<P><STRONG><a name="[c8]"></a>__rt_SIGRTRED_inner</STRONG> (Thumb, 14 bytes, Stack size 8 bytes, defsig_rtred_inner.o(.text))
<BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = __rt_SIGRTRED_inner &rArr; __default_signal_display &rArr; _ttywrch
</UL>
<BR>[Calls]<UL><LI><a href="#[d7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__default_signal_display
</UL>
<BR>[Called By]<UL><LI><a href="#[b9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_SIGRTRED
</UL>
<P><STRONG><a name="[a5]"></a>_sys_exit</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, sys_exit.o(.text))
<BR><BR>[Called By]<UL><LI><a href="#[a4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_exit_exit
<LI><a href="#[c9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__sig_exit
</UL>
<P><STRONG><a name="[ce]"></a>__Heap_Initialize</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, h1_init.o(.text))
<BR><BR>[Called By]<UL><LI><a href="#[96]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_init_alloc
</UL>
<P><STRONG><a name="[7]"></a>__Heap_DescSize</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, h1_init.o(.text), UNUSED)
<P><STRONG><a name="[cb]"></a>__Heap_ProvideMemory</STRONG> (Thumb, 52 bytes, Stack size 0 bytes, h1_extend.o(.text))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = __Heap_ProvideMemory &rArr; free
</UL>
<BR>[Calls]<UL><LI><a href="#[bc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;free
</UL>
<BR>[Called By]<UL><LI><a href="#[96]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_init_alloc
<LI><a href="#[ca]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__Heap_Full
</UL>
<P><STRONG><a name="[d0]"></a>_ftell_internal</STRONG> (Thumb, 66 bytes, Stack size 8 bytes, ftell.o(.text))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = _ftell_internal
</UL>
<BR>[Calls]<UL><LI><a href="#[d8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_errno_addr
</UL>
<BR>[Called By]<UL><LI><a href="#[c2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_fseek
</UL>
<P><STRONG><a name="[17e]"></a>ftell</STRONG> (Thumb, 0 bytes, Stack size 8 bytes, ftell.o(.text), UNUSED)
<P><STRONG><a name="[d7]"></a>__default_signal_display</STRONG> (Thumb, 50 bytes, Stack size 16 bytes, defsig_general.o(.text))
<BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = __default_signal_display &rArr; _ttywrch
</UL>
<BR>[Calls]<UL><LI><a href="#[d9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_ttywrch
</UL>
<BR>[Called By]<UL><LI><a href="#[da]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_SIGRTMEM_inner
<LI><a href="#[c8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_SIGRTRED_inner
</UL>
<P><STRONG><a name="[cd]"></a>__rt_SIGRTMEM</STRONG> (Thumb, 14 bytes, Stack size 8 bytes, defsig_rtmem_outer.o(.text))
<BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = __rt_SIGRTMEM &rArr; __rt_SIGRTMEM_inner &rArr; __default_signal_display &rArr; _ttywrch
</UL>
<BR>[Calls]<UL><LI><a href="#[da]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_SIGRTMEM_inner
<LI><a href="#[c9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__sig_exit
</UL>
<BR>[Called By]<UL><LI><a href="#[96]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_init_alloc
<LI><a href="#[cc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__Heap_Broken
</UL>
<P><STRONG><a name="[d9]"></a>_ttywrch</STRONG> (Thumb, 14 bytes, Stack size 8 bytes, sys_wrch.o(.text))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = _ttywrch
</UL>
<BR>[Called By]<UL><LI><a href="#[d7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__default_signal_display
</UL>
<P><STRONG><a name="[d8]"></a>__aeabi_errno_addr</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, rt_errno_addr_intlibspace.o(.text))
<BR><BR>[Called By]<UL><LI><a href="#[d0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_ftell_internal
</UL>
<P><STRONG><a name="[17f]"></a>__errno$intlibspace</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, rt_errno_addr_intlibspace.o(.text), UNUSED)
<P><STRONG><a name="[180]"></a>__rt_errno_addr$intlibspace</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, rt_errno_addr_intlibspace.o(.text), UNUSED)
<P><STRONG><a name="[da]"></a>__rt_SIGRTMEM_inner</STRONG> (Thumb, 22 bytes, Stack size 8 bytes, defsig_rtmem_inner.o(.text))
<BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = __rt_SIGRTMEM_inner &rArr; __default_signal_display &rArr; _ttywrch
</UL>
<BR>[Calls]<UL><LI><a href="#[d7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__default_signal_display
</UL>
<BR>[Called By]<UL><LI><a href="#[cd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_SIGRTMEM
</UL>
<P><STRONG><a name="[dc]"></a>BSP_SPI_GetHandle</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, spi_1.o(i.BSP_SPI_GetHandle))
<BR><BR>[Called By]<UL><LI><a href="#[df]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;BSP_SPI_TransmitReceive
<LI><a href="#[db]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;BSP_SPI_Transmit
</UL>
<P><STRONG><a name="[138]"></a>BSP_SPI_RegisterCallback</STRONG> (Thumb, 22 bytes, Stack size 0 bytes, spi_1.o(i.BSP_SPI_RegisterCallback))
<BR><BR>[Called By]<UL><LI><a href="#[11f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SpiInit
</UL>
<P><STRONG><a name="[db]"></a>BSP_SPI_Transmit</STRONG> (Thumb, 40 bytes, Stack size 8 bytes, spi_1.o(i.BSP_SPI_Transmit))
<BR><BR>[Stack]<UL><LI>Max Depth = 104<LI>Call Chain = BSP_SPI_Transmit &rArr; HAL_SPI_Transmit &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[dd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_Transmit_DMA
<LI><a href="#[de]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_Transmit
<LI><a href="#[dc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;BSP_SPI_GetHandle
</UL>
<BR>[Called By]<UL><LI><a href="#[134]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SpiIn
</UL>
<P><STRONG><a name="[df]"></a>BSP_SPI_TransmitReceive</STRONG> (Thumb, 44 bytes, Stack size 16 bytes, spi_1.o(i.BSP_SPI_TransmitReceive))
<BR><BR>[Stack]<UL><LI>Max Depth = 128<LI>Call Chain = BSP_SPI_TransmitReceive &rArr; HAL_SPI_TransmitReceive &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[e1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_TransmitReceive
<LI><a href="#[e0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_TransmitReceive_DMA
<LI><a href="#[dc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;BSP_SPI_GetHandle
</UL>
<BR>[Called By]<UL><LI><a href="#[132]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SpiInOut
</UL>
<P><STRONG><a name="[d]"></a>BusFault_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32f1xx_it.o(i.BusFault_Handler))
<BR><BR>[Calls]<UL><LI><a href="#[d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;BusFault_Handler
</UL>
<BR>[Called By]<UL><LI><a href="#[d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;BusFault_Handler
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[10]"></a>DebugMon_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32f1xx_it.o(i.DebugMon_Handler))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[3b]"></a>EXTI15_10_IRQHandler</STRONG> (Thumb, 22 bytes, Stack size 8 bytes, stm32f1xx_it.o(i.EXTI15_10_IRQHandler))
<BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = EXTI15_10_IRQHandler &rArr; HAL_GPIO_EXTI_IRQHandler &rArr; HAL_GPIO_EXTI_Callback
</UL>
<BR>[Calls]<UL><LI><a href="#[e2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GPIO_EXTI_IRQHandler
<LI><a href="#[e3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GPIO_EXTI_Falling_Callback
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[2a]"></a>EXTI9_5_IRQHandler</STRONG> (Thumb, 24 bytes, Stack size 8 bytes, stm32f1xx_it.o(i.EXTI9_5_IRQHandler))
<BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = EXTI9_5_IRQHandler &rArr; HAL_GPIO_EXTI_IRQHandler &rArr; HAL_GPIO_EXTI_Callback
</UL>
<BR>[Calls]<UL><LI><a href="#[e2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GPIO_EXTI_IRQHandler
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[122]"></a>Error_Handler</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, main.o(i.Error_Handler))
<BR><BR>[Called By]<UL><LI><a href="#[128]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_USART2_UART_Init
<LI><a href="#[127]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_USART1_UART_Init
<LI><a href="#[124]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_TIM1_Init
<LI><a href="#[123]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_SPI2_Init
<LI><a href="#[121]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_SPI1_Init
</UL>
<P><STRONG><a name="[e7]"></a>GpioGetBitPos</STRONG> (Thumb, 48 bytes, Stack size 0 bytes, hw-gpio.o(i.GpioGetBitPos))
<BR><BR>[Called By]<UL><LI><a href="#[e8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MSP_GetIRQn
<LI><a href="#[e6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GpioSetIrq
</UL>
<P><STRONG><a name="[11e]"></a>GpioInit</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, hw-gpio.o(i.GpioInit))
<BR><BR>[Called By]<UL><LI><a href="#[11d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HwInit
</UL>
<P><STRONG><a name="[e4]"></a>GpioRead</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, hw-gpio.o(i.GpioRead))
<BR><BR>[Calls]<UL><LI><a href="#[e5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GPIO_ReadPin
</UL>
<BR>[Called By]<UL><LI><a href="#[56]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281HalGetDioStatus
</UL>
<P><STRONG><a name="[e6]"></a>GpioSetIrq</STRONG> (Thumb, 50 bytes, Stack size 16 bytes, hw-gpio.o(i.GpioSetIrq))
<BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = GpioSetIrq &rArr; HAL_NVIC_SetPriority
</UL>
<BR>[Calls]<UL><LI><a href="#[e9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_NVIC_SetPriority
<LI><a href="#[ea]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_NVIC_EnableIRQ
<LI><a href="#[e8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MSP_GetIRQn
<LI><a href="#[e7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GpioGetBitPos
</UL>
<BR>[Called By]<UL><LI><a href="#[130]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281HalIoIrqInit
</UL>
<P><STRONG><a name="[eb]"></a>GpioWrite</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, hw-gpio.o(i.GpioWrite))
<BR><BR>[Calls]<UL><LI><a href="#[ec]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GPIO_WritePin
</UL>
<BR>[Called By]<UL><LI><a href="#[4c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281HalReset
<LI><a href="#[52]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281HalReadRegisters
<LI><a href="#[50]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281HalWriteRegisters
<LI><a href="#[4e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281HalWriteCommand
<LI><a href="#[54]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281HalWriteBuffer
<LI><a href="#[4f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281HalReadCommand
<LI><a href="#[55]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281HalReadBuffer
</UL>
<P><STRONG><a name="[ed]"></a>HAL_DMA_Start_IT</STRONG> (Thumb, 112 bytes, Stack size 16 bytes, stm32f1xx_hal_dma.o(i.HAL_DMA_Start_IT))
<BR><BR>[Stack]<UL><LI>Max Depth = 28<LI>Call Chain = HAL_DMA_Start_IT &rArr; DMA_SetConfig
</UL>
<BR>[Calls]<UL><LI><a href="#[ee]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA_SetConfig
</UL>
<BR>[Called By]<UL><LI><a href="#[dd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_Transmit_DMA
<LI><a href="#[e0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_TransmitReceive_DMA
</UL>
<P><STRONG><a name="[ef]"></a>HAL_Delay</STRONG> (Thumb, 32 bytes, Stack size 16 bytes, stm32f1xx_hal.o(i.HAL_Delay))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = HAL_Delay
</UL>
<BR>[Calls]<UL><LI><a href="#[f0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
</UL>
<BR>[Called By]<UL><LI><a href="#[4c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281HalReset
<LI><a href="#[a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
<LI><a href="#[e3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GPIO_EXTI_Falling_Callback
</UL>
<P><STRONG><a name="[f1]"></a>HAL_GPIO_EXTI_Callback</STRONG> (Thumb, 40 bytes, Stack size 24 bytes, gpio_1.o(i.HAL_GPIO_EXTI_Callback))
<BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = HAL_GPIO_EXTI_Callback
</UL>
<BR>[Called By]<UL><LI><a href="#[e2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GPIO_EXTI_IRQHandler
</UL>
<P><STRONG><a name="[e3]"></a>HAL_GPIO_EXTI_Falling_Callback</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, main.o(i.HAL_GPIO_EXTI_Falling_Callback))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = HAL_GPIO_EXTI_Falling_Callback &rArr; HAL_Delay
</UL>
<BR>[Calls]<UL><LI><a href="#[ef]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_Delay
</UL>
<BR>[Called By]<UL><LI><a href="#[3b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;EXTI15_10_IRQHandler
</UL>
<P><STRONG><a name="[e2]"></a>HAL_GPIO_EXTI_IRQHandler</STRONG> (Thumb, 18 bytes, Stack size 8 bytes, stm32f1xx_hal_gpio.o(i.HAL_GPIO_EXTI_IRQHandler))
<BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = HAL_GPIO_EXTI_IRQHandler &rArr; HAL_GPIO_EXTI_Callback
</UL>
<BR>[Calls]<UL><LI><a href="#[f1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GPIO_EXTI_Callback
</UL>
<BR>[Called By]<UL><LI><a href="#[2a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;EXTI9_5_IRQHandler
<LI><a href="#[3b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;EXTI15_10_IRQHandler
</UL>
<P><STRONG><a name="[102]"></a>HAL_GPIO_Init</STRONG> (Thumb, 446 bytes, Stack size 40 bytes, stm32f1xx_hal_gpio.o(i.HAL_GPIO_Init))
<BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = HAL_GPIO_Init
</UL>
<BR>[Called By]<UL><LI><a href="#[f3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_MspInit
<LI><a href="#[112]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_MspPostInit
<LI><a href="#[101]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_MspInit
<LI><a href="#[120]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_GPIO_Init
</UL>
<P><STRONG><a name="[e5]"></a>HAL_GPIO_ReadPin</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, stm32f1xx_hal_gpio.o(i.HAL_GPIO_ReadPin))
<BR><BR>[Called By]<UL><LI><a href="#[a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
<LI><a href="#[e4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GpioRead
<LI><a href="#[131]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281HalWaitOnBusy
</UL>
<P><STRONG><a name="[ec]"></a>HAL_GPIO_WritePin</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, stm32f1xx_hal_gpio.o(i.HAL_GPIO_WritePin))
<BR><BR>[Called By]<UL><LI><a href="#[120]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_GPIO_Init
<LI><a href="#[a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
<LI><a href="#[eb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GpioWrite
</UL>
<P><STRONG><a name="[f0]"></a>HAL_GetTick</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, stm32f1xx_hal.o(i.HAL_GetTick))
<BR><BR>[Called By]<UL><LI><a href="#[12a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_WaitFlagStateUntilTimeout
<LI><a href="#[43]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_DMATransmitReceiveCplt
<LI><a href="#[48]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_DMATransmitCplt
<LI><a href="#[46]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_DMAReceiveCplt
<LI><a href="#[11b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_Transmit
<LI><a href="#[e1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_TransmitReceive
<LI><a href="#[fd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_OscConfig
<LI><a href="#[fb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_ClockConfig
<LI><a href="#[ef]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_Delay
<LI><a href="#[de]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_Transmit
<LI><a href="#[11c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_WaitOnFlagUntilTimeout
</UL>
<P><STRONG><a name="[f2]"></a>HAL_HalfDuplex_Init</STRONG> (Thumb, 110 bytes, Stack size 16 bytes, stm32f1xx_hal_uart.o(i.HAL_HalfDuplex_Init))
<BR><BR>[Stack]<UL><LI>Max Depth = 88<LI>Call Chain = HAL_HalfDuplex_Init &rArr; HAL_UART_MspInit &rArr; HAL_GPIO_Init
</UL>
<BR>[Calls]<UL><LI><a href="#[f3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_MspInit
<LI><a href="#[f4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_SetConfig
</UL>
<BR>[Called By]<UL><LI><a href="#[127]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_USART1_UART_Init
</UL>
<P><STRONG><a name="[139]"></a>HAL_IncTick</STRONG> (Thumb, 12 bytes, Stack size 0 bytes, stm32f1xx_hal.o(i.HAL_IncTick))
<BR><BR>[Called By]<UL><LI><a href="#[12]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SysTick_Handler
</UL>
<P><STRONG><a name="[f5]"></a>HAL_Init</STRONG> (Thumb, 32 bytes, Stack size 8 bytes, stm32f1xx_hal.o(i.HAL_Init))
<BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = HAL_Init &rArr; HAL_InitTick &rArr; HAL_NVIC_SetPriority
</UL>
<BR>[Calls]<UL><LI><a href="#[f8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_MspInit
<LI><a href="#[f7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_InitTick
<LI><a href="#[f6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_NVIC_SetPriorityGrouping
</UL>
<BR>[Called By]<UL><LI><a href="#[11d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HwInit
<LI><a href="#[a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>
<P><STRONG><a name="[f7]"></a>HAL_InitTick</STRONG> (Thumb, 54 bytes, Stack size 16 bytes, stm32f1xx_hal.o(i.HAL_InitTick))
<BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = HAL_InitTick &rArr; HAL_NVIC_SetPriority
</UL>
<BR>[Calls]<UL><LI><a href="#[e9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_NVIC_SetPriority
<LI><a href="#[f9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SYSTICK_Config
</UL>
<BR>[Called By]<UL><LI><a href="#[fb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_ClockConfig
<LI><a href="#[f5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_Init
</UL>
<P><STRONG><a name="[f8]"></a>HAL_MspInit</STRONG> (Thumb, 52 bytes, Stack size 8 bytes, stm32f1xx_hal_msp.o(i.HAL_MspInit))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = HAL_MspInit
</UL>
<BR>[Called By]<UL><LI><a href="#[f5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_Init
</UL>
<P><STRONG><a name="[ea]"></a>HAL_NVIC_EnableIRQ</STRONG> (Thumb, 26 bytes, Stack size 0 bytes, stm32f1xx_hal_cortex.o(i.HAL_NVIC_EnableIRQ))
<BR><BR>[Called By]<UL><LI><a href="#[120]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_GPIO_Init
<LI><a href="#[e6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GpioSetIrq
</UL>
<P><STRONG><a name="[e9]"></a>HAL_NVIC_SetPriority</STRONG> (Thumb, 60 bytes, Stack size 16 bytes, stm32f1xx_hal_cortex.o(i.HAL_NVIC_SetPriority))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = HAL_NVIC_SetPriority
</UL>
<BR>[Calls]<UL><LI><a href="#[fa]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__NVIC_SetPriority
</UL>
<BR>[Called By]<UL><LI><a href="#[120]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_GPIO_Init
<LI><a href="#[f7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_InitTick
<LI><a href="#[e6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GpioSetIrq
</UL>
<P><STRONG><a name="[f6]"></a>HAL_NVIC_SetPriorityGrouping</STRONG> (Thumb, 26 bytes, Stack size 0 bytes, stm32f1xx_hal_cortex.o(i.HAL_NVIC_SetPriorityGrouping))
<BR><BR>[Called By]<UL><LI><a href="#[f5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_Init
</UL>
<P><STRONG><a name="[fb]"></a>HAL_RCC_ClockConfig</STRONG> (Thumb, 280 bytes, Stack size 32 bytes, stm32f1xx_hal_rcc.o(i.HAL_RCC_ClockConfig))
<BR><BR>[Stack]<UL><LI>Max Depth = 64<LI>Call Chain = HAL_RCC_ClockConfig &rArr; HAL_InitTick &rArr; HAL_NVIC_SetPriority
</UL>
<BR>[Calls]<UL><LI><a href="#[fc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_GetSysClockFreq
<LI><a href="#[f7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_InitTick
<LI><a href="#[f0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
</UL>
<BR>[Called By]<UL><LI><a href="#[13a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SystemClock_Config
</UL>
<P><STRONG><a name="[13d]"></a>HAL_RCC_GetPCLK1Freq</STRONG> (Thumb, 20 bytes, Stack size 0 bytes, stm32f1xx_hal_rcc.o(i.HAL_RCC_GetPCLK1Freq))
<BR><BR>[Called By]<UL><LI><a href="#[a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
<LI><a href="#[f4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_SetConfig
</UL>
<P><STRONG><a name="[13c]"></a>HAL_RCC_GetPCLK2Freq</STRONG> (Thumb, 20 bytes, Stack size 0 bytes, stm32f1xx_hal_rcc.o(i.HAL_RCC_GetPCLK2Freq))
<BR><BR>[Called By]<UL><LI><a href="#[a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
<LI><a href="#[f4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_SetConfig
</UL>
<P><STRONG><a name="[fc]"></a>HAL_RCC_GetSysClockFreq</STRONG> (Thumb, 64 bytes, Stack size 0 bytes, stm32f1xx_hal_rcc.o(i.HAL_RCC_GetSysClockFreq))
<BR><BR>[Called By]<UL><LI><a href="#[fb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_ClockConfig
<LI><a href="#[a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>
<P><STRONG><a name="[fd]"></a>HAL_RCC_OscConfig</STRONG> (Thumb, 778 bytes, Stack size 40 bytes, stm32f1xx_hal_rcc.o(i.HAL_RCC_OscConfig))
<BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = HAL_RCC_OscConfig
</UL>
<BR>[Calls]<UL><LI><a href="#[f0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
</UL>
<BR>[Called By]<UL><LI><a href="#[13a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SystemClock_Config
</UL>
<P><STRONG><a name="[fe]"></a>HAL_SPI_ErrorCallback</STRONG> (Thumb, 50 bytes, Stack size 16 bytes, spi_1.o(i.HAL_SPI_ErrorCallback))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = HAL_SPI_ErrorCallback
</UL>
<BR>[Calls]<UL><LI><a href="#[ff]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_Get
</UL>
<BR>[Called By]<UL><LI><a href="#[43]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_DMATransmitReceiveCplt
<LI><a href="#[48]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_DMATransmitCplt
<LI><a href="#[46]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_DMAReceiveCplt
<LI><a href="#[44]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_DMAError
</UL>
<P><STRONG><a name="[100]"></a>HAL_SPI_Init</STRONG> (Thumb, 178 bytes, Stack size 16 bytes, stm32f1xx_hal_spi.o(i.HAL_SPI_Init))
<BR><BR>[Stack]<UL><LI>Max Depth = 88<LI>Call Chain = HAL_SPI_Init &rArr; HAL_SPI_MspInit &rArr; HAL_GPIO_Init
</UL>
<BR>[Calls]<UL><LI><a href="#[101]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_MspInit
</UL>
<BR>[Called By]<UL><LI><a href="#[123]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_SPI2_Init
<LI><a href="#[121]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_SPI1_Init
</UL>
<P><STRONG><a name="[101]"></a>HAL_SPI_MspInit</STRONG> (Thumb, 162 bytes, Stack size 32 bytes, spi.o(i.HAL_SPI_MspInit))
<BR><BR>[Stack]<UL><LI>Max Depth = 72<LI>Call Chain = HAL_SPI_MspInit &rArr; HAL_GPIO_Init
</UL>
<BR>[Calls]<UL><LI><a href="#[102]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GPIO_Init
</UL>
<BR>[Called By]<UL><LI><a href="#[100]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_Init
</UL>
<P><STRONG><a name="[103]"></a>HAL_SPI_RxCpltCallback</STRONG> (Thumb, 50 bytes, Stack size 16 bytes, spi_1.o(i.HAL_SPI_RxCpltCallback))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = HAL_SPI_RxCpltCallback
</UL>
<BR>[Calls]<UL><LI><a href="#[ff]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_Get
</UL>
<BR>[Called By]<UL><LI><a href="#[46]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_DMAReceiveCplt
</UL>
<P><STRONG><a name="[104]"></a>HAL_SPI_RxHalfCpltCallback</STRONG> (Thumb, 50 bytes, Stack size 16 bytes, spi_1.o(i.HAL_SPI_RxHalfCpltCallback))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = HAL_SPI_RxHalfCpltCallback
</UL>
<BR>[Calls]<UL><LI><a href="#[ff]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_Get
</UL>
<BR>[Called By]<UL><LI><a href="#[45]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_DMAHalfReceiveCplt
</UL>
<P><STRONG><a name="[de]"></a>HAL_SPI_Transmit</STRONG> (Thumb, 358 bytes, Stack size 40 bytes, stm32f1xx_hal_spi.o(i.HAL_SPI_Transmit))
<BR><BR>[Stack]<UL><LI>Max Depth = 96<LI>Call Chain = HAL_SPI_Transmit &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[105]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_EndRxTxTransaction
<LI><a href="#[f0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
</UL>
<BR>[Called By]<UL><LI><a href="#[db]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;BSP_SPI_Transmit
</UL>
<P><STRONG><a name="[e1]"></a>HAL_SPI_TransmitReceive</STRONG> (Thumb, 496 bytes, Stack size 56 bytes, stm32f1xx_hal_spi.o(i.HAL_SPI_TransmitReceive))
<BR><BR>[Stack]<UL><LI>Max Depth = 112<LI>Call Chain = HAL_SPI_TransmitReceive &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[105]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_EndRxTxTransaction
<LI><a href="#[f0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
</UL>
<BR>[Called By]<UL><LI><a href="#[a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
<LI><a href="#[df]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;BSP_SPI_TransmitReceive
</UL>
<P><STRONG><a name="[e0]"></a>HAL_SPI_TransmitReceive_DMA</STRONG> (Thumb, 252 bytes, Stack size 16 bytes, stm32f1xx_hal_spi.o(i.HAL_SPI_TransmitReceive_DMA))
<BR><BR>[Stack]<UL><LI>Max Depth = 44<LI>Call Chain = HAL_SPI_TransmitReceive_DMA &rArr; HAL_DMA_Start_IT &rArr; DMA_SetConfig
</UL>
<BR>[Calls]<UL><LI><a href="#[ed]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_DMA_Start_IT
</UL>
<BR>[Called By]<UL><LI><a href="#[df]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;BSP_SPI_TransmitReceive
</UL>
<P><STRONG><a name="[dd]"></a>HAL_SPI_Transmit_DMA</STRONG> (Thumb, 190 bytes, Stack size 16 bytes, stm32f1xx_hal_spi.o(i.HAL_SPI_Transmit_DMA))
<BR><BR>[Stack]<UL><LI>Max Depth = 44<LI>Call Chain = HAL_SPI_Transmit_DMA &rArr; HAL_DMA_Start_IT &rArr; DMA_SetConfig
</UL>
<BR>[Calls]<UL><LI><a href="#[ed]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_DMA_Start_IT
</UL>
<BR>[Called By]<UL><LI><a href="#[db]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;BSP_SPI_Transmit
</UL>
<P><STRONG><a name="[106]"></a>HAL_SPI_TxCpltCallback</STRONG> (Thumb, 30 bytes, Stack size 8 bytes, spi_1.o(i.HAL_SPI_TxCpltCallback))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = HAL_SPI_TxCpltCallback
</UL>
<BR>[Calls]<UL><LI><a href="#[ff]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_Get
</UL>
<BR>[Called By]<UL><LI><a href="#[48]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_DMATransmitCplt
</UL>
<P><STRONG><a name="[107]"></a>HAL_SPI_TxHalfCpltCallback</STRONG> (Thumb, 50 bytes, Stack size 16 bytes, spi_1.o(i.HAL_SPI_TxHalfCpltCallback))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = HAL_SPI_TxHalfCpltCallback
</UL>
<BR>[Calls]<UL><LI><a href="#[ff]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_Get
</UL>
<BR>[Called By]<UL><LI><a href="#[47]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_DMAHalfTransmitCplt
</UL>
<P><STRONG><a name="[108]"></a>HAL_SPI_TxRxCpltCallback</STRONG> (Thumb, 50 bytes, Stack size 16 bytes, spi_1.o(i.HAL_SPI_TxRxCpltCallback))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = HAL_SPI_TxRxCpltCallback
</UL>
<BR>[Calls]<UL><LI><a href="#[ff]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_Get
</UL>
<BR>[Called By]<UL><LI><a href="#[43]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_DMATransmitReceiveCplt
</UL>
<P><STRONG><a name="[109]"></a>HAL_SPI_TxRxHalfCpltCallback</STRONG> (Thumb, 50 bytes, Stack size 16 bytes, spi_1.o(i.HAL_SPI_TxRxHalfCpltCallback))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = HAL_SPI_TxRxHalfCpltCallback
</UL>
<BR>[Calls]<UL><LI><a href="#[ff]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_Get
</UL>
<BR>[Called By]<UL><LI><a href="#[42]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_DMAHalfTransmitReceiveCplt
</UL>
<P><STRONG><a name="[f9]"></a>HAL_SYSTICK_Config</STRONG> (Thumb, 40 bytes, Stack size 8 bytes, stm32f1xx_hal_cortex.o(i.HAL_SYSTICK_Config))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = HAL_SYSTICK_Config
</UL>
<BR>[Calls]<UL><LI><a href="#[fa]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__NVIC_SetPriority
</UL>
<BR>[Called By]<UL><LI><a href="#[f7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_InitTick
</UL>
<P><STRONG><a name="[126]"></a>HAL_TIMEx_ConfigBreakDeadTime</STRONG> (Thumb, 84 bytes, Stack size 8 bytes, stm32f1xx_hal_tim_ex.o(i.HAL_TIMEx_ConfigBreakDeadTime))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = HAL_TIMEx_ConfigBreakDeadTime
</UL>
<BR>[Called By]<UL><LI><a href="#[124]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_TIM1_Init
</UL>
<P><STRONG><a name="[125]"></a>HAL_TIMEx_MasterConfigSynchronization</STRONG> (Thumb, 92 bytes, Stack size 16 bytes, stm32f1xx_hal_tim_ex.o(i.HAL_TIMEx_MasterConfigSynchronization))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = HAL_TIMEx_MasterConfigSynchronization
</UL>
<BR>[Called By]<UL><LI><a href="#[124]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_TIM1_Init
</UL>
<P><STRONG><a name="[10a]"></a>HAL_TIM_Base_Init</STRONG> (Thumb, 90 bytes, Stack size 8 bytes, stm32f1xx_hal_tim.o(i.HAL_TIM_Base_Init))
<BR><BR>[Stack]<UL><LI>Max Depth = 28<LI>Call Chain = HAL_TIM_Base_Init &rArr; TIM_Base_SetConfig
</UL>
<BR>[Calls]<UL><LI><a href="#[10b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_Base_MspInit
<LI><a href="#[10c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_Base_SetConfig
</UL>
<BR>[Called By]<UL><LI><a href="#[124]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_TIM1_Init
</UL>
<P><STRONG><a name="[10b]"></a>HAL_TIM_Base_MspInit</STRONG> (Thumb, 30 bytes, Stack size 8 bytes, tim.o(i.HAL_TIM_Base_MspInit))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = HAL_TIM_Base_MspInit
</UL>
<BR>[Called By]<UL><LI><a href="#[10a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_Base_Init
</UL>
<P><STRONG><a name="[10d]"></a>HAL_TIM_ConfigClockSource</STRONG> (Thumb, 220 bytes, Stack size 16 bytes, stm32f1xx_hal_tim.o(i.HAL_TIM_ConfigClockSource))
<BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = HAL_TIM_ConfigClockSource &rArr; TIM_TI2_ConfigInputStage
</UL>
<BR>[Calls]<UL><LI><a href="#[110]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_TI2_ConfigInputStage
<LI><a href="#[10f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_TI1_ConfigInputStage
<LI><a href="#[111]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_ITRx_SetConfig
<LI><a href="#[10e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_ETR_SetConfig
</UL>
<BR>[Called By]<UL><LI><a href="#[124]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_TIM1_Init
</UL>
<P><STRONG><a name="[112]"></a>HAL_TIM_MspPostInit</STRONG> (Thumb, 64 bytes, Stack size 24 bytes, tim.o(i.HAL_TIM_MspPostInit))
<BR><BR>[Stack]<UL><LI>Max Depth = 64<LI>Call Chain = HAL_TIM_MspPostInit &rArr; HAL_GPIO_Init
</UL>
<BR>[Calls]<UL><LI><a href="#[102]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GPIO_Init
</UL>
<BR>[Called By]<UL><LI><a href="#[124]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_TIM1_Init
</UL>
<P><STRONG><a name="[113]"></a>HAL_TIM_PWM_ConfigChannel</STRONG> (Thumb, 204 bytes, Stack size 16 bytes, stm32f1xx_hal_tim.o(i.HAL_TIM_PWM_ConfigChannel))
<BR><BR>[Stack]<UL><LI>Max Depth = 28<LI>Call Chain = HAL_TIM_PWM_ConfigChannel &rArr; TIM_OC4_SetConfig
</UL>
<BR>[Calls]<UL><LI><a href="#[117]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_OC4_SetConfig
<LI><a href="#[116]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_OC3_SetConfig
<LI><a href="#[114]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_OC1_SetConfig
<LI><a href="#[115]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_OC2_SetConfig
</UL>
<BR>[Called By]<UL><LI><a href="#[124]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_TIM1_Init
</UL>
<P><STRONG><a name="[118]"></a>HAL_TIM_PWM_Init</STRONG> (Thumb, 90 bytes, Stack size 8 bytes, stm32f1xx_hal_tim.o(i.HAL_TIM_PWM_Init))
<BR><BR>[Stack]<UL><LI>Max Depth = 28<LI>Call Chain = HAL_TIM_PWM_Init &rArr; TIM_Base_SetConfig
</UL>
<BR>[Calls]<UL><LI><a href="#[119]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_PWM_MspInit
<LI><a href="#[10c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_Base_SetConfig
</UL>
<BR>[Called By]<UL><LI><a href="#[124]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_TIM1_Init
</UL>
<P><STRONG><a name="[119]"></a>HAL_TIM_PWM_MspInit</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32f1xx_hal_tim.o(i.HAL_TIM_PWM_MspInit))
<BR><BR>[Called By]<UL><LI><a href="#[118]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_PWM_Init
</UL>
<P><STRONG><a name="[11a]"></a>HAL_UART_Init</STRONG> (Thumb, 100 bytes, Stack size 16 bytes, stm32f1xx_hal_uart.o(i.HAL_UART_Init))
<BR><BR>[Stack]<UL><LI>Max Depth = 88<LI>Call Chain = HAL_UART_Init &rArr; HAL_UART_MspInit &rArr; HAL_GPIO_Init
</UL>
<BR>[Calls]<UL><LI><a href="#[f3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_MspInit
<LI><a href="#[f4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_SetConfig
</UL>
<BR>[Called By]<UL><LI><a href="#[128]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_USART2_UART_Init
</UL>
<P><STRONG><a name="[f3]"></a>HAL_UART_MspInit</STRONG> (Thumb, 150 bytes, Stack size 32 bytes, usart.o(i.HAL_UART_MspInit))
<BR><BR>[Stack]<UL><LI>Max Depth = 72<LI>Call Chain = HAL_UART_MspInit &rArr; HAL_GPIO_Init
</UL>
<BR>[Calls]<UL><LI><a href="#[102]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GPIO_Init
</UL>
<BR>[Called By]<UL><LI><a href="#[11a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_Init
<LI><a href="#[f2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_HalfDuplex_Init
</UL>
<P><STRONG><a name="[11b]"></a>HAL_UART_Transmit</STRONG> (Thumb, 160 bytes, Stack size 32 bytes, stm32f1xx_hal_uart.o(i.HAL_UART_Transmit))
<BR><BR>[Stack]<UL><LI>Max Depth = 64<LI>Call Chain = HAL_UART_Transmit &rArr; UART_WaitOnFlagUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[f0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
<LI><a href="#[11c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_WaitOnFlagUntilTimeout
</UL>
<BR>[Called By]<UL><LI><a href="#[40]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fputc
</UL>
<P><STRONG><a name="[b]"></a>HardFault_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32f1xx_it.o(i.HardFault_Handler))
<BR><BR>[Calls]<UL><LI><a href="#[b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HardFault_Handler
</UL>
<BR>[Called By]<UL><LI><a href="#[b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HardFault_Handler
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[11d]"></a>HwInit</STRONG> (Thumb, 18 bytes, Stack size 8 bytes, hw.o(i.HwInit))
<BR><BR>[Stack]<UL><LI>Max Depth = 48<LI>Call Chain = HwInit &rArr; HAL_Init &rArr; HAL_InitTick &rArr; HAL_NVIC_SetPriority
</UL>
<BR>[Calls]<UL><LI><a href="#[f5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_Init
<LI><a href="#[11f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SpiInit
<LI><a href="#[11e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GpioInit
</UL>
<BR>[Called By]<UL><LI><a href="#[a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>
<P><STRONG><a name="[e8]"></a>MSP_GetIRQn</STRONG> (Thumb, 58 bytes, Stack size 4 bytes, hw-gpio.o(i.MSP_GetIRQn))
<BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = MSP_GetIRQn
</UL>
<BR>[Calls]<UL><LI><a href="#[e7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GpioGetBitPos
</UL>
<BR>[Called By]<UL><LI><a href="#[e6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GpioSetIrq
</UL>
<P><STRONG><a name="[120]"></a>MX_GPIO_Init</STRONG> (Thumb, 236 bytes, Stack size 48 bytes, gpio.o(i.MX_GPIO_Init))
<BR><BR>[Stack]<UL><LI>Max Depth = 88<LI>Call Chain = MX_GPIO_Init &rArr; HAL_GPIO_Init
</UL>
<BR>[Calls]<UL><LI><a href="#[e9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_NVIC_SetPriority
<LI><a href="#[ea]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_NVIC_EnableIRQ
<LI><a href="#[102]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GPIO_Init
<LI><a href="#[ec]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GPIO_WritePin
</UL>
<BR>[Called By]<UL><LI><a href="#[a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>
<P><STRONG><a name="[121]"></a>MX_SPI1_Init</STRONG> (Thumb, 62 bytes, Stack size 8 bytes, spi.o(i.MX_SPI1_Init))
<BR><BR>[Stack]<UL><LI>Max Depth = 96<LI>Call Chain = MX_SPI1_Init &rArr; HAL_SPI_Init &rArr; HAL_SPI_MspInit &rArr; HAL_GPIO_Init
</UL>
<BR>[Calls]<UL><LI><a href="#[100]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_Init
<LI><a href="#[122]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Error_Handler
</UL>
<BR>[Called By]<UL><LI><a href="#[a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>
<P><STRONG><a name="[123]"></a>MX_SPI2_Init</STRONG> (Thumb, 60 bytes, Stack size 8 bytes, spi.o(i.MX_SPI2_Init))
<BR><BR>[Stack]<UL><LI>Max Depth = 96<LI>Call Chain = MX_SPI2_Init &rArr; HAL_SPI_Init &rArr; HAL_SPI_MspInit &rArr; HAL_GPIO_Init
</UL>
<BR>[Calls]<UL><LI><a href="#[100]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_Init
<LI><a href="#[122]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Error_Handler
</UL>
<BR>[Called By]<UL><LI><a href="#[a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>
<P><STRONG><a name="[124]"></a>MX_TIM1_Init</STRONG> (Thumb, 188 bytes, Stack size 96 bytes, tim.o(i.MX_TIM1_Init))
<BR><BR>[Stack]<UL><LI>Max Depth = 160<LI>Call Chain = MX_TIM1_Init &rArr; HAL_TIM_MspPostInit &rArr; HAL_GPIO_Init
</UL>
<BR>[Calls]<UL><LI><a href="#[118]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_PWM_Init
<LI><a href="#[113]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_PWM_ConfigChannel
<LI><a href="#[10d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_ConfigClockSource
<LI><a href="#[10a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_Base_Init
<LI><a href="#[125]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIMEx_MasterConfigSynchronization
<LI><a href="#[126]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIMEx_ConfigBreakDeadTime
<LI><a href="#[112]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_MspPostInit
<LI><a href="#[122]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Error_Handler
<LI><a href="#[b7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memclr4
</UL>
<BR>[Called By]<UL><LI><a href="#[a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>
<P><STRONG><a name="[127]"></a>MX_USART1_UART_Init</STRONG> (Thumb, 48 bytes, Stack size 8 bytes, usart.o(i.MX_USART1_UART_Init))
<BR><BR>[Stack]<UL><LI>Max Depth = 96<LI>Call Chain = MX_USART1_UART_Init &rArr; HAL_HalfDuplex_Init &rArr; HAL_UART_MspInit &rArr; HAL_GPIO_Init
</UL>
<BR>[Calls]<UL><LI><a href="#[f2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_HalfDuplex_Init
<LI><a href="#[122]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Error_Handler
</UL>
<BR>[Called By]<UL><LI><a href="#[a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>
<P><STRONG><a name="[128]"></a>MX_USART2_UART_Init</STRONG> (Thumb, 48 bytes, Stack size 8 bytes, usart.o(i.MX_USART2_UART_Init))
<BR><BR>[Stack]<UL><LI>Max Depth = 96<LI>Call Chain = MX_USART2_UART_Init &rArr; HAL_UART_Init &rArr; HAL_UART_MspInit &rArr; HAL_GPIO_Init
</UL>
<BR>[Calls]<UL><LI><a href="#[11a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_Init
<LI><a href="#[122]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Error_Handler
</UL>
<BR>[Called By]<UL><LI><a href="#[a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>
<P><STRONG><a name="[c]"></a>MemManage_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32f1xx_it.o(i.MemManage_Handler))
<BR><BR>[Calls]<UL><LI><a href="#[c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MemManage_Handler
</UL>
<BR>[Called By]<UL><LI><a href="#[c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MemManage_Handler
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[a]"></a>NMI_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32f1xx_it.o(i.NMI_Handler))
<BR><BR>[Calls]<UL><LI><a href="#[a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NMI_Handler
</UL>
<BR>[Called By]<UL><LI><a href="#[a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NMI_Handler
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[85]"></a>OnRxDone</STRONG> (Thumb, 50 bytes, Stack size 16 bytes, main.o(i.OnRxDone))
<BR><BR>[Stack]<UL><LI>Max Depth = 160 + Unknown Stack Size
<LI>Call Chain = OnRxDone &rArr; __2printf &rArr; _printf_char_file &rArr; _printf_char_common &rArr; __printf
</UL>
<BR>[Calls]<UL><LI><a href="#[a6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__2printf
</UL>
<BR>[Address Reference Count : 1]<UL><LI> main.o(.data)
</UL>
<P><STRONG><a name="[88]"></a>OnRxError</STRONG> (Thumb, 28 bytes, Stack size 8 bytes, main.o(i.OnRxError))
<BR><BR>[Stack]<UL><LI>Max Depth = 152 + Unknown Stack Size
<LI>Call Chain = OnRxError &rArr; __2printf &rArr; _printf_char_file &rArr; _printf_char_common &rArr; __printf
</UL>
<BR>[Calls]<UL><LI><a href="#[a6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__2printf
</UL>
<BR>[Address Reference Count : 1]<UL><LI> main.o(.data)
</UL>
<P><STRONG><a name="[87]"></a>OnRxTimeout</STRONG> (Thumb, 28 bytes, Stack size 8 bytes, main.o(i.OnRxTimeout))
<BR><BR>[Stack]<UL><LI>Max Depth = 152 + Unknown Stack Size
<LI>Call Chain = OnRxTimeout &rArr; __2printf &rArr; _printf_char_file &rArr; _printf_char_common &rArr; __printf
</UL>
<BR>[Calls]<UL><LI><a href="#[a6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__2printf
</UL>
<BR>[Address Reference Count : 1]<UL><LI> main.o(.data)
</UL>
<P><STRONG><a name="[84]"></a>OnTxDone</STRONG> (Thumb, 44 bytes, Stack size 16 bytes, main.o(i.OnTxDone))
<BR><BR>[Stack]<UL><LI>Max Depth = 160 + Unknown Stack Size
<LI>Call Chain = OnTxDone &rArr; __2printf &rArr; _printf_char_file &rArr; _printf_char_common &rArr; __printf
</UL>
<BR>[Calls]<UL><LI><a href="#[a6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__2printf
</UL>
<BR>[Address Reference Count : 1]<UL><LI> main.o(.data)
</UL>
<P><STRONG><a name="[86]"></a>OnTxTimeout</STRONG> (Thumb, 44 bytes, Stack size 16 bytes, main.o(i.OnTxTimeout))
<BR><BR>[Stack]<UL><LI>Max Depth = 160 + Unknown Stack Size
<LI>Call Chain = OnTxTimeout &rArr; __2printf &rArr; _printf_char_file &rArr; _printf_char_common &rArr; __printf
</UL>
<BR>[Calls]<UL><LI><a href="#[a6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__2printf
</UL>
<BR>[Address Reference Count : 1]<UL><LI> main.o(.data)
</UL>
<P><STRONG><a name="[11]"></a>PendSV_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32f1xx_it.o(i.PendSV_Handler))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[f]"></a>SVC_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32f1xx_it.o(i.SVC_Handler))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[77]"></a>SX1281Calibrate</STRONG> (Thumb, 62 bytes, Stack size 8 bytes, sx1281.o(i.SX1281Calibrate))
<BR><BR>[Stack]<UL><LI>Max Depth = 136<LI>Call Chain = SX1281Calibrate &rArr; SX1281HalWriteCommand &rArr; SpiIn &rArr; BSP_SPI_Transmit &rArr; HAL_SPI_Transmit &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[4e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281HalWriteCommand
</UL>
<BR>[Address Reference Count : 1]<UL><LI> sx1281-hal.o(.constdata)
</UL>
<P><STRONG><a name="[76]"></a>SX1281ClearIrqStatus</STRONG> (Thumb, 24 bytes, Stack size 8 bytes, sx1281.o(i.SX1281ClearIrqStatus))
<BR><BR>[Stack]<UL><LI>Max Depth = 136<LI>Call Chain = SX1281ClearIrqStatus &rArr; SX1281HalWriteCommand &rArr; SpiIn &rArr; BSP_SPI_Transmit &rArr; HAL_SPI_Transmit &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[4e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281HalWriteCommand
</UL>
<BR>[Called By]<UL><LI><a href="#[135]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281ProcessIrqs
<LI><a href="#[6b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281SetTx
<LI><a href="#[62]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281SetRx
</UL>
<BR>[Address Reference Count : 1]<UL><LI> sx1281-hal.o(.constdata)
</UL>
<P><STRONG><a name="[57]"></a>SX1281GetFirmwareVersion</STRONG> (Thumb, 26 bytes, Stack size 8 bytes, sx1281.o(i.SX1281GetFirmwareVersion))
<BR><BR>[Stack]<UL><LI>Max Depth = 184<LI>Call Chain = SX1281GetFirmwareVersion &rArr; SX1281HalReadRegister &rArr; SX1281HalReadRegisters &rArr; SpiInOut &rArr; BSP_SPI_TransmitReceive &rArr; HAL_SPI_TransmitReceive &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[53]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281HalReadRegister
</UL>
<BR>[Address Reference Count : 1]<UL><LI> sx1281-hal.o(.constdata)
</UL>
<P><STRONG><a name="[83]"></a>SX1281GetFrequencyError</STRONG> (Thumb, 132 bytes, Stack size 16 bytes, sx1281.o(i.SX1281GetFrequencyError))
<BR><BR>[Stack]<UL><LI>Max Depth = 192<LI>Call Chain = SX1281GetFrequencyError &rArr; SX1281HalReadRegister &rArr; SX1281HalReadRegisters &rArr; SpiInOut &rArr; BSP_SPI_TransmitReceive &rArr; HAL_SPI_TransmitReceive &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[53]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281HalReadRegister
<LI><a href="#[12b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281GetLoRaBandwidth
<LI><a href="#[12e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dmul
<LI><a href="#[12c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_i2d
<LI><a href="#[12d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_ddiv
</UL>
<BR>[Address Reference Count : 1]<UL><LI> sx1281-hal.o(.constdata)
</UL>
<P><STRONG><a name="[75]"></a>SX1281GetIrqStatus</STRONG> (Thumb, 20 bytes, Stack size 8 bytes, sx1281.o(i.SX1281GetIrqStatus))
<BR><BR>[Stack]<UL><LI>Max Depth = 176<LI>Call Chain = SX1281GetIrqStatus &rArr; SX1281HalReadCommand &rArr; SpiInOut &rArr; BSP_SPI_TransmitReceive &rArr; HAL_SPI_TransmitReceive &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[4f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281HalReadCommand
</UL>
<BR>[Called By]<UL><LI><a href="#[135]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281ProcessIrqs
</UL>
<BR>[Address Reference Count : 1]<UL><LI> sx1281-hal.o(.constdata)
</UL>
<P><STRONG><a name="[12b]"></a>SX1281GetLoRaBandwidth</STRONG> (Thumb, 38 bytes, Stack size 0 bytes, sx1281.o(i.SX1281GetLoRaBandwidth))
<BR><BR>[Called By]<UL><LI><a href="#[83]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281GetFrequencyError
</UL>
<P><STRONG><a name="[68]"></a>SX1281GetOpMode</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, sx1281.o(i.SX1281GetOpMode))
<BR>[Address Reference Count : 1]<UL><LI> sx1281-hal.o(.constdata)
</UL>
<P><STRONG><a name="[73]"></a>SX1281GetPacketStatus</STRONG> (Thumb, 526 bytes, Stack size 16 bytes, sx1281.o(i.SX1281GetPacketStatus))
<BR><BR>[Stack]<UL><LI>Max Depth = 184<LI>Call Chain = SX1281GetPacketStatus &rArr; SX1281HalReadCommand &rArr; SpiInOut &rArr; BSP_SPI_TransmitReceive &rArr; HAL_SPI_TransmitReceive &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[4f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281HalReadCommand
</UL>
<BR>[Address Reference Count : 1]<UL><LI> sx1281-hal.o(.constdata)
</UL>
<P><STRONG><a name="[70]"></a>SX1281GetPacketType</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, sx1281.o(i.SX1281GetPacketType))
<BR>[Address Reference Count : 1]<UL><LI> sx1281-hal.o(.constdata)
</UL>
<P><STRONG><a name="[63]"></a>SX1281GetPayload</STRONG> (Thumb, 40 bytes, Stack size 24 bytes, sx1281.o(i.SX1281GetPayload))
<BR><BR>[Stack]<UL><LI>Max Depth = 224<LI>Call Chain = SX1281GetPayload &rArr; SX1281GetRxBufferStatus &rArr; SX1281HalReadRegister &rArr; SX1281HalReadRegisters &rArr; SpiInOut &rArr; BSP_SPI_TransmitReceive &rArr; HAL_SPI_TransmitReceive &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[55]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281HalReadBuffer
<LI><a href="#[72]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281GetRxBufferStatus
</UL>
<BR>[Address Reference Count : 1]<UL><LI> sx1281-hal.o(.constdata)
</UL>
<P><STRONG><a name="[74]"></a>SX1281GetRssiInst</STRONG> (Thumb, 34 bytes, Stack size 8 bytes, sx1281.o(i.SX1281GetRssiInst))
<BR><BR>[Stack]<UL><LI>Max Depth = 176<LI>Call Chain = SX1281GetRssiInst &rArr; SX1281HalReadCommand &rArr; SpiInOut &rArr; BSP_SPI_TransmitReceive &rArr; HAL_SPI_TransmitReceive &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[4f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281HalReadCommand
</UL>
<BR>[Address Reference Count : 1]<UL><LI> sx1281-hal.o(.constdata)
</UL>
<P><STRONG><a name="[72]"></a>SX1281GetRxBufferStatus</STRONG> (Thumb, 68 bytes, Stack size 24 bytes, sx1281.o(i.SX1281GetRxBufferStatus))
<BR><BR>[Stack]<UL><LI>Max Depth = 200<LI>Call Chain = SX1281GetRxBufferStatus &rArr; SX1281HalReadRegister &rArr; SX1281HalReadRegisters &rArr; SpiInOut &rArr; BSP_SPI_TransmitReceive &rArr; HAL_SPI_TransmitReceive &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[53]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281HalReadRegister
<LI><a href="#[4f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281HalReadCommand
</UL>
<BR>[Called By]<UL><LI><a href="#[63]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281GetPayload
</UL>
<BR>[Address Reference Count : 1]<UL><LI> sx1281-hal.o(.constdata)
</UL>
<P><STRONG><a name="[4d]"></a>SX1281GetStatus</STRONG> (Thumb, 24 bytes, Stack size 8 bytes, sx1281.o(i.SX1281GetStatus))
<BR><BR>[Stack]<UL><LI>Max Depth = 176<LI>Call Chain = SX1281GetStatus &rArr; SX1281HalReadCommand &rArr; SpiInOut &rArr; BSP_SPI_TransmitReceive &rArr; HAL_SPI_TransmitReceive &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[4f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281HalReadCommand
</UL>
<BR>[Address Reference Count : 1]<UL><LI> sx1281-hal.o(.constdata)
</UL>
<P><STRONG><a name="[56]"></a>SX1281HalGetDioStatus</STRONG> (Thumb, 32 bytes, Stack size 16 bytes, sx1281-hal.o(i.SX1281HalGetDioStatus))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = SX1281HalGetDioStatus
</UL>
<BR>[Calls]<UL><LI><a href="#[e4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GpioRead
</UL>
<BR>[Address Reference Count : 1]<UL><LI> sx1281-hal.o(.constdata)
</UL>
<P><STRONG><a name="[12f]"></a>SX1281HalInit</STRONG> (Thumb, 18 bytes, Stack size 8 bytes, sx1281-hal.o(i.SX1281HalInit))
<BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = SX1281HalInit &rArr; SX1281HalIoIrqInit &rArr; GpioSetIrq &rArr; HAL_NVIC_SetPriority
</UL>
<BR>[Calls]<UL><LI><a href="#[4c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281HalReset
<LI><a href="#[130]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281HalIoIrqInit
</UL>
<BR>[Called By]<UL><LI><a href="#[4b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281Init
</UL>
<P><STRONG><a name="[130]"></a>SX1281HalIoIrqInit</STRONG> (Thumb, 12 bytes, Stack size 0 bytes, sx1281-hal.o(i.SX1281HalIoIrqInit))
<BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = SX1281HalIoIrqInit &rArr; GpioSetIrq &rArr; HAL_NVIC_SetPriority
</UL>
<BR>[Calls]<UL><LI><a href="#[e6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GpioSetIrq
</UL>
<BR>[Called By]<UL><LI><a href="#[12f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281HalInit
</UL>
<P><STRONG><a name="[55]"></a>SX1281HalReadBuffer</STRONG> (Thumb, 96 bytes, Stack size 24 bytes, sx1281-hal.o(i.SX1281HalReadBuffer))
<BR><BR>[Stack]<UL><LI>Max Depth = 168<LI>Call Chain = SX1281HalReadBuffer &rArr; SpiInOut &rArr; BSP_SPI_TransmitReceive &rArr; HAL_SPI_TransmitReceive &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[132]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SpiInOut
<LI><a href="#[eb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GpioWrite
<LI><a href="#[131]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281HalWaitOnBusy
<LI><a href="#[133]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memcpy
</UL>
<BR>[Called By]<UL><LI><a href="#[63]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281GetPayload
</UL>
<BR>[Address Reference Count : 1]<UL><LI> sx1281-hal.o(.constdata)
</UL>
<P><STRONG><a name="[4f]"></a>SX1281HalReadCommand</STRONG> (Thumb, 94 bytes, Stack size 24 bytes, sx1281-hal.o(i.SX1281HalReadCommand))
<BR><BR>[Stack]<UL><LI>Max Depth = 168<LI>Call Chain = SX1281HalReadCommand &rArr; SpiInOut &rArr; BSP_SPI_TransmitReceive &rArr; HAL_SPI_TransmitReceive &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[132]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SpiInOut
<LI><a href="#[eb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GpioWrite
<LI><a href="#[131]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281HalWaitOnBusy
<LI><a href="#[133]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memcpy
</UL>
<BR>[Called By]<UL><LI><a href="#[4d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281GetStatus
<LI><a href="#[72]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281GetRxBufferStatus
<LI><a href="#[74]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281GetRssiInst
<LI><a href="#[73]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281GetPacketStatus
<LI><a href="#[75]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281GetIrqStatus
</UL>
<BR>[Address Reference Count : 1]<UL><LI> sx1281-hal.o(.constdata)
</UL>
<P><STRONG><a name="[53]"></a>SX1281HalReadRegister</STRONG> (Thumb, 16 bytes, Stack size 8 bytes, sx1281-hal.o(i.SX1281HalReadRegister))
<BR><BR>[Stack]<UL><LI>Max Depth = 176<LI>Call Chain = SX1281HalReadRegister &rArr; SX1281HalReadRegisters &rArr; SpiInOut &rArr; BSP_SPI_TransmitReceive &rArr; HAL_SPI_TransmitReceive &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[52]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281HalReadRegisters
</UL>
<BR>[Called By]<UL><LI><a href="#[7d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281SetSyncWordErrorTolerance
<LI><a href="#[72]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281GetRxBufferStatus
<LI><a href="#[83]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281GetFrequencyError
<LI><a href="#[57]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281GetFirmwareVersion
</UL>
<BR>[Address Reference Count : 1]<UL><LI> sx1281-hal.o(.constdata)
</UL>
<P><STRONG><a name="[52]"></a>SX1281HalReadRegisters</STRONG> (Thumb, 100 bytes, Stack size 24 bytes, sx1281-hal.o(i.SX1281HalReadRegisters))
<BR><BR>[Stack]<UL><LI>Max Depth = 168<LI>Call Chain = SX1281HalReadRegisters &rArr; SpiInOut &rArr; BSP_SPI_TransmitReceive &rArr; HAL_SPI_TransmitReceive &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[132]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SpiInOut
<LI><a href="#[eb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GpioWrite
<LI><a href="#[131]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281HalWaitOnBusy
<LI><a href="#[133]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memcpy
</UL>
<BR>[Called By]<UL><LI><a href="#[53]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281HalReadRegister
</UL>
<BR>[Address Reference Count : 1]<UL><LI> sx1281-hal.o(.constdata)
</UL>
<P><STRONG><a name="[4c]"></a>SX1281HalReset</STRONG> (Thumb, 46 bytes, Stack size 8 bytes, sx1281-hal.o(i.SX1281HalReset))
<BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = SX1281HalReset &rArr; HAL_Delay
</UL>
<BR>[Calls]<UL><LI><a href="#[ef]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_Delay
<LI><a href="#[eb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GpioWrite
</UL>
<BR>[Called By]<UL><LI><a href="#[a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
<LI><a href="#[12f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281HalInit
</UL>
<BR>[Address Reference Count : 1]<UL><LI> sx1281-hal.o(.constdata)
</UL>
<P><STRONG><a name="[131]"></a>SX1281HalWaitOnBusy</STRONG> (Thumb, 22 bytes, Stack size 16 bytes, sx1281-hal.o(i.SX1281HalWaitOnBusy))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = SX1281HalWaitOnBusy
</UL>
<BR>[Calls]<UL><LI><a href="#[e5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GPIO_ReadPin
</UL>
<BR>[Called By]<UL><LI><a href="#[52]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281HalReadRegisters
<LI><a href="#[50]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281HalWriteRegisters
<LI><a href="#[4e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281HalWriteCommand
<LI><a href="#[54]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281HalWriteBuffer
<LI><a href="#[4f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281HalReadCommand
<LI><a href="#[55]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281HalReadBuffer
</UL>
<P><STRONG><a name="[54]"></a>SX1281HalWriteBuffer</STRONG> (Thumb, 64 bytes, Stack size 16 bytes, sx1281-hal.o(i.SX1281HalWriteBuffer))
<BR><BR>[Stack]<UL><LI>Max Depth = 120<LI>Call Chain = SX1281HalWriteBuffer &rArr; SpiIn &rArr; BSP_SPI_Transmit &rArr; HAL_SPI_Transmit &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[134]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SpiIn
<LI><a href="#[eb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GpioWrite
<LI><a href="#[131]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281HalWaitOnBusy
<LI><a href="#[133]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memcpy
</UL>
<BR>[Called By]<UL><LI><a href="#[7c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281SetPayload
</UL>
<BR>[Address Reference Count : 1]<UL><LI> sx1281-hal.o(.constdata)
</UL>
<P><STRONG><a name="[4e]"></a>SX1281HalWriteCommand</STRONG> (Thumb, 78 bytes, Stack size 24 bytes, sx1281-hal.o(i.SX1281HalWriteCommand))
<BR><BR>[Stack]<UL><LI>Max Depth = 128<LI>Call Chain = SX1281HalWriteCommand &rArr; SpiIn &rArr; BSP_SPI_Transmit &rArr; HAL_SPI_Transmit &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[134]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SpiIn
<LI><a href="#[eb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GpioWrite
<LI><a href="#[131]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281HalWaitOnBusy
<LI><a href="#[133]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memcpy
</UL>
<BR>[Called By]<UL><LI><a href="#[5f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281SetTxParams
<LI><a href="#[6e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281SetTxContinuousWave
<LI><a href="#[6f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281SetTxContinuousPreamble
<LI><a href="#[6b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281SetTx
<LI><a href="#[59]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281SetStandby
<LI><a href="#[69]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281SetSleep
<LI><a href="#[78]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281SetSaveContext
<LI><a href="#[6c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281SetRxDutyCycle
<LI><a href="#[62]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281SetRx
<LI><a href="#[5d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281SetRfFrequency
<LI><a href="#[58]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281SetRegulatorMode
<LI><a href="#[5a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281SetPacketType
<LI><a href="#[5c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281SetPacketParams
<LI><a href="#[5b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281SetModulationParams
<LI><a href="#[7b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281SetLongPreamble
<LI><a href="#[6a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281SetFs
<LI><a href="#[60]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281SetDioIrqParams
<LI><a href="#[71]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281SetCadParams
<LI><a href="#[6d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281SetCad
<LI><a href="#[5e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281SetBufferBaseAddresses
<LI><a href="#[79]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281SetAutoTx
<LI><a href="#[7a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281SetAutoFS
<LI><a href="#[76]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281ClearIrqStatus
<LI><a href="#[77]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281Calibrate
</UL>
<BR>[Address Reference Count : 1]<UL><LI> sx1281-hal.o(.constdata)
</UL>
<P><STRONG><a name="[51]"></a>SX1281HalWriteRegister</STRONG> (Thumb, 12 bytes, Stack size 16 bytes, sx1281-hal.o(i.SX1281HalWriteRegister))
<BR><BR>[Stack]<UL><LI>Max Depth = 136<LI>Call Chain = SX1281HalWriteRegister &rArr; SX1281HalWriteRegisters &rArr; SpiIn &rArr; BSP_SPI_Transmit &rArr; HAL_SPI_Transmit &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[50]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281HalWriteRegisters
</UL>
<BR>[Called By]<UL><LI><a href="#[82]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281SetWhiteningSeed
<LI><a href="#[7d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281SetSyncWordErrorTolerance
<LI><a href="#[67]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281SetRegistersDefault
<LI><a href="#[7f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281SetBleAccessAddress
</UL>
<BR>[Address Reference Count : 1]<UL><LI> sx1281-hal.o(.constdata)
</UL>
<P><STRONG><a name="[50]"></a>SX1281HalWriteRegisters</STRONG> (Thumb, 72 bytes, Stack size 16 bytes, sx1281-hal.o(i.SX1281HalWriteRegisters))
<BR><BR>[Stack]<UL><LI>Max Depth = 120<LI>Call Chain = SX1281HalWriteRegisters &rArr; SpiIn &rArr; BSP_SPI_Transmit &rArr; HAL_SPI_Transmit &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[134]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SpiIn
<LI><a href="#[eb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GpioWrite
<LI><a href="#[131]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281HalWaitOnBusy
<LI><a href="#[133]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memcpy
</UL>
<BR>[Called By]<UL><LI><a href="#[51]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281HalWriteRegister
<LI><a href="#[61]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281SetSyncWord
<LI><a href="#[7e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281SetCrcSeed
<LI><a href="#[81]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281SetCrcPolynomial
</UL>
<BR>[Address Reference Count : 1]<UL><LI> sx1281-hal.o(.constdata)
</UL>
<P><STRONG><a name="[4b]"></a>SX1281Init</STRONG> (Thumb, 12 bytes, Stack size 0 bytes, sx1281.o(i.SX1281Init))
<BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = SX1281Init &rArr; SX1281HalInit &rArr; SX1281HalIoIrqInit &rArr; GpioSetIrq &rArr; HAL_NVIC_SetPriority
</UL>
<BR>[Calls]<UL><LI><a href="#[12f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281HalInit
</UL>
<BR>[Address Reference Count : 1]<UL><LI> sx1281-hal.o(.constdata)
</UL>
<P><STRONG><a name="[89]"></a>SX1281OnDioIrq</STRONG> (Thumb, 16 bytes, Stack size 0 bytes, sx1281.o(i.SX1281OnDioIrq))
<BR><BR>[Stack]<UL><LI>Max Depth = 192<LI>Call Chain = SX1281OnDioIrq &rArr; SX1281ProcessIrqs &rArr; SX1281GetIrqStatus &rArr; SX1281HalReadCommand &rArr; SpiInOut &rArr; BSP_SPI_TransmitReceive &rArr; HAL_SPI_TransmitReceive &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[135]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281ProcessIrqs
</UL>
<BR>[Address Reference Count : 1]<UL><LI> sx1281.o(.data)
</UL>
<P><STRONG><a name="[135]"></a>SX1281ProcessIrqs</STRONG> (Thumb, 328 bytes, Stack size 16 bytes, sx1281.o(i.SX1281ProcessIrqs))
<BR><BR>[Stack]<UL><LI>Max Depth = 192<LI>Call Chain = SX1281ProcessIrqs &rArr; SX1281GetIrqStatus &rArr; SX1281HalReadCommand &rArr; SpiInOut &rArr; BSP_SPI_TransmitReceive &rArr; HAL_SPI_TransmitReceive &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[75]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281GetIrqStatus
<LI><a href="#[76]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281ClearIrqStatus
</UL>
<BR>[Called By]<UL><LI><a href="#[a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
<LI><a href="#[89]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281OnDioIrq
</UL>
<P><STRONG><a name="[64]"></a>SX1281SendPayload</STRONG> (Thumb, 18 bytes, Stack size 8 bytes, sx1281.o(i.SX1281SendPayload))
<BR><BR>[Stack]<UL><LI>Max Depth = 152<LI>Call Chain = SX1281SendPayload &rArr; SX1281SetTx &rArr; SX1281ClearIrqStatus &rArr; SX1281HalWriteCommand &rArr; SpiIn &rArr; BSP_SPI_Transmit &rArr; HAL_SPI_Transmit &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[6b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281SetTx
<LI><a href="#[7c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281SetPayload
</UL>
<BR>[Address Reference Count : 1]<UL><LI> sx1281-hal.o(.constdata)
</UL>
<P><STRONG><a name="[7a]"></a>SX1281SetAutoFS</STRONG> (Thumb, 14 bytes, Stack size 8 bytes, sx1281.o(i.SX1281SetAutoFS))
<BR><BR>[Stack]<UL><LI>Max Depth = 136<LI>Call Chain = SX1281SetAutoFS &rArr; SX1281HalWriteCommand &rArr; SpiIn &rArr; BSP_SPI_Transmit &rArr; HAL_SPI_Transmit &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[4e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281HalWriteCommand
</UL>
<BR>[Address Reference Count : 1]<UL><LI> sx1281-hal.o(.constdata)
</UL>
<P><STRONG><a name="[79]"></a>SX1281SetAutoTx</STRONG> (Thumb, 26 bytes, Stack size 8 bytes, sx1281.o(i.SX1281SetAutoTx))
<BR><BR>[Stack]<UL><LI>Max Depth = 136<LI>Call Chain = SX1281SetAutoTx &rArr; SX1281HalWriteCommand &rArr; SpiIn &rArr; BSP_SPI_Transmit &rArr; HAL_SPI_Transmit &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[4e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281HalWriteCommand
</UL>
<BR>[Address Reference Count : 1]<UL><LI> sx1281-hal.o(.constdata)
</UL>
<P><STRONG><a name="[7f]"></a>SX1281SetBleAccessAddress</STRONG> (Thumb, 52 bytes, Stack size 8 bytes, sx1281.o(i.SX1281SetBleAccessAddress))
<BR><BR>[Stack]<UL><LI>Max Depth = 144<LI>Call Chain = SX1281SetBleAccessAddress &rArr; SX1281HalWriteRegister &rArr; SX1281HalWriteRegisters &rArr; SpiIn &rArr; BSP_SPI_Transmit &rArr; HAL_SPI_Transmit &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[51]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281HalWriteRegister
</UL>
<BR>[Called By]<UL><LI><a href="#[80]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281SetBleAdvertizerAccessAddress
</UL>
<BR>[Address Reference Count : 1]<UL><LI> sx1281-hal.o(.constdata)
</UL>
<P><STRONG><a name="[80]"></a>SX1281SetBleAdvertizerAccessAddress</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, sx1281.o(i.SX1281SetBleAdvertizerAccessAddress))
<BR><BR>[Stack]<UL><LI>Max Depth = 144<LI>Call Chain = SX1281SetBleAdvertizerAccessAddress &rArr; SX1281SetBleAccessAddress &rArr; SX1281HalWriteRegister &rArr; SX1281HalWriteRegisters &rArr; SpiIn &rArr; BSP_SPI_Transmit &rArr; HAL_SPI_Transmit &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[7f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281SetBleAccessAddress
</UL>
<BR>[Address Reference Count : 1]<UL><LI> sx1281-hal.o(.constdata)
</UL>
<P><STRONG><a name="[5e]"></a>SX1281SetBufferBaseAddresses</STRONG> (Thumb, 22 bytes, Stack size 8 bytes, sx1281.o(i.SX1281SetBufferBaseAddresses))
<BR><BR>[Stack]<UL><LI>Max Depth = 136<LI>Call Chain = SX1281SetBufferBaseAddresses &rArr; SX1281HalWriteCommand &rArr; SpiIn &rArr; BSP_SPI_Transmit &rArr; HAL_SPI_Transmit &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[4e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281HalWriteCommand
</UL>
<BR>[Address Reference Count : 1]<UL><LI> sx1281-hal.o(.constdata)
</UL>
<P><STRONG><a name="[6d]"></a>SX1281SetCad</STRONG> (Thumb, 20 bytes, Stack size 8 bytes, sx1281.o(i.SX1281SetCad))
<BR><BR>[Stack]<UL><LI>Max Depth = 136<LI>Call Chain = SX1281SetCad &rArr; SX1281HalWriteCommand &rArr; SpiIn &rArr; BSP_SPI_Transmit &rArr; HAL_SPI_Transmit &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[4e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281HalWriteCommand
</UL>
<BR>[Address Reference Count : 1]<UL><LI> sx1281-hal.o(.constdata)
</UL>
<P><STRONG><a name="[71]"></a>SX1281SetCadParams</STRONG> (Thumb, 20 bytes, Stack size 8 bytes, sx1281.o(i.SX1281SetCadParams))
<BR><BR>[Stack]<UL><LI>Max Depth = 136<LI>Call Chain = SX1281SetCadParams &rArr; SX1281HalWriteCommand &rArr; SpiIn &rArr; BSP_SPI_Transmit &rArr; HAL_SPI_Transmit &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[4e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281HalWriteCommand
</UL>
<BR>[Address Reference Count : 1]<UL><LI> sx1281-hal.o(.constdata)
</UL>
<P><STRONG><a name="[81]"></a>SX1281SetCrcPolynomial</STRONG> (Thumb, 36 bytes, Stack size 8 bytes, sx1281.o(i.SX1281SetCrcPolynomial))
<BR><BR>[Stack]<UL><LI>Max Depth = 128<LI>Call Chain = SX1281SetCrcPolynomial &rArr; SX1281HalWriteRegisters &rArr; SpiIn &rArr; BSP_SPI_Transmit &rArr; HAL_SPI_Transmit &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[50]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281HalWriteRegisters
</UL>
<BR>[Address Reference Count : 1]<UL><LI> sx1281-hal.o(.constdata)
</UL>
<P><STRONG><a name="[7e]"></a>SX1281SetCrcSeed</STRONG> (Thumb, 36 bytes, Stack size 8 bytes, sx1281.o(i.SX1281SetCrcSeed))
<BR><BR>[Stack]<UL><LI>Max Depth = 128<LI>Call Chain = SX1281SetCrcSeed &rArr; SX1281HalWriteRegisters &rArr; SpiIn &rArr; BSP_SPI_Transmit &rArr; HAL_SPI_Transmit &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[50]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281HalWriteRegisters
</UL>
<BR>[Address Reference Count : 1]<UL><LI> sx1281-hal.o(.constdata)
</UL>
<P><STRONG><a name="[60]"></a>SX1281SetDioIrqParams</STRONG> (Thumb, 54 bytes, Stack size 16 bytes, sx1281.o(i.SX1281SetDioIrqParams))
<BR><BR>[Stack]<UL><LI>Max Depth = 144<LI>Call Chain = SX1281SetDioIrqParams &rArr; SX1281HalWriteCommand &rArr; SpiIn &rArr; BSP_SPI_Transmit &rArr; HAL_SPI_Transmit &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[4e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281HalWriteCommand
</UL>
<BR>[Address Reference Count : 1]<UL><LI> sx1281-hal.o(.constdata)
</UL>
<P><STRONG><a name="[6a]"></a>SX1281SetFs</STRONG> (Thumb, 20 bytes, Stack size 8 bytes, sx1281.o(i.SX1281SetFs))
<BR><BR>[Stack]<UL><LI>Max Depth = 136<LI>Call Chain = SX1281SetFs &rArr; SX1281HalWriteCommand &rArr; SpiIn &rArr; BSP_SPI_Transmit &rArr; HAL_SPI_Transmit &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[4e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281HalWriteCommand
</UL>
<BR>[Address Reference Count : 1]<UL><LI> sx1281-hal.o(.constdata)
</UL>
<P><STRONG><a name="[66]"></a>SX1281SetInterruptMode</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, sx1281.o(i.SX1281SetInterruptMode))
<BR><BR>[Called By]<UL><LI><a href="#[a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>
<BR>[Address Reference Count : 1]<UL><LI> sx1281-hal.o(.constdata)
</UL>
<P><STRONG><a name="[7b]"></a>SX1281SetLongPreamble</STRONG> (Thumb, 14 bytes, Stack size 8 bytes, sx1281.o(i.SX1281SetLongPreamble))
<BR><BR>[Stack]<UL><LI>Max Depth = 136<LI>Call Chain = SX1281SetLongPreamble &rArr; SX1281HalWriteCommand &rArr; SpiIn &rArr; BSP_SPI_Transmit &rArr; HAL_SPI_Transmit &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[4e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281HalWriteCommand
</UL>
<BR>[Address Reference Count : 1]<UL><LI> sx1281-hal.o(.constdata)
</UL>
<P><STRONG><a name="[5b]"></a>SX1281SetModulationParams</STRONG> (Thumb, 142 bytes, Stack size 16 bytes, sx1281.o(i.SX1281SetModulationParams))
<BR><BR>[Stack]<UL><LI>Max Depth = 152<LI>Call Chain = SX1281SetModulationParams &rArr; SX1281SetPacketType &rArr; SX1281HalWriteCommand &rArr; SpiIn &rArr; BSP_SPI_Transmit &rArr; HAL_SPI_Transmit &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[4e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281HalWriteCommand
<LI><a href="#[5a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281SetPacketType
</UL>
<BR>[Address Reference Count : 1]<UL><LI> sx1281-hal.o(.constdata)
</UL>
<P><STRONG><a name="[5c]"></a>SX1281SetPacketParams</STRONG> (Thumb, 212 bytes, Stack size 16 bytes, sx1281.o(i.SX1281SetPacketParams))
<BR><BR>[Stack]<UL><LI>Max Depth = 152<LI>Call Chain = SX1281SetPacketParams &rArr; SX1281SetPacketType &rArr; SX1281HalWriteCommand &rArr; SpiIn &rArr; BSP_SPI_Transmit &rArr; HAL_SPI_Transmit &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[4e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281HalWriteCommand
<LI><a href="#[5a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281SetPacketType
</UL>
<BR>[Address Reference Count : 1]<UL><LI> sx1281-hal.o(.constdata)
</UL>
<P><STRONG><a name="[5a]"></a>SX1281SetPacketType</STRONG> (Thumb, 22 bytes, Stack size 8 bytes, sx1281.o(i.SX1281SetPacketType))
<BR><BR>[Stack]<UL><LI>Max Depth = 136<LI>Call Chain = SX1281SetPacketType &rArr; SX1281HalWriteCommand &rArr; SpiIn &rArr; BSP_SPI_Transmit &rArr; HAL_SPI_Transmit &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[4e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281HalWriteCommand
</UL>
<BR>[Called By]<UL><LI><a href="#[5c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281SetPacketParams
<LI><a href="#[5b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281SetModulationParams
</UL>
<BR>[Address Reference Count : 1]<UL><LI> sx1281-hal.o(.constdata)
</UL>
<P><STRONG><a name="[7c]"></a>SX1281SetPayload</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, sx1281.o(i.SX1281SetPayload))
<BR><BR>[Stack]<UL><LI>Max Depth = 120<LI>Call Chain = SX1281SetPayload &rArr; SX1281HalWriteBuffer &rArr; SpiIn &rArr; BSP_SPI_Transmit &rArr; HAL_SPI_Transmit &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[54]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281HalWriteBuffer
</UL>
<BR>[Called By]<UL><LI><a href="#[64]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281SendPayload
</UL>
<BR>[Address Reference Count : 1]<UL><LI> sx1281-hal.o(.constdata)
</UL>
<P><STRONG><a name="[65]"></a>SX1281SetPollingMode</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, sx1281.o(i.SX1281SetPollingMode))
<BR>[Address Reference Count : 1]<UL><LI> sx1281-hal.o(.constdata)
</UL>
<P><STRONG><a name="[67]"></a>SX1281SetRegistersDefault</STRONG> (Thumb, 32 bytes, Stack size 16 bytes, sx1281.o(i.SX1281SetRegistersDefault))
<BR><BR>[Stack]<UL><LI>Max Depth = 152<LI>Call Chain = SX1281SetRegistersDefault &rArr; SX1281HalWriteRegister &rArr; SX1281HalWriteRegisters &rArr; SpiIn &rArr; BSP_SPI_Transmit &rArr; HAL_SPI_Transmit &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[51]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281HalWriteRegister
</UL>
<BR>[Address Reference Count : 1]<UL><LI> sx1281-hal.o(.constdata)
</UL>
<P><STRONG><a name="[58]"></a>SX1281SetRegulatorMode</STRONG> (Thumb, 14 bytes, Stack size 8 bytes, sx1281.o(i.SX1281SetRegulatorMode))
<BR><BR>[Stack]<UL><LI>Max Depth = 136<LI>Call Chain = SX1281SetRegulatorMode &rArr; SX1281HalWriteCommand &rArr; SpiIn &rArr; BSP_SPI_Transmit &rArr; HAL_SPI_Transmit &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[4e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281HalWriteCommand
</UL>
<BR>[Address Reference Count : 1]<UL><LI> sx1281-hal.o(.constdata)
</UL>
<P><STRONG><a name="[5d]"></a>SX1281SetRfFrequency</STRONG> (Thumb, 46 bytes, Stack size 8 bytes, sx1281.o(i.SX1281SetRfFrequency))
<BR><BR>[Stack]<UL><LI>Max Depth = 136<LI>Call Chain = SX1281SetRfFrequency &rArr; SX1281HalWriteCommand &rArr; SpiIn &rArr; BSP_SPI_Transmit &rArr; HAL_SPI_Transmit &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[4e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281HalWriteCommand
<LI><a href="#[136]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_ui2d
<LI><a href="#[137]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_d2uiz
<LI><a href="#[12d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_ddiv
</UL>
<BR>[Address Reference Count : 1]<UL><LI> sx1281-hal.o(.constdata)
</UL>
<P><STRONG><a name="[62]"></a>SX1281SetRx</STRONG> (Thumb, 44 bytes, Stack size 8 bytes, sx1281.o(i.SX1281SetRx))
<BR><BR>[Stack]<UL><LI>Max Depth = 144<LI>Call Chain = SX1281SetRx &rArr; SX1281ClearIrqStatus &rArr; SX1281HalWriteCommand &rArr; SpiIn &rArr; BSP_SPI_Transmit &rArr; HAL_SPI_Transmit &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[4e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281HalWriteCommand
<LI><a href="#[76]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281ClearIrqStatus
</UL>
<BR>[Address Reference Count : 1]<UL><LI> sx1281-hal.o(.constdata)
</UL>
<P><STRONG><a name="[6c]"></a>SX1281SetRxDutyCycle</STRONG> (Thumb, 44 bytes, Stack size 16 bytes, sx1281.o(i.SX1281SetRxDutyCycle))
<BR><BR>[Stack]<UL><LI>Max Depth = 144<LI>Call Chain = SX1281SetRxDutyCycle &rArr; SX1281HalWriteCommand &rArr; SpiIn &rArr; BSP_SPI_Transmit &rArr; HAL_SPI_Transmit &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[4e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281HalWriteCommand
</UL>
<BR>[Address Reference Count : 1]<UL><LI> sx1281-hal.o(.constdata)
</UL>
<P><STRONG><a name="[78]"></a>SX1281SetSaveContext</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, sx1281.o(i.SX1281SetSaveContext))
<BR><BR>[Stack]<UL><LI>Max Depth = 128<LI>Call Chain = SX1281SetSaveContext &rArr; SX1281HalWriteCommand &rArr; SpiIn &rArr; BSP_SPI_Transmit &rArr; HAL_SPI_Transmit &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[4e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281HalWriteCommand
</UL>
<BR>[Address Reference Count : 1]<UL><LI> sx1281-hal.o(.constdata)
</UL>
<P><STRONG><a name="[69]"></a>SX1281SetSleep</STRONG> (Thumb, 50 bytes, Stack size 8 bytes, sx1281.o(i.SX1281SetSleep))
<BR><BR>[Stack]<UL><LI>Max Depth = 136<LI>Call Chain = SX1281SetSleep &rArr; SX1281HalWriteCommand &rArr; SpiIn &rArr; BSP_SPI_Transmit &rArr; HAL_SPI_Transmit &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[4e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281HalWriteCommand
</UL>
<BR>[Address Reference Count : 1]<UL><LI> sx1281-hal.o(.constdata)
</UL>
<P><STRONG><a name="[59]"></a>SX1281SetStandby</STRONG> (Thumb, 30 bytes, Stack size 8 bytes, sx1281.o(i.SX1281SetStandby))
<BR><BR>[Stack]<UL><LI>Max Depth = 136<LI>Call Chain = SX1281SetStandby &rArr; SX1281HalWriteCommand &rArr; SpiIn &rArr; BSP_SPI_Transmit &rArr; HAL_SPI_Transmit &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[4e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281HalWriteCommand
</UL>
<BR>[Address Reference Count : 1]<UL><LI> sx1281-hal.o(.constdata)
</UL>
<P><STRONG><a name="[61]"></a>SX1281SetSyncWord</STRONG> (Thumb, 104 bytes, Stack size 8 bytes, sx1281.o(i.SX1281SetSyncWord))
<BR><BR>[Stack]<UL><LI>Max Depth = 128<LI>Call Chain = SX1281SetSyncWord &rArr; SX1281HalWriteRegisters &rArr; SpiIn &rArr; BSP_SPI_Transmit &rArr; HAL_SPI_Transmit &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[50]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281HalWriteRegisters
</UL>
<BR>[Address Reference Count : 1]<UL><LI> sx1281-hal.o(.constdata)
</UL>
<P><STRONG><a name="[7d]"></a>SX1281SetSyncWordErrorTolerance</STRONG> (Thumb, 34 bytes, Stack size 16 bytes, sx1281.o(i.SX1281SetSyncWordErrorTolerance))
<BR><BR>[Stack]<UL><LI>Max Depth = 192<LI>Call Chain = SX1281SetSyncWordErrorTolerance &rArr; SX1281HalReadRegister &rArr; SX1281HalReadRegisters &rArr; SpiInOut &rArr; BSP_SPI_TransmitReceive &rArr; HAL_SPI_TransmitReceive &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[51]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281HalWriteRegister
<LI><a href="#[53]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281HalReadRegister
</UL>
<BR>[Address Reference Count : 1]<UL><LI> sx1281-hal.o(.constdata)
</UL>
<P><STRONG><a name="[6b]"></a>SX1281SetTx</STRONG> (Thumb, 44 bytes, Stack size 8 bytes, sx1281.o(i.SX1281SetTx))
<BR><BR>[Stack]<UL><LI>Max Depth = 144<LI>Call Chain = SX1281SetTx &rArr; SX1281ClearIrqStatus &rArr; SX1281HalWriteCommand &rArr; SpiIn &rArr; BSP_SPI_Transmit &rArr; HAL_SPI_Transmit &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[4e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281HalWriteCommand
<LI><a href="#[76]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281ClearIrqStatus
</UL>
<BR>[Called By]<UL><LI><a href="#[64]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281SendPayload
</UL>
<BR>[Address Reference Count : 1]<UL><LI> sx1281-hal.o(.constdata)
</UL>
<P><STRONG><a name="[6f]"></a>SX1281SetTxContinuousPreamble</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, sx1281.o(i.SX1281SetTxContinuousPreamble))
<BR><BR>[Stack]<UL><LI>Max Depth = 128<LI>Call Chain = SX1281SetTxContinuousPreamble &rArr; SX1281HalWriteCommand &rArr; SpiIn &rArr; BSP_SPI_Transmit &rArr; HAL_SPI_Transmit &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[4e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281HalWriteCommand
</UL>
<BR>[Address Reference Count : 1]<UL><LI> sx1281-hal.o(.constdata)
</UL>
<P><STRONG><a name="[6e]"></a>SX1281SetTxContinuousWave</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, sx1281.o(i.SX1281SetTxContinuousWave))
<BR><BR>[Stack]<UL><LI>Max Depth = 128<LI>Call Chain = SX1281SetTxContinuousWave &rArr; SX1281HalWriteCommand &rArr; SpiIn &rArr; BSP_SPI_Transmit &rArr; HAL_SPI_Transmit &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[4e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281HalWriteCommand
</UL>
<BR>[Address Reference Count : 1]<UL><LI> sx1281-hal.o(.constdata)
</UL>
<P><STRONG><a name="[5f]"></a>SX1281SetTxParams</STRONG> (Thumb, 24 bytes, Stack size 8 bytes, sx1281.o(i.SX1281SetTxParams))
<BR><BR>[Stack]<UL><LI>Max Depth = 136<LI>Call Chain = SX1281SetTxParams &rArr; SX1281HalWriteCommand &rArr; SpiIn &rArr; BSP_SPI_Transmit &rArr; HAL_SPI_Transmit &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[4e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281HalWriteCommand
</UL>
<BR>[Address Reference Count : 1]<UL><LI> sx1281-hal.o(.constdata)
</UL>
<P><STRONG><a name="[82]"></a>SX1281SetWhiteningSeed</STRONG> (Thumb, 26 bytes, Stack size 0 bytes, sx1281.o(i.SX1281SetWhiteningSeed))
<BR><BR>[Stack]<UL><LI>Max Depth = 136<LI>Call Chain = SX1281SetWhiteningSeed &rArr; SX1281HalWriteRegister &rArr; SX1281HalWriteRegisters &rArr; SpiIn &rArr; BSP_SPI_Transmit &rArr; HAL_SPI_Transmit &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[51]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281HalWriteRegister
</UL>
<BR>[Address Reference Count : 1]<UL><LI> sx1281-hal.o(.constdata)
</UL>
<P><STRONG><a name="[134]"></a>SpiIn</STRONG> (Thumb, 18 bytes, Stack size 0 bytes, hw-spi.o(i.SpiIn))
<BR><BR>[Stack]<UL><LI>Max Depth = 104<LI>Call Chain = SpiIn &rArr; BSP_SPI_Transmit &rArr; HAL_SPI_Transmit &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[db]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;BSP_SPI_Transmit
</UL>
<BR>[Called By]<UL><LI><a href="#[50]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281HalWriteRegisters
<LI><a href="#[4e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281HalWriteCommand
<LI><a href="#[54]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281HalWriteBuffer
</UL>
<P><STRONG><a name="[132]"></a>SpiInOut</STRONG> (Thumb, 26 bytes, Stack size 16 bytes, hw-spi.o(i.SpiInOut))
<BR><BR>[Stack]<UL><LI>Max Depth = 144<LI>Call Chain = SpiInOut &rArr; BSP_SPI_TransmitReceive &rArr; HAL_SPI_TransmitReceive &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[df]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;BSP_SPI_TransmitReceive
</UL>
<BR>[Called By]<UL><LI><a href="#[52]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281HalReadRegisters
<LI><a href="#[4f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281HalReadCommand
<LI><a href="#[55]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281HalReadBuffer
</UL>
<P><STRONG><a name="[11f]"></a>SpiInit</STRONG> (Thumb, 26 bytes, Stack size 8 bytes, hw-spi.o(i.SpiInit))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = SpiInit
</UL>
<BR>[Calls]<UL><LI><a href="#[138]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;BSP_SPI_RegisterCallback
</UL>
<BR>[Called By]<UL><LI><a href="#[11d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HwInit
</UL>
<P><STRONG><a name="[12]"></a>SysTick_Handler</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, stm32f1xx_it.o(i.SysTick_Handler))
<BR><BR>[Calls]<UL><LI><a href="#[139]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_IncTick
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[13a]"></a>SystemClock_Config</STRONG> (Thumb, 96 bytes, Stack size 72 bytes, main.o(i.SystemClock_Config))
<BR><BR>[Stack]<UL><LI>Max Depth = 136<LI>Call Chain = SystemClock_Config &rArr; HAL_RCC_ClockConfig &rArr; HAL_InitTick &rArr; HAL_NVIC_SetPriority
</UL>
<BR>[Calls]<UL><LI><a href="#[fd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_OscConfig
<LI><a href="#[fb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_ClockConfig
<LI><a href="#[b7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memclr4
</UL>
<BR>[Called By]<UL><LI><a href="#[a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>
<P><STRONG><a name="[3e]"></a>SystemInit</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, system_stm32f1xx.o(i.SystemInit))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(.text)
</UL>
<P><STRONG><a name="[10c]"></a>TIM_Base_SetConfig</STRONG> (Thumb, 108 bytes, Stack size 20 bytes, stm32f1xx_hal_tim.o(i.TIM_Base_SetConfig))
<BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = TIM_Base_SetConfig
</UL>
<BR>[Called By]<UL><LI><a href="#[118]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_PWM_Init
<LI><a href="#[10a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_Base_Init
</UL>
<P><STRONG><a name="[10e]"></a>TIM_ETR_SetConfig</STRONG> (Thumb, 20 bytes, Stack size 8 bytes, stm32f1xx_hal_tim.o(i.TIM_ETR_SetConfig))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = TIM_ETR_SetConfig
</UL>
<BR>[Called By]<UL><LI><a href="#[10d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_ConfigClockSource
</UL>
<P><STRONG><a name="[115]"></a>TIM_OC2_SetConfig</STRONG> (Thumb, 84 bytes, Stack size 12 bytes, stm32f1xx_hal_tim.o(i.TIM_OC2_SetConfig))
<BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = TIM_OC2_SetConfig
</UL>
<BR>[Called By]<UL><LI><a href="#[113]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_PWM_ConfigChannel
</UL>
<P><STRONG><a name="[e]"></a>UsageFault_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32f1xx_it.o(i.UsageFault_Handler))
<BR><BR>[Calls]<UL><LI><a href="#[e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UsageFault_Handler
</UL>
<BR>[Called By]<UL><LI><a href="#[e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UsageFault_Handler
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[ad]"></a>_is_digit</STRONG> (Thumb, 14 bytes, Stack size 0 bytes, __printf_wp.o(i._is_digit))
<BR><BR>[Called By]<UL><LI><a href="#[ac]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__printf
</UL>
<P><STRONG><a name="[40]"></a>fputc</STRONG> (Thumb, 20 bytes, Stack size 16 bytes, main.o(i.fputc))
<BR><BR>[Stack]<UL><LI>Max Depth = 80<LI>Call Chain = fputc &rArr; HAL_UART_Transmit &rArr; UART_WaitOnFlagUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[11b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_Transmit
</UL>
<BR>[Address Reference Count : 1]<UL><LI> _printf_char_file.o(.text)
</UL>
<P><STRONG><a name="[a0]"></a>main</STRONG> (Thumb, 574 bytes, Stack size 48 bytes, main.o(i.main))
<BR><BR>[Stack]<UL><LI>Max Depth = 240 + Unknown Stack Size
<LI>Call Chain = main &rArr; SX1281ProcessIrqs &rArr; SX1281GetIrqStatus &rArr; SX1281HalReadCommand &rArr; SpiInOut &rArr; BSP_SPI_TransmitReceive &rArr; HAL_SPI_TransmitReceive &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[66]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281SetInterruptMode
<LI><a href="#[135]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281ProcessIrqs
<LI><a href="#[4c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281HalReset
<LI><a href="#[128]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_USART2_UART_Init
<LI><a href="#[127]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_USART1_UART_Init
<LI><a href="#[124]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_TIM1_Init
<LI><a href="#[123]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_SPI2_Init
<LI><a href="#[121]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_SPI1_Init
<LI><a href="#[120]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_GPIO_Init
<LI><a href="#[11d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HwInit
<LI><a href="#[e1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_TransmitReceive
<LI><a href="#[fc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_GetSysClockFreq
<LI><a href="#[13c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_GetPCLK2Freq
<LI><a href="#[13d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_GetPCLK1Freq
<LI><a href="#[f5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_Init
<LI><a href="#[ec]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GPIO_WritePin
<LI><a href="#[e5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GPIO_ReadPin
<LI><a href="#[ef]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_Delay
<LI><a href="#[13a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SystemClock_Config
<LI><a href="#[13e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memclr
<LI><a href="#[a6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__2printf
</UL>
<BR>[Called By]<UL><LI><a href="#[9f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_entry_main
</UL>
<P><STRONG><a name="[12d]"></a>__aeabi_ddiv</STRONG> (Thumb, 0 bytes, Stack size 32 bytes, ddiv.o(x$fpl$ddiv))
<BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = __aeabi_ddiv
</UL>
<BR>[Called By]<UL><LI><a href="#[5d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281SetRfFrequency
<LI><a href="#[83]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281GetFrequencyError
</UL>
<P><STRONG><a name="[13f]"></a>_ddiv</STRONG> (Thumb, 552 bytes, Stack size 32 bytes, ddiv.o(x$fpl$ddiv), UNUSED)
<BR><BR>[Calls]<UL><LI><a href="#[140]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__fpl_dretinf
<LI><a href="#[141]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__fpl_dnaninf
</UL>
<P><STRONG><a name="[137]"></a>__aeabi_d2uiz</STRONG> (Thumb, 0 bytes, Stack size 32 bytes, dfixu.o(x$fpl$dfixu))
<BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = __aeabi_d2uiz
</UL>
<BR>[Called By]<UL><LI><a href="#[5d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281SetRfFrequency
</UL>
<P><STRONG><a name="[142]"></a>_dfixu</STRONG> (Thumb, 90 bytes, Stack size 32 bytes, dfixu.o(x$fpl$dfixu), UNUSED)
<BR><BR>[Calls]<UL><LI><a href="#[141]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__fpl_dnaninf
</UL>
<P><STRONG><a name="[12c]"></a>__aeabi_i2d</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, dflt_clz.o(x$fpl$dflt))
<BR><BR>[Called By]<UL><LI><a href="#[83]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281GetFrequencyError
</UL>
<P><STRONG><a name="[181]"></a>_dflt</STRONG> (Thumb, 46 bytes, Stack size 0 bytes, dflt_clz.o(x$fpl$dflt), UNUSED)
<P><STRONG><a name="[136]"></a>__aeabi_ui2d</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, dflt_clz.o(x$fpl$dfltu))
<BR><BR>[Called By]<UL><LI><a href="#[5d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281SetRfFrequency
</UL>
<P><STRONG><a name="[182]"></a>_dfltu</STRONG> (Thumb, 38 bytes, Stack size 0 bytes, dflt_clz.o(x$fpl$dfltu), UNUSED)
<P><STRONG><a name="[12e]"></a>__aeabi_dmul</STRONG> (Thumb, 0 bytes, Stack size 32 bytes, dmul.o(x$fpl$dmul))
<BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = __aeabi_dmul
</UL>
<BR>[Called By]<UL><LI><a href="#[83]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SX1281GetFrequencyError
</UL>
<P><STRONG><a name="[143]"></a>_dmul</STRONG> (Thumb, 332 bytes, Stack size 32 bytes, dmul.o(x$fpl$dmul), UNUSED)
<BR><BR>[Calls]<UL><LI><a href="#[140]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__fpl_dretinf
<LI><a href="#[141]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__fpl_dnaninf
</UL>
<P><STRONG><a name="[141]"></a>__fpl_dnaninf</STRONG> (Thumb, 156 bytes, Stack size 16 bytes, dnaninf.o(x$fpl$dnaninf), UNUSED)
<BR><BR>[Called By]<UL><LI><a href="#[143]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_dmul
<LI><a href="#[142]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_dfixu
<LI><a href="#[13f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_ddiv
</UL>
<P><STRONG><a name="[140]"></a>__fpl_dretinf</STRONG> (Thumb, 12 bytes, Stack size 0 bytes, dretinf.o(x$fpl$dretinf), UNUSED)
<BR><BR>[Called By]<UL><LI><a href="#[143]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_dmul
<LI><a href="#[13f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_ddiv
</UL>
<P>
<H3>
Local Symbols
</H3>
<P><STRONG><a name="[44]"></a>SPI_DMAError</STRONG> (Thumb, 34 bytes, Stack size 8 bytes, stm32f1xx_hal_spi.o(i.SPI_DMAError))
<BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = SPI_DMAError &rArr; HAL_SPI_ErrorCallback
</UL>
<BR>[Calls]<UL><LI><a href="#[fe]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_ErrorCallback
</UL>
<BR>[Address Reference Count : 2]<UL><LI> stm32f1xx_hal_spi.o(i.HAL_SPI_TransmitReceive_DMA)
<LI> stm32f1xx_hal_spi.o(i.HAL_SPI_Transmit_DMA)
</UL>
<P><STRONG><a name="[45]"></a>SPI_DMAHalfReceiveCplt</STRONG> (Thumb, 10 bytes, Stack size 8 bytes, stm32f1xx_hal_spi.o(i.SPI_DMAHalfReceiveCplt))
<BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = SPI_DMAHalfReceiveCplt &rArr; HAL_SPI_RxHalfCpltCallback
</UL>
<BR>[Calls]<UL><LI><a href="#[104]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_RxHalfCpltCallback
</UL>
<BR>[Address Reference Count : 1]<UL><LI> stm32f1xx_hal_spi.o(i.HAL_SPI_TransmitReceive_DMA)
</UL>
<P><STRONG><a name="[47]"></a>SPI_DMAHalfTransmitCplt</STRONG> (Thumb, 10 bytes, Stack size 8 bytes, stm32f1xx_hal_spi.o(i.SPI_DMAHalfTransmitCplt))
<BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = SPI_DMAHalfTransmitCplt &rArr; HAL_SPI_TxHalfCpltCallback
</UL>
<BR>[Calls]<UL><LI><a href="#[107]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_TxHalfCpltCallback
</UL>
<BR>[Address Reference Count : 1]<UL><LI> stm32f1xx_hal_spi.o(i.HAL_SPI_Transmit_DMA)
</UL>
<P><STRONG><a name="[42]"></a>SPI_DMAHalfTransmitReceiveCplt</STRONG> (Thumb, 10 bytes, Stack size 8 bytes, stm32f1xx_hal_spi.o(i.SPI_DMAHalfTransmitReceiveCplt))
<BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = SPI_DMAHalfTransmitReceiveCplt &rArr; HAL_SPI_TxRxHalfCpltCallback
</UL>
<BR>[Calls]<UL><LI><a href="#[109]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_TxRxHalfCpltCallback
</UL>
<BR>[Address Reference Count : 1]<UL><LI> stm32f1xx_hal_spi.o(i.HAL_SPI_TransmitReceive_DMA)
</UL>
<P><STRONG><a name="[46]"></a>SPI_DMAReceiveCplt</STRONG> (Thumb, 106 bytes, Stack size 16 bytes, stm32f1xx_hal_spi.o(i.SPI_DMAReceiveCplt))
<BR><BR>[Stack]<UL><LI>Max Depth = 72<LI>Call Chain = SPI_DMAReceiveCplt &rArr; SPI_EndRxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[129]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_EndRxTransaction
<LI><a href="#[f0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
<LI><a href="#[103]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_RxCpltCallback
<LI><a href="#[fe]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_ErrorCallback
</UL>
<BR>[Address Reference Count : 1]<UL><LI> stm32f1xx_hal_spi.o(i.HAL_SPI_TransmitReceive_DMA)
</UL>
<P><STRONG><a name="[48]"></a>SPI_DMATransmitCplt</STRONG> (Thumb, 100 bytes, Stack size 16 bytes, stm32f1xx_hal_spi.o(i.SPI_DMATransmitCplt))
<BR><BR>[Stack]<UL><LI>Max Depth = 72<LI>Call Chain = SPI_DMATransmitCplt &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[105]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_EndRxTxTransaction
<LI><a href="#[f0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
<LI><a href="#[106]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_TxCpltCallback
<LI><a href="#[fe]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_ErrorCallback
</UL>
<BR>[Address Reference Count : 1]<UL><LI> stm32f1xx_hal_spi.o(i.HAL_SPI_Transmit_DMA)
</UL>
<P><STRONG><a name="[43]"></a>SPI_DMATransmitReceiveCplt</STRONG> (Thumb, 90 bytes, Stack size 16 bytes, stm32f1xx_hal_spi.o(i.SPI_DMATransmitReceiveCplt))
<BR><BR>[Stack]<UL><LI>Max Depth = 72<LI>Call Chain = SPI_DMATransmitReceiveCplt &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[105]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_EndRxTxTransaction
<LI><a href="#[f0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
<LI><a href="#[108]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_TxRxCpltCallback
<LI><a href="#[fe]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_ErrorCallback
</UL>
<BR>[Address Reference Count : 1]<UL><LI> stm32f1xx_hal_spi.o(i.HAL_SPI_TransmitReceive_DMA)
</UL>
<P><STRONG><a name="[129]"></a>SPI_EndRxTransaction</STRONG> (Thumb, 92 bytes, Stack size 24 bytes, stm32f1xx_hal_spi.o(i.SPI_EndRxTransaction))
<BR><BR>[Stack]<UL><LI>Max Depth = 56<LI>Call Chain = SPI_EndRxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[12a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Called By]<UL><LI><a href="#[46]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_DMAReceiveCplt
</UL>
<P><STRONG><a name="[105]"></a>SPI_EndRxTxTransaction</STRONG> (Thumb, 52 bytes, Stack size 24 bytes, stm32f1xx_hal_spi.o(i.SPI_EndRxTxTransaction))
<BR><BR>[Stack]<UL><LI>Max Depth = 56<LI>Call Chain = SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[12a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Called By]<UL><LI><a href="#[43]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_DMATransmitReceiveCplt
<LI><a href="#[48]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_DMATransmitCplt
<LI><a href="#[e1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_TransmitReceive
<LI><a href="#[de]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_Transmit
</UL>
<P><STRONG><a name="[12a]"></a>SPI_WaitFlagStateUntilTimeout</STRONG> (Thumb, 180 bytes, Stack size 32 bytes, stm32f1xx_hal_spi.o(i.SPI_WaitFlagStateUntilTimeout))
<BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[f0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
</UL>
<BR>[Called By]<UL><LI><a href="#[105]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_EndRxTxTransaction
<LI><a href="#[129]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_EndRxTransaction
</UL>
<P><STRONG><a name="[ee]"></a>DMA_SetConfig</STRONG> (Thumb, 42 bytes, Stack size 12 bytes, stm32f1xx_hal_dma.o(i.DMA_SetConfig))
<BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = DMA_SetConfig
</UL>
<BR>[Called By]<UL><LI><a href="#[ed]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_DMA_Start_IT
</UL>
<P><STRONG><a name="[fa]"></a>__NVIC_SetPriority</STRONG> (Thumb, 32 bytes, Stack size 0 bytes, stm32f1xx_hal_cortex.o(i.__NVIC_SetPriority))
<BR><BR>[Called By]<UL><LI><a href="#[e9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_NVIC_SetPriority
<LI><a href="#[f9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SYSTICK_Config
</UL>
<P><STRONG><a name="[111]"></a>TIM_ITRx_SetConfig</STRONG> (Thumb, 16 bytes, Stack size 0 bytes, stm32f1xx_hal_tim.o(i.TIM_ITRx_SetConfig))
<BR><BR>[Called By]<UL><LI><a href="#[10d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_ConfigClockSource
</UL>
<P><STRONG><a name="[114]"></a>TIM_OC1_SetConfig</STRONG> (Thumb, 74 bytes, Stack size 12 bytes, stm32f1xx_hal_tim.o(i.TIM_OC1_SetConfig))
<BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = TIM_OC1_SetConfig
</UL>
<BR>[Called By]<UL><LI><a href="#[113]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_PWM_ConfigChannel
</UL>
<P><STRONG><a name="[116]"></a>TIM_OC3_SetConfig</STRONG> (Thumb, 82 bytes, Stack size 12 bytes, stm32f1xx_hal_tim.o(i.TIM_OC3_SetConfig))
<BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = TIM_OC3_SetConfig
</UL>
<BR>[Called By]<UL><LI><a href="#[113]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_PWM_ConfigChannel
</UL>
<P><STRONG><a name="[117]"></a>TIM_OC4_SetConfig</STRONG> (Thumb, 64 bytes, Stack size 12 bytes, stm32f1xx_hal_tim.o(i.TIM_OC4_SetConfig))
<BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = TIM_OC4_SetConfig
</UL>
<BR>[Called By]<UL><LI><a href="#[113]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_PWM_ConfigChannel
</UL>
<P><STRONG><a name="[10f]"></a>TIM_TI1_ConfigInputStage</STRONG> (Thumb, 34 bytes, Stack size 8 bytes, stm32f1xx_hal_tim.o(i.TIM_TI1_ConfigInputStage))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = TIM_TI1_ConfigInputStage
</UL>
<BR>[Called By]<UL><LI><a href="#[10d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_ConfigClockSource
</UL>
<P><STRONG><a name="[110]"></a>TIM_TI2_ConfigInputStage</STRONG> (Thumb, 36 bytes, Stack size 8 bytes, stm32f1xx_hal_tim.o(i.TIM_TI2_ConfigInputStage))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = TIM_TI2_ConfigInputStage
</UL>
<BR>[Called By]<UL><LI><a href="#[10d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_ConfigClockSource
</UL>
<P><STRONG><a name="[13b]"></a>UART_EndRxTransfer</STRONG> (Thumb, 78 bytes, Stack size 0 bytes, stm32f1xx_hal_uart.o(i.UART_EndRxTransfer))
<BR><BR>[Calls]<UL><LI><a href="#[13b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_EndRxTransfer
</UL>
<BR>[Called By]<UL><LI><a href="#[11c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_WaitOnFlagUntilTimeout
<LI><a href="#[13b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_EndRxTransfer
</UL>
<P><STRONG><a name="[f4]"></a>UART_SetConfig</STRONG> (Thumb, 178 bytes, Stack size 16 bytes, stm32f1xx_hal_uart.o(i.UART_SetConfig))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = UART_SetConfig
</UL>
<BR>[Calls]<UL><LI><a href="#[13c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_GetPCLK2Freq
<LI><a href="#[13d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_GetPCLK1Freq
</UL>
<BR>[Called By]<UL><LI><a href="#[11a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_Init
<LI><a href="#[f2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_HalfDuplex_Init
</UL>
<P><STRONG><a name="[11c]"></a>UART_WaitOnFlagUntilTimeout</STRONG> (Thumb, 114 bytes, Stack size 32 bytes, stm32f1xx_hal_uart.o(i.UART_WaitOnFlagUntilTimeout))
<BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = UART_WaitOnFlagUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[f0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
<LI><a href="#[13b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_EndRxTransfer
</UL>
<BR>[Called By]<UL><LI><a href="#[11b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_Transmit
</UL>
<P><STRONG><a name="[4a]"></a>tx_cplt_cb</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, hw-spi.o(i.tx_cplt_cb))
<BR>[Address Reference Count : 1]<UL><LI> hw-spi.o(i.SpiInit)
</UL>
<P><STRONG><a name="[49]"></a>txrx_cplt_cb</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, hw-spi.o(i.txrx_cplt_cb))
<BR>[Address Reference Count : 1]<UL><LI> hw-spi.o(i.SpiInit)
</UL>
<P><STRONG><a name="[ff]"></a>SPI_Get</STRONG> (Thumb, 16 bytes, Stack size 0 bytes, spi_1.o(i.SPI_Get))
<BR><BR>[Called By]<UL><LI><a href="#[109]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_TxRxHalfCpltCallback
<LI><a href="#[108]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_TxRxCpltCallback
<LI><a href="#[107]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_TxHalfCpltCallback
<LI><a href="#[106]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_TxCpltCallback
<LI><a href="#[104]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_RxHalfCpltCallback
<LI><a href="#[103]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_RxCpltCallback
<LI><a href="#[fe]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_ErrorCallback
</UL>
<P><STRONG><a name="[41]"></a>_printf_input_char</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, _printf_char_common.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> _printf_char_common.o(.text)
</UL><P>
<H3>
Undefined Global Symbols
</H3><HR></body></html>