41 lines
2.1 KiB
Plaintext
41 lines
2.1 KiB
Plaintext
// File: STM32F302.dbgconf
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// Version: 1.0.0
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// Note: refer to STM32F302xB/C/D/E, STM32F302x6/8 Reference manual (RM0365)
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// refer to STM32F302xB/C, STM32F302xd/E, STM32F302x6/8 datasheet
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// <<< Use Configuration Wizard in Context Menu >>>
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// <h> Debug MCU configuration register (DBGMCU_CR)
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// <o.2> DBG_STANDBY <i> Debug standby mode
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// <o.1> DBG_STOP <i> Debug stop mode
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// <o.0> DBG_SLEEP <i> Debug sleep mode
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// </h>
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DbgMCU_CR = 0x00000007;
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// <h> Debug MCU APB1 freeze register (DBGMCU_APB1_FZ)
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// <i> Reserved bits must be kept at reset value
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// <o.30> DBG_I2C3_SMBUS_TIMEOUT <i> SMBUS timeout mode stopped when core is halted
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// <o.25> DBG_CAN_STOP <i> Debug CAN stopped when core is halted
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// <o.22> DBG_I2C2_SMBUS_TIMEOUT <i> SMBUS timeout mode stopped when core is halted
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// <o.21> DBG_I2C1_SMBUS_TIMEOUT <i> SMBUS timeout mode stopped when core is halted
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// <o.12> DBG_IWDG_STOP <i> Independent watchdog stopped when core is halted
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// <o.11> DBG_WWDG_STOP <i> Window watchdog stopped when core is halted
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// <o.10> DBG_RTC_STOP <i> RTC stopped when core is halted
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// <o.4> DBG_TIM6_STOP <i> TIM6 counter stopped when core is halted
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// <o.2> DBG_TIM4_STOP <i> TIM4 counter stopped when core is halted
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// <o.1> DBG_TIM3_STOP <i> TIM3 counter stopped when core is halted
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// <o.0> DBG_TIM2_STOP <i> TIM2 counter stopped when core is halted
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// </h>
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DbgMCU_APB1_Fz = 0x00000000;
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// <h> Debug MCU APB2 freeze register (DBGMCU_APB2_FZ)
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// <i> Reserved bits must be kept at reset value
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// <o.4> DBG_TIM17_STOP <i> TIM17 counter stopped when core is halted
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// <o.3> DBG_TIM16_STOP <i> TIM16 counter stopped when core is halted
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// <o.2> DBG_TIM15_STOP <i> TIM15 counter stopped when core is halted
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// <o.0> DBG_TIM1_STOP <i> TIM1 counter stopped when core is halted
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// </h>
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DbgMCU_APB2_Fz = 0x00000000;
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// <<< end of configuration section >>>
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