// File: STM32F302.dbgconf // Version: 1.0.0 // Note: refer to STM32F302xB/C/D/E, STM32F302x6/8 Reference manual (RM0365) // refer to STM32F302xB/C, STM32F302xd/E, STM32F302x6/8 datasheet // <<< Use Configuration Wizard in Context Menu >>> // Debug MCU configuration register (DBGMCU_CR) // DBG_STANDBY Debug standby mode // DBG_STOP Debug stop mode // DBG_SLEEP Debug sleep mode // DbgMCU_CR = 0x00000007; // Debug MCU APB1 freeze register (DBGMCU_APB1_FZ) // Reserved bits must be kept at reset value // DBG_I2C3_SMBUS_TIMEOUT SMBUS timeout mode stopped when core is halted // DBG_CAN_STOP Debug CAN stopped when core is halted // DBG_I2C2_SMBUS_TIMEOUT SMBUS timeout mode stopped when core is halted // DBG_I2C1_SMBUS_TIMEOUT SMBUS timeout mode stopped when core is halted // DBG_IWDG_STOP Independent watchdog stopped when core is halted // DBG_WWDG_STOP Window watchdog stopped when core is halted // DBG_RTC_STOP RTC stopped when core is halted // DBG_TIM6_STOP TIM6 counter stopped when core is halted // DBG_TIM4_STOP TIM4 counter stopped when core is halted // DBG_TIM3_STOP TIM3 counter stopped when core is halted // DBG_TIM2_STOP TIM2 counter stopped when core is halted // DbgMCU_APB1_Fz = 0x00000000; // Debug MCU APB2 freeze register (DBGMCU_APB2_FZ) // Reserved bits must be kept at reset value // DBG_TIM17_STOP TIM17 counter stopped when core is halted // DBG_TIM16_STOP TIM16 counter stopped when core is halted // DBG_TIM15_STOP TIM15 counter stopped when core is halted // DBG_TIM1_STOP TIM1 counter stopped when core is halted // DbgMCU_APB2_Fz = 0x00000000; // <<< end of configuration section >>>