From a5456a9094b17eebac4c12ad913a105ad242c1f5 Mon Sep 17 00:00:00 2001
From: Robofish <1683502971@qq.com>
Date: Tue, 14 Oct 2025 21:34:49 +0800
Subject: [PATCH] =?UTF-8?q?=E6=94=B9=E8=85=BF=E9=95=BF?=
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
---
Core/Src/stm32f4xx_it.c | 1028 ++++++++++++++++-----------------
User/device/motor_rm.c | 2 +-
User/module/balance_chassis.c | 20 +-
3 files changed, 525 insertions(+), 525 deletions(-)
diff --git a/Core/Src/stm32f4xx_it.c b/Core/Src/stm32f4xx_it.c
index 07b872e..562d7be 100644
--- a/Core/Src/stm32f4xx_it.c
+++ b/Core/Src/stm32f4xx_it.c
@@ -1,514 +1,514 @@
-/* USER CODE BEGIN Header */
-/**
- ******************************************************************************
- * @file stm32f4xx_it.c
- * @brief Interrupt Service Routines.
- ******************************************************************************
- * @attention
- *
- * © Copyright (c) 2025 STMicroelectronics.
- * All rights reserved.
- *
- * This software component is licensed by ST under Ultimate Liberty license
- * SLA0044, the "License"; You may not use this file except in compliance with
- * the License. You may obtain a copy of the License at:
- * www.st.com/SLA0044
- *
- ******************************************************************************
- */
-/* USER CODE END Header */
-
-/* Includes ------------------------------------------------------------------*/
-#include "main.h"
-#include "stm32f4xx_it.h"
-#include "FreeRTOS.h"
-#include "task.h"
-/* Private includes ----------------------------------------------------------*/
-/* USER CODE BEGIN Includes */
-#include "bsp/uart.h"
-/* USER CODE END Includes */
-
-/* Private typedef -----------------------------------------------------------*/
-/* USER CODE BEGIN TD */
-
-/* USER CODE END TD */
-
-/* Private define ------------------------------------------------------------*/
-/* USER CODE BEGIN PD */
-
-/* USER CODE END PD */
-
-/* Private macro -------------------------------------------------------------*/
-/* USER CODE BEGIN PM */
-
-/* USER CODE END PM */
-
-/* Private variables ---------------------------------------------------------*/
-/* USER CODE BEGIN PV */
-
-/* USER CODE END PV */
-
-/* Private function prototypes -----------------------------------------------*/
-/* USER CODE BEGIN PFP */
-
-/* USER CODE END PFP */
-
-/* Private user code ---------------------------------------------------------*/
-/* USER CODE BEGIN 0 */
-
-/* USER CODE END 0 */
-
-/* External variables --------------------------------------------------------*/
-extern PCD_HandleTypeDef hpcd_USB_OTG_FS;
-extern CAN_HandleTypeDef hcan1;
-extern CAN_HandleTypeDef hcan2;
-extern DMA_HandleTypeDef hdma_i2c2_tx;
-extern DMA_HandleTypeDef hdma_i2c3_rx;
-extern DMA_HandleTypeDef hdma_spi1_rx;
-extern DMA_HandleTypeDef hdma_spi1_tx;
-extern TIM_HandleTypeDef htim1;
-extern TIM_HandleTypeDef htim7;
-extern DMA_HandleTypeDef hdma_usart1_tx;
-extern DMA_HandleTypeDef hdma_usart1_rx;
-extern DMA_HandleTypeDef hdma_usart3_rx;
-extern DMA_HandleTypeDef hdma_usart6_rx;
-extern DMA_HandleTypeDef hdma_usart6_tx;
-extern UART_HandleTypeDef huart1;
-extern UART_HandleTypeDef huart6;
-/* USER CODE BEGIN EV */
-
-/* USER CODE END EV */
-
-/******************************************************************************/
-/* Cortex-M4 Processor Interruption and Exception Handlers */
-/******************************************************************************/
-/**
- * @brief This function handles Non maskable interrupt.
- */
-void NMI_Handler(void)
-{
- /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
-
- /* USER CODE END NonMaskableInt_IRQn 0 */
- /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
- while (1)
- {
- }
- /* USER CODE END NonMaskableInt_IRQn 1 */
-}
-
-/**
- * @brief This function handles Hard fault interrupt.
- */
-void HardFault_Handler(void)
-{
- /* USER CODE BEGIN HardFault_IRQn 0 */
-
- /* USER CODE END HardFault_IRQn 0 */
- while (1)
- {
- /* USER CODE BEGIN W1_HardFault_IRQn 0 */
- /* USER CODE END W1_HardFault_IRQn 0 */
- }
-}
-
-/**
- * @brief This function handles Memory management fault.
- */
-void MemManage_Handler(void)
-{
- /* USER CODE BEGIN MemoryManagement_IRQn 0 */
-
- /* USER CODE END MemoryManagement_IRQn 0 */
- while (1)
- {
- /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
- /* USER CODE END W1_MemoryManagement_IRQn 0 */
- }
-}
-
-/**
- * @brief This function handles Pre-fetch fault, memory access fault.
- */
-void BusFault_Handler(void)
-{
- /* USER CODE BEGIN BusFault_IRQn 0 */
-
- /* USER CODE END BusFault_IRQn 0 */
- while (1)
- {
- /* USER CODE BEGIN W1_BusFault_IRQn 0 */
- /* USER CODE END W1_BusFault_IRQn 0 */
- }
-}
-
-/**
- * @brief This function handles Undefined instruction or illegal state.
- */
-void UsageFault_Handler(void)
-{
- /* USER CODE BEGIN UsageFault_IRQn 0 */
-
- /* USER CODE END UsageFault_IRQn 0 */
- while (1)
- {
- /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
- /* USER CODE END W1_UsageFault_IRQn 0 */
- }
-}
-
-/**
- * @brief This function handles Debug monitor.
- */
-void DebugMon_Handler(void)
-{
- /* USER CODE BEGIN DebugMonitor_IRQn 0 */
-
- /* USER CODE END DebugMonitor_IRQn 0 */
- /* USER CODE BEGIN DebugMonitor_IRQn 1 */
-
- /* USER CODE END DebugMonitor_IRQn 1 */
-}
-
-/**
- * @brief This function handles System tick timer.
- */
-void SysTick_Handler(void)
-{
- /* USER CODE BEGIN SysTick_IRQn 0 */
-
- /* USER CODE END SysTick_IRQn 0 */
- HAL_IncTick();
-#if (INCLUDE_xTaskGetSchedulerState == 1 )
- if (xTaskGetSchedulerState() != taskSCHEDULER_NOT_STARTED)
- {
-#endif /* INCLUDE_xTaskGetSchedulerState */
- xPortSysTickHandler();
-#if (INCLUDE_xTaskGetSchedulerState == 1 )
- }
-#endif /* INCLUDE_xTaskGetSchedulerState */
- /* USER CODE BEGIN SysTick_IRQn 1 */
-
- /* USER CODE END SysTick_IRQn 1 */
-}
-
-/******************************************************************************/
-/* STM32F4xx Peripheral Interrupt Handlers */
-/* Add here the Interrupt Handlers for the used peripherals. */
-/* For the available peripheral interrupt handler names, */
-/* please refer to the startup file (startup_stm32f4xx.s). */
-/******************************************************************************/
-
-/**
- * @brief This function handles EXTI line0 interrupt.
- */
-void EXTI0_IRQHandler(void)
-{
- /* USER CODE BEGIN EXTI0_IRQn 0 */
-
- /* USER CODE END EXTI0_IRQn 0 */
- HAL_GPIO_EXTI_IRQHandler(USER_KEY_Pin);
- /* USER CODE BEGIN EXTI0_IRQn 1 */
-
- /* USER CODE END EXTI0_IRQn 1 */
-}
-
-/**
- * @brief This function handles EXTI line3 interrupt.
- */
-void EXTI3_IRQHandler(void)
-{
- /* USER CODE BEGIN EXTI3_IRQn 0 */
-
- /* USER CODE END EXTI3_IRQn 0 */
- HAL_GPIO_EXTI_IRQHandler(CMPS_INT_Pin);
- /* USER CODE BEGIN EXTI3_IRQn 1 */
-
- /* USER CODE END EXTI3_IRQn 1 */
-}
-
-/**
- * @brief This function handles EXTI line4 interrupt.
- */
-void EXTI4_IRQHandler(void)
-{
- /* USER CODE BEGIN EXTI4_IRQn 0 */
-
- /* USER CODE END EXTI4_IRQn 0 */
- HAL_GPIO_EXTI_IRQHandler(ACCL_INT_Pin);
- /* USER CODE BEGIN EXTI4_IRQn 1 */
-
- /* USER CODE END EXTI4_IRQn 1 */
-}
-
-/**
- * @brief This function handles DMA1 stream1 global interrupt.
- */
-void DMA1_Stream1_IRQHandler(void)
-{
- /* USER CODE BEGIN DMA1_Stream1_IRQn 0 */
-
- /* USER CODE END DMA1_Stream1_IRQn 0 */
- HAL_DMA_IRQHandler(&hdma_usart3_rx);
- /* USER CODE BEGIN DMA1_Stream1_IRQn 1 */
-
- /* USER CODE END DMA1_Stream1_IRQn 1 */
-}
-
-/**
- * @brief This function handles DMA1 stream2 global interrupt.
- */
-void DMA1_Stream2_IRQHandler(void)
-{
- /* USER CODE BEGIN DMA1_Stream2_IRQn 0 */
-
- /* USER CODE END DMA1_Stream2_IRQn 0 */
- HAL_DMA_IRQHandler(&hdma_i2c3_rx);
- /* USER CODE BEGIN DMA1_Stream2_IRQn 1 */
-
- /* USER CODE END DMA1_Stream2_IRQn 1 */
-}
-
-/**
- * @brief This function handles CAN1 RX0 interrupts.
- */
-void CAN1_RX0_IRQHandler(void)
-{
- /* USER CODE BEGIN CAN1_RX0_IRQn 0 */
-
- /* USER CODE END CAN1_RX0_IRQn 0 */
- HAL_CAN_IRQHandler(&hcan1);
- /* USER CODE BEGIN CAN1_RX0_IRQn 1 */
-
- /* USER CODE END CAN1_RX0_IRQn 1 */
-}
-
-/**
- * @brief This function handles CAN1 RX1 interrupt.
- */
-void CAN1_RX1_IRQHandler(void)
-{
- /* USER CODE BEGIN CAN1_RX1_IRQn 0 */
-
- /* USER CODE END CAN1_RX1_IRQn 0 */
- HAL_CAN_IRQHandler(&hcan1);
- /* USER CODE BEGIN CAN1_RX1_IRQn 1 */
-
- /* USER CODE END CAN1_RX1_IRQn 1 */
-}
-
-/**
- * @brief This function handles EXTI line[9:5] interrupts.
- */
-void EXTI9_5_IRQHandler(void)
-{
- /* USER CODE BEGIN EXTI9_5_IRQn 0 */
-
- /* USER CODE END EXTI9_5_IRQn 0 */
- HAL_GPIO_EXTI_IRQHandler(GYRO_INT_Pin);
- /* USER CODE BEGIN EXTI9_5_IRQn 1 */
-
- /* USER CODE END EXTI9_5_IRQn 1 */
-}
-
-/**
- * @brief This function handles TIM1 break interrupt and TIM9 global interrupt.
- */
-void TIM1_BRK_TIM9_IRQHandler(void)
-{
- /* USER CODE BEGIN TIM1_BRK_TIM9_IRQn 0 */
-
- /* USER CODE END TIM1_BRK_TIM9_IRQn 0 */
- HAL_TIM_IRQHandler(&htim1);
- /* USER CODE BEGIN TIM1_BRK_TIM9_IRQn 1 */
-
- /* USER CODE END TIM1_BRK_TIM9_IRQn 1 */
-}
-
-/**
- * @brief This function handles USART1 global interrupt.
- */
-void USART1_IRQHandler(void)
-{
- /* USER CODE BEGIN USART1_IRQn 0 */
-
- /* USER CODE END USART1_IRQn 0 */
- HAL_UART_IRQHandler(&huart1);
- /* USER CODE BEGIN USART1_IRQn 1 */
- BSP_UART_IRQHandler(&huart1);
-
- /* USER CODE END USART1_IRQn 1 */
-}
-
-/**
- * @brief This function handles DMA1 stream7 global interrupt.
- */
-void DMA1_Stream7_IRQHandler(void)
-{
- /* USER CODE BEGIN DMA1_Stream7_IRQn 0 */
-
- /* USER CODE END DMA1_Stream7_IRQn 0 */
- HAL_DMA_IRQHandler(&hdma_i2c2_tx);
- /* USER CODE BEGIN DMA1_Stream7_IRQn 1 */
-
- /* USER CODE END DMA1_Stream7_IRQn 1 */
-}
-
-/**
- * @brief This function handles TIM7 global interrupt.
- */
-void TIM7_IRQHandler(void)
-{
- /* USER CODE BEGIN TIM7_IRQn 0 */
-
- /* USER CODE END TIM7_IRQn 0 */
- HAL_TIM_IRQHandler(&htim7);
- /* USER CODE BEGIN TIM7_IRQn 1 */
-
- /* USER CODE END TIM7_IRQn 1 */
-}
-
-/**
- * @brief This function handles DMA2 stream1 global interrupt.
- */
-void DMA2_Stream1_IRQHandler(void)
-{
- /* USER CODE BEGIN DMA2_Stream1_IRQn 0 */
-
- /* USER CODE END DMA2_Stream1_IRQn 0 */
- HAL_DMA_IRQHandler(&hdma_usart6_rx);
- /* USER CODE BEGIN DMA2_Stream1_IRQn 1 */
-
- /* USER CODE END DMA2_Stream1_IRQn 1 */
-}
-
-/**
- * @brief This function handles DMA2 stream2 global interrupt.
- */
-void DMA2_Stream2_IRQHandler(void)
-{
- /* USER CODE BEGIN DMA2_Stream2_IRQn 0 */
-
- /* USER CODE END DMA2_Stream2_IRQn 0 */
- HAL_DMA_IRQHandler(&hdma_spi1_rx);
- /* USER CODE BEGIN DMA2_Stream2_IRQn 1 */
-
- /* USER CODE END DMA2_Stream2_IRQn 1 */
-}
-
-/**
- * @brief This function handles DMA2 stream3 global interrupt.
- */
-void DMA2_Stream3_IRQHandler(void)
-{
- /* USER CODE BEGIN DMA2_Stream3_IRQn 0 */
-
- /* USER CODE END DMA2_Stream3_IRQn 0 */
- HAL_DMA_IRQHandler(&hdma_spi1_tx);
- /* USER CODE BEGIN DMA2_Stream3_IRQn 1 */
-
- /* USER CODE END DMA2_Stream3_IRQn 1 */
-}
-
-/**
- * @brief This function handles CAN2 RX0 interrupts.
- */
-void CAN2_RX0_IRQHandler(void)
-{
- /* USER CODE BEGIN CAN2_RX0_IRQn 0 */
-
- /* USER CODE END CAN2_RX0_IRQn 0 */
- HAL_CAN_IRQHandler(&hcan2);
- /* USER CODE BEGIN CAN2_RX0_IRQn 1 */
-
- /* USER CODE END CAN2_RX0_IRQn 1 */
-}
-
-/**
- * @brief This function handles CAN2 RX1 interrupt.
- */
-void CAN2_RX1_IRQHandler(void)
-{
- /* USER CODE BEGIN CAN2_RX1_IRQn 0 */
-
- /* USER CODE END CAN2_RX1_IRQn 0 */
- HAL_CAN_IRQHandler(&hcan2);
- /* USER CODE BEGIN CAN2_RX1_IRQn 1 */
-
- /* USER CODE END CAN2_RX1_IRQn 1 */
-}
-
-/**
- * @brief This function handles USB On The Go FS global interrupt.
- */
-void OTG_FS_IRQHandler(void)
-{
- /* USER CODE BEGIN OTG_FS_IRQn 0 */
-
- /* USER CODE END OTG_FS_IRQn 0 */
- HAL_PCD_IRQHandler(&hpcd_USB_OTG_FS);
- /* USER CODE BEGIN OTG_FS_IRQn 1 */
-
- /* USER CODE END OTG_FS_IRQn 1 */
-}
-
-/**
- * @brief This function handles DMA2 stream5 global interrupt.
- */
-void DMA2_Stream5_IRQHandler(void)
-{
- /* USER CODE BEGIN DMA2_Stream5_IRQn 0 */
-
- /* USER CODE END DMA2_Stream5_IRQn 0 */
- HAL_DMA_IRQHandler(&hdma_usart1_rx);
- /* USER CODE BEGIN DMA2_Stream5_IRQn 1 */
-
- /* USER CODE END DMA2_Stream5_IRQn 1 */
-}
-
-/**
- * @brief This function handles DMA2 stream6 global interrupt.
- */
-void DMA2_Stream6_IRQHandler(void)
-{
- /* USER CODE BEGIN DMA2_Stream6_IRQn 0 */
-
- /* USER CODE END DMA2_Stream6_IRQn 0 */
- HAL_DMA_IRQHandler(&hdma_usart6_tx);
- /* USER CODE BEGIN DMA2_Stream6_IRQn 1 */
-
- /* USER CODE END DMA2_Stream6_IRQn 1 */
-}
-
-/**
- * @brief This function handles DMA2 stream7 global interrupt.
- */
-void DMA2_Stream7_IRQHandler(void)
-{
- /* USER CODE BEGIN DMA2_Stream7_IRQn 0 */
-
- /* USER CODE END DMA2_Stream7_IRQn 0 */
- HAL_DMA_IRQHandler(&hdma_usart1_tx);
- /* USER CODE BEGIN DMA2_Stream7_IRQn 1 */
-
- /* USER CODE END DMA2_Stream7_IRQn 1 */
-}
-
-/**
- * @brief This function handles USART6 global interrupt.
- */
-void USART6_IRQHandler(void)
-{
- /* USER CODE BEGIN USART6_IRQn 0 */
-
- /* USER CODE END USART6_IRQn 0 */
- HAL_UART_IRQHandler(&huart6);
- /* USER CODE BEGIN USART6_IRQn 1 */
- BSP_UART_IRQHandler(&huart6);
-
- /* USER CODE END USART6_IRQn 1 */
-}
-
-/* USER CODE BEGIN 1 */
-
-/* USER CODE END 1 */
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file stm32f4xx_it.c
+ * @brief Interrupt Service Routines.
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2025 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under Ultimate Liberty license
+ * SLA0044, the "License"; You may not use this file except in compliance with
+ * the License. You may obtain a copy of the License at:
+ * www.st.com/SLA0044
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32f4xx_it.h"
+#include "FreeRTOS.h"
+#include "task.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "bsp/uart.h"
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+extern PCD_HandleTypeDef hpcd_USB_OTG_FS;
+extern CAN_HandleTypeDef hcan1;
+extern CAN_HandleTypeDef hcan2;
+extern DMA_HandleTypeDef hdma_i2c2_tx;
+extern DMA_HandleTypeDef hdma_i2c3_rx;
+extern DMA_HandleTypeDef hdma_spi1_rx;
+extern DMA_HandleTypeDef hdma_spi1_tx;
+extern TIM_HandleTypeDef htim1;
+extern TIM_HandleTypeDef htim7;
+extern DMA_HandleTypeDef hdma_usart1_tx;
+extern DMA_HandleTypeDef hdma_usart1_rx;
+extern DMA_HandleTypeDef hdma_usart3_rx;
+extern DMA_HandleTypeDef hdma_usart6_rx;
+extern DMA_HandleTypeDef hdma_usart6_tx;
+extern UART_HandleTypeDef huart1;
+extern UART_HandleTypeDef huart6;
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/* Cortex-M4 Processor Interruption and Exception Handlers */
+/******************************************************************************/
+/**
+ * @brief This function handles Non maskable interrupt.
+ */
+void NMI_Handler(void)
+{
+ /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
+
+ /* USER CODE END NonMaskableInt_IRQn 0 */
+ /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
+ while (1)
+ {
+ }
+ /* USER CODE END NonMaskableInt_IRQn 1 */
+}
+
+/**
+ * @brief This function handles Hard fault interrupt.
+ */
+void HardFault_Handler(void)
+{
+ /* USER CODE BEGIN HardFault_IRQn 0 */
+
+ /* USER CODE END HardFault_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_HardFault_IRQn 0 */
+ /* USER CODE END W1_HardFault_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles Memory management fault.
+ */
+void MemManage_Handler(void)
+{
+ /* USER CODE BEGIN MemoryManagement_IRQn 0 */
+
+ /* USER CODE END MemoryManagement_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
+ /* USER CODE END W1_MemoryManagement_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles Pre-fetch fault, memory access fault.
+ */
+void BusFault_Handler(void)
+{
+ /* USER CODE BEGIN BusFault_IRQn 0 */
+
+ /* USER CODE END BusFault_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_BusFault_IRQn 0 */
+ /* USER CODE END W1_BusFault_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles Undefined instruction or illegal state.
+ */
+void UsageFault_Handler(void)
+{
+ /* USER CODE BEGIN UsageFault_IRQn 0 */
+
+ /* USER CODE END UsageFault_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
+ /* USER CODE END W1_UsageFault_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles Debug monitor.
+ */
+void DebugMon_Handler(void)
+{
+ /* USER CODE BEGIN DebugMonitor_IRQn 0 */
+
+ /* USER CODE END DebugMonitor_IRQn 0 */
+ /* USER CODE BEGIN DebugMonitor_IRQn 1 */
+
+ /* USER CODE END DebugMonitor_IRQn 1 */
+}
+
+/**
+ * @brief This function handles System tick timer.
+ */
+void SysTick_Handler(void)
+{
+ /* USER CODE BEGIN SysTick_IRQn 0 */
+
+ /* USER CODE END SysTick_IRQn 0 */
+ HAL_IncTick();
+#if (INCLUDE_xTaskGetSchedulerState == 1 )
+ if (xTaskGetSchedulerState() != taskSCHEDULER_NOT_STARTED)
+ {
+#endif /* INCLUDE_xTaskGetSchedulerState */
+ xPortSysTickHandler();
+#if (INCLUDE_xTaskGetSchedulerState == 1 )
+ }
+#endif /* INCLUDE_xTaskGetSchedulerState */
+ /* USER CODE BEGIN SysTick_IRQn 1 */
+
+ /* USER CODE END SysTick_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32F4xx Peripheral Interrupt Handlers */
+/* Add here the Interrupt Handlers for the used peripherals. */
+/* For the available peripheral interrupt handler names, */
+/* please refer to the startup file (startup_stm32f4xx.s). */
+/******************************************************************************/
+
+/**
+ * @brief This function handles EXTI line0 interrupt.
+ */
+void EXTI0_IRQHandler(void)
+{
+ /* USER CODE BEGIN EXTI0_IRQn 0 */
+
+ /* USER CODE END EXTI0_IRQn 0 */
+ HAL_GPIO_EXTI_IRQHandler(USER_KEY_Pin);
+ /* USER CODE BEGIN EXTI0_IRQn 1 */
+
+ /* USER CODE END EXTI0_IRQn 1 */
+}
+
+/**
+ * @brief This function handles EXTI line3 interrupt.
+ */
+void EXTI3_IRQHandler(void)
+{
+ /* USER CODE BEGIN EXTI3_IRQn 0 */
+
+ /* USER CODE END EXTI3_IRQn 0 */
+ HAL_GPIO_EXTI_IRQHandler(CMPS_INT_Pin);
+ /* USER CODE BEGIN EXTI3_IRQn 1 */
+
+ /* USER CODE END EXTI3_IRQn 1 */
+}
+
+/**
+ * @brief This function handles EXTI line4 interrupt.
+ */
+void EXTI4_IRQHandler(void)
+{
+ /* USER CODE BEGIN EXTI4_IRQn 0 */
+
+ /* USER CODE END EXTI4_IRQn 0 */
+ HAL_GPIO_EXTI_IRQHandler(ACCL_INT_Pin);
+ /* USER CODE BEGIN EXTI4_IRQn 1 */
+
+ /* USER CODE END EXTI4_IRQn 1 */
+}
+
+/**
+ * @brief This function handles DMA1 stream1 global interrupt.
+ */
+void DMA1_Stream1_IRQHandler(void)
+{
+ /* USER CODE BEGIN DMA1_Stream1_IRQn 0 */
+
+ /* USER CODE END DMA1_Stream1_IRQn 0 */
+ HAL_DMA_IRQHandler(&hdma_usart3_rx);
+ /* USER CODE BEGIN DMA1_Stream1_IRQn 1 */
+
+ /* USER CODE END DMA1_Stream1_IRQn 1 */
+}
+
+/**
+ * @brief This function handles DMA1 stream2 global interrupt.
+ */
+void DMA1_Stream2_IRQHandler(void)
+{
+ /* USER CODE BEGIN DMA1_Stream2_IRQn 0 */
+
+ /* USER CODE END DMA1_Stream2_IRQn 0 */
+ HAL_DMA_IRQHandler(&hdma_i2c3_rx);
+ /* USER CODE BEGIN DMA1_Stream2_IRQn 1 */
+
+ /* USER CODE END DMA1_Stream2_IRQn 1 */
+}
+
+/**
+ * @brief This function handles CAN1 RX0 interrupts.
+ */
+void CAN1_RX0_IRQHandler(void)
+{
+ /* USER CODE BEGIN CAN1_RX0_IRQn 0 */
+
+ /* USER CODE END CAN1_RX0_IRQn 0 */
+ HAL_CAN_IRQHandler(&hcan1);
+ /* USER CODE BEGIN CAN1_RX0_IRQn 1 */
+
+ /* USER CODE END CAN1_RX0_IRQn 1 */
+}
+
+/**
+ * @brief This function handles CAN1 RX1 interrupt.
+ */
+void CAN1_RX1_IRQHandler(void)
+{
+ /* USER CODE BEGIN CAN1_RX1_IRQn 0 */
+
+ /* USER CODE END CAN1_RX1_IRQn 0 */
+ HAL_CAN_IRQHandler(&hcan1);
+ /* USER CODE BEGIN CAN1_RX1_IRQn 1 */
+
+ /* USER CODE END CAN1_RX1_IRQn 1 */
+}
+
+/**
+ * @brief This function handles EXTI line[9:5] interrupts.
+ */
+void EXTI9_5_IRQHandler(void)
+{
+ /* USER CODE BEGIN EXTI9_5_IRQn 0 */
+
+ /* USER CODE END EXTI9_5_IRQn 0 */
+ HAL_GPIO_EXTI_IRQHandler(GYRO_INT_Pin);
+ /* USER CODE BEGIN EXTI9_5_IRQn 1 */
+
+ /* USER CODE END EXTI9_5_IRQn 1 */
+}
+
+/**
+ * @brief This function handles TIM1 break interrupt and TIM9 global interrupt.
+ */
+void TIM1_BRK_TIM9_IRQHandler(void)
+{
+ /* USER CODE BEGIN TIM1_BRK_TIM9_IRQn 0 */
+
+ /* USER CODE END TIM1_BRK_TIM9_IRQn 0 */
+ HAL_TIM_IRQHandler(&htim1);
+ /* USER CODE BEGIN TIM1_BRK_TIM9_IRQn 1 */
+
+ /* USER CODE END TIM1_BRK_TIM9_IRQn 1 */
+}
+
+/**
+ * @brief This function handles USART1 global interrupt.
+ */
+void USART1_IRQHandler(void)
+{
+ /* USER CODE BEGIN USART1_IRQn 0 */
+
+ /* USER CODE END USART1_IRQn 0 */
+ HAL_UART_IRQHandler(&huart1);
+ /* USER CODE BEGIN USART1_IRQn 1 */
+ BSP_UART_IRQHandler(&huart1);
+
+ /* USER CODE END USART1_IRQn 1 */
+}
+
+/**
+ * @brief This function handles DMA1 stream7 global interrupt.
+ */
+void DMA1_Stream7_IRQHandler(void)
+{
+ /* USER CODE BEGIN DMA1_Stream7_IRQn 0 */
+
+ /* USER CODE END DMA1_Stream7_IRQn 0 */
+ HAL_DMA_IRQHandler(&hdma_i2c2_tx);
+ /* USER CODE BEGIN DMA1_Stream7_IRQn 1 */
+
+ /* USER CODE END DMA1_Stream7_IRQn 1 */
+}
+
+/**
+ * @brief This function handles TIM7 global interrupt.
+ */
+void TIM7_IRQHandler(void)
+{
+ /* USER CODE BEGIN TIM7_IRQn 0 */
+
+ /* USER CODE END TIM7_IRQn 0 */
+ HAL_TIM_IRQHandler(&htim7);
+ /* USER CODE BEGIN TIM7_IRQn 1 */
+
+ /* USER CODE END TIM7_IRQn 1 */
+}
+
+/**
+ * @brief This function handles DMA2 stream1 global interrupt.
+ */
+void DMA2_Stream1_IRQHandler(void)
+{
+ /* USER CODE BEGIN DMA2_Stream1_IRQn 0 */
+
+ /* USER CODE END DMA2_Stream1_IRQn 0 */
+ HAL_DMA_IRQHandler(&hdma_usart6_rx);
+ /* USER CODE BEGIN DMA2_Stream1_IRQn 1 */
+
+ /* USER CODE END DMA2_Stream1_IRQn 1 */
+}
+
+/**
+ * @brief This function handles DMA2 stream2 global interrupt.
+ */
+void DMA2_Stream2_IRQHandler(void)
+{
+ /* USER CODE BEGIN DMA2_Stream2_IRQn 0 */
+
+ /* USER CODE END DMA2_Stream2_IRQn 0 */
+ HAL_DMA_IRQHandler(&hdma_spi1_rx);
+ /* USER CODE BEGIN DMA2_Stream2_IRQn 1 */
+
+ /* USER CODE END DMA2_Stream2_IRQn 1 */
+}
+
+/**
+ * @brief This function handles DMA2 stream3 global interrupt.
+ */
+void DMA2_Stream3_IRQHandler(void)
+{
+ /* USER CODE BEGIN DMA2_Stream3_IRQn 0 */
+
+ /* USER CODE END DMA2_Stream3_IRQn 0 */
+ HAL_DMA_IRQHandler(&hdma_spi1_tx);
+ /* USER CODE BEGIN DMA2_Stream3_IRQn 1 */
+
+ /* USER CODE END DMA2_Stream3_IRQn 1 */
+}
+
+/**
+ * @brief This function handles CAN2 RX0 interrupts.
+ */
+void CAN2_RX0_IRQHandler(void)
+{
+ /* USER CODE BEGIN CAN2_RX0_IRQn 0 */
+
+ /* USER CODE END CAN2_RX0_IRQn 0 */
+ HAL_CAN_IRQHandler(&hcan2);
+ /* USER CODE BEGIN CAN2_RX0_IRQn 1 */
+
+ /* USER CODE END CAN2_RX0_IRQn 1 */
+}
+
+/**
+ * @brief This function handles CAN2 RX1 interrupt.
+ */
+void CAN2_RX1_IRQHandler(void)
+{
+ /* USER CODE BEGIN CAN2_RX1_IRQn 0 */
+
+ /* USER CODE END CAN2_RX1_IRQn 0 */
+ HAL_CAN_IRQHandler(&hcan2);
+ /* USER CODE BEGIN CAN2_RX1_IRQn 1 */
+
+ /* USER CODE END CAN2_RX1_IRQn 1 */
+}
+
+/**
+ * @brief This function handles USB On The Go FS global interrupt.
+ */
+void OTG_FS_IRQHandler(void)
+{
+ /* USER CODE BEGIN OTG_FS_IRQn 0 */
+
+ /* USER CODE END OTG_FS_IRQn 0 */
+ HAL_PCD_IRQHandler(&hpcd_USB_OTG_FS);
+ /* USER CODE BEGIN OTG_FS_IRQn 1 */
+
+ /* USER CODE END OTG_FS_IRQn 1 */
+}
+
+/**
+ * @brief This function handles DMA2 stream5 global interrupt.
+ */
+void DMA2_Stream5_IRQHandler(void)
+{
+ /* USER CODE BEGIN DMA2_Stream5_IRQn 0 */
+
+ /* USER CODE END DMA2_Stream5_IRQn 0 */
+ HAL_DMA_IRQHandler(&hdma_usart1_rx);
+ /* USER CODE BEGIN DMA2_Stream5_IRQn 1 */
+
+ /* USER CODE END DMA2_Stream5_IRQn 1 */
+}
+
+/**
+ * @brief This function handles DMA2 stream6 global interrupt.
+ */
+void DMA2_Stream6_IRQHandler(void)
+{
+ /* USER CODE BEGIN DMA2_Stream6_IRQn 0 */
+
+ /* USER CODE END DMA2_Stream6_IRQn 0 */
+ HAL_DMA_IRQHandler(&hdma_usart6_tx);
+ /* USER CODE BEGIN DMA2_Stream6_IRQn 1 */
+
+ /* USER CODE END DMA2_Stream6_IRQn 1 */
+}
+
+/**
+ * @brief This function handles DMA2 stream7 global interrupt.
+ */
+void DMA2_Stream7_IRQHandler(void)
+{
+ /* USER CODE BEGIN DMA2_Stream7_IRQn 0 */
+
+ /* USER CODE END DMA2_Stream7_IRQn 0 */
+ HAL_DMA_IRQHandler(&hdma_usart1_tx);
+ /* USER CODE BEGIN DMA2_Stream7_IRQn 1 */
+
+ /* USER CODE END DMA2_Stream7_IRQn 1 */
+}
+
+/**
+ * @brief This function handles USART6 global interrupt.
+ */
+void USART6_IRQHandler(void)
+{
+ /* USER CODE BEGIN USART6_IRQn 0 */
+
+ /* USER CODE END USART6_IRQn 0 */
+ HAL_UART_IRQHandler(&huart6);
+ /* USER CODE BEGIN USART6_IRQn 1 */
+ BSP_UART_IRQHandler(&huart6);
+
+ /* USER CODE END USART6_IRQn 1 */
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/User/device/motor_rm.c b/User/device/motor_rm.c
index 9b5ea44..1e78a47 100644
--- a/User/device/motor_rm.c
+++ b/User/device/motor_rm.c
@@ -74,7 +74,7 @@ static int8_t MOTOR_RM_GetLogicalIndex(uint16_t can_id, MOTOR_RM_Module_t module
static float MOTOR_RM_GetRatio(MOTOR_RM_Module_t module) {
switch (module) {
case MOTOR_M2006: return 36.0f;
- case MOTOR_M3508: return 19.0f;
+ case MOTOR_M3508: return 3591.0f / 187.0f;
case MOTOR_GM6020: return 1.0f;
default: return 1.0f;
}
diff --git a/User/module/balance_chassis.c b/User/module/balance_chassis.c
index 2c37fe6..97d198e 100644
--- a/User/module/balance_chassis.c
+++ b/User/module/balance_chassis.c
@@ -409,9 +409,9 @@ int8_t Chassis_LQRControl(Chassis_t *c, const Chassis_CMD_t *c_cmd) {
LQR_State_t target_state = {0};
target_state.theta = c->param->theta; // 目标摆杆角度
target_state.d_theta = 0.0f; // 目标摆杆角速度
- target_state.phi = 11.9601*pow((0.15f + c_cmd->height * 0.25f),3) + -11.8715*pow((0.15f + c_cmd->height * 0.25f),2) + 3.87083*(0.15f + c_cmd->height * 0.25f) + -0.414154; // 目标俯仰角
+ target_state.phi = 11.9601*pow((0.13f + c_cmd->height * 0.25f),3) + -11.8715*pow((0.13f + c_cmd->height * 0.25f),2) + 3.87083*(0.13f + c_cmd->height * 0.25f) + -0.414154; // 目标俯仰角
target_state.d_phi = 0.0f; // 目标俯仰角速度
- target_state.x = c->chassis_state.target_x -2.07411f*(0.15f + c_cmd->height * 0.25f) + 0.41182f;
+ target_state.x = c->chassis_state.target_x -2.07411f*(0.13f + c_cmd->height * 0.25f) + 0.41182f;
target_state.d_x = target_dot_x; // 目标速度
if (c->mode != CHASSIS_MODE_ROTOR){
@@ -434,7 +434,7 @@ int8_t Chassis_LQRControl(Chassis_t *c, const Chassis_CMD_t *c_cmd) {
LQR_SetTargetState(&c->lqr[0], &target_state);
LQR_Control(&c->lqr[0]);
} else {
- target_state.theta = 0.15f; // 非接触时，腿摆角目标为0.1rad，防止腿完全悬空
+ target_state.theta = 0.13f; // 非接触时，腿摆角目标为0.1rad，防止腿完全悬空
LQR_SetTargetState(&c->lqr[0], &target_state);
c->lqr[0].control_output.T = 0.0f;
c->lqr[0].control_output.Tp =
@@ -446,7 +446,7 @@ int8_t Chassis_LQRControl(Chassis_t *c, const Chassis_CMD_t *c_cmd) {
LQR_SetTargetState(&c->lqr[1], &target_state);
LQR_Control(&c->lqr[1]);
}else {
- target_state.theta = 0.15f; // 非接触时，腿摆角目标为0.1rad，防止腿完全悬空
+ target_state.theta = 0.13f; // 非接触时，腿摆角目标为0.1rad，防止腿完全悬空
LQR_SetTargetState(&c->lqr[1], &target_state);
c->lqr[1].control_output.T = 0.0f;
c->lqr[1].control_output.Tp =
@@ -480,12 +480,12 @@ int8_t Chassis_LQRControl(Chassis_t *c, const Chassis_CMD_t *c_cmd) {
// 目标腿长设定（移除横滚角补偿）
switch (c->state) {
case 0: // 正常状态，根据高度指令调节腿长
- target_L0[0] = 0.15f + c_cmd->height * 0.22f; // 左腿：基础腿长 + 高度调节
- target_L0[1] = 0.15f + c_cmd->height * 0.22f; // 右腿：基础腿长 + 高度调节
+ target_L0[0] = 0.13f + c_cmd->height * 0.22f; // 左腿：基础腿长 + 高度调节
+ target_L0[1] = 0.13f + c_cmd->height * 0.22f; // 右腿：基础腿长 + 高度调节
break;
case 1: // 准备阶段，腿长收缩
- target_L0[0] = 0.15f; // 左腿：收缩到基础腿长
- target_L0[1] = 0.15f; // 右腿：收缩到基础腿长
+ target_L0[0] = 0.13f; // 左腿：收缩到基础腿长
+ target_L0[1] = 0.13f; // 右腿：收缩到基础腿长
break;
case 2: // 起跳阶段，腿长快速伸展
target_L0[0] = 0.55f; // 左腿：伸展到最大腿长
@@ -496,8 +496,8 @@ int8_t Chassis_LQRControl(Chassis_t *c, const Chassis_CMD_t *c_cmd) {
target_L0[1] = 0.1f; // 右腿：缓冲腿长
break;
default:
- target_L0[0] = 0.15f + c_cmd->height * 0.22f;
- target_L0[1] = 0.15f + c_cmd->height * 0.22f;
+ target_L0[0] = 0.13f + c_cmd->height * 0.22f;
+ target_L0[1] = 0.13f + c_cmd->height * 0.22f;
break;
}