4 lines
618 KiB
XML
4 lines
618 KiB
XML
<?xml version="1.0" encoding="UTF-8" standalone="no" ?><device schemaVersion="1.1" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"><name>STM32F042x</name><version>1.0</version><description>STM32F042x</description><!--Bus Interface Properties--><!--Cortex-M0 is byte addressable--><addressUnitBits>8</addressUnitBits><!--the maximum data bit width accessible within a single transfer--><width>32</width><!--Register Default Properties--><size>0x20</size><resetValue>0x0</resetValue><resetMask>0xFFFFFFFF</resetMask><peripherals><peripheral><name>CRC</name><description>cyclic redundancy check calculation unit</description><groupName>CRC</groupName><baseAddress>0x40023000</baseAddress><addressBlock><offset>0x0</offset><size>0x400</size><usage>registers</usage></addressBlock><registers><register><name>DR</name><displayName>DR</displayName><description>Data register</description><addressOffset>0x0</addressOffset><size>0x20</size><access>read-write</access><resetValue>0xFFFFFFFF</resetValue><fields><field><name>DR</name><description>Data register bits</description><bitOffset>0</bitOffset><bitWidth>32</bitWidth></field></fields></register><register><name>IDR</name><displayName>IDR</displayName><description>Independent data register</description><addressOffset>0x4</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>IDR</name><description>General-purpose 8-bit data register bits</description><bitOffset>0</bitOffset><bitWidth>8</bitWidth></field></fields></register><register><name>CR</name><displayName>CR</displayName><description>Control register</description><addressOffset>0x8</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>RESET</name><description>reset bit</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field><field><name>REV_IN</name><description>Reverse input data</description><bitOffset>5</bitOffset><bitWidth>2</bitWidth></field><field><name>REV_OUT</name><description>Reverse output data</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>INIT</name><displayName>INIT</displayName><description>Initial CRC value</description><addressOffset>0xC</addressOffset><size>0x20</size><access>read-write</access><resetValue>0xFFFFFFFF</resetValue><fields><field><name>INIT</name><description>Programmable initial CRC value</description><bitOffset>0</bitOffset><bitWidth>32</bitWidth></field></fields></register></registers></peripheral><peripheral><name>GPIOF</name><description>General-purpose I/Os</description><groupName>GPIO</groupName><baseAddress>0x48001400</baseAddress><addressBlock><offset>0x0</offset><size>0x400</size><usage>registers</usage></addressBlock><registers><register><name>MODER</name><displayName>MODER</displayName><description>GPIO port mode register</description><addressOffset>0x0</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>MODER15</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>30</bitOffset><bitWidth>2</bitWidth></field><field><name>MODER14</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>28</bitOffset><bitWidth>2</bitWidth></field><field><name>MODER13</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>26</bitOffset><bitWidth>2</bitWidth></field><field><name>MODER12</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>24</bitOffset><bitWidth>2</bitWidth></field><field><name>MODER11</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>22</bitOffset><bitWidth>2</bitWidth></field><field><name>MODER10</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>20</bitOffset><bitWidth>2</bitWidth></field><field><name>MODER9</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>18</bitOffset><bitWidth>2</bitWidth></field><field><name>MODER8</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>16</bitOffset><bitWidth>2</bitWidth></field><field><name>MODER7</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>14</bitOffset><bitWidth>2</bitWidth></field><field><name>MODER6</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>12</bitOffset><bitWidth>2</bitWidth></field><field><name>MODER5</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>10</bitOffset><bitWidth>2</bitWidth></field><field><name>MODER4</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>8</bitOffset><bitWidth>2</bitWidth></field><field><name>MODER3</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>6</bitOffset><bitWidth>2</bitWidth></field><field><name>MODER2</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>4</bitOffset><bitWidth>2</bitWidth></field><field><name>MODER1</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>2</bitOffset><bitWidth>2</bitWidth></field><field><name>MODER0</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>0</bitOffset><bitWidth>2</bitWidth></field></fields></register><register><name>OTYPER</name><displayName>OTYPER</displayName><description>GPIO port output type register</description><addressOffset>0x4</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>OT15</name><description>Port x configuration bit 15</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>OT14</name><description>Port x configuration bit 14</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>OT13</name><description>Port x configuration bit 13</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>OT12</name><description>Port x configuration bit 12</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>OT11</name><description>Port x configuration bit 11</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>OT10</name><description>Port x configuration bit 10</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>OT9</name><description>Port x configuration bit 9</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>OT8</name><description>Port x configuration bit 8</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>OT7</name><description>Port x configuration bit 7</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>OT6</name><description>Port x configuration bit 6</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>OT5</name><description>Port x configuration bit 5</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>OT4</name><description>Port x configuration bit 4</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>OT3</name><description>Port x configuration bit 3</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>OT2</name><description>Port x configuration bit 2</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>OT1</name><description>Port x configuration bit 1</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>OT0</name><description>Port x configuration bit 0</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>OSPEEDR</name><displayName>OSPEEDR</displayName><description>GPIO port output speed register</description><addressOffset>0x8</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>OSPEEDR15</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>30</bitOffset><bitWidth>2</bitWidth></field><field><name>OSPEEDR14</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>28</bitOffset><bitWidth>2</bitWidth></field><field><name>OSPEEDR13</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>26</bitOffset><bitWidth>2</bitWidth></field><field><name>OSPEEDR12</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>24</bitOffset><bitWidth>2</bitWidth></field><field><name>OSPEEDR11</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>22</bitOffset><bitWidth>2</bitWidth></field><field><name>OSPEEDR10</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>20</bitOffset><bitWidth>2</bitWidth></field><field><name>OSPEEDR9</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>18</bitOffset><bitWidth>2</bitWidth></field><field><name>OSPEEDR8</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>16</bitOffset><bitWidth>2</bitWidth></field><field><name>OSPEEDR7</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>14</bitOffset><bitWidth>2</bitWidth></field><field><name>OSPEEDR6</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>12</bitOffset><bitWidth>2</bitWidth></field><field><name>OSPEEDR5</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>10</bitOffset><bitWidth>2</bitWidth></field><field><name>OSPEEDR4</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>8</bitOffset><bitWidth>2</bitWidth></field><field><name>OSPEEDR3</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>6</bitOffset><bitWidth>2</bitWidth></field><field><name>OSPEEDR2</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>4</bitOffset><bitWidth>2</bitWidth></field><field><name>OSPEEDR1</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>2</bitOffset><bitWidth>2</bitWidth></field><field><name>OSPEEDR0</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>0</bitOffset><bitWidth>2</bitWidth></field></fields></register><register><name>PUPDR</name><displayName>PUPDR</displayName><description>GPIO port pull-up/pull-down register</description><addressOffset>0xC</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>PUPDR15</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>30</bitOffset><bitWidth>2</bitWidth></field><field><name>PUPDR14</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>28</bitOffset><bitWidth>2</bitWidth></field><field><name>PUPDR13</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>26</bitOffset><bitWidth>2</bitWidth></field><field><name>PUPDR12</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>24</bitOffset><bitWidth>2</bitWidth></field><field><name>PUPDR11</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>22</bitOffset><bitWidth>2</bitWidth></field><field><name>PUPDR10</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>20</bitOffset><bitWidth>2</bitWidth></field><field><name>PUPDR9</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>18</bitOffset><bitWidth>2</bitWidth></field><field><name>PUPDR8</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>16</bitOffset><bitWidth>2</bitWidth></field><field><name>PUPDR7</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>14</bitOffset><bitWidth>2</bitWidth></field><field><name>PUPDR6</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>12</bitOffset><bitWidth>2</bitWidth></field><field><name>PUPDR5</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>10</bitOffset><bitWidth>2</bitWidth></field><field><name>PUPDR4</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>8</bitOffset><bitWidth>2</bitWidth></field><field><name>PUPDR3</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>6</bitOffset><bitWidth>2</bitWidth></field><field><name>PUPDR2</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>4</bitOffset><bitWidth>2</bitWidth></field><field><name>PUPDR1</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>2</bitOffset><bitWidth>2</bitWidth></field><field><name>PUPDR0</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>0</bitOffset><bitWidth>2</bitWidth></field></fields></register><register><name>IDR</name><displayName>IDR</displayName><description>GPIO port input data register</description><addressOffset>0x10</addressOffset><size>0x20</size><access>read-only</access><resetValue>0x00000000</resetValue><fields><field><name>IDR15</name><description>Port input data (y = 0..15)</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>IDR14</name><description>Port input data (y = 0..15)</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>IDR13</name><description>Port input data (y = 0..15)</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>IDR12</name><description>Port input data (y = 0..15)</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>IDR11</name><description>Port input data (y = 0..15)</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>IDR10</name><description>Port input data (y = 0..15)</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>IDR9</name><description>Port input data (y = 0..15)</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>IDR8</name><description>Port input data (y = 0..15)</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>IDR7</name><description>Port input data (y = 0..15)</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>IDR6</name><description>Port input data (y = 0..15)</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>IDR5</name><description>Port input data (y = 0..15)</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>IDR4</name><description>Port input data (y = 0..15)</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>IDR3</name><description>Port input data (y = 0..15)</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>IDR2</name><description>Port input data (y = 0..15)</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>IDR1</name><description>Port input data (y = 0..15)</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>IDR0</name><description>Port input data (y = 0..15)</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>ODR</name><displayName>ODR</displayName><description>GPIO port output data register</description><addressOffset>0x14</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>ODR15</name><description>Port output data (y = 0..15)</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>ODR14</name><description>Port output data (y = 0..15)</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>ODR13</name><description>Port output data (y = 0..15)</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>ODR12</name><description>Port output data (y = 0..15)</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>ODR11</name><description>Port output data (y = 0..15)</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>ODR10</name><description>Port output data (y = 0..15)</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>ODR9</name><description>Port output data (y = 0..15)</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>ODR8</name><description>Port output data (y = 0..15)</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>ODR7</name><description>Port output data (y = 0..15)</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>ODR6</name><description>Port output data (y = 0..15)</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>ODR5</name><description>Port output data (y = 0..15)</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>ODR4</name><description>Port output data (y = 0..15)</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>ODR3</name><description>Port output data (y = 0..15)</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>ODR2</name><description>Port output data (y = 0..15)</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>ODR1</name><description>Port output data (y = 0..15)</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>ODR0</name><description>Port output data (y = 0..15)</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>BSRR</name><displayName>BSRR</displayName><description>GPIO port bit set/reset register</description><addressOffset>0x18</addressOffset><size>0x20</size><access>write-only</access><resetValue>0x00000000</resetValue><fields><field><name>BR15</name><description>Port x reset bit y (y = 0..15)</description><bitOffset>31</bitOffset><bitWidth>1</bitWidth></field><field><name>BR14</name><description>Port x reset bit y (y = 0..15)</description><bitOffset>30</bitOffset><bitWidth>1</bitWidth></field><field><name>BR13</name><description>Port x reset bit y (y = 0..15)</description><bitOffset>29</bitOffset><bitWidth>1</bitWidth></field><field><name>BR12</name><description>Port x reset bit y (y = 0..15)</description><bitOffset>28</bitOffset><bitWidth>1</bitWidth></field><field><name>BR11</name><description>Port x reset bit y (y = 0..15)</description><bitOffset>27</bitOffset><bitWidth>1</bitWidth></field><field><name>BR10</name><description>Port x reset bit y (y = 0..15)</description><bitOffset>26</bitOffset><bitWidth>1</bitWidth></field><field><name>BR9</name><description>Port x reset bit y (y = 0..15)</description><bitOffset>25</bitOffset><bitWidth>1</bitWidth></field><field><name>BR8</name><description>Port x reset bit y (y = 0..15)</description><bitOffset>24</bitOffset><bitWidth>1</bitWidth></field><field><name>BR7</name><description>Port x reset bit y (y = 0..15)</description><bitOffset>23</bitOffset><bitWidth>1</bitWidth></field><field><name>BR6</name><description>Port x reset bit y (y = 0..15)</description><bitOffset>22</bitOffset><bitWidth>1</bitWidth></field><field><name>BR5</name><description>Port x reset bit y (y = 0..15)</description><bitOffset>21</bitOffset><bitWidth>1</bitWidth></field><field><name>BR4</name><description>Port x reset bit y (y = 0..15)</description><bitOffset>20</bitOffset><bitWidth>1</bitWidth></field><field><name>BR3</name><description>Port x reset bit y (y = 0..15)</description><bitOffset>19</bitOffset><bitWidth>1</bitWidth></field><field><name>BR2</name><description>Port x reset bit y (y = 0..15)</description><bitOffset>18</bitOffset><bitWidth>1</bitWidth></field><field><name>BR1</name><description>Port x reset bit y (y = 0..15)</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth></field><field><name>BR0</name><description>Port x set bit y (y= 0..15)</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth></field><field><name>BS15</name><description>Port x set bit y (y= 0..15)</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>BS14</name><description>Port x set bit y (y= 0..15)</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>BS13</name><description>Port x set bit y (y= 0..15)</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>BS12</name><description>Port x set bit y (y= 0..15)</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>BS11</name><description>Port x set bit y (y= 0..15)</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>BS10</name><description>Port x set bit y (y= 0..15)</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>BS9</name><description>Port x set bit y (y= 0..15)</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>BS8</name><description>Port x set bit y (y= 0..15)</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>BS7</name><description>Port x set bit y (y= 0..15)</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>BS6</name><description>Port x set bit y (y= 0..15)</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>BS5</name><description>Port x set bit y (y= 0..15)</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>BS4</name><description>Port x set bit y (y= 0..15)</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>BS3</name><description>Port x set bit y (y= 0..15)</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>BS2</name><description>Port x set bit y (y= 0..15)</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>BS1</name><description>Port x set bit y (y= 0..15)</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>BS0</name><description>Port x set bit y (y= 0..15)</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>LCKR</name><displayName>LCKR</displayName><description>GPIO port configuration lock register</description><addressOffset>0x1C</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>LCKK</name><description>Port x lock bit y</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth></field><field><name>LCK15</name><description>Port x lock bit y (y= 0..15)</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>LCK14</name><description>Port x lock bit y (y= 0..15)</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>LCK13</name><description>Port x lock bit y (y= 0..15)</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>LCK12</name><description>Port x lock bit y (y= 0..15)</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>LCK11</name><description>Port x lock bit y (y= 0..15)</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>LCK10</name><description>Port x lock bit y (y= 0..15)</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>LCK9</name><description>Port x lock bit y (y= 0..15)</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>LCK8</name><description>Port x lock bit y (y= 0..15)</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>LCK7</name><description>Port x lock bit y (y= 0..15)</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>LCK6</name><description>Port x lock bit y (y= 0..15)</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>LCK5</name><description>Port x lock bit y (y= 0..15)</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>LCK4</name><description>Port x lock bit y (y= 0..15)</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>LCK3</name><description>Port x lock bit y (y= 0..15)</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>LCK2</name><description>Port x lock bit y (y= 0..15)</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>LCK1</name><description>Port x lock bit y (y= 0..15)</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>LCK0</name><description>Port x lock bit y (y= 0..15)</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>AFRL</name><displayName>AFRL</displayName><description>GPIO alternate function low register</description><addressOffset>0x20</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>AFRL7</name><description>Alternate function selection for port x bit y (y = 0..7)</description><bitOffset>28</bitOffset><bitWidth>4</bitWidth></field><field><name>AFRL6</name><description>Alternate function selection for port x bit y (y = 0..7)</description><bitOffset>24</bitOffset><bitWidth>4</bitWidth></field><field><name>AFRL5</name><description>Alternate function selection for port x bit y (y = 0..7)</description><bitOffset>20</bitOffset><bitWidth>4</bitWidth></field><field><name>AFRL4</name><description>Alternate function selection for port x bit y (y = 0..7)</description><bitOffset>16</bitOffset><bitWidth>4</bitWidth></field><field><name>AFRL3</name><description>Alternate function selection for port x bit y (y = 0..7)</description><bitOffset>12</bitOffset><bitWidth>4</bitWidth></field><field><name>AFRL2</name><description>Alternate function selection for port x bit y (y = 0..7)</description><bitOffset>8</bitOffset><bitWidth>4</bitWidth></field><field><name>AFRL1</name><description>Alternate function selection for port x bit y (y = 0..7)</description><bitOffset>4</bitOffset><bitWidth>4</bitWidth></field><field><name>AFRL0</name><description>Alternate function selection for port x bit y (y = 0..7)</description><bitOffset>0</bitOffset><bitWidth>4</bitWidth></field></fields></register><register><name>AFRH</name><displayName>AFRH</displayName><description>GPIO alternate function high register</description><addressOffset>0x24</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>AFRH15</name><description>Alternate function selection for port x bit y (y = 8..15)</description><bitOffset>28</bitOffset><bitWidth>4</bitWidth></field><field><name>AFRH14</name><description>Alternate function selection for port x bit y (y = 8..15)</description><bitOffset>24</bitOffset><bitWidth>4</bitWidth></field><field><name>AFRH13</name><description>Alternate function selection for port x bit y (y = 8..15)</description><bitOffset>20</bitOffset><bitWidth>4</bitWidth></field><field><name>AFRH12</name><description>Alternate function selection for port x bit y (y = 8..15)</description><bitOffset>16</bitOffset><bitWidth>4</bitWidth></field><field><name>AFRH11</name><description>Alternate function selection for port x bit y (y = 8..15)</description><bitOffset>12</bitOffset><bitWidth>4</bitWidth></field><field><name>AFRH10</name><description>Alternate function selection for port x bit y (y = 8..15)</description><bitOffset>8</bitOffset><bitWidth>4</bitWidth></field><field><name>AFRH9</name><description>Alternate function selection for port x bit y (y = 8..15)</description><bitOffset>4</bitOffset><bitWidth>4</bitWidth></field><field><name>AFRH8</name><description>Alternate function selection for port x bit y (y = 8..15)</description><bitOffset>0</bitOffset><bitWidth>4</bitWidth></field></fields></register><register><name>BRR</name><displayName>BRR</displayName><description>Port bit reset register</description><addressOffset>0x28</addressOffset><size>0x20</size><access>write-only</access><resetValue>0x00000000</resetValue><fields><field><name>BR0</name><description>Port x Reset bit y</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field><field><name>BR1</name><description>Port x Reset bit y</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>BR2</name><description>Port x Reset bit y</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>BR3</name><description>Port x Reset bit y</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>BR4</name><description>Port x Reset bit y</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>BR5</name><description>Port x Reset bit y</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>BR6</name><description>Port x Reset bit y</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>BR7</name><description>Port x Reset bit y</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>BR8</name><description>Port x Reset bit y</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>BR9</name><description>Port x Reset bit y</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>BR10</name><description>Port x Reset bit y</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>BR11</name><description>Port x Reset bit y</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>BR12</name><description>Port x Reset bit y</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>BR13</name><description>Port x Reset bit y</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>BR14</name><description>Port x Reset bit y</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>BR15</name><description>Port x Reset bit y</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field></fields></register></registers></peripheral><peripheral derivedFrom="GPIOF"><name>GPIOC</name><baseAddress>0x48000800</baseAddress></peripheral><peripheral derivedFrom="GPIOF"><name>GPIOB</name><baseAddress>0x48000400</baseAddress></peripheral><peripheral><name>GPIOA</name><description>General-purpose I/Os</description><groupName>GPIO</groupName><baseAddress>0x48000000</baseAddress><addressBlock><offset>0x0</offset><size>0x400</size><usage>registers</usage></addressBlock><registers><register><name>MODER</name><displayName>MODER</displayName><description>GPIO port mode register</description><addressOffset>0x0</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x28000000</resetValue><fields><field><name>MODER15</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>30</bitOffset><bitWidth>2</bitWidth></field><field><name>MODER14</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>28</bitOffset><bitWidth>2</bitWidth></field><field><name>MODER13</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>26</bitOffset><bitWidth>2</bitWidth></field><field><name>MODER12</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>24</bitOffset><bitWidth>2</bitWidth></field><field><name>MODER11</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>22</bitOffset><bitWidth>2</bitWidth></field><field><name>MODER10</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>20</bitOffset><bitWidth>2</bitWidth></field><field><name>MODER9</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>18</bitOffset><bitWidth>2</bitWidth></field><field><name>MODER8</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>16</bitOffset><bitWidth>2</bitWidth></field><field><name>MODER7</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>14</bitOffset><bitWidth>2</bitWidth></field><field><name>MODER6</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>12</bitOffset><bitWidth>2</bitWidth></field><field><name>MODER5</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>10</bitOffset><bitWidth>2</bitWidth></field><field><name>MODER4</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>8</bitOffset><bitWidth>2</bitWidth></field><field><name>MODER3</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>6</bitOffset><bitWidth>2</bitWidth></field><field><name>MODER2</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>4</bitOffset><bitWidth>2</bitWidth></field><field><name>MODER1</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>2</bitOffset><bitWidth>2</bitWidth></field><field><name>MODER0</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>0</bitOffset><bitWidth>2</bitWidth></field></fields></register><register><name>OTYPER</name><displayName>OTYPER</displayName><description>GPIO port output type register</description><addressOffset>0x4</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>OT15</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>OT14</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>OT13</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>OT12</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>OT11</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>OT10</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>OT9</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>OT8</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>OT7</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>OT6</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>OT5</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>OT4</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>OT3</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>OT2</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>OT1</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>OT0</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>OSPEEDR</name><displayName>OSPEEDR</displayName><description>GPIO port output speed register</description><addressOffset>0x8</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>OSPEEDR15</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>30</bitOffset><bitWidth>2</bitWidth></field><field><name>OSPEEDR14</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>28</bitOffset><bitWidth>2</bitWidth></field><field><name>OSPEEDR13</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>26</bitOffset><bitWidth>2</bitWidth></field><field><name>OSPEEDR12</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>24</bitOffset><bitWidth>2</bitWidth></field><field><name>OSPEEDR11</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>22</bitOffset><bitWidth>2</bitWidth></field><field><name>OSPEEDR10</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>20</bitOffset><bitWidth>2</bitWidth></field><field><name>OSPEEDR9</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>18</bitOffset><bitWidth>2</bitWidth></field><field><name>OSPEEDR8</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>16</bitOffset><bitWidth>2</bitWidth></field><field><name>OSPEEDR7</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>14</bitOffset><bitWidth>2</bitWidth></field><field><name>OSPEEDR6</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>12</bitOffset><bitWidth>2</bitWidth></field><field><name>OSPEEDR5</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>10</bitOffset><bitWidth>2</bitWidth></field><field><name>OSPEEDR4</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>8</bitOffset><bitWidth>2</bitWidth></field><field><name>OSPEEDR3</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>6</bitOffset><bitWidth>2</bitWidth></field><field><name>OSPEEDR2</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>4</bitOffset><bitWidth>2</bitWidth></field><field><name>OSPEEDR1</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>2</bitOffset><bitWidth>2</bitWidth></field><field><name>OSPEEDR0</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>0</bitOffset><bitWidth>2</bitWidth></field></fields></register><register><name>PUPDR</name><displayName>PUPDR</displayName><description>GPIO port pull-up/pull-down register</description><addressOffset>0xC</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x24000000</resetValue><fields><field><name>PUPDR15</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>30</bitOffset><bitWidth>2</bitWidth></field><field><name>PUPDR14</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>28</bitOffset><bitWidth>2</bitWidth></field><field><name>PUPDR13</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>26</bitOffset><bitWidth>2</bitWidth></field><field><name>PUPDR12</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>24</bitOffset><bitWidth>2</bitWidth></field><field><name>PUPDR11</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>22</bitOffset><bitWidth>2</bitWidth></field><field><name>PUPDR10</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>20</bitOffset><bitWidth>2</bitWidth></field><field><name>PUPDR9</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>18</bitOffset><bitWidth>2</bitWidth></field><field><name>PUPDR8</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>16</bitOffset><bitWidth>2</bitWidth></field><field><name>PUPDR7</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>14</bitOffset><bitWidth>2</bitWidth></field><field><name>PUPDR6</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>12</bitOffset><bitWidth>2</bitWidth></field><field><name>PUPDR5</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>10</bitOffset><bitWidth>2</bitWidth></field><field><name>PUPDR4</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>8</bitOffset><bitWidth>2</bitWidth></field><field><name>PUPDR3</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>6</bitOffset><bitWidth>2</bitWidth></field><field><name>PUPDR2</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>4</bitOffset><bitWidth>2</bitWidth></field><field><name>PUPDR1</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>2</bitOffset><bitWidth>2</bitWidth></field><field><name>PUPDR0</name><description>Port x configuration bits (y = 0..15)</description><bitOffset>0</bitOffset><bitWidth>2</bitWidth></field></fields></register><register><name>IDR</name><displayName>IDR</displayName><description>GPIO port input data register</description><addressOffset>0x10</addressOffset><size>0x20</size><access>read-only</access><resetValue>0x00000000</resetValue><fields><field><name>IDR15</name><description>Port input data (y = 0..15)</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>IDR14</name><description>Port input data (y = 0..15)</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>IDR13</name><description>Port input data (y = 0..15)</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>IDR12</name><description>Port input data (y = 0..15)</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>IDR11</name><description>Port input data (y = 0..15)</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>IDR10</name><description>Port input data (y = 0..15)</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>IDR9</name><description>Port input data (y = 0..15)</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>IDR8</name><description>Port input data (y = 0..15)</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>IDR7</name><description>Port input data (y = 0..15)</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>IDR6</name><description>Port input data (y = 0..15)</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>IDR5</name><description>Port input data (y = 0..15)</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>IDR4</name><description>Port input data (y = 0..15)</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>IDR3</name><description>Port input data (y = 0..15)</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>IDR2</name><description>Port input data (y = 0..15)</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>IDR1</name><description>Port input data (y = 0..15)</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>IDR0</name><description>Port input data (y = 0..15)</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>ODR</name><displayName>ODR</displayName><description>GPIO port output data register</description><addressOffset>0x14</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>ODR15</name><description>Port output data (y = 0..15)</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>ODR14</name><description>Port output data (y = 0..15)</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>ODR13</name><description>Port output data (y = 0..15)</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>ODR12</name><description>Port output data (y = 0..15)</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>ODR11</name><description>Port output data (y = 0..15)</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>ODR10</name><description>Port output data (y = 0..15)</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>ODR9</name><description>Port output data (y = 0..15)</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>ODR8</name><description>Port output data (y = 0..15)</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>ODR7</name><description>Port output data (y = 0..15)</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>ODR6</name><description>Port output data (y = 0..15)</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>ODR5</name><description>Port output data (y = 0..15)</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>ODR4</name><description>Port output data (y = 0..15)</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>ODR3</name><description>Port output data (y = 0..15)</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>ODR2</name><description>Port output data (y = 0..15)</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>ODR1</name><description>Port output data (y = 0..15)</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>ODR0</name><description>Port output data (y = 0..15)</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>BSRR</name><displayName>BSRR</displayName><description>GPIO port bit set/reset register</description><addressOffset>0x18</addressOffset><size>0x20</size><access>write-only</access><resetValue>0x00000000</resetValue><fields><field><name>BR15</name><description>Port x reset bit y (y = 0..15)</description><bitOffset>31</bitOffset><bitWidth>1</bitWidth></field><field><name>BR14</name><description>Port x reset bit y (y = 0..15)</description><bitOffset>30</bitOffset><bitWidth>1</bitWidth></field><field><name>BR13</name><description>Port x reset bit y (y = 0..15)</description><bitOffset>29</bitOffset><bitWidth>1</bitWidth></field><field><name>BR12</name><description>Port x reset bit y (y = 0..15)</description><bitOffset>28</bitOffset><bitWidth>1</bitWidth></field><field><name>BR11</name><description>Port x reset bit y (y = 0..15)</description><bitOffset>27</bitOffset><bitWidth>1</bitWidth></field><field><name>BR10</name><description>Port x reset bit y (y = 0..15)</description><bitOffset>26</bitOffset><bitWidth>1</bitWidth></field><field><name>BR9</name><description>Port x reset bit y (y = 0..15)</description><bitOffset>25</bitOffset><bitWidth>1</bitWidth></field><field><name>BR8</name><description>Port x reset bit y (y = 0..15)</description><bitOffset>24</bitOffset><bitWidth>1</bitWidth></field><field><name>BR7</name><description>Port x reset bit y (y = 0..15)</description><bitOffset>23</bitOffset><bitWidth>1</bitWidth></field><field><name>BR6</name><description>Port x reset bit y (y = 0..15)</description><bitOffset>22</bitOffset><bitWidth>1</bitWidth></field><field><name>BR5</name><description>Port x reset bit y (y = 0..15)</description><bitOffset>21</bitOffset><bitWidth>1</bitWidth></field><field><name>BR4</name><description>Port x reset bit y (y = 0..15)</description><bitOffset>20</bitOffset><bitWidth>1</bitWidth></field><field><name>BR3</name><description>Port x reset bit y (y = 0..15)</description><bitOffset>19</bitOffset><bitWidth>1</bitWidth></field><field><name>BR2</name><description>Port x reset bit y (y = 0..15)</description><bitOffset>18</bitOffset><bitWidth>1</bitWidth></field><field><name>BR1</name><description>Port x reset bit y (y = 0..15)</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth></field><field><name>BR0</name><description>Port x set bit y (y= 0..15)</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth></field><field><name>BS15</name><description>Port x set bit y (y= 0..15)</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>BS14</name><description>Port x set bit y (y= 0..15)</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>BS13</name><description>Port x set bit y (y= 0..15)</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>BS12</name><description>Port x set bit y (y= 0..15)</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>BS11</name><description>Port x set bit y (y= 0..15)</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>BS10</name><description>Port x set bit y (y= 0..15)</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>BS9</name><description>Port x set bit y (y= 0..15)</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>BS8</name><description>Port x set bit y (y= 0..15)</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>BS7</name><description>Port x set bit y (y= 0..15)</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>BS6</name><description>Port x set bit y (y= 0..15)</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>BS5</name><description>Port x set bit y (y= 0..15)</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>BS4</name><description>Port x set bit y (y= 0..15)</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>BS3</name><description>Port x set bit y (y= 0..15)</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>BS2</name><description>Port x set bit y (y= 0..15)</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>BS1</name><description>Port x set bit y (y= 0..15)</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>BS0</name><description>Port x set bit y (y= 0..15)</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>LCKR</name><displayName>LCKR</displayName><description>GPIO port configuration lock register</description><addressOffset>0x1C</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>LCKK</name><description>Port x lock bit y (y= 0..15)</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth></field><field><name>LCK15</name><description>Port x lock bit y (y= 0..15)</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>LCK14</name><description>Port x lock bit y (y= 0..15)</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>LCK13</name><description>Port x lock bit y (y= 0..15)</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>LCK12</name><description>Port x lock bit y (y= 0..15)</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>LCK11</name><description>Port x lock bit y (y= 0..15)</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>LCK10</name><description>Port x lock bit y (y= 0..15)</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>LCK9</name><description>Port x lock bit y (y= 0..15)</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>LCK8</name><description>Port x lock bit y (y= 0..15)</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>LCK7</name><description>Port x lock bit y (y= 0..15)</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>LCK6</name><description>Port x lock bit y (y= 0..15)</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>LCK5</name><description>Port x lock bit y (y= 0..15)</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>LCK4</name><description>Port x lock bit y (y= 0..15)</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>LCK3</name><description>Port x lock bit y (y= 0..15)</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>LCK2</name><description>Port x lock bit y (y= 0..15)</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>LCK1</name><description>Port x lock bit y (y= 0..15)</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>LCK0</name><description>Port x lock bit y (y= 0..15)</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>AFRL</name><displayName>AFRL</displayName><description>GPIO alternate function low register</description><addressOffset>0x20</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>AFRL7</name><description>Alternate function selection for port x bit y (y = 0..7)</description><bitOffset>28</bitOffset><bitWidth>4</bitWidth></field><field><name>AFRL6</name><description>Alternate function selection for port x bit y (y = 0..7)</description><bitOffset>24</bitOffset><bitWidth>4</bitWidth></field><field><name>AFRL5</name><description>Alternate function selection for port x bit y (y = 0..7)</description><bitOffset>20</bitOffset><bitWidth>4</bitWidth></field><field><name>AFRL4</name><description>Alternate function selection for port x bit y (y = 0..7)</description><bitOffset>16</bitOffset><bitWidth>4</bitWidth></field><field><name>AFRL3</name><description>Alternate function selection for port x bit y (y = 0..7)</description><bitOffset>12</bitOffset><bitWidth>4</bitWidth></field><field><name>AFRL2</name><description>Alternate function selection for port x bit y (y = 0..7)</description><bitOffset>8</bitOffset><bitWidth>4</bitWidth></field><field><name>AFRL1</name><description>Alternate function selection for port x bit y (y = 0..7)</description><bitOffset>4</bitOffset><bitWidth>4</bitWidth></field><field><name>AFRL0</name><description>Alternate function selection for port x bit y (y = 0..7)</description><bitOffset>0</bitOffset><bitWidth>4</bitWidth></field></fields></register><register><name>AFRH</name><displayName>AFRH</displayName><description>GPIO alternate function high register</description><addressOffset>0x24</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>AFRH15</name><description>Alternate function selection for port x bit y (y = 8..15)</description><bitOffset>28</bitOffset><bitWidth>4</bitWidth></field><field><name>AFRH14</name><description>Alternate function selection for port x bit y (y = 8..15)</description><bitOffset>24</bitOffset><bitWidth>4</bitWidth></field><field><name>AFRH13</name><description>Alternate function selection for port x bit y (y = 8..15)</description><bitOffset>20</bitOffset><bitWidth>4</bitWidth></field><field><name>AFRH12</name><description>Alternate function selection for port x bit y (y = 8..15)</description><bitOffset>16</bitOffset><bitWidth>4</bitWidth></field><field><name>AFRH11</name><description>Alternate function selection for port x bit y (y = 8..15)</description><bitOffset>12</bitOffset><bitWidth>4</bitWidth></field><field><name>AFRH10</name><description>Alternate function selection for port x bit y (y = 8..15)</description><bitOffset>8</bitOffset><bitWidth>4</bitWidth></field><field><name>AFRH9</name><description>Alternate function selection for port x bit y (y = 8..15)</description><bitOffset>4</bitOffset><bitWidth>4</bitWidth></field><field><name>AFRH8</name><description>Alternate function selection for port x bit y (y = 8..15)</description><bitOffset>0</bitOffset><bitWidth>4</bitWidth></field></fields></register><register><name>BRR</name><displayName>BRR</displayName><description>Port bit reset register</description><addressOffset>0x28</addressOffset><size>0x20</size><access>write-only</access><resetValue>0x00000000</resetValue><fields><field><name>BR0</name><description>Port x Reset bit y</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field><field><name>BR1</name><description>Port x Reset bit y</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>BR2</name><description>Port x Reset bit y</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>BR3</name><description>Port x Reset bit y</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>BR4</name><description>Port x Reset bit y</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>BR5</name><description>Port x Reset bit y</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>BR6</name><description>Port x Reset bit y</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>BR7</name><description>Port x Reset bit y</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>BR8</name><description>Port x Reset bit y</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>BR9</name><description>Port x Reset bit y</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>BR10</name><description>Port x Reset bit y</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>BR11</name><description>Port x Reset bit y</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>BR12</name><description>Port x Reset bit y</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>BR13</name><description>Port x Reset bit y</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>BR14</name><description>Port x Reset bit y</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>BR15</name><description>Port x Reset bit y</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field></fields></register></registers></peripheral><peripheral><name>SPI1</name><description>Serial peripheral interface</description><groupName>SPI</groupName><baseAddress>0x40013000</baseAddress><addressBlock><offset>0x0</offset><size>0x400</size><usage>registers</usage></addressBlock><interrupt><name>SPI1</name><description>SPI1_global_interrupt</description><value>25</value></interrupt><registers><register><name>CR1</name><displayName>CR1</displayName><description>control register 1</description><addressOffset>0x0</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x0000</resetValue><fields><field><name>BIDIMODE</name><description>Bidirectional data mode enable</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>BIDIOE</name><description>Output enable in bidirectional mode</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>CRCEN</name><description>Hardware CRC calculation enable</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>CRCNEXT</name><description>CRC transfer next</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>DFF</name><description>Data frame format</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>RXONLY</name><description>Receive only</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>SSM</name><description>Software slave management</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>SSI</name><description>Internal slave select</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>LSBFIRST</name><description>Frame format</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>SPE</name><description>SPI enable</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>BR</name><description>Baud rate control</description><bitOffset>3</bitOffset><bitWidth>3</bitWidth></field><field><name>MSTR</name><description>Master selection</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>CPOL</name><description>Clock polarity</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>CPHA</name><description>Clock phase</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>CR2</name><displayName>CR2</displayName><description>control register 2</description><addressOffset>0x4</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x0000</resetValue><fields><field><name>RXDMAEN</name><description>Rx buffer DMA enable</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field><field><name>TXDMAEN</name><description>Tx buffer DMA enable</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>SSOE</name><description>SS output enable</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>NSSP</name><description>NSS pulse management</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>FRF</name><description>Frame format</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>ERRIE</name><description>Error interrupt enable</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>RXNEIE</name><description>RX buffer not empty interrupt enable</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>TXEIE</name><description>Tx buffer empty interrupt enable</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>DS</name><description>Data size</description><bitOffset>8</bitOffset><bitWidth>4</bitWidth></field><field><name>FRXTH</name><description>FIFO reception threshold</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>LDMA_RX</name><description>Last DMA transfer for reception</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>LDMA_TX</name><description>Last DMA transfer for transmission</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>SR</name><displayName>SR</displayName><description>status register</description><addressOffset>0x8</addressOffset><size>0x20</size><resetValue>0x0002</resetValue><fields><field><name>RXNE</name><description>Receive buffer not empty</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth><access>read-only</access></field><field><name>TXE</name><description>Transmit buffer empty</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth><access>read-only</access></field><field><name>CHSIDE</name><description>Channel side</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth><access>read-only</access></field><field><name>UDR</name><description>Underrun flag</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth><access>read-only</access></field><field><name>CRCERR</name><description>CRC error flag</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>MODF</name><description>Mode fault</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth><access>read-only</access></field><field><name>OVR</name><description>Overrun flag</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth><access>read-only</access></field><field><name>BSY</name><description>Busy flag</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth><access>read-only</access></field><field><name>TIFRFE</name><description>TI frame format error</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth><access>read-only</access></field><field><name>FRLVL</name><description>FIFO reception level</description><bitOffset>9</bitOffset><bitWidth>2</bitWidth><access>read-only</access></field><field><name>FTLVL</name><description>FIFO transmission level</description><bitOffset>11</bitOffset><bitWidth>2</bitWidth><access>read-only</access></field></fields></register><register><name>DR</name><displayName>DR</displayName><description>data register</description><addressOffset>0xC</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x0000</resetValue><fields><field><name>DR</name><description>Data register</description><bitOffset>0</bitOffset><bitWidth>16</bitWidth></field></fields></register><register><name>CRCPR</name><displayName>CRCPR</displayName><description>CRC polynomial register</description><addressOffset>0x10</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x0007</resetValue><fields><field><name>CRCPOLY</name><description>CRC polynomial register</description><bitOffset>0</bitOffset><bitWidth>16</bitWidth></field></fields></register><register><name>RXCRCR</name><displayName>RXCRCR</displayName><description>RX CRC register</description><addressOffset>0x14</addressOffset><size>0x20</size><access>read-only</access><resetValue>0x0000</resetValue><fields><field><name>RxCRC</name><description>Rx CRC register</description><bitOffset>0</bitOffset><bitWidth>16</bitWidth></field></fields></register><register><name>TXCRCR</name><displayName>TXCRCR</displayName><description>TX CRC register</description><addressOffset>0x18</addressOffset><size>0x20</size><access>read-only</access><resetValue>0x0000</resetValue><fields><field><name>TxCRC</name><description>Tx CRC register</description><bitOffset>0</bitOffset><bitWidth>16</bitWidth></field></fields></register><register><name>I2SCFGR</name><displayName>I2SCFGR</displayName><description>I2S configuration register</description><addressOffset>0x1C</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x0000</resetValue><fields><field><name>I2SMOD</name><description>I2S mode selection</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>I2SE</name><description>I2S Enable</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>I2SCFG</name><description>I2S configuration mode</description><bitOffset>8</bitOffset><bitWidth>2</bitWidth></field><field><name>PCMSYNC</name><description>PCM frame synchronization</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>I2SSTD</name><description>I2S standard selection</description><bitOffset>4</bitOffset><bitWidth>2</bitWidth></field><field><name>CKPOL</name><description>Steady state clock polarity</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>DATLEN</name><description>Data length to be transferred</description><bitOffset>1</bitOffset><bitWidth>2</bitWidth></field><field><name>CHLEN</name><description>Channel length (number of bits per audio channel)</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>I2SPR</name><displayName>I2SPR</displayName><description>I2S prescaler register</description><addressOffset>0x20</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000010</resetValue><fields><field><name>MCKOE</name><description>Master clock output enable</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>ODD</name><description>Odd factor for the prescaler</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>I2SDIV</name><description>I2S Linear prescaler</description><bitOffset>0</bitOffset><bitWidth>8</bitWidth></field></fields></register></registers></peripheral><peripheral derivedFrom="SPI1"><name>SPI2</name><baseAddress>0x40003800</baseAddress><interrupt><name>SPI2</name><description>SPI2 global interrupt</description><value>26</value></interrupt></peripheral><peripheral><name>PWR</name><description>Power control</description><groupName>PWR</groupName><baseAddress>0x40007000</baseAddress><addressBlock><offset>0x0</offset><size>0x400</size><usage>registers</usage></addressBlock><interrupt><name>PVD</name><description>PVD and VDDIO2 supply comparator
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interrupt</description><value>1</value></interrupt><registers><register><name>CR</name><displayName>CR</displayName><description>power control register</description><addressOffset>0x0</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>FPDS</name><description>Flash power down in Stop mode</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>DBP</name><description>Disable backup domain write protection</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>PLS</name><description>PVD level selection</description><bitOffset>5</bitOffset><bitWidth>3</bitWidth></field><field><name>PVDE</name><description>Power voltage detector enable</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>CSBF</name><description>Clear standby flag</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>CWUF</name><description>Clear wakeup flag</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>PDDS</name><description>Power down deepsleep</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>LPDS</name><description>Low-power deep sleep</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>CSR</name><displayName>CSR</displayName><description>power control/status register</description><addressOffset>0x4</addressOffset><size>0x20</size><resetValue>0x00000000</resetValue><fields><field><name>BRE</name><description>Backup regulator enable</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>EWUP</name><description>Enable WKUP pin</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>BRR</name><description>Backup regulator ready</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth><access>read-only</access></field><field><name>PVDO</name><description>PVD output</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth><access>read-only</access></field><field><name>SBF</name><description>Standby flag</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth><access>read-only</access></field><field><name>WUF</name><description>Wakeup flag</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth><access>read-only</access></field></fields></register></registers></peripheral><peripheral><name>I2C1</name><description>Inter-integrated circuit</description><groupName>I2C</groupName><baseAddress>0x40005400</baseAddress><addressBlock><offset>0x0</offset><size>0x400</size><usage>registers</usage></addressBlock><interrupt><name>I2C1</name><description>I2C1 global interrupt</description><value>23</value></interrupt><registers><register><name>CR1</name><displayName>CR1</displayName><description>Control register 1</description><addressOffset>0x0</addressOffset><size>0x20</size><resetValue>0x00000000</resetValue><fields><field><name>PE</name><description>Peripheral enable</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>TXIE</name><description>TX Interrupt enable</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>RXIE</name><description>RX Interrupt enable</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>ADDRIE</name><description>Address match interrupt enable (slave only)</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>NACKIE</name><description>Not acknowledge received interrupt enable</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>STOPIE</name><description>STOP detection Interrupt enable</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>TCIE</name><description>Transfer Complete interrupt enable</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>ERRIE</name><description>Error interrupts enable</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>DNF</name><description>Digital noise filter</description><bitOffset>8</bitOffset><bitWidth>4</bitWidth><access>read-write</access></field><field><name>ANFOFF</name><description>Analog noise filter OFF</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>SWRST</name><description>Software reset</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth><access>write-only</access></field><field><name>TXDMAEN</name><description>DMA transmission requests enable</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>RXDMAEN</name><description>DMA reception requests enable</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>SBC</name><description>Slave byte control</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>NOSTRETCH</name><description>Clock stretching disable</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>WUPEN</name><description>Wakeup from STOP enable</description><bitOffset>18</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>GCEN</name><description>General call enable</description><bitOffset>19</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>SMBHEN</name><description>SMBus Host address enable</description><bitOffset>20</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>SMBDEN</name><description>SMBus Device Default address enable</description><bitOffset>21</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>ALERTEN</name><description>SMBUS alert enable</description><bitOffset>22</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>PECEN</name><description>PEC enable</description><bitOffset>23</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field></fields></register><register><name>CR2</name><displayName>CR2</displayName><description>Control register 2</description><addressOffset>0x4</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>PECBYTE</name><description>Packet error checking byte</description><bitOffset>26</bitOffset><bitWidth>1</bitWidth></field><field><name>AUTOEND</name><description>Automatic end mode (master mode)</description><bitOffset>25</bitOffset><bitWidth>1</bitWidth></field><field><name>RELOAD</name><description>NBYTES reload mode</description><bitOffset>24</bitOffset><bitWidth>1</bitWidth></field><field><name>NBYTES</name><description>Number of bytes</description><bitOffset>16</bitOffset><bitWidth>8</bitWidth></field><field><name>NACK</name><description>NACK generation (slave mode)</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>STOP</name><description>Stop generation (master mode)</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>START</name><description>Start generation</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>HEAD10R</name><description>10-bit address header only read direction (master receiver mode)</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>ADD10</name><description>10-bit addressing mode (master mode)</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>RD_WRN</name><description>Transfer direction (master mode)</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>SADD8</name><description>Slave address bit 9:8 (master mode)</description><bitOffset>8</bitOffset><bitWidth>2</bitWidth></field><field><name>SADD1</name><description>Slave address bit 7:1 (master mode)</description><bitOffset>1</bitOffset><bitWidth>7</bitWidth></field><field><name>SADD0</name><description>Slave address bit 0 (master mode)</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>OAR1</name><displayName>OAR1</displayName><description>Own address register 1</description><addressOffset>0x8</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>OA1_0</name><description>Interface address</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field><field><name>OA1_1</name><description>Interface address</description><bitOffset>1</bitOffset><bitWidth>7</bitWidth></field><field><name>OA1_8</name><description>Interface address</description><bitOffset>8</bitOffset><bitWidth>2</bitWidth></field><field><name>OA1MODE</name><description>Own Address 1 10-bit mode</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>OA1EN</name><description>Own Address 1 enable</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>OAR2</name><displayName>OAR2</displayName><description>Own address register 2</description><addressOffset>0xC</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>OA2</name><description>Interface address</description><bitOffset>1</bitOffset><bitWidth>7</bitWidth></field><field><name>OA2MSK</name><description>Own Address 2 masks</description><bitOffset>8</bitOffset><bitWidth>3</bitWidth></field><field><name>OA2EN</name><description>Own Address 2 enable</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>TIMINGR</name><displayName>TIMINGR</displayName><description>Timing register</description><addressOffset>0x10</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>SCLL</name><description>SCL low period (master mode)</description><bitOffset>0</bitOffset><bitWidth>8</bitWidth></field><field><name>SCLH</name><description>SCL high period (master mode)</description><bitOffset>8</bitOffset><bitWidth>8</bitWidth></field><field><name>SDADEL</name><description>Data hold time</description><bitOffset>16</bitOffset><bitWidth>4</bitWidth></field><field><name>SCLDEL</name><description>Data setup time</description><bitOffset>20</bitOffset><bitWidth>4</bitWidth></field><field><name>PRESC</name><description>Timing prescaler</description><bitOffset>28</bitOffset><bitWidth>4</bitWidth></field></fields></register><register><name>TIMEOUTR</name><displayName>TIMEOUTR</displayName><description>Status register 1</description><addressOffset>0x14</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>TIMEOUTA</name><description>Bus timeout A</description><bitOffset>0</bitOffset><bitWidth>12</bitWidth></field><field><name>TIDLE</name><description>Idle clock timeout detection</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>TIMOUTEN</name><description>Clock timeout enable</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>TIMEOUTB</name><description>Bus timeout B</description><bitOffset>16</bitOffset><bitWidth>12</bitWidth></field><field><name>TEXTEN</name><description>Extended clock timeout enable</description><bitOffset>31</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>ISR</name><displayName>ISR</displayName><description>Interrupt and Status register</description><addressOffset>0x18</addressOffset><size>0x20</size><resetValue>0x00000001</resetValue><fields><field><name>ADDCODE</name><description>Address match code (Slave mode)</description><bitOffset>17</bitOffset><bitWidth>7</bitWidth><access>read-only</access></field><field><name>DIR</name><description>Transfer direction (Slave mode)</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth><access>read-only</access></field><field><name>BUSY</name><description>Bus busy</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth><access>read-only</access></field><field><name>ALERT</name><description>SMBus alert</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth><access>read-only</access></field><field><name>TIMEOUT</name><description>Timeout or t_low detection flag</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth><access>read-only</access></field><field><name>PECERR</name><description>PEC Error in reception</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth><access>read-only</access></field><field><name>OVR</name><description>Overrun/Underrun (slave mode)</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth><access>read-only</access></field><field><name>ARLO</name><description>Arbitration lost</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth><access>read-only</access></field><field><name>BERR</name><description>Bus error</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth><access>read-only</access></field><field><name>TCR</name><description>Transfer Complete Reload</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth><access>read-only</access></field><field><name>TC</name><description>Transfer Complete (master mode)</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth><access>read-only</access></field><field><name>STOPF</name><description>Stop detection flag</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth><access>read-only</access></field><field><name>NACKF</name><description>Not acknowledge received flag</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth><access>read-only</access></field><field><name>ADDR</name><description>Address matched (slave mode)</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth><access>read-only</access></field><field><name>RXNE</name><description>Receive data register not empty (receivers)</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth><access>read-only</access></field><field><name>TXIS</name><description>Transmit interrupt status (transmitters)</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>TXE</name><description>Transmit data register empty (transmitters)</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field></fields></register><register><name>ICR</name><displayName>ICR</displayName><description>Interrupt clear register</description><addressOffset>0x1C</addressOffset><size>0x20</size><access>write-only</access><resetValue>0x00000000</resetValue><fields><field><name>ALERTCF</name><description>Alert flag clear</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>TIMOUTCF</name><description>Timeout detection flag clear</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>PECCF</name><description>PEC Error flag clear</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>OVRCF</name><description>Overrun/Underrun flag clear</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>ARLOCF</name><description>Arbitration lost flag clear</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>BERRCF</name><description>Bus error flag clear</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>STOPCF</name><description>Stop detection flag clear</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>NACKCF</name><description>Not Acknowledge flag clear</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>ADDRCF</name><description>Address Matched flag clear</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>PECR</name><displayName>PECR</displayName><description>PEC register</description><addressOffset>0x20</addressOffset><size>0x20</size><access>read-only</access><resetValue>0x00000000</resetValue><fields><field><name>PEC</name><description>Packet error checking register</description><bitOffset>0</bitOffset><bitWidth>8</bitWidth></field></fields></register><register><name>RXDR</name><displayName>RXDR</displayName><description>Receive data register</description><addressOffset>0x24</addressOffset><size>0x20</size><access>read-only</access><resetValue>0x00000000</resetValue><fields><field><name>RXDATA</name><description>8-bit receive data</description><bitOffset>0</bitOffset><bitWidth>8</bitWidth></field></fields></register><register><name>TXDR</name><displayName>TXDR</displayName><description>Transmit data register</description><addressOffset>0x28</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>TXDATA</name><description>8-bit transmit data</description><bitOffset>0</bitOffset><bitWidth>8</bitWidth></field></fields></register></registers></peripheral><peripheral><name>IWDG</name><description>Independent watchdog</description><groupName>IWDG</groupName><baseAddress>0x40003000</baseAddress><addressBlock><offset>0x0</offset><size>0x400</size><usage>registers</usage></addressBlock><registers><register><name>KR</name><displayName>KR</displayName><description>Key register</description><addressOffset>0x0</addressOffset><size>0x20</size><access>write-only</access><resetValue>0x00000000</resetValue><fields><field><name>KEY</name><description>Key value</description><bitOffset>0</bitOffset><bitWidth>16</bitWidth></field></fields></register><register><name>PR</name><displayName>PR</displayName><description>Prescaler register</description><addressOffset>0x4</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>PR</name><description>Prescaler divider</description><bitOffset>0</bitOffset><bitWidth>3</bitWidth></field></fields></register><register><name>RLR</name><displayName>RLR</displayName><description>Reload register</description><addressOffset>0x8</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000FFF</resetValue><fields><field><name>RL</name><description>Watchdog counter reload value</description><bitOffset>0</bitOffset><bitWidth>12</bitWidth></field></fields></register><register><name>SR</name><displayName>SR</displayName><description>Status register</description><addressOffset>0xC</addressOffset><size>0x20</size><access>read-only</access><resetValue>0x00000000</resetValue><fields><field><name>PVU</name><description>Watchdog prescaler value update</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field><field><name>RVU</name><description>Watchdog counter reload value update</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>WVU</name><description>Watchdog counter window value update</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>WINR</name><displayName>WINR</displayName><description>Window register</description><addressOffset>0x10</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000FFF</resetValue><fields><field><name>WIN</name><description>Watchdog counter window value</description><bitOffset>0</bitOffset><bitWidth>12</bitWidth></field></fields></register></registers></peripheral><peripheral><name>WWDG</name><description>Window watchdog</description><groupName>WWDG</groupName><baseAddress>0x40002C00</baseAddress><addressBlock><offset>0x0</offset><size>0x400</size><usage>registers</usage></addressBlock><interrupt><name>WWDG</name><description>Window Watchdog interrupt</description><value>0</value></interrupt><registers><register><name>CR</name><displayName>CR</displayName><description>Control register</description><addressOffset>0x0</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x0000007F</resetValue><fields><field><name>WDGA</name><description>Activation bit</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>T</name><description>7-bit counter</description><bitOffset>0</bitOffset><bitWidth>7</bitWidth></field></fields></register><register><name>CFR</name><displayName>CFR</displayName><description>Configuration register</description><addressOffset>0x4</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x0000007F</resetValue><fields><field><name>EWI</name><description>Early wakeup interrupt</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>WDGTB</name><description>Timer base</description><bitOffset>7</bitOffset><bitWidth>2</bitWidth></field><field><name>W</name><description>7-bit window value</description><bitOffset>0</bitOffset><bitWidth>7</bitWidth></field></fields></register><register><name>SR</name><displayName>SR</displayName><description>Status register</description><addressOffset>0x8</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>EWIF</name><description>Early wakeup interrupt flag</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field></fields></register></registers></peripheral><peripheral><name>TIM1</name><description>Advanced-timers</description><groupName>TIM</groupName><baseAddress>0x40012C00</baseAddress><addressBlock><offset>0x0</offset><size>0x400</size><usage>registers</usage></addressBlock><interrupt><name>TIM1_BRK_UP_TRG_COM</name><description>TIM1 break, update, trigger and commutation
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interrupt</description><value>13</value></interrupt><interrupt><name>TIM1_CC</name><description>TIM1 Capture Compare interrupt</description><value>14</value></interrupt><registers><register><name>CR1</name><displayName>CR1</displayName><description>control register 1</description><addressOffset>0x0</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x0000</resetValue><fields><field><name>CKD</name><description>Clock division</description><bitOffset>8</bitOffset><bitWidth>2</bitWidth></field><field><name>ARPE</name><description>Auto-reload preload enable</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>CMS</name><description>Center-aligned mode selection</description><bitOffset>5</bitOffset><bitWidth>2</bitWidth></field><field><name>DIR</name><description>Direction</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>OPM</name><description>One-pulse mode</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>URS</name><description>Update request source</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>UDIS</name><description>Update disable</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>CEN</name><description>Counter enable</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>CR2</name><displayName>CR2</displayName><description>control register 2</description><addressOffset>0x4</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x0000</resetValue><fields><field><name>OIS4</name><description>Output Idle state 4</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>OIS3N</name><description>Output Idle state 3</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>OIS3</name><description>Output Idle state 3</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>OIS2N</name><description>Output Idle state 2</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>OIS2</name><description>Output Idle state 2</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>OIS1N</name><description>Output Idle state 1</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>OIS1</name><description>Output Idle state 1</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>TI1S</name><description>TI1 selection</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>MMS</name><description>Master mode selection</description><bitOffset>4</bitOffset><bitWidth>3</bitWidth></field><field><name>CCDS</name><description>Capture/compare DMA selection</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>CCUS</name><description>Capture/compare control update selection</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>CCPC</name><description>Capture/compare preloaded control</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>SMCR</name><displayName>SMCR</displayName><description>slave mode control register</description><addressOffset>0x8</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x0000</resetValue><fields><field><name>ETP</name><description>External trigger polarity</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>ECE</name><description>External clock enable</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>ETPS</name><description>External trigger prescaler</description><bitOffset>12</bitOffset><bitWidth>2</bitWidth></field><field><name>ETF</name><description>External trigger filter</description><bitOffset>8</bitOffset><bitWidth>4</bitWidth></field><field><name>MSM</name><description>Master/Slave mode</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>TS</name><description>Trigger selection</description><bitOffset>4</bitOffset><bitWidth>3</bitWidth></field><field><name>SMS</name><description>Slave mode selection</description><bitOffset>0</bitOffset><bitWidth>3</bitWidth></field></fields></register><register><name>DIER</name><displayName>DIER</displayName><description>DMA/Interrupt enable register</description><addressOffset>0xC</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x0000</resetValue><fields><field><name>TDE</name><description>Trigger DMA request enable</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>COMDE</name><description>Reserved</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>CC4DE</name><description>Capture/Compare 4 DMA request enable</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>CC3DE</name><description>Capture/Compare 3 DMA request enable</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>CC2DE</name><description>Capture/Compare 2 DMA request enable</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>CC1DE</name><description>Capture/Compare 1 DMA request enable</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>UDE</name><description>Update DMA request enable</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>BIE</name><description>Break interrupt enable</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>TIE</name><description>Trigger interrupt enable</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>COMIE</name><description>COM interrupt enable</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>CC4IE</name><description>Capture/Compare 4 interrupt enable</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>CC3IE</name><description>Capture/Compare 3 interrupt enable</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>CC2IE</name><description>Capture/Compare 2 interrupt enable</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>CC1IE</name><description>Capture/Compare 1 interrupt enable</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>UIE</name><description>Update interrupt enable</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>SR</name><displayName>SR</displayName><description>status register</description><addressOffset>0x10</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x0000</resetValue><fields><field><name>CC4OF</name><description>Capture/Compare 4 overcapture flag</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>CC3OF</name><description>Capture/Compare 3 overcapture flag</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>CC2OF</name><description>Capture/compare 2 overcapture flag</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>CC1OF</name><description>Capture/Compare 1 overcapture flag</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>BIF</name><description>Break interrupt flag</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>TIF</name><description>Trigger interrupt flag</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>COMIF</name><description>COM interrupt flag</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>CC4IF</name><description>Capture/Compare 4 interrupt flag</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>CC3IF</name><description>Capture/Compare 3 interrupt flag</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>CC2IF</name><description>Capture/Compare 2 interrupt flag</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>CC1IF</name><description>Capture/compare 1 interrupt flag</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>UIF</name><description>Update interrupt flag</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>EGR</name><displayName>EGR</displayName><description>event generation register</description><addressOffset>0x14</addressOffset><size>0x20</size><access>write-only</access><resetValue>0x0000</resetValue><fields><field><name>BG</name><description>Break generation</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>TG</name><description>Trigger generation</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>COMG</name><description>Capture/Compare control update generation</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>CC4G</name><description>Capture/compare 4 generation</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>CC3G</name><description>Capture/compare 3 generation</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>CC2G</name><description>Capture/compare 2 generation</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>CC1G</name><description>Capture/compare 1 generation</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>UG</name><description>Update generation</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>CCMR1_Output</name><displayName>CCMR1_Output</displayName><description>capture/compare mode register (output mode)</description><addressOffset>0x18</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>OC2CE</name><description>Output Compare 2 clear enable</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>OC2M</name><description>Output Compare 2 mode</description><bitOffset>12</bitOffset><bitWidth>3</bitWidth></field><field><name>OC2PE</name><description>Output Compare 2 preload enable</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>OC2FE</name><description>Output Compare 2 fast enable</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>CC2S</name><description>Capture/Compare 2 selection</description><bitOffset>8</bitOffset><bitWidth>2</bitWidth></field><field><name>OC1CE</name><description>Output Compare 1 clear enable</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>OC1M</name><description>Output Compare 1 mode</description><bitOffset>4</bitOffset><bitWidth>3</bitWidth></field><field><name>OC1PE</name><description>Output Compare 1 preload enable</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>OC1FE</name><description>Output Compare 1 fast enable</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>CC1S</name><description>Capture/Compare 1 selection</description><bitOffset>0</bitOffset><bitWidth>2</bitWidth></field></fields></register><register><name>CCMR1_Input</name><displayName>CCMR1_Input</displayName><description>capture/compare mode register 1 (input mode)</description><alternateRegister>CCMR1_Output</alternateRegister><addressOffset>0x18</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>IC2F</name><description>Input capture 2 filter</description><bitOffset>12</bitOffset><bitWidth>4</bitWidth></field><field><name>IC2PCS</name><description>Input capture 2 prescaler</description><bitOffset>10</bitOffset><bitWidth>2</bitWidth></field><field><name>CC2S</name><description>Capture/Compare 2 selection</description><bitOffset>8</bitOffset><bitWidth>2</bitWidth></field><field><name>IC1F</name><description>Input capture 1 filter</description><bitOffset>4</bitOffset><bitWidth>4</bitWidth></field><field><name>IC1PCS</name><description>Input capture 1 prescaler</description><bitOffset>2</bitOffset><bitWidth>2</bitWidth></field><field><name>CC1S</name><description>Capture/Compare 1 selection</description><bitOffset>0</bitOffset><bitWidth>2</bitWidth></field></fields></register><register><name>CCMR2_Output</name><displayName>CCMR2_Output</displayName><description>capture/compare mode register (output mode)</description><addressOffset>0x1C</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>OC4CE</name><description>Output compare 4 clear enable</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>OC4M</name><description>Output compare 4 mode</description><bitOffset>12</bitOffset><bitWidth>3</bitWidth></field><field><name>OC4PE</name><description>Output compare 4 preload enable</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>OC4FE</name><description>Output compare 4 fast enable</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>CC4S</name><description>Capture/Compare 4 selection</description><bitOffset>8</bitOffset><bitWidth>2</bitWidth></field><field><name>OC3CE</name><description>Output compare 3 clear enable</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>OC3M</name><description>Output compare 3 mode</description><bitOffset>4</bitOffset><bitWidth>3</bitWidth></field><field><name>OC3PE</name><description>Output compare 3 preload enable</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>OC3FE</name><description>Output compare 3 fast enable</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>CC3S</name><description>Capture/Compare 3 selection</description><bitOffset>0</bitOffset><bitWidth>2</bitWidth></field></fields></register><register><name>CCMR2_Input</name><displayName>CCMR2_Input</displayName><description>capture/compare mode register 2 (input mode)</description><alternateRegister>CCMR2_Output</alternateRegister><addressOffset>0x1C</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>IC4F</name><description>Input capture 4 filter</description><bitOffset>12</bitOffset><bitWidth>4</bitWidth></field><field><name>IC4PSC</name><description>Input capture 4 prescaler</description><bitOffset>10</bitOffset><bitWidth>2</bitWidth></field><field><name>CC4S</name><description>Capture/Compare 4 selection</description><bitOffset>8</bitOffset><bitWidth>2</bitWidth></field><field><name>IC3F</name><description>Input capture 3 filter</description><bitOffset>4</bitOffset><bitWidth>4</bitWidth></field><field><name>IC3PSC</name><description>Input capture 3 prescaler</description><bitOffset>2</bitOffset><bitWidth>2</bitWidth></field><field><name>CC3S</name><description>Capture/compare 3 selection</description><bitOffset>0</bitOffset><bitWidth>2</bitWidth></field></fields></register><register><name>CCER</name><displayName>CCER</displayName><description>capture/compare enable register</description><addressOffset>0x20</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x0000</resetValue><fields><field><name>CC4P</name><description>Capture/Compare 3 output Polarity</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>CC4E</name><description>Capture/Compare 4 output enable</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>CC3NP</name><description>Capture/Compare 3 output Polarity</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>CC3NE</name><description>Capture/Compare 3 complementary output enable</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>CC3P</name><description>Capture/Compare 3 output Polarity</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>CC3E</name><description>Capture/Compare 3 output enable</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>CC2NP</name><description>Capture/Compare 2 output Polarity</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>CC2NE</name><description>Capture/Compare 2 complementary output enable</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>CC2P</name><description>Capture/Compare 2 output Polarity</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>CC2E</name><description>Capture/Compare 2 output enable</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>CC1NP</name><description>Capture/Compare 1 output Polarity</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>CC1NE</name><description>Capture/Compare 1 complementary output enable</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>CC1P</name><description>Capture/Compare 1 output Polarity</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>CC1E</name><description>Capture/Compare 1 output enable</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>CNT</name><displayName>CNT</displayName><description>counter</description><addressOffset>0x24</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>CNT</name><description>counter value</description><bitOffset>0</bitOffset><bitWidth>16</bitWidth></field></fields></register><register><name>PSC</name><displayName>PSC</displayName><description>prescaler</description><addressOffset>0x28</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x0000</resetValue><fields><field><name>PSC</name><description>Prescaler value</description><bitOffset>0</bitOffset><bitWidth>16</bitWidth></field></fields></register><register><name>ARR</name><displayName>ARR</displayName><description>auto-reload register</description><addressOffset>0x2C</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>ARR</name><description>Auto-reload value</description><bitOffset>0</bitOffset><bitWidth>16</bitWidth></field></fields></register><register><name>RCR</name><displayName>RCR</displayName><description>repetition counter register</description><addressOffset>0x30</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x0000</resetValue><fields><field><name>REP</name><description>Repetition counter value</description><bitOffset>0</bitOffset><bitWidth>8</bitWidth></field></fields></register><register><name>CCR1</name><displayName>CCR1</displayName><description>capture/compare register 1</description><addressOffset>0x34</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>CCR1</name><description>Capture/Compare 1 value</description><bitOffset>0</bitOffset><bitWidth>16</bitWidth></field></fields></register><register><name>CCR2</name><displayName>CCR2</displayName><description>capture/compare register 2</description><addressOffset>0x38</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>CCR2</name><description>Capture/Compare 2 value</description><bitOffset>0</bitOffset><bitWidth>16</bitWidth></field></fields></register><register><name>CCR3</name><displayName>CCR3</displayName><description>capture/compare register 3</description><addressOffset>0x3C</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>CCR3</name><description>Capture/Compare 3 value</description><bitOffset>0</bitOffset><bitWidth>16</bitWidth></field></fields></register><register><name>CCR4</name><displayName>CCR4</displayName><description>capture/compare register 4</description><addressOffset>0x40</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>CCR4</name><description>Capture/Compare 3 value</description><bitOffset>0</bitOffset><bitWidth>16</bitWidth></field></fields></register><register><name>BDTR</name><displayName>BDTR</displayName><description>break and dead-time register</description><addressOffset>0x44</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x0000</resetValue><fields><field><name>MOE</name><description>Main output enable</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>AOE</name><description>Automatic output enable</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>BKP</name><description>Break polarity</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>BKE</name><description>Break enable</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>OSSR</name><description>Off-state selection for Run mode</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>OSSI</name><description>Off-state selection for Idle mode</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>LOCK</name><description>Lock configuration</description><bitOffset>8</bitOffset><bitWidth>2</bitWidth></field><field><name>DTG</name><description>Dead-time generator setup</description><bitOffset>0</bitOffset><bitWidth>8</bitWidth></field></fields></register><register><name>DCR</name><displayName>DCR</displayName><description>DMA control register</description><addressOffset>0x48</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x0000</resetValue><fields><field><name>DBL</name><description>DMA burst length</description><bitOffset>8</bitOffset><bitWidth>5</bitWidth></field><field><name>DBA</name><description>DMA base address</description><bitOffset>0</bitOffset><bitWidth>5</bitWidth></field></fields></register><register><name>DMAR</name><displayName>DMAR</displayName><description>DMA address for full transfer</description><addressOffset>0x4C</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x0000</resetValue><fields><field><name>DMAB</name><description>DMA register for burst accesses</description><bitOffset>0</bitOffset><bitWidth>16</bitWidth></field></fields></register></registers></peripheral><peripheral><name>TIM2</name><description>General-purpose-timers</description><groupName>TIM</groupName><baseAddress>0x40000000</baseAddress><addressBlock><offset>0x0</offset><size>0x400</size><usage>registers</usage></addressBlock><interrupt><name>TIM2</name><description>TIM2 global interrupt</description><value>15</value></interrupt><registers><register><name>CR1</name><displayName>CR1</displayName><description>control register 1</description><addressOffset>0x0</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x0000</resetValue><fields><field><name>CKD</name><description>Clock division</description><bitOffset>8</bitOffset><bitWidth>2</bitWidth></field><field><name>ARPE</name><description>Auto-reload preload enable</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>CMS</name><description>Center-aligned mode selection</description><bitOffset>5</bitOffset><bitWidth>2</bitWidth></field><field><name>DIR</name><description>Direction</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>OPM</name><description>One-pulse mode</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>URS</name><description>Update request source</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>UDIS</name><description>Update disable</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>CEN</name><description>Counter enable</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>CR2</name><displayName>CR2</displayName><description>control register 2</description><addressOffset>0x4</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x0000</resetValue><fields><field><name>TI1S</name><description>TI1 selection</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>MMS</name><description>Master mode selection</description><bitOffset>4</bitOffset><bitWidth>3</bitWidth></field><field><name>CCDS</name><description>Capture/compare DMA selection</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>SMCR</name><displayName>SMCR</displayName><description>slave mode control register</description><addressOffset>0x8</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x0000</resetValue><fields><field><name>ETP</name><description>External trigger polarity</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>ECE</name><description>External clock enable</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>ETPS</name><description>External trigger prescaler</description><bitOffset>12</bitOffset><bitWidth>2</bitWidth></field><field><name>ETF</name><description>External trigger filter</description><bitOffset>8</bitOffset><bitWidth>4</bitWidth></field><field><name>MSM</name><description>Master/Slave mode</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>TS</name><description>Trigger selection</description><bitOffset>4</bitOffset><bitWidth>3</bitWidth></field><field><name>SMS</name><description>Slave mode selection</description><bitOffset>0</bitOffset><bitWidth>3</bitWidth></field></fields></register><register><name>DIER</name><displayName>DIER</displayName><description>DMA/Interrupt enable register</description><addressOffset>0xC</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x0000</resetValue><fields><field><name>TDE</name><description>Trigger DMA request enable</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>COMDE</name><description>Reserved</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>CC4DE</name><description>Capture/Compare 4 DMA request enable</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>CC3DE</name><description>Capture/Compare 3 DMA request enable</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>CC2DE</name><description>Capture/Compare 2 DMA request enable</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>CC1DE</name><description>Capture/Compare 1 DMA request enable</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>UDE</name><description>Update DMA request enable</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>TIE</name><description>Trigger interrupt enable</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>CC4IE</name><description>Capture/Compare 4 interrupt enable</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>CC3IE</name><description>Capture/Compare 3 interrupt enable</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>CC2IE</name><description>Capture/Compare 2 interrupt enable</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>CC1IE</name><description>Capture/Compare 1 interrupt enable</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>UIE</name><description>Update interrupt enable</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>SR</name><displayName>SR</displayName><description>status register</description><addressOffset>0x10</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x0000</resetValue><fields><field><name>CC4OF</name><description>Capture/Compare 4 overcapture flag</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>CC3OF</name><description>Capture/Compare 3 overcapture flag</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>CC2OF</name><description>Capture/compare 2 overcapture flag</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>CC1OF</name><description>Capture/Compare 1 overcapture flag</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>TIF</name><description>Trigger interrupt flag</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>CC4IF</name><description>Capture/Compare 4 interrupt flag</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>CC3IF</name><description>Capture/Compare 3 interrupt flag</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>CC2IF</name><description>Capture/Compare 2 interrupt flag</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>CC1IF</name><description>Capture/compare 1 interrupt flag</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>UIF</name><description>Update interrupt flag</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>EGR</name><displayName>EGR</displayName><description>event generation register</description><addressOffset>0x14</addressOffset><size>0x20</size><access>write-only</access><resetValue>0x0000</resetValue><fields><field><name>TG</name><description>Trigger generation</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>CC4G</name><description>Capture/compare 4 generation</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>CC3G</name><description>Capture/compare 3 generation</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>CC2G</name><description>Capture/compare 2 generation</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>CC1G</name><description>Capture/compare 1 generation</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>UG</name><description>Update generation</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>CCMR1_Output</name><displayName>CCMR1_Output</displayName><description>capture/compare mode register 1 (output mode)</description><addressOffset>0x18</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>OC2CE</name><description>Output compare 2 clear enable</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>OC2M</name><description>Output compare 2 mode</description><bitOffset>12</bitOffset><bitWidth>3</bitWidth></field><field><name>OC2PE</name><description>Output compare 2 preload enable</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>OC2FE</name><description>Output compare 2 fast enable</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>CC2S</name><description>Capture/Compare 2 selection</description><bitOffset>8</bitOffset><bitWidth>2</bitWidth></field><field><name>OC1CE</name><description>Output compare 1 clear enable</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>OC1M</name><description>Output compare 1 mode</description><bitOffset>4</bitOffset><bitWidth>3</bitWidth></field><field><name>OC1PE</name><description>Output compare 1 preload enable</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>OC1FE</name><description>Output compare 1 fast enable</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>CC1S</name><description>Capture/Compare 1 selection</description><bitOffset>0</bitOffset><bitWidth>2</bitWidth></field></fields></register><register><name>CCMR1_Input</name><displayName>CCMR1_Input</displayName><description>capture/compare mode register 1 (input mode)</description><alternateRegister>CCMR1_Output</alternateRegister><addressOffset>0x18</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>IC2F</name><description>Input capture 2 filter</description><bitOffset>12</bitOffset><bitWidth>4</bitWidth></field><field><name>IC2PSC</name><description>Input capture 2 prescaler</description><bitOffset>10</bitOffset><bitWidth>2</bitWidth></field><field><name>CC2S</name><description>Capture/compare 2 selection</description><bitOffset>8</bitOffset><bitWidth>2</bitWidth></field><field><name>IC1F</name><description>Input capture 1 filter</description><bitOffset>4</bitOffset><bitWidth>4</bitWidth></field><field><name>IC1PSC</name><description>Input capture 1 prescaler</description><bitOffset>2</bitOffset><bitWidth>2</bitWidth></field><field><name>CC1S</name><description>Capture/Compare 1 selection</description><bitOffset>0</bitOffset><bitWidth>2</bitWidth></field></fields></register><register><name>CCMR2_Output</name><displayName>CCMR2_Output</displayName><description>capture/compare mode register 2 (output mode)</description><addressOffset>0x1C</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>OC4CE</name><description>Output compare 4 clear enable</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>OC4M</name><description>Output compare 4 mode</description><bitOffset>12</bitOffset><bitWidth>3</bitWidth></field><field><name>OC4PE</name><description>Output compare 4 preload enable</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>OC4FE</name><description>Output compare 4 fast enable</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>CC4S</name><description>Capture/Compare 4 selection</description><bitOffset>8</bitOffset><bitWidth>2</bitWidth></field><field><name>OC3CE</name><description>Output compare 3 clear enable</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>OC3M</name><description>Output compare 3 mode</description><bitOffset>4</bitOffset><bitWidth>3</bitWidth></field><field><name>OC3PE</name><description>Output compare 3 preload enable</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>OC3FE</name><description>Output compare 3 fast enable</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>CC3S</name><description>Capture/Compare 3 selection</description><bitOffset>0</bitOffset><bitWidth>2</bitWidth></field></fields></register><register><name>CCMR2_Input</name><displayName>CCMR2_Input</displayName><description>capture/compare mode register 2 (input mode)</description><alternateRegister>CCMR2_Output</alternateRegister><addressOffset>0x1C</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>IC4F</name><description>Input capture 4 filter</description><bitOffset>12</bitOffset><bitWidth>4</bitWidth></field><field><name>IC4PSC</name><description>Input capture 4 prescaler</description><bitOffset>10</bitOffset><bitWidth>2</bitWidth></field><field><name>CC4S</name><description>Capture/Compare 4 selection</description><bitOffset>8</bitOffset><bitWidth>2</bitWidth></field><field><name>IC3F</name><description>Input capture 3 filter</description><bitOffset>4</bitOffset><bitWidth>4</bitWidth></field><field><name>IC3PSC</name><description>Input capture 3 prescaler</description><bitOffset>2</bitOffset><bitWidth>2</bitWidth></field><field><name>CC3S</name><description>Capture/Compare 3 selection</description><bitOffset>0</bitOffset><bitWidth>2</bitWidth></field></fields></register><register><name>CCER</name><displayName>CCER</displayName><description>capture/compare enable register</description><addressOffset>0x20</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x0000</resetValue><fields><field><name>CC4NP</name><description>Capture/Compare 4 output Polarity</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>CC4P</name><description>Capture/Compare 3 output Polarity</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>CC4E</name><description>Capture/Compare 4 output enable</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>CC3NP</name><description>Capture/Compare 3 output Polarity</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>CC3P</name><description>Capture/Compare 3 output Polarity</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>CC3E</name><description>Capture/Compare 3 output enable</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>CC2NP</name><description>Capture/Compare 2 output Polarity</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>CC2P</name><description>Capture/Compare 2 output Polarity</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>CC2E</name><description>Capture/Compare 2 output enable</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>CC1NP</name><description>Capture/Compare 1 output Polarity</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>CC1P</name><description>Capture/Compare 1 output Polarity</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>CC1E</name><description>Capture/Compare 1 output enable</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>CNT</name><displayName>CNT</displayName><description>counter</description><addressOffset>0x24</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>CNT_H</name><description>High counter value (TIM2 only)</description><bitOffset>16</bitOffset><bitWidth>16</bitWidth></field><field><name>CNT_L</name><description>Low counter value</description><bitOffset>0</bitOffset><bitWidth>16</bitWidth></field></fields></register><register><name>PSC</name><displayName>PSC</displayName><description>prescaler</description><addressOffset>0x28</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x0000</resetValue><fields><field><name>PSC</name><description>Prescaler value</description><bitOffset>0</bitOffset><bitWidth>16</bitWidth></field></fields></register><register><name>ARR</name><displayName>ARR</displayName><description>auto-reload register</description><addressOffset>0x2C</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>ARR_H</name><description>High Auto-reload value (TIM2 only)</description><bitOffset>16</bitOffset><bitWidth>16</bitWidth></field><field><name>ARR_L</name><description>Low Auto-reload value</description><bitOffset>0</bitOffset><bitWidth>16</bitWidth></field></fields></register><register><name>CCR1</name><displayName>CCR1</displayName><description>capture/compare register 1</description><addressOffset>0x34</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>CCR1_H</name><description>High Capture/Compare 1 value (TIM2 only)</description><bitOffset>16</bitOffset><bitWidth>16</bitWidth></field><field><name>CCR1_L</name><description>Low Capture/Compare 1 value</description><bitOffset>0</bitOffset><bitWidth>16</bitWidth></field></fields></register><register><name>CCR2</name><displayName>CCR2</displayName><description>capture/compare register 2</description><addressOffset>0x38</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>CCR2_H</name><description>High Capture/Compare 2 value (TIM2 only)</description><bitOffset>16</bitOffset><bitWidth>16</bitWidth></field><field><name>CCR2_L</name><description>Low Capture/Compare 2 value</description><bitOffset>0</bitOffset><bitWidth>16</bitWidth></field></fields></register><register><name>CCR3</name><displayName>CCR3</displayName><description>capture/compare register 3</description><addressOffset>0x3C</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>CCR3_H</name><description>High Capture/Compare value (TIM2 only)</description><bitOffset>16</bitOffset><bitWidth>16</bitWidth></field><field><name>CCR3_L</name><description>Low Capture/Compare value</description><bitOffset>0</bitOffset><bitWidth>16</bitWidth></field></fields></register><register><name>CCR4</name><displayName>CCR4</displayName><description>capture/compare register 4</description><addressOffset>0x40</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>CCR4_H</name><description>High Capture/Compare value (TIM2 only)</description><bitOffset>16</bitOffset><bitWidth>16</bitWidth></field><field><name>CCR4_L</name><description>Low Capture/Compare value</description><bitOffset>0</bitOffset><bitWidth>16</bitWidth></field></fields></register><register><name>DCR</name><displayName>DCR</displayName><description>DMA control register</description><addressOffset>0x48</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x0000</resetValue><fields><field><name>DBL</name><description>DMA burst length</description><bitOffset>8</bitOffset><bitWidth>5</bitWidth></field><field><name>DBA</name><description>DMA base address</description><bitOffset>0</bitOffset><bitWidth>5</bitWidth></field></fields></register><register><name>DMAR</name><displayName>DMAR</displayName><description>DMA address for full transfer</description><addressOffset>0x4C</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x0000</resetValue><fields><field><name>DMAR</name><description>DMA register for burst accesses</description><bitOffset>0</bitOffset><bitWidth>16</bitWidth></field></fields></register></registers></peripheral><peripheral derivedFrom="TIM2"><name>TIM3</name><baseAddress>0x40000400</baseAddress><interrupt><name>TIM3</name><description>TIM3 global interrupt</description><value>16</value></interrupt></peripheral><peripheral><name>TIM14</name><description>General-purpose-timers</description><groupName>TIM</groupName><baseAddress>0x40002000</baseAddress><addressBlock><offset>0x0</offset><size>0x400</size><usage>registers</usage></addressBlock><interrupt><name>TIM14</name><description>TIM14 global interrupt</description><value>19</value></interrupt><registers><register><name>CR1</name><displayName>CR1</displayName><description>control register 1</description><addressOffset>0x0</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x0000</resetValue><fields><field><name>CKD</name><description>Clock division</description><bitOffset>8</bitOffset><bitWidth>2</bitWidth></field><field><name>ARPE</name><description>Auto-reload preload enable</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>URS</name><description>Update request source</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>UDIS</name><description>Update disable</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>CEN</name><description>Counter enable</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>DIER</name><displayName>DIER</displayName><description>DMA/Interrupt enable register</description><addressOffset>0xC</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x0000</resetValue><fields><field><name>CC1IE</name><description>Capture/Compare 1 interrupt enable</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>UIE</name><description>Update interrupt enable</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>SR</name><displayName>SR</displayName><description>status register</description><addressOffset>0x10</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x0000</resetValue><fields><field><name>CC1OF</name><description>Capture/Compare 1 overcapture flag</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>CC1IF</name><description>Capture/compare 1 interrupt flag</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>UIF</name><description>Update interrupt flag</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>EGR</name><displayName>EGR</displayName><description>event generation register</description><addressOffset>0x14</addressOffset><size>0x20</size><access>write-only</access><resetValue>0x0000</resetValue><fields><field><name>CC1G</name><description>Capture/compare 1 generation</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>UG</name><description>Update generation</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>CCMR1_Output</name><displayName>CCMR1_Output</displayName><description>capture/compare mode register (output mode)</description><addressOffset>0x18</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>CC1S</name><description>Capture/Compare 1 selection</description><bitOffset>0</bitOffset><bitWidth>2</bitWidth></field><field><name>OC1FE</name><description>Output compare 1 fast enable</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>OC1PE</name><description>Output Compare 1 preload enable</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>OC1M</name><description>Output Compare 1 mode</description><bitOffset>4</bitOffset><bitWidth>3</bitWidth></field></fields></register><register><name>CCMR1_Input</name><displayName>CCMR1_Input</displayName><description>capture/compare mode register (input mode)</description><alternateRegister>CCMR1_Output</alternateRegister><addressOffset>0x18</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>IC1F</name><description>Input capture 1 filter</description><bitOffset>4</bitOffset><bitWidth>4</bitWidth></field><field><name>IC1PSC</name><description>Input capture 1 prescaler</description><bitOffset>2</bitOffset><bitWidth>2</bitWidth></field><field><name>CC1S</name><description>Capture/Compare 1 selection</description><bitOffset>0</bitOffset><bitWidth>2</bitWidth></field></fields></register><register><name>CCER</name><displayName>CCER</displayName><description>capture/compare enable register</description><addressOffset>0x20</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x0000</resetValue><fields><field><name>CC1NP</name><description>Capture/Compare 1 output Polarity</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>CC1P</name><description>Capture/Compare 1 output Polarity</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>CC1E</name><description>Capture/Compare 1 output enable</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>CNT</name><displayName>CNT</displayName><description>counter</description><addressOffset>0x24</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>CNT</name><description>counter value</description><bitOffset>0</bitOffset><bitWidth>16</bitWidth></field></fields></register><register><name>PSC</name><displayName>PSC</displayName><description>prescaler</description><addressOffset>0x28</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x0000</resetValue><fields><field><name>PSC</name><description>Prescaler value</description><bitOffset>0</bitOffset><bitWidth>16</bitWidth></field></fields></register><register><name>ARR</name><displayName>ARR</displayName><description>auto-reload register</description><addressOffset>0x2C</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>ARR</name><description>Auto-reload value</description><bitOffset>0</bitOffset><bitWidth>16</bitWidth></field></fields></register><register><name>CCR1</name><displayName>CCR1</displayName><description>capture/compare register 1</description><addressOffset>0x34</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>CCR1</name><description>Capture/Compare 1 value</description><bitOffset>0</bitOffset><bitWidth>16</bitWidth></field></fields></register><register><name>OR</name><displayName>OR</displayName><description>option register</description><addressOffset>0x50</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>RMP</name><description>Timer input 1 remap</description><bitOffset>0</bitOffset><bitWidth>2</bitWidth></field></fields></register></registers></peripheral><peripheral><name>EXTI</name><description>External interrupt/event controller</description><groupName>EXTI</groupName><baseAddress>0x40010400</baseAddress><addressBlock><offset>0x0</offset><size>0x400</size><usage>registers</usage></addressBlock><interrupt><name>EXTI0_1</name><description>EXTI Line[1:0] interrupts</description><value>5</value></interrupt><interrupt><name>EXTI2_3</name><description>EXTI Line[3:2] interrupts</description><value>6</value></interrupt><interrupt><name>EXTI4_15</name><description>EXTI Line15 and EXTI4 interrupts</description><value>7</value></interrupt><registers><register><name>IMR</name><displayName>IMR</displayName><description>Interrupt mask register (EXTI_IMR)</description><addressOffset>0x0</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x0F940000</resetValue><fields><field><name>MR0</name><description>Interrupt Mask on line 0</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field><field><name>MR1</name><description>Interrupt Mask on line 1</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>MR2</name><description>Interrupt Mask on line 2</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>MR3</name><description>Interrupt Mask on line 3</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>MR4</name><description>Interrupt Mask on line 4</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>MR5</name><description>Interrupt Mask on line 5</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>MR6</name><description>Interrupt Mask on line 6</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>MR7</name><description>Interrupt Mask on line 7</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>MR8</name><description>Interrupt Mask on line 8</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>MR9</name><description>Interrupt Mask on line 9</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>MR10</name><description>Interrupt Mask on line 10</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>MR11</name><description>Interrupt Mask on line 11</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>MR12</name><description>Interrupt Mask on line 12</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>MR13</name><description>Interrupt Mask on line 13</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>MR14</name><description>Interrupt Mask on line 14</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>MR15</name><description>Interrupt Mask on line 15</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>MR16</name><description>Interrupt Mask on line 16</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth></field><field><name>MR17</name><description>Interrupt Mask on line 17</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth></field><field><name>MR18</name><description>Interrupt Mask on line 18</description><bitOffset>18</bitOffset><bitWidth>1</bitWidth></field><field><name>MR19</name><description>Interrupt Mask on line 19</description><bitOffset>19</bitOffset><bitWidth>1</bitWidth></field><field><name>MR20</name><description>Interrupt Mask on line 20</description><bitOffset>20</bitOffset><bitWidth>1</bitWidth></field><field><name>MR21</name><description>Interrupt Mask on line 21</description><bitOffset>21</bitOffset><bitWidth>1</bitWidth></field><field><name>MR22</name><description>Interrupt Mask on line 22</description><bitOffset>22</bitOffset><bitWidth>1</bitWidth></field><field><name>MR23</name><description>Interrupt Mask on line 23</description><bitOffset>23</bitOffset><bitWidth>1</bitWidth></field><field><name>MR24</name><description>Interrupt Mask on line 24</description><bitOffset>24</bitOffset><bitWidth>1</bitWidth></field><field><name>MR25</name><description>Interrupt Mask on line 25</description><bitOffset>25</bitOffset><bitWidth>1</bitWidth></field><field><name>MR26</name><description>Interrupt Mask on line 26</description><bitOffset>26</bitOffset><bitWidth>1</bitWidth></field><field><name>MR27</name><description>Interrupt Mask on line 27</description><bitOffset>27</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>EMR</name><displayName>EMR</displayName><description>Event mask register (EXTI_EMR)</description><addressOffset>0x4</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>MR0</name><description>Event Mask on line 0</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field><field><name>MR1</name><description>Event Mask on line 1</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>MR2</name><description>Event Mask on line 2</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>MR3</name><description>Event Mask on line 3</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>MR4</name><description>Event Mask on line 4</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>MR5</name><description>Event Mask on line 5</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>MR6</name><description>Event Mask on line 6</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>MR7</name><description>Event Mask on line 7</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>MR8</name><description>Event Mask on line 8</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>MR9</name><description>Event Mask on line 9</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>MR10</name><description>Event Mask on line 10</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>MR11</name><description>Event Mask on line 11</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>MR12</name><description>Event Mask on line 12</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>MR13</name><description>Event Mask on line 13</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>MR14</name><description>Event Mask on line 14</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>MR15</name><description>Event Mask on line 15</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>MR16</name><description>Event Mask on line 16</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth></field><field><name>MR17</name><description>Event Mask on line 17</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth></field><field><name>MR18</name><description>Event Mask on line 18</description><bitOffset>18</bitOffset><bitWidth>1</bitWidth></field><field><name>MR19</name><description>Event Mask on line 19</description><bitOffset>19</bitOffset><bitWidth>1</bitWidth></field><field><name>MR20</name><description>Event Mask on line 20</description><bitOffset>20</bitOffset><bitWidth>1</bitWidth></field><field><name>MR21</name><description>Event Mask on line 21</description><bitOffset>21</bitOffset><bitWidth>1</bitWidth></field><field><name>MR22</name><description>Event Mask on line 22</description><bitOffset>22</bitOffset><bitWidth>1</bitWidth></field><field><name>MR23</name><description>Event Mask on line 23</description><bitOffset>23</bitOffset><bitWidth>1</bitWidth></field><field><name>MR24</name><description>Event Mask on line 24</description><bitOffset>24</bitOffset><bitWidth>1</bitWidth></field><field><name>MR25</name><description>Event Mask on line 25</description><bitOffset>25</bitOffset><bitWidth>1</bitWidth></field><field><name>MR26</name><description>Event Mask on line 26</description><bitOffset>26</bitOffset><bitWidth>1</bitWidth></field><field><name>MR27</name><description>Event Mask on line 27</description><bitOffset>27</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>RTSR</name><displayName>RTSR</displayName><description>Rising Trigger selection register (EXTI_RTSR)</description><addressOffset>0x8</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>TR0</name><description>Rising trigger event configuration of line 0</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field><field><name>TR1</name><description>Rising trigger event configuration of line 1</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>TR2</name><description>Rising trigger event configuration of line 2</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>TR3</name><description>Rising trigger event configuration of line 3</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>TR4</name><description>Rising trigger event configuration of line 4</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>TR5</name><description>Rising trigger event configuration of line 5</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>TR6</name><description>Rising trigger event configuration of line 6</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>TR7</name><description>Rising trigger event configuration of line 7</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>TR8</name><description>Rising trigger event configuration of line 8</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>TR9</name><description>Rising trigger event configuration of line 9</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>TR10</name><description>Rising trigger event configuration of line 10</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>TR11</name><description>Rising trigger event configuration of line 11</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>TR12</name><description>Rising trigger event configuration of line 12</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>TR13</name><description>Rising trigger event configuration of line 13</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>TR14</name><description>Rising trigger event configuration of line 14</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>TR15</name><description>Rising trigger event configuration of line 15</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>TR16</name><description>Rising trigger event configuration of line 16</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth></field><field><name>TR17</name><description>Rising trigger event configuration of line 17</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth></field><field><name>TR19</name><description>Rising trigger event configuration of line 19</description><bitOffset>19</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>FTSR</name><displayName>FTSR</displayName><description>Falling Trigger selection register (EXTI_FTSR)</description><addressOffset>0xC</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>TR0</name><description>Falling trigger event configuration of line 0</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field><field><name>TR1</name><description>Falling trigger event configuration of line 1</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>TR2</name><description>Falling trigger event configuration of line 2</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>TR3</name><description>Falling trigger event configuration of line 3</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>TR4</name><description>Falling trigger event configuration of line 4</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>TR5</name><description>Falling trigger event configuration of line 5</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>TR6</name><description>Falling trigger event configuration of line 6</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>TR7</name><description>Falling trigger event configuration of line 7</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>TR8</name><description>Falling trigger event configuration of line 8</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>TR9</name><description>Falling trigger event configuration of line 9</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>TR10</name><description>Falling trigger event configuration of line 10</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>TR11</name><description>Falling trigger event configuration of line 11</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>TR12</name><description>Falling trigger event configuration of line 12</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>TR13</name><description>Falling trigger event configuration of line 13</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>TR14</name><description>Falling trigger event configuration of line 14</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>TR15</name><description>Falling trigger event configuration of line 15</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>TR16</name><description>Falling trigger event configuration of line 16</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth></field><field><name>TR17</name><description>Falling trigger event configuration of line 17</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth></field><field><name>TR19</name><description>Falling trigger event configuration of line 19</description><bitOffset>19</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>SWIER</name><displayName>SWIER</displayName><description>Software interrupt event register (EXTI_SWIER)</description><addressOffset>0x10</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>SWIER0</name><description>Software Interrupt on line 0</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field><field><name>SWIER1</name><description>Software Interrupt on line 1</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>SWIER2</name><description>Software Interrupt on line 2</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>SWIER3</name><description>Software Interrupt on line 3</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>SWIER4</name><description>Software Interrupt on line 4</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>SWIER5</name><description>Software Interrupt on line 5</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>SWIER6</name><description>Software Interrupt on line 6</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>SWIER7</name><description>Software Interrupt on line 7</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>SWIER8</name><description>Software Interrupt on line 8</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>SWIER9</name><description>Software Interrupt on line 9</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>SWIER10</name><description>Software Interrupt on line 10</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>SWIER11</name><description>Software Interrupt on line 11</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>SWIER12</name><description>Software Interrupt on line 12</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>SWIER13</name><description>Software Interrupt on line 13</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>SWIER14</name><description>Software Interrupt on line 14</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>SWIER15</name><description>Software Interrupt on line 15</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>SWIER16</name><description>Software Interrupt on line 16</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth></field><field><name>SWIER17</name><description>Software Interrupt on line 17</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth></field><field><name>SWIER19</name><description>Software Interrupt on line 19</description><bitOffset>19</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>PR</name><displayName>PR</displayName><description>Pending register (EXTI_PR)</description><addressOffset>0x14</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>PR0</name><description>Pending bit 0</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field><field><name>PR1</name><description>Pending bit 1</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>PR2</name><description>Pending bit 2</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>PR3</name><description>Pending bit 3</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>PR4</name><description>Pending bit 4</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>PR5</name><description>Pending bit 5</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>PR6</name><description>Pending bit 6</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>PR7</name><description>Pending bit 7</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>PR8</name><description>Pending bit 8</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>PR9</name><description>Pending bit 9</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>PR10</name><description>Pending bit 10</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>PR11</name><description>Pending bit 11</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>PR12</name><description>Pending bit 12</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>PR13</name><description>Pending bit 13</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>PR14</name><description>Pending bit 14</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>PR15</name><description>Pending bit 15</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>PR16</name><description>Pending bit 16</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth></field><field><name>PR17</name><description>Pending bit 17</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth></field><field><name>PR19</name><description>Pending bit 19</description><bitOffset>19</bitOffset><bitWidth>1</bitWidth></field></fields></register></registers></peripheral><peripheral><name>NVIC</name><description>Nested Vectored Interrupt Controller</description><groupName>NVIC</groupName><baseAddress>0xE000E100</baseAddress><addressBlock><offset>0x0</offset><size>0x33D</size><usage>registers</usage></addressBlock><registers><register><name>ISER</name><displayName>ISER</displayName><description>Interrupt Set Enable Register</description><addressOffset>0x0</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>SETENA</name><description>SETENA</description><bitOffset>0</bitOffset><bitWidth>32</bitWidth></field></fields></register><register><name>ICER</name><displayName>ICER</displayName><description>Interrupt Clear Enable Register</description><addressOffset>0x80</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>CLRENA</name><description>CLRENA</description><bitOffset>0</bitOffset><bitWidth>32</bitWidth></field></fields></register><register><name>ISPR</name><displayName>ISPR</displayName><description>Interrupt Set-Pending Register</description><addressOffset>0x100</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>SETPEND</name><description>SETPEND</description><bitOffset>0</bitOffset><bitWidth>32</bitWidth></field></fields></register><register><name>ICPR</name><displayName>ICPR</displayName><description>Interrupt Clear-Pending Register</description><addressOffset>0x180</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>CLRPEND</name><description>CLRPEND</description><bitOffset>0</bitOffset><bitWidth>32</bitWidth></field></fields></register><register><name>IPR0</name><displayName>IPR0</displayName><description>Interrupt Priority Register 0</description><addressOffset>0x300</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>PRI_00</name><description>PRI_00</description><bitOffset>6</bitOffset><bitWidth>2</bitWidth></field><field><name>PRI_01</name><description>PRI_01</description><bitOffset>14</bitOffset><bitWidth>2</bitWidth></field><field><name>PRI_02</name><description>PRI_02</description><bitOffset>22</bitOffset><bitWidth>2</bitWidth></field><field><name>PRI_03</name><description>PRI_03</description><bitOffset>30</bitOffset><bitWidth>2</bitWidth></field></fields></register><register><name>IPR1</name><displayName>IPR1</displayName><description>Interrupt Priority Register 1</description><addressOffset>0x304</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>PRI_40</name><description>PRI_40</description><bitOffset>6</bitOffset><bitWidth>2</bitWidth></field><field><name>PRI_41</name><description>PRI_41</description><bitOffset>14</bitOffset><bitWidth>2</bitWidth></field><field><name>PRI_42</name><description>PRI_42</description><bitOffset>22</bitOffset><bitWidth>2</bitWidth></field><field><name>PRI_43</name><description>PRI_43</description><bitOffset>30</bitOffset><bitWidth>2</bitWidth></field></fields></register><register><name>IPR2</name><displayName>IPR2</displayName><description>Interrupt Priority Register 2</description><addressOffset>0x308</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>PRI_80</name><description>PRI_80</description><bitOffset>6</bitOffset><bitWidth>2</bitWidth></field><field><name>PRI_81</name><description>PRI_81</description><bitOffset>14</bitOffset><bitWidth>2</bitWidth></field><field><name>PRI_82</name><description>PRI_82</description><bitOffset>22</bitOffset><bitWidth>2</bitWidth></field><field><name>PRI_83</name><description>PRI_83</description><bitOffset>30</bitOffset><bitWidth>2</bitWidth></field></fields></register><register><name>IPR3</name><displayName>IPR3</displayName><description>Interrupt Priority Register 3</description><addressOffset>0x30C</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>PRI_120</name><description>PRI_120</description><bitOffset>6</bitOffset><bitWidth>2</bitWidth></field><field><name>PRI_121</name><description>PRI_121</description><bitOffset>14</bitOffset><bitWidth>2</bitWidth></field><field><name>PRI_122</name><description>PRI_122</description><bitOffset>22</bitOffset><bitWidth>2</bitWidth></field><field><name>PRI_123</name><description>PRI_123</description><bitOffset>30</bitOffset><bitWidth>2</bitWidth></field></fields></register><register><name>IPR4</name><displayName>IPR4</displayName><description>Interrupt Priority Register 4</description><addressOffset>0x310</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>PRI_160</name><description>PRI_160</description><bitOffset>6</bitOffset><bitWidth>2</bitWidth></field><field><name>PRI_161</name><description>PRI_161</description><bitOffset>14</bitOffset><bitWidth>2</bitWidth></field><field><name>PRI_162</name><description>PRI_162</description><bitOffset>22</bitOffset><bitWidth>2</bitWidth></field><field><name>PRI_163</name><description>PRI_163</description><bitOffset>30</bitOffset><bitWidth>2</bitWidth></field></fields></register><register><name>IPR5</name><displayName>IPR5</displayName><description>Interrupt Priority Register 5</description><addressOffset>0x314</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>PRI_200</name><description>PRI_200</description><bitOffset>6</bitOffset><bitWidth>2</bitWidth></field><field><name>PRI_201</name><description>PRI_201</description><bitOffset>14</bitOffset><bitWidth>2</bitWidth></field><field><name>PRI_202</name><description>PRI_202</description><bitOffset>22</bitOffset><bitWidth>2</bitWidth></field><field><name>PRI_203</name><description>PRI_203</description><bitOffset>30</bitOffset><bitWidth>2</bitWidth></field></fields></register><register><name>IPR6</name><displayName>IPR6</displayName><description>Interrupt Priority Register 6</description><addressOffset>0x318</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>PRI_240</name><description>PRI_240</description><bitOffset>6</bitOffset><bitWidth>2</bitWidth></field><field><name>PRI_241</name><description>PRI_241</description><bitOffset>14</bitOffset><bitWidth>2</bitWidth></field><field><name>PRI_242</name><description>PRI_242</description><bitOffset>22</bitOffset><bitWidth>2</bitWidth></field><field><name>PRI_243</name><description>PRI_243</description><bitOffset>30</bitOffset><bitWidth>2</bitWidth></field></fields></register><register><name>IPR7</name><displayName>IPR7</displayName><description>Interrupt Priority Register 7</description><addressOffset>0x31C</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>PRI_280</name><description>PRI_280</description><bitOffset>6</bitOffset><bitWidth>2</bitWidth></field><field><name>PRI_281</name><description>PRI_281</description><bitOffset>14</bitOffset><bitWidth>2</bitWidth></field><field><name>PRI_282</name><description>PRI_282</description><bitOffset>22</bitOffset><bitWidth>2</bitWidth></field><field><name>PRI_283</name><description>PRI_283</description><bitOffset>30</bitOffset><bitWidth>2</bitWidth></field></fields></register></registers></peripheral><peripheral><name>DMA</name><description>DMA controller</description><groupName>DMA</groupName><baseAddress>0x40020000</baseAddress><addressBlock><offset>0x0</offset><size>0x400</size><usage>registers</usage></addressBlock><interrupt><name>DMA_CH1</name><description>DMA channel 1 interrupt</description><value>9</value></interrupt><interrupt><name>DMA_CH2_3</name><description>DMA channel 2 and 3 interrupts</description><value>10</value></interrupt><interrupt><name>DMA_CH4_5_6_7</name><description>DMA channel 4, 5, 6 and 7
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interrupts</description><value>11</value></interrupt><registers><register><name>ISR</name><displayName>ISR</displayName><description>DMA interrupt status register (DMA_ISR)</description><addressOffset>0x0</addressOffset><size>0x20</size><access>read-only</access><resetValue>0x00000000</resetValue><fields><field><name>GIF1</name><description>Channel 1 Global interrupt flag</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field><field><name>TCIF1</name><description>Channel 1 Transfer Complete flag</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>HTIF1</name><description>Channel 1 Half Transfer Complete flag</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>TEIF1</name><description>Channel 1 Transfer Error flag</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>GIF2</name><description>Channel 2 Global interrupt flag</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>TCIF2</name><description>Channel 2 Transfer Complete flag</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>HTIF2</name><description>Channel 2 Half Transfer Complete flag</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>TEIF2</name><description>Channel 2 Transfer Error flag</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>GIF3</name><description>Channel 3 Global interrupt flag</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>TCIF3</name><description>Channel 3 Transfer Complete flag</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>HTIF3</name><description>Channel 3 Half Transfer Complete flag</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>TEIF3</name><description>Channel 3 Transfer Error flag</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>GIF4</name><description>Channel 4 Global interrupt flag</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>TCIF4</name><description>Channel 4 Transfer Complete flag</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>HTIF4</name><description>Channel 4 Half Transfer Complete flag</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>TEIF4</name><description>Channel 4 Transfer Error flag</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>GIF5</name><description>Channel 5 Global interrupt flag</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth></field><field><name>TCIF5</name><description>Channel 5 Transfer Complete flag</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth></field><field><name>HTIF5</name><description>Channel 5 Half Transfer Complete flag</description><bitOffset>18</bitOffset><bitWidth>1</bitWidth></field><field><name>TEIF5</name><description>Channel 5 Transfer Error flag</description><bitOffset>19</bitOffset><bitWidth>1</bitWidth></field><field><name>GIF6</name><description>Channel 6 Global interrupt flag</description><bitOffset>20</bitOffset><bitWidth>1</bitWidth></field><field><name>TCIF6</name><description>Channel 6 Transfer Complete flag</description><bitOffset>21</bitOffset><bitWidth>1</bitWidth></field><field><name>HTIF6</name><description>Channel 6 Half Transfer Complete flag</description><bitOffset>22</bitOffset><bitWidth>1</bitWidth></field><field><name>TEIF6</name><description>Channel 6 Transfer Error flag</description><bitOffset>23</bitOffset><bitWidth>1</bitWidth></field><field><name>GIF7</name><description>Channel 7 Global interrupt flag</description><bitOffset>24</bitOffset><bitWidth>1</bitWidth></field><field><name>TCIF7</name><description>Channel 7 Transfer Complete flag</description><bitOffset>25</bitOffset><bitWidth>1</bitWidth></field><field><name>HTIF7</name><description>Channel 7 Half Transfer Complete flag</description><bitOffset>26</bitOffset><bitWidth>1</bitWidth></field><field><name>TEIF7</name><description>Channel 7 Transfer Error flag</description><bitOffset>27</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>IFCR</name><displayName>IFCR</displayName><description>DMA interrupt flag clear register (DMA_IFCR)</description><addressOffset>0x4</addressOffset><size>0x20</size><access>write-only</access><resetValue>0x00000000</resetValue><fields><field><name>CGIF1</name><description>Channel 1 Global interrupt clear</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field><field><name>CTCIF1</name><description>Channel 1 Transfer Complete clear</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>CHTIF1</name><description>Channel 1 Half Transfer clear</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>CTEIF1</name><description>Channel 1 Transfer Error clear</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>CGIF2</name><description>Channel 2 Global interrupt clear</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>CTCIF2</name><description>Channel 2 Transfer Complete clear</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>CHTIF2</name><description>Channel 2 Half Transfer clear</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>CTEIF2</name><description>Channel 2 Transfer Error clear</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>CGIF3</name><description>Channel 3 Global interrupt clear</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>CTCIF3</name><description>Channel 3 Transfer Complete clear</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>CHTIF3</name><description>Channel 3 Half Transfer clear</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>CTEIF3</name><description>Channel 3 Transfer Error clear</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>CGIF4</name><description>Channel 4 Global interrupt clear</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>CTCIF4</name><description>Channel 4 Transfer Complete clear</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>CHTIF4</name><description>Channel 4 Half Transfer clear</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>CTEIF4</name><description>Channel 4 Transfer Error clear</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>CGIF5</name><description>Channel 5 Global interrupt clear</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth></field><field><name>CTCIF5</name><description>Channel 5 Transfer Complete clear</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth></field><field><name>CHTIF5</name><description>Channel 5 Half Transfer clear</description><bitOffset>18</bitOffset><bitWidth>1</bitWidth></field><field><name>CTEIF5</name><description>Channel 5 Transfer Error clear</description><bitOffset>19</bitOffset><bitWidth>1</bitWidth></field><field><name>CGIF6</name><description>Channel 6 Global interrupt clear</description><bitOffset>20</bitOffset><bitWidth>1</bitWidth></field><field><name>CTCIF6</name><description>Channel 6 Transfer Complete clear</description><bitOffset>21</bitOffset><bitWidth>1</bitWidth></field><field><name>CHTIF6</name><description>Channel 6 Half Transfer clear</description><bitOffset>22</bitOffset><bitWidth>1</bitWidth></field><field><name>CTEIF6</name><description>Channel 6 Transfer Error clear</description><bitOffset>23</bitOffset><bitWidth>1</bitWidth></field><field><name>CGIF7</name><description>Channel 7 Global interrupt clear</description><bitOffset>24</bitOffset><bitWidth>1</bitWidth></field><field><name>CTCIF7</name><description>Channel 7 Transfer Complete clear</description><bitOffset>25</bitOffset><bitWidth>1</bitWidth></field><field><name>CHTIF7</name><description>Channel 7 Half Transfer clear</description><bitOffset>26</bitOffset><bitWidth>1</bitWidth></field><field><name>CTEIF7</name><description>Channel 7 Transfer Error clear</description><bitOffset>27</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>CCR1</name><displayName>CCR1</displayName><description>DMA channel configuration register (DMA_CCR)</description><addressOffset>0x8</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>EN</name><description>Channel enable</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field><field><name>TCIE</name><description>Transfer complete interrupt enable</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>HTIE</name><description>Half Transfer interrupt enable</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>TEIE</name><description>Transfer error interrupt enable</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>DIR</name><description>Data transfer direction</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>CIRC</name><description>Circular mode</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>PINC</name><description>Peripheral increment mode</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>MINC</name><description>Memory increment mode</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>PSIZE</name><description>Peripheral size</description><bitOffset>8</bitOffset><bitWidth>2</bitWidth></field><field><name>MSIZE</name><description>Memory size</description><bitOffset>10</bitOffset><bitWidth>2</bitWidth></field><field><name>PL</name><description>Channel Priority level</description><bitOffset>12</bitOffset><bitWidth>2</bitWidth></field><field><name>MEM2MEM</name><description>Memory to memory mode</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>CNDTR1</name><displayName>CNDTR1</displayName><description>DMA channel 1 number of data register</description><addressOffset>0xC</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>NDT</name><description>Number of data to transfer</description><bitOffset>0</bitOffset><bitWidth>16</bitWidth></field></fields></register><register><name>CPAR1</name><displayName>CPAR1</displayName><description>DMA channel 1 peripheral address register</description><addressOffset>0x10</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>PA</name><description>Peripheral address</description><bitOffset>0</bitOffset><bitWidth>32</bitWidth></field></fields></register><register><name>CMAR1</name><displayName>CMAR1</displayName><description>DMA channel 1 memory address register</description><addressOffset>0x14</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>MA</name><description>Memory address</description><bitOffset>0</bitOffset><bitWidth>32</bitWidth></field></fields></register><register><name>CCR2</name><displayName>CCR2</displayName><description>DMA channel configuration register (DMA_CCR)</description><addressOffset>0x1C</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>EN</name><description>Channel enable</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field><field><name>TCIE</name><description>Transfer complete interrupt enable</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>HTIE</name><description>Half Transfer interrupt enable</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>TEIE</name><description>Transfer error interrupt enable</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>DIR</name><description>Data transfer direction</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>CIRC</name><description>Circular mode</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>PINC</name><description>Peripheral increment mode</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>MINC</name><description>Memory increment mode</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>PSIZE</name><description>Peripheral size</description><bitOffset>8</bitOffset><bitWidth>2</bitWidth></field><field><name>MSIZE</name><description>Memory size</description><bitOffset>10</bitOffset><bitWidth>2</bitWidth></field><field><name>PL</name><description>Channel Priority level</description><bitOffset>12</bitOffset><bitWidth>2</bitWidth></field><field><name>MEM2MEM</name><description>Memory to memory mode</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>CNDTR2</name><displayName>CNDTR2</displayName><description>DMA channel 2 number of data register</description><addressOffset>0x20</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>NDT</name><description>Number of data to transfer</description><bitOffset>0</bitOffset><bitWidth>16</bitWidth></field></fields></register><register><name>CPAR2</name><displayName>CPAR2</displayName><description>DMA channel 2 peripheral address register</description><addressOffset>0x24</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>PA</name><description>Peripheral address</description><bitOffset>0</bitOffset><bitWidth>32</bitWidth></field></fields></register><register><name>CMAR2</name><displayName>CMAR2</displayName><description>DMA channel 2 memory address register</description><addressOffset>0x28</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>MA</name><description>Memory address</description><bitOffset>0</bitOffset><bitWidth>32</bitWidth></field></fields></register><register><name>CCR3</name><displayName>CCR3</displayName><description>DMA channel configuration register (DMA_CCR)</description><addressOffset>0x30</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>EN</name><description>Channel enable</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field><field><name>TCIE</name><description>Transfer complete interrupt enable</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>HTIE</name><description>Half Transfer interrupt enable</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>TEIE</name><description>Transfer error interrupt enable</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>DIR</name><description>Data transfer direction</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>CIRC</name><description>Circular mode</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>PINC</name><description>Peripheral increment mode</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>MINC</name><description>Memory increment mode</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>PSIZE</name><description>Peripheral size</description><bitOffset>8</bitOffset><bitWidth>2</bitWidth></field><field><name>MSIZE</name><description>Memory size</description><bitOffset>10</bitOffset><bitWidth>2</bitWidth></field><field><name>PL</name><description>Channel Priority level</description><bitOffset>12</bitOffset><bitWidth>2</bitWidth></field><field><name>MEM2MEM</name><description>Memory to memory mode</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>CNDTR3</name><displayName>CNDTR3</displayName><description>DMA channel 3 number of data register</description><addressOffset>0x34</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>NDT</name><description>Number of data to transfer</description><bitOffset>0</bitOffset><bitWidth>16</bitWidth></field></fields></register><register><name>CPAR3</name><displayName>CPAR3</displayName><description>DMA channel 3 peripheral address register</description><addressOffset>0x38</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>PA</name><description>Peripheral address</description><bitOffset>0</bitOffset><bitWidth>32</bitWidth></field></fields></register><register><name>CMAR3</name><displayName>CMAR3</displayName><description>DMA channel 3 memory address register</description><addressOffset>0x3C</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>MA</name><description>Memory address</description><bitOffset>0</bitOffset><bitWidth>32</bitWidth></field></fields></register><register><name>CCR4</name><displayName>CCR4</displayName><description>DMA channel configuration register (DMA_CCR)</description><addressOffset>0x44</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>EN</name><description>Channel enable</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field><field><name>TCIE</name><description>Transfer complete interrupt enable</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>HTIE</name><description>Half Transfer interrupt enable</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>TEIE</name><description>Transfer error interrupt enable</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>DIR</name><description>Data transfer direction</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>CIRC</name><description>Circular mode</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>PINC</name><description>Peripheral increment mode</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>MINC</name><description>Memory increment mode</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>PSIZE</name><description>Peripheral size</description><bitOffset>8</bitOffset><bitWidth>2</bitWidth></field><field><name>MSIZE</name><description>Memory size</description><bitOffset>10</bitOffset><bitWidth>2</bitWidth></field><field><name>PL</name><description>Channel Priority level</description><bitOffset>12</bitOffset><bitWidth>2</bitWidth></field><field><name>MEM2MEM</name><description>Memory to memory mode</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>CNDTR4</name><displayName>CNDTR4</displayName><description>DMA channel 4 number of data register</description><addressOffset>0x48</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>NDT</name><description>Number of data to transfer</description><bitOffset>0</bitOffset><bitWidth>16</bitWidth></field></fields></register><register><name>CPAR4</name><displayName>CPAR4</displayName><description>DMA channel 4 peripheral address register</description><addressOffset>0x4C</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>PA</name><description>Peripheral address</description><bitOffset>0</bitOffset><bitWidth>32</bitWidth></field></fields></register><register><name>CMAR4</name><displayName>CMAR4</displayName><description>DMA channel 4 memory address register</description><addressOffset>0x50</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>MA</name><description>Memory address</description><bitOffset>0</bitOffset><bitWidth>32</bitWidth></field></fields></register><register><name>CCR5</name><displayName>CCR5</displayName><description>DMA channel configuration register (DMA_CCR)</description><addressOffset>0x58</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>EN</name><description>Channel enable</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field><field><name>TCIE</name><description>Transfer complete interrupt enable</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>HTIE</name><description>Half Transfer interrupt enable</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>TEIE</name><description>Transfer error interrupt enable</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>DIR</name><description>Data transfer direction</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>CIRC</name><description>Circular mode</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>PINC</name><description>Peripheral increment mode</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>MINC</name><description>Memory increment mode</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>PSIZE</name><description>Peripheral size</description><bitOffset>8</bitOffset><bitWidth>2</bitWidth></field><field><name>MSIZE</name><description>Memory size</description><bitOffset>10</bitOffset><bitWidth>2</bitWidth></field><field><name>PL</name><description>Channel Priority level</description><bitOffset>12</bitOffset><bitWidth>2</bitWidth></field><field><name>MEM2MEM</name><description>Memory to memory mode</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>CNDTR5</name><displayName>CNDTR5</displayName><description>DMA channel 5 number of data register</description><addressOffset>0x5C</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>NDT</name><description>Number of data to transfer</description><bitOffset>0</bitOffset><bitWidth>16</bitWidth></field></fields></register><register><name>CPAR5</name><displayName>CPAR5</displayName><description>DMA channel 5 peripheral address register</description><addressOffset>0x60</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>PA</name><description>Peripheral address</description><bitOffset>0</bitOffset><bitWidth>32</bitWidth></field></fields></register><register><name>CMAR5</name><displayName>CMAR5</displayName><description>DMA channel 5 memory address register</description><addressOffset>0x64</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>MA</name><description>Memory address</description><bitOffset>0</bitOffset><bitWidth>32</bitWidth></field></fields></register><register><name>CCR6</name><displayName>CCR6</displayName><description>DMA channel configuration register (DMA_CCR)</description><addressOffset>0x6C</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>EN</name><description>Channel enable</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field><field><name>TCIE</name><description>Transfer complete interrupt enable</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>HTIE</name><description>Half Transfer interrupt enable</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>TEIE</name><description>Transfer error interrupt enable</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>DIR</name><description>Data transfer direction</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>CIRC</name><description>Circular mode</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>PINC</name><description>Peripheral increment mode</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>MINC</name><description>Memory increment mode</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>PSIZE</name><description>Peripheral size</description><bitOffset>8</bitOffset><bitWidth>2</bitWidth></field><field><name>MSIZE</name><description>Memory size</description><bitOffset>10</bitOffset><bitWidth>2</bitWidth></field><field><name>PL</name><description>Channel Priority level</description><bitOffset>12</bitOffset><bitWidth>2</bitWidth></field><field><name>MEM2MEM</name><description>Memory to memory mode</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>CNDTR6</name><displayName>CNDTR6</displayName><description>DMA channel 6 number of data register</description><addressOffset>0x70</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>NDT</name><description>Number of data to transfer</description><bitOffset>0</bitOffset><bitWidth>16</bitWidth></field></fields></register><register><name>CPAR6</name><displayName>CPAR6</displayName><description>DMA channel 6 peripheral address register</description><addressOffset>0x74</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>PA</name><description>Peripheral address</description><bitOffset>0</bitOffset><bitWidth>32</bitWidth></field></fields></register><register><name>CMAR6</name><displayName>CMAR6</displayName><description>DMA channel 6 memory address register</description><addressOffset>0x78</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>MA</name><description>Memory address</description><bitOffset>0</bitOffset><bitWidth>32</bitWidth></field></fields></register><register><name>CCR7</name><displayName>CCR7</displayName><description>DMA channel configuration register (DMA_CCR)</description><addressOffset>0x80</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>EN</name><description>Channel enable</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field><field><name>TCIE</name><description>Transfer complete interrupt enable</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>HTIE</name><description>Half Transfer interrupt enable</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>TEIE</name><description>Transfer error interrupt enable</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>DIR</name><description>Data transfer direction</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>CIRC</name><description>Circular mode</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>PINC</name><description>Peripheral increment mode</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>MINC</name><description>Memory increment mode</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>PSIZE</name><description>Peripheral size</description><bitOffset>8</bitOffset><bitWidth>2</bitWidth></field><field><name>MSIZE</name><description>Memory size</description><bitOffset>10</bitOffset><bitWidth>2</bitWidth></field><field><name>PL</name><description>Channel Priority level</description><bitOffset>12</bitOffset><bitWidth>2</bitWidth></field><field><name>MEM2MEM</name><description>Memory to memory mode</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>CNDTR7</name><displayName>CNDTR7</displayName><description>DMA channel 7 number of data register</description><addressOffset>0x84</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>NDT</name><description>Number of data to transfer</description><bitOffset>0</bitOffset><bitWidth>16</bitWidth></field></fields></register><register><name>CPAR7</name><displayName>CPAR7</displayName><description>DMA channel 7 peripheral address register</description><addressOffset>0x88</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>PA</name><description>Peripheral address</description><bitOffset>0</bitOffset><bitWidth>32</bitWidth></field></fields></register><register><name>CMAR7</name><displayName>CMAR7</displayName><description>DMA channel 7 memory address register</description><addressOffset>0x8C</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>MA</name><description>Memory address</description><bitOffset>0</bitOffset><bitWidth>32</bitWidth></field></fields></register></registers></peripheral><peripheral><name>RCC</name><description>Reset and clock control</description><groupName>RCC</groupName><baseAddress>0x40021000</baseAddress><addressBlock><offset>0x0</offset><size>0x400</size><usage>registers</usage></addressBlock><interrupt><name>RCC_CRS</name><description>RCC and CRS global interrupts</description><value>4</value></interrupt><registers><register><name>CR</name><displayName>CR</displayName><description>Clock control register</description><addressOffset>0x0</addressOffset><size>0x20</size><resetValue>0x00000083</resetValue><fields><field><name>HSION</name><description>Internal High Speed clock enable</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>HSIRDY</name><description>Internal High Speed clock ready flag</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth><access>read-only</access></field><field><name>HSITRIM</name><description>Internal High Speed clock trimming</description><bitOffset>3</bitOffset><bitWidth>5</bitWidth><access>read-write</access></field><field><name>HSICAL</name><description>Internal High Speed clock Calibration</description><bitOffset>8</bitOffset><bitWidth>8</bitWidth><access>read-only</access></field><field><name>HSEON</name><description>External High Speed clock enable</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>HSERDY</name><description>External High Speed clock ready flag</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth><access>read-only</access></field><field><name>HSEBYP</name><description>External High Speed clock Bypass</description><bitOffset>18</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>CSSON</name><description>Clock Security System enable</description><bitOffset>19</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>PLLON</name><description>PLL enable</description><bitOffset>24</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>PLLRDY</name><description>PLL clock ready flag</description><bitOffset>25</bitOffset><bitWidth>1</bitWidth><access>read-only</access></field></fields></register><register><name>CFGR</name><displayName>CFGR</displayName><description>Clock configuration register (RCC_CFGR)</description><addressOffset>0x4</addressOffset><size>0x20</size><resetValue>0x00000000</resetValue><fields><field><name>SW</name><description>System clock Switch</description><bitOffset>0</bitOffset><bitWidth>2</bitWidth><access>read-write</access></field><field><name>SWS</name><description>System Clock Switch Status</description><bitOffset>2</bitOffset><bitWidth>2</bitWidth><access>read-only</access></field><field><name>HPRE</name><description>AHB prescaler</description><bitOffset>4</bitOffset><bitWidth>4</bitWidth><access>read-write</access></field><field><name>PPRE</name><description>APB Low speed prescaler (APB1)</description><bitOffset>8</bitOffset><bitWidth>3</bitWidth><access>read-write</access></field><field><name>ADCPRE</name><description>ADC prescaler</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>PLLSRC</name><description>PLL input clock source</description><bitOffset>15</bitOffset><bitWidth>2</bitWidth><access>read-write</access></field><field><name>PLLXTPRE</name><description>HSE divider for PLL entry</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>PLLMUL</name><description>PLL Multiplication Factor</description><bitOffset>18</bitOffset><bitWidth>4</bitWidth><access>read-write</access></field><field><name>MCO</name><description>Microcontroller clock output</description><bitOffset>24</bitOffset><bitWidth>3</bitWidth><access>read-write</access></field><field><name>MCOPRE</name><description>Microcontroller Clock Output Prescaler</description><bitOffset>28</bitOffset><bitWidth>3</bitWidth><access>read-write</access></field><field><name>PLLNODIV</name><description>PLL clock not divided for MCO</description><bitOffset>31</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field></fields></register><register><name>CIR</name><displayName>CIR</displayName><description>Clock interrupt register (RCC_CIR)</description><addressOffset>0x8</addressOffset><size>0x20</size><resetValue>0x00000000</resetValue><fields><field><name>LSIRDYF</name><description>LSI Ready Interrupt flag</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth><access>read-only</access></field><field><name>LSERDYF</name><description>LSE Ready Interrupt flag</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth><access>read-only</access></field><field><name>HSIRDYF</name><description>HSI Ready Interrupt flag</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth><access>read-only</access></field><field><name>HSERDYF</name><description>HSE Ready Interrupt flag</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth><access>read-only</access></field><field><name>PLLRDYF</name><description>PLL Ready Interrupt flag</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth><access>read-only</access></field><field><name>HSI14RDYF</name><description>HSI14 ready interrupt flag</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth><access>read-only</access></field><field><name>HSI48RDYF</name><description>HSI48 ready interrupt flag</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth><access>read-only</access></field><field><name>CSSF</name><description>Clock Security System Interrupt flag</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth><access>read-only</access></field><field><name>LSIRDYIE</name><description>LSI Ready Interrupt Enable</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>LSERDYIE</name><description>LSE Ready Interrupt Enable</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>HSIRDYIE</name><description>HSI Ready Interrupt Enable</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>HSERDYIE</name><description>HSE Ready Interrupt Enable</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>PLLRDYIE</name><description>PLL Ready Interrupt Enable</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>HSI14RDYE</name><description>HSI14 ready interrupt enable</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>HSI48RDYIE</name><description>HSI48 ready interrupt enable</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>LSIRDYC</name><description>LSI Ready Interrupt Clear</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth><access>write-only</access></field><field><name>LSERDYC</name><description>LSE Ready Interrupt Clear</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth><access>write-only</access></field><field><name>HSIRDYC</name><description>HSI Ready Interrupt Clear</description><bitOffset>18</bitOffset><bitWidth>1</bitWidth><access>write-only</access></field><field><name>HSERDYC</name><description>HSE Ready Interrupt Clear</description><bitOffset>19</bitOffset><bitWidth>1</bitWidth><access>write-only</access></field><field><name>PLLRDYC</name><description>PLL Ready Interrupt Clear</description><bitOffset>20</bitOffset><bitWidth>1</bitWidth><access>write-only</access></field><field><name>HSI14RDYC</name><description>HSI 14 MHz Ready Interrupt Clear</description><bitOffset>21</bitOffset><bitWidth>1</bitWidth><access>write-only</access></field><field><name>HSI48RDYC</name><description>HSI48 Ready Interrupt Clear</description><bitOffset>22</bitOffset><bitWidth>1</bitWidth><access>write-only</access></field><field><name>CSSC</name><description>Clock security system interrupt clear</description><bitOffset>23</bitOffset><bitWidth>1</bitWidth><access>write-only</access></field></fields></register><register><name>APB2RSTR</name><displayName>APB2RSTR</displayName><description>APB2 peripheral reset register (RCC_APB2RSTR)</description><addressOffset>0xC</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>SYSCFGRST</name><description>SYSCFG and COMP reset</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field><field><name>ADCRST</name><description>ADC interface reset</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>TIM1RST</name><description>TIM1 timer reset</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>SPI1RST</name><description>SPI 1 reset</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>USART1RST</name><description>USART1 reset</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>TIM16RST</name><description>TIM16 timer reset</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth></field><field><name>TIM17RST</name><description>TIM17 timer reset</description><bitOffset>18</bitOffset><bitWidth>1</bitWidth></field><field><name>DBGMCURST</name><description>Debug MCU reset</description><bitOffset>22</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>APB1RSTR</name><displayName>APB1RSTR</displayName><description>APB1 peripheral reset register (RCC_APB1RSTR)</description><addressOffset>0x10</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>TIM2RST</name><description>Timer 2 reset</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field><field><name>TIM3RST</name><description>Timer 3 reset</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>TIM14RST</name><description>Timer 14 reset</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>WWDGRST</name><description>Window watchdog reset</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>SPI2RST</name><description>SPI2 reset</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>USART2RST</name><description>USART 2 reset</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth></field><field><name>I2C1RST</name><description>I2C1 reset</description><bitOffset>21</bitOffset><bitWidth>1</bitWidth></field><field><name>USBRST</name><description>USB interface reset</description><bitOffset>23</bitOffset><bitWidth>1</bitWidth></field><field><name>CANRST</name><description>CAN interface reset</description><bitOffset>25</bitOffset><bitWidth>1</bitWidth></field><field><name>CRSRST</name><description>Clock Recovery System interface reset</description><bitOffset>27</bitOffset><bitWidth>1</bitWidth></field><field><name>PWRRST</name><description>Power interface reset</description><bitOffset>28</bitOffset><bitWidth>1</bitWidth></field><field><name>CECRST</name><description>HDMI CEC reset</description><bitOffset>30</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>AHBENR</name><displayName>AHBENR</displayName><description>AHB Peripheral Clock enable register (RCC_AHBENR)</description><addressOffset>0x14</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000014</resetValue><fields><field><name>DMAEN</name><description>DMA1 clock enable</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field><field><name>SRAMEN</name><description>SRAM interface clock enable</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>FLITFEN</name><description>FLITF clock enable</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>CRCEN</name><description>CRC clock enable</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>IOPAEN</name><description>I/O port A clock enable</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth></field><field><name>IOPBEN</name><description>I/O port B clock enable</description><bitOffset>18</bitOffset><bitWidth>1</bitWidth></field><field><name>IOPCEN</name><description>I/O port C clock enable</description><bitOffset>19</bitOffset><bitWidth>1</bitWidth></field><field><name>IOPFEN</name><description>I/O port F clock enable</description><bitOffset>22</bitOffset><bitWidth>1</bitWidth></field><field><name>TSCEN</name><description>Touch sensing controller clock enable</description><bitOffset>24</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>APB2ENR</name><displayName>APB2ENR</displayName><description>APB2 peripheral clock enable register (RCC_APB2ENR)</description><addressOffset>0x18</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>SYSCFGEN</name><description>SYSCFG clock enable</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field><field><name>ADCEN</name><description>ADC 1 interface clock enable</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>TIM1EN</name><description>TIM1 Timer clock enable</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>SPI1EN</name><description>SPI 1 clock enable</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>USART1EN</name><description>USART1 clock enable</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>TIM16EN</name><description>TIM16 timer clock enable</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth></field><field><name>TIM17EN</name><description>TIM17 timer clock enable</description><bitOffset>18</bitOffset><bitWidth>1</bitWidth></field><field><name>DBGMCUEN</name><description>MCU debug module clock enable</description><bitOffset>22</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>APB1ENR</name><displayName>APB1ENR</displayName><description>APB1 peripheral clock enable register (RCC_APB1ENR)</description><addressOffset>0x1C</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>TIM2EN</name><description>Timer 2 clock enable</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field><field><name>TIM3EN</name><description>Timer 3 clock enable</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>TIM14EN</name><description>Timer 14 clock enable</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>WWDGEN</name><description>Window watchdog clock enable</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>SPI2EN</name><description>SPI 2 clock enable</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>USART2EN</name><description>USART 2 clock enable</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth></field><field><name>I2C1EN</name><description>I2C 1 clock enable</description><bitOffset>21</bitOffset><bitWidth>1</bitWidth></field><field><name>USBRST</name><description>USB interface clock enable</description><bitOffset>23</bitOffset><bitWidth>1</bitWidth></field><field><name>CANEN</name><description>CAN interface clock enable</description><bitOffset>25</bitOffset><bitWidth>1</bitWidth></field><field><name>CRSEN</name><description>Clock Recovery System interface clock enable</description><bitOffset>27</bitOffset><bitWidth>1</bitWidth></field><field><name>PWREN</name><description>Power interface clock enable</description><bitOffset>28</bitOffset><bitWidth>1</bitWidth></field><field><name>DACEN</name><description>DAC interface clock enable</description><bitOffset>29</bitOffset><bitWidth>1</bitWidth></field><field><name>CECEN</name><description>HDMI CEC interface clock enable</description><bitOffset>30</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>BDCR</name><displayName>BDCR</displayName><description>Backup domain control register (RCC_BDCR)</description><addressOffset>0x20</addressOffset><size>0x20</size><resetValue>0x00000000</resetValue><fields><field><name>LSEON</name><description>External Low Speed oscillator enable</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>LSERDY</name><description>External Low Speed oscillator ready</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth><access>read-only</access></field><field><name>LSEBYP</name><description>External Low Speed oscillator bypass</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>LSEDRV</name><description>LSE oscillator drive capability</description><bitOffset>3</bitOffset><bitWidth>2</bitWidth><access>read-write</access></field><field><name>RTCSEL</name><description>RTC clock source selection</description><bitOffset>8</bitOffset><bitWidth>2</bitWidth><access>read-write</access></field><field><name>RTCEN</name><description>RTC clock enable</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>BDRST</name><description>Backup domain software reset</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field></fields></register><register><name>CSR</name><displayName>CSR</displayName><description>Control/status register (RCC_CSR)</description><addressOffset>0x24</addressOffset><size>0x20</size><resetValue>0x0C000000</resetValue><fields><field><name>LSION</name><description>Internal low speed oscillator enable</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>LSIRDY</name><description>Internal low speed oscillator ready</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth><access>read-only</access></field><field><name>RMVF</name><description>Remove reset flag</description><bitOffset>24</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>OBLRSTF</name><description>Option byte loader reset flag</description><bitOffset>25</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>PINRSTF</name><description>PIN reset flag</description><bitOffset>26</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>PORRSTF</name><description>POR/PDR reset flag</description><bitOffset>27</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>SFTRSTF</name><description>Software reset flag</description><bitOffset>28</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>IWDGRSTF</name><description>Independent watchdog reset flag</description><bitOffset>29</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>WWDGRSTF</name><description>Window watchdog reset flag</description><bitOffset>30</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>LPWRRSTF</name><description>Low-power reset flag</description><bitOffset>31</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field></fields></register><register><name>AHBRSTR</name><displayName>AHBRSTR</displayName><description>AHB peripheral reset register</description><addressOffset>0x28</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>IOPARST</name><description>I/O port A reset</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth></field><field><name>IOPBRST</name><description>I/O port B reset</description><bitOffset>18</bitOffset><bitWidth>1</bitWidth></field><field><name>IOPCRST</name><description>I/O port C reset</description><bitOffset>19</bitOffset><bitWidth>1</bitWidth></field><field><name>IOPFRST</name><description>I/O port F reset</description><bitOffset>22</bitOffset><bitWidth>1</bitWidth></field><field><name>TSCRST</name><description>Touch sensing controller reset</description><bitOffset>24</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>CFGR2</name><displayName>CFGR2</displayName><description>Clock configuration register 2</description><addressOffset>0x2C</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>PREDIV</name><description>PREDIV division factor</description><bitOffset>0</bitOffset><bitWidth>4</bitWidth></field></fields></register><register><name>CFGR3</name><displayName>CFGR3</displayName><description>Clock configuration register 3</description><addressOffset>0x30</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>USART1SW</name><description>USART1 clock source selection</description><bitOffset>0</bitOffset><bitWidth>2</bitWidth></field><field><name>I2C1SW</name><description>I2C1 clock source selection</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>CECSW</name><description>HDMI CEC clock source selection</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>USBSW</name><description>USB clock source selection</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>ADCSW</name><description>ADC clock source selection</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>USART2SW</name><description>USART2 clock source selection</description><bitOffset>16</bitOffset><bitWidth>2</bitWidth></field></fields></register><register><name>CR2</name><displayName>CR2</displayName><description>Clock control register 2</description><addressOffset>0x34</addressOffset><size>0x20</size><resetValue>0x00000080</resetValue><fields><field><name>HSI14ON</name><description>HSI14 clock enable</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>HSI14RDY</name><description>HR14 clock ready flag</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth><access>read-only</access></field><field><name>HSI14DIS</name><description>HSI14 clock request from ADC disable</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>HSI14TRIM</name><description>HSI14 clock trimming</description><bitOffset>3</bitOffset><bitWidth>5</bitWidth><access>read-write</access></field><field><name>HSI14CAL</name><description>HSI14 clock calibration</description><bitOffset>8</bitOffset><bitWidth>8</bitWidth><access>read-only</access></field><field><name>HSI48ON</name><description>HSI48 clock enable</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>HSI48RDY</name><description>HSI48 clock ready flag</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth><access>read-only</access></field><field><name>HSI48CAL</name><description>HSI48 factory clock calibration</description><bitOffset>24</bitOffset><bitWidth>1</bitWidth><access>read-only</access></field></fields></register></registers></peripheral><peripheral><name>SYSCFG</name><description>System configuration controller</description><groupName>SYSCFG</groupName><baseAddress>0x40010000</baseAddress><addressBlock><offset>0x0</offset><size>0x400</size><usage>registers</usage></addressBlock><registers><register><name>CFGR1</name><displayName>CFGR1</displayName><description>configuration register 1</description><addressOffset>0x0</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>MEM_MODE</name><description>Memory mapping selection bits</description><bitOffset>0</bitOffset><bitWidth>2</bitWidth></field><field><name>ADC_DMA_RMP</name><description>ADC DMA remapping bit</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>USART1_TX_DMA_RMP</name><description>USART1_TX DMA remapping bit</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>USART1_RX_DMA_RMP</name><description>USART1_RX DMA request remapping bit</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>TIM16_DMA_RMP</name><description>TIM16 DMA request remapping bit</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>TIM17_DMA_RMP</name><description>TIM17 DMA request remapping bit</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>I2C_PB6_FM</name><description>Fast Mode Plus (FM plus) driving capability activation bits.</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth></field><field><name>I2C_PB7_FM</name><description>Fast Mode Plus (FM+) driving capability activation bits.</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth></field><field><name>I2C_PB8_FM</name><description>Fast Mode Plus (FM+) driving capability activation bits.</description><bitOffset>18</bitOffset><bitWidth>1</bitWidth></field><field><name>I2C_PB9_FM</name><description>Fast Mode Plus (FM+) driving capability activation bits.</description><bitOffset>19</bitOffset><bitWidth>1</bitWidth></field><field><name>I2C1_FM_plus</name><description>FM+ driving capability activation for I2C1</description><bitOffset>20</bitOffset><bitWidth>1</bitWidth></field><field><name>I2C2_FM_plus</name><description>FM+ driving capability activation for I2C2</description><bitOffset>21</bitOffset><bitWidth>1</bitWidth></field><field><name>SPI2_DMA_RMP</name><description>SPI2 DMA request remapping bit</description><bitOffset>24</bitOffset><bitWidth>1</bitWidth></field><field><name>USART2_DMA_RMP</name><description>USART2 DMA request remapping bit</description><bitOffset>25</bitOffset><bitWidth>1</bitWidth></field><field><name>USART3_DMA_RMP</name><description>USART3 DMA request remapping bit</description><bitOffset>26</bitOffset><bitWidth>1</bitWidth></field><field><name>I2C1_DMA_RMP</name><description>I2C1 DMA request remapping bit</description><bitOffset>27</bitOffset><bitWidth>1</bitWidth></field><field><name>TIM1_DMA_RMP</name><description>TIM1 DMA request remapping bit</description><bitOffset>28</bitOffset><bitWidth>1</bitWidth></field><field><name>TIM2_DMA_RMP</name><description>TIM2 DMA request remapping bit</description><bitOffset>29</bitOffset><bitWidth>1</bitWidth></field><field><name>TIM3_DMA_RMP</name><description>TIM3 DMA request remapping bit</description><bitOffset>30</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>EXTICR1</name><displayName>EXTICR1</displayName><description>external interrupt configuration register 1</description><addressOffset>0x8</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x0000</resetValue><fields><field><name>EXTI3</name><description>EXTI 3 configuration bits</description><bitOffset>12</bitOffset><bitWidth>4</bitWidth></field><field><name>EXTI2</name><description>EXTI 2 configuration bits</description><bitOffset>8</bitOffset><bitWidth>4</bitWidth></field><field><name>EXTI1</name><description>EXTI 1 configuration bits</description><bitOffset>4</bitOffset><bitWidth>4</bitWidth></field><field><name>EXTI0</name><description>EXTI 0 configuration bits</description><bitOffset>0</bitOffset><bitWidth>4</bitWidth></field></fields></register><register><name>EXTICR2</name><displayName>EXTICR2</displayName><description>external interrupt configuration register 2</description><addressOffset>0xC</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x0000</resetValue><fields><field><name>EXTI7</name><description>EXTI 7 configuration bits</description><bitOffset>12</bitOffset><bitWidth>4</bitWidth></field><field><name>EXTI6</name><description>EXTI 6 configuration bits</description><bitOffset>8</bitOffset><bitWidth>4</bitWidth></field><field><name>EXTI5</name><description>EXTI 5 configuration bits</description><bitOffset>4</bitOffset><bitWidth>4</bitWidth></field><field><name>EXTI4</name><description>EXTI 4 configuration bits</description><bitOffset>0</bitOffset><bitWidth>4</bitWidth></field></fields></register><register><name>EXTICR3</name><displayName>EXTICR3</displayName><description>external interrupt configuration register 3</description><addressOffset>0x10</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x0000</resetValue><fields><field><name>EXTI11</name><description>EXTI 11 configuration bits</description><bitOffset>12</bitOffset><bitWidth>4</bitWidth></field><field><name>EXTI10</name><description>EXTI 10 configuration bits</description><bitOffset>8</bitOffset><bitWidth>4</bitWidth></field><field><name>EXTI9</name><description>EXTI 9 configuration bits</description><bitOffset>4</bitOffset><bitWidth>4</bitWidth></field><field><name>EXTI8</name><description>EXTI 8 configuration bits</description><bitOffset>0</bitOffset><bitWidth>4</bitWidth></field></fields></register><register><name>EXTICR4</name><displayName>EXTICR4</displayName><description>external interrupt configuration register 4</description><addressOffset>0x14</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x0000</resetValue><fields><field><name>EXTI15</name><description>EXTI 15 configuration bits</description><bitOffset>12</bitOffset><bitWidth>4</bitWidth></field><field><name>EXTI14</name><description>EXTI 14 configuration bits</description><bitOffset>8</bitOffset><bitWidth>4</bitWidth></field><field><name>EXTI13</name><description>EXTI 13 configuration bits</description><bitOffset>4</bitOffset><bitWidth>4</bitWidth></field><field><name>EXTI12</name><description>EXTI 12 configuration bits</description><bitOffset>0</bitOffset><bitWidth>4</bitWidth></field></fields></register><register><name>CFGR2</name><displayName>CFGR2</displayName><description>configuration register 2</description><addressOffset>0x18</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x0000</resetValue><fields><field><name>SRAM_PEF</name><description>SRAM parity flag</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>PVD_LOCK</name><description>PVD lock enable bit</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>SRAM_PARITY_LOCK</name><description>SRAM parity lock bit</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>LOCUP_LOCK</name><description>Cortex-M0 LOCKUP bit enable bit</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field></fields></register></registers></peripheral><peripheral><name>ADC</name><description>Analog-to-digital converter</description><groupName>ADC</groupName><baseAddress>0x40012400</baseAddress><addressBlock><offset>0x0</offset><size>0x400</size><usage>registers</usage></addressBlock><interrupt><name>ADC_COMP</name><description>ADC and comparator interrupts</description><value>12</value></interrupt><interrupt><name>ADC_COMP</name><description>ADC and comparator interrupts</description><value>12</value></interrupt><registers><register><name>ISR</name><displayName>ISR</displayName><description>interrupt and status register</description><addressOffset>0x0</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>AWD</name><description>Analog watchdog flag</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>OVR</name><description>ADC overrun</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>EOS</name><description>End of sequence flag</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>EOC</name><description>End of conversion flag</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>EOSMP</name><description>End of sampling flag</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>ADRDY</name><description>ADC ready</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>IER</name><displayName>IER</displayName><description>interrupt enable register</description><addressOffset>0x4</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>AWDIE</name><description>Analog watchdog interrupt enable</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>OVRIE</name><description>Overrun interrupt enable</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>EOSIE</name><description>End of conversion sequence interrupt enable</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>EOCIE</name><description>End of conversion interrupt enable</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>EOSMPIE</name><description>End of sampling flag interrupt enable</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>ADRDYIE</name><description>ADC ready interrupt enable</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>CR</name><displayName>CR</displayName><description>control register</description><addressOffset>0x8</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>ADCAL</name><description>ADC calibration</description><bitOffset>31</bitOffset><bitWidth>1</bitWidth></field><field><name>ADSTP</name><description>ADC stop conversion command</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>ADSTART</name><description>ADC start conversion command</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>ADDIS</name><description>ADC disable command</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>ADEN</name><description>ADC enable command</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>CFGR1</name><displayName>CFGR1</displayName><description>configuration register 1</description><addressOffset>0xC</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>AWDCH</name><description>Analog watchdog channel selection</description><bitOffset>26</bitOffset><bitWidth>5</bitWidth></field><field><name>AWDEN</name><description>Analog watchdog enable</description><bitOffset>23</bitOffset><bitWidth>1</bitWidth></field><field><name>AWDSGL</name><description>Enable the watchdog on a single channel or on all channels</description><bitOffset>22</bitOffset><bitWidth>1</bitWidth></field><field><name>DISCEN</name><description>Discontinuous mode</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth></field><field><name>AUTOFF</name><description>Auto-off mode</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>AUTDLY</name><description>Auto-delayed conversion mode</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>CONT</name><description>Single / continuous conversion mode</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>OVRMOD</name><description>Overrun management mode</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>EXTEN</name><description>External trigger enable and polarity selection</description><bitOffset>10</bitOffset><bitWidth>2</bitWidth></field><field><name>EXTSEL</name><description>External trigger selection</description><bitOffset>6</bitOffset><bitWidth>3</bitWidth></field><field><name>ALIGN</name><description>Data alignment</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>RES</name><description>Data resolution</description><bitOffset>3</bitOffset><bitWidth>2</bitWidth></field><field><name>SCANDIR</name><description>Scan sequence direction</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>DMACFG</name><description>Direct memery access configuration</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>DMAEN</name><description>Direct memory access enable</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>CFGR2</name><displayName>CFGR2</displayName><description>configuration register 2</description><addressOffset>0x10</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00008000</resetValue><fields><field><name>JITOFF_D4</name><description>JITOFF_D4</description><bitOffset>31</bitOffset><bitWidth>1</bitWidth></field><field><name>JITOFF_D2</name><description>JITOFF_D2</description><bitOffset>30</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>SMPR</name><displayName>SMPR</displayName><description>sampling time register</description><addressOffset>0x14</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>SMPR</name><description>Sampling time selection</description><bitOffset>0</bitOffset><bitWidth>3</bitWidth></field></fields></register><register><name>TR</name><displayName>TR</displayName><description>watchdog threshold register</description><addressOffset>0x20</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000FFF</resetValue><fields><field><name>HT</name><description>Analog watchdog higher threshold</description><bitOffset>16</bitOffset><bitWidth>12</bitWidth></field><field><name>LT</name><description>Analog watchdog lower threshold</description><bitOffset>0</bitOffset><bitWidth>12</bitWidth></field></fields></register><register><name>CHSELR</name><displayName>CHSELR</displayName><description>channel selection register</description><addressOffset>0x28</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>CHSEL18</name><description>Channel-x selection</description><bitOffset>18</bitOffset><bitWidth>1</bitWidth></field><field><name>CHSEL17</name><description>Channel-x selection</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth></field><field><name>CHSEL16</name><description>Channel-x selection</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth></field><field><name>CHSEL15</name><description>Channel-x selection</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>CHSEL14</name><description>Channel-x selection</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>CHSEL13</name><description>Channel-x selection</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>CHSEL12</name><description>Channel-x selection</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>CHSEL11</name><description>Channel-x selection</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>CHSEL10</name><description>Channel-x selection</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>CHSEL9</name><description>Channel-x selection</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>CHSEL8</name><description>Channel-x selection</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>CHSEL7</name><description>Channel-x selection</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>CHSEL6</name><description>Channel-x selection</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>CHSEL5</name><description>Channel-x selection</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>CHSEL4</name><description>Channel-x selection</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>CHSEL3</name><description>Channel-x selection</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>CHSEL2</name><description>Channel-x selection</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>CHSEL1</name><description>Channel-x selection</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>CHSEL0</name><description>Channel-x selection</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>DR</name><displayName>DR</displayName><description>data register</description><addressOffset>0x40</addressOffset><size>0x20</size><access>read-only</access><resetValue>0x00000000</resetValue><fields><field><name>DATA</name><description>Converted data</description><bitOffset>0</bitOffset><bitWidth>16</bitWidth></field></fields></register><register><name>CCR</name><displayName>CCR</displayName><description>common configuration register</description><addressOffset>0x308</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>VBATEN</name><description>VBAT enable</description><bitOffset>24</bitOffset><bitWidth>1</bitWidth></field><field><name>TSEN</name><description>Temperature sensor enable</description><bitOffset>23</bitOffset><bitWidth>1</bitWidth></field><field><name>VREFEN</name><description>Temperature sensor and VREFINT enable</description><bitOffset>22</bitOffset><bitWidth>1</bitWidth></field></fields></register></registers></peripheral><peripheral><name>USART1</name><description>Universal synchronous asynchronous receiver transmitter</description><groupName>USART</groupName><baseAddress>0x40013800</baseAddress><addressBlock><offset>0x0</offset><size>0x400</size><usage>registers</usage></addressBlock><interrupt><name>USART1</name><description>USART1 global interrupt</description><value>27</value></interrupt><registers><register><name>CR1</name><displayName>CR1</displayName><description>Control register 1</description><addressOffset>0x0</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x0000</resetValue><fields><field><name>UE</name><description>USART enable</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field><field><name>UESM</name><description>USART enable in Stop mode</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>RE</name><description>Receiver enable</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>TE</name><description>Transmitter enable</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>IDLEIE</name><description>IDLE interrupt enable</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>RXNEIE</name><description>RXNE interrupt enable</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>TCIE</name><description>Transmission complete interrupt enable</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>TXEIE</name><description>interrupt enable</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>PEIE</name><description>PE interrupt enable</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>PS</name><description>Parity selection</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>PCE</name><description>Parity control enable</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>WAKE</name><description>Receiver wakeup method</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>M</name><description>Word length</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>MME</name><description>Mute mode enable</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>CMIE</name><description>Character match interrupt enable</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>OVER8</name><description>Oversampling mode</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>DEDT</name><description>Driver Enable deassertion time</description><bitOffset>16</bitOffset><bitWidth>5</bitWidth></field><field><name>DEAT</name><description>Driver Enable assertion time</description><bitOffset>21</bitOffset><bitWidth>5</bitWidth></field><field><name>RTOIE</name><description>Receiver timeout interrupt enable</description><bitOffset>26</bitOffset><bitWidth>1</bitWidth></field><field><name>EOBIE</name><description>End of Block interrupt enable</description><bitOffset>27</bitOffset><bitWidth>1</bitWidth></field><field><name>M1</name><description>Word length</description><bitOffset>28</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>CR2</name><displayName>CR2</displayName><description>Control register 2</description><addressOffset>0x4</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x0000</resetValue><fields><field><name>ADD4</name><description>Address of the USART node</description><bitOffset>28</bitOffset><bitWidth>4</bitWidth></field><field><name>ADD0</name><description>Address of the USART node</description><bitOffset>24</bitOffset><bitWidth>4</bitWidth></field><field><name>RTOEN</name><description>Receiver timeout enable</description><bitOffset>23</bitOffset><bitWidth>1</bitWidth></field><field><name>ABRMOD</name><description>Auto baud rate mode</description><bitOffset>21</bitOffset><bitWidth>2</bitWidth></field><field><name>ABREN</name><description>Auto baud rate enable</description><bitOffset>20</bitOffset><bitWidth>1</bitWidth></field><field><name>MSBFIRST</name><description>Most significant bit first</description><bitOffset>19</bitOffset><bitWidth>1</bitWidth></field><field><name>DATAINV</name><description>Binary data inversion</description><bitOffset>18</bitOffset><bitWidth>1</bitWidth></field><field><name>TXINV</name><description>TX pin active level inversion</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth></field><field><name>RXINV</name><description>RX pin active level inversion</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth></field><field><name>SWAP</name><description>Swap TX/RX pins</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>LINEN</name><description>LIN mode enable</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>STOP</name><description>STOP bits</description><bitOffset>12</bitOffset><bitWidth>2</bitWidth></field><field><name>CLKEN</name><description>Clock enable</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>CPOL</name><description>Clock polarity</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>CPHA</name><description>Clock phase</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>LBCL</name><description>Last bit clock pulse</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>LBDIE</name><description>LIN break detection interrupt enable</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>LBDL</name><description>LIN break detection length</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>ADDM7</name><description>7-bit Address Detection/4-bit Address Detection</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>CR3</name><displayName>CR3</displayName><description>Control register 3</description><addressOffset>0x8</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x0000</resetValue><fields><field><name>WUFIE</name><description>Wakeup from Stop mode interrupt enable</description><bitOffset>22</bitOffset><bitWidth>1</bitWidth></field><field><name>WUS</name><description>Wakeup from Stop mode interrupt flag selection</description><bitOffset>20</bitOffset><bitWidth>2</bitWidth></field><field><name>SCARCNT</name><description>Smartcard auto-retry count</description><bitOffset>17</bitOffset><bitWidth>3</bitWidth></field><field><name>DEP</name><description>Driver enable polarity selection</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>DEM</name><description>Driver enable mode</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>DDRE</name><description>DMA Disable on Reception Error</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>OVRDIS</name><description>Overrun Disable</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>ONEBIT</name><description>One sample bit method enable</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>CTSIE</name><description>CTS interrupt enable</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>CTSE</name><description>CTS enable</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>RTSE</name><description>RTS enable</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>DMAT</name><description>DMA enable transmitter</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>DMAR</name><description>DMA enable receiver</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>SCEN</name><description>Smartcard mode enable</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>NACK</name><description>Smartcard NACK enable</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>HDSEL</name><description>Half-duplex selection</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>IRLP</name><description>IrDA low-power</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>IREN</name><description>IrDA mode enable</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>EIE</name><description>Error interrupt enable</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>BRR</name><displayName>BRR</displayName><description>Baud rate register</description><addressOffset>0xC</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x0000</resetValue><fields><field><name>DIV_Mantissa</name><description>mantissa of USARTDIV</description><bitOffset>4</bitOffset><bitWidth>12</bitWidth></field><field><name>DIV_Fraction</name><description>fraction of USARTDIV</description><bitOffset>0</bitOffset><bitWidth>4</bitWidth></field></fields></register><register><name>GTPR</name><displayName>GTPR</displayName><description>Guard time and prescaler register</description><addressOffset>0x10</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x0000</resetValue><fields><field><name>GT</name><description>Guard time value</description><bitOffset>8</bitOffset><bitWidth>8</bitWidth></field><field><name>PSC</name><description>Prescaler value</description><bitOffset>0</bitOffset><bitWidth>8</bitWidth></field></fields></register><register><name>RTOR</name><displayName>RTOR</displayName><description>Receiver timeout register</description><addressOffset>0x14</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x0000</resetValue><fields><field><name>BLEN</name><description>Block Length</description><bitOffset>24</bitOffset><bitWidth>8</bitWidth></field><field><name>RTO</name><description>Receiver timeout value</description><bitOffset>0</bitOffset><bitWidth>24</bitWidth></field></fields></register><register><name>RQR</name><displayName>RQR</displayName><description>Request register</description><addressOffset>0x18</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x0000</resetValue><fields><field><name>TXFRQ</name><description>Transmit data flush request</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>RXFRQ</name><description>Receive data flush request</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>MMRQ</name><description>Mute mode request</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>SBKRQ</name><description>Send break request</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>ABRRQ</name><description>Auto baud rate request</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>ISR</name><displayName>ISR</displayName><description>Interrupt & status register</description><addressOffset>0x1C</addressOffset><size>0x20</size><access>read-only</access><resetValue>0x00C0</resetValue><fields><field><name>REACK</name><description>Receive enable acknowledge flag</description><bitOffset>22</bitOffset><bitWidth>1</bitWidth></field><field><name>TEACK</name><description>Transmit enable acknowledge flag</description><bitOffset>21</bitOffset><bitWidth>1</bitWidth></field><field><name>WUF</name><description>Wakeup from Stop mode flag</description><bitOffset>20</bitOffset><bitWidth>1</bitWidth></field><field><name>RWU</name><description>Receiver wakeup from Mute mode</description><bitOffset>19</bitOffset><bitWidth>1</bitWidth></field><field><name>SBKF</name><description>Send break flag</description><bitOffset>18</bitOffset><bitWidth>1</bitWidth></field><field><name>CMF</name><description>character match flag</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth></field><field><name>BUSY</name><description>Busy flag</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth></field><field><name>ABRF</name><description>Auto baud rate flag</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>ABRE</name><description>Auto baud rate error</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>EOBF</name><description>End of block flag</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>RTOF</name><description>Receiver timeout</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>CTS</name><description>CTS flag</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>CTSIF</name><description>CTS interrupt flag</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>LBDF</name><description>LIN break detection flag</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>TXE</name><description>Transmit data register empty</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>TC</name><description>Transmission complete</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>RXNE</name><description>Read data register not empty</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>IDLE</name><description>Idle line detected</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>ORE</name><description>Overrun error</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>NF</name><description>Noise detected flag</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>FE</name><description>Framing error</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>PE</name><description>Parity error</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>ICR</name><displayName>ICR</displayName><description>Interrupt flag clear register</description><addressOffset>0x20</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x0000</resetValue><fields><field><name>WUCF</name><description>Wakeup from Stop mode clear flag</description><bitOffset>20</bitOffset><bitWidth>1</bitWidth></field><field><name>CMCF</name><description>Character match clear flag</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth></field><field><name>EOBCF</name><description>End of timeout clear flag</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>RTOCF</name><description>Receiver timeout clear flag</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>CTSCF</name><description>CTS clear flag</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>LBDCF</name><description>LIN break detection clear flag</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>TCCF</name><description>Transmission complete clear flag</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>IDLECF</name><description>Idle line detected clear flag</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>ORECF</name><description>Overrun error clear flag</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>NCF</name><description>Noise detected clear flag</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>FECF</name><description>Framing error clear flag</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>PECF</name><description>Parity error clear flag</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>RDR</name><displayName>RDR</displayName><description>Receive data register</description><addressOffset>0x24</addressOffset><size>0x20</size><access>read-only</access><resetValue>0x0000</resetValue><fields><field><name>RDR</name><description>Receive data value</description><bitOffset>0</bitOffset><bitWidth>9</bitWidth></field></fields></register><register><name>TDR</name><displayName>TDR</displayName><description>Transmit data register</description><addressOffset>0x28</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x0000</resetValue><fields><field><name>TDR</name><description>Transmit data value</description><bitOffset>0</bitOffset><bitWidth>9</bitWidth></field></fields></register></registers></peripheral><peripheral derivedFrom="USART1"><name>USART2</name><baseAddress>0x40004400</baseAddress><interrupt><name>USART2</name><description>USART2 global interrupt</description><value>28</value></interrupt></peripheral><peripheral><name>COMP</name><description>Comparator</description><groupName>COMP</groupName><baseAddress>0x4001001C</baseAddress><addressBlock><offset>0x0</offset><size>0x400</size><usage>registers</usage></addressBlock><registers><register><name>CSR</name><displayName>CSR</displayName><description>control and status register</description><addressOffset>0x0</addressOffset><size>0x20</size><resetValue>0x00000000</resetValue><fields><field><name>COMP1EN</name><description>Comparator 1 enable</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>COMP1_INP_DAC</name><description>COMP1_INP_DAC</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>COMP1MODE</name><description>Comparator 1 mode</description><bitOffset>2</bitOffset><bitWidth>2</bitWidth><access>read-write</access></field><field><name>COMP1INSEL</name><description>Comparator 1 inverting input selection</description><bitOffset>4</bitOffset><bitWidth>3</bitWidth><access>read-write</access></field><field><name>COMP1OUTSEL</name><description>Comparator 1 output selection</description><bitOffset>8</bitOffset><bitWidth>3</bitWidth><access>read-write</access></field><field><name>COMP1POL</name><description>Comparator 1 output polarity</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>COMP1HYST</name><description>Comparator 1 hysteresis</description><bitOffset>12</bitOffset><bitWidth>2</bitWidth><access>read-write</access></field><field><name>COMP1OUT</name><description>Comparator 1 output</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth><access>read-only</access></field><field><name>COMP1LOCK</name><description>Comparator 1 lock</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>COMP2EN</name><description>Comparator 2 enable</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>COMP2MODE</name><description>Comparator 2 mode</description><bitOffset>18</bitOffset><bitWidth>2</bitWidth><access>read-write</access></field><field><name>COMP2INSEL</name><description>Comparator 2 inverting input selection</description><bitOffset>20</bitOffset><bitWidth>3</bitWidth><access>read-write</access></field><field><name>WNDWEN</name><description>Window mode enable</description><bitOffset>23</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>COMP2OUTSEL</name><description>Comparator 2 output selection</description><bitOffset>24</bitOffset><bitWidth>3</bitWidth><access>read-write</access></field><field><name>COMP2POL</name><description>Comparator 2 output polarity</description><bitOffset>27</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>COMP2HYST</name><description>Comparator 2 hysteresis</description><bitOffset>28</bitOffset><bitWidth>2</bitWidth><access>read-write</access></field><field><name>COMP2OUT</name><description>Comparator 2 output</description><bitOffset>30</bitOffset><bitWidth>1</bitWidth><access>read-only</access></field><field><name>COMP2LOCK</name><description>Comparator 2 lock</description><bitOffset>31</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field></fields></register></registers></peripheral><peripheral><name>RTC</name><description>Real-time clock</description><groupName>RTC</groupName><baseAddress>0x40002800</baseAddress><addressBlock><offset>0x0</offset><size>0x400</size><usage>registers</usage></addressBlock><interrupt><name>RTC</name><description>RTC interrupts</description><value>2</value></interrupt><registers><register><name>TR</name><displayName>TR</displayName><description>time register</description><addressOffset>0x0</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>PM</name><description>AM/PM notation</description><bitOffset>22</bitOffset><bitWidth>1</bitWidth></field><field><name>HT</name><description>Hour tens in BCD format</description><bitOffset>20</bitOffset><bitWidth>2</bitWidth></field><field><name>HU</name><description>Hour units in BCD format</description><bitOffset>16</bitOffset><bitWidth>4</bitWidth></field><field><name>MNT</name><description>Minute tens in BCD format</description><bitOffset>12</bitOffset><bitWidth>3</bitWidth></field><field><name>MNU</name><description>Minute units in BCD format</description><bitOffset>8</bitOffset><bitWidth>4</bitWidth></field><field><name>ST</name><description>Second tens in BCD format</description><bitOffset>4</bitOffset><bitWidth>3</bitWidth></field><field><name>SU</name><description>Second units in BCD format</description><bitOffset>0</bitOffset><bitWidth>4</bitWidth></field></fields></register><register><name>DR</name><displayName>DR</displayName><description>date register</description><addressOffset>0x4</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00002101</resetValue><fields><field><name>YT</name><description>Year tens in BCD format</description><bitOffset>20</bitOffset><bitWidth>4</bitWidth></field><field><name>YU</name><description>Year units in BCD format</description><bitOffset>16</bitOffset><bitWidth>4</bitWidth></field><field><name>WDU</name><description>Week day units</description><bitOffset>13</bitOffset><bitWidth>3</bitWidth></field><field><name>MT</name><description>Month tens in BCD format</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>MU</name><description>Month units in BCD format</description><bitOffset>8</bitOffset><bitWidth>4</bitWidth></field><field><name>DT</name><description>Date tens in BCD format</description><bitOffset>4</bitOffset><bitWidth>2</bitWidth></field><field><name>DU</name><description>Date units in BCD format</description><bitOffset>0</bitOffset><bitWidth>4</bitWidth></field></fields></register><register><name>CR</name><displayName>CR</displayName><description>control register</description><addressOffset>0x8</addressOffset><size>0x20</size><resetValue>0x00000000</resetValue><fields><field><name>TSEDGE</name><description>Time-stamp event active edge</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>REFCKON</name><description>RTC_REFIN reference clock detection enable (50 or 60 Hz)</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>BYPSHAD</name><description>Bypass the shadow registers</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>FMT</name><description>Hour format</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>ALRAE</name><description>Alarm A enable</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>TSE</name><description>timestamp enable</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>ALRAIE</name><description>Alarm A interrupt enable</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>TSIE</name><description>Time-stamp interrupt enable</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>ADD1H</name><description>Add 1 hour (summer time change)</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth><access>write-only</access></field><field><name>SUB1H</name><description>Subtract 1 hour (winter time change)</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth><access>write-only</access></field><field><name>BKP</name><description>Backup</description><bitOffset>18</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>COSEL</name><description>Calibration output selection</description><bitOffset>19</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>POL</name><description>Output polarity</description><bitOffset>20</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>OSEL</name><description>Output selection</description><bitOffset>21</bitOffset><bitWidth>2</bitWidth><access>read-write</access></field><field><name>COE</name><description>Calibration output enable</description><bitOffset>23</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field></fields></register><register><name>ISR</name><displayName>ISR</displayName><description>initialization and status register</description><addressOffset>0xC</addressOffset><size>0x20</size><resetValue>0x00000007</resetValue><fields><field><name>ALRAWF</name><description>Alarm A write flag</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth><access>read-only</access></field><field><name>SHPF</name><description>Shift operation pending</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>INITS</name><description>Initialization status flag</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth><access>read-only</access></field><field><name>RSF</name><description>Registers synchronization flag</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>INITF</name><description>Initialization flag</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth><access>read-only</access></field><field><name>INIT</name><description>Initialization mode</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>ALRAF</name><description>Alarm A flag</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>TSF</name><description>Time-stamp flag</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>TSOVF</name><description>Time-stamp overflow flag</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>TAMP1F</name><description>RTC_TAMP1 detection flag</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>TAMP2F</name><description>RTC_TAMP2 detection flag</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>RECALPF</name><description>Recalibration pending Flag</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth><access>read-only</access></field></fields></register><register><name>PRER</name><displayName>PRER</displayName><description>prescaler register</description><addressOffset>0x10</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x007F00FF</resetValue><fields><field><name>PREDIV_A</name><description>Asynchronous prescaler factor</description><bitOffset>16</bitOffset><bitWidth>7</bitWidth></field><field><name>PREDIV_S</name><description>Synchronous prescaler factor</description><bitOffset>0</bitOffset><bitWidth>15</bitWidth></field></fields></register><register><name>ALRMAR</name><displayName>ALRMAR</displayName><description>alarm A register</description><addressOffset>0x1C</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>MSK4</name><description>Alarm A date mask</description><bitOffset>31</bitOffset><bitWidth>1</bitWidth></field><field><name>WDSEL</name><description>Week day selection</description><bitOffset>30</bitOffset><bitWidth>1</bitWidth></field><field><name>DT</name><description>Date tens in BCD format.</description><bitOffset>28</bitOffset><bitWidth>2</bitWidth></field><field><name>DU</name><description>Date units or day in BCD format.</description><bitOffset>24</bitOffset><bitWidth>4</bitWidth></field><field><name>MSK3</name><description>Alarm A hours mask</description><bitOffset>23</bitOffset><bitWidth>1</bitWidth></field><field><name>PM</name><description>AM/PM notation</description><bitOffset>22</bitOffset><bitWidth>1</bitWidth></field><field><name>HT</name><description>Hour tens in BCD format.</description><bitOffset>20</bitOffset><bitWidth>2</bitWidth></field><field><name>HU</name><description>Hour units in BCD format.</description><bitOffset>16</bitOffset><bitWidth>4</bitWidth></field><field><name>MSK2</name><description>Alarm A minutes mask</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>MNT</name><description>Minute tens in BCD format.</description><bitOffset>12</bitOffset><bitWidth>3</bitWidth></field><field><name>MNU</name><description>Minute units in BCD format.</description><bitOffset>8</bitOffset><bitWidth>4</bitWidth></field><field><name>MSK1</name><description>Alarm A seconds mask</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>ST</name><description>Second tens in BCD format.</description><bitOffset>4</bitOffset><bitWidth>3</bitWidth></field><field><name>SU</name><description>Second units in BCD format.</description><bitOffset>0</bitOffset><bitWidth>4</bitWidth></field></fields></register><register><name>WPR</name><displayName>WPR</displayName><description>write protection register</description><addressOffset>0x24</addressOffset><size>0x20</size><access>write-only</access><resetValue>0x00000000</resetValue><fields><field><name>KEY</name><description>Write protection key</description><bitOffset>0</bitOffset><bitWidth>8</bitWidth></field></fields></register><register><name>SSR</name><displayName>SSR</displayName><description>sub second register</description><addressOffset>0x28</addressOffset><size>0x20</size><access>read-only</access><resetValue>0x00000000</resetValue><fields><field><name>SS</name><description>Sub second value</description><bitOffset>0</bitOffset><bitWidth>16</bitWidth></field></fields></register><register><name>SHIFTR</name><displayName>SHIFTR</displayName><description>shift control register</description><addressOffset>0x2C</addressOffset><size>0x20</size><access>write-only</access><resetValue>0x00000000</resetValue><fields><field><name>ADD1S</name><description>Reserved</description><bitOffset>31</bitOffset><bitWidth>1</bitWidth></field><field><name>SUBFS</name><description>Subtract a fraction of a second</description><bitOffset>0</bitOffset><bitWidth>15</bitWidth></field></fields></register><register><name>TSTR</name><displayName>TSTR</displayName><description>timestamp time register</description><addressOffset>0x30</addressOffset><size>0x20</size><access>read-only</access><resetValue>0x00000000</resetValue><fields><field><name>PM</name><description>AM/PM notation</description><bitOffset>22</bitOffset><bitWidth>1</bitWidth></field><field><name>HT</name><description>Hour tens in BCD format.</description><bitOffset>20</bitOffset><bitWidth>2</bitWidth></field><field><name>HU</name><description>Hour units in BCD format.</description><bitOffset>16</bitOffset><bitWidth>4</bitWidth></field><field><name>MNT</name><description>Minute tens in BCD format.</description><bitOffset>12</bitOffset><bitWidth>3</bitWidth></field><field><name>MNU</name><description>Minute units in BCD format.</description><bitOffset>8</bitOffset><bitWidth>4</bitWidth></field><field><name>ST</name><description>Second tens in BCD format.</description><bitOffset>4</bitOffset><bitWidth>3</bitWidth></field><field><name>SU</name><description>Second units in BCD format.</description><bitOffset>0</bitOffset><bitWidth>4</bitWidth></field></fields></register><register><name>TSDR</name><displayName>TSDR</displayName><description>timestamp date register</description><addressOffset>0x34</addressOffset><size>0x20</size><access>read-only</access><resetValue>0x00000000</resetValue><fields><field><name>WDU</name><description>Week day units</description><bitOffset>13</bitOffset><bitWidth>3</bitWidth></field><field><name>MT</name><description>Month tens in BCD format</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>MU</name><description>Month units in BCD format</description><bitOffset>8</bitOffset><bitWidth>4</bitWidth></field><field><name>DT</name><description>Date tens in BCD format</description><bitOffset>4</bitOffset><bitWidth>2</bitWidth></field><field><name>DU</name><description>Date units in BCD format</description><bitOffset>0</bitOffset><bitWidth>4</bitWidth></field></fields></register><register><name>TSSSR</name><displayName>TSSSR</displayName><description>time-stamp sub second register</description><addressOffset>0x38</addressOffset><size>0x20</size><access>read-only</access><resetValue>0x00000000</resetValue><fields><field><name>SS</name><description>Sub second value</description><bitOffset>0</bitOffset><bitWidth>16</bitWidth></field></fields></register><register><name>CALR</name><displayName>CALR</displayName><description>calibration register</description><addressOffset>0x3C</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>CALP</name><description>Use an 8-second calibration cycle period</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>CALW8</name><description>Use a 16-second calibration cycle period</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>CALW16</name><description>Reserved</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>CALM</name><description>Calibration minus</description><bitOffset>0</bitOffset><bitWidth>9</bitWidth></field></fields></register><register><name>TAFCR</name><displayName>TAFCR</displayName><description>tamper and alternate function configuration register</description><addressOffset>0x40</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>PC15MODE</name><description>PC15 mode</description><bitOffset>23</bitOffset><bitWidth>1</bitWidth></field><field><name>PC15VALUE</name><description>PC15 value</description><bitOffset>22</bitOffset><bitWidth>1</bitWidth></field><field><name>PC14MODE</name><description>PC14 mode</description><bitOffset>21</bitOffset><bitWidth>1</bitWidth></field><field><name>PC14VALUE</name><description>PC14 value</description><bitOffset>20</bitOffset><bitWidth>1</bitWidth></field><field><name>PC13MODE</name><description>PC13 mode</description><bitOffset>19</bitOffset><bitWidth>1</bitWidth></field><field><name>PC13VALUE</name><description>RTC_ALARM output type/PC13 value</description><bitOffset>18</bitOffset><bitWidth>1</bitWidth></field><field><name>TAMP_PUDIS</name><description>RTC_TAMPx pull-up disable</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>TAMP_PRCH</name><description>RTC_TAMPx precharge duration</description><bitOffset>13</bitOffset><bitWidth>2</bitWidth></field><field><name>TAMPFLT</name><description>RTC_TAMPx filter count</description><bitOffset>11</bitOffset><bitWidth>2</bitWidth></field><field><name>TAMPFREQ</name><description>Tamper sampling frequency</description><bitOffset>8</bitOffset><bitWidth>3</bitWidth></field><field><name>TAMPTS</name><description>Activate timestamp on tamper detection event</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>TAMP2_TRG</name><description>Active level for RTC_TAMP2 input</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>TAMP2E</name><description>RTC_TAMP2 input detection enable</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>TAMPIE</name><description>Tamper interrupt enable</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>TAMP1TRG</name><description>Active level for RTC_TAMP1 input</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>TAMP1E</name><description>RTC_TAMP1 input detection enable</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>ALRMASSR</name><displayName>ALRMASSR</displayName><description>alarm A sub second register</description><addressOffset>0x44</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>MASKSS</name><description>Mask the most-significant bits starting at this bit</description><bitOffset>24</bitOffset><bitWidth>4</bitWidth></field><field><name>SS</name><description>Sub seconds value</description><bitOffset>0</bitOffset><bitWidth>15</bitWidth></field></fields></register><register><name>BKP0R</name><displayName>BKP0R</displayName><description>backup register</description><addressOffset>0x50</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>BKP</name><description>BKP</description><bitOffset>0</bitOffset><bitWidth>32</bitWidth></field></fields></register><register><name>BKP1R</name><displayName>BKP1R</displayName><description>backup register</description><addressOffset>0x54</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>BKP</name><description>BKP</description><bitOffset>0</bitOffset><bitWidth>32</bitWidth></field></fields></register><register><name>BKP2R</name><displayName>BKP2R</displayName><description>backup register</description><addressOffset>0x58</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>BKP</name><description>BKP</description><bitOffset>0</bitOffset><bitWidth>32</bitWidth></field></fields></register><register><name>BKP3R</name><displayName>BKP3R</displayName><description>backup register</description><addressOffset>0x5C</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>BKP</name><description>BKP</description><bitOffset>0</bitOffset><bitWidth>32</bitWidth></field></fields></register><register><name>BKP4R</name><displayName>BKP4R</displayName><description>backup register</description><addressOffset>0x60</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>BKP</name><description>BKP</description><bitOffset>0</bitOffset><bitWidth>32</bitWidth></field></fields></register></registers></peripheral><peripheral><name>TIM16</name><description>General-purpose-timers</description><groupName>TIM</groupName><baseAddress>0x40014400</baseAddress><addressBlock><offset>0x0</offset><size>0x400</size><usage>registers</usage></addressBlock><interrupt><name>TIM16</name><description>TIM16 global interrupt</description><value>21</value></interrupt><registers><register><name>CR1</name><displayName>CR1</displayName><description>control register 1</description><addressOffset>0x0</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x0000</resetValue><fields><field><name>CKD</name><description>Clock division</description><bitOffset>8</bitOffset><bitWidth>2</bitWidth></field><field><name>ARPE</name><description>Auto-reload preload enable</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>OPM</name><description>One-pulse mode</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>URS</name><description>Update request source</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>UDIS</name><description>Update disable</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>CEN</name><description>Counter enable</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>CR2</name><displayName>CR2</displayName><description>control register 2</description><addressOffset>0x4</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x0000</resetValue><fields><field><name>OIS1N</name><description>Output Idle state 1</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>OIS1</name><description>Output Idle state 1</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>CCDS</name><description>Capture/compare DMA selection</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>CCUS</name><description>Capture/compare control update selection</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>CCPC</name><description>Capture/compare preloaded control</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>DIER</name><displayName>DIER</displayName><description>DMA/Interrupt enable register</description><addressOffset>0xC</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x0000</resetValue><fields><field><name>TDE</name><description>Trigger DMA request enable</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>CC1DE</name><description>Capture/Compare 1 DMA request enable</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>UDE</name><description>Update DMA request enable</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>BIE</name><description>Break interrupt enable</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>TIE</name><description>Trigger interrupt enable</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>COMIE</name><description>COM interrupt enable</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>CC1IE</name><description>Capture/Compare 1 interrupt enable</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>UIE</name><description>Update interrupt enable</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>SR</name><displayName>SR</displayName><description>status register</description><addressOffset>0x10</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x0000</resetValue><fields><field><name>CC1OF</name><description>Capture/Compare 1 overcapture flag</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>BIF</name><description>Break interrupt flag</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>TIF</name><description>Trigger interrupt flag</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>COMIF</name><description>COM interrupt flag</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>CC1IF</name><description>Capture/compare 1 interrupt flag</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>UIF</name><description>Update interrupt flag</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>EGR</name><displayName>EGR</displayName><description>event generation register</description><addressOffset>0x14</addressOffset><size>0x20</size><access>write-only</access><resetValue>0x0000</resetValue><fields><field><name>BG</name><description>Break generation</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>TG</name><description>Trigger generation</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>COMG</name><description>Capture/Compare control update generation</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>CC1G</name><description>Capture/compare 1 generation</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>UG</name><description>Update generation</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>CCMR1_Output</name><displayName>CCMR1_Output</displayName><description>capture/compare mode register (output mode)</description><addressOffset>0x18</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>OC1M</name><description>Output Compare 1 mode</description><bitOffset>4</bitOffset><bitWidth>3</bitWidth></field><field><name>OC1PE</name><description>Output Compare 1 preload enable</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>OC1FE</name><description>Output Compare 1 fast enable</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>CC1S</name><description>Capture/Compare 1 selection</description><bitOffset>0</bitOffset><bitWidth>2</bitWidth></field></fields></register><register><name>CCMR1_Input</name><displayName>CCMR1_Input</displayName><description>capture/compare mode register 1 (input mode)</description><alternateRegister>CCMR1_Output</alternateRegister><addressOffset>0x18</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>IC1F</name><description>Input capture 1 filter</description><bitOffset>4</bitOffset><bitWidth>4</bitWidth></field><field><name>IC1PSC</name><description>Input capture 1 prescaler</description><bitOffset>2</bitOffset><bitWidth>2</bitWidth></field><field><name>CC1S</name><description>Capture/Compare 1 selection</description><bitOffset>0</bitOffset><bitWidth>2</bitWidth></field></fields></register><register><name>CCER</name><displayName>CCER</displayName><description>capture/compare enable register</description><addressOffset>0x20</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x0000</resetValue><fields><field><name>CC1NP</name><description>Capture/Compare 1 output Polarity</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>CC1NE</name><description>Capture/Compare 1 complementary output enable</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>CC1P</name><description>Capture/Compare 1 output Polarity</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>CC1E</name><description>Capture/Compare 1 output enable</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>CNT</name><displayName>CNT</displayName><description>counter</description><addressOffset>0x24</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>CNT</name><description>counter value</description><bitOffset>0</bitOffset><bitWidth>16</bitWidth></field></fields></register><register><name>PSC</name><displayName>PSC</displayName><description>prescaler</description><addressOffset>0x28</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x0000</resetValue><fields><field><name>PSC</name><description>Prescaler value</description><bitOffset>0</bitOffset><bitWidth>16</bitWidth></field></fields></register><register><name>ARR</name><displayName>ARR</displayName><description>auto-reload register</description><addressOffset>0x2C</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>ARR</name><description>Auto-reload value</description><bitOffset>0</bitOffset><bitWidth>16</bitWidth></field></fields></register><register><name>RCR</name><displayName>RCR</displayName><description>repetition counter register</description><addressOffset>0x30</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x0000</resetValue><fields><field><name>REP</name><description>Repetition counter value</description><bitOffset>0</bitOffset><bitWidth>8</bitWidth></field></fields></register><register><name>CCR1</name><displayName>CCR1</displayName><description>capture/compare register 1</description><addressOffset>0x34</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>CCR1</name><description>Capture/Compare 1 value</description><bitOffset>0</bitOffset><bitWidth>16</bitWidth></field></fields></register><register><name>BDTR</name><displayName>BDTR</displayName><description>break and dead-time register</description><addressOffset>0x44</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x0000</resetValue><fields><field><name>MOE</name><description>Main output enable</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>AOE</name><description>Automatic output enable</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>BKP</name><description>Break polarity</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>BKE</name><description>Break enable</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>OSSR</name><description>Off-state selection for Run mode</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>OSSI</name><description>Off-state selection for Idle mode</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>LOCK</name><description>Lock configuration</description><bitOffset>8</bitOffset><bitWidth>2</bitWidth></field><field><name>DTG</name><description>Dead-time generator setup</description><bitOffset>0</bitOffset><bitWidth>8</bitWidth></field></fields></register><register><name>DCR</name><displayName>DCR</displayName><description>DMA control register</description><addressOffset>0x48</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x0000</resetValue><fields><field><name>DBL</name><description>DMA burst length</description><bitOffset>8</bitOffset><bitWidth>5</bitWidth></field><field><name>DBA</name><description>DMA base address</description><bitOffset>0</bitOffset><bitWidth>5</bitWidth></field></fields></register><register><name>DMAR</name><displayName>DMAR</displayName><description>DMA address for full transfer</description><addressOffset>0x4C</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x0000</resetValue><fields><field><name>DMAB</name><description>DMA register for burst accesses</description><bitOffset>0</bitOffset><bitWidth>16</bitWidth></field></fields></register></registers></peripheral><peripheral derivedFrom="TIM16"><name>TIM17</name><baseAddress>0x40014800</baseAddress><interrupt><name>TIM17</name><description>TIM17 global interrupt</description><value>22</value></interrupt></peripheral><peripheral><name>TSC</name><description>Touch sensing controller</description><groupName>TSC</groupName><baseAddress>0x40024000</baseAddress><addressBlock><offset>0x0</offset><size>0x400</size><usage>registers</usage></addressBlock><interrupt><name>TSC</name><description>Touch sensing interrupt</description><value>8</value></interrupt><registers><register><name>CR</name><displayName>CR</displayName><description>control register</description><addressOffset>0x0</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>CTPH</name><description>Charge transfer pulse high</description><bitOffset>28</bitOffset><bitWidth>4</bitWidth></field><field><name>CTPL</name><description>Charge transfer pulse low</description><bitOffset>24</bitOffset><bitWidth>4</bitWidth></field><field><name>SSD</name><description>Spread spectrum deviation</description><bitOffset>17</bitOffset><bitWidth>7</bitWidth></field><field><name>SSE</name><description>Spread spectrum enable</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth></field><field><name>SSPSC</name><description>Spread spectrum prescaler</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>PGPSC</name><description>pulse generator prescaler</description><bitOffset>12</bitOffset><bitWidth>3</bitWidth></field><field><name>MCV</name><description>Max count value</description><bitOffset>5</bitOffset><bitWidth>3</bitWidth></field><field><name>IODEF</name><description>I/O Default mode</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>SYNCPOL</name><description>Synchronization pin polarity</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>AM</name><description>Acquisition mode</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>START</name><description>Start a new acquisition</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>TSCE</name><description>Touch sensing controller enable</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>IER</name><displayName>IER</displayName><description>interrupt enable register</description><addressOffset>0x4</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>MCEIE</name><description>Max count error interrupt enable</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>EOAIE</name><description>End of acquisition interrupt enable</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>ICR</name><displayName>ICR</displayName><description>interrupt clear register</description><addressOffset>0x8</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>MCEIC</name><description>Max count error interrupt clear</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>EOAIC</name><description>End of acquisition interrupt clear</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>ISR</name><displayName>ISR</displayName><description>interrupt status register</description><addressOffset>0xC</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>MCEF</name><description>Max count error flag</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>EOAF</name><description>End of acquisition flag</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>IOHCR</name><displayName>IOHCR</displayName><description>I/O hysteresis control register</description><addressOffset>0x10</addressOffset><size>0x20</size><access>read-write</access><resetValue>0xFFFFFFFF</resetValue><fields><field><name>G6_IO4</name><description>G6_IO4 Schmitt trigger hysteresis mode</description><bitOffset>23</bitOffset><bitWidth>1</bitWidth></field><field><name>G6_IO3</name><description>G6_IO3 Schmitt trigger hysteresis mode</description><bitOffset>22</bitOffset><bitWidth>1</bitWidth></field><field><name>G6_IO2</name><description>G6_IO2 Schmitt trigger hysteresis mode</description><bitOffset>21</bitOffset><bitWidth>1</bitWidth></field><field><name>G6_IO1</name><description>G6_IO1 Schmitt trigger hysteresis mode</description><bitOffset>20</bitOffset><bitWidth>1</bitWidth></field><field><name>G5_IO4</name><description>G5_IO4 Schmitt trigger hysteresis mode</description><bitOffset>19</bitOffset><bitWidth>1</bitWidth></field><field><name>G5_IO3</name><description>G5_IO3 Schmitt trigger hysteresis mode</description><bitOffset>18</bitOffset><bitWidth>1</bitWidth></field><field><name>G5_IO2</name><description>G5_IO2 Schmitt trigger hysteresis mode</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth></field><field><name>G5_IO1</name><description>G5_IO1 Schmitt trigger hysteresis mode</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth></field><field><name>G4_IO4</name><description>G4_IO4 Schmitt trigger hysteresis mode</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>G4_IO3</name><description>G4_IO3 Schmitt trigger hysteresis mode</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>G4_IO2</name><description>G4_IO2 Schmitt trigger hysteresis mode</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>G4_IO1</name><description>G4_IO1 Schmitt trigger hysteresis mode</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>G3_IO4</name><description>G3_IO4 Schmitt trigger hysteresis mode</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>G3_IO3</name><description>G3_IO3 Schmitt trigger hysteresis mode</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>G3_IO2</name><description>G3_IO2 Schmitt trigger hysteresis mode</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>G3_IO1</name><description>G3_IO1 Schmitt trigger hysteresis mode</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>G2_IO4</name><description>G2_IO4 Schmitt trigger hysteresis mode</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>G2_IO3</name><description>G2_IO3 Schmitt trigger hysteresis mode</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>G2_IO2</name><description>G2_IO2 Schmitt trigger hysteresis mode</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>G2_IO1</name><description>G2_IO1 Schmitt trigger hysteresis mode</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>G1_IO4</name><description>G1_IO4 Schmitt trigger hysteresis mode</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>G1_IO3</name><description>G1_IO3 Schmitt trigger hysteresis mode</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>G1_IO2</name><description>G1_IO2 Schmitt trigger hysteresis mode</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>G1_IO1</name><description>G1_IO1 Schmitt trigger hysteresis mode</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>IOASCR</name><displayName>IOASCR</displayName><description>I/O analog switch control register</description><addressOffset>0x18</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>G6_IO4</name><description>G6_IO4 analog switch enable</description><bitOffset>23</bitOffset><bitWidth>1</bitWidth></field><field><name>G6_IO3</name><description>G6_IO3 analog switch enable</description><bitOffset>22</bitOffset><bitWidth>1</bitWidth></field><field><name>G6_IO2</name><description>G6_IO2 analog switch enable</description><bitOffset>21</bitOffset><bitWidth>1</bitWidth></field><field><name>G6_IO1</name><description>G6_IO1 analog switch enable</description><bitOffset>20</bitOffset><bitWidth>1</bitWidth></field><field><name>G5_IO4</name><description>G5_IO4 analog switch enable</description><bitOffset>19</bitOffset><bitWidth>1</bitWidth></field><field><name>G5_IO3</name><description>G5_IO3 analog switch enable</description><bitOffset>18</bitOffset><bitWidth>1</bitWidth></field><field><name>G5_IO2</name><description>G5_IO2 analog switch enable</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth></field><field><name>G5_IO1</name><description>G5_IO1 analog switch enable</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth></field><field><name>G4_IO4</name><description>G4_IO4 analog switch enable</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>G4_IO3</name><description>G4_IO3 analog switch enable</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>G4_IO2</name><description>G4_IO2 analog switch enable</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>G4_IO1</name><description>G4_IO1 analog switch enable</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>G3_IO4</name><description>G3_IO4 analog switch enable</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>G3_IO3</name><description>G3_IO3 analog switch enable</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>G3_IO2</name><description>G3_IO2 analog switch enable</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>G3_IO1</name><description>G3_IO1 analog switch enable</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>G2_IO4</name><description>G2_IO4 analog switch enable</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>G2_IO3</name><description>G2_IO3 analog switch enable</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>G2_IO2</name><description>G2_IO2 analog switch enable</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>G2_IO1</name><description>G2_IO1 analog switch enable</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>G1_IO4</name><description>G1_IO4 analog switch enable</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>G1_IO3</name><description>G1_IO3 analog switch enable</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>G1_IO2</name><description>G1_IO2 analog switch enable</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>G1_IO1</name><description>G1_IO1 analog switch enable</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>IOSCR</name><displayName>IOSCR</displayName><description>I/O sampling control register</description><addressOffset>0x20</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>G6_IO4</name><description>G6_IO4 sampling mode</description><bitOffset>23</bitOffset><bitWidth>1</bitWidth></field><field><name>G6_IO3</name><description>G6_IO3 sampling mode</description><bitOffset>22</bitOffset><bitWidth>1</bitWidth></field><field><name>G6_IO2</name><description>G6_IO2 sampling mode</description><bitOffset>21</bitOffset><bitWidth>1</bitWidth></field><field><name>G6_IO1</name><description>G6_IO1 sampling mode</description><bitOffset>20</bitOffset><bitWidth>1</bitWidth></field><field><name>G5_IO4</name><description>G5_IO4 sampling mode</description><bitOffset>19</bitOffset><bitWidth>1</bitWidth></field><field><name>G5_IO3</name><description>G5_IO3 sampling mode</description><bitOffset>18</bitOffset><bitWidth>1</bitWidth></field><field><name>G5_IO2</name><description>G5_IO2 sampling mode</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth></field><field><name>G5_IO1</name><description>G5_IO1 sampling mode</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth></field><field><name>G4_IO4</name><description>G4_IO4 sampling mode</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>G4_IO3</name><description>G4_IO3 sampling mode</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>G4_IO2</name><description>G4_IO2 sampling mode</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>G4_IO1</name><description>G4_IO1 sampling mode</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>G3_IO4</name><description>G3_IO4 sampling mode</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>G3_IO3</name><description>G3_IO3 sampling mode</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>G3_IO2</name><description>G3_IO2 sampling mode</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>G3_IO1</name><description>G3_IO1 sampling mode</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>G2_IO4</name><description>G2_IO4 sampling mode</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>G2_IO3</name><description>G2_IO3 sampling mode</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>G2_IO2</name><description>G2_IO2 sampling mode</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>G2_IO1</name><description>G2_IO1 sampling mode</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>G1_IO4</name><description>G1_IO4 sampling mode</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>G1_IO3</name><description>G1_IO3 sampling mode</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>G1_IO2</name><description>G1_IO2 sampling mode</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>G1_IO1</name><description>G1_IO1 sampling mode</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>IOCCR</name><displayName>IOCCR</displayName><description>I/O channel control register</description><addressOffset>0x28</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>G6_IO4</name><description>G6_IO4 channel mode</description><bitOffset>23</bitOffset><bitWidth>1</bitWidth></field><field><name>G6_IO3</name><description>G6_IO3 channel mode</description><bitOffset>22</bitOffset><bitWidth>1</bitWidth></field><field><name>G6_IO2</name><description>G6_IO2 channel mode</description><bitOffset>21</bitOffset><bitWidth>1</bitWidth></field><field><name>G6_IO1</name><description>G6_IO1 channel mode</description><bitOffset>20</bitOffset><bitWidth>1</bitWidth></field><field><name>G5_IO4</name><description>G5_IO4 channel mode</description><bitOffset>19</bitOffset><bitWidth>1</bitWidth></field><field><name>G5_IO3</name><description>G5_IO3 channel mode</description><bitOffset>18</bitOffset><bitWidth>1</bitWidth></field><field><name>G5_IO2</name><description>G5_IO2 channel mode</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth></field><field><name>G5_IO1</name><description>G5_IO1 channel mode</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth></field><field><name>G4_IO4</name><description>G4_IO4 channel mode</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>G4_IO3</name><description>G4_IO3 channel mode</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>G4_IO2</name><description>G4_IO2 channel mode</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>G4_IO1</name><description>G4_IO1 channel mode</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>G3_IO4</name><description>G3_IO4 channel mode</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>G3_IO3</name><description>G3_IO3 channel mode</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>G3_IO2</name><description>G3_IO2 channel mode</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>G3_IO1</name><description>G3_IO1 channel mode</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>G2_IO4</name><description>G2_IO4 channel mode</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>G2_IO3</name><description>G2_IO3 channel mode</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>G2_IO2</name><description>G2_IO2 channel mode</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>G2_IO1</name><description>G2_IO1 channel mode</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>G1_IO4</name><description>G1_IO4 channel mode</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>G1_IO3</name><description>G1_IO3 channel mode</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>G1_IO2</name><description>G1_IO2 channel mode</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>G1_IO1</name><description>G1_IO1 channel mode</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>IOGCSR</name><displayName>IOGCSR</displayName><description>I/O group control status register</description><addressOffset>0x30</addressOffset><size>0x20</size><resetValue>0x00000000</resetValue><fields><field><name>G8S</name><description>Analog I/O group x status</description><bitOffset>23</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>G7S</name><description>Analog I/O group x status</description><bitOffset>22</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>G6S</name><description>Analog I/O group x status</description><bitOffset>21</bitOffset><bitWidth>1</bitWidth><access>read-only</access></field><field><name>G5S</name><description>Analog I/O group x status</description><bitOffset>20</bitOffset><bitWidth>1</bitWidth><access>read-only</access></field><field><name>G4S</name><description>Analog I/O group x status</description><bitOffset>19</bitOffset><bitWidth>1</bitWidth><access>read-only</access></field><field><name>G3S</name><description>Analog I/O group x status</description><bitOffset>18</bitOffset><bitWidth>1</bitWidth><access>read-only</access></field><field><name>G2S</name><description>Analog I/O group x status</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth><access>read-only</access></field><field><name>G1S</name><description>Analog I/O group x status</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth><access>read-only</access></field><field><name>G8E</name><description>Analog I/O group x enable</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>G7E</name><description>Analog I/O group x enable</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>G6E</name><description>Analog I/O group x enable</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>G5E</name><description>Analog I/O group x enable</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>G4E</name><description>Analog I/O group x enable</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>G3E</name><description>Analog I/O group x enable</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>G2E</name><description>Analog I/O group x enable</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>G1E</name><description>Analog I/O group x enable</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field></fields></register><register><name>IOG1CR</name><displayName>IOG1CR</displayName><description>I/O group x counter register</description><addressOffset>0x34</addressOffset><size>0x20</size><access>read-only</access><resetValue>0x00000000</resetValue><fields><field><name>CNT</name><description>Counter value</description><bitOffset>0</bitOffset><bitWidth>14</bitWidth></field></fields></register><register><name>IOG2CR</name><displayName>IOG2CR</displayName><description>I/O group x counter register</description><addressOffset>0x38</addressOffset><size>0x20</size><access>read-only</access><resetValue>0x00000000</resetValue><fields><field><name>CNT</name><description>Counter value</description><bitOffset>0</bitOffset><bitWidth>14</bitWidth></field></fields></register><register><name>IOG3CR</name><displayName>IOG3CR</displayName><description>I/O group x counter register</description><addressOffset>0x3C</addressOffset><size>0x20</size><access>read-only</access><resetValue>0x00000000</resetValue><fields><field><name>CNT</name><description>Counter value</description><bitOffset>0</bitOffset><bitWidth>14</bitWidth></field></fields></register><register><name>IOG4CR</name><displayName>IOG4CR</displayName><description>I/O group x counter register</description><addressOffset>0x40</addressOffset><size>0x20</size><access>read-only</access><resetValue>0x00000000</resetValue><fields><field><name>CNT</name><description>Counter value</description><bitOffset>0</bitOffset><bitWidth>14</bitWidth></field></fields></register><register><name>IOG5CR</name><displayName>IOG5CR</displayName><description>I/O group x counter register</description><addressOffset>0x44</addressOffset><size>0x20</size><access>read-only</access><resetValue>0x00000000</resetValue><fields><field><name>CNT</name><description>Counter value</description><bitOffset>0</bitOffset><bitWidth>14</bitWidth></field></fields></register><register><name>IOG6CR</name><displayName>IOG6CR</displayName><description>I/O group x counter register</description><addressOffset>0x48</addressOffset><size>0x20</size><access>read-only</access><resetValue>0x00000000</resetValue><fields><field><name>CNT</name><description>Counter value</description><bitOffset>0</bitOffset><bitWidth>14</bitWidth></field></fields></register></registers></peripheral><peripheral><name>CEC</name><description>HDMI-CEC controller</description><groupName>CEC</groupName><baseAddress>0x40007800</baseAddress><addressBlock><offset>0x0</offset><size>0x400</size><usage>registers</usage></addressBlock><interrupt><name>CEC_CAN</name><description>CEC and CAN global interrupt</description><value>30</value></interrupt><registers><register><name>CR</name><displayName>CR</displayName><description>control register</description><addressOffset>0x0</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>TXEOM</name><description>Tx End Of Message</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>TXSOM</name><description>Tx start of message</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>CECEN</name><description>CEC Enable</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>CFGR</name><displayName>CFGR</displayName><description>configuration register</description><addressOffset>0x4</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>LBPEGEN</name><description>Generate Error-Bit on Long Bit Period Error</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>BREGEN</name><description>Generate error-bit on bit rising error</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>BRESTP</name><description>Rx-stop on bit rising error</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>RXTOL</name><description>Rx-Tolerance</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>SFT</name><description>Signal Free Time</description><bitOffset>5</bitOffset><bitWidth>3</bitWidth></field><field><name>LSTN</name><description>Listen mode</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>OAR</name><description>Own Address</description><bitOffset>0</bitOffset><bitWidth>4</bitWidth></field></fields></register><register><name>TXDR</name><displayName>TXDR</displayName><description>Tx data register</description><addressOffset>0x8</addressOffset><size>0x20</size><access>write-only</access><resetValue>0x00000000</resetValue><fields><field><name>TXD</name><description>Tx Data register</description><bitOffset>0</bitOffset><bitWidth>8</bitWidth></field></fields></register><register><name>RXDR</name><displayName>RXDR</displayName><description>Rx Data Register</description><addressOffset>0xC</addressOffset><size>0x20</size><access>read-only</access><resetValue>0x00000000</resetValue><fields><field><name>RXDR</name><description>CEC Rx Data Register</description><bitOffset>0</bitOffset><bitWidth>8</bitWidth></field></fields></register><register><name>ISR</name><displayName>ISR</displayName><description>Interrupt and Status Register</description><addressOffset>0x10</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>TXACKE</name><description>Tx-Missing acknowledge error</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>TXERR</name><description>Tx-Error</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>TXUDR</name><description>Tx-Buffer Underrun</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>TXEND</name><description>End of Transmission</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>TXBR</name><description>Tx-Byte Request</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>ARBLST</name><description>Arbitration Lost</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>RXACKE</name><description>Rx-Missing Acknowledge</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>LBPE</name><description>Rx-Long Bit Period Error</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>SBPE</name><description>Rx-Short Bit period error</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>BRE</name><description>Rx-Bit rising error</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>RXOVR</name><description>Rx-Overrun</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>RXEND</name><description>End Of Reception</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>RXBR</name><description>Rx-Byte Received</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>IER</name><displayName>IER</displayName><description>interrupt enable register</description><addressOffset>0x14</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>TXACKIE</name><description>Tx-Missing Acknowledge Error Interrupt Enable</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>TXERRIE</name><description>Tx-Error Interrupt Enable</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>TXUDRIE</name><description>Tx-Underrun interrupt enable</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>TXENDIE</name><description>Tx-End of message interrupt enable</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>TXBRIE</name><description>Tx-Byte Request Interrupt Enable</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>ARBLSTIE</name><description>Arbitration Lost Interrupt Enable</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>RXACKIE</name><description>Rx-Missing Acknowledge Error Interrupt Enable</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>LBPEIE</name><description>Long Bit Period Error Interrupt Enable</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>SBPEIE</name><description>Short Bit Period Error Interrupt Enable</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>BREIE</name><description>Bit Rising Error Interrupt Enable</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>RXOVRIE</name><description>Rx-Buffer Overrun Interrupt Enable</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>RXENDIE</name><description>End Of Reception Interrupt Enable</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>RXBRIE</name><description>Rx-Byte Received Interrupt Enable</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field></fields></register></registers></peripheral><peripheral><name>Flash</name><description>Flash</description><groupName>Flash</groupName><baseAddress>0x40022000</baseAddress><addressBlock><offset>0x0</offset><size>0x400</size><usage>registers</usage></addressBlock><interrupt><name>FLASH</name><description>Flash global interrupt</description><value>3</value></interrupt><registers><register><name>ACR</name><displayName>ACR</displayName><description>Flash access control register</description><addressOffset>0x0</addressOffset><size>0x20</size><resetValue>0x00000030</resetValue><fields><field><name>LATENCY</name><description>LATENCY</description><bitOffset>0</bitOffset><bitWidth>3</bitWidth><access>read-write</access></field><field><name>PRFTBE</name><description>PRFTBE</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>PRFTBS</name><description>PRFTBS</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth><access>read-only</access></field></fields></register><register><name>KEYR</name><displayName>KEYR</displayName><description>Flash key register</description><addressOffset>0x4</addressOffset><size>0x20</size><access>write-only</access><resetValue>0x00000000</resetValue><fields><field><name>FKEYR</name><description>Flash Key</description><bitOffset>0</bitOffset><bitWidth>32</bitWidth></field></fields></register><register><name>OPTKEYR</name><displayName>OPTKEYR</displayName><description>Flash option key register</description><addressOffset>0x8</addressOffset><size>0x20</size><access>write-only</access><resetValue>0x00000000</resetValue><fields><field><name>OPTKEYR</name><description>Option byte key</description><bitOffset>0</bitOffset><bitWidth>32</bitWidth></field></fields></register><register><name>SR</name><displayName>SR</displayName><description>Flash status register</description><addressOffset>0xC</addressOffset><size>0x20</size><resetValue>0x00000000</resetValue><fields><field><name>EOP</name><description>End of operation</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>WRPRT</name><description>Write protection error</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>PGERR</name><description>Programming error</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>BSY</name><description>Busy</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth><access>read-only</access></field></fields></register><register><name>CR</name><displayName>CR</displayName><description>Flash control register</description><addressOffset>0x10</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000080</resetValue><fields><field><name>FORCE_OPTLOAD</name><description>Force option byte loading</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>EOPIE</name><description>End of operation interrupt enable</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>ERRIE</name><description>Error interrupt enable</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>OPTWRE</name><description>Option bytes write enable</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>LOCK</name><description>Lock</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>STRT</name><description>Start</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>OPTER</name><description>Option byte erase</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>OPTPG</name><description>Option byte programming</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>MER</name><description>Mass erase</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>PER</name><description>Page erase</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>PG</name><description>Programming</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>AR</name><displayName>AR</displayName><description>Flash address register</description><addressOffset>0x14</addressOffset><size>0x20</size><access>write-only</access><resetValue>0x00000000</resetValue><fields><field><name>FAR</name><description>Flash address</description><bitOffset>0</bitOffset><bitWidth>32</bitWidth></field></fields></register><register><name>OBR</name><displayName>OBR</displayName><description>Option byte register</description><addressOffset>0x1C</addressOffset><size>0x20</size><access>read-only</access><resetValue>0x03FFFFF2</resetValue><fields><field><name>Data1</name><description>Data1</description><bitOffset>24</bitOffset><bitWidth>8</bitWidth></field><field><name>Data0</name><description>Data0</description><bitOffset>16</bitOffset><bitWidth>8</bitWidth></field><field><name>VDDA_MONITOR</name><description>VDDA_MONITOR</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>BOOT1</name><description>BOOT1</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>nRST_STDBY</name><description>nRST_STDBY</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>nRST_STOP</name><description>nRST_STOP</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>WDG_SW</name><description>WDG_SW</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>LEVEL2_PROT</name><description>Level 2 protection status</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>LEVEL1_PROT</name><description>Level 1 protection status</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>OPTERR</name><description>Option byte error</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>WRPR</name><displayName>WRPR</displayName><description>Write protection register</description><addressOffset>0x20</addressOffset><size>0x20</size><access>read-only</access><resetValue>0xFFFFFFFF</resetValue><fields><field><name>WRP</name><description>Write protect</description><bitOffset>0</bitOffset><bitWidth>32</bitWidth></field></fields></register></registers></peripheral><peripheral><name>DBGMCU</name><description>Debug support</description><groupName>DBGMCU</groupName><baseAddress>0x40015800</baseAddress><addressBlock><offset>0x0</offset><size>0x400</size><usage>registers</usage></addressBlock><registers><register><name>IDCODE</name><displayName>IDCODE</displayName><description>MCU Device ID Code Register</description><addressOffset>0x0</addressOffset><size>0x20</size><access>read-only</access><resetValue>0x0</resetValue><fields><field><name>DEV_ID</name><description>Device Identifier</description><bitOffset>0</bitOffset><bitWidth>12</bitWidth></field><field><name>DIV_ID</name><description>Division Identifier</description><bitOffset>12</bitOffset><bitWidth>4</bitWidth></field><field><name>REV_ID</name><description>Revision Identifier</description><bitOffset>16</bitOffset><bitWidth>16</bitWidth></field></fields></register><register><name>CR</name><displayName>CR</displayName><description>Debug MCU Configuration Register</description><addressOffset>0x4</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x0</resetValue><fields><field><name>DBG_STOP</name><description>Debug Stop Mode</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>DBG_STANDBY</name><description>Debug Standby Mode</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>APBLFZ</name><displayName>APBLFZ</displayName><description>APB Low Freeze Register</description><addressOffset>0x8</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x0</resetValue><fields><field><name>DBG_TIMER2_STOP</name><description>Debug Timer 2 stopped when Core is halted</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field><field><name>DBG_TIMER3_STOP</name><description>Debug Timer 3 stopped when Core is halted</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>DBG_TIMER6_STOP</name><description>Debug Timer 6 stopped when Core is halted</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>DBG_TIMER14_STOP</name><description>Debug Timer 14 stopped when Core is halted</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>DBG_RTC_STOP</name><description>Debug RTC stopped when Core is halted</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>DBG_WWDG_STOP</name><description>Debug Window Wachdog stopped when Core is halted</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>DBG_IWDG_STOP</name><description>Debug Independent Wachdog stopped when Core is halted</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>I2C1_SMBUS_TIMEOUT</name><description>SMBUS timeout mode stopped when Core is halted</description><bitOffset>21</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>APBHFZ</name><displayName>APBHFZ</displayName><description>APB High Freeze Register</description><addressOffset>0xC</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x0</resetValue><fields><field><name>DBG_TIMER1_STOP</name><description>Debug Timer 1 stopped when Core is halted</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>DBG_TIMER15_STO</name><description>Debug Timer 15 stopped when Core is halted</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth></field><field><name>DBG_TIMER16_STO</name><description>Debug Timer 16 stopped when Core is halted</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth></field><field><name>DBG_TIMER17_STO</name><description>Debug Timer 17 stopped when Core is halted</description><bitOffset>18</bitOffset><bitWidth>1</bitWidth></field></fields></register></registers></peripheral><peripheral><name>USB</name><description>Universal serial bus full-speed device interface</description><groupName>USB</groupName><baseAddress>0x40005C00</baseAddress><addressBlock><offset>0x0</offset><size>0x400</size><usage>registers</usage></addressBlock><registers><register><name>EP0R</name><displayName>EP0R</displayName><description>endpoint 0 register</description><addressOffset>0x0</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>EA</name><description>Endpoint address</description><bitOffset>0</bitOffset><bitWidth>4</bitWidth></field><field><name>STAT_TX</name><description>Status bits, for transmission transfers</description><bitOffset>4</bitOffset><bitWidth>2</bitWidth></field><field><name>DTOG_TX</name><description>Data Toggle, for transmission transfers</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>CTR_TX</name><description>Correct Transfer for transmission</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>EP_KIND</name><description>Endpoint kind</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>EP_TYPE</name><description>Endpoint type</description><bitOffset>9</bitOffset><bitWidth>2</bitWidth></field><field><name>SETUP</name><description>Setup transaction completed</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>STAT_RX</name><description>Status bits, for reception transfers</description><bitOffset>12</bitOffset><bitWidth>2</bitWidth></field><field><name>DTOG_RX</name><description>Data Toggle, for reception transfers</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>CTR_RX</name><description>Correct transfer for reception</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>EP1R</name><displayName>EP1R</displayName><description>endpoint 1 register</description><addressOffset>0x4</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>EA</name><description>Endpoint address</description><bitOffset>0</bitOffset><bitWidth>4</bitWidth></field><field><name>STAT_TX</name><description>Status bits, for transmission transfers</description><bitOffset>4</bitOffset><bitWidth>2</bitWidth></field><field><name>DTOG_TX</name><description>Data Toggle, for transmission transfers</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>CTR_TX</name><description>Correct Transfer for transmission</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>EP_KIND</name><description>Endpoint kind</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>EP_TYPE</name><description>Endpoint type</description><bitOffset>9</bitOffset><bitWidth>2</bitWidth></field><field><name>SETUP</name><description>Setup transaction completed</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>STAT_RX</name><description>Status bits, for reception transfers</description><bitOffset>12</bitOffset><bitWidth>2</bitWidth></field><field><name>DTOG_RX</name><description>Data Toggle, for reception transfers</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>CTR_RX</name><description>Correct transfer for reception</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>EP2R</name><displayName>EP2R</displayName><description>endpoint 2 register</description><addressOffset>0x8</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>EA</name><description>Endpoint address</description><bitOffset>0</bitOffset><bitWidth>4</bitWidth></field><field><name>STAT_TX</name><description>Status bits, for transmission transfers</description><bitOffset>4</bitOffset><bitWidth>2</bitWidth></field><field><name>DTOG_TX</name><description>Data Toggle, for transmission transfers</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>CTR_TX</name><description>Correct Transfer for transmission</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>EP_KIND</name><description>Endpoint kind</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>EP_TYPE</name><description>Endpoint type</description><bitOffset>9</bitOffset><bitWidth>2</bitWidth></field><field><name>SETUP</name><description>Setup transaction completed</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>STAT_RX</name><description>Status bits, for reception transfers</description><bitOffset>12</bitOffset><bitWidth>2</bitWidth></field><field><name>DTOG_RX</name><description>Data Toggle, for reception transfers</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>CTR_RX</name><description>Correct transfer for reception</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>EP3R</name><displayName>EP3R</displayName><description>endpoint 3 register</description><addressOffset>0xC</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>EA</name><description>Endpoint address</description><bitOffset>0</bitOffset><bitWidth>4</bitWidth></field><field><name>STAT_TX</name><description>Status bits, for transmission transfers</description><bitOffset>4</bitOffset><bitWidth>2</bitWidth></field><field><name>DTOG_TX</name><description>Data Toggle, for transmission transfers</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>CTR_TX</name><description>Correct Transfer for transmission</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>EP_KIND</name><description>Endpoint kind</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>EP_TYPE</name><description>Endpoint type</description><bitOffset>9</bitOffset><bitWidth>2</bitWidth></field><field><name>SETUP</name><description>Setup transaction completed</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>STAT_RX</name><description>Status bits, for reception transfers</description><bitOffset>12</bitOffset><bitWidth>2</bitWidth></field><field><name>DTOG_RX</name><description>Data Toggle, for reception transfers</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>CTR_RX</name><description>Correct transfer for reception</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>EP4R</name><displayName>EP4R</displayName><description>endpoint 4 register</description><addressOffset>0x10</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>EA</name><description>Endpoint address</description><bitOffset>0</bitOffset><bitWidth>4</bitWidth></field><field><name>STAT_TX</name><description>Status bits, for transmission transfers</description><bitOffset>4</bitOffset><bitWidth>2</bitWidth></field><field><name>DTOG_TX</name><description>Data Toggle, for transmission transfers</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>CTR_TX</name><description>Correct Transfer for transmission</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>EP_KIND</name><description>Endpoint kind</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>EP_TYPE</name><description>Endpoint type</description><bitOffset>9</bitOffset><bitWidth>2</bitWidth></field><field><name>SETUP</name><description>Setup transaction completed</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>STAT_RX</name><description>Status bits, for reception transfers</description><bitOffset>12</bitOffset><bitWidth>2</bitWidth></field><field><name>DTOG_RX</name><description>Data Toggle, for reception transfers</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>CTR_RX</name><description>Correct transfer for reception</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>EP5R</name><displayName>EP5R</displayName><description>endpoint 5 register</description><addressOffset>0x14</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>EA</name><description>Endpoint address</description><bitOffset>0</bitOffset><bitWidth>4</bitWidth></field><field><name>STAT_TX</name><description>Status bits, for transmission transfers</description><bitOffset>4</bitOffset><bitWidth>2</bitWidth></field><field><name>DTOG_TX</name><description>Data Toggle, for transmission transfers</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>CTR_TX</name><description>Correct Transfer for transmission</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>EP_KIND</name><description>Endpoint kind</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>EP_TYPE</name><description>Endpoint type</description><bitOffset>9</bitOffset><bitWidth>2</bitWidth></field><field><name>SETUP</name><description>Setup transaction completed</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>STAT_RX</name><description>Status bits, for reception transfers</description><bitOffset>12</bitOffset><bitWidth>2</bitWidth></field><field><name>DTOG_RX</name><description>Data Toggle, for reception transfers</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>CTR_RX</name><description>Correct transfer for reception</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>EP6R</name><displayName>EP6R</displayName><description>endpoint 6 register</description><addressOffset>0x18</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>EA</name><description>Endpoint address</description><bitOffset>0</bitOffset><bitWidth>4</bitWidth></field><field><name>STAT_TX</name><description>Status bits, for transmission transfers</description><bitOffset>4</bitOffset><bitWidth>2</bitWidth></field><field><name>DTOG_TX</name><description>Data Toggle, for transmission transfers</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>CTR_TX</name><description>Correct Transfer for transmission</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>EP_KIND</name><description>Endpoint kind</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>EP_TYPE</name><description>Endpoint type</description><bitOffset>9</bitOffset><bitWidth>2</bitWidth></field><field><name>SETUP</name><description>Setup transaction completed</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>STAT_RX</name><description>Status bits, for reception transfers</description><bitOffset>12</bitOffset><bitWidth>2</bitWidth></field><field><name>DTOG_RX</name><description>Data Toggle, for reception transfers</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>CTR_RX</name><description>Correct transfer for reception</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>EP7R</name><displayName>EP7R</displayName><description>endpoint 7 register</description><addressOffset>0x1C</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>EA</name><description>Endpoint address</description><bitOffset>0</bitOffset><bitWidth>4</bitWidth></field><field><name>STAT_TX</name><description>Status bits, for transmission transfers</description><bitOffset>4</bitOffset><bitWidth>2</bitWidth></field><field><name>DTOG_TX</name><description>Data Toggle, for transmission transfers</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>CTR_TX</name><description>Correct Transfer for transmission</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>EP_KIND</name><description>Endpoint kind</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>EP_TYPE</name><description>Endpoint type</description><bitOffset>9</bitOffset><bitWidth>2</bitWidth></field><field><name>SETUP</name><description>Setup transaction completed</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>STAT_RX</name><description>Status bits, for reception transfers</description><bitOffset>12</bitOffset><bitWidth>2</bitWidth></field><field><name>DTOG_RX</name><description>Data Toggle, for reception transfers</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>CTR_RX</name><description>Correct transfer for reception</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>CNTR</name><displayName>CNTR</displayName><description>control register</description><addressOffset>0x40</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000003</resetValue><fields><field><name>FRES</name><description>Force USB Reset</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field><field><name>PDWN</name><description>Power down</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>LPMODE</name><description>Low-power mode</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>FSUSP</name><description>Force suspend</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>RESUME</name><description>Resume request</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>L1RESUME</name><description>LPM L1 Resume request</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>L1REQM</name><description>LPM L1 state request interrupt mask</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>ESOFM</name><description>Expected start of frame interrupt mask</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>SOFM</name><description>Start of frame interrupt mask</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>RESETM</name><description>USB reset interrupt mask</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>SUSPM</name><description>Suspend mode interrupt mask</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>WKUPM</name><description>Wakeup interrupt mask</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>ERRM</name><description>Error interrupt mask</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>PMAOVRM</name><description>Packet memory area over / underrun interrupt mask</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>CTRM</name><description>Correct transfer interrupt mask</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>ISTR</name><displayName>ISTR</displayName><description>interrupt status register</description><addressOffset>0x44</addressOffset><size>0x20</size><resetValue>0x00000000</resetValue><fields><field><name>EP_ID</name><description>Endpoint Identifier</description><bitOffset>0</bitOffset><bitWidth>4</bitWidth><access>read-only</access></field><field><name>DIR</name><description>Direction of transaction</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth><access>read-only</access></field><field><name>L1REQ</name><description>LPM L1 state request</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>ESOF</name><description>Expected start frame</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>SOF</name><description>start of frame</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>RESET</name><description>reset request</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>SUSP</name><description>Suspend mode request</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>WKUP</name><description>Wakeup</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>ERR</name><description>Error</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>PMAOVR</name><description>Packet memory area over / underrun</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>CTR</name><description>Correct transfer</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth><access>read-only</access></field></fields></register><register><name>FNR</name><displayName>FNR</displayName><description>frame number register</description><addressOffset>0x48</addressOffset><size>0x20</size><access>read-only</access><resetValue>0x0000</resetValue><fields><field><name>FN</name><description>Frame number</description><bitOffset>0</bitOffset><bitWidth>11</bitWidth></field><field><name>LSOF</name><description>Lost SOF</description><bitOffset>11</bitOffset><bitWidth>2</bitWidth></field><field><name>LCK</name><description>Locked</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>RXDM</name><description>Receive data - line status</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>RXDP</name><description>Receive data + line status</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>DADDR</name><displayName>DADDR</displayName><description>device address</description><addressOffset>0x4C</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x0000</resetValue><fields><field><name>ADD</name><description>Device address</description><bitOffset>0</bitOffset><bitWidth>7</bitWidth></field><field><name>EF</name><description>Enable function</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>BTABLE</name><displayName>BTABLE</displayName><description>Buffer table address</description><addressOffset>0x50</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x0000</resetValue><fields><field><name>BTABLE</name><description>Buffer table</description><bitOffset>3</bitOffset><bitWidth>13</bitWidth></field></fields></register><register><name>LPMCSR</name><displayName>LPMCSR</displayName><description>LPM control and status register</description><addressOffset>0x54</addressOffset><size>0x20</size><resetValue>0x0000</resetValue><fields><field><name>LPMEN</name><description>LPM support enable</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>LPMACK</name><description>LPM Token acknowledge enable</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>REMWAKE</name><description>bRemoteWake value</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth><access>read-only</access></field><field><name>BESL</name><description>BESL value</description><bitOffset>4</bitOffset><bitWidth>4</bitWidth><access>read-only</access></field></fields></register><register><name>BCDR</name><displayName>BCDR</displayName><description>Battery charging detector</description><addressOffset>0x58</addressOffset><size>0x20</size><resetValue>0x0000</resetValue><fields><field><name>BCDEN</name><description>Battery charging detector (BCD) enable</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>DCDEN</name><description>Data contact detection (DCD) mode enable</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>PDEN</name><description>Primary detection (PD) mode enable</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>SDEN</name><description>Secondary detection (SD) mode enable</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>DCDET</name><description>Data contact detection (DCD) status</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth><access>read-only</access></field><field><name>PDET</name><description>Primary detection (PD) status</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth><access>read-only</access></field><field><name>SDET</name><description>Secondary detection (SD) status</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth><access>read-only</access></field><field><name>PS2DET</name><description>DM pull-up detection status</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth><access>read-only</access></field><field><name>DPPU</name><description>DP pull-up control</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field></fields></register></registers></peripheral><peripheral><name>CRS</name><description>Clock recovery system</description><groupName>CRS</groupName><baseAddress>0x40006C00</baseAddress><addressBlock><offset>0x0</offset><size>0x400</size><usage>registers</usage></addressBlock><registers><register><name>CR</name><displayName>CR</displayName><description>control register</description><addressOffset>0x0</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00002000</resetValue><fields><field><name>TRIM</name><description>HSI48 oscillator smooth trimming</description><bitOffset>8</bitOffset><bitWidth>6</bitWidth></field><field><name>SWSYNC</name><description>Generate software SYNC event</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>AUTOTRIMEN</name><description>Automatic trimming enable</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>CEN</name><description>Frequency error counter enable</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>ESYNCIE</name><description>Expected SYNC interrupt enable</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>ERRIE</name><description>Synchronization or trimming error interrupt enable</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>SYNCWARNIE</name><description>SYNC warning interrupt enable</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>SYNCOKIE</name><description>SYNC event OK interrupt enable</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>CFGR</name><displayName>CFGR</displayName><description>configuration register</description><addressOffset>0x4</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x2022BB7F</resetValue><fields><field><name>SYNCPOL</name><description>SYNC polarity selection</description><bitOffset>31</bitOffset><bitWidth>1</bitWidth></field><field><name>SYNCSRC</name><description>SYNC signal source selection</description><bitOffset>28</bitOffset><bitWidth>2</bitWidth></field><field><name>SYNCDIV</name><description>SYNC divider</description><bitOffset>24</bitOffset><bitWidth>3</bitWidth></field><field><name>FELIM</name><description>Frequency error limit</description><bitOffset>16</bitOffset><bitWidth>8</bitWidth></field><field><name>RELOAD</name><description>Counter reload value</description><bitOffset>0</bitOffset><bitWidth>16</bitWidth></field></fields></register><register><name>ISR</name><displayName>ISR</displayName><description>interrupt and status register</description><addressOffset>0x8</addressOffset><size>0x20</size><access>read-only</access><resetValue>0x00000000</resetValue><fields><field><name>FECAP</name><description>Frequency error capture</description><bitOffset>16</bitOffset><bitWidth>16</bitWidth></field><field><name>FEDIR</name><description>Frequency error direction</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>TRIMOVF</name><description>Trimming overflow or underflow</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>SYNCMISS</name><description>SYNC missed</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>SYNCERR</name><description>SYNC error</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>ESYNCF</name><description>Expected SYNC flag</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>ERRF</name><description>Error flag</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>SYNCWARNF</name><description>SYNC warning flag</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>SYNCOKF</name><description>SYNC event OK flag</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>ICR</name><displayName>ICR</displayName><description>interrupt flag clear register</description><addressOffset>0xC</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>ESYNCC</name><description>Expected SYNC clear flag</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>ERRC</name><description>Error clear flag</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>SYNCWARNC</name><description>SYNC warning clear flag</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>SYNCOKC</name><description>SYNC event OK clear flag</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field></fields></register></registers></peripheral><peripheral><name>CAN</name><description>Controller area network</description><groupName>CAN</groupName><baseAddress>0x40006400</baseAddress><addressBlock><offset>0x0</offset><size>0x400</size><usage>registers</usage></addressBlock><interrupt><name>USB</name><description>USB global interrupt</description><value>31</value></interrupt><registers><register><name>CAN_MCR</name><displayName>CAN_MCR</displayName><description>CAN_MCR</description><addressOffset>0x0</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>DBF</name><description>DBF</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth></field><field><name>RESET</name><description>RESET</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>TTCM</name><description>TTCM</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>ABOM</name><description>ABOM</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>AWUM</name><description>AWUM</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>NART</name><description>NART</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>RFLM</name><description>RFLM</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>TXFP</name><description>TXFP</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>SLEEP</name><description>SLEEP</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>INRQ</name><description>INRQ</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>CAN_MSR</name><displayName>CAN_MSR</displayName><description>CAN_MSR</description><addressOffset>0x4</addressOffset><size>0x20</size><resetValue>0x00000000</resetValue><fields><field><name>RX</name><description>RX</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth><access>read-only</access></field><field><name>SAMP</name><description>SAMP</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth><access>read-only</access></field><field><name>RXM</name><description>RXM</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth><access>read-only</access></field><field><name>TXM</name><description>TXM</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth><access>read-only</access></field><field><name>SLAKI</name><description>SLAKI</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>WKUI</name><description>WKUI</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>ERRI</name><description>ERRI</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>SLAK</name><description>SLAK</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth><access>read-only</access></field><field><name>INAK</name><description>INAK</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth><access>read-only</access></field></fields></register><register><name>CAN_TSR</name><displayName>CAN_TSR</displayName><description>CAN_TSR</description><addressOffset>0x8</addressOffset><size>0x20</size><resetValue>0x00000000</resetValue><fields><field><name>LOW2</name><description>Lowest priority flag for mailbox 2</description><bitOffset>31</bitOffset><bitWidth>1</bitWidth><access>read-only</access></field><field><name>LOW1</name><description>Lowest priority flag for mailbox 1</description><bitOffset>30</bitOffset><bitWidth>1</bitWidth><access>read-only</access></field><field><name>LOW0</name><description>Lowest priority flag for mailbox 0</description><bitOffset>29</bitOffset><bitWidth>1</bitWidth><access>read-only</access></field><field><name>TME2</name><description>Lowest priority flag for mailbox 2</description><bitOffset>28</bitOffset><bitWidth>1</bitWidth><access>read-only</access></field><field><name>TME1</name><description>Lowest priority flag for mailbox 1</description><bitOffset>27</bitOffset><bitWidth>1</bitWidth><access>read-only</access></field><field><name>TME0</name><description>Lowest priority flag for mailbox 0</description><bitOffset>26</bitOffset><bitWidth>1</bitWidth><access>read-only</access></field><field><name>CODE</name><description>CODE</description><bitOffset>24</bitOffset><bitWidth>2</bitWidth><access>read-only</access></field><field><name>ABRQ2</name><description>ABRQ2</description><bitOffset>23</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>TERR2</name><description>TERR2</description><bitOffset>19</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>ALST2</name><description>ALST2</description><bitOffset>18</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>TXOK2</name><description>TXOK2</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>RQCP2</name><description>RQCP2</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>ABRQ1</name><description>ABRQ1</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>TERR1</name><description>TERR1</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>ALST1</name><description>ALST1</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>TXOK1</name><description>TXOK1</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>RQCP1</name><description>RQCP1</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>ABRQ0</name><description>ABRQ0</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>TERR0</name><description>TERR0</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>ALST0</name><description>ALST0</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>TXOK0</name><description>TXOK0</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>RQCP0</name><description>RQCP0</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field></fields></register><register><name>CAN_RF0R</name><displayName>CAN_RF0R</displayName><description>CAN_RF0R</description><addressOffset>0xC</addressOffset><size>0x20</size><resetValue>0x00000000</resetValue><fields><field><name>RFOM0</name><description>RFOM0</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>FOVR0</name><description>FOVR0</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>FULL0</name><description>FULL0</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>FMP0</name><description>FMP0</description><bitOffset>0</bitOffset><bitWidth>2</bitWidth><access>read-only</access></field></fields></register><register><name>CAN_RF1R</name><displayName>CAN_RF1R</displayName><description>CAN_RF1R</description><addressOffset>0x10</addressOffset><size>0x20</size><resetValue>0x00000000</resetValue><fields><field><name>RFOM1</name><description>RFOM1</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>FOVR1</name><description>FOVR1</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>FULL1</name><description>FULL1</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth><access>read-write</access></field><field><name>FMP1</name><description>FMP1</description><bitOffset>0</bitOffset><bitWidth>2</bitWidth><access>read-only</access></field></fields></register><register><name>CAN_IER</name><displayName>CAN_IER</displayName><description>CAN_IER</description><addressOffset>0x14</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>SLKIE</name><description>SLKIE</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth></field><field><name>WKUIE</name><description>WKUIE</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth></field><field><name>ERRIE</name><description>ERRIE</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>LECIE</name><description>LECIE</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>BOFIE</name><description>BOFIE</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>EPVIE</name><description>EPVIE</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>EWGIE</name><description>EWGIE</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>FOVIE1</name><description>FOVIE1</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>FFIE1</name><description>FFIE1</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>FMPIE1</name><description>FMPIE1</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>FOVIE0</name><description>FOVIE0</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>FFIE0</name><description>FFIE0</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>FMPIE0</name><description>FMPIE0</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>TMEIE</name><description>TMEIE</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>CAN_ESR</name><displayName>CAN_ESR</displayName><description>CAN_ESR</description><addressOffset>0x18</addressOffset><size>0x20</size><resetValue>0x00000000</resetValue><fields><field><name>REC</name><description>REC</description><bitOffset>24</bitOffset><bitWidth>8</bitWidth><access>read-only</access></field><field><name>TEC</name><description>TEC</description><bitOffset>16</bitOffset><bitWidth>8</bitWidth><access>read-only</access></field><field><name>LEC</name><description>LEC</description><bitOffset>4</bitOffset><bitWidth>3</bitWidth><access>read-write</access></field><field><name>BOFF</name><description>BOFF</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth><access>read-only</access></field><field><name>EPVF</name><description>EPVF</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth><access>read-only</access></field><field><name>EWGF</name><description>EWGF</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth><access>read-only</access></field></fields></register><register><name>CAN_BTR</name><displayName>CAN_BTR</displayName><description>CAN_BTR</description><addressOffset>0x1C</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>SILM</name><description>SILM</description><bitOffset>31</bitOffset><bitWidth>1</bitWidth></field><field><name>LBKM</name><description>LBKM</description><bitOffset>30</bitOffset><bitWidth>1</bitWidth></field><field><name>SJW</name><description>SJW</description><bitOffset>24</bitOffset><bitWidth>2</bitWidth></field><field><name>TS2</name><description>TS2</description><bitOffset>20</bitOffset><bitWidth>3</bitWidth></field><field><name>TS1</name><description>TS1</description><bitOffset>16</bitOffset><bitWidth>4</bitWidth></field><field><name>BRP</name><description>BRP</description><bitOffset>0</bitOffset><bitWidth>10</bitWidth></field></fields></register><register><name>CAN_TI0R</name><displayName>CAN_TI0R</displayName><description>CAN_TI0R</description><addressOffset>0x180</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>STID</name><description>STID</description><bitOffset>21</bitOffset><bitWidth>11</bitWidth></field><field><name>EXID</name><description>EXID</description><bitOffset>3</bitOffset><bitWidth>18</bitWidth></field><field><name>IDE</name><description>IDE</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>RTR</name><description>RTR</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>TXRQ</name><description>TXRQ</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>CAN_TDT0R</name><displayName>CAN_TDT0R</displayName><description>CAN_TDT0R</description><addressOffset>0x184</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>TIME</name><description>TIME</description><bitOffset>16</bitOffset><bitWidth>16</bitWidth></field><field><name>TGT</name><description>TGT</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>DLC</name><description>DLC</description><bitOffset>0</bitOffset><bitWidth>4</bitWidth></field></fields></register><register><name>CAN_TDL0R</name><displayName>CAN_TDL0R</displayName><description>CAN_TDL0R</description><addressOffset>0x188</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>DATA3</name><description>DATA3</description><bitOffset>24</bitOffset><bitWidth>8</bitWidth></field><field><name>DATA2</name><description>DATA2</description><bitOffset>16</bitOffset><bitWidth>8</bitWidth></field><field><name>DATA1</name><description>DATA1</description><bitOffset>8</bitOffset><bitWidth>8</bitWidth></field><field><name>DATA0</name><description>DATA0</description><bitOffset>0</bitOffset><bitWidth>8</bitWidth></field></fields></register><register><name>CAN_TDH0R</name><displayName>CAN_TDH0R</displayName><description>CAN_TDH0R</description><addressOffset>0x18C</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>DATA7</name><description>DATA7</description><bitOffset>24</bitOffset><bitWidth>8</bitWidth></field><field><name>DATA6</name><description>DATA6</description><bitOffset>16</bitOffset><bitWidth>8</bitWidth></field><field><name>DATA5</name><description>DATA5</description><bitOffset>8</bitOffset><bitWidth>8</bitWidth></field><field><name>DATA4</name><description>DATA4</description><bitOffset>0</bitOffset><bitWidth>8</bitWidth></field></fields></register><register><name>CAN_TI1R</name><displayName>CAN_TI1R</displayName><description>CAN_TI1R</description><addressOffset>0x190</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>STID</name><description>STID</description><bitOffset>21</bitOffset><bitWidth>11</bitWidth></field><field><name>EXID</name><description>EXID</description><bitOffset>3</bitOffset><bitWidth>18</bitWidth></field><field><name>IDE</name><description>IDE</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>RTR</name><description>RTR</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>TXRQ</name><description>TXRQ</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>CAN_TDT1R</name><displayName>CAN_TDT1R</displayName><description>CAN_TDT1R</description><addressOffset>0x194</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>TIME</name><description>TIME</description><bitOffset>16</bitOffset><bitWidth>16</bitWidth></field><field><name>TGT</name><description>TGT</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>DLC</name><description>DLC</description><bitOffset>0</bitOffset><bitWidth>4</bitWidth></field></fields></register><register><name>CAN_TDL1R</name><displayName>CAN_TDL1R</displayName><description>CAN_TDL1R</description><addressOffset>0x198</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>DATA3</name><description>DATA3</description><bitOffset>24</bitOffset><bitWidth>8</bitWidth></field><field><name>DATA2</name><description>DATA2</description><bitOffset>16</bitOffset><bitWidth>8</bitWidth></field><field><name>DATA1</name><description>DATA1</description><bitOffset>8</bitOffset><bitWidth>8</bitWidth></field><field><name>DATA0</name><description>DATA0</description><bitOffset>0</bitOffset><bitWidth>8</bitWidth></field></fields></register><register><name>CAN_TDH1R</name><displayName>CAN_TDH1R</displayName><description>CAN_TDH1R</description><addressOffset>0x19C</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>DATA7</name><description>DATA7</description><bitOffset>24</bitOffset><bitWidth>8</bitWidth></field><field><name>DATA6</name><description>DATA6</description><bitOffset>16</bitOffset><bitWidth>8</bitWidth></field><field><name>DATA5</name><description>DATA5</description><bitOffset>8</bitOffset><bitWidth>8</bitWidth></field><field><name>DATA4</name><description>DATA4</description><bitOffset>0</bitOffset><bitWidth>8</bitWidth></field></fields></register><register><name>CAN_TI2R</name><displayName>CAN_TI2R</displayName><description>CAN_TI2R</description><addressOffset>0x1A0</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>STID</name><description>STID</description><bitOffset>21</bitOffset><bitWidth>11</bitWidth></field><field><name>EXID</name><description>EXID</description><bitOffset>3</bitOffset><bitWidth>18</bitWidth></field><field><name>IDE</name><description>IDE</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>RTR</name><description>RTR</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>TXRQ</name><description>TXRQ</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>CAN_TDT2R</name><displayName>CAN_TDT2R</displayName><description>CAN_TDT2R</description><addressOffset>0x1A4</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>TIME</name><description>TIME</description><bitOffset>16</bitOffset><bitWidth>16</bitWidth></field><field><name>TGT</name><description>TGT</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>DLC</name><description>DLC</description><bitOffset>0</bitOffset><bitWidth>4</bitWidth></field></fields></register><register><name>CAN_TDL2R</name><displayName>CAN_TDL2R</displayName><description>CAN_TDL2R</description><addressOffset>0x1A8</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>DATA3</name><description>DATA3</description><bitOffset>24</bitOffset><bitWidth>8</bitWidth></field><field><name>DATA2</name><description>DATA2</description><bitOffset>16</bitOffset><bitWidth>8</bitWidth></field><field><name>DATA1</name><description>DATA1</description><bitOffset>8</bitOffset><bitWidth>8</bitWidth></field><field><name>DATA0</name><description>DATA0</description><bitOffset>0</bitOffset><bitWidth>8</bitWidth></field></fields></register><register><name>CAN_TDH2R</name><displayName>CAN_TDH2R</displayName><description>CAN_TDH2R</description><addressOffset>0x1AC</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>DATA7</name><description>DATA7</description><bitOffset>24</bitOffset><bitWidth>8</bitWidth></field><field><name>DATA6</name><description>DATA6</description><bitOffset>16</bitOffset><bitWidth>8</bitWidth></field><field><name>DATA5</name><description>DATA5</description><bitOffset>8</bitOffset><bitWidth>8</bitWidth></field><field><name>DATA4</name><description>DATA4</description><bitOffset>0</bitOffset><bitWidth>8</bitWidth></field></fields></register><register><name>CAN_RI0R</name><displayName>CAN_RI0R</displayName><description>CAN_RI0R</description><addressOffset>0x1B0</addressOffset><size>0x20</size><access>read-only</access><resetValue>0x00000000</resetValue><fields><field><name>STID</name><description>STID</description><bitOffset>21</bitOffset><bitWidth>11</bitWidth></field><field><name>EXID</name><description>EXID</description><bitOffset>3</bitOffset><bitWidth>18</bitWidth></field><field><name>IDE</name><description>IDE</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>RTR</name><description>RTR</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>CAN_RDT0R</name><displayName>CAN_RDT0R</displayName><description>CAN_RDT0R</description><addressOffset>0x1B4</addressOffset><size>0x20</size><access>read-only</access><resetValue>0x00000000</resetValue><fields><field><name>TIME</name><description>TIME</description><bitOffset>16</bitOffset><bitWidth>16</bitWidth></field><field><name>FMI</name><description>FMI</description><bitOffset>8</bitOffset><bitWidth>8</bitWidth></field><field><name>DLC</name><description>DLC</description><bitOffset>0</bitOffset><bitWidth>4</bitWidth></field></fields></register><register><name>CAN_RDL0R</name><displayName>CAN_RDL0R</displayName><description>CAN_RDL0R</description><addressOffset>0x1B8</addressOffset><size>0x20</size><access>read-only</access><resetValue>0x00000000</resetValue><fields><field><name>DATA3</name><description>DATA3</description><bitOffset>24</bitOffset><bitWidth>8</bitWidth></field><field><name>DATA2</name><description>DATA2</description><bitOffset>16</bitOffset><bitWidth>8</bitWidth></field><field><name>DATA1</name><description>DATA1</description><bitOffset>8</bitOffset><bitWidth>8</bitWidth></field><field><name>DATA0</name><description>DATA0</description><bitOffset>0</bitOffset><bitWidth>8</bitWidth></field></fields></register><register><name>CAN_RDH0R</name><displayName>CAN_RDH0R</displayName><description>CAN_RDH0R</description><addressOffset>0x1BC</addressOffset><size>0x20</size><access>read-only</access><resetValue>0x00000000</resetValue><fields><field><name>DATA7</name><description>DATA7</description><bitOffset>24</bitOffset><bitWidth>8</bitWidth></field><field><name>DATA6</name><description>DATA6</description><bitOffset>16</bitOffset><bitWidth>8</bitWidth></field><field><name>DATA5</name><description>DATA5</description><bitOffset>8</bitOffset><bitWidth>8</bitWidth></field><field><name>DATA4</name><description>DATA4</description><bitOffset>0</bitOffset><bitWidth>8</bitWidth></field></fields></register><register><name>CAN_RI1R</name><displayName>CAN_RI1R</displayName><description>CAN_RI1R</description><addressOffset>0x1C0</addressOffset><size>0x20</size><access>read-only</access><resetValue>0x00000000</resetValue><fields><field><name>STID</name><description>STID</description><bitOffset>21</bitOffset><bitWidth>11</bitWidth></field><field><name>EXID</name><description>EXID</description><bitOffset>3</bitOffset><bitWidth>18</bitWidth></field><field><name>IDE</name><description>IDE</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>RTR</name><description>RTR</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>CAN_RDT1R</name><displayName>CAN_RDT1R</displayName><description>CAN_RDT1R</description><addressOffset>0x1C4</addressOffset><size>0x20</size><access>read-only</access><resetValue>0x00000000</resetValue><fields><field><name>TIME</name><description>TIME</description><bitOffset>16</bitOffset><bitWidth>16</bitWidth></field><field><name>FMI</name><description>FMI</description><bitOffset>8</bitOffset><bitWidth>8</bitWidth></field><field><name>DLC</name><description>DLC</description><bitOffset>0</bitOffset><bitWidth>4</bitWidth></field></fields></register><register><name>CAN_RDL1R</name><displayName>CAN_RDL1R</displayName><description>CAN_RDL1R</description><addressOffset>0x1C8</addressOffset><size>0x20</size><access>read-only</access><resetValue>0x00000000</resetValue><fields><field><name>DATA3</name><description>DATA3</description><bitOffset>24</bitOffset><bitWidth>8</bitWidth></field><field><name>DATA2</name><description>DATA2</description><bitOffset>16</bitOffset><bitWidth>8</bitWidth></field><field><name>DATA1</name><description>DATA1</description><bitOffset>8</bitOffset><bitWidth>8</bitWidth></field><field><name>DATA0</name><description>DATA0</description><bitOffset>0</bitOffset><bitWidth>8</bitWidth></field></fields></register><register><name>CAN_RDH1R</name><displayName>CAN_RDH1R</displayName><description>CAN_RDH1R</description><addressOffset>0x1CC</addressOffset><size>0x20</size><access>read-only</access><resetValue>0x00000000</resetValue><fields><field><name>DATA7</name><description>DATA7</description><bitOffset>24</bitOffset><bitWidth>8</bitWidth></field><field><name>DATA6</name><description>DATA6</description><bitOffset>16</bitOffset><bitWidth>8</bitWidth></field><field><name>DATA5</name><description>DATA5</description><bitOffset>8</bitOffset><bitWidth>8</bitWidth></field><field><name>DATA4</name><description>DATA4</description><bitOffset>0</bitOffset><bitWidth>8</bitWidth></field></fields></register><register><name>CAN_FMR</name><displayName>CAN_FMR</displayName><description>CAN_FMR</description><addressOffset>0x200</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>CAN2SB</name><description>CAN2SB</description><bitOffset>8</bitOffset><bitWidth>6</bitWidth></field><field><name>FINIT</name><description>FINIT</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>CAN_FM1R</name><displayName>CAN_FM1R</displayName><description>CAN_FM1R</description><addressOffset>0x204</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>FBM0</name><description>Filter mode</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field><field><name>FBM1</name><description>Filter mode</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>FBM2</name><description>Filter mode</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>FBM3</name><description>Filter mode</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>FBM4</name><description>Filter mode</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>FBM5</name><description>Filter mode</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>FBM6</name><description>Filter mode</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>FBM7</name><description>Filter mode</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>FBM8</name><description>Filter mode</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>FBM9</name><description>Filter mode</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>FBM10</name><description>Filter mode</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>FBM11</name><description>Filter mode</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>FBM12</name><description>Filter mode</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>FBM13</name><description>Filter mode</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>FBM14</name><description>Filter mode</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>FBM15</name><description>Filter mode</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>FBM16</name><description>Filter mode</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth></field><field><name>FBM17</name><description>Filter mode</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth></field><field><name>FBM18</name><description>Filter mode</description><bitOffset>18</bitOffset><bitWidth>1</bitWidth></field><field><name>FBM19</name><description>Filter mode</description><bitOffset>19</bitOffset><bitWidth>1</bitWidth></field><field><name>FBM20</name><description>Filter mode</description><bitOffset>20</bitOffset><bitWidth>1</bitWidth></field><field><name>FBM21</name><description>Filter mode</description><bitOffset>21</bitOffset><bitWidth>1</bitWidth></field><field><name>FBM22</name><description>Filter mode</description><bitOffset>22</bitOffset><bitWidth>1</bitWidth></field><field><name>FBM23</name><description>Filter mode</description><bitOffset>23</bitOffset><bitWidth>1</bitWidth></field><field><name>FBM24</name><description>Filter mode</description><bitOffset>24</bitOffset><bitWidth>1</bitWidth></field><field><name>FBM25</name><description>Filter mode</description><bitOffset>25</bitOffset><bitWidth>1</bitWidth></field><field><name>FBM26</name><description>Filter mode</description><bitOffset>26</bitOffset><bitWidth>1</bitWidth></field><field><name>FBM27</name><description>Filter mode</description><bitOffset>27</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>CAN_FS1R</name><displayName>CAN_FS1R</displayName><description>CAN_FS1R</description><addressOffset>0x20C</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>FSC0</name><description>Filter scale configuration</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field><field><name>FSC1</name><description>Filter scale configuration</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>FSC2</name><description>Filter scale configuration</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>FSC3</name><description>Filter scale configuration</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>FSC4</name><description>Filter scale configuration</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>FSC5</name><description>Filter scale configuration</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>FSC6</name><description>Filter scale configuration</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>FSC7</name><description>Filter scale configuration</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>FSC8</name><description>Filter scale configuration</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>FSC9</name><description>Filter scale configuration</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>FSC10</name><description>Filter scale configuration</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>FSC11</name><description>Filter scale configuration</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>FSC12</name><description>Filter scale configuration</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>FSC13</name><description>Filter scale configuration</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>FSC14</name><description>Filter scale configuration</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>FSC15</name><description>Filter scale configuration</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>FSC16</name><description>Filter scale configuration</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth></field><field><name>FSC17</name><description>Filter scale configuration</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth></field><field><name>FSC18</name><description>Filter scale configuration</description><bitOffset>18</bitOffset><bitWidth>1</bitWidth></field><field><name>FSC19</name><description>Filter scale configuration</description><bitOffset>19</bitOffset><bitWidth>1</bitWidth></field><field><name>FSC20</name><description>Filter scale configuration</description><bitOffset>20</bitOffset><bitWidth>1</bitWidth></field><field><name>FSC21</name><description>Filter scale configuration</description><bitOffset>21</bitOffset><bitWidth>1</bitWidth></field><field><name>FSC22</name><description>Filter scale configuration</description><bitOffset>22</bitOffset><bitWidth>1</bitWidth></field><field><name>FSC23</name><description>Filter scale configuration</description><bitOffset>23</bitOffset><bitWidth>1</bitWidth></field><field><name>FSC24</name><description>Filter scale configuration</description><bitOffset>24</bitOffset><bitWidth>1</bitWidth></field><field><name>FSC25</name><description>Filter scale configuration</description><bitOffset>25</bitOffset><bitWidth>1</bitWidth></field><field><name>FSC26</name><description>Filter scale configuration</description><bitOffset>26</bitOffset><bitWidth>1</bitWidth></field><field><name>FSC27</name><description>Filter scale configuration</description><bitOffset>27</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>CAN_FFA1R</name><displayName>CAN_FFA1R</displayName><description>CAN_FFA1R</description><addressOffset>0x214</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>FFA0</name><description>Filter FIFO assignment for filter 0</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field><field><name>FFA1</name><description>Filter FIFO assignment for filter 1</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>FFA2</name><description>Filter FIFO assignment for filter 2</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>FFA3</name><description>Filter FIFO assignment for filter 3</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>FFA4</name><description>Filter FIFO assignment for filter 4</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>FFA5</name><description>Filter FIFO assignment for filter 5</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>FFA6</name><description>Filter FIFO assignment for filter 6</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>FFA7</name><description>Filter FIFO assignment for filter 7</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>FFA8</name><description>Filter FIFO assignment for filter 8</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>FFA9</name><description>Filter FIFO assignment for filter 9</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>FFA10</name><description>Filter FIFO assignment for filter 10</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>FFA11</name><description>Filter FIFO assignment for filter 11</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>FFA12</name><description>Filter FIFO assignment for filter 12</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>FFA13</name><description>Filter FIFO assignment for filter 13</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>FFA14</name><description>Filter FIFO assignment for filter 14</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>FFA15</name><description>Filter FIFO assignment for filter 15</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>FFA16</name><description>Filter FIFO assignment for filter 16</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth></field><field><name>FFA17</name><description>Filter FIFO assignment for filter 17</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth></field><field><name>FFA18</name><description>Filter FIFO assignment for filter 18</description><bitOffset>18</bitOffset><bitWidth>1</bitWidth></field><field><name>FFA19</name><description>Filter FIFO assignment for filter 19</description><bitOffset>19</bitOffset><bitWidth>1</bitWidth></field><field><name>FFA20</name><description>Filter FIFO assignment for filter 20</description><bitOffset>20</bitOffset><bitWidth>1</bitWidth></field><field><name>FFA21</name><description>Filter FIFO assignment for filter 21</description><bitOffset>21</bitOffset><bitWidth>1</bitWidth></field><field><name>FFA22</name><description>Filter FIFO assignment for filter 22</description><bitOffset>22</bitOffset><bitWidth>1</bitWidth></field><field><name>FFA23</name><description>Filter FIFO assignment for filter 23</description><bitOffset>23</bitOffset><bitWidth>1</bitWidth></field><field><name>FFA24</name><description>Filter FIFO assignment for filter 24</description><bitOffset>24</bitOffset><bitWidth>1</bitWidth></field><field><name>FFA25</name><description>Filter FIFO assignment for filter 25</description><bitOffset>25</bitOffset><bitWidth>1</bitWidth></field><field><name>FFA26</name><description>Filter FIFO assignment for filter 26</description><bitOffset>26</bitOffset><bitWidth>1</bitWidth></field><field><name>FFA27</name><description>Filter FIFO assignment for filter 27</description><bitOffset>27</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>CAN_FA1R</name><displayName>CAN_FA1R</displayName><description>CAN_FA1R</description><addressOffset>0x21C</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>FACT0</name><description>Filter active</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field><field><name>FACT1</name><description>Filter active</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>FACT2</name><description>Filter active</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>FACT3</name><description>Filter active</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>FACT4</name><description>Filter active</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>FACT5</name><description>Filter active</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>FACT6</name><description>Filter active</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>FACT7</name><description>Filter active</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>FACT8</name><description>Filter active</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>FACT9</name><description>Filter active</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>FACT10</name><description>Filter active</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>FACT11</name><description>Filter active</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>FACT12</name><description>Filter active</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>FACT13</name><description>Filter active</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>FACT14</name><description>Filter active</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>FACT15</name><description>Filter active</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>FACT16</name><description>Filter active</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth></field><field><name>FACT17</name><description>Filter active</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth></field><field><name>FACT18</name><description>Filter active</description><bitOffset>18</bitOffset><bitWidth>1</bitWidth></field><field><name>FACT19</name><description>Filter active</description><bitOffset>19</bitOffset><bitWidth>1</bitWidth></field><field><name>FACT20</name><description>Filter active</description><bitOffset>20</bitOffset><bitWidth>1</bitWidth></field><field><name>FACT21</name><description>Filter active</description><bitOffset>21</bitOffset><bitWidth>1</bitWidth></field><field><name>FACT22</name><description>Filter active</description><bitOffset>22</bitOffset><bitWidth>1</bitWidth></field><field><name>FACT23</name><description>Filter active</description><bitOffset>23</bitOffset><bitWidth>1</bitWidth></field><field><name>FACT24</name><description>Filter active</description><bitOffset>24</bitOffset><bitWidth>1</bitWidth></field><field><name>FACT25</name><description>Filter active</description><bitOffset>25</bitOffset><bitWidth>1</bitWidth></field><field><name>FACT26</name><description>Filter active</description><bitOffset>26</bitOffset><bitWidth>1</bitWidth></field><field><name>FACT27</name><description>Filter active</description><bitOffset>27</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>F0R1</name><displayName>F0R1</displayName><description>Filter bank 0 register 1</description><addressOffset>0x240</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>FB0</name><description>Filter bits</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field><field><name>FB1</name><description>Filter bits</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>FB2</name><description>Filter bits</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>FB3</name><description>Filter bits</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>FB4</name><description>Filter bits</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>FB5</name><description>Filter bits</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>FB6</name><description>Filter bits</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>FB7</name><description>Filter bits</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>FB8</name><description>Filter bits</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>FB9</name><description>Filter bits</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>FB10</name><description>Filter bits</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>FB11</name><description>Filter bits</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>FB12</name><description>Filter bits</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>FB13</name><description>Filter bits</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>FB14</name><description>Filter bits</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>FB15</name><description>Filter bits</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>FB16</name><description>Filter bits</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth></field><field><name>FB17</name><description>Filter bits</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth></field><field><name>FB18</name><description>Filter bits</description><bitOffset>18</bitOffset><bitWidth>1</bitWidth></field><field><name>FB19</name><description>Filter bits</description><bitOffset>19</bitOffset><bitWidth>1</bitWidth></field><field><name>FB20</name><description>Filter bits</description><bitOffset>20</bitOffset><bitWidth>1</bitWidth></field><field><name>FB21</name><description>Filter bits</description><bitOffset>21</bitOffset><bitWidth>1</bitWidth></field><field><name>FB22</name><description>Filter bits</description><bitOffset>22</bitOffset><bitWidth>1</bitWidth></field><field><name>FB23</name><description>Filter bits</description><bitOffset>23</bitOffset><bitWidth>1</bitWidth></field><field><name>FB24</name><description>Filter bits</description><bitOffset>24</bitOffset><bitWidth>1</bitWidth></field><field><name>FB25</name><description>Filter bits</description><bitOffset>25</bitOffset><bitWidth>1</bitWidth></field><field><name>FB26</name><description>Filter bits</description><bitOffset>26</bitOffset><bitWidth>1</bitWidth></field><field><name>FB27</name><description>Filter bits</description><bitOffset>27</bitOffset><bitWidth>1</bitWidth></field><field><name>FB28</name><description>Filter bits</description><bitOffset>28</bitOffset><bitWidth>1</bitWidth></field><field><name>FB29</name><description>Filter bits</description><bitOffset>29</bitOffset><bitWidth>1</bitWidth></field><field><name>FB30</name><description>Filter bits</description><bitOffset>30</bitOffset><bitWidth>1</bitWidth></field><field><name>FB31</name><description>Filter bits</description><bitOffset>31</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>F0R2</name><displayName>F0R2</displayName><description>Filter bank 0 register 2</description><addressOffset>0x244</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>FB0</name><description>Filter bits</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field><field><name>FB1</name><description>Filter bits</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>FB2</name><description>Filter bits</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>FB3</name><description>Filter bits</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>FB4</name><description>Filter bits</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>FB5</name><description>Filter bits</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>FB6</name><description>Filter bits</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>FB7</name><description>Filter bits</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>FB8</name><description>Filter bits</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>FB9</name><description>Filter bits</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>FB10</name><description>Filter bits</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>FB11</name><description>Filter bits</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>FB12</name><description>Filter bits</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>FB13</name><description>Filter bits</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>FB14</name><description>Filter bits</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>FB15</name><description>Filter bits</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>FB16</name><description>Filter bits</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth></field><field><name>FB17</name><description>Filter bits</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth></field><field><name>FB18</name><description>Filter bits</description><bitOffset>18</bitOffset><bitWidth>1</bitWidth></field><field><name>FB19</name><description>Filter bits</description><bitOffset>19</bitOffset><bitWidth>1</bitWidth></field><field><name>FB20</name><description>Filter bits</description><bitOffset>20</bitOffset><bitWidth>1</bitWidth></field><field><name>FB21</name><description>Filter bits</description><bitOffset>21</bitOffset><bitWidth>1</bitWidth></field><field><name>FB22</name><description>Filter bits</description><bitOffset>22</bitOffset><bitWidth>1</bitWidth></field><field><name>FB23</name><description>Filter bits</description><bitOffset>23</bitOffset><bitWidth>1</bitWidth></field><field><name>FB24</name><description>Filter bits</description><bitOffset>24</bitOffset><bitWidth>1</bitWidth></field><field><name>FB25</name><description>Filter bits</description><bitOffset>25</bitOffset><bitWidth>1</bitWidth></field><field><name>FB26</name><description>Filter bits</description><bitOffset>26</bitOffset><bitWidth>1</bitWidth></field><field><name>FB27</name><description>Filter bits</description><bitOffset>27</bitOffset><bitWidth>1</bitWidth></field><field><name>FB28</name><description>Filter bits</description><bitOffset>28</bitOffset><bitWidth>1</bitWidth></field><field><name>FB29</name><description>Filter bits</description><bitOffset>29</bitOffset><bitWidth>1</bitWidth></field><field><name>FB30</name><description>Filter bits</description><bitOffset>30</bitOffset><bitWidth>1</bitWidth></field><field><name>FB31</name><description>Filter bits</description><bitOffset>31</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>F1R1</name><displayName>F1R1</displayName><description>Filter bank 1 register 1</description><addressOffset>0x248</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>FB0</name><description>Filter bits</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field><field><name>FB1</name><description>Filter bits</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>FB2</name><description>Filter bits</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>FB3</name><description>Filter bits</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>FB4</name><description>Filter bits</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>FB5</name><description>Filter bits</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>FB6</name><description>Filter bits</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>FB7</name><description>Filter bits</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>FB8</name><description>Filter bits</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>FB9</name><description>Filter bits</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>FB10</name><description>Filter bits</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>FB11</name><description>Filter bits</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>FB12</name><description>Filter bits</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>FB13</name><description>Filter bits</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>FB14</name><description>Filter bits</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>FB15</name><description>Filter bits</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>FB16</name><description>Filter bits</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth></field><field><name>FB17</name><description>Filter bits</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth></field><field><name>FB18</name><description>Filter bits</description><bitOffset>18</bitOffset><bitWidth>1</bitWidth></field><field><name>FB19</name><description>Filter bits</description><bitOffset>19</bitOffset><bitWidth>1</bitWidth></field><field><name>FB20</name><description>Filter bits</description><bitOffset>20</bitOffset><bitWidth>1</bitWidth></field><field><name>FB21</name><description>Filter bits</description><bitOffset>21</bitOffset><bitWidth>1</bitWidth></field><field><name>FB22</name><description>Filter bits</description><bitOffset>22</bitOffset><bitWidth>1</bitWidth></field><field><name>FB23</name><description>Filter bits</description><bitOffset>23</bitOffset><bitWidth>1</bitWidth></field><field><name>FB24</name><description>Filter bits</description><bitOffset>24</bitOffset><bitWidth>1</bitWidth></field><field><name>FB25</name><description>Filter bits</description><bitOffset>25</bitOffset><bitWidth>1</bitWidth></field><field><name>FB26</name><description>Filter bits</description><bitOffset>26</bitOffset><bitWidth>1</bitWidth></field><field><name>FB27</name><description>Filter bits</description><bitOffset>27</bitOffset><bitWidth>1</bitWidth></field><field><name>FB28</name><description>Filter bits</description><bitOffset>28</bitOffset><bitWidth>1</bitWidth></field><field><name>FB29</name><description>Filter bits</description><bitOffset>29</bitOffset><bitWidth>1</bitWidth></field><field><name>FB30</name><description>Filter bits</description><bitOffset>30</bitOffset><bitWidth>1</bitWidth></field><field><name>FB31</name><description>Filter bits</description><bitOffset>31</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>F1R2</name><displayName>F1R2</displayName><description>Filter bank 1 register 2</description><addressOffset>0x24C</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>FB0</name><description>Filter bits</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field><field><name>FB1</name><description>Filter bits</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>FB2</name><description>Filter bits</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>FB3</name><description>Filter bits</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>FB4</name><description>Filter bits</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>FB5</name><description>Filter bits</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>FB6</name><description>Filter bits</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>FB7</name><description>Filter bits</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>FB8</name><description>Filter bits</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>FB9</name><description>Filter bits</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>FB10</name><description>Filter bits</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>FB11</name><description>Filter bits</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>FB12</name><description>Filter bits</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>FB13</name><description>Filter bits</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>FB14</name><description>Filter bits</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>FB15</name><description>Filter bits</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>FB16</name><description>Filter bits</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth></field><field><name>FB17</name><description>Filter bits</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth></field><field><name>FB18</name><description>Filter bits</description><bitOffset>18</bitOffset><bitWidth>1</bitWidth></field><field><name>FB19</name><description>Filter bits</description><bitOffset>19</bitOffset><bitWidth>1</bitWidth></field><field><name>FB20</name><description>Filter bits</description><bitOffset>20</bitOffset><bitWidth>1</bitWidth></field><field><name>FB21</name><description>Filter bits</description><bitOffset>21</bitOffset><bitWidth>1</bitWidth></field><field><name>FB22</name><description>Filter bits</description><bitOffset>22</bitOffset><bitWidth>1</bitWidth></field><field><name>FB23</name><description>Filter bits</description><bitOffset>23</bitOffset><bitWidth>1</bitWidth></field><field><name>FB24</name><description>Filter bits</description><bitOffset>24</bitOffset><bitWidth>1</bitWidth></field><field><name>FB25</name><description>Filter bits</description><bitOffset>25</bitOffset><bitWidth>1</bitWidth></field><field><name>FB26</name><description>Filter bits</description><bitOffset>26</bitOffset><bitWidth>1</bitWidth></field><field><name>FB27</name><description>Filter bits</description><bitOffset>27</bitOffset><bitWidth>1</bitWidth></field><field><name>FB28</name><description>Filter bits</description><bitOffset>28</bitOffset><bitWidth>1</bitWidth></field><field><name>FB29</name><description>Filter bits</description><bitOffset>29</bitOffset><bitWidth>1</bitWidth></field><field><name>FB30</name><description>Filter bits</description><bitOffset>30</bitOffset><bitWidth>1</bitWidth></field><field><name>FB31</name><description>Filter bits</description><bitOffset>31</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>F2R1</name><displayName>F2R1</displayName><description>Filter bank 2 register 1</description><addressOffset>0x250</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>FB0</name><description>Filter bits</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field><field><name>FB1</name><description>Filter bits</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>FB2</name><description>Filter bits</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>FB3</name><description>Filter bits</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>FB4</name><description>Filter bits</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>FB5</name><description>Filter bits</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>FB6</name><description>Filter bits</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>FB7</name><description>Filter bits</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>FB8</name><description>Filter bits</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>FB9</name><description>Filter bits</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>FB10</name><description>Filter bits</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>FB11</name><description>Filter bits</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>FB12</name><description>Filter bits</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>FB13</name><description>Filter bits</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>FB14</name><description>Filter bits</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>FB15</name><description>Filter bits</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>FB16</name><description>Filter bits</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth></field><field><name>FB17</name><description>Filter bits</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth></field><field><name>FB18</name><description>Filter bits</description><bitOffset>18</bitOffset><bitWidth>1</bitWidth></field><field><name>FB19</name><description>Filter bits</description><bitOffset>19</bitOffset><bitWidth>1</bitWidth></field><field><name>FB20</name><description>Filter bits</description><bitOffset>20</bitOffset><bitWidth>1</bitWidth></field><field><name>FB21</name><description>Filter bits</description><bitOffset>21</bitOffset><bitWidth>1</bitWidth></field><field><name>FB22</name><description>Filter bits</description><bitOffset>22</bitOffset><bitWidth>1</bitWidth></field><field><name>FB23</name><description>Filter bits</description><bitOffset>23</bitOffset><bitWidth>1</bitWidth></field><field><name>FB24</name><description>Filter bits</description><bitOffset>24</bitOffset><bitWidth>1</bitWidth></field><field><name>FB25</name><description>Filter bits</description><bitOffset>25</bitOffset><bitWidth>1</bitWidth></field><field><name>FB26</name><description>Filter bits</description><bitOffset>26</bitOffset><bitWidth>1</bitWidth></field><field><name>FB27</name><description>Filter bits</description><bitOffset>27</bitOffset><bitWidth>1</bitWidth></field><field><name>FB28</name><description>Filter bits</description><bitOffset>28</bitOffset><bitWidth>1</bitWidth></field><field><name>FB29</name><description>Filter bits</description><bitOffset>29</bitOffset><bitWidth>1</bitWidth></field><field><name>FB30</name><description>Filter bits</description><bitOffset>30</bitOffset><bitWidth>1</bitWidth></field><field><name>FB31</name><description>Filter bits</description><bitOffset>31</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>F2R2</name><displayName>F2R2</displayName><description>Filter bank 2 register 2</description><addressOffset>0x254</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>FB0</name><description>Filter bits</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field><field><name>FB1</name><description>Filter bits</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>FB2</name><description>Filter bits</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>FB3</name><description>Filter bits</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>FB4</name><description>Filter bits</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>FB5</name><description>Filter bits</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>FB6</name><description>Filter bits</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>FB7</name><description>Filter bits</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>FB8</name><description>Filter bits</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>FB9</name><description>Filter bits</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>FB10</name><description>Filter bits</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>FB11</name><description>Filter bits</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>FB12</name><description>Filter bits</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>FB13</name><description>Filter bits</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>FB14</name><description>Filter bits</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>FB15</name><description>Filter bits</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>FB16</name><description>Filter bits</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth></field><field><name>FB17</name><description>Filter bits</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth></field><field><name>FB18</name><description>Filter bits</description><bitOffset>18</bitOffset><bitWidth>1</bitWidth></field><field><name>FB19</name><description>Filter bits</description><bitOffset>19</bitOffset><bitWidth>1</bitWidth></field><field><name>FB20</name><description>Filter bits</description><bitOffset>20</bitOffset><bitWidth>1</bitWidth></field><field><name>FB21</name><description>Filter bits</description><bitOffset>21</bitOffset><bitWidth>1</bitWidth></field><field><name>FB22</name><description>Filter bits</description><bitOffset>22</bitOffset><bitWidth>1</bitWidth></field><field><name>FB23</name><description>Filter bits</description><bitOffset>23</bitOffset><bitWidth>1</bitWidth></field><field><name>FB24</name><description>Filter bits</description><bitOffset>24</bitOffset><bitWidth>1</bitWidth></field><field><name>FB25</name><description>Filter bits</description><bitOffset>25</bitOffset><bitWidth>1</bitWidth></field><field><name>FB26</name><description>Filter bits</description><bitOffset>26</bitOffset><bitWidth>1</bitWidth></field><field><name>FB27</name><description>Filter bits</description><bitOffset>27</bitOffset><bitWidth>1</bitWidth></field><field><name>FB28</name><description>Filter bits</description><bitOffset>28</bitOffset><bitWidth>1</bitWidth></field><field><name>FB29</name><description>Filter bits</description><bitOffset>29</bitOffset><bitWidth>1</bitWidth></field><field><name>FB30</name><description>Filter bits</description><bitOffset>30</bitOffset><bitWidth>1</bitWidth></field><field><name>FB31</name><description>Filter bits</description><bitOffset>31</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>F3R1</name><displayName>F3R1</displayName><description>Filter bank 3 register 1</description><addressOffset>0x258</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>FB0</name><description>Filter bits</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field><field><name>FB1</name><description>Filter bits</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>FB2</name><description>Filter bits</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>FB3</name><description>Filter bits</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>FB4</name><description>Filter bits</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>FB5</name><description>Filter bits</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>FB6</name><description>Filter bits</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>FB7</name><description>Filter bits</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>FB8</name><description>Filter bits</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>FB9</name><description>Filter bits</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>FB10</name><description>Filter bits</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>FB11</name><description>Filter bits</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>FB12</name><description>Filter bits</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>FB13</name><description>Filter bits</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>FB14</name><description>Filter bits</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>FB15</name><description>Filter bits</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>FB16</name><description>Filter bits</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth></field><field><name>FB17</name><description>Filter bits</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth></field><field><name>FB18</name><description>Filter bits</description><bitOffset>18</bitOffset><bitWidth>1</bitWidth></field><field><name>FB19</name><description>Filter bits</description><bitOffset>19</bitOffset><bitWidth>1</bitWidth></field><field><name>FB20</name><description>Filter bits</description><bitOffset>20</bitOffset><bitWidth>1</bitWidth></field><field><name>FB21</name><description>Filter bits</description><bitOffset>21</bitOffset><bitWidth>1</bitWidth></field><field><name>FB22</name><description>Filter bits</description><bitOffset>22</bitOffset><bitWidth>1</bitWidth></field><field><name>FB23</name><description>Filter bits</description><bitOffset>23</bitOffset><bitWidth>1</bitWidth></field><field><name>FB24</name><description>Filter bits</description><bitOffset>24</bitOffset><bitWidth>1</bitWidth></field><field><name>FB25</name><description>Filter bits</description><bitOffset>25</bitOffset><bitWidth>1</bitWidth></field><field><name>FB26</name><description>Filter bits</description><bitOffset>26</bitOffset><bitWidth>1</bitWidth></field><field><name>FB27</name><description>Filter bits</description><bitOffset>27</bitOffset><bitWidth>1</bitWidth></field><field><name>FB28</name><description>Filter bits</description><bitOffset>28</bitOffset><bitWidth>1</bitWidth></field><field><name>FB29</name><description>Filter bits</description><bitOffset>29</bitOffset><bitWidth>1</bitWidth></field><field><name>FB30</name><description>Filter bits</description><bitOffset>30</bitOffset><bitWidth>1</bitWidth></field><field><name>FB31</name><description>Filter bits</description><bitOffset>31</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>F3R2</name><displayName>F3R2</displayName><description>Filter bank 3 register 2</description><addressOffset>0x25C</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>FB0</name><description>Filter bits</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field><field><name>FB1</name><description>Filter bits</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>FB2</name><description>Filter bits</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>FB3</name><description>Filter bits</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>FB4</name><description>Filter bits</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>FB5</name><description>Filter bits</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>FB6</name><description>Filter bits</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>FB7</name><description>Filter bits</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>FB8</name><description>Filter bits</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>FB9</name><description>Filter bits</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>FB10</name><description>Filter bits</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>FB11</name><description>Filter bits</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>FB12</name><description>Filter bits</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>FB13</name><description>Filter bits</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>FB14</name><description>Filter bits</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>FB15</name><description>Filter bits</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>FB16</name><description>Filter bits</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth></field><field><name>FB17</name><description>Filter bits</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth></field><field><name>FB18</name><description>Filter bits</description><bitOffset>18</bitOffset><bitWidth>1</bitWidth></field><field><name>FB19</name><description>Filter bits</description><bitOffset>19</bitOffset><bitWidth>1</bitWidth></field><field><name>FB20</name><description>Filter bits</description><bitOffset>20</bitOffset><bitWidth>1</bitWidth></field><field><name>FB21</name><description>Filter bits</description><bitOffset>21</bitOffset><bitWidth>1</bitWidth></field><field><name>FB22</name><description>Filter bits</description><bitOffset>22</bitOffset><bitWidth>1</bitWidth></field><field><name>FB23</name><description>Filter bits</description><bitOffset>23</bitOffset><bitWidth>1</bitWidth></field><field><name>FB24</name><description>Filter bits</description><bitOffset>24</bitOffset><bitWidth>1</bitWidth></field><field><name>FB25</name><description>Filter bits</description><bitOffset>25</bitOffset><bitWidth>1</bitWidth></field><field><name>FB26</name><description>Filter bits</description><bitOffset>26</bitOffset><bitWidth>1</bitWidth></field><field><name>FB27</name><description>Filter bits</description><bitOffset>27</bitOffset><bitWidth>1</bitWidth></field><field><name>FB28</name><description>Filter bits</description><bitOffset>28</bitOffset><bitWidth>1</bitWidth></field><field><name>FB29</name><description>Filter bits</description><bitOffset>29</bitOffset><bitWidth>1</bitWidth></field><field><name>FB30</name><description>Filter bits</description><bitOffset>30</bitOffset><bitWidth>1</bitWidth></field><field><name>FB31</name><description>Filter bits</description><bitOffset>31</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>F4R1</name><displayName>F4R1</displayName><description>Filter bank 4 register 1</description><addressOffset>0x260</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>FB0</name><description>Filter bits</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field><field><name>FB1</name><description>Filter bits</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>FB2</name><description>Filter bits</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>FB3</name><description>Filter bits</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>FB4</name><description>Filter bits</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>FB5</name><description>Filter bits</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>FB6</name><description>Filter bits</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>FB7</name><description>Filter bits</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>FB8</name><description>Filter bits</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>FB9</name><description>Filter bits</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>FB10</name><description>Filter bits</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>FB11</name><description>Filter bits</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>FB12</name><description>Filter bits</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>FB13</name><description>Filter bits</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>FB14</name><description>Filter bits</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>FB15</name><description>Filter bits</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>FB16</name><description>Filter bits</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth></field><field><name>FB17</name><description>Filter bits</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth></field><field><name>FB18</name><description>Filter bits</description><bitOffset>18</bitOffset><bitWidth>1</bitWidth></field><field><name>FB19</name><description>Filter bits</description><bitOffset>19</bitOffset><bitWidth>1</bitWidth></field><field><name>FB20</name><description>Filter bits</description><bitOffset>20</bitOffset><bitWidth>1</bitWidth></field><field><name>FB21</name><description>Filter bits</description><bitOffset>21</bitOffset><bitWidth>1</bitWidth></field><field><name>FB22</name><description>Filter bits</description><bitOffset>22</bitOffset><bitWidth>1</bitWidth></field><field><name>FB23</name><description>Filter bits</description><bitOffset>23</bitOffset><bitWidth>1</bitWidth></field><field><name>FB24</name><description>Filter bits</description><bitOffset>24</bitOffset><bitWidth>1</bitWidth></field><field><name>FB25</name><description>Filter bits</description><bitOffset>25</bitOffset><bitWidth>1</bitWidth></field><field><name>FB26</name><description>Filter bits</description><bitOffset>26</bitOffset><bitWidth>1</bitWidth></field><field><name>FB27</name><description>Filter bits</description><bitOffset>27</bitOffset><bitWidth>1</bitWidth></field><field><name>FB28</name><description>Filter bits</description><bitOffset>28</bitOffset><bitWidth>1</bitWidth></field><field><name>FB29</name><description>Filter bits</description><bitOffset>29</bitOffset><bitWidth>1</bitWidth></field><field><name>FB30</name><description>Filter bits</description><bitOffset>30</bitOffset><bitWidth>1</bitWidth></field><field><name>FB31</name><description>Filter bits</description><bitOffset>31</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>F4R2</name><displayName>F4R2</displayName><description>Filter bank 4 register 2</description><addressOffset>0x264</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>FB0</name><description>Filter bits</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field><field><name>FB1</name><description>Filter bits</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>FB2</name><description>Filter bits</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>FB3</name><description>Filter bits</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>FB4</name><description>Filter bits</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>FB5</name><description>Filter bits</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>FB6</name><description>Filter bits</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>FB7</name><description>Filter bits</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>FB8</name><description>Filter bits</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>FB9</name><description>Filter bits</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>FB10</name><description>Filter bits</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>FB11</name><description>Filter bits</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>FB12</name><description>Filter bits</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>FB13</name><description>Filter bits</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>FB14</name><description>Filter bits</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>FB15</name><description>Filter bits</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>FB16</name><description>Filter bits</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth></field><field><name>FB17</name><description>Filter bits</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth></field><field><name>FB18</name><description>Filter bits</description><bitOffset>18</bitOffset><bitWidth>1</bitWidth></field><field><name>FB19</name><description>Filter bits</description><bitOffset>19</bitOffset><bitWidth>1</bitWidth></field><field><name>FB20</name><description>Filter bits</description><bitOffset>20</bitOffset><bitWidth>1</bitWidth></field><field><name>FB21</name><description>Filter bits</description><bitOffset>21</bitOffset><bitWidth>1</bitWidth></field><field><name>FB22</name><description>Filter bits</description><bitOffset>22</bitOffset><bitWidth>1</bitWidth></field><field><name>FB23</name><description>Filter bits</description><bitOffset>23</bitOffset><bitWidth>1</bitWidth></field><field><name>FB24</name><description>Filter bits</description><bitOffset>24</bitOffset><bitWidth>1</bitWidth></field><field><name>FB25</name><description>Filter bits</description><bitOffset>25</bitOffset><bitWidth>1</bitWidth></field><field><name>FB26</name><description>Filter bits</description><bitOffset>26</bitOffset><bitWidth>1</bitWidth></field><field><name>FB27</name><description>Filter bits</description><bitOffset>27</bitOffset><bitWidth>1</bitWidth></field><field><name>FB28</name><description>Filter bits</description><bitOffset>28</bitOffset><bitWidth>1</bitWidth></field><field><name>FB29</name><description>Filter bits</description><bitOffset>29</bitOffset><bitWidth>1</bitWidth></field><field><name>FB30</name><description>Filter bits</description><bitOffset>30</bitOffset><bitWidth>1</bitWidth></field><field><name>FB31</name><description>Filter bits</description><bitOffset>31</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>F5R1</name><displayName>F5R1</displayName><description>Filter bank 5 register 1</description><addressOffset>0x268</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>FB0</name><description>Filter bits</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field><field><name>FB1</name><description>Filter bits</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>FB2</name><description>Filter bits</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>FB3</name><description>Filter bits</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>FB4</name><description>Filter bits</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>FB5</name><description>Filter bits</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>FB6</name><description>Filter bits</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>FB7</name><description>Filter bits</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>FB8</name><description>Filter bits</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>FB9</name><description>Filter bits</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>FB10</name><description>Filter bits</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>FB11</name><description>Filter bits</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>FB12</name><description>Filter bits</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>FB13</name><description>Filter bits</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>FB14</name><description>Filter bits</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>FB15</name><description>Filter bits</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>FB16</name><description>Filter bits</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth></field><field><name>FB17</name><description>Filter bits</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth></field><field><name>FB18</name><description>Filter bits</description><bitOffset>18</bitOffset><bitWidth>1</bitWidth></field><field><name>FB19</name><description>Filter bits</description><bitOffset>19</bitOffset><bitWidth>1</bitWidth></field><field><name>FB20</name><description>Filter bits</description><bitOffset>20</bitOffset><bitWidth>1</bitWidth></field><field><name>FB21</name><description>Filter bits</description><bitOffset>21</bitOffset><bitWidth>1</bitWidth></field><field><name>FB22</name><description>Filter bits</description><bitOffset>22</bitOffset><bitWidth>1</bitWidth></field><field><name>FB23</name><description>Filter bits</description><bitOffset>23</bitOffset><bitWidth>1</bitWidth></field><field><name>FB24</name><description>Filter bits</description><bitOffset>24</bitOffset><bitWidth>1</bitWidth></field><field><name>FB25</name><description>Filter bits</description><bitOffset>25</bitOffset><bitWidth>1</bitWidth></field><field><name>FB26</name><description>Filter bits</description><bitOffset>26</bitOffset><bitWidth>1</bitWidth></field><field><name>FB27</name><description>Filter bits</description><bitOffset>27</bitOffset><bitWidth>1</bitWidth></field><field><name>FB28</name><description>Filter bits</description><bitOffset>28</bitOffset><bitWidth>1</bitWidth></field><field><name>FB29</name><description>Filter bits</description><bitOffset>29</bitOffset><bitWidth>1</bitWidth></field><field><name>FB30</name><description>Filter bits</description><bitOffset>30</bitOffset><bitWidth>1</bitWidth></field><field><name>FB31</name><description>Filter bits</description><bitOffset>31</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>F5R2</name><displayName>F5R2</displayName><description>Filter bank 5 register 2</description><addressOffset>0x26C</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>FB0</name><description>Filter bits</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field><field><name>FB1</name><description>Filter bits</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>FB2</name><description>Filter bits</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>FB3</name><description>Filter bits</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>FB4</name><description>Filter bits</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>FB5</name><description>Filter bits</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>FB6</name><description>Filter bits</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>FB7</name><description>Filter bits</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>FB8</name><description>Filter bits</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>FB9</name><description>Filter bits</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>FB10</name><description>Filter bits</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>FB11</name><description>Filter bits</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>FB12</name><description>Filter bits</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>FB13</name><description>Filter bits</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>FB14</name><description>Filter bits</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>FB15</name><description>Filter bits</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>FB16</name><description>Filter bits</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth></field><field><name>FB17</name><description>Filter bits</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth></field><field><name>FB18</name><description>Filter bits</description><bitOffset>18</bitOffset><bitWidth>1</bitWidth></field><field><name>FB19</name><description>Filter bits</description><bitOffset>19</bitOffset><bitWidth>1</bitWidth></field><field><name>FB20</name><description>Filter bits</description><bitOffset>20</bitOffset><bitWidth>1</bitWidth></field><field><name>FB21</name><description>Filter bits</description><bitOffset>21</bitOffset><bitWidth>1</bitWidth></field><field><name>FB22</name><description>Filter bits</description><bitOffset>22</bitOffset><bitWidth>1</bitWidth></field><field><name>FB23</name><description>Filter bits</description><bitOffset>23</bitOffset><bitWidth>1</bitWidth></field><field><name>FB24</name><description>Filter bits</description><bitOffset>24</bitOffset><bitWidth>1</bitWidth></field><field><name>FB25</name><description>Filter bits</description><bitOffset>25</bitOffset><bitWidth>1</bitWidth></field><field><name>FB26</name><description>Filter bits</description><bitOffset>26</bitOffset><bitWidth>1</bitWidth></field><field><name>FB27</name><description>Filter bits</description><bitOffset>27</bitOffset><bitWidth>1</bitWidth></field><field><name>FB28</name><description>Filter bits</description><bitOffset>28</bitOffset><bitWidth>1</bitWidth></field><field><name>FB29</name><description>Filter bits</description><bitOffset>29</bitOffset><bitWidth>1</bitWidth></field><field><name>FB30</name><description>Filter bits</description><bitOffset>30</bitOffset><bitWidth>1</bitWidth></field><field><name>FB31</name><description>Filter bits</description><bitOffset>31</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>F6R1</name><displayName>F6R1</displayName><description>Filter bank 6 register 1</description><addressOffset>0x270</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>FB0</name><description>Filter bits</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field><field><name>FB1</name><description>Filter bits</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>FB2</name><description>Filter bits</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>FB3</name><description>Filter bits</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>FB4</name><description>Filter bits</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>FB5</name><description>Filter bits</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>FB6</name><description>Filter bits</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>FB7</name><description>Filter bits</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>FB8</name><description>Filter bits</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>FB9</name><description>Filter bits</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>FB10</name><description>Filter bits</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>FB11</name><description>Filter bits</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>FB12</name><description>Filter bits</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>FB13</name><description>Filter bits</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>FB14</name><description>Filter bits</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>FB15</name><description>Filter bits</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>FB16</name><description>Filter bits</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth></field><field><name>FB17</name><description>Filter bits</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth></field><field><name>FB18</name><description>Filter bits</description><bitOffset>18</bitOffset><bitWidth>1</bitWidth></field><field><name>FB19</name><description>Filter bits</description><bitOffset>19</bitOffset><bitWidth>1</bitWidth></field><field><name>FB20</name><description>Filter bits</description><bitOffset>20</bitOffset><bitWidth>1</bitWidth></field><field><name>FB21</name><description>Filter bits</description><bitOffset>21</bitOffset><bitWidth>1</bitWidth></field><field><name>FB22</name><description>Filter bits</description><bitOffset>22</bitOffset><bitWidth>1</bitWidth></field><field><name>FB23</name><description>Filter bits</description><bitOffset>23</bitOffset><bitWidth>1</bitWidth></field><field><name>FB24</name><description>Filter bits</description><bitOffset>24</bitOffset><bitWidth>1</bitWidth></field><field><name>FB25</name><description>Filter bits</description><bitOffset>25</bitOffset><bitWidth>1</bitWidth></field><field><name>FB26</name><description>Filter bits</description><bitOffset>26</bitOffset><bitWidth>1</bitWidth></field><field><name>FB27</name><description>Filter bits</description><bitOffset>27</bitOffset><bitWidth>1</bitWidth></field><field><name>FB28</name><description>Filter bits</description><bitOffset>28</bitOffset><bitWidth>1</bitWidth></field><field><name>FB29</name><description>Filter bits</description><bitOffset>29</bitOffset><bitWidth>1</bitWidth></field><field><name>FB30</name><description>Filter bits</description><bitOffset>30</bitOffset><bitWidth>1</bitWidth></field><field><name>FB31</name><description>Filter bits</description><bitOffset>31</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>F6R2</name><displayName>F6R2</displayName><description>Filter bank 6 register 2</description><addressOffset>0x274</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>FB0</name><description>Filter bits</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field><field><name>FB1</name><description>Filter bits</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>FB2</name><description>Filter bits</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>FB3</name><description>Filter bits</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>FB4</name><description>Filter bits</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>FB5</name><description>Filter bits</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>FB6</name><description>Filter bits</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>FB7</name><description>Filter bits</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>FB8</name><description>Filter bits</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>FB9</name><description>Filter bits</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>FB10</name><description>Filter bits</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>FB11</name><description>Filter bits</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>FB12</name><description>Filter bits</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>FB13</name><description>Filter bits</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>FB14</name><description>Filter bits</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>FB15</name><description>Filter bits</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>FB16</name><description>Filter bits</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth></field><field><name>FB17</name><description>Filter bits</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth></field><field><name>FB18</name><description>Filter bits</description><bitOffset>18</bitOffset><bitWidth>1</bitWidth></field><field><name>FB19</name><description>Filter bits</description><bitOffset>19</bitOffset><bitWidth>1</bitWidth></field><field><name>FB20</name><description>Filter bits</description><bitOffset>20</bitOffset><bitWidth>1</bitWidth></field><field><name>FB21</name><description>Filter bits</description><bitOffset>21</bitOffset><bitWidth>1</bitWidth></field><field><name>FB22</name><description>Filter bits</description><bitOffset>22</bitOffset><bitWidth>1</bitWidth></field><field><name>FB23</name><description>Filter bits</description><bitOffset>23</bitOffset><bitWidth>1</bitWidth></field><field><name>FB24</name><description>Filter bits</description><bitOffset>24</bitOffset><bitWidth>1</bitWidth></field><field><name>FB25</name><description>Filter bits</description><bitOffset>25</bitOffset><bitWidth>1</bitWidth></field><field><name>FB26</name><description>Filter bits</description><bitOffset>26</bitOffset><bitWidth>1</bitWidth></field><field><name>FB27</name><description>Filter bits</description><bitOffset>27</bitOffset><bitWidth>1</bitWidth></field><field><name>FB28</name><description>Filter bits</description><bitOffset>28</bitOffset><bitWidth>1</bitWidth></field><field><name>FB29</name><description>Filter bits</description><bitOffset>29</bitOffset><bitWidth>1</bitWidth></field><field><name>FB30</name><description>Filter bits</description><bitOffset>30</bitOffset><bitWidth>1</bitWidth></field><field><name>FB31</name><description>Filter bits</description><bitOffset>31</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>F7R1</name><displayName>F7R1</displayName><description>Filter bank 7 register 1</description><addressOffset>0x278</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>FB0</name><description>Filter bits</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field><field><name>FB1</name><description>Filter bits</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>FB2</name><description>Filter bits</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>FB3</name><description>Filter bits</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>FB4</name><description>Filter bits</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>FB5</name><description>Filter bits</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>FB6</name><description>Filter bits</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>FB7</name><description>Filter bits</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>FB8</name><description>Filter bits</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>FB9</name><description>Filter bits</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>FB10</name><description>Filter bits</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>FB11</name><description>Filter bits</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>FB12</name><description>Filter bits</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>FB13</name><description>Filter bits</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>FB14</name><description>Filter bits</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>FB15</name><description>Filter bits</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>FB16</name><description>Filter bits</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth></field><field><name>FB17</name><description>Filter bits</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth></field><field><name>FB18</name><description>Filter bits</description><bitOffset>18</bitOffset><bitWidth>1</bitWidth></field><field><name>FB19</name><description>Filter bits</description><bitOffset>19</bitOffset><bitWidth>1</bitWidth></field><field><name>FB20</name><description>Filter bits</description><bitOffset>20</bitOffset><bitWidth>1</bitWidth></field><field><name>FB21</name><description>Filter bits</description><bitOffset>21</bitOffset><bitWidth>1</bitWidth></field><field><name>FB22</name><description>Filter bits</description><bitOffset>22</bitOffset><bitWidth>1</bitWidth></field><field><name>FB23</name><description>Filter bits</description><bitOffset>23</bitOffset><bitWidth>1</bitWidth></field><field><name>FB24</name><description>Filter bits</description><bitOffset>24</bitOffset><bitWidth>1</bitWidth></field><field><name>FB25</name><description>Filter bits</description><bitOffset>25</bitOffset><bitWidth>1</bitWidth></field><field><name>FB26</name><description>Filter bits</description><bitOffset>26</bitOffset><bitWidth>1</bitWidth></field><field><name>FB27</name><description>Filter bits</description><bitOffset>27</bitOffset><bitWidth>1</bitWidth></field><field><name>FB28</name><description>Filter bits</description><bitOffset>28</bitOffset><bitWidth>1</bitWidth></field><field><name>FB29</name><description>Filter bits</description><bitOffset>29</bitOffset><bitWidth>1</bitWidth></field><field><name>FB30</name><description>Filter bits</description><bitOffset>30</bitOffset><bitWidth>1</bitWidth></field><field><name>FB31</name><description>Filter bits</description><bitOffset>31</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>F7R2</name><displayName>F7R2</displayName><description>Filter bank 7 register 2</description><addressOffset>0x27C</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>FB0</name><description>Filter bits</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field><field><name>FB1</name><description>Filter bits</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>FB2</name><description>Filter bits</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>FB3</name><description>Filter bits</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>FB4</name><description>Filter bits</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>FB5</name><description>Filter bits</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>FB6</name><description>Filter bits</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>FB7</name><description>Filter bits</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>FB8</name><description>Filter bits</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>FB9</name><description>Filter bits</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>FB10</name><description>Filter bits</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>FB11</name><description>Filter bits</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>FB12</name><description>Filter bits</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>FB13</name><description>Filter bits</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>FB14</name><description>Filter bits</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>FB15</name><description>Filter bits</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>FB16</name><description>Filter bits</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth></field><field><name>FB17</name><description>Filter bits</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth></field><field><name>FB18</name><description>Filter bits</description><bitOffset>18</bitOffset><bitWidth>1</bitWidth></field><field><name>FB19</name><description>Filter bits</description><bitOffset>19</bitOffset><bitWidth>1</bitWidth></field><field><name>FB20</name><description>Filter bits</description><bitOffset>20</bitOffset><bitWidth>1</bitWidth></field><field><name>FB21</name><description>Filter bits</description><bitOffset>21</bitOffset><bitWidth>1</bitWidth></field><field><name>FB22</name><description>Filter bits</description><bitOffset>22</bitOffset><bitWidth>1</bitWidth></field><field><name>FB23</name><description>Filter bits</description><bitOffset>23</bitOffset><bitWidth>1</bitWidth></field><field><name>FB24</name><description>Filter bits</description><bitOffset>24</bitOffset><bitWidth>1</bitWidth></field><field><name>FB25</name><description>Filter bits</description><bitOffset>25</bitOffset><bitWidth>1</bitWidth></field><field><name>FB26</name><description>Filter bits</description><bitOffset>26</bitOffset><bitWidth>1</bitWidth></field><field><name>FB27</name><description>Filter bits</description><bitOffset>27</bitOffset><bitWidth>1</bitWidth></field><field><name>FB28</name><description>Filter bits</description><bitOffset>28</bitOffset><bitWidth>1</bitWidth></field><field><name>FB29</name><description>Filter bits</description><bitOffset>29</bitOffset><bitWidth>1</bitWidth></field><field><name>FB30</name><description>Filter bits</description><bitOffset>30</bitOffset><bitWidth>1</bitWidth></field><field><name>FB31</name><description>Filter bits</description><bitOffset>31</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>F8R1</name><displayName>F8R1</displayName><description>Filter bank 8 register 1</description><addressOffset>0x280</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>FB0</name><description>Filter bits</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field><field><name>FB1</name><description>Filter bits</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>FB2</name><description>Filter bits</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>FB3</name><description>Filter bits</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>FB4</name><description>Filter bits</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>FB5</name><description>Filter bits</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>FB6</name><description>Filter bits</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>FB7</name><description>Filter bits</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>FB8</name><description>Filter bits</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>FB9</name><description>Filter bits</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>FB10</name><description>Filter bits</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>FB11</name><description>Filter bits</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>FB12</name><description>Filter bits</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>FB13</name><description>Filter bits</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>FB14</name><description>Filter bits</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>FB15</name><description>Filter bits</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>FB16</name><description>Filter bits</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth></field><field><name>FB17</name><description>Filter bits</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth></field><field><name>FB18</name><description>Filter bits</description><bitOffset>18</bitOffset><bitWidth>1</bitWidth></field><field><name>FB19</name><description>Filter bits</description><bitOffset>19</bitOffset><bitWidth>1</bitWidth></field><field><name>FB20</name><description>Filter bits</description><bitOffset>20</bitOffset><bitWidth>1</bitWidth></field><field><name>FB21</name><description>Filter bits</description><bitOffset>21</bitOffset><bitWidth>1</bitWidth></field><field><name>FB22</name><description>Filter bits</description><bitOffset>22</bitOffset><bitWidth>1</bitWidth></field><field><name>FB23</name><description>Filter bits</description><bitOffset>23</bitOffset><bitWidth>1</bitWidth></field><field><name>FB24</name><description>Filter bits</description><bitOffset>24</bitOffset><bitWidth>1</bitWidth></field><field><name>FB25</name><description>Filter bits</description><bitOffset>25</bitOffset><bitWidth>1</bitWidth></field><field><name>FB26</name><description>Filter bits</description><bitOffset>26</bitOffset><bitWidth>1</bitWidth></field><field><name>FB27</name><description>Filter bits</description><bitOffset>27</bitOffset><bitWidth>1</bitWidth></field><field><name>FB28</name><description>Filter bits</description><bitOffset>28</bitOffset><bitWidth>1</bitWidth></field><field><name>FB29</name><description>Filter bits</description><bitOffset>29</bitOffset><bitWidth>1</bitWidth></field><field><name>FB30</name><description>Filter bits</description><bitOffset>30</bitOffset><bitWidth>1</bitWidth></field><field><name>FB31</name><description>Filter bits</description><bitOffset>31</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>F8R2</name><displayName>F8R2</displayName><description>Filter bank 8 register 2</description><addressOffset>0x284</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>FB0</name><description>Filter bits</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field><field><name>FB1</name><description>Filter bits</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>FB2</name><description>Filter bits</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>FB3</name><description>Filter bits</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>FB4</name><description>Filter bits</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>FB5</name><description>Filter bits</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>FB6</name><description>Filter bits</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>FB7</name><description>Filter bits</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>FB8</name><description>Filter bits</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>FB9</name><description>Filter bits</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>FB10</name><description>Filter bits</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>FB11</name><description>Filter bits</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>FB12</name><description>Filter bits</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>FB13</name><description>Filter bits</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>FB14</name><description>Filter bits</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>FB15</name><description>Filter bits</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>FB16</name><description>Filter bits</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth></field><field><name>FB17</name><description>Filter bits</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth></field><field><name>FB18</name><description>Filter bits</description><bitOffset>18</bitOffset><bitWidth>1</bitWidth></field><field><name>FB19</name><description>Filter bits</description><bitOffset>19</bitOffset><bitWidth>1</bitWidth></field><field><name>FB20</name><description>Filter bits</description><bitOffset>20</bitOffset><bitWidth>1</bitWidth></field><field><name>FB21</name><description>Filter bits</description><bitOffset>21</bitOffset><bitWidth>1</bitWidth></field><field><name>FB22</name><description>Filter bits</description><bitOffset>22</bitOffset><bitWidth>1</bitWidth></field><field><name>FB23</name><description>Filter bits</description><bitOffset>23</bitOffset><bitWidth>1</bitWidth></field><field><name>FB24</name><description>Filter bits</description><bitOffset>24</bitOffset><bitWidth>1</bitWidth></field><field><name>FB25</name><description>Filter bits</description><bitOffset>25</bitOffset><bitWidth>1</bitWidth></field><field><name>FB26</name><description>Filter bits</description><bitOffset>26</bitOffset><bitWidth>1</bitWidth></field><field><name>FB27</name><description>Filter bits</description><bitOffset>27</bitOffset><bitWidth>1</bitWidth></field><field><name>FB28</name><description>Filter bits</description><bitOffset>28</bitOffset><bitWidth>1</bitWidth></field><field><name>FB29</name><description>Filter bits</description><bitOffset>29</bitOffset><bitWidth>1</bitWidth></field><field><name>FB30</name><description>Filter bits</description><bitOffset>30</bitOffset><bitWidth>1</bitWidth></field><field><name>FB31</name><description>Filter bits</description><bitOffset>31</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>F9R1</name><displayName>F9R1</displayName><description>Filter bank 9 register 1</description><addressOffset>0x288</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>FB0</name><description>Filter bits</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field><field><name>FB1</name><description>Filter bits</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>FB2</name><description>Filter bits</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>FB3</name><description>Filter bits</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>FB4</name><description>Filter bits</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>FB5</name><description>Filter bits</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>FB6</name><description>Filter bits</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>FB7</name><description>Filter bits</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>FB8</name><description>Filter bits</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>FB9</name><description>Filter bits</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>FB10</name><description>Filter bits</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>FB11</name><description>Filter bits</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>FB12</name><description>Filter bits</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>FB13</name><description>Filter bits</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>FB14</name><description>Filter bits</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>FB15</name><description>Filter bits</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>FB16</name><description>Filter bits</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth></field><field><name>FB17</name><description>Filter bits</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth></field><field><name>FB18</name><description>Filter bits</description><bitOffset>18</bitOffset><bitWidth>1</bitWidth></field><field><name>FB19</name><description>Filter bits</description><bitOffset>19</bitOffset><bitWidth>1</bitWidth></field><field><name>FB20</name><description>Filter bits</description><bitOffset>20</bitOffset><bitWidth>1</bitWidth></field><field><name>FB21</name><description>Filter bits</description><bitOffset>21</bitOffset><bitWidth>1</bitWidth></field><field><name>FB22</name><description>Filter bits</description><bitOffset>22</bitOffset><bitWidth>1</bitWidth></field><field><name>FB23</name><description>Filter bits</description><bitOffset>23</bitOffset><bitWidth>1</bitWidth></field><field><name>FB24</name><description>Filter bits</description><bitOffset>24</bitOffset><bitWidth>1</bitWidth></field><field><name>FB25</name><description>Filter bits</description><bitOffset>25</bitOffset><bitWidth>1</bitWidth></field><field><name>FB26</name><description>Filter bits</description><bitOffset>26</bitOffset><bitWidth>1</bitWidth></field><field><name>FB27</name><description>Filter bits</description><bitOffset>27</bitOffset><bitWidth>1</bitWidth></field><field><name>FB28</name><description>Filter bits</description><bitOffset>28</bitOffset><bitWidth>1</bitWidth></field><field><name>FB29</name><description>Filter bits</description><bitOffset>29</bitOffset><bitWidth>1</bitWidth></field><field><name>FB30</name><description>Filter bits</description><bitOffset>30</bitOffset><bitWidth>1</bitWidth></field><field><name>FB31</name><description>Filter bits</description><bitOffset>31</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>F9R2</name><displayName>F9R2</displayName><description>Filter bank 9 register 2</description><addressOffset>0x28C</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>FB0</name><description>Filter bits</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field><field><name>FB1</name><description>Filter bits</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>FB2</name><description>Filter bits</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>FB3</name><description>Filter bits</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>FB4</name><description>Filter bits</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>FB5</name><description>Filter bits</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>FB6</name><description>Filter bits</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>FB7</name><description>Filter bits</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>FB8</name><description>Filter bits</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>FB9</name><description>Filter bits</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>FB10</name><description>Filter bits</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>FB11</name><description>Filter bits</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>FB12</name><description>Filter bits</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>FB13</name><description>Filter bits</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>FB14</name><description>Filter bits</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>FB15</name><description>Filter bits</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>FB16</name><description>Filter bits</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth></field><field><name>FB17</name><description>Filter bits</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth></field><field><name>FB18</name><description>Filter bits</description><bitOffset>18</bitOffset><bitWidth>1</bitWidth></field><field><name>FB19</name><description>Filter bits</description><bitOffset>19</bitOffset><bitWidth>1</bitWidth></field><field><name>FB20</name><description>Filter bits</description><bitOffset>20</bitOffset><bitWidth>1</bitWidth></field><field><name>FB21</name><description>Filter bits</description><bitOffset>21</bitOffset><bitWidth>1</bitWidth></field><field><name>FB22</name><description>Filter bits</description><bitOffset>22</bitOffset><bitWidth>1</bitWidth></field><field><name>FB23</name><description>Filter bits</description><bitOffset>23</bitOffset><bitWidth>1</bitWidth></field><field><name>FB24</name><description>Filter bits</description><bitOffset>24</bitOffset><bitWidth>1</bitWidth></field><field><name>FB25</name><description>Filter bits</description><bitOffset>25</bitOffset><bitWidth>1</bitWidth></field><field><name>FB26</name><description>Filter bits</description><bitOffset>26</bitOffset><bitWidth>1</bitWidth></field><field><name>FB27</name><description>Filter bits</description><bitOffset>27</bitOffset><bitWidth>1</bitWidth></field><field><name>FB28</name><description>Filter bits</description><bitOffset>28</bitOffset><bitWidth>1</bitWidth></field><field><name>FB29</name><description>Filter bits</description><bitOffset>29</bitOffset><bitWidth>1</bitWidth></field><field><name>FB30</name><description>Filter bits</description><bitOffset>30</bitOffset><bitWidth>1</bitWidth></field><field><name>FB31</name><description>Filter bits</description><bitOffset>31</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>F10R1</name><displayName>F10R1</displayName><description>Filter bank 10 register 1</description><addressOffset>0x290</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>FB0</name><description>Filter bits</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field><field><name>FB1</name><description>Filter bits</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>FB2</name><description>Filter bits</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>FB3</name><description>Filter bits</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>FB4</name><description>Filter bits</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>FB5</name><description>Filter bits</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>FB6</name><description>Filter bits</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>FB7</name><description>Filter bits</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>FB8</name><description>Filter bits</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>FB9</name><description>Filter bits</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>FB10</name><description>Filter bits</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>FB11</name><description>Filter bits</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>FB12</name><description>Filter bits</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>FB13</name><description>Filter bits</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>FB14</name><description>Filter bits</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>FB15</name><description>Filter bits</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>FB16</name><description>Filter bits</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth></field><field><name>FB17</name><description>Filter bits</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth></field><field><name>FB18</name><description>Filter bits</description><bitOffset>18</bitOffset><bitWidth>1</bitWidth></field><field><name>FB19</name><description>Filter bits</description><bitOffset>19</bitOffset><bitWidth>1</bitWidth></field><field><name>FB20</name><description>Filter bits</description><bitOffset>20</bitOffset><bitWidth>1</bitWidth></field><field><name>FB21</name><description>Filter bits</description><bitOffset>21</bitOffset><bitWidth>1</bitWidth></field><field><name>FB22</name><description>Filter bits</description><bitOffset>22</bitOffset><bitWidth>1</bitWidth></field><field><name>FB23</name><description>Filter bits</description><bitOffset>23</bitOffset><bitWidth>1</bitWidth></field><field><name>FB24</name><description>Filter bits</description><bitOffset>24</bitOffset><bitWidth>1</bitWidth></field><field><name>FB25</name><description>Filter bits</description><bitOffset>25</bitOffset><bitWidth>1</bitWidth></field><field><name>FB26</name><description>Filter bits</description><bitOffset>26</bitOffset><bitWidth>1</bitWidth></field><field><name>FB27</name><description>Filter bits</description><bitOffset>27</bitOffset><bitWidth>1</bitWidth></field><field><name>FB28</name><description>Filter bits</description><bitOffset>28</bitOffset><bitWidth>1</bitWidth></field><field><name>FB29</name><description>Filter bits</description><bitOffset>29</bitOffset><bitWidth>1</bitWidth></field><field><name>FB30</name><description>Filter bits</description><bitOffset>30</bitOffset><bitWidth>1</bitWidth></field><field><name>FB31</name><description>Filter bits</description><bitOffset>31</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>F10R2</name><displayName>F10R2</displayName><description>Filter bank 10 register 2</description><addressOffset>0x294</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>FB0</name><description>Filter bits</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field><field><name>FB1</name><description>Filter bits</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>FB2</name><description>Filter bits</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>FB3</name><description>Filter bits</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>FB4</name><description>Filter bits</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>FB5</name><description>Filter bits</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>FB6</name><description>Filter bits</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>FB7</name><description>Filter bits</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>FB8</name><description>Filter bits</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>FB9</name><description>Filter bits</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>FB10</name><description>Filter bits</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>FB11</name><description>Filter bits</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>FB12</name><description>Filter bits</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>FB13</name><description>Filter bits</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>FB14</name><description>Filter bits</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>FB15</name><description>Filter bits</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>FB16</name><description>Filter bits</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth></field><field><name>FB17</name><description>Filter bits</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth></field><field><name>FB18</name><description>Filter bits</description><bitOffset>18</bitOffset><bitWidth>1</bitWidth></field><field><name>FB19</name><description>Filter bits</description><bitOffset>19</bitOffset><bitWidth>1</bitWidth></field><field><name>FB20</name><description>Filter bits</description><bitOffset>20</bitOffset><bitWidth>1</bitWidth></field><field><name>FB21</name><description>Filter bits</description><bitOffset>21</bitOffset><bitWidth>1</bitWidth></field><field><name>FB22</name><description>Filter bits</description><bitOffset>22</bitOffset><bitWidth>1</bitWidth></field><field><name>FB23</name><description>Filter bits</description><bitOffset>23</bitOffset><bitWidth>1</bitWidth></field><field><name>FB24</name><description>Filter bits</description><bitOffset>24</bitOffset><bitWidth>1</bitWidth></field><field><name>FB25</name><description>Filter bits</description><bitOffset>25</bitOffset><bitWidth>1</bitWidth></field><field><name>FB26</name><description>Filter bits</description><bitOffset>26</bitOffset><bitWidth>1</bitWidth></field><field><name>FB27</name><description>Filter bits</description><bitOffset>27</bitOffset><bitWidth>1</bitWidth></field><field><name>FB28</name><description>Filter bits</description><bitOffset>28</bitOffset><bitWidth>1</bitWidth></field><field><name>FB29</name><description>Filter bits</description><bitOffset>29</bitOffset><bitWidth>1</bitWidth></field><field><name>FB30</name><description>Filter bits</description><bitOffset>30</bitOffset><bitWidth>1</bitWidth></field><field><name>FB31</name><description>Filter bits</description><bitOffset>31</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>F11R1</name><displayName>F11R1</displayName><description>Filter bank 11 register 1</description><addressOffset>0x298</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>FB0</name><description>Filter bits</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field><field><name>FB1</name><description>Filter bits</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>FB2</name><description>Filter bits</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>FB3</name><description>Filter bits</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>FB4</name><description>Filter bits</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>FB5</name><description>Filter bits</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>FB6</name><description>Filter bits</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>FB7</name><description>Filter bits</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>FB8</name><description>Filter bits</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>FB9</name><description>Filter bits</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>FB10</name><description>Filter bits</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>FB11</name><description>Filter bits</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>FB12</name><description>Filter bits</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>FB13</name><description>Filter bits</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>FB14</name><description>Filter bits</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>FB15</name><description>Filter bits</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>FB16</name><description>Filter bits</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth></field><field><name>FB17</name><description>Filter bits</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth></field><field><name>FB18</name><description>Filter bits</description><bitOffset>18</bitOffset><bitWidth>1</bitWidth></field><field><name>FB19</name><description>Filter bits</description><bitOffset>19</bitOffset><bitWidth>1</bitWidth></field><field><name>FB20</name><description>Filter bits</description><bitOffset>20</bitOffset><bitWidth>1</bitWidth></field><field><name>FB21</name><description>Filter bits</description><bitOffset>21</bitOffset><bitWidth>1</bitWidth></field><field><name>FB22</name><description>Filter bits</description><bitOffset>22</bitOffset><bitWidth>1</bitWidth></field><field><name>FB23</name><description>Filter bits</description><bitOffset>23</bitOffset><bitWidth>1</bitWidth></field><field><name>FB24</name><description>Filter bits</description><bitOffset>24</bitOffset><bitWidth>1</bitWidth></field><field><name>FB25</name><description>Filter bits</description><bitOffset>25</bitOffset><bitWidth>1</bitWidth></field><field><name>FB26</name><description>Filter bits</description><bitOffset>26</bitOffset><bitWidth>1</bitWidth></field><field><name>FB27</name><description>Filter bits</description><bitOffset>27</bitOffset><bitWidth>1</bitWidth></field><field><name>FB28</name><description>Filter bits</description><bitOffset>28</bitOffset><bitWidth>1</bitWidth></field><field><name>FB29</name><description>Filter bits</description><bitOffset>29</bitOffset><bitWidth>1</bitWidth></field><field><name>FB30</name><description>Filter bits</description><bitOffset>30</bitOffset><bitWidth>1</bitWidth></field><field><name>FB31</name><description>Filter bits</description><bitOffset>31</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>F11R2</name><displayName>F11R2</displayName><description>Filter bank 11 register 2</description><addressOffset>0x29C</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>FB0</name><description>Filter bits</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field><field><name>FB1</name><description>Filter bits</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>FB2</name><description>Filter bits</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>FB3</name><description>Filter bits</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>FB4</name><description>Filter bits</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>FB5</name><description>Filter bits</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>FB6</name><description>Filter bits</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>FB7</name><description>Filter bits</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>FB8</name><description>Filter bits</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>FB9</name><description>Filter bits</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>FB10</name><description>Filter bits</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>FB11</name><description>Filter bits</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>FB12</name><description>Filter bits</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>FB13</name><description>Filter bits</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>FB14</name><description>Filter bits</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>FB15</name><description>Filter bits</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>FB16</name><description>Filter bits</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth></field><field><name>FB17</name><description>Filter bits</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth></field><field><name>FB18</name><description>Filter bits</description><bitOffset>18</bitOffset><bitWidth>1</bitWidth></field><field><name>FB19</name><description>Filter bits</description><bitOffset>19</bitOffset><bitWidth>1</bitWidth></field><field><name>FB20</name><description>Filter bits</description><bitOffset>20</bitOffset><bitWidth>1</bitWidth></field><field><name>FB21</name><description>Filter bits</description><bitOffset>21</bitOffset><bitWidth>1</bitWidth></field><field><name>FB22</name><description>Filter bits</description><bitOffset>22</bitOffset><bitWidth>1</bitWidth></field><field><name>FB23</name><description>Filter bits</description><bitOffset>23</bitOffset><bitWidth>1</bitWidth></field><field><name>FB24</name><description>Filter bits</description><bitOffset>24</bitOffset><bitWidth>1</bitWidth></field><field><name>FB25</name><description>Filter bits</description><bitOffset>25</bitOffset><bitWidth>1</bitWidth></field><field><name>FB26</name><description>Filter bits</description><bitOffset>26</bitOffset><bitWidth>1</bitWidth></field><field><name>FB27</name><description>Filter bits</description><bitOffset>27</bitOffset><bitWidth>1</bitWidth></field><field><name>FB28</name><description>Filter bits</description><bitOffset>28</bitOffset><bitWidth>1</bitWidth></field><field><name>FB29</name><description>Filter bits</description><bitOffset>29</bitOffset><bitWidth>1</bitWidth></field><field><name>FB30</name><description>Filter bits</description><bitOffset>30</bitOffset><bitWidth>1</bitWidth></field><field><name>FB31</name><description>Filter bits</description><bitOffset>31</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>F12R1</name><displayName>F12R1</displayName><description>Filter bank 4 register 1</description><addressOffset>0x2A0</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>FB0</name><description>Filter bits</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field><field><name>FB1</name><description>Filter bits</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>FB2</name><description>Filter bits</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>FB3</name><description>Filter bits</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>FB4</name><description>Filter bits</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>FB5</name><description>Filter bits</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>FB6</name><description>Filter bits</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>FB7</name><description>Filter bits</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>FB8</name><description>Filter bits</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>FB9</name><description>Filter bits</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>FB10</name><description>Filter bits</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>FB11</name><description>Filter bits</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>FB12</name><description>Filter bits</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>FB13</name><description>Filter bits</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>FB14</name><description>Filter bits</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>FB15</name><description>Filter bits</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>FB16</name><description>Filter bits</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth></field><field><name>FB17</name><description>Filter bits</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth></field><field><name>FB18</name><description>Filter bits</description><bitOffset>18</bitOffset><bitWidth>1</bitWidth></field><field><name>FB19</name><description>Filter bits</description><bitOffset>19</bitOffset><bitWidth>1</bitWidth></field><field><name>FB20</name><description>Filter bits</description><bitOffset>20</bitOffset><bitWidth>1</bitWidth></field><field><name>FB21</name><description>Filter bits</description><bitOffset>21</bitOffset><bitWidth>1</bitWidth></field><field><name>FB22</name><description>Filter bits</description><bitOffset>22</bitOffset><bitWidth>1</bitWidth></field><field><name>FB23</name><description>Filter bits</description><bitOffset>23</bitOffset><bitWidth>1</bitWidth></field><field><name>FB24</name><description>Filter bits</description><bitOffset>24</bitOffset><bitWidth>1</bitWidth></field><field><name>FB25</name><description>Filter bits</description><bitOffset>25</bitOffset><bitWidth>1</bitWidth></field><field><name>FB26</name><description>Filter bits</description><bitOffset>26</bitOffset><bitWidth>1</bitWidth></field><field><name>FB27</name><description>Filter bits</description><bitOffset>27</bitOffset><bitWidth>1</bitWidth></field><field><name>FB28</name><description>Filter bits</description><bitOffset>28</bitOffset><bitWidth>1</bitWidth></field><field><name>FB29</name><description>Filter bits</description><bitOffset>29</bitOffset><bitWidth>1</bitWidth></field><field><name>FB30</name><description>Filter bits</description><bitOffset>30</bitOffset><bitWidth>1</bitWidth></field><field><name>FB31</name><description>Filter bits</description><bitOffset>31</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>F12R2</name><displayName>F12R2</displayName><description>Filter bank 12 register 2</description><addressOffset>0x2A4</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>FB0</name><description>Filter bits</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field><field><name>FB1</name><description>Filter bits</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>FB2</name><description>Filter bits</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>FB3</name><description>Filter bits</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>FB4</name><description>Filter bits</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>FB5</name><description>Filter bits</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>FB6</name><description>Filter bits</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>FB7</name><description>Filter bits</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>FB8</name><description>Filter bits</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>FB9</name><description>Filter bits</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>FB10</name><description>Filter bits</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>FB11</name><description>Filter bits</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>FB12</name><description>Filter bits</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>FB13</name><description>Filter bits</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>FB14</name><description>Filter bits</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>FB15</name><description>Filter bits</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>FB16</name><description>Filter bits</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth></field><field><name>FB17</name><description>Filter bits</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth></field><field><name>FB18</name><description>Filter bits</description><bitOffset>18</bitOffset><bitWidth>1</bitWidth></field><field><name>FB19</name><description>Filter bits</description><bitOffset>19</bitOffset><bitWidth>1</bitWidth></field><field><name>FB20</name><description>Filter bits</description><bitOffset>20</bitOffset><bitWidth>1</bitWidth></field><field><name>FB21</name><description>Filter bits</description><bitOffset>21</bitOffset><bitWidth>1</bitWidth></field><field><name>FB22</name><description>Filter bits</description><bitOffset>22</bitOffset><bitWidth>1</bitWidth></field><field><name>FB23</name><description>Filter bits</description><bitOffset>23</bitOffset><bitWidth>1</bitWidth></field><field><name>FB24</name><description>Filter bits</description><bitOffset>24</bitOffset><bitWidth>1</bitWidth></field><field><name>FB25</name><description>Filter bits</description><bitOffset>25</bitOffset><bitWidth>1</bitWidth></field><field><name>FB26</name><description>Filter bits</description><bitOffset>26</bitOffset><bitWidth>1</bitWidth></field><field><name>FB27</name><description>Filter bits</description><bitOffset>27</bitOffset><bitWidth>1</bitWidth></field><field><name>FB28</name><description>Filter bits</description><bitOffset>28</bitOffset><bitWidth>1</bitWidth></field><field><name>FB29</name><description>Filter bits</description><bitOffset>29</bitOffset><bitWidth>1</bitWidth></field><field><name>FB30</name><description>Filter bits</description><bitOffset>30</bitOffset><bitWidth>1</bitWidth></field><field><name>FB31</name><description>Filter bits</description><bitOffset>31</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>F13R1</name><displayName>F13R1</displayName><description>Filter bank 13 register 1</description><addressOffset>0x2A8</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>FB0</name><description>Filter bits</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field><field><name>FB1</name><description>Filter bits</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>FB2</name><description>Filter bits</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>FB3</name><description>Filter bits</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>FB4</name><description>Filter bits</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>FB5</name><description>Filter bits</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>FB6</name><description>Filter bits</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>FB7</name><description>Filter bits</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>FB8</name><description>Filter bits</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>FB9</name><description>Filter bits</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>FB10</name><description>Filter bits</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>FB11</name><description>Filter bits</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>FB12</name><description>Filter bits</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>FB13</name><description>Filter bits</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>FB14</name><description>Filter bits</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>FB15</name><description>Filter bits</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>FB16</name><description>Filter bits</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth></field><field><name>FB17</name><description>Filter bits</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth></field><field><name>FB18</name><description>Filter bits</description><bitOffset>18</bitOffset><bitWidth>1</bitWidth></field><field><name>FB19</name><description>Filter bits</description><bitOffset>19</bitOffset><bitWidth>1</bitWidth></field><field><name>FB20</name><description>Filter bits</description><bitOffset>20</bitOffset><bitWidth>1</bitWidth></field><field><name>FB21</name><description>Filter bits</description><bitOffset>21</bitOffset><bitWidth>1</bitWidth></field><field><name>FB22</name><description>Filter bits</description><bitOffset>22</bitOffset><bitWidth>1</bitWidth></field><field><name>FB23</name><description>Filter bits</description><bitOffset>23</bitOffset><bitWidth>1</bitWidth></field><field><name>FB24</name><description>Filter bits</description><bitOffset>24</bitOffset><bitWidth>1</bitWidth></field><field><name>FB25</name><description>Filter bits</description><bitOffset>25</bitOffset><bitWidth>1</bitWidth></field><field><name>FB26</name><description>Filter bits</description><bitOffset>26</bitOffset><bitWidth>1</bitWidth></field><field><name>FB27</name><description>Filter bits</description><bitOffset>27</bitOffset><bitWidth>1</bitWidth></field><field><name>FB28</name><description>Filter bits</description><bitOffset>28</bitOffset><bitWidth>1</bitWidth></field><field><name>FB29</name><description>Filter bits</description><bitOffset>29</bitOffset><bitWidth>1</bitWidth></field><field><name>FB30</name><description>Filter bits</description><bitOffset>30</bitOffset><bitWidth>1</bitWidth></field><field><name>FB31</name><description>Filter bits</description><bitOffset>31</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>F13R2</name><displayName>F13R2</displayName><description>Filter bank 13 register 2</description><addressOffset>0x2AC</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>FB0</name><description>Filter bits</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field><field><name>FB1</name><description>Filter bits</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>FB2</name><description>Filter bits</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>FB3</name><description>Filter bits</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>FB4</name><description>Filter bits</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>FB5</name><description>Filter bits</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>FB6</name><description>Filter bits</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>FB7</name><description>Filter bits</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>FB8</name><description>Filter bits</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>FB9</name><description>Filter bits</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>FB10</name><description>Filter bits</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>FB11</name><description>Filter bits</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>FB12</name><description>Filter bits</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>FB13</name><description>Filter bits</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>FB14</name><description>Filter bits</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>FB15</name><description>Filter bits</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>FB16</name><description>Filter bits</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth></field><field><name>FB17</name><description>Filter bits</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth></field><field><name>FB18</name><description>Filter bits</description><bitOffset>18</bitOffset><bitWidth>1</bitWidth></field><field><name>FB19</name><description>Filter bits</description><bitOffset>19</bitOffset><bitWidth>1</bitWidth></field><field><name>FB20</name><description>Filter bits</description><bitOffset>20</bitOffset><bitWidth>1</bitWidth></field><field><name>FB21</name><description>Filter bits</description><bitOffset>21</bitOffset><bitWidth>1</bitWidth></field><field><name>FB22</name><description>Filter bits</description><bitOffset>22</bitOffset><bitWidth>1</bitWidth></field><field><name>FB23</name><description>Filter bits</description><bitOffset>23</bitOffset><bitWidth>1</bitWidth></field><field><name>FB24</name><description>Filter bits</description><bitOffset>24</bitOffset><bitWidth>1</bitWidth></field><field><name>FB25</name><description>Filter bits</description><bitOffset>25</bitOffset><bitWidth>1</bitWidth></field><field><name>FB26</name><description>Filter bits</description><bitOffset>26</bitOffset><bitWidth>1</bitWidth></field><field><name>FB27</name><description>Filter bits</description><bitOffset>27</bitOffset><bitWidth>1</bitWidth></field><field><name>FB28</name><description>Filter bits</description><bitOffset>28</bitOffset><bitWidth>1</bitWidth></field><field><name>FB29</name><description>Filter bits</description><bitOffset>29</bitOffset><bitWidth>1</bitWidth></field><field><name>FB30</name><description>Filter bits</description><bitOffset>30</bitOffset><bitWidth>1</bitWidth></field><field><name>FB31</name><description>Filter bits</description><bitOffset>31</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>F14R1</name><displayName>F14R1</displayName><description>Filter bank 14 register 1</description><addressOffset>0x2B0</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>FB0</name><description>Filter bits</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field><field><name>FB1</name><description>Filter bits</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>FB2</name><description>Filter bits</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>FB3</name><description>Filter bits</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>FB4</name><description>Filter bits</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>FB5</name><description>Filter bits</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>FB6</name><description>Filter bits</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>FB7</name><description>Filter bits</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>FB8</name><description>Filter bits</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>FB9</name><description>Filter bits</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>FB10</name><description>Filter bits</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>FB11</name><description>Filter bits</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>FB12</name><description>Filter bits</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>FB13</name><description>Filter bits</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>FB14</name><description>Filter bits</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>FB15</name><description>Filter bits</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>FB16</name><description>Filter bits</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth></field><field><name>FB17</name><description>Filter bits</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth></field><field><name>FB18</name><description>Filter bits</description><bitOffset>18</bitOffset><bitWidth>1</bitWidth></field><field><name>FB19</name><description>Filter bits</description><bitOffset>19</bitOffset><bitWidth>1</bitWidth></field><field><name>FB20</name><description>Filter bits</description><bitOffset>20</bitOffset><bitWidth>1</bitWidth></field><field><name>FB21</name><description>Filter bits</description><bitOffset>21</bitOffset><bitWidth>1</bitWidth></field><field><name>FB22</name><description>Filter bits</description><bitOffset>22</bitOffset><bitWidth>1</bitWidth></field><field><name>FB23</name><description>Filter bits</description><bitOffset>23</bitOffset><bitWidth>1</bitWidth></field><field><name>FB24</name><description>Filter bits</description><bitOffset>24</bitOffset><bitWidth>1</bitWidth></field><field><name>FB25</name><description>Filter bits</description><bitOffset>25</bitOffset><bitWidth>1</bitWidth></field><field><name>FB26</name><description>Filter bits</description><bitOffset>26</bitOffset><bitWidth>1</bitWidth></field><field><name>FB27</name><description>Filter bits</description><bitOffset>27</bitOffset><bitWidth>1</bitWidth></field><field><name>FB28</name><description>Filter bits</description><bitOffset>28</bitOffset><bitWidth>1</bitWidth></field><field><name>FB29</name><description>Filter bits</description><bitOffset>29</bitOffset><bitWidth>1</bitWidth></field><field><name>FB30</name><description>Filter bits</description><bitOffset>30</bitOffset><bitWidth>1</bitWidth></field><field><name>FB31</name><description>Filter bits</description><bitOffset>31</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>F14R2</name><displayName>F14R2</displayName><description>Filter bank 14 register 2</description><addressOffset>0x2B4</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>FB0</name><description>Filter bits</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field><field><name>FB1</name><description>Filter bits</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>FB2</name><description>Filter bits</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>FB3</name><description>Filter bits</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>FB4</name><description>Filter bits</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>FB5</name><description>Filter bits</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>FB6</name><description>Filter bits</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>FB7</name><description>Filter bits</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>FB8</name><description>Filter bits</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>FB9</name><description>Filter bits</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>FB10</name><description>Filter bits</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>FB11</name><description>Filter bits</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>FB12</name><description>Filter bits</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>FB13</name><description>Filter bits</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>FB14</name><description>Filter bits</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>FB15</name><description>Filter bits</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>FB16</name><description>Filter bits</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth></field><field><name>FB17</name><description>Filter bits</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth></field><field><name>FB18</name><description>Filter bits</description><bitOffset>18</bitOffset><bitWidth>1</bitWidth></field><field><name>FB19</name><description>Filter bits</description><bitOffset>19</bitOffset><bitWidth>1</bitWidth></field><field><name>FB20</name><description>Filter bits</description><bitOffset>20</bitOffset><bitWidth>1</bitWidth></field><field><name>FB21</name><description>Filter bits</description><bitOffset>21</bitOffset><bitWidth>1</bitWidth></field><field><name>FB22</name><description>Filter bits</description><bitOffset>22</bitOffset><bitWidth>1</bitWidth></field><field><name>FB23</name><description>Filter bits</description><bitOffset>23</bitOffset><bitWidth>1</bitWidth></field><field><name>FB24</name><description>Filter bits</description><bitOffset>24</bitOffset><bitWidth>1</bitWidth></field><field><name>FB25</name><description>Filter bits</description><bitOffset>25</bitOffset><bitWidth>1</bitWidth></field><field><name>FB26</name><description>Filter bits</description><bitOffset>26</bitOffset><bitWidth>1</bitWidth></field><field><name>FB27</name><description>Filter bits</description><bitOffset>27</bitOffset><bitWidth>1</bitWidth></field><field><name>FB28</name><description>Filter bits</description><bitOffset>28</bitOffset><bitWidth>1</bitWidth></field><field><name>FB29</name><description>Filter bits</description><bitOffset>29</bitOffset><bitWidth>1</bitWidth></field><field><name>FB30</name><description>Filter bits</description><bitOffset>30</bitOffset><bitWidth>1</bitWidth></field><field><name>FB31</name><description>Filter bits</description><bitOffset>31</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>F15R1</name><displayName>F15R1</displayName><description>Filter bank 15 register 1</description><addressOffset>0x2B8</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>FB0</name><description>Filter bits</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field><field><name>FB1</name><description>Filter bits</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>FB2</name><description>Filter bits</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>FB3</name><description>Filter bits</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>FB4</name><description>Filter bits</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>FB5</name><description>Filter bits</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>FB6</name><description>Filter bits</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>FB7</name><description>Filter bits</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>FB8</name><description>Filter bits</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>FB9</name><description>Filter bits</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>FB10</name><description>Filter bits</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>FB11</name><description>Filter bits</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>FB12</name><description>Filter bits</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>FB13</name><description>Filter bits</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>FB14</name><description>Filter bits</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>FB15</name><description>Filter bits</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>FB16</name><description>Filter bits</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth></field><field><name>FB17</name><description>Filter bits</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth></field><field><name>FB18</name><description>Filter bits</description><bitOffset>18</bitOffset><bitWidth>1</bitWidth></field><field><name>FB19</name><description>Filter bits</description><bitOffset>19</bitOffset><bitWidth>1</bitWidth></field><field><name>FB20</name><description>Filter bits</description><bitOffset>20</bitOffset><bitWidth>1</bitWidth></field><field><name>FB21</name><description>Filter bits</description><bitOffset>21</bitOffset><bitWidth>1</bitWidth></field><field><name>FB22</name><description>Filter bits</description><bitOffset>22</bitOffset><bitWidth>1</bitWidth></field><field><name>FB23</name><description>Filter bits</description><bitOffset>23</bitOffset><bitWidth>1</bitWidth></field><field><name>FB24</name><description>Filter bits</description><bitOffset>24</bitOffset><bitWidth>1</bitWidth></field><field><name>FB25</name><description>Filter bits</description><bitOffset>25</bitOffset><bitWidth>1</bitWidth></field><field><name>FB26</name><description>Filter bits</description><bitOffset>26</bitOffset><bitWidth>1</bitWidth></field><field><name>FB27</name><description>Filter bits</description><bitOffset>27</bitOffset><bitWidth>1</bitWidth></field><field><name>FB28</name><description>Filter bits</description><bitOffset>28</bitOffset><bitWidth>1</bitWidth></field><field><name>FB29</name><description>Filter bits</description><bitOffset>29</bitOffset><bitWidth>1</bitWidth></field><field><name>FB30</name><description>Filter bits</description><bitOffset>30</bitOffset><bitWidth>1</bitWidth></field><field><name>FB31</name><description>Filter bits</description><bitOffset>31</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>F15R2</name><displayName>F15R2</displayName><description>Filter bank 15 register 2</description><addressOffset>0x2BC</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>FB0</name><description>Filter bits</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field><field><name>FB1</name><description>Filter bits</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>FB2</name><description>Filter bits</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>FB3</name><description>Filter bits</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>FB4</name><description>Filter bits</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>FB5</name><description>Filter bits</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>FB6</name><description>Filter bits</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>FB7</name><description>Filter bits</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>FB8</name><description>Filter bits</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>FB9</name><description>Filter bits</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>FB10</name><description>Filter bits</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>FB11</name><description>Filter bits</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>FB12</name><description>Filter bits</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>FB13</name><description>Filter bits</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>FB14</name><description>Filter bits</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>FB15</name><description>Filter bits</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>FB16</name><description>Filter bits</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth></field><field><name>FB17</name><description>Filter bits</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth></field><field><name>FB18</name><description>Filter bits</description><bitOffset>18</bitOffset><bitWidth>1</bitWidth></field><field><name>FB19</name><description>Filter bits</description><bitOffset>19</bitOffset><bitWidth>1</bitWidth></field><field><name>FB20</name><description>Filter bits</description><bitOffset>20</bitOffset><bitWidth>1</bitWidth></field><field><name>FB21</name><description>Filter bits</description><bitOffset>21</bitOffset><bitWidth>1</bitWidth></field><field><name>FB22</name><description>Filter bits</description><bitOffset>22</bitOffset><bitWidth>1</bitWidth></field><field><name>FB23</name><description>Filter bits</description><bitOffset>23</bitOffset><bitWidth>1</bitWidth></field><field><name>FB24</name><description>Filter bits</description><bitOffset>24</bitOffset><bitWidth>1</bitWidth></field><field><name>FB25</name><description>Filter bits</description><bitOffset>25</bitOffset><bitWidth>1</bitWidth></field><field><name>FB26</name><description>Filter bits</description><bitOffset>26</bitOffset><bitWidth>1</bitWidth></field><field><name>FB27</name><description>Filter bits</description><bitOffset>27</bitOffset><bitWidth>1</bitWidth></field><field><name>FB28</name><description>Filter bits</description><bitOffset>28</bitOffset><bitWidth>1</bitWidth></field><field><name>FB29</name><description>Filter bits</description><bitOffset>29</bitOffset><bitWidth>1</bitWidth></field><field><name>FB30</name><description>Filter bits</description><bitOffset>30</bitOffset><bitWidth>1</bitWidth></field><field><name>FB31</name><description>Filter bits</description><bitOffset>31</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>F16R1</name><displayName>F16R1</displayName><description>Filter bank 16 register 1</description><addressOffset>0x2C0</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>FB0</name><description>Filter bits</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field><field><name>FB1</name><description>Filter bits</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>FB2</name><description>Filter bits</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>FB3</name><description>Filter bits</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>FB4</name><description>Filter bits</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>FB5</name><description>Filter bits</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>FB6</name><description>Filter bits</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>FB7</name><description>Filter bits</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>FB8</name><description>Filter bits</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>FB9</name><description>Filter bits</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>FB10</name><description>Filter bits</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>FB11</name><description>Filter bits</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>FB12</name><description>Filter bits</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>FB13</name><description>Filter bits</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>FB14</name><description>Filter bits</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>FB15</name><description>Filter bits</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>FB16</name><description>Filter bits</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth></field><field><name>FB17</name><description>Filter bits</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth></field><field><name>FB18</name><description>Filter bits</description><bitOffset>18</bitOffset><bitWidth>1</bitWidth></field><field><name>FB19</name><description>Filter bits</description><bitOffset>19</bitOffset><bitWidth>1</bitWidth></field><field><name>FB20</name><description>Filter bits</description><bitOffset>20</bitOffset><bitWidth>1</bitWidth></field><field><name>FB21</name><description>Filter bits</description><bitOffset>21</bitOffset><bitWidth>1</bitWidth></field><field><name>FB22</name><description>Filter bits</description><bitOffset>22</bitOffset><bitWidth>1</bitWidth></field><field><name>FB23</name><description>Filter bits</description><bitOffset>23</bitOffset><bitWidth>1</bitWidth></field><field><name>FB24</name><description>Filter bits</description><bitOffset>24</bitOffset><bitWidth>1</bitWidth></field><field><name>FB25</name><description>Filter bits</description><bitOffset>25</bitOffset><bitWidth>1</bitWidth></field><field><name>FB26</name><description>Filter bits</description><bitOffset>26</bitOffset><bitWidth>1</bitWidth></field><field><name>FB27</name><description>Filter bits</description><bitOffset>27</bitOffset><bitWidth>1</bitWidth></field><field><name>FB28</name><description>Filter bits</description><bitOffset>28</bitOffset><bitWidth>1</bitWidth></field><field><name>FB29</name><description>Filter bits</description><bitOffset>29</bitOffset><bitWidth>1</bitWidth></field><field><name>FB30</name><description>Filter bits</description><bitOffset>30</bitOffset><bitWidth>1</bitWidth></field><field><name>FB31</name><description>Filter bits</description><bitOffset>31</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>F16R2</name><displayName>F16R2</displayName><description>Filter bank 16 register 2</description><addressOffset>0x2C4</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>FB0</name><description>Filter bits</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field><field><name>FB1</name><description>Filter bits</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>FB2</name><description>Filter bits</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>FB3</name><description>Filter bits</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>FB4</name><description>Filter bits</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>FB5</name><description>Filter bits</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>FB6</name><description>Filter bits</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>FB7</name><description>Filter bits</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>FB8</name><description>Filter bits</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>FB9</name><description>Filter bits</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>FB10</name><description>Filter bits</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>FB11</name><description>Filter bits</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>FB12</name><description>Filter bits</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>FB13</name><description>Filter bits</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>FB14</name><description>Filter bits</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>FB15</name><description>Filter bits</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>FB16</name><description>Filter bits</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth></field><field><name>FB17</name><description>Filter bits</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth></field><field><name>FB18</name><description>Filter bits</description><bitOffset>18</bitOffset><bitWidth>1</bitWidth></field><field><name>FB19</name><description>Filter bits</description><bitOffset>19</bitOffset><bitWidth>1</bitWidth></field><field><name>FB20</name><description>Filter bits</description><bitOffset>20</bitOffset><bitWidth>1</bitWidth></field><field><name>FB21</name><description>Filter bits</description><bitOffset>21</bitOffset><bitWidth>1</bitWidth></field><field><name>FB22</name><description>Filter bits</description><bitOffset>22</bitOffset><bitWidth>1</bitWidth></field><field><name>FB23</name><description>Filter bits</description><bitOffset>23</bitOffset><bitWidth>1</bitWidth></field><field><name>FB24</name><description>Filter bits</description><bitOffset>24</bitOffset><bitWidth>1</bitWidth></field><field><name>FB25</name><description>Filter bits</description><bitOffset>25</bitOffset><bitWidth>1</bitWidth></field><field><name>FB26</name><description>Filter bits</description><bitOffset>26</bitOffset><bitWidth>1</bitWidth></field><field><name>FB27</name><description>Filter bits</description><bitOffset>27</bitOffset><bitWidth>1</bitWidth></field><field><name>FB28</name><description>Filter bits</description><bitOffset>28</bitOffset><bitWidth>1</bitWidth></field><field><name>FB29</name><description>Filter bits</description><bitOffset>29</bitOffset><bitWidth>1</bitWidth></field><field><name>FB30</name><description>Filter bits</description><bitOffset>30</bitOffset><bitWidth>1</bitWidth></field><field><name>FB31</name><description>Filter bits</description><bitOffset>31</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>F17R1</name><displayName>F17R1</displayName><description>Filter bank 17 register 1</description><addressOffset>0x2C8</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>FB0</name><description>Filter bits</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field><field><name>FB1</name><description>Filter bits</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>FB2</name><description>Filter bits</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>FB3</name><description>Filter bits</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>FB4</name><description>Filter bits</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>FB5</name><description>Filter bits</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>FB6</name><description>Filter bits</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>FB7</name><description>Filter bits</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>FB8</name><description>Filter bits</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>FB9</name><description>Filter bits</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>FB10</name><description>Filter bits</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>FB11</name><description>Filter bits</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>FB12</name><description>Filter bits</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>FB13</name><description>Filter bits</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>FB14</name><description>Filter bits</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>FB15</name><description>Filter bits</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>FB16</name><description>Filter bits</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth></field><field><name>FB17</name><description>Filter bits</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth></field><field><name>FB18</name><description>Filter bits</description><bitOffset>18</bitOffset><bitWidth>1</bitWidth></field><field><name>FB19</name><description>Filter bits</description><bitOffset>19</bitOffset><bitWidth>1</bitWidth></field><field><name>FB20</name><description>Filter bits</description><bitOffset>20</bitOffset><bitWidth>1</bitWidth></field><field><name>FB21</name><description>Filter bits</description><bitOffset>21</bitOffset><bitWidth>1</bitWidth></field><field><name>FB22</name><description>Filter bits</description><bitOffset>22</bitOffset><bitWidth>1</bitWidth></field><field><name>FB23</name><description>Filter bits</description><bitOffset>23</bitOffset><bitWidth>1</bitWidth></field><field><name>FB24</name><description>Filter bits</description><bitOffset>24</bitOffset><bitWidth>1</bitWidth></field><field><name>FB25</name><description>Filter bits</description><bitOffset>25</bitOffset><bitWidth>1</bitWidth></field><field><name>FB26</name><description>Filter bits</description><bitOffset>26</bitOffset><bitWidth>1</bitWidth></field><field><name>FB27</name><description>Filter bits</description><bitOffset>27</bitOffset><bitWidth>1</bitWidth></field><field><name>FB28</name><description>Filter bits</description><bitOffset>28</bitOffset><bitWidth>1</bitWidth></field><field><name>FB29</name><description>Filter bits</description><bitOffset>29</bitOffset><bitWidth>1</bitWidth></field><field><name>FB30</name><description>Filter bits</description><bitOffset>30</bitOffset><bitWidth>1</bitWidth></field><field><name>FB31</name><description>Filter bits</description><bitOffset>31</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>F17R2</name><displayName>F17R2</displayName><description>Filter bank 17 register 2</description><addressOffset>0x2CC</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>FB0</name><description>Filter bits</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field><field><name>FB1</name><description>Filter bits</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>FB2</name><description>Filter bits</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>FB3</name><description>Filter bits</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>FB4</name><description>Filter bits</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>FB5</name><description>Filter bits</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>FB6</name><description>Filter bits</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>FB7</name><description>Filter bits</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>FB8</name><description>Filter bits</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>FB9</name><description>Filter bits</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>FB10</name><description>Filter bits</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>FB11</name><description>Filter bits</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>FB12</name><description>Filter bits</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>FB13</name><description>Filter bits</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>FB14</name><description>Filter bits</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>FB15</name><description>Filter bits</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>FB16</name><description>Filter bits</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth></field><field><name>FB17</name><description>Filter bits</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth></field><field><name>FB18</name><description>Filter bits</description><bitOffset>18</bitOffset><bitWidth>1</bitWidth></field><field><name>FB19</name><description>Filter bits</description><bitOffset>19</bitOffset><bitWidth>1</bitWidth></field><field><name>FB20</name><description>Filter bits</description><bitOffset>20</bitOffset><bitWidth>1</bitWidth></field><field><name>FB21</name><description>Filter bits</description><bitOffset>21</bitOffset><bitWidth>1</bitWidth></field><field><name>FB22</name><description>Filter bits</description><bitOffset>22</bitOffset><bitWidth>1</bitWidth></field><field><name>FB23</name><description>Filter bits</description><bitOffset>23</bitOffset><bitWidth>1</bitWidth></field><field><name>FB24</name><description>Filter bits</description><bitOffset>24</bitOffset><bitWidth>1</bitWidth></field><field><name>FB25</name><description>Filter bits</description><bitOffset>25</bitOffset><bitWidth>1</bitWidth></field><field><name>FB26</name><description>Filter bits</description><bitOffset>26</bitOffset><bitWidth>1</bitWidth></field><field><name>FB27</name><description>Filter bits</description><bitOffset>27</bitOffset><bitWidth>1</bitWidth></field><field><name>FB28</name><description>Filter bits</description><bitOffset>28</bitOffset><bitWidth>1</bitWidth></field><field><name>FB29</name><description>Filter bits</description><bitOffset>29</bitOffset><bitWidth>1</bitWidth></field><field><name>FB30</name><description>Filter bits</description><bitOffset>30</bitOffset><bitWidth>1</bitWidth></field><field><name>FB31</name><description>Filter bits</description><bitOffset>31</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>F18R1</name><displayName>F18R1</displayName><description>Filter bank 18 register 1</description><addressOffset>0x2D0</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>FB0</name><description>Filter bits</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field><field><name>FB1</name><description>Filter bits</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>FB2</name><description>Filter bits</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>FB3</name><description>Filter bits</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>FB4</name><description>Filter bits</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>FB5</name><description>Filter bits</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>FB6</name><description>Filter bits</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>FB7</name><description>Filter bits</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>FB8</name><description>Filter bits</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>FB9</name><description>Filter bits</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>FB10</name><description>Filter bits</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>FB11</name><description>Filter bits</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>FB12</name><description>Filter bits</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>FB13</name><description>Filter bits</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>FB14</name><description>Filter bits</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>FB15</name><description>Filter bits</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>FB16</name><description>Filter bits</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth></field><field><name>FB17</name><description>Filter bits</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth></field><field><name>FB18</name><description>Filter bits</description><bitOffset>18</bitOffset><bitWidth>1</bitWidth></field><field><name>FB19</name><description>Filter bits</description><bitOffset>19</bitOffset><bitWidth>1</bitWidth></field><field><name>FB20</name><description>Filter bits</description><bitOffset>20</bitOffset><bitWidth>1</bitWidth></field><field><name>FB21</name><description>Filter bits</description><bitOffset>21</bitOffset><bitWidth>1</bitWidth></field><field><name>FB22</name><description>Filter bits</description><bitOffset>22</bitOffset><bitWidth>1</bitWidth></field><field><name>FB23</name><description>Filter bits</description><bitOffset>23</bitOffset><bitWidth>1</bitWidth></field><field><name>FB24</name><description>Filter bits</description><bitOffset>24</bitOffset><bitWidth>1</bitWidth></field><field><name>FB25</name><description>Filter bits</description><bitOffset>25</bitOffset><bitWidth>1</bitWidth></field><field><name>FB26</name><description>Filter bits</description><bitOffset>26</bitOffset><bitWidth>1</bitWidth></field><field><name>FB27</name><description>Filter bits</description><bitOffset>27</bitOffset><bitWidth>1</bitWidth></field><field><name>FB28</name><description>Filter bits</description><bitOffset>28</bitOffset><bitWidth>1</bitWidth></field><field><name>FB29</name><description>Filter bits</description><bitOffset>29</bitOffset><bitWidth>1</bitWidth></field><field><name>FB30</name><description>Filter bits</description><bitOffset>30</bitOffset><bitWidth>1</bitWidth></field><field><name>FB31</name><description>Filter bits</description><bitOffset>31</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>F18R2</name><displayName>F18R2</displayName><description>Filter bank 18 register 2</description><addressOffset>0x2D4</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>FB0</name><description>Filter bits</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field><field><name>FB1</name><description>Filter bits</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>FB2</name><description>Filter bits</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>FB3</name><description>Filter bits</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>FB4</name><description>Filter bits</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>FB5</name><description>Filter bits</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>FB6</name><description>Filter bits</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>FB7</name><description>Filter bits</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>FB8</name><description>Filter bits</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>FB9</name><description>Filter bits</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>FB10</name><description>Filter bits</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>FB11</name><description>Filter bits</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>FB12</name><description>Filter bits</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>FB13</name><description>Filter bits</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>FB14</name><description>Filter bits</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>FB15</name><description>Filter bits</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>FB16</name><description>Filter bits</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth></field><field><name>FB17</name><description>Filter bits</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth></field><field><name>FB18</name><description>Filter bits</description><bitOffset>18</bitOffset><bitWidth>1</bitWidth></field><field><name>FB19</name><description>Filter bits</description><bitOffset>19</bitOffset><bitWidth>1</bitWidth></field><field><name>FB20</name><description>Filter bits</description><bitOffset>20</bitOffset><bitWidth>1</bitWidth></field><field><name>FB21</name><description>Filter bits</description><bitOffset>21</bitOffset><bitWidth>1</bitWidth></field><field><name>FB22</name><description>Filter bits</description><bitOffset>22</bitOffset><bitWidth>1</bitWidth></field><field><name>FB23</name><description>Filter bits</description><bitOffset>23</bitOffset><bitWidth>1</bitWidth></field><field><name>FB24</name><description>Filter bits</description><bitOffset>24</bitOffset><bitWidth>1</bitWidth></field><field><name>FB25</name><description>Filter bits</description><bitOffset>25</bitOffset><bitWidth>1</bitWidth></field><field><name>FB26</name><description>Filter bits</description><bitOffset>26</bitOffset><bitWidth>1</bitWidth></field><field><name>FB27</name><description>Filter bits</description><bitOffset>27</bitOffset><bitWidth>1</bitWidth></field><field><name>FB28</name><description>Filter bits</description><bitOffset>28</bitOffset><bitWidth>1</bitWidth></field><field><name>FB29</name><description>Filter bits</description><bitOffset>29</bitOffset><bitWidth>1</bitWidth></field><field><name>FB30</name><description>Filter bits</description><bitOffset>30</bitOffset><bitWidth>1</bitWidth></field><field><name>FB31</name><description>Filter bits</description><bitOffset>31</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>F19R1</name><displayName>F19R1</displayName><description>Filter bank 19 register 1</description><addressOffset>0x2D8</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>FB0</name><description>Filter bits</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field><field><name>FB1</name><description>Filter bits</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>FB2</name><description>Filter bits</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>FB3</name><description>Filter bits</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>FB4</name><description>Filter bits</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>FB5</name><description>Filter bits</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>FB6</name><description>Filter bits</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>FB7</name><description>Filter bits</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>FB8</name><description>Filter bits</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>FB9</name><description>Filter bits</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>FB10</name><description>Filter bits</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>FB11</name><description>Filter bits</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>FB12</name><description>Filter bits</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>FB13</name><description>Filter bits</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>FB14</name><description>Filter bits</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>FB15</name><description>Filter bits</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>FB16</name><description>Filter bits</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth></field><field><name>FB17</name><description>Filter bits</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth></field><field><name>FB18</name><description>Filter bits</description><bitOffset>18</bitOffset><bitWidth>1</bitWidth></field><field><name>FB19</name><description>Filter bits</description><bitOffset>19</bitOffset><bitWidth>1</bitWidth></field><field><name>FB20</name><description>Filter bits</description><bitOffset>20</bitOffset><bitWidth>1</bitWidth></field><field><name>FB21</name><description>Filter bits</description><bitOffset>21</bitOffset><bitWidth>1</bitWidth></field><field><name>FB22</name><description>Filter bits</description><bitOffset>22</bitOffset><bitWidth>1</bitWidth></field><field><name>FB23</name><description>Filter bits</description><bitOffset>23</bitOffset><bitWidth>1</bitWidth></field><field><name>FB24</name><description>Filter bits</description><bitOffset>24</bitOffset><bitWidth>1</bitWidth></field><field><name>FB25</name><description>Filter bits</description><bitOffset>25</bitOffset><bitWidth>1</bitWidth></field><field><name>FB26</name><description>Filter bits</description><bitOffset>26</bitOffset><bitWidth>1</bitWidth></field><field><name>FB27</name><description>Filter bits</description><bitOffset>27</bitOffset><bitWidth>1</bitWidth></field><field><name>FB28</name><description>Filter bits</description><bitOffset>28</bitOffset><bitWidth>1</bitWidth></field><field><name>FB29</name><description>Filter bits</description><bitOffset>29</bitOffset><bitWidth>1</bitWidth></field><field><name>FB30</name><description>Filter bits</description><bitOffset>30</bitOffset><bitWidth>1</bitWidth></field><field><name>FB31</name><description>Filter bits</description><bitOffset>31</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>F19R2</name><displayName>F19R2</displayName><description>Filter bank 19 register 2</description><addressOffset>0x2DC</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>FB0</name><description>Filter bits</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field><field><name>FB1</name><description>Filter bits</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>FB2</name><description>Filter bits</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>FB3</name><description>Filter bits</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>FB4</name><description>Filter bits</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>FB5</name><description>Filter bits</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>FB6</name><description>Filter bits</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>FB7</name><description>Filter bits</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>FB8</name><description>Filter bits</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>FB9</name><description>Filter bits</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>FB10</name><description>Filter bits</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>FB11</name><description>Filter bits</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>FB12</name><description>Filter bits</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>FB13</name><description>Filter bits</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>FB14</name><description>Filter bits</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>FB15</name><description>Filter bits</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>FB16</name><description>Filter bits</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth></field><field><name>FB17</name><description>Filter bits</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth></field><field><name>FB18</name><description>Filter bits</description><bitOffset>18</bitOffset><bitWidth>1</bitWidth></field><field><name>FB19</name><description>Filter bits</description><bitOffset>19</bitOffset><bitWidth>1</bitWidth></field><field><name>FB20</name><description>Filter bits</description><bitOffset>20</bitOffset><bitWidth>1</bitWidth></field><field><name>FB21</name><description>Filter bits</description><bitOffset>21</bitOffset><bitWidth>1</bitWidth></field><field><name>FB22</name><description>Filter bits</description><bitOffset>22</bitOffset><bitWidth>1</bitWidth></field><field><name>FB23</name><description>Filter bits</description><bitOffset>23</bitOffset><bitWidth>1</bitWidth></field><field><name>FB24</name><description>Filter bits</description><bitOffset>24</bitOffset><bitWidth>1</bitWidth></field><field><name>FB25</name><description>Filter bits</description><bitOffset>25</bitOffset><bitWidth>1</bitWidth></field><field><name>FB26</name><description>Filter bits</description><bitOffset>26</bitOffset><bitWidth>1</bitWidth></field><field><name>FB27</name><description>Filter bits</description><bitOffset>27</bitOffset><bitWidth>1</bitWidth></field><field><name>FB28</name><description>Filter bits</description><bitOffset>28</bitOffset><bitWidth>1</bitWidth></field><field><name>FB29</name><description>Filter bits</description><bitOffset>29</bitOffset><bitWidth>1</bitWidth></field><field><name>FB30</name><description>Filter bits</description><bitOffset>30</bitOffset><bitWidth>1</bitWidth></field><field><name>FB31</name><description>Filter bits</description><bitOffset>31</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>F20R1</name><displayName>F20R1</displayName><description>Filter bank 20 register 1</description><addressOffset>0x2E0</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>FB0</name><description>Filter bits</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field><field><name>FB1</name><description>Filter bits</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>FB2</name><description>Filter bits</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>FB3</name><description>Filter bits</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>FB4</name><description>Filter bits</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>FB5</name><description>Filter bits</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>FB6</name><description>Filter bits</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>FB7</name><description>Filter bits</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>FB8</name><description>Filter bits</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>FB9</name><description>Filter bits</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>FB10</name><description>Filter bits</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>FB11</name><description>Filter bits</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>FB12</name><description>Filter bits</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>FB13</name><description>Filter bits</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>FB14</name><description>Filter bits</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>FB15</name><description>Filter bits</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>FB16</name><description>Filter bits</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth></field><field><name>FB17</name><description>Filter bits</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth></field><field><name>FB18</name><description>Filter bits</description><bitOffset>18</bitOffset><bitWidth>1</bitWidth></field><field><name>FB19</name><description>Filter bits</description><bitOffset>19</bitOffset><bitWidth>1</bitWidth></field><field><name>FB20</name><description>Filter bits</description><bitOffset>20</bitOffset><bitWidth>1</bitWidth></field><field><name>FB21</name><description>Filter bits</description><bitOffset>21</bitOffset><bitWidth>1</bitWidth></field><field><name>FB22</name><description>Filter bits</description><bitOffset>22</bitOffset><bitWidth>1</bitWidth></field><field><name>FB23</name><description>Filter bits</description><bitOffset>23</bitOffset><bitWidth>1</bitWidth></field><field><name>FB24</name><description>Filter bits</description><bitOffset>24</bitOffset><bitWidth>1</bitWidth></field><field><name>FB25</name><description>Filter bits</description><bitOffset>25</bitOffset><bitWidth>1</bitWidth></field><field><name>FB26</name><description>Filter bits</description><bitOffset>26</bitOffset><bitWidth>1</bitWidth></field><field><name>FB27</name><description>Filter bits</description><bitOffset>27</bitOffset><bitWidth>1</bitWidth></field><field><name>FB28</name><description>Filter bits</description><bitOffset>28</bitOffset><bitWidth>1</bitWidth></field><field><name>FB29</name><description>Filter bits</description><bitOffset>29</bitOffset><bitWidth>1</bitWidth></field><field><name>FB30</name><description>Filter bits</description><bitOffset>30</bitOffset><bitWidth>1</bitWidth></field><field><name>FB31</name><description>Filter bits</description><bitOffset>31</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>F20R2</name><displayName>F20R2</displayName><description>Filter bank 20 register 2</description><addressOffset>0x2E4</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>FB0</name><description>Filter bits</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field><field><name>FB1</name><description>Filter bits</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>FB2</name><description>Filter bits</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>FB3</name><description>Filter bits</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>FB4</name><description>Filter bits</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>FB5</name><description>Filter bits</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>FB6</name><description>Filter bits</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>FB7</name><description>Filter bits</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>FB8</name><description>Filter bits</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>FB9</name><description>Filter bits</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>FB10</name><description>Filter bits</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>FB11</name><description>Filter bits</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>FB12</name><description>Filter bits</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>FB13</name><description>Filter bits</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>FB14</name><description>Filter bits</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>FB15</name><description>Filter bits</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>FB16</name><description>Filter bits</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth></field><field><name>FB17</name><description>Filter bits</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth></field><field><name>FB18</name><description>Filter bits</description><bitOffset>18</bitOffset><bitWidth>1</bitWidth></field><field><name>FB19</name><description>Filter bits</description><bitOffset>19</bitOffset><bitWidth>1</bitWidth></field><field><name>FB20</name><description>Filter bits</description><bitOffset>20</bitOffset><bitWidth>1</bitWidth></field><field><name>FB21</name><description>Filter bits</description><bitOffset>21</bitOffset><bitWidth>1</bitWidth></field><field><name>FB22</name><description>Filter bits</description><bitOffset>22</bitOffset><bitWidth>1</bitWidth></field><field><name>FB23</name><description>Filter bits</description><bitOffset>23</bitOffset><bitWidth>1</bitWidth></field><field><name>FB24</name><description>Filter bits</description><bitOffset>24</bitOffset><bitWidth>1</bitWidth></field><field><name>FB25</name><description>Filter bits</description><bitOffset>25</bitOffset><bitWidth>1</bitWidth></field><field><name>FB26</name><description>Filter bits</description><bitOffset>26</bitOffset><bitWidth>1</bitWidth></field><field><name>FB27</name><description>Filter bits</description><bitOffset>27</bitOffset><bitWidth>1</bitWidth></field><field><name>FB28</name><description>Filter bits</description><bitOffset>28</bitOffset><bitWidth>1</bitWidth></field><field><name>FB29</name><description>Filter bits</description><bitOffset>29</bitOffset><bitWidth>1</bitWidth></field><field><name>FB30</name><description>Filter bits</description><bitOffset>30</bitOffset><bitWidth>1</bitWidth></field><field><name>FB31</name><description>Filter bits</description><bitOffset>31</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>F21R1</name><displayName>F21R1</displayName><description>Filter bank 21 register 1</description><addressOffset>0x2E8</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>FB0</name><description>Filter bits</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field><field><name>FB1</name><description>Filter bits</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>FB2</name><description>Filter bits</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>FB3</name><description>Filter bits</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>FB4</name><description>Filter bits</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>FB5</name><description>Filter bits</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>FB6</name><description>Filter bits</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>FB7</name><description>Filter bits</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>FB8</name><description>Filter bits</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>FB9</name><description>Filter bits</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>FB10</name><description>Filter bits</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>FB11</name><description>Filter bits</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>FB12</name><description>Filter bits</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>FB13</name><description>Filter bits</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>FB14</name><description>Filter bits</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>FB15</name><description>Filter bits</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>FB16</name><description>Filter bits</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth></field><field><name>FB17</name><description>Filter bits</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth></field><field><name>FB18</name><description>Filter bits</description><bitOffset>18</bitOffset><bitWidth>1</bitWidth></field><field><name>FB19</name><description>Filter bits</description><bitOffset>19</bitOffset><bitWidth>1</bitWidth></field><field><name>FB20</name><description>Filter bits</description><bitOffset>20</bitOffset><bitWidth>1</bitWidth></field><field><name>FB21</name><description>Filter bits</description><bitOffset>21</bitOffset><bitWidth>1</bitWidth></field><field><name>FB22</name><description>Filter bits</description><bitOffset>22</bitOffset><bitWidth>1</bitWidth></field><field><name>FB23</name><description>Filter bits</description><bitOffset>23</bitOffset><bitWidth>1</bitWidth></field><field><name>FB24</name><description>Filter bits</description><bitOffset>24</bitOffset><bitWidth>1</bitWidth></field><field><name>FB25</name><description>Filter bits</description><bitOffset>25</bitOffset><bitWidth>1</bitWidth></field><field><name>FB26</name><description>Filter bits</description><bitOffset>26</bitOffset><bitWidth>1</bitWidth></field><field><name>FB27</name><description>Filter bits</description><bitOffset>27</bitOffset><bitWidth>1</bitWidth></field><field><name>FB28</name><description>Filter bits</description><bitOffset>28</bitOffset><bitWidth>1</bitWidth></field><field><name>FB29</name><description>Filter bits</description><bitOffset>29</bitOffset><bitWidth>1</bitWidth></field><field><name>FB30</name><description>Filter bits</description><bitOffset>30</bitOffset><bitWidth>1</bitWidth></field><field><name>FB31</name><description>Filter bits</description><bitOffset>31</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>F21R2</name><displayName>F21R2</displayName><description>Filter bank 21 register 2</description><addressOffset>0x2EC</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>FB0</name><description>Filter bits</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field><field><name>FB1</name><description>Filter bits</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>FB2</name><description>Filter bits</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>FB3</name><description>Filter bits</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>FB4</name><description>Filter bits</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>FB5</name><description>Filter bits</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>FB6</name><description>Filter bits</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>FB7</name><description>Filter bits</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>FB8</name><description>Filter bits</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>FB9</name><description>Filter bits</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>FB10</name><description>Filter bits</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>FB11</name><description>Filter bits</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>FB12</name><description>Filter bits</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>FB13</name><description>Filter bits</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>FB14</name><description>Filter bits</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>FB15</name><description>Filter bits</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>FB16</name><description>Filter bits</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth></field><field><name>FB17</name><description>Filter bits</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth></field><field><name>FB18</name><description>Filter bits</description><bitOffset>18</bitOffset><bitWidth>1</bitWidth></field><field><name>FB19</name><description>Filter bits</description><bitOffset>19</bitOffset><bitWidth>1</bitWidth></field><field><name>FB20</name><description>Filter bits</description><bitOffset>20</bitOffset><bitWidth>1</bitWidth></field><field><name>FB21</name><description>Filter bits</description><bitOffset>21</bitOffset><bitWidth>1</bitWidth></field><field><name>FB22</name><description>Filter bits</description><bitOffset>22</bitOffset><bitWidth>1</bitWidth></field><field><name>FB23</name><description>Filter bits</description><bitOffset>23</bitOffset><bitWidth>1</bitWidth></field><field><name>FB24</name><description>Filter bits</description><bitOffset>24</bitOffset><bitWidth>1</bitWidth></field><field><name>FB25</name><description>Filter bits</description><bitOffset>25</bitOffset><bitWidth>1</bitWidth></field><field><name>FB26</name><description>Filter bits</description><bitOffset>26</bitOffset><bitWidth>1</bitWidth></field><field><name>FB27</name><description>Filter bits</description><bitOffset>27</bitOffset><bitWidth>1</bitWidth></field><field><name>FB28</name><description>Filter bits</description><bitOffset>28</bitOffset><bitWidth>1</bitWidth></field><field><name>FB29</name><description>Filter bits</description><bitOffset>29</bitOffset><bitWidth>1</bitWidth></field><field><name>FB30</name><description>Filter bits</description><bitOffset>30</bitOffset><bitWidth>1</bitWidth></field><field><name>FB31</name><description>Filter bits</description><bitOffset>31</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>F22R1</name><displayName>F22R1</displayName><description>Filter bank 22 register 1</description><addressOffset>0x2F0</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>FB0</name><description>Filter bits</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field><field><name>FB1</name><description>Filter bits</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>FB2</name><description>Filter bits</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>FB3</name><description>Filter bits</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>FB4</name><description>Filter bits</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>FB5</name><description>Filter bits</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>FB6</name><description>Filter bits</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>FB7</name><description>Filter bits</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>FB8</name><description>Filter bits</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>FB9</name><description>Filter bits</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>FB10</name><description>Filter bits</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>FB11</name><description>Filter bits</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>FB12</name><description>Filter bits</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>FB13</name><description>Filter bits</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>FB14</name><description>Filter bits</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>FB15</name><description>Filter bits</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>FB16</name><description>Filter bits</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth></field><field><name>FB17</name><description>Filter bits</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth></field><field><name>FB18</name><description>Filter bits</description><bitOffset>18</bitOffset><bitWidth>1</bitWidth></field><field><name>FB19</name><description>Filter bits</description><bitOffset>19</bitOffset><bitWidth>1</bitWidth></field><field><name>FB20</name><description>Filter bits</description><bitOffset>20</bitOffset><bitWidth>1</bitWidth></field><field><name>FB21</name><description>Filter bits</description><bitOffset>21</bitOffset><bitWidth>1</bitWidth></field><field><name>FB22</name><description>Filter bits</description><bitOffset>22</bitOffset><bitWidth>1</bitWidth></field><field><name>FB23</name><description>Filter bits</description><bitOffset>23</bitOffset><bitWidth>1</bitWidth></field><field><name>FB24</name><description>Filter bits</description><bitOffset>24</bitOffset><bitWidth>1</bitWidth></field><field><name>FB25</name><description>Filter bits</description><bitOffset>25</bitOffset><bitWidth>1</bitWidth></field><field><name>FB26</name><description>Filter bits</description><bitOffset>26</bitOffset><bitWidth>1</bitWidth></field><field><name>FB27</name><description>Filter bits</description><bitOffset>27</bitOffset><bitWidth>1</bitWidth></field><field><name>FB28</name><description>Filter bits</description><bitOffset>28</bitOffset><bitWidth>1</bitWidth></field><field><name>FB29</name><description>Filter bits</description><bitOffset>29</bitOffset><bitWidth>1</bitWidth></field><field><name>FB30</name><description>Filter bits</description><bitOffset>30</bitOffset><bitWidth>1</bitWidth></field><field><name>FB31</name><description>Filter bits</description><bitOffset>31</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>F22R2</name><displayName>F22R2</displayName><description>Filter bank 22 register 2</description><addressOffset>0x2F4</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>FB0</name><description>Filter bits</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field><field><name>FB1</name><description>Filter bits</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>FB2</name><description>Filter bits</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>FB3</name><description>Filter bits</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>FB4</name><description>Filter bits</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>FB5</name><description>Filter bits</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>FB6</name><description>Filter bits</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>FB7</name><description>Filter bits</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>FB8</name><description>Filter bits</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>FB9</name><description>Filter bits</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>FB10</name><description>Filter bits</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>FB11</name><description>Filter bits</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>FB12</name><description>Filter bits</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>FB13</name><description>Filter bits</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>FB14</name><description>Filter bits</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>FB15</name><description>Filter bits</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>FB16</name><description>Filter bits</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth></field><field><name>FB17</name><description>Filter bits</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth></field><field><name>FB18</name><description>Filter bits</description><bitOffset>18</bitOffset><bitWidth>1</bitWidth></field><field><name>FB19</name><description>Filter bits</description><bitOffset>19</bitOffset><bitWidth>1</bitWidth></field><field><name>FB20</name><description>Filter bits</description><bitOffset>20</bitOffset><bitWidth>1</bitWidth></field><field><name>FB21</name><description>Filter bits</description><bitOffset>21</bitOffset><bitWidth>1</bitWidth></field><field><name>FB22</name><description>Filter bits</description><bitOffset>22</bitOffset><bitWidth>1</bitWidth></field><field><name>FB23</name><description>Filter bits</description><bitOffset>23</bitOffset><bitWidth>1</bitWidth></field><field><name>FB24</name><description>Filter bits</description><bitOffset>24</bitOffset><bitWidth>1</bitWidth></field><field><name>FB25</name><description>Filter bits</description><bitOffset>25</bitOffset><bitWidth>1</bitWidth></field><field><name>FB26</name><description>Filter bits</description><bitOffset>26</bitOffset><bitWidth>1</bitWidth></field><field><name>FB27</name><description>Filter bits</description><bitOffset>27</bitOffset><bitWidth>1</bitWidth></field><field><name>FB28</name><description>Filter bits</description><bitOffset>28</bitOffset><bitWidth>1</bitWidth></field><field><name>FB29</name><description>Filter bits</description><bitOffset>29</bitOffset><bitWidth>1</bitWidth></field><field><name>FB30</name><description>Filter bits</description><bitOffset>30</bitOffset><bitWidth>1</bitWidth></field><field><name>FB31</name><description>Filter bits</description><bitOffset>31</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>F23R1</name><displayName>F23R1</displayName><description>Filter bank 23 register 1</description><addressOffset>0x2F8</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>FB0</name><description>Filter bits</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field><field><name>FB1</name><description>Filter bits</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>FB2</name><description>Filter bits</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>FB3</name><description>Filter bits</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>FB4</name><description>Filter bits</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>FB5</name><description>Filter bits</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>FB6</name><description>Filter bits</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>FB7</name><description>Filter bits</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>FB8</name><description>Filter bits</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>FB9</name><description>Filter bits</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>FB10</name><description>Filter bits</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>FB11</name><description>Filter bits</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>FB12</name><description>Filter bits</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>FB13</name><description>Filter bits</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>FB14</name><description>Filter bits</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>FB15</name><description>Filter bits</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>FB16</name><description>Filter bits</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth></field><field><name>FB17</name><description>Filter bits</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth></field><field><name>FB18</name><description>Filter bits</description><bitOffset>18</bitOffset><bitWidth>1</bitWidth></field><field><name>FB19</name><description>Filter bits</description><bitOffset>19</bitOffset><bitWidth>1</bitWidth></field><field><name>FB20</name><description>Filter bits</description><bitOffset>20</bitOffset><bitWidth>1</bitWidth></field><field><name>FB21</name><description>Filter bits</description><bitOffset>21</bitOffset><bitWidth>1</bitWidth></field><field><name>FB22</name><description>Filter bits</description><bitOffset>22</bitOffset><bitWidth>1</bitWidth></field><field><name>FB23</name><description>Filter bits</description><bitOffset>23</bitOffset><bitWidth>1</bitWidth></field><field><name>FB24</name><description>Filter bits</description><bitOffset>24</bitOffset><bitWidth>1</bitWidth></field><field><name>FB25</name><description>Filter bits</description><bitOffset>25</bitOffset><bitWidth>1</bitWidth></field><field><name>FB26</name><description>Filter bits</description><bitOffset>26</bitOffset><bitWidth>1</bitWidth></field><field><name>FB27</name><description>Filter bits</description><bitOffset>27</bitOffset><bitWidth>1</bitWidth></field><field><name>FB28</name><description>Filter bits</description><bitOffset>28</bitOffset><bitWidth>1</bitWidth></field><field><name>FB29</name><description>Filter bits</description><bitOffset>29</bitOffset><bitWidth>1</bitWidth></field><field><name>FB30</name><description>Filter bits</description><bitOffset>30</bitOffset><bitWidth>1</bitWidth></field><field><name>FB31</name><description>Filter bits</description><bitOffset>31</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>F23R2</name><displayName>F23R2</displayName><description>Filter bank 23 register 2</description><addressOffset>0x2FC</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>FB0</name><description>Filter bits</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field><field><name>FB1</name><description>Filter bits</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>FB2</name><description>Filter bits</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>FB3</name><description>Filter bits</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>FB4</name><description>Filter bits</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>FB5</name><description>Filter bits</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>FB6</name><description>Filter bits</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>FB7</name><description>Filter bits</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>FB8</name><description>Filter bits</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>FB9</name><description>Filter bits</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>FB10</name><description>Filter bits</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>FB11</name><description>Filter bits</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>FB12</name><description>Filter bits</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>FB13</name><description>Filter bits</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>FB14</name><description>Filter bits</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>FB15</name><description>Filter bits</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>FB16</name><description>Filter bits</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth></field><field><name>FB17</name><description>Filter bits</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth></field><field><name>FB18</name><description>Filter bits</description><bitOffset>18</bitOffset><bitWidth>1</bitWidth></field><field><name>FB19</name><description>Filter bits</description><bitOffset>19</bitOffset><bitWidth>1</bitWidth></field><field><name>FB20</name><description>Filter bits</description><bitOffset>20</bitOffset><bitWidth>1</bitWidth></field><field><name>FB21</name><description>Filter bits</description><bitOffset>21</bitOffset><bitWidth>1</bitWidth></field><field><name>FB22</name><description>Filter bits</description><bitOffset>22</bitOffset><bitWidth>1</bitWidth></field><field><name>FB23</name><description>Filter bits</description><bitOffset>23</bitOffset><bitWidth>1</bitWidth></field><field><name>FB24</name><description>Filter bits</description><bitOffset>24</bitOffset><bitWidth>1</bitWidth></field><field><name>FB25</name><description>Filter bits</description><bitOffset>25</bitOffset><bitWidth>1</bitWidth></field><field><name>FB26</name><description>Filter bits</description><bitOffset>26</bitOffset><bitWidth>1</bitWidth></field><field><name>FB27</name><description>Filter bits</description><bitOffset>27</bitOffset><bitWidth>1</bitWidth></field><field><name>FB28</name><description>Filter bits</description><bitOffset>28</bitOffset><bitWidth>1</bitWidth></field><field><name>FB29</name><description>Filter bits</description><bitOffset>29</bitOffset><bitWidth>1</bitWidth></field><field><name>FB30</name><description>Filter bits</description><bitOffset>30</bitOffset><bitWidth>1</bitWidth></field><field><name>FB31</name><description>Filter bits</description><bitOffset>31</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>F24R1</name><displayName>F24R1</displayName><description>Filter bank 24 register 1</description><addressOffset>0x300</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>FB0</name><description>Filter bits</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field><field><name>FB1</name><description>Filter bits</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>FB2</name><description>Filter bits</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>FB3</name><description>Filter bits</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>FB4</name><description>Filter bits</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>FB5</name><description>Filter bits</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>FB6</name><description>Filter bits</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>FB7</name><description>Filter bits</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>FB8</name><description>Filter bits</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>FB9</name><description>Filter bits</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>FB10</name><description>Filter bits</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>FB11</name><description>Filter bits</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>FB12</name><description>Filter bits</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>FB13</name><description>Filter bits</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>FB14</name><description>Filter bits</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>FB15</name><description>Filter bits</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>FB16</name><description>Filter bits</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth></field><field><name>FB17</name><description>Filter bits</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth></field><field><name>FB18</name><description>Filter bits</description><bitOffset>18</bitOffset><bitWidth>1</bitWidth></field><field><name>FB19</name><description>Filter bits</description><bitOffset>19</bitOffset><bitWidth>1</bitWidth></field><field><name>FB20</name><description>Filter bits</description><bitOffset>20</bitOffset><bitWidth>1</bitWidth></field><field><name>FB21</name><description>Filter bits</description><bitOffset>21</bitOffset><bitWidth>1</bitWidth></field><field><name>FB22</name><description>Filter bits</description><bitOffset>22</bitOffset><bitWidth>1</bitWidth></field><field><name>FB23</name><description>Filter bits</description><bitOffset>23</bitOffset><bitWidth>1</bitWidth></field><field><name>FB24</name><description>Filter bits</description><bitOffset>24</bitOffset><bitWidth>1</bitWidth></field><field><name>FB25</name><description>Filter bits</description><bitOffset>25</bitOffset><bitWidth>1</bitWidth></field><field><name>FB26</name><description>Filter bits</description><bitOffset>26</bitOffset><bitWidth>1</bitWidth></field><field><name>FB27</name><description>Filter bits</description><bitOffset>27</bitOffset><bitWidth>1</bitWidth></field><field><name>FB28</name><description>Filter bits</description><bitOffset>28</bitOffset><bitWidth>1</bitWidth></field><field><name>FB29</name><description>Filter bits</description><bitOffset>29</bitOffset><bitWidth>1</bitWidth></field><field><name>FB30</name><description>Filter bits</description><bitOffset>30</bitOffset><bitWidth>1</bitWidth></field><field><name>FB31</name><description>Filter bits</description><bitOffset>31</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>F24R2</name><displayName>F24R2</displayName><description>Filter bank 24 register 2</description><addressOffset>0x304</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>FB0</name><description>Filter bits</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field><field><name>FB1</name><description>Filter bits</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>FB2</name><description>Filter bits</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>FB3</name><description>Filter bits</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>FB4</name><description>Filter bits</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>FB5</name><description>Filter bits</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>FB6</name><description>Filter bits</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>FB7</name><description>Filter bits</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>FB8</name><description>Filter bits</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>FB9</name><description>Filter bits</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>FB10</name><description>Filter bits</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>FB11</name><description>Filter bits</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>FB12</name><description>Filter bits</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>FB13</name><description>Filter bits</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>FB14</name><description>Filter bits</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>FB15</name><description>Filter bits</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>FB16</name><description>Filter bits</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth></field><field><name>FB17</name><description>Filter bits</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth></field><field><name>FB18</name><description>Filter bits</description><bitOffset>18</bitOffset><bitWidth>1</bitWidth></field><field><name>FB19</name><description>Filter bits</description><bitOffset>19</bitOffset><bitWidth>1</bitWidth></field><field><name>FB20</name><description>Filter bits</description><bitOffset>20</bitOffset><bitWidth>1</bitWidth></field><field><name>FB21</name><description>Filter bits</description><bitOffset>21</bitOffset><bitWidth>1</bitWidth></field><field><name>FB22</name><description>Filter bits</description><bitOffset>22</bitOffset><bitWidth>1</bitWidth></field><field><name>FB23</name><description>Filter bits</description><bitOffset>23</bitOffset><bitWidth>1</bitWidth></field><field><name>FB24</name><description>Filter bits</description><bitOffset>24</bitOffset><bitWidth>1</bitWidth></field><field><name>FB25</name><description>Filter bits</description><bitOffset>25</bitOffset><bitWidth>1</bitWidth></field><field><name>FB26</name><description>Filter bits</description><bitOffset>26</bitOffset><bitWidth>1</bitWidth></field><field><name>FB27</name><description>Filter bits</description><bitOffset>27</bitOffset><bitWidth>1</bitWidth></field><field><name>FB28</name><description>Filter bits</description><bitOffset>28</bitOffset><bitWidth>1</bitWidth></field><field><name>FB29</name><description>Filter bits</description><bitOffset>29</bitOffset><bitWidth>1</bitWidth></field><field><name>FB30</name><description>Filter bits</description><bitOffset>30</bitOffset><bitWidth>1</bitWidth></field><field><name>FB31</name><description>Filter bits</description><bitOffset>31</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>F25R1</name><displayName>F25R1</displayName><description>Filter bank 25 register 1</description><addressOffset>0x308</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>FB0</name><description>Filter bits</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field><field><name>FB1</name><description>Filter bits</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>FB2</name><description>Filter bits</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>FB3</name><description>Filter bits</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>FB4</name><description>Filter bits</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>FB5</name><description>Filter bits</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>FB6</name><description>Filter bits</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>FB7</name><description>Filter bits</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>FB8</name><description>Filter bits</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>FB9</name><description>Filter bits</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>FB10</name><description>Filter bits</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>FB11</name><description>Filter bits</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>FB12</name><description>Filter bits</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>FB13</name><description>Filter bits</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>FB14</name><description>Filter bits</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>FB15</name><description>Filter bits</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>FB16</name><description>Filter bits</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth></field><field><name>FB17</name><description>Filter bits</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth></field><field><name>FB18</name><description>Filter bits</description><bitOffset>18</bitOffset><bitWidth>1</bitWidth></field><field><name>FB19</name><description>Filter bits</description><bitOffset>19</bitOffset><bitWidth>1</bitWidth></field><field><name>FB20</name><description>Filter bits</description><bitOffset>20</bitOffset><bitWidth>1</bitWidth></field><field><name>FB21</name><description>Filter bits</description><bitOffset>21</bitOffset><bitWidth>1</bitWidth></field><field><name>FB22</name><description>Filter bits</description><bitOffset>22</bitOffset><bitWidth>1</bitWidth></field><field><name>FB23</name><description>Filter bits</description><bitOffset>23</bitOffset><bitWidth>1</bitWidth></field><field><name>FB24</name><description>Filter bits</description><bitOffset>24</bitOffset><bitWidth>1</bitWidth></field><field><name>FB25</name><description>Filter bits</description><bitOffset>25</bitOffset><bitWidth>1</bitWidth></field><field><name>FB26</name><description>Filter bits</description><bitOffset>26</bitOffset><bitWidth>1</bitWidth></field><field><name>FB27</name><description>Filter bits</description><bitOffset>27</bitOffset><bitWidth>1</bitWidth></field><field><name>FB28</name><description>Filter bits</description><bitOffset>28</bitOffset><bitWidth>1</bitWidth></field><field><name>FB29</name><description>Filter bits</description><bitOffset>29</bitOffset><bitWidth>1</bitWidth></field><field><name>FB30</name><description>Filter bits</description><bitOffset>30</bitOffset><bitWidth>1</bitWidth></field><field><name>FB31</name><description>Filter bits</description><bitOffset>31</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>F25R2</name><displayName>F25R2</displayName><description>Filter bank 25 register 2</description><addressOffset>0x30C</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>FB0</name><description>Filter bits</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field><field><name>FB1</name><description>Filter bits</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>FB2</name><description>Filter bits</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>FB3</name><description>Filter bits</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>FB4</name><description>Filter bits</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>FB5</name><description>Filter bits</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>FB6</name><description>Filter bits</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>FB7</name><description>Filter bits</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>FB8</name><description>Filter bits</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>FB9</name><description>Filter bits</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>FB10</name><description>Filter bits</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>FB11</name><description>Filter bits</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>FB12</name><description>Filter bits</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>FB13</name><description>Filter bits</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>FB14</name><description>Filter bits</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>FB15</name><description>Filter bits</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>FB16</name><description>Filter bits</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth></field><field><name>FB17</name><description>Filter bits</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth></field><field><name>FB18</name><description>Filter bits</description><bitOffset>18</bitOffset><bitWidth>1</bitWidth></field><field><name>FB19</name><description>Filter bits</description><bitOffset>19</bitOffset><bitWidth>1</bitWidth></field><field><name>FB20</name><description>Filter bits</description><bitOffset>20</bitOffset><bitWidth>1</bitWidth></field><field><name>FB21</name><description>Filter bits</description><bitOffset>21</bitOffset><bitWidth>1</bitWidth></field><field><name>FB22</name><description>Filter bits</description><bitOffset>22</bitOffset><bitWidth>1</bitWidth></field><field><name>FB23</name><description>Filter bits</description><bitOffset>23</bitOffset><bitWidth>1</bitWidth></field><field><name>FB24</name><description>Filter bits</description><bitOffset>24</bitOffset><bitWidth>1</bitWidth></field><field><name>FB25</name><description>Filter bits</description><bitOffset>25</bitOffset><bitWidth>1</bitWidth></field><field><name>FB26</name><description>Filter bits</description><bitOffset>26</bitOffset><bitWidth>1</bitWidth></field><field><name>FB27</name><description>Filter bits</description><bitOffset>27</bitOffset><bitWidth>1</bitWidth></field><field><name>FB28</name><description>Filter bits</description><bitOffset>28</bitOffset><bitWidth>1</bitWidth></field><field><name>FB29</name><description>Filter bits</description><bitOffset>29</bitOffset><bitWidth>1</bitWidth></field><field><name>FB30</name><description>Filter bits</description><bitOffset>30</bitOffset><bitWidth>1</bitWidth></field><field><name>FB31</name><description>Filter bits</description><bitOffset>31</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>F26R1</name><displayName>F26R1</displayName><description>Filter bank 26 register 1</description><addressOffset>0x310</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>FB0</name><description>Filter bits</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field><field><name>FB1</name><description>Filter bits</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>FB2</name><description>Filter bits</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>FB3</name><description>Filter bits</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>FB4</name><description>Filter bits</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>FB5</name><description>Filter bits</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>FB6</name><description>Filter bits</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>FB7</name><description>Filter bits</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>FB8</name><description>Filter bits</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>FB9</name><description>Filter bits</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>FB10</name><description>Filter bits</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>FB11</name><description>Filter bits</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>FB12</name><description>Filter bits</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>FB13</name><description>Filter bits</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>FB14</name><description>Filter bits</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>FB15</name><description>Filter bits</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>FB16</name><description>Filter bits</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth></field><field><name>FB17</name><description>Filter bits</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth></field><field><name>FB18</name><description>Filter bits</description><bitOffset>18</bitOffset><bitWidth>1</bitWidth></field><field><name>FB19</name><description>Filter bits</description><bitOffset>19</bitOffset><bitWidth>1</bitWidth></field><field><name>FB20</name><description>Filter bits</description><bitOffset>20</bitOffset><bitWidth>1</bitWidth></field><field><name>FB21</name><description>Filter bits</description><bitOffset>21</bitOffset><bitWidth>1</bitWidth></field><field><name>FB22</name><description>Filter bits</description><bitOffset>22</bitOffset><bitWidth>1</bitWidth></field><field><name>FB23</name><description>Filter bits</description><bitOffset>23</bitOffset><bitWidth>1</bitWidth></field><field><name>FB24</name><description>Filter bits</description><bitOffset>24</bitOffset><bitWidth>1</bitWidth></field><field><name>FB25</name><description>Filter bits</description><bitOffset>25</bitOffset><bitWidth>1</bitWidth></field><field><name>FB26</name><description>Filter bits</description><bitOffset>26</bitOffset><bitWidth>1</bitWidth></field><field><name>FB27</name><description>Filter bits</description><bitOffset>27</bitOffset><bitWidth>1</bitWidth></field><field><name>FB28</name><description>Filter bits</description><bitOffset>28</bitOffset><bitWidth>1</bitWidth></field><field><name>FB29</name><description>Filter bits</description><bitOffset>29</bitOffset><bitWidth>1</bitWidth></field><field><name>FB30</name><description>Filter bits</description><bitOffset>30</bitOffset><bitWidth>1</bitWidth></field><field><name>FB31</name><description>Filter bits</description><bitOffset>31</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>F26R2</name><displayName>F26R2</displayName><description>Filter bank 26 register 2</description><addressOffset>0x314</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>FB0</name><description>Filter bits</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field><field><name>FB1</name><description>Filter bits</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>FB2</name><description>Filter bits</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>FB3</name><description>Filter bits</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>FB4</name><description>Filter bits</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>FB5</name><description>Filter bits</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>FB6</name><description>Filter bits</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>FB7</name><description>Filter bits</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>FB8</name><description>Filter bits</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>FB9</name><description>Filter bits</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>FB10</name><description>Filter bits</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>FB11</name><description>Filter bits</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>FB12</name><description>Filter bits</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>FB13</name><description>Filter bits</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>FB14</name><description>Filter bits</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>FB15</name><description>Filter bits</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>FB16</name><description>Filter bits</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth></field><field><name>FB17</name><description>Filter bits</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth></field><field><name>FB18</name><description>Filter bits</description><bitOffset>18</bitOffset><bitWidth>1</bitWidth></field><field><name>FB19</name><description>Filter bits</description><bitOffset>19</bitOffset><bitWidth>1</bitWidth></field><field><name>FB20</name><description>Filter bits</description><bitOffset>20</bitOffset><bitWidth>1</bitWidth></field><field><name>FB21</name><description>Filter bits</description><bitOffset>21</bitOffset><bitWidth>1</bitWidth></field><field><name>FB22</name><description>Filter bits</description><bitOffset>22</bitOffset><bitWidth>1</bitWidth></field><field><name>FB23</name><description>Filter bits</description><bitOffset>23</bitOffset><bitWidth>1</bitWidth></field><field><name>FB24</name><description>Filter bits</description><bitOffset>24</bitOffset><bitWidth>1</bitWidth></field><field><name>FB25</name><description>Filter bits</description><bitOffset>25</bitOffset><bitWidth>1</bitWidth></field><field><name>FB26</name><description>Filter bits</description><bitOffset>26</bitOffset><bitWidth>1</bitWidth></field><field><name>FB27</name><description>Filter bits</description><bitOffset>27</bitOffset><bitWidth>1</bitWidth></field><field><name>FB28</name><description>Filter bits</description><bitOffset>28</bitOffset><bitWidth>1</bitWidth></field><field><name>FB29</name><description>Filter bits</description><bitOffset>29</bitOffset><bitWidth>1</bitWidth></field><field><name>FB30</name><description>Filter bits</description><bitOffset>30</bitOffset><bitWidth>1</bitWidth></field><field><name>FB31</name><description>Filter bits</description><bitOffset>31</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>F27R1</name><displayName>F27R1</displayName><description>Filter bank 27 register 1</description><addressOffset>0x318</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>FB0</name><description>Filter bits</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field><field><name>FB1</name><description>Filter bits</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>FB2</name><description>Filter bits</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>FB3</name><description>Filter bits</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>FB4</name><description>Filter bits</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>FB5</name><description>Filter bits</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>FB6</name><description>Filter bits</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>FB7</name><description>Filter bits</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>FB8</name><description>Filter bits</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>FB9</name><description>Filter bits</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>FB10</name><description>Filter bits</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>FB11</name><description>Filter bits</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>FB12</name><description>Filter bits</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>FB13</name><description>Filter bits</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>FB14</name><description>Filter bits</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>FB15</name><description>Filter bits</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>FB16</name><description>Filter bits</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth></field><field><name>FB17</name><description>Filter bits</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth></field><field><name>FB18</name><description>Filter bits</description><bitOffset>18</bitOffset><bitWidth>1</bitWidth></field><field><name>FB19</name><description>Filter bits</description><bitOffset>19</bitOffset><bitWidth>1</bitWidth></field><field><name>FB20</name><description>Filter bits</description><bitOffset>20</bitOffset><bitWidth>1</bitWidth></field><field><name>FB21</name><description>Filter bits</description><bitOffset>21</bitOffset><bitWidth>1</bitWidth></field><field><name>FB22</name><description>Filter bits</description><bitOffset>22</bitOffset><bitWidth>1</bitWidth></field><field><name>FB23</name><description>Filter bits</description><bitOffset>23</bitOffset><bitWidth>1</bitWidth></field><field><name>FB24</name><description>Filter bits</description><bitOffset>24</bitOffset><bitWidth>1</bitWidth></field><field><name>FB25</name><description>Filter bits</description><bitOffset>25</bitOffset><bitWidth>1</bitWidth></field><field><name>FB26</name><description>Filter bits</description><bitOffset>26</bitOffset><bitWidth>1</bitWidth></field><field><name>FB27</name><description>Filter bits</description><bitOffset>27</bitOffset><bitWidth>1</bitWidth></field><field><name>FB28</name><description>Filter bits</description><bitOffset>28</bitOffset><bitWidth>1</bitWidth></field><field><name>FB29</name><description>Filter bits</description><bitOffset>29</bitOffset><bitWidth>1</bitWidth></field><field><name>FB30</name><description>Filter bits</description><bitOffset>30</bitOffset><bitWidth>1</bitWidth></field><field><name>FB31</name><description>Filter bits</description><bitOffset>31</bitOffset><bitWidth>1</bitWidth></field></fields></register><register><name>F27R2</name><displayName>F27R2</displayName><description>Filter bank 27 register 2</description><addressOffset>0x31C</addressOffset><size>0x20</size><access>read-write</access><resetValue>0x00000000</resetValue><fields><field><name>FB0</name><description>Filter bits</description><bitOffset>0</bitOffset><bitWidth>1</bitWidth></field><field><name>FB1</name><description>Filter bits</description><bitOffset>1</bitOffset><bitWidth>1</bitWidth></field><field><name>FB2</name><description>Filter bits</description><bitOffset>2</bitOffset><bitWidth>1</bitWidth></field><field><name>FB3</name><description>Filter bits</description><bitOffset>3</bitOffset><bitWidth>1</bitWidth></field><field><name>FB4</name><description>Filter bits</description><bitOffset>4</bitOffset><bitWidth>1</bitWidth></field><field><name>FB5</name><description>Filter bits</description><bitOffset>5</bitOffset><bitWidth>1</bitWidth></field><field><name>FB6</name><description>Filter bits</description><bitOffset>6</bitOffset><bitWidth>1</bitWidth></field><field><name>FB7</name><description>Filter bits</description><bitOffset>7</bitOffset><bitWidth>1</bitWidth></field><field><name>FB8</name><description>Filter bits</description><bitOffset>8</bitOffset><bitWidth>1</bitWidth></field><field><name>FB9</name><description>Filter bits</description><bitOffset>9</bitOffset><bitWidth>1</bitWidth></field><field><name>FB10</name><description>Filter bits</description><bitOffset>10</bitOffset><bitWidth>1</bitWidth></field><field><name>FB11</name><description>Filter bits</description><bitOffset>11</bitOffset><bitWidth>1</bitWidth></field><field><name>FB12</name><description>Filter bits</description><bitOffset>12</bitOffset><bitWidth>1</bitWidth></field><field><name>FB13</name><description>Filter bits</description><bitOffset>13</bitOffset><bitWidth>1</bitWidth></field><field><name>FB14</name><description>Filter bits</description><bitOffset>14</bitOffset><bitWidth>1</bitWidth></field><field><name>FB15</name><description>Filter bits</description><bitOffset>15</bitOffset><bitWidth>1</bitWidth></field><field><name>FB16</name><description>Filter bits</description><bitOffset>16</bitOffset><bitWidth>1</bitWidth></field><field><name>FB17</name><description>Filter bits</description><bitOffset>17</bitOffset><bitWidth>1</bitWidth></field><field><name>FB18</name><description>Filter bits</description><bitOffset>18</bitOffset><bitWidth>1</bitWidth></field><field><name>FB19</name><description>Filter bits</description><bitOffset>19</bitOffset><bitWidth>1</bitWidth></field><field><name>FB20</name><description>Filter bits</description><bitOffset>20</bitOffset><bitWidth>1</bitWidth></field><field><name>FB21</name><description>Filter bits</description><bitOffset>21</bitOffset><bitWidth>1</bitWidth></field><field><name>FB22</name><description>Filter bits</description><bitOffset>22</bitOffset><bitWidth>1</bitWidth></field><field><name>FB23</name><description>Filter bits</description><bitOffset>23</bitOffset><bitWidth>1</bitWidth></field><field><name>FB24</name><description>Filter bits</description><bitOffset>24</bitOffset><bitWidth>1</bitWidth></field><field><name>FB25</name><description>Filter bits</description><bitOffset>25</bitOffset><bitWidth>1</bitWidth></field><field><name>FB26</name><description>Filter bits</description><bitOffset>26</bitOffset><bitWidth>1</bitWidth></field><field><name>FB27</name><description>Filter bits</description><bitOffset>27</bitOffset><bitWidth>1</bitWidth></field><field><name>FB28</name><description>Filter bits</description><bitOffset>28</bitOffset><bitWidth>1</bitWidth></field><field><name>FB29</name><description>Filter bits</description><bitOffset>29</bitOffset><bitWidth>1</bitWidth></field><field><name>FB30</name><description>Filter bits</description><bitOffset>30</bitOffset><bitWidth>1</bitWidth></field><field><name>FB31</name><description>Filter bits</description><bitOffset>31</bitOffset><bitWidth>1</bitWidth></field></fields></register></registers></peripheral></peripherals></device> |