38112 lines
1.3 MiB
38112 lines
1.3 MiB
<?xml version="1.0" encoding="utf-8" standalone="no"?>
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<!-- File naming: <gigadevice>_<GD32F10x_CL>.svd -->
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<device schemaVersion="1.1" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd">
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<name>GD32VF103</name>
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<version>1.0</version>
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<description>GD32VF103 RISC-V Microcontroller based device</description>
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<licenseText>
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Copyright 2019 Sipeed Co.,Ltd.
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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</licenseText>
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<cpu>
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<name>CM3</name>
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<revision>r2p1</revision>
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<endian>little</endian>
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<mpuPresent>0</mpuPresent>
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<fpuPresent>0</fpuPresent>
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<nvicPrioBits>4</nvicPrioBits>
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<vendorSystickConfig>0</vendorSystickConfig>
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</cpu>
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<addressUnitBits>8</addressUnitBits>
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<width>32</width>
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<!--Bus Interface Properties-->
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<!--the maximum data bit width accessible within a single transfer-->
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<!--Cortex-M3 is byte addressable-->
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<!--Register Default Properties-->
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<size>0x20</size>
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<resetValue>0x0</resetValue>
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<resetMask>0xFFFFFFFF</resetMask>
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<peripherals>
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<peripheral>
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<name>ADC0</name>
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<description>Analog to digital converter</description>
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<groupName>ADC</groupName>
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<baseAddress>0x40012400</baseAddress>
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<addressBlock>
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<offset>0x0</offset>
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<size>0x400</size>
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<usage>registers</usage>
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</addressBlock>
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<interrupt>
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<name>ADC0_1</name>
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<value>37</value>
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</interrupt>
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<registers>
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<register>
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<name>STAT</name>
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<displayName>STAT</displayName>
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<description>status register</description>
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<addressOffset>0x0</addressOffset>
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<size>0x20</size>
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<access>read-write</access>
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<resetValue>0x00000000</resetValue>
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<fields>
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<field>
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<name>STRC</name>
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<description>Start flag of regular channel group</description>
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<bitOffset>4</bitOffset>
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<bitWidth>1</bitWidth>
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</field>
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<field>
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<name>STIC</name>
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<description>Start flag of inserted channel group</description>
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<bitOffset>3</bitOffset>
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<bitWidth>1</bitWidth>
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</field>
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<field>
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<name>EOIC</name>
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<description>End of inserted group conversion flag</description>
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<bitOffset>2</bitOffset>
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<bitWidth>1</bitWidth>
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</field>
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<field>
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<name>EOC</name>
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<description>End of group conversion flag</description>
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<bitOffset>1</bitOffset>
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<bitWidth>1</bitWidth>
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</field>
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<field>
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<name>WDE</name>
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<description>Analog watchdog event flag</description>
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<bitOffset>0</bitOffset>
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<bitWidth>1</bitWidth>
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</field>
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</fields>
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</register>
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<register>
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<name>CTL0</name>
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<displayName>CTL0</displayName>
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<description>control register 0</description>
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<addressOffset>0x04</addressOffset>
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<size>0x20</size>
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<access>read-write</access>
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<resetValue>0x00000000</resetValue>
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<fields>
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<field>
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<name>RWDEN</name>
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<description>Regular channel analog watchdog enable</description>
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<bitOffset>23</bitOffset>
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<bitWidth>1</bitWidth>
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</field>
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<field>
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<name>IWDEN</name>
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<description>Inserted channel analog watchdog
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enable</description>
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<bitOffset>22</bitOffset>
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<bitWidth>1</bitWidth>
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</field>
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<field>
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<name>SYNCM</name>
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<description>sync mode selection</description>
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<bitOffset>16</bitOffset>
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<bitWidth>4</bitWidth>
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</field>
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<field>
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<name>DISNUM</name>
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<description>Number of conversions in
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discontinuous mode</description>
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<bitOffset>13</bitOffset>
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<bitWidth>3</bitWidth>
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</field>
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<field>
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<name>DISIC</name>
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<description>Discontinuous mode on
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inserted channels</description>
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<bitOffset>12</bitOffset>
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<bitWidth>1</bitWidth>
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</field>
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<field>
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<name>DISRC</name>
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<description>Discontinuous mode on regular
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channels</description>
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<bitOffset>11</bitOffset>
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<bitWidth>1</bitWidth>
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</field>
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<field>
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<name>ICA</name>
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<description>Inserted channel group convert
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automatically</description>
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<bitOffset>10</bitOffset>
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<bitWidth>1</bitWidth>
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</field>
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<field>
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<name>WDSC</name>
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<description>When in scan mode, analog watchdog
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is effective on a single channel</description>
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<bitOffset>9</bitOffset>
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<bitWidth>1</bitWidth>
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</field>
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<field>
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<name>SM</name>
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<description>Scan mode</description>
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<bitOffset>8</bitOffset>
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<bitWidth>1</bitWidth>
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</field>
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<field>
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<name>EOICIE</name>
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<description>Interrupt enable for EOIC</description>
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<bitOffset>7</bitOffset>
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<bitWidth>1</bitWidth>
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</field>
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<field>
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<name>WDEIE</name>
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<description>Interrupt enable for WDE</description>
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<bitOffset>6</bitOffset>
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<bitWidth>1</bitWidth>
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</field>
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<field>
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<name>EOCIE</name>
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<description>Interrupt enable for EOC</description>
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<bitOffset>5</bitOffset>
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<bitWidth>1</bitWidth>
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</field>
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<field>
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<name>WDCHSEL</name>
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<description>Analog watchdog channel select</description>
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<bitOffset>0</bitOffset>
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<bitWidth>5</bitWidth>
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</field>
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</fields>
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</register>
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<register>
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<name>CTL1</name>
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<displayName>CTL1</displayName>
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<description>control register 1</description>
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<addressOffset>0x08</addressOffset>
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<size>0x20</size>
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<access>read-write</access>
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<resetValue>0x00000000</resetValue>
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<fields>
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<field>
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<name>TSVREN</name>
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<description>Channel 16 and 17 enable of ADC0</description>
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<bitOffset>23</bitOffset>
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<bitWidth>1</bitWidth>
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</field>
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<field>
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<name>SWRCST</name>
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<description>Start on regular channel</description>
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<bitOffset>22</bitOffset>
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<bitWidth>1</bitWidth>
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</field>
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<field>
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<name>SWICST</name>
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<description>Start on inserted channel</description>
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<bitOffset>21</bitOffset>
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<bitWidth>1</bitWidth>
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</field>
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<field>
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<name>ETERC</name>
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<description>External trigger enable for regular channel</description>
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<bitOffset>20</bitOffset>
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<bitWidth>1</bitWidth>
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</field>
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<field>
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<name>ETSRC</name>
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<description>External trigger select for regular channel</description>
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<bitOffset>17</bitOffset>
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<bitWidth>3</bitWidth>
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</field>
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<field>
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<name>ETEIC</name>
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<description>External trigger select for inserted channel</description>
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<bitOffset>15</bitOffset>
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<bitWidth>1</bitWidth>
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</field>
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<field>
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<name>ETSIC</name>
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<description>External trigger select for inserted channel</description>
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<bitOffset>12</bitOffset>
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<bitWidth>3</bitWidth>
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</field>
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<field>
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<name>DAL</name>
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<description>Data alignment</description>
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<bitOffset>11</bitOffset>
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<bitWidth>1</bitWidth>
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</field>
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<field>
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<name>DMA</name>
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<description>DMA request enable</description>
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<bitOffset>8</bitOffset>
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<bitWidth>1</bitWidth>
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</field>
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<field>
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<name>RSTCLB</name>
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<description>Reset calibration</description>
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<bitOffset>3</bitOffset>
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<bitWidth>1</bitWidth>
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</field>
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<field>
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<name>CLB</name>
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<description>ADC calibration</description>
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<bitOffset>2</bitOffset>
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<bitWidth>1</bitWidth>
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</field>
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<field>
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<name>CTN</name>
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<description>Continuous mode</description>
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<bitOffset>1</bitOffset>
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<bitWidth>1</bitWidth>
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</field>
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<field>
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<name>ADCON</name>
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<description>ADC on</description>
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<bitOffset>0</bitOffset>
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<bitWidth>1</bitWidth>
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</field>
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</fields>
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</register>
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<register>
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<name>SAMPT0</name>
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<displayName>SAMPT0</displayName>
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<description>Sample time register 0</description>
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<addressOffset>0x0C</addressOffset>
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<size>0x20</size>
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<access>read-write</access>
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<resetValue>0x00000000</resetValue>
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<fields>
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<field>
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<name>SPT10</name>
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<description>Channel 10 sample time
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selection</description>
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<bitOffset>0</bitOffset>
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<bitWidth>3</bitWidth>
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</field>
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<field>
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<name>SPT11</name>
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<description>Channel 11 sample time
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selection</description>
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<bitOffset>3</bitOffset>
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<bitWidth>3</bitWidth>
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</field>
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<field>
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<name>SPT12</name>
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<description>Channel 12 sample time
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selection</description>
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<bitOffset>6</bitOffset>
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<bitWidth>3</bitWidth>
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</field>
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<field>
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<name>SPT13</name>
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<description>Channel 13 sample time
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selection</description>
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<bitOffset>9</bitOffset>
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<bitWidth>3</bitWidth>
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</field>
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<field>
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<name>SPT14</name>
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<description>Channel 14 sample time
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selection</description>
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<bitOffset>12</bitOffset>
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<bitWidth>3</bitWidth>
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</field>
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<field>
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<name>SPT15</name>
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<description>Channel 15 sample time
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selection</description>
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<bitOffset>15</bitOffset>
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<bitWidth>3</bitWidth>
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</field>
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<field>
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<name>SPT16</name>
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<description>Channel 16 sample time
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selection</description>
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<bitOffset>18</bitOffset>
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<bitWidth>3</bitWidth>
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</field>
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<field>
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<name>SPT17</name>
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<description>Channel 17 sample time
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selection</description>
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<bitOffset>21</bitOffset>
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<bitWidth>3</bitWidth>
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</field>
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</fields>
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</register>
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<register>
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<name>SAMPT1</name>
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<displayName>SAMPT1</displayName>
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<description>Sample time register 1</description>
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<addressOffset>0x10</addressOffset>
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<size>0x20</size>
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<access>read-write</access>
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<resetValue>0x00000000</resetValue>
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<fields>
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<field>
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<name>SPT0</name>
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<description>Channel 0 sample time
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selection</description>
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<bitOffset>0</bitOffset>
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<bitWidth>3</bitWidth>
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</field>
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<field>
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<name>SPT1</name>
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<description>Channel 1 sample time
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selection</description>
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<bitOffset>3</bitOffset>
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<bitWidth>3</bitWidth>
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</field>
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<field>
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<name>SPT2</name>
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<description>Channel 2 sample time
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selection</description>
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<bitOffset>6</bitOffset>
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<bitWidth>3</bitWidth>
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</field>
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<field>
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<name>SPT3</name>
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<description>Channel 3 sample time
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selection</description>
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<bitOffset>9</bitOffset>
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<bitWidth>3</bitWidth>
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</field>
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<field>
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<name>SPT4</name>
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<description>Channel 4 sample time
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selection</description>
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<bitOffset>12</bitOffset>
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<bitWidth>3</bitWidth>
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</field>
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<field>
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<name>SPT5</name>
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<description>Channel 5 sample time
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selection</description>
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<bitOffset>15</bitOffset>
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<bitWidth>3</bitWidth>
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</field>
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<field>
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<name>SPT6</name>
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<description>Channel 6 sample time
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selection</description>
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<bitOffset>18</bitOffset>
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<bitWidth>3</bitWidth>
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</field>
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<field>
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<name>SPT7</name>
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<description>Channel 7 sample time
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|
selection</description>
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<bitOffset>21</bitOffset>
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<bitWidth>3</bitWidth>
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</field>
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<field>
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<name>SPT8</name>
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<description>Channel 8 sample time
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|
selection</description>
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<bitOffset>24</bitOffset>
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<bitWidth>3</bitWidth>
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</field>
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<field>
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<name>SPT9</name>
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<description>Channel 9 sample time
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|
selection</description>
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<bitOffset>27</bitOffset>
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<bitWidth>3</bitWidth>
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</field>
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</fields>
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</register>
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<register>
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<name>IOFF0</name>
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<displayName>IOFF0</displayName>
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<description>Inserted channel data offset register
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0</description>
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<addressOffset>0x14</addressOffset>
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|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IOFF</name>
|
|
<description>Data offset for inserted channel
|
|
0</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>12</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
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<register>
|
|
<name>IOFF1</name>
|
|
<displayName>IOFF1</displayName>
|
|
<description>Inserted channel data offset register
|
|
1</description>
|
|
<addressOffset>0x18</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IOFF</name>
|
|
<description>Data offset for inserted channel
|
|
1</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>12</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IOFF2</name>
|
|
<displayName>IOFF2</displayName>
|
|
<description>Inserted channel data offset register
|
|
2</description>
|
|
<addressOffset>0x1C</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IOFF</name>
|
|
<description>Data offset for inserted channel
|
|
2</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>12</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IOFF3</name>
|
|
<displayName>IOFF3</displayName>
|
|
<description>Inserted channel data offset register
|
|
3</description>
|
|
<addressOffset>0x20</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IOFF</name>
|
|
<description>Data offset for inserted channel
|
|
3</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>12</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>WDHT</name>
|
|
<displayName>WDHT</displayName>
|
|
<description>watchdog higher threshold
|
|
register</description>
|
|
<addressOffset>0x24</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000FFF</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>WDHT</name>
|
|
<description>Analog watchdog higher
|
|
threshold</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>12</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>WDLT</name>
|
|
<displayName>WDLT</displayName>
|
|
<description>watchdog lower threshold
|
|
register</description>
|
|
<addressOffset>0x28</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>WDLT</name>
|
|
<description>Analog watchdog lower
|
|
threshold</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>12</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RSQ0</name>
|
|
<displayName>RSQ0</displayName>
|
|
<description>regular sequence register 0</description>
|
|
<addressOffset>0x2C</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>RL</name>
|
|
<description>Regular channel group
|
|
length</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>RSQ15</name>
|
|
<description>16th conversion in regular
|
|
sequence</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>5</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>RSQ14</name>
|
|
<description>15th conversion in regular
|
|
sequence</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>5</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>RSQ13</name>
|
|
<description>14th conversion in regular
|
|
sequence</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>5</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>RSQ12</name>
|
|
<description>13th conversion in regular
|
|
sequence</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>5</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RSQ1</name>
|
|
<displayName>RSQ1</displayName>
|
|
<description>regular sequence register 1</description>
|
|
<addressOffset>0x30</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>RSQ11</name>
|
|
<description>12th conversion in regular
|
|
sequence</description>
|
|
<bitOffset>25</bitOffset>
|
|
<bitWidth>5</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>RSQ10</name>
|
|
<description>11th conversion in regular
|
|
sequence</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>5</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>RSQ9</name>
|
|
<description>10th conversion in regular
|
|
sequence</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>5</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>RSQ8</name>
|
|
<description>9th conversion in regular
|
|
sequence</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>5</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>RSQ7</name>
|
|
<description>8th conversion in regular
|
|
sequence</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>5</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>RSQ6</name>
|
|
<description>7th conversion in regular
|
|
sequence</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>5</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RSQ2</name>
|
|
<displayName>RSQ2</displayName>
|
|
<description>regular sequence register 2</description>
|
|
<addressOffset>0x34</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>RSQ5</name>
|
|
<description>6th conversion in regular
|
|
sequence</description>
|
|
<bitOffset>25</bitOffset>
|
|
<bitWidth>5</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>RSQ4</name>
|
|
<description>5th conversion in regular
|
|
sequence</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>5</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>RSQ3</name>
|
|
<description>4th conversion in regular
|
|
sequence</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>5</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>RSQ2</name>
|
|
<description>3rd conversion in regular
|
|
sequence</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>5</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>RSQ1</name>
|
|
<description>2nd conversion in regular
|
|
sequence</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>5</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>RSQ0</name>
|
|
<description>1st conversion in regular
|
|
sequence</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>5</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>ISQ</name>
|
|
<displayName>ISQ</displayName>
|
|
<description>Inserted sequence register</description>
|
|
<addressOffset>0x38</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IL</name>
|
|
<description>Inserted channel group length</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ISQ3</name>
|
|
<description>4th conversion in inserted
|
|
sequence</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>5</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ISQ2</name>
|
|
<description>3rd conversion in inserted
|
|
sequence</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>5</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ISQ1</name>
|
|
<description>2nd conversion in inserted
|
|
sequence</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>5</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ISQ0</name>
|
|
<description>1st conversion in inserted
|
|
sequence</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>5</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IDATA0</name>
|
|
<displayName>IDATA0</displayName>
|
|
<description>Inserted data register 0</description>
|
|
<addressOffset>0x3C</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IDATAn</name>
|
|
<description>Inserted number n conversion data</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IDATA1</name>
|
|
<displayName>IDATA1</displayName>
|
|
<description>Inserted data register 1</description>
|
|
<addressOffset>0x40</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IDATAn</name>
|
|
<description>Inserted number n conversion data</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IDATA2</name>
|
|
<displayName>IDATA2</displayName>
|
|
<description>Inserted data register 2</description>
|
|
<addressOffset>0x44</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IDATAn</name>
|
|
<description>Inserted number n conversion data</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IDATA3</name>
|
|
<displayName>IDATA3</displayName>
|
|
<description>Inserted data register 3</description>
|
|
<addressOffset>0x48</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IDATAn</name>
|
|
<description>Inserted number n conversion data</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RDATA</name>
|
|
<displayName>RDATA</displayName>
|
|
<description>regular data register</description>
|
|
<addressOffset>0x4C</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>ADC1RDTR</name>
|
|
<description>ADC regular channel data</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>RDATA</name>
|
|
<description>Regular channel data</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>OVSAMPCTL</name>
|
|
<displayName>OVSAMPCTL</displayName>
|
|
<description>Oversample control register</description>
|
|
<addressOffset>0x80</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DRES</name>
|
|
<description>ADC resolution</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TOVS</name>
|
|
<description>Triggered Oversampling</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>OVSS</name>
|
|
<description>Oversampling shift</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>OVSR</name>
|
|
<description>Oversampling ratio</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>OVSEN</name>
|
|
<description>Oversampler Enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>ADC1</name>
|
|
<description>Analog to digital converter</description>
|
|
<groupName>ADC</groupName>
|
|
<baseAddress>0x40012800</baseAddress>
|
|
<addressBlock>
|
|
<offset>0x0</offset>
|
|
<size>0x400</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<interrupt>
|
|
<name>ADC0_1</name>
|
|
<value>37</value>
|
|
</interrupt>
|
|
<registers>
|
|
<register>
|
|
<name>STAT</name>
|
|
<displayName>STAT</displayName>
|
|
<description>status register</description>
|
|
<addressOffset>0x0</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>STRC</name>
|
|
<description>Start flag of regular channel group</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>STIC</name>
|
|
<description>Start flag of inserted channel group</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>EOIC</name>
|
|
<description>End of inserted group conversion flag</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>EOC</name>
|
|
<description>End of group conversion flag</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>WDE</name>
|
|
<description>Analog watchdog event flag</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CTL0</name>
|
|
<displayName>CTL0</displayName>
|
|
<description>control register 0</description>
|
|
<addressOffset>0x4</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>RWDEN</name>
|
|
<description>Regular channel analog watchdog
|
|
enable</description>
|
|
<bitOffset>23</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>IWDEN</name>
|
|
<description>Inserted channel analog watchdog
|
|
enable</description>
|
|
<bitOffset>22</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DISNUM</name>
|
|
<description>Number of conversions in
|
|
discontinuous mode</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DISIC</name>
|
|
<description>Discontinuous mode on
|
|
inserted channels</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DISRC</name>
|
|
<description>Discontinuous mode on regular
|
|
channels</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ICA</name>
|
|
<description>Inserted channel group convert
|
|
automatically</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>WDSC</name>
|
|
<description>When in scan mode, analog watchdog
|
|
is effective on a single channel</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>SM</name>
|
|
<description>Scan mode</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>EOICIE</name>
|
|
<description>Interrupt enable for EOIC</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>WDEIE</name>
|
|
<description>Interrupt enable for WDE</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>EOCIE</name>
|
|
<description>Interrupt enable for EOC</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>WDCHSEL</name>
|
|
<description>Analog watchdog channel select</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>5</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CTL1</name>
|
|
<displayName>CTL1</displayName>
|
|
<description>control register 1</description>
|
|
<addressOffset>0x08</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SWRCST</name>
|
|
<description>Start on regular channel</description>
|
|
<bitOffset>22</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>SWICST</name>
|
|
<description>Start on inserted channel</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ETERC</name>
|
|
<description>External trigger enable for regular channel</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ETSRC</name>
|
|
<description>External trigger select for regular channel</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ETEIC</name>
|
|
<description>External trigger enable for inserted channel</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ETSIC</name>
|
|
<description>External trigger select for inserted channel</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DAL</name>
|
|
<description>Data alignment</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DMA</name>
|
|
<description>DMA request enable</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>RSTCLB</name>
|
|
<description>Reset calibration</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CLB</name>
|
|
<description>ADC calibration</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CTN</name>
|
|
<description>Continuous mode</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ADCON</name>
|
|
<description>ADC on</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SAMPT0</name>
|
|
<displayName>SAMPT0</displayName>
|
|
<description>Sample time register 0</description>
|
|
<addressOffset>0x0C</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SPT10</name>
|
|
<description>Channel 10 sample time
|
|
selection</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>SPT11</name>
|
|
<description>Channel 11 sample time
|
|
selection</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>SPT12</name>
|
|
<description>Channel 12 sample time
|
|
selection</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>SPT13</name>
|
|
<description>Channel 13 sample time
|
|
selection</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>SPT14</name>
|
|
<description>Channel 14 sample time
|
|
selection</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>SPT15</name>
|
|
<description>Channel 15 sample time
|
|
selection</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>SPT16</name>
|
|
<description>Channel 16 sample time
|
|
selection</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>SPT17</name>
|
|
<description>Channel 17 sample time
|
|
selection</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SAMPT1</name>
|
|
<displayName>SAMPT1</displayName>
|
|
<description>Sample time register 1</description>
|
|
<addressOffset>0x10</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SPT0</name>
|
|
<description>Channel 0 sample time
|
|
selection</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>SPT1</name>
|
|
<description>Channel 1 sample time
|
|
selection</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>SPT2</name>
|
|
<description>Channel 2 sample time
|
|
selection</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>SPT3</name>
|
|
<description>Channel 3 sample time
|
|
selection</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>SPT4</name>
|
|
<description>Channel 4 sample time
|
|
selection</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>SPT5</name>
|
|
<description>Channel 5 sample time
|
|
selection</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>SPT6</name>
|
|
<description>Channel 6 sample time
|
|
selection</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>SPT7</name>
|
|
<description>Channel 7 sample time
|
|
selection</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>SPT8</name>
|
|
<description>Channel 8 sample time
|
|
selection</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>SPT9</name>
|
|
<description>Channel 9 sample time
|
|
selection</description>
|
|
<bitOffset>27</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IOFF0</name>
|
|
<displayName>IOFF0</displayName>
|
|
<description>Inserted channel data offset register
|
|
0</description>
|
|
<addressOffset>0x14</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IOFF</name>
|
|
<description>Data offset for inserted channel
|
|
0</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>12</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IOFF1</name>
|
|
<displayName>IOFF1</displayName>
|
|
<description>Inserted channel data offset register
|
|
1</description>
|
|
<addressOffset>0x18</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IOFF</name>
|
|
<description>Data offset for inserted channel
|
|
1</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>12</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IOFF2</name>
|
|
<displayName>IOFF2</displayName>
|
|
<description>Inserted channel data offset register
|
|
2</description>
|
|
<addressOffset>0x1C</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IOFF</name>
|
|
<description>Data offset for inserted channel
|
|
2</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>12</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IOFF3</name>
|
|
<displayName>IOFF3</displayName>
|
|
<description>Inserted channel data offset register
|
|
3</description>
|
|
<addressOffset>0x20</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IOFF</name>
|
|
<description>Data offset for inserted channel
|
|
3</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>12</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>WDHT</name>
|
|
<displayName>WDHT</displayName>
|
|
<description>watchdog higher threshold
|
|
register</description>
|
|
<addressOffset>0x24</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000FFF</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>WDHT</name>
|
|
<description>Analog watchdog higher
|
|
threshold</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>12</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>WDLT</name>
|
|
<displayName>WDLT</displayName>
|
|
<description>watchdog lower threshold
|
|
register</description>
|
|
<addressOffset>0x28</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>WDLT</name>
|
|
<description>Analog watchdog lower
|
|
threshold</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>12</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RSQ0</name>
|
|
<displayName>RSQ0</displayName>
|
|
<description>regular sequence register 0</description>
|
|
<addressOffset>0x2C</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>RL</name>
|
|
<description>Regular channel group
|
|
length</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>RSQ15</name>
|
|
<description>16th conversion in regular
|
|
sequence</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>5</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>RSQ14</name>
|
|
<description>15th conversion in regular
|
|
sequence</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>5</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>RSQ13</name>
|
|
<description>14th conversion in regular
|
|
sequence</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>5</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>RSQ12</name>
|
|
<description>13th conversion in regular
|
|
sequence</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>5</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RSQ1</name>
|
|
<displayName>RSQ1</displayName>
|
|
<description>regular sequence register 1</description>
|
|
<addressOffset>0x30</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>RSQ11</name>
|
|
<description>12th conversion in regular
|
|
sequence</description>
|
|
<bitOffset>25</bitOffset>
|
|
<bitWidth>5</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>RSQ10</name>
|
|
<description>11th conversion in regular
|
|
sequence</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>5</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>RSQ9</name>
|
|
<description>10th conversion in regular
|
|
sequence</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>5</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>RSQ8</name>
|
|
<description>9th conversion in regular
|
|
sequence</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>5</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>RSQ7</name>
|
|
<description>8th conversion in regular
|
|
sequence</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>5</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>RSQ6</name>
|
|
<description>7th conversion in regular
|
|
sequence</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>5</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RSQ2</name>
|
|
<displayName>RSQ2</displayName>
|
|
<description>regular sequence register 2</description>
|
|
<addressOffset>0x34</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>RSQ5</name>
|
|
<description>6th conversion in regular
|
|
sequence</description>
|
|
<bitOffset>25</bitOffset>
|
|
<bitWidth>5</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>RSQ4</name>
|
|
<description>5th conversion in regular
|
|
sequence</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>5</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>RSQ3</name>
|
|
<description>4th conversion in regular
|
|
sequence</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>5</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>RSQ2</name>
|
|
<description>3rd conversion in regular
|
|
sequence</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>5</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>RSQ1</name>
|
|
<description>2nd conversion in regular
|
|
sequence</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>5</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>RSQ0</name>
|
|
<description>1st conversion in regular
|
|
sequence</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>5</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>ISQ</name>
|
|
<displayName>ISQ</displayName>
|
|
<description>Inserted sequence register</description>
|
|
<addressOffset>0x38</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IL</name>
|
|
<description>Inserted channel group length</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ISQ3</name>
|
|
<description>4th conversion in inserted
|
|
sequence</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>5</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ISQ2</name>
|
|
<description>3rd conversion in inserted
|
|
sequence</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>5</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ISQ1</name>
|
|
<description>2nd conversion in inserted
|
|
sequence</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>5</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ISQ0</name>
|
|
<description>1st conversion in inserted
|
|
sequence</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>5</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IDATA0</name>
|
|
<displayName>IDATA0</displayName>
|
|
<description>Inserted data register 0</description>
|
|
<addressOffset>0x3C</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IDATAn</name>
|
|
<description>Inserted number n conversion data</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IDATA1</name>
|
|
<displayName>IDATA1</displayName>
|
|
<description>Inserted data register 1</description>
|
|
<addressOffset>0x40</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IDATAn</name>
|
|
<description>Inserted number n conversion data</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IDATA2</name>
|
|
<displayName>IDATA2</displayName>
|
|
<description>Inserted data register 2</description>
|
|
<addressOffset>0x44</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IDATAn</name>
|
|
<description>Inserted number n conversion data</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IDATA3</name>
|
|
<displayName>IDATA3</displayName>
|
|
<description>Inserted data register 3</description>
|
|
<addressOffset>0x48</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IDATAn</name>
|
|
<description>Inserted number n conversion data</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RDATA</name>
|
|
<displayName>RDATA</displayName>
|
|
<description>regular data register</description>
|
|
<addressOffset>0x4C</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>RDATA</name>
|
|
<description>Regular channel data</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>AFIO</name>
|
|
<description>Alternate-function I/Os</description>
|
|
<groupName>AFIO</groupName>
|
|
<baseAddress>0x40010000</baseAddress>
|
|
<addressBlock>
|
|
<offset>0x0</offset>
|
|
<size>0x400</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<registers>
|
|
<register>
|
|
<name>EC</name>
|
|
<displayName>EC</displayName>
|
|
<description>Event control register</description>
|
|
<addressOffset>0x0</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EOE</name>
|
|
<description>Event output enable</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PORT</name>
|
|
<description>Event output port selection</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PIN</name>
|
|
<description>Event output pin selection</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PCF0</name>
|
|
<displayName>PCF0</displayName>
|
|
<description>AFIO port configuration register 0</description>
|
|
<addressOffset>0x04</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TIMER1ITI1_REMAP</name>
|
|
<description>TIMER1 internal trigger 1 remapping</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>SPI2_REMAP</name>
|
|
<description> SPI2/I2S2 remapping</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>SWJ_CFG</name>
|
|
<description>Serial wire JTAG configuration</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CAN1_REMAP</name>
|
|
<description>CAN1 I/O remapping</description>
|
|
<bitOffset>22</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TIMER4CH3_IREMAP</name>
|
|
<description>TIMER4 channel3 internal remapping</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PD01_REMAP</name>
|
|
<description>Port D0/Port D1 mapping on OSC_IN/OSC_OUT</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CAN0_REMAP</name>
|
|
<description>CAN0 alternate interface remapping</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TIMER3_REMAP</name>
|
|
<description>TIMER3 remapping</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TIMER2_REMAP</name>
|
|
<description>TIMER2 remapping</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TIMER1_REMAP</name>
|
|
<description>TIMER1 remapping</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TIMER0_REMAP</name>
|
|
<description>TIMER0 remapping</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>USART2_REMAP</name>
|
|
<description>USART2 remapping</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>USART1_REMAP</name>
|
|
<description>USART1 remapping</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>USART0_REMAP</name>
|
|
<description>USART0 remapping</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>I2C0_REMAP</name>
|
|
<description>I2C0 remapping</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>SPI0_REMAP</name>
|
|
<description>SPI0 remapping</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>EXTISS0</name>
|
|
<displayName>EXTISS0</displayName>
|
|
<description>EXTI sources selection register 0</description>
|
|
<addressOffset>0x08</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EXTI3_SS</name>
|
|
<description>EXTI 3 sources selection</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>EXTI2_SS</name>
|
|
<description>EXTI 2 sources selection</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>EXTI1_SS</name>
|
|
<description>EXTI 1 sources selection</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>EXTI0_SS</name>
|
|
<description>EXTI 0 sources selection</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>EXTISS1</name>
|
|
<displayName>EXTISS1</displayName>
|
|
<description>EXTI sources selection register 1</description>
|
|
<addressOffset>0x0C</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EXTI7_SS</name>
|
|
<description>EXTI 7 sources selection</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>EXTI6_SS</name>
|
|
<description>EXTI 6 sources selection</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>EXTI5_SS</name>
|
|
<description>EXTI 5 sources selection</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>EXTI4_SS</name>
|
|
<description>EXTI 4 sources selection</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>EXTISS2</name>
|
|
<displayName>EXTISS2</displayName>
|
|
<description>EXTI sources selection register 2</description>
|
|
<addressOffset>0x10</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EXTI11_SS</name>
|
|
<description>EXTI 11 sources selection</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>EXTI10_SS</name>
|
|
<description>EXTI 10 sources selection</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>EXTI9_SS</name>
|
|
<description>EXTI 9 sources selection</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>EXTI8_SS</name>
|
|
<description>EXTI 8 sources selection</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>EXTISS3</name>
|
|
<displayName>EXTISS3</displayName>
|
|
<description>EXTI sources selection register 3</description>
|
|
<addressOffset>0x14</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EXTI15_SS</name>
|
|
<description>EXTI 15 sources selection</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>EXTI14_SS</name>
|
|
<description>EXTI 14 sources selection</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>EXTI13_SS</name>
|
|
<description>EXTI 13 sources selection</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>EXTI12_SS</name>
|
|
<description>EXTI 12 sources selection</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PCF1</name>
|
|
<displayName>PCF1</displayName>
|
|
<description>AFIO port configuration register 1</description>
|
|
<addressOffset>0x1C</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EXMC_NADV</name>
|
|
<description>EXMC_NADV connect/disconnect</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>BKP</name>
|
|
<description>Backup registers</description>
|
|
<groupName>BKP</groupName>
|
|
<baseAddress>0x40006C00</baseAddress>
|
|
<addressBlock>
|
|
<offset>0x0</offset>
|
|
<size>0x400</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<interrupt>
|
|
<name>Tamper</name>
|
|
<value>21</value>
|
|
</interrupt>
|
|
<registers>
|
|
<register>
|
|
<name>DATA0</name>
|
|
<displayName>DATA0</displayName>
|
|
<description>Backup data register 0</description>
|
|
<addressOffset>0x4</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DATA</name>
|
|
<description>Backup data</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DATA1</name>
|
|
<displayName>DATA1</displayName>
|
|
<description>Backup data register 1</description>
|
|
<addressOffset>0x8</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DATA</name>
|
|
<description>Backup data</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DATA2</name>
|
|
<displayName>DATA2</displayName>
|
|
<description>Backup data register 2</description>
|
|
<addressOffset>0xC</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DATA</name>
|
|
<description>Backup data</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DATA3</name>
|
|
<displayName>DATA3</displayName>
|
|
<description>Backup data register 3</description>
|
|
<addressOffset>0x10</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DATA</name>
|
|
<description>Backup data</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DATA4</name>
|
|
<displayName>DATA4</displayName>
|
|
<description>Backup data register 4</description>
|
|
<addressOffset>0x14</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DATA</name>
|
|
<description>Backup data</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DATA5</name>
|
|
<displayName>DATA5</displayName>
|
|
<description>Backup data register 5</description>
|
|
<addressOffset>0x18</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DATA</name>
|
|
<description>Backup data</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DATA6</name>
|
|
<displayName>DATA6</displayName>
|
|
<description>Backup data register 6</description>
|
|
<addressOffset>0x1C</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DATA</name>
|
|
<description>Backup data</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DATA7</name>
|
|
<displayName>DATA7</displayName>
|
|
<description>Backup data register 7</description>
|
|
<addressOffset>0x20</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DATA</name>
|
|
<description>Backup data</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DATA8</name>
|
|
<displayName>DATA8</displayName>
|
|
<description>Backup data register 8</description>
|
|
<addressOffset>0x24</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DATA</name>
|
|
<description>Backup data</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DATA9</name>
|
|
<displayName>DATA9</displayName>
|
|
<description>Backup data register 9</description>
|
|
<addressOffset>0x28</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DATA</name>
|
|
<description>Backup data</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DATA10</name>
|
|
<displayName>DATA10</displayName>
|
|
<description>Backup data register 10</description>
|
|
<addressOffset>0x40</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DATA</name>
|
|
<description>Backup data</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DATA11</name>
|
|
<displayName>DATA11</displayName>
|
|
<description>Backup data register 11</description>
|
|
<addressOffset>0x44</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DATA</name>
|
|
<description>Backup data</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DATA12</name>
|
|
<displayName>DATA12</displayName>
|
|
<description>Backup data register 12</description>
|
|
<addressOffset>0x48</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DATA</name>
|
|
<description>Backup data</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DATA13</name>
|
|
<displayName>DATA13</displayName>
|
|
<description>Backup data register 13</description>
|
|
<addressOffset>0x4C</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DATA</name>
|
|
<description>Backup data</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DATA14</name>
|
|
<displayName>DATA14</displayName>
|
|
<description>Backup data register 14</description>
|
|
<addressOffset>0x50</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DATA</name>
|
|
<description>Backup data</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DATA15</name>
|
|
<displayName>DATA15</displayName>
|
|
<description>Backup data register 15</description>
|
|
<addressOffset>0x54</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DATA</name>
|
|
<description>Backup data</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DATA16</name>
|
|
<displayName>DATA16</displayName>
|
|
<description>Backup data register 16</description>
|
|
<addressOffset>0x58</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DATA</name>
|
|
<description>Backup data</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DATA17</name>
|
|
<displayName>DATA17</displayName>
|
|
<description>Backup data register 17</description>
|
|
<addressOffset>0x5C</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DATA</name>
|
|
<description>Backup data</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DATA18</name>
|
|
<displayName>DATA18</displayName>
|
|
<description>Backup data register 18</description>
|
|
<addressOffset>0x60</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DATA</name>
|
|
<description>Backup data</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DATA19</name>
|
|
<displayName>DATA19</displayName>
|
|
<description>Backup data register 19</description>
|
|
<addressOffset>0x64</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DATA</name>
|
|
<description>Backup data</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DATA20</name>
|
|
<displayName>DATA20</displayName>
|
|
<description>Backup data register 20</description>
|
|
<addressOffset>0x68</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DATA</name>
|
|
<description>Backup data</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DATA21</name>
|
|
<displayName>DATA21</displayName>
|
|
<description>Backup data register 21</description>
|
|
<addressOffset>0x6C</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DATA</name>
|
|
<description>Backup data</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DATA22</name>
|
|
<displayName>DATA22</displayName>
|
|
<description>Backup data register 22</description>
|
|
<addressOffset>0x70</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DATA</name>
|
|
<description>Backup data</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DATA23</name>
|
|
<displayName>DATA23</displayName>
|
|
<description>Backup data register 23</description>
|
|
<addressOffset>0x74</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DATA</name>
|
|
<description>Backup data</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DATA24</name>
|
|
<displayName>DATA24</displayName>
|
|
<description>Backup data register 24</description>
|
|
<addressOffset>0x78</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DATA</name>
|
|
<description>Backup data</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DATA25</name>
|
|
<displayName>DATA25</displayName>
|
|
<description>Backup data register 25</description>
|
|
<addressOffset>0x7C</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DATA</name>
|
|
<description>Backup data</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DATA26</name>
|
|
<displayName>DATA26</displayName>
|
|
<description>Backup data register 26</description>
|
|
<addressOffset>0x80</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DATA</name>
|
|
<description>Backup data</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DATA27</name>
|
|
<displayName>DATA27</displayName>
|
|
<description>Backup data register 27</description>
|
|
<addressOffset>0x84</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DATA</name>
|
|
<description>Backup data</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DATA28</name>
|
|
<displayName>DATA28</displayName>
|
|
<description>Backup data register 28</description>
|
|
<addressOffset>0x88</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DATA</name>
|
|
<description>Backup data</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DATA29</name>
|
|
<displayName>DATA29</displayName>
|
|
<description>Backup data register 29</description>
|
|
<addressOffset>0x8C</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DATA</name>
|
|
<description>Backup data</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DATA30</name>
|
|
<displayName>DATA30</displayName>
|
|
<description>Backup data register 30</description>
|
|
<addressOffset>0x90</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DATA</name>
|
|
<description>Backup data</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DATA31</name>
|
|
<displayName>DATA31</displayName>
|
|
<description>Backup data register 31</description>
|
|
<addressOffset>0x94</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DATA</name>
|
|
<description>Backup data</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DATA32</name>
|
|
<displayName>DATA32</displayName>
|
|
<description>Backup data register 32</description>
|
|
<addressOffset>0x98</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DATA</name>
|
|
<description>Backup data</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DATA33</name>
|
|
<displayName>DATA33</displayName>
|
|
<description>Backup data register 33</description>
|
|
<addressOffset>0x9C</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DATA</name>
|
|
<description>Backup data</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DATA34</name>
|
|
<displayName>DATA34</displayName>
|
|
<description>Backup data register 34</description>
|
|
<addressOffset>0xA0</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DATA</name>
|
|
<description>Backup data</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DATA35</name>
|
|
<displayName>DATA35</displayName>
|
|
<description>Backup data register 35</description>
|
|
<addressOffset>0xA4</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DATA</name>
|
|
<description>Backup data</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DATA36</name>
|
|
<displayName>DATA36</displayName>
|
|
<description>Backup data register 36</description>
|
|
<addressOffset>0xA8</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DATA</name>
|
|
<description>Backup data</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DATA37</name>
|
|
<displayName>DATA37</displayName>
|
|
<description>Backup data register 37</description>
|
|
<addressOffset>0xAC</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DATA</name>
|
|
<description>Backup data</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DATA38</name>
|
|
<displayName>DATA38</displayName>
|
|
<description>Backup data register 38</description>
|
|
<addressOffset>0xB0</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DATA</name>
|
|
<description>Backup data</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DATA39</name>
|
|
<displayName>DATA39</displayName>
|
|
<description>Backup data register 39</description>
|
|
<addressOffset>0xB4</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DATA</name>
|
|
<description>Backup data</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DATA40</name>
|
|
<displayName>DATA40</displayName>
|
|
<description>Backup data register 40</description>
|
|
<addressOffset>0xB8</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DATA</name>
|
|
<description>Backup data</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DATA41</name>
|
|
<displayName>DATA41</displayName>
|
|
<description>Backup data register 41</description>
|
|
<addressOffset>0xBC</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DATA</name>
|
|
<description>Backup data</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>OCTL</name>
|
|
<displayName>OCTL</displayName>
|
|
<description>RTC signal output control register</description>
|
|
<addressOffset>0x2C</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>ROSEL</name>
|
|
<description>RTC output selection</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ASOEN</name>
|
|
<description>RTC alarm or second signal output enable</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>COEN</name>
|
|
<description>RTC clock calibration output enable</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>RCCV</name>
|
|
<description>RTC clock calibration value</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>7</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TPCTL</name>
|
|
<displayName>TPCTL</displayName>
|
|
<description>Tamper pin control register</description>
|
|
<addressOffset>0x30</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TPAL</name>
|
|
<description>TAMPER pin active level</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TPEN</name>
|
|
<description>TAMPER detection enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TPCS</name>
|
|
<displayName>TPCS</displayName>
|
|
<description>Tamper control and status register</description>
|
|
<addressOffset>0x34</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TIF</name>
|
|
<description>Tamper interrupt flag</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TEF</name>
|
|
<description>Tamper event flag</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TPIE</name>
|
|
<description>Tamper interrupt enable</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TIR</name>
|
|
<description>Tamper interrupt reset</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TER</name>
|
|
<description>Tamper event reset</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>CAN0</name>
|
|
<description>Controller area network</description>
|
|
<groupName>CAN</groupName>
|
|
<baseAddress>0x40006400</baseAddress>
|
|
<addressBlock>
|
|
<offset>0x0</offset>
|
|
<size>0x400</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<interrupt>
|
|
<name>CAN0_TX</name>
|
|
<value>38</value>
|
|
</interrupt>
|
|
<interrupt>
|
|
<name>CAN0_RX0</name>
|
|
<value>39</value>
|
|
</interrupt>
|
|
<interrupt>
|
|
<name>CAN0_RX1</name>
|
|
<value>40</value>
|
|
</interrupt>
|
|
<interrupt>
|
|
<name>CAN0_EWMC</name>
|
|
<value>41</value>
|
|
</interrupt>
|
|
<registers>
|
|
<register>
|
|
<name>CTL</name>
|
|
<displayName>CTL</displayName>
|
|
<description>Control register</description>
|
|
<addressOffset>0x0</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00010002</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DFZ</name>
|
|
<description>Debug freeze</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>SWRST</name>
|
|
<description>Software reset</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TTC</name>
|
|
<description>Time-triggered communication</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ABOR</name>
|
|
<description>Automatic bus-off recovery</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>AWU</name>
|
|
<description>Automatic wakeup</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ARD</name>
|
|
<description>Automatic retransmission disable</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>RFOD</name>
|
|
<description>Receive FIFO overwrite disable</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TFO</name>
|
|
<description>Transmit FIFO order</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>SLPWMOD</name>
|
|
<description>Sleep working mode</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>IWMOD</name>
|
|
<description>Initial working mode</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>STAT</name>
|
|
<displayName>STAT</displayName>
|
|
<description>Status register</description>
|
|
<addressOffset>0x04</addressOffset>
|
|
<size>0x20</size>
|
|
<resetValue>0x00000C02</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>RXL</name>
|
|
<description>RX level</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>LASTRX</name>
|
|
<description>Last sample value of RX pin</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RS</name>
|
|
<description>Receiving state</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TS</name>
|
|
<description>Transmitting state</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>SLPIF</name>
|
|
<description>Status change interrupt flag of sleep
|
|
working mode entering</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>WUIF</name>
|
|
<description>Status change interrupt flag of wakeup
|
|
from sleep working mode</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>ERRIF</name>
|
|
<description>Error interrupt flag</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>SLPWS</name>
|
|
<description>Sleep working state</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>IWS</name>
|
|
<description>Initial working state</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TSTAT</name>
|
|
<displayName>TSTAT</displayName>
|
|
<description>Transmit status register</description>
|
|
<addressOffset>0x8</addressOffset>
|
|
<size>0x20</size>
|
|
<resetValue>0x1C000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TMLS2</name>
|
|
<description>Transmit mailbox 2 last sending
|
|
in transmit FIFO</description>
|
|
<bitOffset>31</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TMLS1</name>
|
|
<description>Transmit mailbox 1 last sending
|
|
in transmit FIFO</description>
|
|
<bitOffset>30</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TMLS0</name>
|
|
<description>Transmit mailbox 0 last sending
|
|
in transmit FIFO</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TME2</name>
|
|
<description>Transmit mailbox 2 empty</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TME1</name>
|
|
<description>Transmit mailbox 1 empty</description>
|
|
<bitOffset>27</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TME0</name>
|
|
<description>Transmit mailbox 0 empty</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>NUM</name>
|
|
<description>number of the transmit FIFO mailbox in
|
|
which the frame will be transmitted if at least one mailbox is empty</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>MST2</name>
|
|
<description>Mailbox 2 stop transmitting</description>
|
|
<bitOffset>23</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>MTE2</name>
|
|
<description>Mailbox 2 transmit error</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>MAL2</name>
|
|
<description>Mailbox 2 arbitration lost</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>MTFNERR2</name>
|
|
<description>Mailbox 2 transmit finished and no error</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>MTF2</name>
|
|
<description>Mailbox 2 transmit finished</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>MST1</name>
|
|
<description>Mailbox 1 stop transmitting</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>MTE1</name>
|
|
<description>Mailbox 1 transmit error</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>MAL1</name>
|
|
<description>Mailbox 1 arbitration lost</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>MTFNERR1</name>
|
|
<description>Mailbox 1 transmit finished and no error</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>MTF1</name>
|
|
<description>Mailbox 1 transmit finished</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>MST0</name>
|
|
<description>Mailbox 0 stop transmitting</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>MTE0</name>
|
|
<description>Mailbox 0 transmit error</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>MAL0</name>
|
|
<description>Mailbox 0 arbitration lost</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>MTFNERR0</name>
|
|
<description>Mailbox 0 transmit finished and no error</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>MTF0</name>
|
|
<description>Mailbox 0 transmit finished</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RFIFO0</name>
|
|
<displayName>RFIFO0</displayName>
|
|
<description>Receive message FIFO0 register</description>
|
|
<addressOffset>0x0C</addressOffset>
|
|
<size>0x20</size>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>RFD0</name>
|
|
<description>Receive FIFO0 dequeue</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>RFO0</name>
|
|
<description>Receive FIFO0 overfull</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>RFF0</name>
|
|
<description>Receive FIFO0 full</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>RFL0</name>
|
|
<description>Receive FIFO0 length</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RFIFO1</name>
|
|
<displayName>RFIFO1</displayName>
|
|
<description>Receive message FIFO1 register</description>
|
|
<addressOffset>0x10</addressOffset>
|
|
<size>0x20</size>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>RFD1</name>
|
|
<description>Receive FIFO1 dequeue</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>RFO1</name>
|
|
<description>Receive FIFO1 overfull</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>RFF1</name>
|
|
<description>Receive FIFO1 full</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>RFL1</name>
|
|
<description>Receive FIFO1 length</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>INTEN</name>
|
|
<displayName>INTEN</displayName>
|
|
<description>Interrupt enable register</description>
|
|
<addressOffset>0x14</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SLPWIE</name>
|
|
<description>Sleep working interrupt enable</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>WIE</name>
|
|
<description>Wakeup interrupt enable</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ERRIE</name>
|
|
<description>Error interrupt enable</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ERRNIE</name>
|
|
<description>Error number interrupt enable</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>BOIE</name>
|
|
<description>Bus-off interrupt enable</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PERRIE</name>
|
|
<description>Passive error interrupt enable</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>WERRIE</name>
|
|
<description>Warning error interrupt enable</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>RFOIE1</name>
|
|
<description>Receive FIFO1 overfull interrupt enable</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>RFFIE1</name>
|
|
<description>Receive FIFO1 full interrupt enable</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>RFNEIE1</name>
|
|
<description>Receive FIFO1 not empty interrupt enable</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>RFOIE0</name>
|
|
<description>Receive FIFO0 overfull interrupt enable</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>RFFIE0</name>
|
|
<description>Receive FIFO0 full interrupt enable</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>RFNEIE0</name>
|
|
<description>Receive FIFO0 not empty interrupt enable</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TMEIE</name>
|
|
<description>Transmit mailbox empty interrupt enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>ERR</name>
|
|
<displayName>ERR</displayName>
|
|
<description>Error register</description>
|
|
<addressOffset>0x18</addressOffset>
|
|
<size>0x20</size>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>RECNT</name>
|
|
<description>Receive Error Count defined
|
|
by the CAN standard</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TECNT</name>
|
|
<description>Transmit Error Count defined
|
|
by the CAN standard</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>ERRN</name>
|
|
<description>Error number</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>BOERR</name>
|
|
<description>Bus-off error</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>PERR</name>
|
|
<description>Passive error</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>WERR</name>
|
|
<description>Warning error</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>BT</name>
|
|
<displayName>BT</displayName>
|
|
<description>Bit timing register</description>
|
|
<addressOffset>0x1C</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x01230000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SCMOD</name>
|
|
<description>Silent communication mode</description>
|
|
<bitOffset>31</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>LCMOD</name>
|
|
<description>Loopback communication mode</description>
|
|
<bitOffset>30</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>SJW</name>
|
|
<description>Resynchronization jump width</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>BS2</name>
|
|
<description>Bit segment 2</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>BS1</name>
|
|
<description>Bit segment 1</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>BAUDPSC</name>
|
|
<description>Baud rate prescaler</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>10</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TMI0</name>
|
|
<displayName>TMI0</displayName>
|
|
<description>Transmit mailbox identifier register 0</description>
|
|
<addressOffset>0x180</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SFID_EFID</name>
|
|
<description>The frame identifier</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>11</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>EFID</name>
|
|
<description>The frame identifier</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>18</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FF</name>
|
|
<description>Frame format</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FT</name>
|
|
<description>Frame type</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TEN</name>
|
|
<description>Transmit enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TMP0</name>
|
|
<displayName>TMP0</displayName>
|
|
<description>Transmit mailbox property register 0</description>
|
|
<addressOffset>0x184</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TS</name>
|
|
<description>Time stamp</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TSEN</name>
|
|
<description>Time stamp enable</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DLENC</name>
|
|
<description>Data length code</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TMDATA00</name>
|
|
<displayName>TMDATA00</displayName>
|
|
<description>Transmit mailbox data0 register</description>
|
|
<addressOffset>0x188</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DB3</name>
|
|
<description>Data byte 3</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DB2</name>
|
|
<description>Data byte 2</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DB1</name>
|
|
<description>Data byte 1</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DB0</name>
|
|
<description>Data byte 0</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TMDATA10</name>
|
|
<displayName>TMDATA10</displayName>
|
|
<description>Transmit mailbox data1 register</description>
|
|
<addressOffset>0x18C</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DB7</name>
|
|
<description>Data byte 7</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DB6</name>
|
|
<description>Data byte 6</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DB5</name>
|
|
<description>Data byte 5</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DB4</name>
|
|
<description>Data byte 4</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TMI1</name>
|
|
<displayName>TMI1</displayName>
|
|
<description>Transmit mailbox identifier register 1</description>
|
|
<addressOffset>0x190</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SFID_EFID</name>
|
|
<description>The frame identifier</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>11</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>EFID</name>
|
|
<description>The frame identifier</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>18</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FF</name>
|
|
<description>Frame format</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FT</name>
|
|
<description>Frame type</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TEN</name>
|
|
<description>Transmit enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TMP1</name>
|
|
<displayName>TMP1</displayName>
|
|
<description>Transmit mailbox property register 1</description>
|
|
<addressOffset>0x194</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TS</name>
|
|
<description>Time stamp</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TSEN</name>
|
|
<description>Time stamp enable</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DLENC</name>
|
|
<description>Data length code</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TMDATA01</name>
|
|
<displayName>TMDATA01</displayName>
|
|
<description>Transmit mailbox data0 register</description>
|
|
<addressOffset>0x198</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DB3</name>
|
|
<description>Data byte 3</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DB2</name>
|
|
<description>Data byte 2</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DB1</name>
|
|
<description>Data byte 1</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DB0</name>
|
|
<description>Data byte 0</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TMDATA11</name>
|
|
<displayName>TMDATA11</displayName>
|
|
<description>Transmit mailbox data1 register</description>
|
|
<addressOffset>0x19C</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DB7</name>
|
|
<description>Data byte 7</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DB6</name>
|
|
<description>Data byte 6</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DB5</name>
|
|
<description>Data byte 5</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DB4</name>
|
|
<description>Data byte 4</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TMI2</name>
|
|
<displayName>TMI2</displayName>
|
|
<description>Transmit mailbox identifier register 2</description>
|
|
<addressOffset>0x1A0</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SFID_EFID</name>
|
|
<description>The frame identifier</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>11</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>EFID</name>
|
|
<description>The frame identifier</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>18</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FF</name>
|
|
<description>Frame format</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FT</name>
|
|
<description>Frame type</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TEN</name>
|
|
<description>Transmit enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TMP2</name>
|
|
<displayName>TMP2</displayName>
|
|
<description>Transmit mailbox property register 2</description>
|
|
<addressOffset>0x1A4</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TS</name>
|
|
<description>Time stamp</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TSEN</name>
|
|
<description>Time stamp enable</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DLENC</name>
|
|
<description>Data length code</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TMDATA02</name>
|
|
<displayName>TMDATA02</displayName>
|
|
<description>Transmit mailbox data0 register</description>
|
|
<addressOffset>0x1A8</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DB3</name>
|
|
<description>Data byte 3</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DB2</name>
|
|
<description>Data byte 2</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DB1</name>
|
|
<description>Data byte 1</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DB0</name>
|
|
<description>Data byte 0</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TMDATA12</name>
|
|
<displayName>TMDATA12</displayName>
|
|
<description>Transmit mailbox data1 register</description>
|
|
<addressOffset>0x1AC</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DB7</name>
|
|
<description>Data byte 7</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DB6</name>
|
|
<description>Data byte 6</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DB5</name>
|
|
<description>Data byte 5</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DB4</name>
|
|
<description>Data byte 4</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RFIFOMI0</name>
|
|
<displayName>RFIFOMI0</displayName>
|
|
<description>Receive FIFO mailbox identifier register</description>
|
|
<addressOffset>0x1B0</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SFID_EFID</name>
|
|
<description>The frame identifier</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>11</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>EFID</name>
|
|
<description>The frame identifier</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>18</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FF</name>
|
|
<description>Frame format</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FT</name>
|
|
<description>Frame type</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RFIFOMP0</name>
|
|
<displayName>RFIFOMP0</displayName>
|
|
<description>Receive FIFO0 mailbox property register</description>
|
|
<addressOffset>0x1B4</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TS</name>
|
|
<description>Time stamp</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FI</name>
|
|
<description>Filtering index</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DLENC</name>
|
|
<description>Data length code</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RFIFOMDATA00</name>
|
|
<displayName>RFIFOMDATA00</displayName>
|
|
<description>Receive FIFO0 mailbox data0 register</description>
|
|
<addressOffset>0x1B8</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DB3</name>
|
|
<description>Data byte 3</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DB2</name>
|
|
<description>Data byte 2</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DB1</name>
|
|
<description>Data byte 1</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DB0</name>
|
|
<description>Data byte 0</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RFIFOMDATA10</name>
|
|
<displayName>RFIFOMDATA10</displayName>
|
|
<description>Receive FIFO0 mailbox data1 register</description>
|
|
<addressOffset>0x1BC</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DB7</name>
|
|
<description>Data byte 7</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DB6</name>
|
|
<description>Data byte 6</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DB5</name>
|
|
<description>Data byte 5</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DB4</name>
|
|
<description>Data byte 4</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RFIFOMI1</name>
|
|
<displayName>RFIFOMI1</displayName>
|
|
<description>Receive FIFO1 mailbox identifier register</description>
|
|
<addressOffset>0x1C0</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SFID_EFID</name>
|
|
<description>The frame identifier</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>11</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>EFID</name>
|
|
<description>The frame identifier</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>18</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FF</name>
|
|
<description>Frame format</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FT</name>
|
|
<description>Frame type</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RFIFOMP1</name>
|
|
<displayName>RFIFOMP1</displayName>
|
|
<description>Receive FIFO1 mailbox property register</description>
|
|
<addressOffset>0x1C4</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TS</name>
|
|
<description>Time stamp</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FI</name>
|
|
<description>Filtering index</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DLENC</name>
|
|
<description>Data length code</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RFIFOMDATA01</name>
|
|
<displayName>RFIFOMDATA01</displayName>
|
|
<description>Receive FIFO1 mailbox data0 register</description>
|
|
<addressOffset>0x1C8</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DB3</name>
|
|
<description>Data byte 3</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DB2</name>
|
|
<description>Data byte 2</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DB1</name>
|
|
<description>Data byte 1</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DB0</name>
|
|
<description>Data byte 0</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RFIFOMDATA11</name>
|
|
<displayName>RFIFOMDATA11</displayName>
|
|
<description>Receive FIFO1 mailbox data1 register</description>
|
|
<addressOffset>0x1CC</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DB7</name>
|
|
<description>Data byte 7</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DB6</name>
|
|
<description>Data byte 6</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DB5</name>
|
|
<description>Data byte 5</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DB4</name>
|
|
<description>Data byte 4</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FCTL</name>
|
|
<displayName>FCTL</displayName>
|
|
<description>Filter control register</description>
|
|
<addressOffset>0x200</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x2A1C0E01</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>HBC1F</name>
|
|
<description>Header bank of CAN1 filter</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>6</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FLD</name>
|
|
<description>Filter lock disable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FMCFG</name>
|
|
<displayName>FMCFG</displayName>
|
|
<description>Filter mode configuration register</description>
|
|
<addressOffset>0x204</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FMOD27</name>
|
|
<description>Filter mode</description>
|
|
<bitOffset>27</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FMOD26</name>
|
|
<description>Filter mode</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FMOD25</name>
|
|
<description>Filter mode</description>
|
|
<bitOffset>25</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FMOD24</name>
|
|
<description>Filter mode</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FMOD23</name>
|
|
<description>Filter mode</description>
|
|
<bitOffset>23</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FMOD22</name>
|
|
<description>Filter mode</description>
|
|
<bitOffset>22</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FMOD21</name>
|
|
<description>Filter mode</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FMOD20</name>
|
|
<description>Filter mode</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FMOD19</name>
|
|
<description>Filter mode</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FMOD18</name>
|
|
<description>Filter mode</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FMOD17</name>
|
|
<description>Filter mode</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FMOD16</name>
|
|
<description>Filter mode</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FMOD15</name>
|
|
<description>Filter mode</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FMOD14</name>
|
|
<description>Filter mode</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FMOD13</name>
|
|
<description>Filter mode</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FMOD12</name>
|
|
<description>Filter mode</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FMOD11</name>
|
|
<description>Filter mode</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FMOD10</name>
|
|
<description>Filter mode</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FMOD9</name>
|
|
<description>Filter mode</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FMOD8</name>
|
|
<description>Filter mode</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FMOD7</name>
|
|
<description>Filter mode</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FMOD6</name>
|
|
<description>Filter mode</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FMOD5</name>
|
|
<description>Filter mode</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FMOD4</name>
|
|
<description>Filter mode</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FMOD3</name>
|
|
<description>Filter mode</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FMOD2</name>
|
|
<description>Filter mode</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FMOD1</name>
|
|
<description>Filter mode</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FMOD0</name>
|
|
<description>Filter mode</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FSCFG</name>
|
|
<displayName>FSCFG</displayName>
|
|
<description>Filter scale configuration register</description>
|
|
<addressOffset>0x20C</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FS0</name>
|
|
<description>Filter scale configuration</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FS1</name>
|
|
<description>Filter scale configuration</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FS2</name>
|
|
<description>Filter scale configuration</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FS3</name>
|
|
<description>Filter scale configuration</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FS4</name>
|
|
<description>Filter scale configuration</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FS5</name>
|
|
<description>Filter scale configuration</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FS6</name>
|
|
<description>Filter scale configuration</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FS7</name>
|
|
<description>Filter scale configuration</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FS8</name>
|
|
<description>Filter scale configuration</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FS9</name>
|
|
<description>Filter scale configuration</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FS10</name>
|
|
<description>Filter scale configuration</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FS11</name>
|
|
<description>Filter scale configuration</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FS12</name>
|
|
<description>Filter scale configuration</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FS13</name>
|
|
<description>Filter scale configuration</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FS14</name>
|
|
<description>Filter scale configuration</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FS15</name>
|
|
<description>Filter scale configuration</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FS16</name>
|
|
<description>Filter scale configuration</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FS17</name>
|
|
<description>Filter scale configuration</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FS18</name>
|
|
<description>Filter scale configuration</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FS19</name>
|
|
<description>Filter scale configuration</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FS20</name>
|
|
<description>Filter scale configuration</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FS21</name>
|
|
<description>Filter scale configuration</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FS22</name>
|
|
<description>Filter scale configuration</description>
|
|
<bitOffset>22</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FS23</name>
|
|
<description>Filter scale configuration</description>
|
|
<bitOffset>23</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FS24</name>
|
|
<description>Filter scale configuration</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FS25</name>
|
|
<description>Filter scale configuration</description>
|
|
<bitOffset>25</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FS26</name>
|
|
<description>Filter scale configuration</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FS27</name>
|
|
<description>Filter scale configuration</description>
|
|
<bitOffset>27</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FAFIFO</name>
|
|
<displayName>FAFIFO</displayName>
|
|
<description>Filter associated FIFO register</description>
|
|
<addressOffset>0x214</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FAF0</name>
|
|
<description>Filter 0 associated with FIFO</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FAF1</name>
|
|
<description>Filter 1 associated with FIFO</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FAF2</name>
|
|
<description>Filter 2 associated with FIFO</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FAF3</name>
|
|
<description>Filter 3 associated with FIFO</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FAF4</name>
|
|
<description>Filter 4 associated with FIFO</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FAF5</name>
|
|
<description>Filter 5 associated with FIFO</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FAF6</name>
|
|
<description>Filter 6 associated with FIFO</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FAF7</name>
|
|
<description>Filter 7 associated with FIFO</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FAF8</name>
|
|
<description>Filter 8 associated with FIFO</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FAF9</name>
|
|
<description>Filter 9 associated with FIFO</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FAF10</name>
|
|
<description>Filter 10 associated with FIFO</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FAF11</name>
|
|
<description>Filter 11 associated with FIFO</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FAF12</name>
|
|
<description>Filter 12 associated with FIFO</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FAF13</name>
|
|
<description>Filter 13 associated with FIFO</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FAF14</name>
|
|
<description>Filter 14 associated with FIFO</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FAF15</name>
|
|
<description>Filter 15 associated with FIFO</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FAF16</name>
|
|
<description>Filter 16 associated with FIFO</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FAF17</name>
|
|
<description>Filter 17 associated with FIFO</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FAF18</name>
|
|
<description>Filter 18 associated with FIFO</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FAF19</name>
|
|
<description>Filter 19 associated with FIFO</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FAF20</name>
|
|
<description>Filter 20 associated with FIFO</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FAF21</name>
|
|
<description>Filter 21 associated with FIFO</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FAF22</name>
|
|
<description>Filter 22 associated with FIFO</description>
|
|
<bitOffset>22</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FAF23</name>
|
|
<description>Filter 23 associated with FIFO</description>
|
|
<bitOffset>23</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FAF24</name>
|
|
<description>Filter 24 associated with FIFO</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FAF25</name>
|
|
<description>Filter 25 associated with FIFO</description>
|
|
<bitOffset>25</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FAF26</name>
|
|
<description>Filter 26 associated with FIFO</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FAF27</name>
|
|
<description>Filter 27 associated with FIFO</description>
|
|
<bitOffset>27</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FW</name>
|
|
<displayName>FW</displayName>
|
|
<description>Filter working register</description>
|
|
<addressOffset>0x21C</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FW0</name>
|
|
<description>Filter working</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FW1</name>
|
|
<description>Filter working</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FW2</name>
|
|
<description>Filter working</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FW3</name>
|
|
<description>Filter working</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FW4</name>
|
|
<description>Filter working</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FW5</name>
|
|
<description>Filter working</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FW6</name>
|
|
<description>Filter working</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FW7</name>
|
|
<description>Filter working</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FW8</name>
|
|
<description>Filter working</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FW9</name>
|
|
<description>Filter working</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FW10</name>
|
|
<description>Filter working</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FW11</name>
|
|
<description>Filter working</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FW12</name>
|
|
<description>Filter working</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FW13</name>
|
|
<description>Filter working</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FW14</name>
|
|
<description>Filter working</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FW15</name>
|
|
<description>Filter working</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FW16</name>
|
|
<description>Filter working</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FW17</name>
|
|
<description>Filter working</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FW18</name>
|
|
<description>Filter working</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FW19</name>
|
|
<description>Filter working</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FW20</name>
|
|
<description>Filter working</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FW21</name>
|
|
<description>Filter working</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FW22</name>
|
|
<description>Filter working</description>
|
|
<bitOffset>22</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FW23</name>
|
|
<description>Filter working</description>
|
|
<bitOffset>23</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FW24</name>
|
|
<description>Filter working</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FW25</name>
|
|
<description>Filter working</description>
|
|
<bitOffset>25</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FW26</name>
|
|
<description>Filter working</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FW27</name>
|
|
<description>Filter working</description>
|
|
<bitOffset>27</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>F0DATA0</name>
|
|
<displayName>F0DATA0</displayName>
|
|
<description>Filter 0 data 0 register</description>
|
|
<addressOffset>0x240</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FD0</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD1</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD2</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD3</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD4</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD5</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD6</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD7</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD8</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD9</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD10</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD11</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD12</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD13</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD14</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD15</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD16</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD17</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD18</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD19</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD20</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD21</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD22</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>22</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD23</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>23</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD24</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD25</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>25</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD26</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD27</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>27</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD28</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD29</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD30</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>30</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD31</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>31</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>F0DATA1</name>
|
|
<displayName>F0DATA1</displayName>
|
|
<description>Filter 0 data 1 register</description>
|
|
<addressOffset>0x244</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FD0</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD1</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD2</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD3</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD4</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD5</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD6</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD7</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD8</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD9</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD10</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD11</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD12</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD13</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD14</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD15</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD16</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD17</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD18</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD19</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD20</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD21</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD22</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>22</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD23</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>23</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD24</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD25</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>25</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD26</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD27</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>27</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD28</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD29</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD30</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>30</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD31</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>31</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>F1DATA0</name>
|
|
<displayName>F1DATA0</displayName>
|
|
<description>Filter 1 data 0 register</description>
|
|
<addressOffset>0x248</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FD0</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD1</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD2</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD3</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD4</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD5</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD6</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD7</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD8</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD9</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD10</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD11</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD12</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD13</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD14</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD15</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD16</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD17</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD18</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD19</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD20</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD21</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD22</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>22</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD23</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>23</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD24</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD25</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>25</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD26</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD27</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>27</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD28</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD29</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD30</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>30</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD31</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>31</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>F1DATA1</name>
|
|
<displayName>F1DATA1</displayName>
|
|
<description>Filter 1 data 1 register</description>
|
|
<addressOffset>0x24C</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FD0</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD1</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD2</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD3</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD4</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD5</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD6</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD7</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD8</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD9</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD10</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD11</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD12</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD13</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD14</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD15</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD16</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD17</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD18</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD19</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD20</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD21</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD22</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>22</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD23</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>23</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD24</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD25</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>25</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD26</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD27</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>27</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD28</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD29</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD30</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>30</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD31</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>31</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>F2DATA0</name>
|
|
<displayName>F2DATA0</displayName>
|
|
<description>Filter 2 data 0 register</description>
|
|
<addressOffset>0x250</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FD0</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD1</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD2</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD3</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD4</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD5</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD6</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD7</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD8</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD9</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD10</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD11</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD12</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD13</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD14</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD15</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD16</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD17</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD18</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD19</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD20</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD21</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD22</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>22</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD23</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>23</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD24</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD25</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>25</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD26</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD27</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>27</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD28</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD29</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD30</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>30</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD31</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>31</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>F2DATA1</name>
|
|
<displayName>F2DATA1</displayName>
|
|
<description>Filter 2 data 1 register</description>
|
|
<addressOffset>0x254</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FD0</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD1</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD2</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD3</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD4</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD5</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD6</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD7</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD8</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD9</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD10</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD11</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD12</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD13</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD14</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD15</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD16</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD17</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD18</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD19</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD20</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD21</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD22</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>22</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD23</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>23</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD24</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD25</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>25</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD26</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD27</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>27</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD28</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD29</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD30</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>30</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD31</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>31</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>F3DATA0</name>
|
|
<displayName>F3DATA0</displayName>
|
|
<description>Filter 3 data 0 register</description>
|
|
<addressOffset>0x258</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FD0</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD1</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD2</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD3</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD4</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD5</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD6</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD7</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD8</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD9</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD10</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD11</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD12</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD13</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD14</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD15</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD16</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD17</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD18</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD19</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD20</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD21</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD22</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>22</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD23</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>23</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD24</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD25</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>25</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD26</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD27</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>27</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD28</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD29</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD30</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>30</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD31</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>31</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>F3DATA1</name>
|
|
<displayName>F3DATA1</displayName>
|
|
<description>Filter 3 data 1 register</description>
|
|
<addressOffset>0x25C</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FD0</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD1</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD2</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD3</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD4</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD5</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD6</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD7</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD8</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD9</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD10</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD11</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD12</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD13</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD14</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD15</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD16</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD17</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD18</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD19</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD20</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD21</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD22</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>22</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD23</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>23</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD24</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD25</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>25</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD26</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD27</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>27</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD28</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD29</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD30</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>30</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD31</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>31</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>F4DATA0</name>
|
|
<displayName>F4DATA0</displayName>
|
|
<description>Filter 4 data 0 register</description>
|
|
<addressOffset>0x260</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FD0</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD1</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD2</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD3</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD4</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD5</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD6</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD7</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD8</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD9</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD10</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD11</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD12</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD13</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD14</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD15</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD16</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD17</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD18</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD19</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD20</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD21</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD22</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>22</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD23</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>23</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD24</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD25</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>25</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD26</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD27</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>27</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD28</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD29</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD30</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>30</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD31</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>31</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>F4DATA1</name>
|
|
<displayName>F4DATA1</displayName>
|
|
<description>Filter 4 data 1 register</description>
|
|
<addressOffset>0x264</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FD0</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD1</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD2</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD3</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD4</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD5</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD6</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD7</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD8</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD9</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD10</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD11</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD12</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD13</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD14</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD15</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD16</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD17</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD18</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD19</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD20</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD21</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD22</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>22</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD23</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>23</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD24</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD25</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>25</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD26</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD27</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>27</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD28</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD29</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD30</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>30</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD31</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>31</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>F5DATA0</name>
|
|
<displayName>F5DATA0</displayName>
|
|
<description>Filter 5 data 0 register</description>
|
|
<addressOffset>0x268</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FD0</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD1</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD2</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD3</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD4</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD5</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD6</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD7</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD8</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD9</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD10</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD11</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD12</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD13</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD14</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD15</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD16</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD17</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD18</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD19</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD20</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD21</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD22</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>22</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD23</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>23</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD24</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD25</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>25</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD26</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD27</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>27</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD28</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD29</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD30</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>30</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD31</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>31</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>F5DATA1</name>
|
|
<displayName>F5DATA1</displayName>
|
|
<description>Filter 5 data 1 register</description>
|
|
<addressOffset>0x26C</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FD0</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD1</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD2</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD3</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD4</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD5</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD6</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD7</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD8</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD9</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD10</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD11</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD12</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD13</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD14</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD15</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD16</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD17</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD18</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD19</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD20</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD21</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD22</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>22</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD23</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>23</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD24</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD25</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>25</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD26</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD27</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>27</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD28</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD29</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD30</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>30</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD31</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>31</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>F6DATA0</name>
|
|
<displayName>F6DATA0</displayName>
|
|
<description>Filter 6 data 0 register</description>
|
|
<addressOffset>0x270</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FD0</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD1</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD2</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD3</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD4</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD5</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD6</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD7</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD8</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD9</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD10</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD11</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD12</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD13</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD14</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD15</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD16</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD17</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD18</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD19</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD20</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD21</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD22</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>22</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD23</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>23</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD24</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD25</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>25</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD26</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD27</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>27</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD28</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD29</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD30</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>30</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD31</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>31</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>F6DATA1</name>
|
|
<displayName>F6DATA1</displayName>
|
|
<description>Filter 6 data 1 register</description>
|
|
<addressOffset>0x274</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FD0</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD1</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD2</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD3</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD4</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD5</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD6</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD7</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD8</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD9</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD10</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD11</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD12</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD13</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD14</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD15</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD16</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD17</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD18</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD19</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD20</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD21</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD22</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>22</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD23</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>23</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD24</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD25</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>25</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD26</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD27</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>27</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD28</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD29</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD30</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>30</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD31</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>31</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>F7DATA0</name>
|
|
<displayName>F7DATA0</displayName>
|
|
<description>Filter 7 data 0 register</description>
|
|
<addressOffset>0x278</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FD0</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD1</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD2</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD3</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD4</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD5</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD6</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD7</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD8</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD9</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD10</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD11</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD12</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD13</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD14</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD15</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD16</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD17</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD18</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD19</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD20</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD21</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD22</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>22</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD23</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>23</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD24</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD25</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>25</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD26</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD27</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>27</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD28</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD29</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD30</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>30</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD31</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>31</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>F7DATA1</name>
|
|
<displayName>F7DATA1</displayName>
|
|
<description>Filter 7 data 1 register</description>
|
|
<addressOffset>0x27C</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FD0</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD1</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD2</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD3</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD4</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD5</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD6</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD7</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD8</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD9</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD10</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD11</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD12</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD13</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD14</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD15</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD16</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD17</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD18</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD19</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD20</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD21</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD22</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>22</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD23</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>23</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD24</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD25</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>25</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD26</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD27</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>27</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD28</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD29</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD30</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>30</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD31</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>31</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>F8DATA0</name>
|
|
<displayName>F8DATA0</displayName>
|
|
<description>Filter 8 data 0 register</description>
|
|
<addressOffset>0x280</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FD0</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD1</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD2</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD3</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD4</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD5</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD6</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD7</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD8</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD9</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD10</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD11</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD12</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD13</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD14</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD15</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD16</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD17</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD18</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD19</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD20</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD21</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD22</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>22</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD23</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>23</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD24</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD25</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>25</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD26</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD27</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>27</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD28</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD29</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD30</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>30</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD31</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>31</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>F8DATA1</name>
|
|
<displayName>F8DATA1</displayName>
|
|
<description>Filter 8 data 1 register</description>
|
|
<addressOffset>0x284</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FD0</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD1</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD2</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD3</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD4</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD5</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD6</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD7</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD8</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD9</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD10</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD11</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD12</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD13</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD14</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD15</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD16</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD17</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD18</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD19</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD20</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD21</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD22</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>22</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD23</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>23</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD24</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD25</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>25</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD26</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD27</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>27</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD28</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD29</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD30</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>30</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD31</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>31</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>F9DATA0</name>
|
|
<displayName>F9DATA0</displayName>
|
|
<description>Filter 9 data 0 register</description>
|
|
<addressOffset>0x288</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FD0</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD1</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD2</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD3</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD4</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD5</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD6</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD7</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD8</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD9</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD10</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD11</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD12</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD13</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD14</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD15</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD16</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD17</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD18</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD19</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD20</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD21</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD22</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>22</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD23</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>23</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD24</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD25</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>25</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD26</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD27</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>27</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD28</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD29</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD30</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>30</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD31</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>31</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>F9DATA1</name>
|
|
<displayName>F9DATA1</displayName>
|
|
<description>Filter 9 data 1 register</description>
|
|
<addressOffset>0x28C</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FD0</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD1</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD2</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD3</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD4</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD5</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD6</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD7</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD8</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD9</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD10</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD11</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD12</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD13</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD14</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD15</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD16</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD17</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD18</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD19</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD20</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD21</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD22</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>22</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD23</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>23</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD24</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD25</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>25</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD26</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD27</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>27</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD28</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD29</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD30</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>30</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD31</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>31</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>F10DATA0</name>
|
|
<displayName>F10DATA0</displayName>
|
|
<description>Filter 10 data 0 register</description>
|
|
<addressOffset>0x290</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FD0</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD1</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD2</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD3</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD4</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD5</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD6</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD7</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD8</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD9</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD10</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD11</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD12</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD13</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD14</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD15</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD16</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD17</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD18</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD19</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD20</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD21</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD22</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>22</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD23</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>23</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD24</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD25</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>25</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD26</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD27</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>27</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD28</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD29</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD30</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>30</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD31</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>31</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>F10DATA1</name>
|
|
<displayName>F10DATA1</displayName>
|
|
<description>Filter 10 data 1 register</description>
|
|
<addressOffset>0x294</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FD0</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD1</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD2</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD3</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD4</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD5</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD6</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD7</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD8</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD9</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD10</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD11</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD12</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD13</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD14</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD15</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD16</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD17</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD18</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD19</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD20</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD21</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD22</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>22</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD23</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>23</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD24</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD25</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>25</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD26</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD27</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>27</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD28</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD29</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD30</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>30</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD31</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>31</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>F11DATA0</name>
|
|
<displayName>F11DATA0</displayName>
|
|
<description>Filter 11 data 0 register</description>
|
|
<addressOffset>0x298</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FD0</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD1</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD2</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD3</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD4</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD5</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD6</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD7</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD8</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD9</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD10</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD11</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD12</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD13</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD14</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD15</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD16</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD17</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD18</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD19</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD20</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD21</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD22</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>22</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD23</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>23</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD24</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD25</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>25</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD26</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD27</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>27</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD28</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD29</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD30</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>30</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD31</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>31</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>F11DATA1</name>
|
|
<displayName>F11DATA1</displayName>
|
|
<description>Filter 11 data 1 register</description>
|
|
<addressOffset>0x29C</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FD0</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD1</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD2</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD3</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD4</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD5</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD6</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD7</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD8</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD9</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD10</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD11</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD12</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD13</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD14</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD15</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD16</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD17</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD18</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD19</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD20</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD21</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD22</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>22</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD23</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>23</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD24</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD25</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>25</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD26</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD27</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>27</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD28</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD29</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD30</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>30</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD31</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>31</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>F12DATA0</name>
|
|
<displayName>F12DATA0</displayName>
|
|
<description>Filter 12 data 0 register</description>
|
|
<addressOffset>0x2A0</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FD0</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD1</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD2</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD3</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD4</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD5</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD6</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD7</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD8</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD9</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD10</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD11</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD12</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD13</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD14</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD15</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD16</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD17</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD18</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD19</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD20</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD21</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD22</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>22</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD23</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>23</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD24</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD25</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>25</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD26</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD27</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>27</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD28</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD29</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD30</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>30</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD31</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>31</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>F12DATA1</name>
|
|
<displayName>F12DATA1</displayName>
|
|
<description>Filter 12 data 1 register</description>
|
|
<addressOffset>0x2A4</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FD0</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD1</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD2</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD3</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD4</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD5</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD6</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD7</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD8</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD9</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD10</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD11</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD12</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD13</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD14</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD15</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD16</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD17</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD18</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD19</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD20</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD21</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD22</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>22</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD23</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>23</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD24</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD25</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>25</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD26</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD27</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>27</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD28</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD29</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD30</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>30</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD31</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>31</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>F13DATA0</name>
|
|
<displayName>F13DATA0</displayName>
|
|
<description>Filter 13 data 0 register</description>
|
|
<addressOffset>0x2A8</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FD0</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD1</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD2</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD3</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD4</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD5</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD6</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD7</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD8</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD9</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD10</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD11</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD12</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD13</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD14</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD15</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD16</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD17</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD18</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD19</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD20</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD21</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD22</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>22</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD23</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>23</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD24</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD25</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>25</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD26</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD27</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>27</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD28</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD29</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD30</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>30</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD31</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>31</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>F13DATA1</name>
|
|
<displayName>F13DATA1</displayName>
|
|
<description>Filter 13 data 1 register</description>
|
|
<addressOffset>0x2AC</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FD0</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD1</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD2</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD3</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD4</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD5</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD6</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD7</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD8</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD9</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD10</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD11</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD12</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD13</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD14</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD15</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD16</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD17</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD18</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD19</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD20</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD21</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD22</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>22</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD23</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>23</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD24</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD25</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>25</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD26</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD27</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>27</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD28</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD29</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD30</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>30</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD31</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>31</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>F14DATA0</name>
|
|
<displayName>F14DATA0</displayName>
|
|
<description>Filter 14 data 0 register</description>
|
|
<addressOffset>0x2B0</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FD0</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD1</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD2</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD3</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD4</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD5</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD6</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD7</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD8</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD9</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD10</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD11</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD12</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD13</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD14</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD15</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD16</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD17</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD18</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD19</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD20</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD21</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD22</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>22</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD23</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>23</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD24</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD25</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>25</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD26</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD27</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>27</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD28</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD29</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD30</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>30</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD31</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>31</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>F14DATA1</name>
|
|
<displayName>F14DATA1</displayName>
|
|
<description>Filter 14 data 1 register</description>
|
|
<addressOffset>0x2B4</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FD0</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD1</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD2</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD3</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD4</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD5</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD6</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD7</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD8</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD9</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD10</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD11</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD12</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD13</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD14</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD15</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD16</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD17</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD18</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD19</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD20</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD21</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD22</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>22</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD23</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>23</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD24</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD25</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>25</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD26</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD27</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>27</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD28</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD29</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD30</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>30</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD31</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>31</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>F15DATA0</name>
|
|
<displayName>F15DATA0</displayName>
|
|
<description>Filter 15 data 0 register</description>
|
|
<addressOffset>0x2B8</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FD0</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD1</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD2</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD3</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD4</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD5</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD6</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD7</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD8</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD9</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD10</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD11</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD12</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD13</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD14</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD15</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD16</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD17</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD18</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD19</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD20</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD21</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD22</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>22</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD23</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>23</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD24</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD25</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>25</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD26</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD27</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>27</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD28</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD29</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD30</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>30</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD31</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>31</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>F15DATA1</name>
|
|
<displayName>F15DATA1</displayName>
|
|
<description>Filter 15 data 1 register</description>
|
|
<addressOffset>0x2BC</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FD0</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD1</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD2</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD3</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD4</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD5</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD6</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD7</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD8</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD9</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD10</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD11</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD12</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD13</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD14</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD15</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD16</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD17</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD18</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD19</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD20</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD21</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD22</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>22</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD23</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>23</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD24</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD25</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>25</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD26</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD27</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>27</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD28</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD29</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD30</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>30</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD31</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>31</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>F16DATA0</name>
|
|
<displayName>F16DATA0</displayName>
|
|
<description>Filter 16 data 0 register</description>
|
|
<addressOffset>0x2C0</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FD0</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD1</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD2</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD3</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD4</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD5</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD6</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD7</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD8</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD9</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD10</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD11</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD12</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD13</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD14</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD15</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD16</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD17</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD18</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD19</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD20</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD21</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD22</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>22</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD23</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>23</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD24</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD25</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>25</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD26</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD27</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>27</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD28</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD29</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD30</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>30</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD31</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>31</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>F16DATA1</name>
|
|
<displayName>F16DATA1</displayName>
|
|
<description>Filter 16 data 1 register</description>
|
|
<addressOffset>0x2C4</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FD0</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD1</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD2</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD3</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD4</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD5</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD6</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD7</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD8</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD9</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD10</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD11</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD12</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD13</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD14</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD15</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD16</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD17</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD18</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD19</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD20</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD21</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD22</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>22</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD23</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>23</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD24</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD25</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>25</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD26</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD27</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>27</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD28</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD29</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD30</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>30</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD31</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>31</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>F17DATA0</name>
|
|
<displayName>F17DATA0</displayName>
|
|
<description>Filter 17 data 0 register</description>
|
|
<addressOffset>0x2C8</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FD0</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD1</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD2</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD3</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD4</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD5</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD6</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD7</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD8</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD9</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD10</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD11</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD12</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD13</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD14</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD15</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD16</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD17</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD18</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD19</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD20</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD21</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD22</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>22</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD23</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>23</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD24</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD25</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>25</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD26</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD27</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>27</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD28</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD29</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD30</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>30</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD31</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>31</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>F17DATA1</name>
|
|
<displayName>F17DATA1</displayName>
|
|
<description>Filter 17 data 1 register</description>
|
|
<addressOffset>0x2CC</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FD0</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD1</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD2</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD3</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD4</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD5</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD6</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD7</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD8</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD9</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD10</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD11</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD12</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD13</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD14</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD15</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD16</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD17</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD18</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD19</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD20</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD21</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD22</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>22</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD23</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>23</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD24</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD25</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>25</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD26</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD27</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>27</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD28</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD29</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD30</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>30</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD31</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>31</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>F18DATA0</name>
|
|
<displayName>F18DATA0</displayName>
|
|
<description>Filter 18 data 0 register</description>
|
|
<addressOffset>0x2D0</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FD0</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD1</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD2</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD3</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD4</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD5</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD6</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD7</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD8</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD9</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD10</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD11</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD12</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD13</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD14</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD15</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD16</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD17</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD18</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD19</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD20</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD21</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD22</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>22</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD23</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>23</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD24</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD25</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>25</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD26</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD27</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>27</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD28</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD29</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD30</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>30</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD31</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>31</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>F18DATA1</name>
|
|
<displayName>F18DATA1</displayName>
|
|
<description>Filter 18 data 1 register</description>
|
|
<addressOffset>0x2D4</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FD0</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD1</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD2</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD3</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD4</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD5</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD6</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD7</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD8</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD9</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD10</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD11</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD12</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD13</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD14</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD15</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD16</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD17</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD18</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD19</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD20</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD21</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD22</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>22</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD23</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>23</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD24</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD25</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>25</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD26</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD27</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>27</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD28</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD29</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD30</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>30</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD31</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>31</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>F19DATA0</name>
|
|
<displayName>F19DATA0</displayName>
|
|
<description>Filter 19 data 0 register</description>
|
|
<addressOffset>0x2D8</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FD0</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD1</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD2</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD3</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD4</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD5</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD6</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD7</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD8</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD9</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD10</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD11</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD12</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD13</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD14</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD15</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD16</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD17</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD18</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD19</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD20</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD21</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD22</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>22</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD23</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>23</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD24</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD25</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>25</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD26</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD27</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>27</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD28</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD29</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD30</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>30</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD31</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>31</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>F19DATA1</name>
|
|
<displayName>F19DATA1</displayName>
|
|
<description>Filter 19 data 1 register</description>
|
|
<addressOffset>0x2DC</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FD0</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD1</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD2</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD3</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD4</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD5</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD6</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD7</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD8</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD9</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD10</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD11</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD12</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD13</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD14</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD15</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD16</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD17</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD18</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD19</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD20</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD21</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD22</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>22</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD23</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>23</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD24</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD25</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>25</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD26</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD27</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>27</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD28</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD29</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD30</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>30</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD31</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>31</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>F20DATA0</name>
|
|
<displayName>F20DATA0</displayName>
|
|
<description>Filter 20 data 0 register</description>
|
|
<addressOffset>0x2E0</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FD0</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD1</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD2</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD3</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD4</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD5</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD6</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD7</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD8</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD9</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD10</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD11</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD12</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD13</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD14</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD15</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD16</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD17</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD18</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD19</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD20</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD21</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD22</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>22</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD23</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>23</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD24</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD25</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>25</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD26</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD27</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>27</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD28</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD29</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD30</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>30</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD31</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>31</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>F20DATA1</name>
|
|
<displayName>F20DATA1</displayName>
|
|
<description>Filter 20 data 1 register</description>
|
|
<addressOffset>0x2E4</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FD0</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD1</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD2</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD3</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD4</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD5</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD6</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD7</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD8</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD9</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD10</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD11</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD12</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD13</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD14</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD15</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD16</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD17</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD18</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD19</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD20</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD21</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD22</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>22</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD23</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>23</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD24</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD25</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>25</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD26</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD27</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>27</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD28</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD29</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD30</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>30</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD31</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>31</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>F21DATA0</name>
|
|
<displayName>F21DATA0</displayName>
|
|
<description>Filter 21 data 0 register</description>
|
|
<addressOffset>0x2E8</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FD0</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD1</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD2</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD3</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD4</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD5</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD6</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD7</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD8</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD9</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD10</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD11</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD12</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD13</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD14</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD15</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD16</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD17</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD18</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD19</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD20</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD21</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD22</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>22</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD23</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>23</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD24</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD25</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>25</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD26</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD27</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>27</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD28</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD29</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD30</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>30</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD31</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>31</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>F21DATA1</name>
|
|
<displayName>F21DATA1</displayName>
|
|
<description>Filter 21 data 1 register</description>
|
|
<addressOffset>0x2EC</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FD0</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD1</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD2</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD3</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD4</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD5</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD6</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD7</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD8</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD9</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD10</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD11</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD12</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD13</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD14</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD15</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD16</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD17</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD18</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD19</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD20</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD21</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD22</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>22</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD23</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>23</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD24</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD25</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>25</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD26</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD27</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>27</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD28</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD29</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD30</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>30</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD31</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>31</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>F22DATA0</name>
|
|
<displayName>F22DATA0</displayName>
|
|
<description>Filter 22 data 0 register</description>
|
|
<addressOffset>0x2F0</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FD0</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD1</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD2</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD3</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD4</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD5</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD6</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD7</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD8</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD9</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD10</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD11</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD12</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD13</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD14</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD15</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD16</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD17</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD18</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD19</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD20</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD21</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD22</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>22</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD23</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>23</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD24</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD25</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>25</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD26</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD27</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>27</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD28</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD29</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD30</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>30</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD31</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>31</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>F22DATA1</name>
|
|
<displayName>F22DATA1</displayName>
|
|
<description>Filter 22 data 1 register</description>
|
|
<addressOffset>0x2F4</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FD0</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD1</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD2</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD3</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD4</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD5</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD6</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD7</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD8</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD9</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD10</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD11</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD12</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD13</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD14</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD15</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD16</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD17</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD18</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD19</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD20</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD21</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD22</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>22</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD23</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>23</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD24</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD25</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>25</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD26</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD27</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>27</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD28</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD29</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD30</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>30</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD31</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>31</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>F23DATA0</name>
|
|
<displayName>F23DATA0</displayName>
|
|
<description>Filter 23 data 0 register</description>
|
|
<addressOffset>0x2F8</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FD0</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD1</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD2</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD3</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD4</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD5</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD6</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD7</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD8</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD9</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD10</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD11</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD12</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD13</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD14</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD15</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD16</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD17</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD18</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD19</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD20</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD21</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD22</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>22</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD23</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>23</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD24</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD25</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>25</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD26</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD27</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>27</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD28</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD29</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD30</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>30</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD31</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>31</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>F23DATA1</name>
|
|
<displayName>F23DATA1</displayName>
|
|
<description>Filter 23 data 1 register</description>
|
|
<addressOffset>0x2FC</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FD0</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD1</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD2</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD3</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD4</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD5</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD6</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD7</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD8</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD9</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD10</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD11</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD12</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD13</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD14</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD15</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD16</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD17</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD18</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD19</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD20</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD21</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD22</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>22</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD23</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>23</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD24</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD25</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>25</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD26</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD27</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>27</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD28</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD29</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD30</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>30</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD31</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>31</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>F24DATA0</name>
|
|
<displayName>F24DATA0</displayName>
|
|
<description>Filter 24 data 0 register</description>
|
|
<addressOffset>0x300</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FD0</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD1</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD2</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD3</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD4</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD5</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD6</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD7</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD8</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD9</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD10</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD11</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD12</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD13</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD14</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD15</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD16</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD17</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD18</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD19</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD20</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD21</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD22</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>22</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD23</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>23</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD24</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD25</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>25</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD26</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD27</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>27</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD28</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD29</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD30</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>30</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD31</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>31</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>F24DATA1</name>
|
|
<displayName>F24DATA1</displayName>
|
|
<description>Filter 24 data 1 register</description>
|
|
<addressOffset>0x304</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FD0</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD1</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD2</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD3</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD4</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD5</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD6</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD7</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD8</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD9</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD10</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD11</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD12</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD13</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD14</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD15</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD16</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD17</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD18</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD19</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD20</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD21</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD22</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>22</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD23</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>23</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD24</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD25</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>25</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD26</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD27</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>27</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD28</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD29</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD30</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>30</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD31</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>31</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>F25DATA0</name>
|
|
<displayName>F25DATA0</displayName>
|
|
<description>Filter 25 data 0 register</description>
|
|
<addressOffset>0x308</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FD0</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD1</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD2</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD3</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD4</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD5</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD6</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD7</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD8</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD9</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD10</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD11</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD12</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD13</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD14</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD15</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD16</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD17</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD18</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD19</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD20</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD21</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD22</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>22</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD23</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>23</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD24</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD25</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>25</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD26</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD27</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>27</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD28</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD29</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD30</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>30</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD31</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>31</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>F25DATA1</name>
|
|
<displayName>F25DATA1</displayName>
|
|
<description>Filter 25 data 1 register</description>
|
|
<addressOffset>0x30C</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FD0</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD1</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD2</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD3</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD4</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD5</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD6</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD7</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD8</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD9</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD10</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD11</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD12</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD13</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD14</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD15</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD16</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD17</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD18</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD19</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD20</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD21</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD22</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>22</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD23</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>23</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD24</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD25</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>25</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD26</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD27</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>27</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD28</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD29</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD30</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>30</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD31</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>31</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>F26DATA0</name>
|
|
<displayName>F26DATA0</displayName>
|
|
<description>Filter 26 data 0 register</description>
|
|
<addressOffset>0x310</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FD0</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD1</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD2</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD3</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD4</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD5</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD6</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD7</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD8</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD9</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD10</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD11</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD12</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD13</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD14</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD15</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD16</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD17</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD18</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD19</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD20</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD21</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD22</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>22</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD23</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>23</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD24</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD25</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>25</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD26</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD27</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>27</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD28</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD29</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD30</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>30</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD31</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>31</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>F26DATA1</name>
|
|
<displayName>F26DATA1</displayName>
|
|
<description>Filter 26 data 1 register</description>
|
|
<addressOffset>0x314</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FD0</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD1</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD2</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD3</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD4</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD5</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD6</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD7</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD8</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD9</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD10</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD11</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD12</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD13</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD14</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD15</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD16</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD17</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD18</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD19</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD20</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD21</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD22</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>22</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD23</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>23</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD24</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD25</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>25</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD26</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD27</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>27</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD28</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD29</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD30</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>30</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD31</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>31</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>F27DATA0</name>
|
|
<displayName>F27DATA0</displayName>
|
|
<description>Filter 27 data 0 register</description>
|
|
<addressOffset>0x318</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FD0</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD1</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD2</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD3</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD4</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD5</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD6</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD7</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD8</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD9</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD10</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD11</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD12</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD13</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD14</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD15</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD16</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD17</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD18</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD19</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD20</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD21</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD22</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>22</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD23</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>23</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD24</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD25</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>25</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD26</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD27</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>27</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD28</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD29</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD30</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>30</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD31</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>31</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>F27DATA1</name>
|
|
<displayName>F27DATA1</displayName>
|
|
<description>Filter 27 data 1 register</description>
|
|
<addressOffset>0x31C</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FD0</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD1</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD2</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD3</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD4</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD5</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD6</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD7</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD8</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD9</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD10</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD11</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD12</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD13</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD14</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD15</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD16</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD17</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD18</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD19</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD20</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD21</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD22</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>22</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD23</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>23</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD24</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD25</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>25</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD26</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD27</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>27</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD28</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD29</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD30</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>30</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FD31</name>
|
|
<description>Filter bits</description>
|
|
<bitOffset>31</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral>
|
|
<peripheral derivedFrom="CAN0">
|
|
<name>CAN1</name>
|
|
<baseAddress>0x40006800</baseAddress>
|
|
<interrupt>
|
|
<name>CAN1_TX</name>
|
|
<value>82</value>
|
|
</interrupt>
|
|
<interrupt>
|
|
<name>CAN1_RX0</name>
|
|
<value>83</value>
|
|
</interrupt>
|
|
<interrupt>
|
|
<name>CAN1_RX1</name>
|
|
<value>84</value>
|
|
</interrupt>
|
|
<interrupt>
|
|
<name>CAN1_EWMC</name>
|
|
<value>85</value>
|
|
</interrupt>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>CRC</name>
|
|
<description>cyclic redundancy check calculation unit</description>
|
|
<groupName>CRC</groupName>
|
|
<baseAddress>0x40023000</baseAddress>
|
|
<addressBlock>
|
|
<offset>0x0</offset>
|
|
<size>0x400</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<registers>
|
|
<register>
|
|
<name>DATA</name>
|
|
<displayName>DATA</displayName>
|
|
<description>Data register</description>
|
|
<addressOffset>0x0</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0xFFFFFFFF</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DATA</name>
|
|
<description>CRC calculation result bits</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>32</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FDATA</name>
|
|
<displayName>FDATA</displayName>
|
|
<description>Free data register</description>
|
|
<addressOffset>0x04</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FDATA</name>
|
|
<description>Free Data Register bits</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CTL</name>
|
|
<displayName>CTL</displayName>
|
|
<description>Control register</description>
|
|
<addressOffset>0x08</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>RST</name>
|
|
<description>reset bit</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>DAC</name>
|
|
<description>Digital-to-analog converter</description>
|
|
<groupName>DAC</groupName>
|
|
<baseAddress>0x40007400</baseAddress>
|
|
<addressBlock>
|
|
<offset>0x0</offset>
|
|
<size>0x400</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<registers>
|
|
<register>
|
|
<name>CTL</name>
|
|
<displayName>CTL</displayName>
|
|
<description>control register</description>
|
|
<addressOffset>0x0</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DEN0</name>
|
|
<description>DAC0 enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DBOFF0</name>
|
|
<description>DAC0 output buffer turn off</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DTEN0</name>
|
|
<description>DAC0 trigger enable</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DTSEL0</name>
|
|
<description>DAC0 trigger selection</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DWM0</name>
|
|
<description>DAC0 noise wave mode</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DWBW0</name>
|
|
<description>DAC0 noise wave bit width</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DDMAEN0</name>
|
|
<description>DAC0 DMA enable</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DEN1</name>
|
|
<description>DAC1 enable</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DBOFF1</name>
|
|
<description>DAC1 output buffer turn off</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DTEN1</name>
|
|
<description>DAC1 trigger enable</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DTSEL1</name>
|
|
<description>DAC1 trigger selection</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DWM1</name>
|
|
<description>DAC1 noise wave mode</description>
|
|
<bitOffset>22</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DWBW1</name>
|
|
<description>DAC1 noise wave bit width</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DDMAEN1</name>
|
|
<description>DAC1 DMA enable</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SWT</name>
|
|
<displayName>SWT</displayName>
|
|
<description>software trigger register</description>
|
|
<addressOffset>0x04</addressOffset>
|
|
<size>0x20</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SWTR0</name>
|
|
<description>DAC0 software trigger</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>SWTR1</name>
|
|
<description>DAC1 software trigger</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DAC0_R12DH</name>
|
|
<displayName>DAC0_R12DH</displayName>
|
|
<description>DAC0 12-bit right-aligned data holding register</description>
|
|
<addressOffset>0x08</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DAC0_DH</name>
|
|
<description>DAC0 12-bit right-aligned
|
|
data</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>12</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DAC0_L12DH</name>
|
|
<displayName>DAC0_L12DH</displayName>
|
|
<description>DAC0 12-bit left-aligned data holding register</description>
|
|
<addressOffset>0x0C</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DAC0_DH</name>
|
|
<description>DAC0 12-bit left-aligned
|
|
data</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>12</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DAC0_R8DH</name>
|
|
<displayName>DAC0_R8DH</displayName>
|
|
<description>DAC0 8-bit right aligned data holding
|
|
register</description>
|
|
<addressOffset>0x10</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DAC0_DH</name>
|
|
<description>DAC0 8-bit right-aligned
|
|
data</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DAC1_R12DH</name>
|
|
<displayName>DAC1_R12DH</displayName>
|
|
<description>DAC1 12-bit right-aligned data holding
|
|
register</description>
|
|
<addressOffset>0x14</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DAC1_DH</name>
|
|
<description>DAC1 12-bit right-aligned
|
|
data</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>12</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DAC1_L12DH</name>
|
|
<displayName>DAC1_L12DH</displayName>
|
|
<description>DAC1 12-bit left aligned data holding
|
|
register</description>
|
|
<addressOffset>0x18</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DAC1_DH</name>
|
|
<description>DAC1 12-bit left-aligned
|
|
data</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>12</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DAC1_R8DH</name>
|
|
<displayName>DAC1_R8DH</displayName>
|
|
<description>DAC1 8-bit right aligned data holding
|
|
register</description>
|
|
<addressOffset>0x1C</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DAC1_DH</name>
|
|
<description>DAC1 8-bit right-aligned
|
|
data</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DACC_R12DH</name>
|
|
<displayName>DACC_R12DH</displayName>
|
|
<description>DAC concurrent mode 12-bit right-aligned data holding
|
|
register</description>
|
|
<addressOffset>0x20</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DAC0_DH</name>
|
|
<description>DAC0 12-bit right-aligned
|
|
data</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>12</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DAC1_DH</name>
|
|
<description>DAC1 12-bit right-aligned
|
|
data</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>12</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DACC_L12DH</name>
|
|
<displayName>DACC_L12DH</displayName>
|
|
<description>DAC concurrent mode 12-bit left aligned data holding
|
|
register</description>
|
|
<addressOffset>0x24</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DAC0_DH</name>
|
|
<description>DAC0 12-bit left-aligned
|
|
data</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>12</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DAC1_DH</name>
|
|
<description>DAC1 12-bit left-aligned
|
|
data</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>12</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DACC_R8DH</name>
|
|
<displayName>DACC_R8DH</displayName>
|
|
<description>DAC concurrent mode 8-bit right aligned data holding
|
|
register</description>
|
|
<addressOffset>0x28</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DAC0_DH</name>
|
|
<description>DAC0 8-bit right-aligned
|
|
data</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DAC1_DH</name>
|
|
<description>DAC1 8-bit right-aligned
|
|
data</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DAC0_DO</name>
|
|
<displayName>DAC0_DO</displayName>
|
|
<description>DAC0 data output register</description>
|
|
<addressOffset>0x2C</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DAC0_DO</name>
|
|
<description>DAC0 data output</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>12</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DAC1_DO</name>
|
|
<displayName>DAC1_DO</displayName>
|
|
<description>DAC1 data output register</description>
|
|
<addressOffset>0x30</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DAC1_DO</name>
|
|
<description>DAC1 data output</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>12</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>DBG</name>
|
|
<description>Debug support</description>
|
|
<groupName>DBG</groupName>
|
|
<baseAddress>0xE0042000</baseAddress>
|
|
<addressBlock>
|
|
<offset>0x0</offset>
|
|
<size>0x400</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<registers>
|
|
<register>
|
|
<name>ID</name>
|
|
<displayName>ID</displayName>
|
|
<description>ID code register</description>
|
|
<addressOffset>0x0</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>ID_CODE</name>
|
|
<description>DBG ID code register</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>32</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CTL</name>
|
|
<displayName>CTL</displayName>
|
|
<description>Control register 0</description>
|
|
<addressOffset>0x4</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SLP_HOLD</name>
|
|
<description>Sleep mode hold register</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DSLP_HOLD</name>
|
|
<description>Deep-sleep mode hold register</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>STB_HOLD</name>
|
|
<description>Standby mode hold register</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FWDGT_HOLD</name>
|
|
<description>FWDGT hold bit</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>WWDGT_HOLD</name>
|
|
<description>WWDGT hold bit</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TIMER0_HOLD</name>
|
|
<description>TIMER 0 hold bit</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TIMER1_HOLD</name>
|
|
<description>TIMER 1 hold bit</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TIMER2_HOLD</name>
|
|
<description>TIMER 2 hold bit</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TIMER3_HOLD</name>
|
|
<description>TIMER 23 hold bit</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CAN0_HOLD</name>
|
|
<description>CAN0 hold bit</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>I2C0_HOLD</name>
|
|
<description>I2C0 hold bit</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>I2C1_HOLD</name>
|
|
<description>I2C1 hold bit</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TIMER4_HOLD</name>
|
|
<description>TIMER4_HOLD</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TIMER5_HOLD</name>
|
|
<description>TIMER 5 hold bit</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TIMER6_HOLD</name>
|
|
<description>TIMER 6 hold bit</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CAN1_HOLD</name>
|
|
<description>CAN1 hold bit</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>DMA0</name>
|
|
<description>DMA controller</description>
|
|
<groupName>DMA</groupName>
|
|
<baseAddress>0x40020000</baseAddress>
|
|
<addressBlock>
|
|
<offset>0x0</offset>
|
|
<size>0x400</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<interrupt>
|
|
<name>DMA0_Channel0</name>
|
|
<value>30</value>
|
|
</interrupt>
|
|
<interrupt>
|
|
<name>DMA0_Channel1</name>
|
|
<value>31</value>
|
|
</interrupt>
|
|
<interrupt>
|
|
<name>DMA0_Channel2</name>
|
|
<value>32</value>
|
|
</interrupt>
|
|
<interrupt>
|
|
<name>DMA0_Channel3</name>
|
|
<value>33</value>
|
|
</interrupt>
|
|
<interrupt>
|
|
<name>DMA0_Channel4</name>
|
|
<value>34</value>
|
|
</interrupt>
|
|
<interrupt>
|
|
<name>DMA0_Channel5</name>
|
|
<value>35</value>
|
|
</interrupt>
|
|
<interrupt>
|
|
<name>DMA0_Channel6</name>
|
|
<value>36</value>
|
|
</interrupt>
|
|
<registers>
|
|
<register>
|
|
<name>INTF</name>
|
|
<displayName>INTF</displayName>
|
|
<description>Interrupt flag register </description>
|
|
<addressOffset>0x0</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>GIF0</name>
|
|
<description>Global interrupt flag of channel 0</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FTFIF0</name>
|
|
<description>Full Transfer finish flag of channe 0</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>HTFIF0</name>
|
|
<description>Half transfer finish flag of channel 0</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ERRIF0</name>
|
|
<description>Error flag of channel 0</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>GIF1</name>
|
|
<description>Global interrupt flag of channel 1</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FTFIF1</name>
|
|
<description>Full Transfer finish flag of channe 1</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>HTFIF1</name>
|
|
<description>Half transfer finish flag of channel 1</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ERRIF1</name>
|
|
<description>Error flag of channel 1</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>GIF2</name>
|
|
<description>Global interrupt flag of channel 2</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FTFIF2</name>
|
|
<description>Full Transfer finish flag of channe 2</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>HTFIF2</name>
|
|
<description>Half transfer finish flag of channel 2</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ERRIF2</name>
|
|
<description>Error flag of channel 2</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>GIF3</name>
|
|
<description>Global interrupt flag of channel 3</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FTFIF3</name>
|
|
<description>Full Transfer finish flag of channe 3</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>HTFIF3</name>
|
|
<description>Half transfer finish flag of channel 3</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ERRIF3</name>
|
|
<description>Error flag of channel 3</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>GIF4</name>
|
|
<description>Global interrupt flag of channel 4</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FTFIF4</name>
|
|
<description>Full Transfer finish flag of channe 4</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>HTFIF4</name>
|
|
<description>Half transfer finish flag of channel 4</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ERRIF4</name>
|
|
<description>Error flag of channel 4</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>GIF5</name>
|
|
<description>Global interrupt flag of channel 5</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FTFIF5</name>
|
|
<description>Full Transfer finish flag of channe 5</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>HTFIF5</name>
|
|
<description>Half transfer finish flag of channel 5</description>
|
|
<bitOffset>22</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ERRIF5</name>
|
|
<description>Error flag of channel 5</description>
|
|
<bitOffset>23</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>GIF6</name>
|
|
<description>Global interrupt flag of channel 6</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FTFIF6</name>
|
|
<description>Full Transfer finish flag of channe 6</description>
|
|
<bitOffset>25</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>HTFIF6</name>
|
|
<description>Half transfer finish flag of channel 6</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ERRIF6</name>
|
|
<description>Error flag of channel 6</description>
|
|
<bitOffset>27</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>INTC</name>
|
|
<displayName>INTC</displayName>
|
|
<description>Interrupt flag clear register </description>
|
|
<addressOffset>0x04</addressOffset>
|
|
<size>0x20</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>GIFC0</name>
|
|
<description>Clear global interrupt flag of channel 0</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FTFIFC0</name>
|
|
<description>Clear bit for full transfer finish flag of channel 0</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>HTFIFC0</name>
|
|
<description>Clear bit for half transfer finish flag of channel 0</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ERRIFC0</name>
|
|
<description>Clear bit for error flag of channel 0</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>GIFC1</name>
|
|
<description>Clear global interrupt flag of channel 1</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FTFIFC1</name>
|
|
<description>Clear bit for full transfer finish flag of channel 1</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>HTFIFC1</name>
|
|
<description>Clear bit for half transfer finish flag of channel 1</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ERRIFC1</name>
|
|
<description>Clear bit for error flag of channel 1</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field> <field>
|
|
<name>GIFC2</name>
|
|
<description>Clear global interrupt flag of channel 2</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FTFIFC2</name>
|
|
<description>Clear bit for full transfer finish flag of channel 2</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>HTFIFC2</name>
|
|
<description>Clear bit for half transfer finish flag of channel 2</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ERRIFC2</name>
|
|
<description>Clear bit for error flag of channel 2</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field> <field>
|
|
<name>GIFC3</name>
|
|
<description>Clear global interrupt flag of channel 3</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FTFIFC3</name>
|
|
<description>Clear bit for full transfer finish flag of channel 3</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>HTFIFC3</name>
|
|
<description>Clear bit for half transfer finish flag of channel 3</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ERRIFC3</name>
|
|
<description>Clear bit for error flag of channel 3</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field> <field>
|
|
<name>GIFC4</name>
|
|
<description>Clear global interrupt flag of channel 4</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FTFIFC4</name>
|
|
<description>Clear bit for full transfer finish flag of channel 4</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>HTFIFC4</name>
|
|
<description>Clear bit for half transfer finish flag of channel 4</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ERRIFC4</name>
|
|
<description>Clear bit for error flag of channel 4</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field> <field>
|
|
<name>GIFC5</name>
|
|
<description>Clear global interrupt flag of channel 5</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FTFIFC5</name>
|
|
<description>Clear bit for full transfer finish flag of channel 5</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>HTFIFC5</name>
|
|
<description>Clear bit for half transfer finish flag of channel 5</description>
|
|
<bitOffset>22</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ERRIFC5</name>
|
|
<description>Clear bit for error flag of channel 5</description>
|
|
<bitOffset>23</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field> <field>
|
|
<name>GIFC6</name>
|
|
<description>Clear global interrupt flag of channel 6</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FTFIFC6</name>
|
|
<description>Clear bit for full transfer finish flag of channel 6</description>
|
|
<bitOffset>25</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>HTFIFC6</name>
|
|
<description>Clear bit for half transfer finish flag of channel 6</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ERRIFC6</name>
|
|
<description>Clear bit for error flag of channel 6</description>
|
|
<bitOffset>27</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CH0CTL</name>
|
|
<displayName>CH0CTL</displayName>
|
|
<description>Channel 0 control register</description>
|
|
<addressOffset>0x08</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CHEN</name>
|
|
<description>Channel enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FTFIE</name>
|
|
<description>Enable bit for channel full transfer finish interrupt</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>HTFIE</name>
|
|
<description>Enable bit for channel half transfer finish interrupt</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ERRIE</name>
|
|
<description>Enable bit for channel error interrupt</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DIR</name>
|
|
<description>Transfer direction</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CMEN</name>
|
|
<description>Circular mode enable</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PNAGA</name>
|
|
<description>Next address generation algorithm of peripheral</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>MNAGA</name>
|
|
<description>Next address generation algorithm of memory</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PWIDTH</name>
|
|
<description>Transfer data size of peripheral</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>MWIDTH</name>
|
|
<description>Transfer data size of memory</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PRIO</name>
|
|
<description>Priority level</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>M2M</name>
|
|
<description>Memory to Memory Mode</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CH0CNT</name>
|
|
<displayName>CH0CNT</displayName>
|
|
<description>Channel 0 counter register</description>
|
|
<addressOffset>0x0C</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CNT</name>
|
|
<description>Transfer counter</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CH0PADDR</name>
|
|
<displayName>CH0PADDR</displayName>
|
|
<description>Channel 0 peripheral base address register</description>
|
|
<addressOffset>0x10</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>PADDR</name>
|
|
<description>Peripheral base address</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>32</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CH0MADDR</name>
|
|
<displayName>CH0MADDR</displayName>
|
|
<description>Channel 0 memory base address register</description>
|
|
<addressOffset>0x14</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>MADDR</name>
|
|
<description>Memory base address</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>32</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CH1CTL</name>
|
|
<displayName>CH1CTL</displayName>
|
|
<description>Channel 1 control register</description>
|
|
<addressOffset>0x1C</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CHEN</name>
|
|
<description>Channel enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FTFIE</name>
|
|
<description>Enable bit for channel full transfer finish interrupt</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>HTFIE</name>
|
|
<description>Enable bit for channel half transfer finish interrupt</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ERRIE</name>
|
|
<description>Enable bit for channel error interrupt</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DIR</name>
|
|
<description>Transfer direction</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CMEN</name>
|
|
<description>Circular mode enable</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PNAGA</name>
|
|
<description>Next address generation algorithm of peripheral</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>MNAGA</name>
|
|
<description>Next address generation algorithm of memory</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PWIDTH</name>
|
|
<description>Transfer data size of peripheral</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>MWIDTH</name>
|
|
<description>Transfer data size of memory</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PRIO</name>
|
|
<description>Priority level</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>M2M</name>
|
|
<description>Memory to Memory Mode</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CH1CNT</name>
|
|
<displayName>CH1CNT</displayName>
|
|
<description>Channel 1 counter register</description>
|
|
<addressOffset>0x20</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CNT</name>
|
|
<description>Transfer counter</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CH1PADDR</name>
|
|
<displayName>CH1PADDR</displayName>
|
|
<description>Channel 1 peripheral base address register</description>
|
|
<addressOffset>0x24</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>PADDR</name>
|
|
<description>Peripheral base address</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>32</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CH1MADDR</name>
|
|
<displayName>CH1MADDR</displayName>
|
|
<description>Channel 1 memory base address register</description>
|
|
<addressOffset>0x28</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>MADDR</name>
|
|
<description>Memory base address</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>32</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CH2CTL</name>
|
|
<displayName>CH2CTL</displayName>
|
|
<description>Channel 2 control register</description>
|
|
<addressOffset>0x30</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CHEN</name>
|
|
<description>Channel enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FTFIE</name>
|
|
<description>Enable bit for channel full transfer finish interrupt</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>HTFIE</name>
|
|
<description>Enable bit for channel half transfer finish interrupt</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ERRIE</name>
|
|
<description>Enable bit for channel error interrupt</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DIR</name>
|
|
<description>Transfer direction</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CMEN</name>
|
|
<description>Circular mode enable</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PNAGA</name>
|
|
<description>Next address generation algorithm of peripheral</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>MNAGA</name>
|
|
<description>Next address generation algorithm of memory</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PWIDTH</name>
|
|
<description>Transfer data size of peripheral</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>MWIDTH</name>
|
|
<description>Transfer data size of memory</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PRIO</name>
|
|
<description>Priority level</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>M2M</name>
|
|
<description>Memory to Memory Mode</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CH2CNT</name>
|
|
<displayName>CH2CNT</displayName>
|
|
<description>Channel 2 counter register</description>
|
|
<addressOffset>0x34</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CNT</name>
|
|
<description>Transfer counter</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CH2PADDR</name>
|
|
<displayName>CH2PADDR</displayName>
|
|
<description>Channel 2 peripheral base address register</description>
|
|
<addressOffset>0x38</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>PADDR</name>
|
|
<description>Peripheral base address</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>32</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CH2MADDR</name>
|
|
<displayName>CH2MADDR</displayName>
|
|
<description>Channel 2 memory base address register</description>
|
|
<addressOffset>0x3C</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>MADDR</name>
|
|
<description>Memory base address</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>32</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CH3CTL</name>
|
|
<displayName>CH3CTL</displayName>
|
|
<description>Channel 3 control register</description>
|
|
<addressOffset>0x44</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CHEN</name>
|
|
<description>Channel enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FTFIE</name>
|
|
<description>Enable bit for channel full transfer finish interrupt</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>HTFIE</name>
|
|
<description>Enable bit for channel half transfer finish interrupt</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ERRIE</name>
|
|
<description>Enable bit for channel error interrupt</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DIR</name>
|
|
<description>Transfer direction</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CMEN</name>
|
|
<description>Circular mode enable</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PNAGA</name>
|
|
<description>Next address generation algorithm of peripheral</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>MNAGA</name>
|
|
<description>Next address generation algorithm of memory</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PWIDTH</name>
|
|
<description>Transfer data size of peripheral</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>MWIDTH</name>
|
|
<description>Transfer data size of memory</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PRIO</name>
|
|
<description>Priority level</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>M2M</name>
|
|
<description>Memory to Memory Mode</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CH3CNT</name>
|
|
<displayName>CH3CNT</displayName>
|
|
<description>Channel 3 counter register</description>
|
|
<addressOffset>0x48</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CNT</name>
|
|
<description>Transfer counter</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CH3PADDR</name>
|
|
<displayName>CH3PADDR</displayName>
|
|
<description>Channel 3 peripheral base address register</description>
|
|
<addressOffset>0x4C</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>PADDR</name>
|
|
<description>Peripheral base address</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>32</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CH3MADDR</name>
|
|
<displayName>CH3MADDR</displayName>
|
|
<description>Channel 3 memory base address register</description>
|
|
<addressOffset>0x50</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>MADDR</name>
|
|
<description>Memory base address</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>32</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CH4CTL</name>
|
|
<displayName>CH4CTL</displayName>
|
|
<description>Channel 4 control register</description>
|
|
<addressOffset>0x58</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CHEN</name>
|
|
<description>Channel enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FTFIE</name>
|
|
<description>Enable bit for channel full transfer finish interrupt</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>HTFIE</name>
|
|
<description>Enable bit for channel half transfer finish interrupt</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ERRIE</name>
|
|
<description>Enable bit for channel error interrupt</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DIR</name>
|
|
<description>Transfer direction</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CMEN</name>
|
|
<description>Circular mode enable</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PNAGA</name>
|
|
<description>Next address generation algorithm of peripheral</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>MNAGA</name>
|
|
<description>Next address generation algorithm of memory</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PWIDTH</name>
|
|
<description>Transfer data size of peripheral</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>MWIDTH</name>
|
|
<description>Transfer data size of memory</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PRIO</name>
|
|
<description>Priority level</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>M2M</name>
|
|
<description>Memory to Memory Mode</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CH4CNT</name>
|
|
<displayName>CH4CNT</displayName>
|
|
<description>Channel 4 counter register</description>
|
|
<addressOffset>0x5C</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CNT</name>
|
|
<description>Transfer counter</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CH4PADDR</name>
|
|
<displayName>CH4PADDR</displayName>
|
|
<description>Channel 4 peripheral base address register</description>
|
|
<addressOffset>0x60</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>PADDR</name>
|
|
<description>Peripheral base address</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>32</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CH4MADDR</name>
|
|
<displayName>CH4MADDR</displayName>
|
|
<description>Channel 4 memory base address register</description>
|
|
<addressOffset>0x64</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>MADDR</name>
|
|
<description>Memory base address</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>32</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CH5CTL</name>
|
|
<displayName>CH5CTL</displayName>
|
|
<description>Channel 5 control register</description>
|
|
<addressOffset>0x6C</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CHEN</name>
|
|
<description>Channel enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FTFIE</name>
|
|
<description>Enable bit for channel full transfer finish interrupt</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>HTFIE</name>
|
|
<description>Enable bit for channel half transfer finish interrupt</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ERRIE</name>
|
|
<description>Enable bit for channel error interrupt</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DIR</name>
|
|
<description>Transfer direction</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CMEN</name>
|
|
<description>Circular mode enable</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PNAGA</name>
|
|
<description>Next address generation algorithm of peripheral</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>MNAGA</name>
|
|
<description>Next address generation algorithm of memory</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PWIDTH</name>
|
|
<description>Transfer data size of peripheral</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>MWIDTH</name>
|
|
<description>Transfer data size of memory</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PRIO</name>
|
|
<description>Priority level</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>M2M</name>
|
|
<description>Memory to Memory Mode</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CH5CNT</name>
|
|
<displayName>CH5CNT</displayName>
|
|
<description>Channel 5 counter register</description>
|
|
<addressOffset>0x70</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CNT</name>
|
|
<description>Transfer counter</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CH5PADDR</name>
|
|
<displayName>CH5PADDR</displayName>
|
|
<description>Channel 5 peripheral base address register</description>
|
|
<addressOffset>0x74</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>PADDR</name>
|
|
<description>Peripheral base address</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>32</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CH5MADDR</name>
|
|
<displayName>CH5MADDR</displayName>
|
|
<description>Channel 5 memory base address register</description>
|
|
<addressOffset>0x78</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>MADDR</name>
|
|
<description>Memory base address</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>32</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CH6CTL</name>
|
|
<displayName>CH6CTL</displayName>
|
|
<description>Channel 6 control register</description>
|
|
<addressOffset>0x80</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CHEN</name>
|
|
<description>Channel enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FTFIE</name>
|
|
<description>Enable bit for channel full transfer finish interrupt</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>HTFIE</name>
|
|
<description>Enable bit for channel half transfer finish interrupt</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ERRIE</name>
|
|
<description>Enable bit for channel error interrupt</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DIR</name>
|
|
<description>Transfer direction</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CMEN</name>
|
|
<description>Circular mode enable</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PNAGA</name>
|
|
<description>Next address generation algorithm of peripheral</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>MNAGA</name>
|
|
<description>Next address generation algorithm of memory</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PWIDTH</name>
|
|
<description>Transfer data size of peripheral</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>MWIDTH</name>
|
|
<description>Transfer data size of memory</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PRIO</name>
|
|
<description>Priority level</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>M2M</name>
|
|
<description>Memory to Memory Mode</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CH6CNT</name>
|
|
<displayName>CH6CNT</displayName>
|
|
<description>Channel 6 counter register</description>
|
|
<addressOffset>0x84</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CNT</name>
|
|
<description>Transfer counter</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CH6PADDR</name>
|
|
<displayName>CH6PADDR</displayName>
|
|
<description>Channel 6 peripheral base address register</description>
|
|
<addressOffset>0x88</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>PADDR</name>
|
|
<description>Peripheral base address</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>32</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CH6MADDR</name>
|
|
<displayName>CH6MADDR</displayName>
|
|
<description>Channel 6 memory base address register</description>
|
|
<addressOffset>0x8C</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>MADDR</name>
|
|
<description>Memory base address</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>32</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral>
|
|
<peripheral >
|
|
<name>DMA1</name>
|
|
<description>Direct memory access controller</description>
|
|
<groupName>DMA</groupName>
|
|
<baseAddress>0x40020000</baseAddress>
|
|
<addressBlock>
|
|
<offset>0x0</offset>
|
|
<size>0x400</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<baseAddress>0x40020400</baseAddress>
|
|
<interrupt>
|
|
<name>DMA1_Channel0</name>
|
|
<value>75</value>
|
|
</interrupt>
|
|
<interrupt>
|
|
<name>DMA1_Channel1</name>
|
|
<value>76</value>
|
|
</interrupt>
|
|
<interrupt>
|
|
<name>DMA1_Channel2</name>
|
|
<value>77</value>
|
|
</interrupt>
|
|
<interrupt>
|
|
<name>DMA1_Channel3</name>
|
|
<value>78</value>
|
|
</interrupt>
|
|
<interrupt>
|
|
<name>DMA1_Channel4</name>
|
|
<value>79</value>
|
|
</interrupt>
|
|
<registers>
|
|
<register>
|
|
<name>INTF</name>
|
|
<displayName>INTF</displayName>
|
|
<description>Interrupt flag register </description>
|
|
<addressOffset>0x0</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>GIF0</name>
|
|
<description>Global interrupt flag of channel 0</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FTFIF0</name>
|
|
<description>Full Transfer finish flag of channe 0</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>HTFIF0</name>
|
|
<description>Half transfer finish flag of channel 0</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ERRIF0</name>
|
|
<description>Error flag of channel 0</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>GIF1</name>
|
|
<description>Global interrupt flag of channel 1</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FTFIF1</name>
|
|
<description>Full Transfer finish flag of channe 1</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>HTFIF1</name>
|
|
<description>Half transfer finish flag of channel 1</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ERRIF1</name>
|
|
<description>Error flag of channel 1</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>GIF2</name>
|
|
<description>Global interrupt flag of channel 2</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FTFIF2</name>
|
|
<description>Full Transfer finish flag of channe 2</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>HTFIF2</name>
|
|
<description>Half transfer finish flag of channel 2</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ERRIF2</name>
|
|
<description>Error flag of channel 2</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>GIF3</name>
|
|
<description>Global interrupt flag of channel 3</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FTFIF3</name>
|
|
<description>Full Transfer finish flag of channe 3</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>HTFIF3</name>
|
|
<description>Half transfer finish flag of channel 3</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ERRIF3</name>
|
|
<description>Error flag of channel 3</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>GIF4</name>
|
|
<description>Global interrupt flag of channel 4</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FTFIF4</name>
|
|
<description>Full Transfer finish flag of channe 4</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>HTFIF4</name>
|
|
<description>Half transfer finish flag of channel 4</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ERRIF4</name>
|
|
<description>Error flag of channel 4</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>INTC</name>
|
|
<displayName>INTC</displayName>
|
|
<description>Interrupt flag clear register </description>
|
|
<addressOffset>0x04</addressOffset>
|
|
<size>0x20</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>GIFC0</name>
|
|
<description>Clear global interrupt flag of channel 0</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FTFIFC0</name>
|
|
<description>Clear bit for full transfer finish flag of channel 0</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>HTFIFC0</name>
|
|
<description>Clear bit for half transfer finish flag of channel 0</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ERRIFC0</name>
|
|
<description>Clear bit for error flag of channel 0</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>GIFC1</name>
|
|
<description>Clear global interrupt flag of channel 1</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FTFIFC1</name>
|
|
<description>Clear bit for full transfer finish flag of channel 1</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>HTFIFC1</name>
|
|
<description>Clear bit for half transfer finish flag of channel 1</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ERRIFC1</name>
|
|
<description>Clear bit for error flag of channel 1</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field> <field>
|
|
<name>GIFC2</name>
|
|
<description>Clear global interrupt flag of channel 2</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FTFIFC2</name>
|
|
<description>Clear bit for full transfer finish flag of channel 2</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>HTFIFC2</name>
|
|
<description>Clear bit for half transfer finish flag of channel 2</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ERRIFC2</name>
|
|
<description>Clear bit for error flag of channel 2</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field> <field>
|
|
<name>GIFC3</name>
|
|
<description>Clear global interrupt flag of channel 3</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FTFIFC3</name>
|
|
<description>Clear bit for full transfer finish flag of channel 3</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>HTFIFC3</name>
|
|
<description>Clear bit for half transfer finish flag of channel 3</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ERRIFC3</name>
|
|
<description>Clear bit for error flag of channel 3</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field> <field>
|
|
<name>GIFC4</name>
|
|
<description>Clear global interrupt flag of channel 4</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FTFIFC4</name>
|
|
<description>Clear bit for full transfer finish flag of channel 4</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>HTFIFC4</name>
|
|
<description>Clear bit for half transfer finish flag of channel 4</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ERRIFC4</name>
|
|
<description>Clear bit for error flag of channel 4</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CH0CTL</name>
|
|
<displayName>CH0CTL</displayName>
|
|
<description>Channel 0 control register</description>
|
|
<addressOffset>0x08</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CHEN</name>
|
|
<description>Channel enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FTFIE</name>
|
|
<description>Enable bit for channel full transfer finish interrupt</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>HTFIE</name>
|
|
<description>Enable bit for channel half transfer finish interrupt</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ERRIE</name>
|
|
<description>Enable bit for channel error interrupt</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DIR</name>
|
|
<description>Transfer direction</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CMEN</name>
|
|
<description>Circular mode enable</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PNAGA</name>
|
|
<description>Next address generation algorithm of peripheral</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>MNAGA</name>
|
|
<description>Next address generation algorithm of memory</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PWIDTH</name>
|
|
<description>Transfer data size of peripheral</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>MWIDTH</name>
|
|
<description>Transfer data size of memory</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PRIO</name>
|
|
<description>Priority level</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>M2M</name>
|
|
<description>Memory to Memory Mode</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CH0CNT</name>
|
|
<displayName>CH0CNT</displayName>
|
|
<description>Channel 0 counter register</description>
|
|
<addressOffset>0x0C</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CNT</name>
|
|
<description>Transfer counter</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CH0PADDR</name>
|
|
<displayName>CH0PADDR</displayName>
|
|
<description>Channel 0 peripheral base address register</description>
|
|
<addressOffset>0x10</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>PADDR</name>
|
|
<description>Peripheral base address</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>32</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CH0MADDR</name>
|
|
<displayName>CH0MADDR</displayName>
|
|
<description>Channel 0 memory base address register</description>
|
|
<addressOffset>0x14</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>MADDR</name>
|
|
<description>Memory base address</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>32</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CH1CTL</name>
|
|
<displayName>CH1CTL</displayName>
|
|
<description>Channel 1 control register</description>
|
|
<addressOffset>0x1C</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CHEN</name>
|
|
<description>Channel enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FTFIE</name>
|
|
<description>Enable bit for channel full transfer finish interrupt</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>HTFIE</name>
|
|
<description>Enable bit for channel half transfer finish interrupt</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ERRIE</name>
|
|
<description>Enable bit for channel error interrupt</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DIR</name>
|
|
<description>Transfer direction</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CMEN</name>
|
|
<description>Circular mode enable</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PNAGA</name>
|
|
<description>Next address generation algorithm of peripheral</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>MNAGA</name>
|
|
<description>Next address generation algorithm of memory</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PWIDTH</name>
|
|
<description>Transfer data size of peripheral</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>MWIDTH</name>
|
|
<description>Transfer data size of memory</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PRIO</name>
|
|
<description>Priority level</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>M2M</name>
|
|
<description>Memory to Memory Mode</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CH1CNT</name>
|
|
<displayName>CH1CNT</displayName>
|
|
<description>Channel 1 counter register</description>
|
|
<addressOffset>0x20</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CNT</name>
|
|
<description>Transfer counter</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CH1PADDR</name>
|
|
<displayName>CH1PADDR</displayName>
|
|
<description>Channel 1 peripheral base address register</description>
|
|
<addressOffset>0x24</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>PADDR</name>
|
|
<description>Peripheral base address</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>32</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CH1MADDR</name>
|
|
<displayName>CH1MADDR</displayName>
|
|
<description>Channel 1 memory base address register</description>
|
|
<addressOffset>0x28</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>MADDR</name>
|
|
<description>Memory base address</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>32</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CH2CTL</name>
|
|
<displayName>CH2CTL</displayName>
|
|
<description>Channel 2 control register</description>
|
|
<addressOffset>0x30</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CHEN</name>
|
|
<description>Channel enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FTFIE</name>
|
|
<description>Enable bit for channel full transfer finish interrupt</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>HTFIE</name>
|
|
<description>Enable bit for channel half transfer finish interrupt</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ERRIE</name>
|
|
<description>Enable bit for channel error interrupt</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DIR</name>
|
|
<description>Transfer direction</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CMEN</name>
|
|
<description>Circular mode enable</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PNAGA</name>
|
|
<description>Next address generation algorithm of peripheral</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>MNAGA</name>
|
|
<description>Next address generation algorithm of memory</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PWIDTH</name>
|
|
<description>Transfer data size of peripheral</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>MWIDTH</name>
|
|
<description>Transfer data size of memory</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PRIO</name>
|
|
<description>Priority level</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>M2M</name>
|
|
<description>Memory to Memory Mode</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CH2CNT</name>
|
|
<displayName>CH2CNT</displayName>
|
|
<description>Channel 2 counter register</description>
|
|
<addressOffset>0x34</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CNT</name>
|
|
<description>Transfer counter</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CH2PADDR</name>
|
|
<displayName>CH2PADDR</displayName>
|
|
<description>Channel 2 peripheral base address register</description>
|
|
<addressOffset>0x38</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>PADDR</name>
|
|
<description>Peripheral base address</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>32</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CH2MADDR</name>
|
|
<displayName>CH2MADDR</displayName>
|
|
<description>Channel 2 memory base address register</description>
|
|
<addressOffset>0x3C</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>MADDR</name>
|
|
<description>Memory base address</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>32</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CH3CTL</name>
|
|
<displayName>CH3CTL</displayName>
|
|
<description>Channel 3 control register</description>
|
|
<addressOffset>0x44</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CHEN</name>
|
|
<description>Channel enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FTFIE</name>
|
|
<description>Enable bit for channel full transfer finish interrupt</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>HTFIE</name>
|
|
<description>Enable bit for channel half transfer finish interrupt</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ERRIE</name>
|
|
<description>Enable bit for channel error interrupt</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DIR</name>
|
|
<description>Transfer direction</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CMEN</name>
|
|
<description>Circular mode enable</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PNAGA</name>
|
|
<description>Next address generation algorithm of peripheral</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>MNAGA</name>
|
|
<description>Next address generation algorithm of memory</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PWIDTH</name>
|
|
<description>Transfer data size of peripheral</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>MWIDTH</name>
|
|
<description>Transfer data size of memory</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PRIO</name>
|
|
<description>Priority level</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>M2M</name>
|
|
<description>Memory to Memory Mode</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CH3CNT</name>
|
|
<displayName>CH3CNT</displayName>
|
|
<description>Channel 3 counter register</description>
|
|
<addressOffset>0x48</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CNT</name>
|
|
<description>Transfer counter</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CH3PADDR</name>
|
|
<displayName>CH3PADDR</displayName>
|
|
<description>Channel 3 peripheral base address register</description>
|
|
<addressOffset>0x4C</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>PADDR</name>
|
|
<description>Peripheral base address</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>32</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CH3MADDR</name>
|
|
<displayName>CH3MADDR</displayName>
|
|
<description>Channel 3 memory base address register</description>
|
|
<addressOffset>0x50</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>MADDR</name>
|
|
<description>Memory base address</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>32</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CH4CTL</name>
|
|
<displayName>CH4CTL</displayName>
|
|
<description>Channel 4 control register</description>
|
|
<addressOffset>0x58</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CHEN</name>
|
|
<description>Channel enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FTFIE</name>
|
|
<description>Enable bit for channel full transfer finish interrupt</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>HTFIE</name>
|
|
<description>Enable bit for channel half transfer finish interrupt</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ERRIE</name>
|
|
<description>Enable bit for channel error interrupt</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DIR</name>
|
|
<description>Transfer direction</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CMEN</name>
|
|
<description>Circular mode enable</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PNAGA</name>
|
|
<description>Next address generation algorithm of peripheral</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>MNAGA</name>
|
|
<description>Next address generation algorithm of memory</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PWIDTH</name>
|
|
<description>Transfer data size of peripheral</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>MWIDTH</name>
|
|
<description>Transfer data size of memory</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PRIO</name>
|
|
<description>Priority level</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>M2M</name>
|
|
<description>Memory to Memory Mode</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CH4CNT</name>
|
|
<displayName>CH4CNT</displayName>
|
|
<description>Channel 4 counter register</description>
|
|
<addressOffset>0x5C</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CNT</name>
|
|
<description>Transfer counter</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CH4PADDR</name>
|
|
<displayName>CH4PADDR</displayName>
|
|
<description>Channel 4 peripheral base address register</description>
|
|
<addressOffset>0x60</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>PADDR</name>
|
|
<description>Peripheral base address</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>32</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CH4MADDR</name>
|
|
<displayName>CH4MADDR</displayName>
|
|
<description>Channel 4 memory base address register</description>
|
|
<addressOffset>0x64</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>MADDR</name>
|
|
<description>Memory base address</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>32</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>EXMC</name>
|
|
<description>External memory controller</description>
|
|
<groupName>EXMC</groupName>
|
|
<baseAddress>0xA0000000</baseAddress>
|
|
<addressBlock>
|
|
<offset>0x0</offset>
|
|
<size>0x1000</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<registers>
|
|
<register>
|
|
<name>SNCTL0</name>
|
|
<displayName>SNCTL0</displayName>
|
|
<description>SRAM/NOR flash control register 0</description>
|
|
<addressOffset>0x0</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x000030DA</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>ASYNCWAIT</name>
|
|
<description>Asynchronous wait</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>NRWTEN</name>
|
|
<description>NWAIT signal enable</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>WREN</name>
|
|
<description>Write enable</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>NRWTPOL</name>
|
|
<description>NWAIT signal polarity</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>NREN</name>
|
|
<description>NOR Flash access enable</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>NRW</name>
|
|
<description>NOR bank memory data bus width</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>NRTP</name>
|
|
<description>NOR bank memory type</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>NRMUX</name>
|
|
<description>NOR bank memory address/data multiplexing</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>NRBKEN</name>
|
|
<description>NOR bank enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SNTCFG0</name>
|
|
<displayName>SNTCFG0</displayName>
|
|
<description>SRAM/NOR flash timing configuration register 0</description>
|
|
<addressOffset>0x4</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0FFFFFFF</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>BUSLAT</name>
|
|
<description>Bus latency</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DSET</name>
|
|
<description>Data setup time</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>AHLD</name>
|
|
<description>Address hold time</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ASET</name>
|
|
<description>Address setup time</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SNCTL1</name>
|
|
<displayName>SNCTL1</displayName>
|
|
<description>SRAM/NOR flash control register 1</description>
|
|
<addressOffset>0x8</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x000030DA</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>ASYNCWAIT</name>
|
|
<description>Asynchronous wait</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>NRWTEN</name>
|
|
<description>NWAIT signal enable</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>WREN</name>
|
|
<description>Write enable</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>NRWTPOL</name>
|
|
<description>NWAIT signal polarity</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>NREN</name>
|
|
<description>NOR Flash access enable</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>NRW</name>
|
|
<description>NOR bank memory data bus width</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>NRTP</name>
|
|
<description>NOR bank memory type</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>NRMUX</name>
|
|
<description>NOR bank memory address/data multiplexing</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>NRBKEN</name>
|
|
<description>NOR bank enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>EXTI</name>
|
|
<description>External interrupt/event
|
|
controller</description>
|
|
<groupName>EXTI</groupName>
|
|
<baseAddress>0x40010400</baseAddress>
|
|
<addressBlock>
|
|
<offset>0x0</offset>
|
|
<size>0x400</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<interrupt>
|
|
<name>EXTI_Line0</name>
|
|
<value>25</value>
|
|
</interrupt>
|
|
<interrupt>
|
|
<name>EXTI_Line1</name>
|
|
<value>26</value>
|
|
</interrupt>
|
|
<interrupt>
|
|
<name>EXTI_Line2</name>
|
|
<value>27</value>
|
|
</interrupt>
|
|
<interrupt>
|
|
<name>EXTI_Line3</name>
|
|
<value>28</value>
|
|
</interrupt>
|
|
<interrupt>
|
|
<name>EXTI_Line4</name>
|
|
<value>29</value>
|
|
</interrupt>
|
|
<interrupt>
|
|
<name>EXTI_line9_5</name>
|
|
<value>42</value>
|
|
</interrupt>
|
|
<interrupt>
|
|
<name>EXTI_line15_10</name>
|
|
<value>59</value>
|
|
</interrupt>
|
|
<registers>
|
|
<register>
|
|
<name>INTEN</name>
|
|
<displayName>INTEN</displayName>
|
|
<description>Interrupt enable register
|
|
(EXTI_INTEN)</description>
|
|
<addressOffset>0x0</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>INTEN0</name>
|
|
<description>Enable Interrupt on line 0</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>INTEN1</name>
|
|
<description>Enable Interrupt on line 1</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>INTEN2</name>
|
|
<description>Enable Interrupt on line 2</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>INTEN3</name>
|
|
<description>Enable Interrupt on line 3</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>INTEN4</name>
|
|
<description>Enable Interrupt on line 4</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>INTEN5</name>
|
|
<description>Enable Interrupt on line 5</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>INTEN6</name>
|
|
<description>Enable Interrupt on line 6</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>INTEN7</name>
|
|
<description>Enable Interrupt on line 7</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>INTEN8</name>
|
|
<description>Enable Interrupt on line 8</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>INTEN9</name>
|
|
<description>Enable Interrupt on line 9</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>INTEN10</name>
|
|
<description>Enable Interrupt on line 10</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>INTEN11</name>
|
|
<description>Enable Interrupt on line 11</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>INTEN12</name>
|
|
<description>Enable Interrupt on line 12</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>INTEN13</name>
|
|
<description>Enable Interrupt on line 13</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>INTEN14</name>
|
|
<description>Enable Interrupt on line 14</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>INTEN15</name>
|
|
<description>Enable Interrupt on line 15</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>INTEN16</name>
|
|
<description>Enable Interrupt on line 16</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>INTEN17</name>
|
|
<description>Enable Interrupt on line 17</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>INTEN18</name>
|
|
<description>Enable Interrupt on line 18</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>EVEN</name>
|
|
<displayName>EVEN</displayName>
|
|
<description>Event enable register (EXTI_EVEN)</description>
|
|
<addressOffset>0x04</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EVEN0</name>
|
|
<description>Enable Event on line 0</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>EVEN1</name>
|
|
<description>Enable Event on line 1</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>EVEN2</name>
|
|
<description>Enable Event on line 2</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>EVEN3</name>
|
|
<description>Enable Event on line 3</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>EVEN4</name>
|
|
<description>Enable Event on line 4</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>EVEN5</name>
|
|
<description>Enable Event on line 5</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>EVEN6</name>
|
|
<description>Enable Event on line 6</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>EVEN7</name>
|
|
<description>Enable Event on line 7</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>EVEN8</name>
|
|
<description>Enable Event on line 8</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>EVEN9</name>
|
|
<description>Enable Event on line 9</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>EVEN10</name>
|
|
<description>Enable Event on line 10</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>EVEN11</name>
|
|
<description>Enable Event on line 11</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>EVEN12</name>
|
|
<description>Enable Event on line 12</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>EVEN13</name>
|
|
<description>Enable Event on line 13</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>EVEN14</name>
|
|
<description>Enable Event on line 14</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>EVEN15</name>
|
|
<description>Enable Event on line 15</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>EVEN16</name>
|
|
<description>Enable Event on line 16</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>EVEN17</name>
|
|
<description>Enable Event on line 17</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>EVEN18</name>
|
|
<description>Enable Event on line 18</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RTEN</name>
|
|
<displayName>RTEN</displayName>
|
|
<description>Rising Edge Trigger Enable register
|
|
(EXTI_RTEN)</description>
|
|
<addressOffset>0x08</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>RTEN0</name>
|
|
<description>Rising edge trigger enable of
|
|
line 0</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>RTEN1</name>
|
|
<description>Rising edge trigger enable of
|
|
line 1</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>RTEN2</name>
|
|
<description>Rising edge trigger enable of
|
|
line 2</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>RTEN3</name>
|
|
<description>Rising edge trigger enable of
|
|
line 3</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>RTEN4</name>
|
|
<description>Rising edge trigger enable of
|
|
line 4</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>RTEN5</name>
|
|
<description>Rising edge trigger enable of
|
|
line 5</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>RTEN6</name>
|
|
<description>Rising edge trigger enable of
|
|
line 6</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>RTEN7</name>
|
|
<description>Rising edge trigger enable of
|
|
line 7</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>RTEN8</name>
|
|
<description>Rising edge trigger enable of
|
|
line 8</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>RTEN9</name>
|
|
<description>Rising edge trigger enable of
|
|
line 9</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>RTEN10</name>
|
|
<description>Rising edge trigger enable of
|
|
line 10</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>RTEN11</name>
|
|
<description>Rising edge trigger enable of
|
|
line 11</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>RTEN12</name>
|
|
<description>Rising edge trigger enable of
|
|
line 12</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>RTEN13</name>
|
|
<description>Rising edge trigger enable of
|
|
line 13</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>RTEN14</name>
|
|
<description>Rising edge trigger enable of
|
|
line 14</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>RTEN15</name>
|
|
<description>Rising edge trigger enable of
|
|
line 15</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>RTEN16</name>
|
|
<description>Rising edge trigger enable of
|
|
line 16</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>RTEN17</name>
|
|
<description>Rising edge trigger enable of
|
|
line 17</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>RTEN18</name>
|
|
<description>Rising edge trigger enable of
|
|
line 18</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FTEN</name>
|
|
<displayName>FTEN</displayName>
|
|
<description>Falling Egde Trigger Enable register
|
|
(EXTI_FTEN)</description>
|
|
<addressOffset>0x0C</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FTEN0</name>
|
|
<description>Falling edge trigger enable of
|
|
line 0</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FTEN1</name>
|
|
<description>Falling edge trigger enable of
|
|
line 1</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FTEN2</name>
|
|
<description>Falling edge trigger enable of
|
|
line 2</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FTEN3</name>
|
|
<description>Falling edge trigger enable of
|
|
line 3</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FTEN4</name>
|
|
<description>Falling edge trigger enable of
|
|
line 4</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FTEN5</name>
|
|
<description>Falling edge trigger enable of
|
|
line 5</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FTEN6</name>
|
|
<description>Falling edge trigger enable of
|
|
line 6</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FTEN7</name>
|
|
<description>Falling edge trigger enable of
|
|
line 7</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FTEN8</name>
|
|
<description>Falling edge trigger enable of
|
|
line 8</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FTEN9</name>
|
|
<description>Falling edge trigger enable of
|
|
line 9</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FTEN10</name>
|
|
<description>Falling edge trigger enable of
|
|
line 10</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FTEN11</name>
|
|
<description>Falling edge trigger enable of
|
|
line 11</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FTEN12</name>
|
|
<description>Falling edge trigger enable of
|
|
line 12</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FTEN13</name>
|
|
<description>Falling edge trigger enable of
|
|
line 13</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FTEN14</name>
|
|
<description>Falling edge trigger enable of
|
|
line 14</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FTEN15</name>
|
|
<description>Falling edge trigger enable of
|
|
line 15</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FTEN16</name>
|
|
<description>Falling edge trigger enable of
|
|
line 16</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FTEN17</name>
|
|
<description>Falling edge trigger enable of
|
|
line 17</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FTEN18</name>
|
|
<description>Falling edge trigger enable of
|
|
line 18</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SWIEV</name>
|
|
<displayName>SWIEV</displayName>
|
|
<description>Software interrupt event register
|
|
(EXTI_SWIEV)</description>
|
|
<addressOffset>0x10</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SWIEV0</name>
|
|
<description>Interrupt/Event software trigger on line
|
|
0</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>SWIEV1</name>
|
|
<description>Interrupt/Event software trigger on line
|
|
1</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>SWIEV2</name>
|
|
<description>Interrupt/Event software trigger on line
|
|
2</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>SWIEV3</name>
|
|
<description>Interrupt/Event software trigger on line
|
|
3</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>SWIEV4</name>
|
|
<description>Interrupt/Event software trigger on line
|
|
4</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>SWIEV5</name>
|
|
<description>Interrupt/Event software trigger on line
|
|
5</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>SWIEV6</name>
|
|
<description>Interrupt/Event software trigger on line
|
|
6</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>SWIEV7</name>
|
|
<description>Interrupt/Event software trigger on line
|
|
7</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>SWIEV8</name>
|
|
<description>Interrupt/Event software trigger on line
|
|
8</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>SWIEV9</name>
|
|
<description>Interrupt/Event software trigger on line
|
|
9</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>SWIEV10</name>
|
|
<description>Interrupt/Event software trigger on line
|
|
10</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>SWIEV11</name>
|
|
<description>Interrupt/Event software trigger on line
|
|
11</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>SWIEV12</name>
|
|
<description>Interrupt/Event software trigger on line
|
|
12</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>SWIEV13</name>
|
|
<description>Interrupt/Event software trigger on line
|
|
13</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>SWIEV14</name>
|
|
<description>Interrupt/Event software trigger on line
|
|
14</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>SWIEV15</name>
|
|
<description>Interrupt/Event software trigger on line
|
|
15</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>SWIEV16</name>
|
|
<description>Interrupt/Event software trigger on line
|
|
16</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>SWIEV17</name>
|
|
<description>Interrupt/Event software trigger on line
|
|
17</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>SWIEV18</name>
|
|
<description>Interrupt/Event software trigger on line
|
|
18</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PD</name>
|
|
<displayName>PD</displayName>
|
|
<description>Pending register (EXTI_PD)</description>
|
|
<addressOffset>0x14</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>PD0</name>
|
|
<description>Interrupt pending status of line 0</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PD1</name>
|
|
<description>Interrupt pending status of line 1</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PD2</name>
|
|
<description>Interrupt pending status of line 2</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PD3</name>
|
|
<description>Interrupt pending status of line 3</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PD4</name>
|
|
<description>Interrupt pending status of line 4</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PD5</name>
|
|
<description>Interrupt pending status of line 5</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PD6</name>
|
|
<description>Interrupt pending status of line 6</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PD7</name>
|
|
<description>Interrupt pending status of line 7</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PD8</name>
|
|
<description>Interrupt pending status of line 8</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PD9</name>
|
|
<description>Interrupt pending status of line 9</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PD10</name>
|
|
<description>Interrupt pending status of line 10</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PD11</name>
|
|
<description>Interrupt pending status of line 11</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PD12</name>
|
|
<description>Interrupt pending status of line 12</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PD13</name>
|
|
<description>Interrupt pending status of line 13</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PD14</name>
|
|
<description>Interrupt pending status of line 14</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PD15</name>
|
|
<description>Interrupt pending status of line 15</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PD16</name>
|
|
<description>Interrupt pending status of line 16</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PD17</name>
|
|
<description>Interrupt pending status of line 17</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PD18</name>
|
|
<description>Interrupt pending status of line 18</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>FMC</name>
|
|
<description>FMC</description>
|
|
<groupName>FMC</groupName>
|
|
<baseAddress>0x40022000</baseAddress>
|
|
<addressBlock>
|
|
<offset>0x0</offset>
|
|
<size>0x400</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<interrupt>
|
|
<name>FMC</name>
|
|
<value>23</value>
|
|
</interrupt>
|
|
<registers>
|
|
<register>
|
|
<name>WS</name>
|
|
<displayName>WS</displayName>
|
|
<description>wait state counter register</description>
|
|
<addressOffset>0x0</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>WSCNT</name>
|
|
<description>wait state counter register</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>KEY0</name>
|
|
<displayName>KEY0</displayName>
|
|
<description>Unlock key register 0</description>
|
|
<addressOffset>0x04</addressOffset>
|
|
<size>0x20</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>KEY</name>
|
|
<description>FMC_CTL0 unlock key</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>32</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>OBKEY</name>
|
|
<displayName>OBKEY</displayName>
|
|
<description>Option byte unlock key register</description>
|
|
<addressOffset>0x08</addressOffset>
|
|
<size>0x20</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>OBKEY</name>
|
|
<description>FMC_ CTL0 option byte operation unlock register</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>32</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>STAT0</name>
|
|
<displayName>STAT0</displayName>
|
|
<description>Status register 0</description>
|
|
<addressOffset>0x0C</addressOffset>
|
|
<size>0x20</size>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>ENDF</name>
|
|
<description>End of operation flag bit</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>WPERR</name>
|
|
<description>Erase/Program protection error flag bit</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>PGERR</name>
|
|
<description>Program error flag bit</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>BUSY</name>
|
|
<description>The flash is busy bit</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CTL0</name>
|
|
<displayName>CTL0</displayName>
|
|
<description>Control register 0</description>
|
|
<addressOffset>0x10</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000080</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>ENDIE</name>
|
|
<description>End of operation interrupt enable bit</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ERRIE</name>
|
|
<description>Error interrupt enable bit</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>OBWEN</name>
|
|
<description>Option byte erase/program enable bit</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>LK</name>
|
|
<description>FMC_CTL0 lock bit</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>START</name>
|
|
<description>Send erase command to FMC bit</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>OBER</name>
|
|
<description>Option bytes erase command bit</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>OBPG</name>
|
|
<description>Option bytes program command bit</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>MER</name>
|
|
<description>Main flash mass erase for bank0 command bit</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PER</name>
|
|
<description>Main flash page erase for bank0 command bit</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PG</name>
|
|
<description>Main flash program for bank0 command bit</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>ADDR0</name>
|
|
<displayName>ADDR0</displayName>
|
|
<description>Address register 0</description>
|
|
<addressOffset>0x14</addressOffset>
|
|
<size>0x20</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>ADDR</name>
|
|
<description>Flash erase/program command address bits</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>32</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>OBSTAT</name>
|
|
<displayName>OBSTAT</displayName>
|
|
<description>Option byte status register</description>
|
|
<addressOffset>0x1C</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>OBERR</name>
|
|
<description>Option bytes read error bit</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>SPC</name>
|
|
<description>Option bytes security protection code</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>USER</name>
|
|
<description>Store USER of option bytes block after system reset</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DATA</name>
|
|
<description>Store DATA[15:0] of option bytes block after system reset</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>WP</name>
|
|
<displayName>WP</displayName>
|
|
<description>Erase/Program Protection register</description>
|
|
<addressOffset>0x20</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>WP</name>
|
|
<description>Store WP[31:0] of option bytes block after system reset</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>32</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PID</name>
|
|
<displayName>PID</displayName>
|
|
<description>Product ID register</description>
|
|
<addressOffset>0x100</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>PID</name>
|
|
<description>Product reserved ID code register</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>32</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>FWDGT</name>
|
|
<description>free watchdog timer</description>
|
|
<groupName>FWDGT</groupName>
|
|
<baseAddress>0x40003000</baseAddress>
|
|
<addressBlock>
|
|
<offset>0x0</offset>
|
|
<size>0x400</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<registers>
|
|
<register>
|
|
<name>CTL</name>
|
|
<displayName>CTL</displayName>
|
|
<description>Control register</description>
|
|
<addressOffset>0x00</addressOffset>
|
|
<size>0x20</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CMD</name>
|
|
<description>Key value</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PSC</name>
|
|
<displayName>PSC</displayName>
|
|
<description>Prescaler register</description>
|
|
<addressOffset>0x04</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>PSC</name>
|
|
<description>Free watchdog timer prescaler selection</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RLD</name>
|
|
<displayName>RLD</displayName>
|
|
<description>Reload register</description>
|
|
<addressOffset>0x08</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000FFF</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>RLD</name>
|
|
<description>Free watchdog timer counter reload value</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>12</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>STAT</name>
|
|
<displayName>STAT</displayName>
|
|
<description>Status register</description>
|
|
<addressOffset>0x0C</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>PUD</name>
|
|
<description>Free watchdog timer prescaler value update</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>RUD</name>
|
|
<description>Free watchdog timer counter reload value update</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>GPIOA</name>
|
|
<description>General-purpose I/Os</description>
|
|
<groupName>GPIO</groupName>
|
|
<baseAddress>0x40010800</baseAddress>
|
|
<addressBlock>
|
|
<offset>0x0</offset>
|
|
<size>0x400</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<registers>
|
|
<register>
|
|
<name>CTL0</name>
|
|
<displayName>CTL0</displayName>
|
|
<description>port control register 0</description>
|
|
<addressOffset>0x0</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x44444444</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CTL7</name>
|
|
<description>Port x configuration bits (x =
|
|
7)</description>
|
|
<bitOffset>30</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>MD7</name>
|
|
<description>Port x mode bits (x =
|
|
7)</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CTL6</name>
|
|
<description>Port x configuration bits (x =
|
|
6)</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>MD6</name>
|
|
<description>Port x mode bits (x =
|
|
6)</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CTL5</name>
|
|
<description>Port x configuration bits (x =
|
|
5)</description>
|
|
<bitOffset>22</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>MD5</name>
|
|
<description>Port x mode bits (x =
|
|
5)</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CTL4</name>
|
|
<description>Port x configuration bits (x =
|
|
4)</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>MD4</name>
|
|
<description>Port x mode bits (x =
|
|
4)</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CTL3</name>
|
|
<description>Port x configuration bits (x =
|
|
3)</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>MD3</name>
|
|
<description>Port x mode bits (x =
|
|
3 )</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CTL2</name>
|
|
<description>Port x configuration bits (x =
|
|
2)</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>MD2</name>
|
|
<description>Port x mode bits (x =
|
|
2 )</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CTL1</name>
|
|
<description>Port x configuration bits (x =
|
|
1)</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>MD1</name>
|
|
<description>Port x mode bits (x =
|
|
1)</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CTL0</name>
|
|
<description>Port x configuration bits (x =
|
|
0)</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>MD0</name>
|
|
<description>Port x mode bits (x =
|
|
0)</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CTL1</name>
|
|
<displayName>CTL1</displayName>
|
|
<description>port control register 1</description>
|
|
<addressOffset>0x04</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x44444444</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CTL15</name>
|
|
<description>Port x configuration bits (x =
|
|
15)</description>
|
|
<bitOffset>30</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>MD15</name>
|
|
<description>Port x mode bits (x =
|
|
15)</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CTL14</name>
|
|
<description>Port x configuration bits (x =
|
|
14)</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>MD14</name>
|
|
<description>Port x mode bits (x =
|
|
14)</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CTL13</name>
|
|
<description>Port x configuration bits (x =
|
|
13)</description>
|
|
<bitOffset>22</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>MD13</name>
|
|
<description>Port x mode bits (x =
|
|
13)</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CTL12</name>
|
|
<description>Port x configuration bits (x =
|
|
12)</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>MD12</name>
|
|
<description>Port x mode bits (x =
|
|
12)</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CTL11</name>
|
|
<description>Port x configuration bits (x =
|
|
11)</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>MD11</name>
|
|
<description>Port x mode bits (x =
|
|
11 )</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CTL10</name>
|
|
<description>Port x configuration bits (x =
|
|
10)</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>MD10</name>
|
|
<description>Port x mode bits (x =
|
|
10 )</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CTL9</name>
|
|
<description>Port x configuration bits (x =
|
|
9)</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>MD9</name>
|
|
<description>Port x mode bits (x =
|
|
9)</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CTL8</name>
|
|
<description>Port x configuration bits (x =
|
|
8)</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>MD8</name>
|
|
<description>Port x mode bits (x =
|
|
8)</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>ISTAT</name>
|
|
<displayName>ISTAT</displayName>
|
|
<description>Port input status register</description>
|
|
<addressOffset>0x08</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>ISTAT15</name>
|
|
<description>Port input status</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ISTAT14</name>
|
|
<description>Port input status</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ISTAT13</name>
|
|
<description>Port input status</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ISTAT12</name>
|
|
<description>Port input status</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ISTAT11</name>
|
|
<description>Port input status</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ISTAT10</name>
|
|
<description>Port input status</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ISTAT9</name>
|
|
<description>Port input status</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ISTAT8</name>
|
|
<description>Port input status</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ISTAT7</name>
|
|
<description>Port input status</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ISTAT6</name>
|
|
<description>Port input status</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ISTAT5</name>
|
|
<description>Port input status</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ISTAT4</name>
|
|
<description>Port input status</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ISTAT3</name>
|
|
<description>Port input status</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ISTAT2</name>
|
|
<description>Port input status</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ISTAT1</name>
|
|
<description>Port input status</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ISTAT0</name>
|
|
<description>Port input status</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>OCTL</name>
|
|
<displayName>OCTL</displayName>
|
|
<description>Port output control register</description>
|
|
<addressOffset>0x0C</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>OCTL15</name>
|
|
<description>Port output control</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>OCTL14</name>
|
|
<description>Port output control</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>OCTL13</name>
|
|
<description>Port output control</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>OCTL12</name>
|
|
<description>Port output control</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>OCTL11</name>
|
|
<description>Port output control</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>OCTL10</name>
|
|
<description>Port output control</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>OCTL9</name>
|
|
<description>Port output control</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>OCTL8</name>
|
|
<description>Port output control</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>OCTL7</name>
|
|
<description>Port output control</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>OCTL6</name>
|
|
<description>Port output control</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>OCTL5</name>
|
|
<description>Port output control</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>OCTL4</name>
|
|
<description>Port output control</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>OCTL3</name>
|
|
<description>Port output control</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>OCTL2</name>
|
|
<description>Port output control</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>OCTL1</name>
|
|
<description>Port output control</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>OCTL0</name>
|
|
<description>Port output control</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>BOP</name>
|
|
<displayName>BOP</displayName>
|
|
<description>Port bit operate register</description>
|
|
<addressOffset>0x10</addressOffset>
|
|
<size>0x20</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CR15</name>
|
|
<description>Port 15 Clear bit</description>
|
|
<bitOffset>31</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CR14</name>
|
|
<description>Port 14 Clear bit</description>
|
|
<bitOffset>30</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CR13</name>
|
|
<description>Port 13 Clear bit</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CR12</name>
|
|
<description>Port 12 Clear bit</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CR11</name>
|
|
<description>Port 11 Clear bit</description>
|
|
<bitOffset>27</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CR10</name>
|
|
<description>Port 10 Clear bit</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CR9</name>
|
|
<description>Port 9 Clear bit</description>
|
|
<bitOffset>25</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CR8</name>
|
|
<description>Port 8 Clear bit</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CR7</name>
|
|
<description>Port 7 Clear bit</description>
|
|
<bitOffset>23</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CR6</name>
|
|
<description>Port 6 Clear bit</description>
|
|
<bitOffset>22</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CR5</name>
|
|
<description>Port 5 Clear bit</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CR4</name>
|
|
<description>Port 4 Clear bit</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CR3</name>
|
|
<description>Port 3 Clear bit</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CR2</name>
|
|
<description>Port 2 Clear bit</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CR1</name>
|
|
<description>Port 1 Clear bit</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CR0</name>
|
|
<description>Port 0 Clear bit</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>BOP15</name>
|
|
<description>Port 15 Set bit</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>BOP14</name>
|
|
<description>Port 14 Set bit</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>BOP13</name>
|
|
<description>Port 13 Set bit</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>BOP12</name>
|
|
<description>Port 12 Set bit</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>BOP11</name>
|
|
<description>Port 11 Set bit</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>BOP10</name>
|
|
<description>Port 10 Set bit</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>BOP9</name>
|
|
<description>Port 9 Set bit</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>BOP8</name>
|
|
<description>Port 8 Set bit</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>BOP7</name>
|
|
<description>Port 7 Set bit</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>BOP6</name>
|
|
<description>Port 6 Set bit</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>BOP5</name>
|
|
<description>Port 5 Set bit</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>BOP4</name>
|
|
<description>Port 4 Set bit</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>BOP3</name>
|
|
<description>Port 3 Set bit</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>BOP2</name>
|
|
<description>Port 2 Set bit</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>BOP1</name>
|
|
<description>Port 1 Set bit</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>BOP0</name>
|
|
<description>Port 0 Set bit</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>BC</name>
|
|
<displayName>BC</displayName>
|
|
<description>Port bit clear register</description>
|
|
<addressOffset>0x14</addressOffset>
|
|
<size>0x20</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CR15</name>
|
|
<description>Port 15 Clear bit</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CR14</name>
|
|
<description>Port 14 Clear bit</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CR13</name>
|
|
<description>Port 13 Clear bit</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CR12</name>
|
|
<description>Port 12 Clear bit</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CR11</name>
|
|
<description>Port 11 Clear bit</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CR10</name>
|
|
<description>Port 10 Clear bit</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CR9</name>
|
|
<description>Port 9 Clear bit</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CR8</name>
|
|
<description>Port 8 Clear bit</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CR7</name>
|
|
<description>Port 7 Clear bit</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CR6</name>
|
|
<description>Port 6 Clear bit</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CR5</name>
|
|
<description>Port 5 Clear bit</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CR4</name>
|
|
<description>Port 4 Clear bit</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CR3</name>
|
|
<description>Port 3 Clear bit</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CR2</name>
|
|
<description>Port 2 Clear bit</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CR1</name>
|
|
<description>Port 1 Clear bit</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CR0</name>
|
|
<description>Port 0 Clear bit</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>LOCK</name>
|
|
<displayName>LOCK</displayName>
|
|
<description>GPIO port configuration lock
|
|
register</description>
|
|
<addressOffset>0x18</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LKK</name>
|
|
<description>Lock sequence key
|
|
</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>LK15</name>
|
|
<description>Port Lock bit 15</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>LK14</name>
|
|
<description>Port Lock bit 14</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>LK13</name>
|
|
<description>Port Lock bit 13</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>LK12</name>
|
|
<description>Port Lock bit 12</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>LK11</name>
|
|
<description>Port Lock bit 11</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>LK10</name>
|
|
<description>Port Lock bit 10</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>LK9</name>
|
|
<description>Port Lock bit 9</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>LK8</name>
|
|
<description>Port Lock bit 8</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>LK7</name>
|
|
<description>Port Lock bit 7</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>LK6</name>
|
|
<description>Port Lock bit 6</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>LK5</name>
|
|
<description>Port Lock bit 5</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>LK4</name>
|
|
<description>Port Lock bit 4</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>LK3</name>
|
|
<description>Port Lock bit 3</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>LK2</name>
|
|
<description>Port Lock bit 2</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>LK1</name>
|
|
<description>Port Lock bit 1</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>LK0</name>
|
|
<description>Port Lock bit 0</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral>
|
|
<peripheral derivedFrom="GPIOA">
|
|
<name>GPIOB</name>
|
|
<baseAddress>0x40010C00</baseAddress>
|
|
</peripheral>
|
|
<peripheral derivedFrom="GPIOA">
|
|
<name>GPIOC</name>
|
|
<baseAddress>0x40011000</baseAddress>
|
|
</peripheral>
|
|
<peripheral derivedFrom="GPIOA">
|
|
<name>GPIOD</name>
|
|
<baseAddress>0x40011400</baseAddress>
|
|
</peripheral>
|
|
<peripheral derivedFrom="GPIOA">
|
|
<name>GPIOE</name>
|
|
<baseAddress>0x40011800</baseAddress>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>I2C0</name>
|
|
<description>Inter integrated circuit</description>
|
|
<groupName>I2C</groupName>
|
|
<baseAddress>0x40005400</baseAddress>
|
|
<addressBlock>
|
|
<offset>0x0</offset>
|
|
<size>0x400</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<interrupt>
|
|
<name>I2C0_EV</name>
|
|
<value>50</value>
|
|
</interrupt>
|
|
<interrupt>
|
|
<name>I2C0_ER</name>
|
|
<value>51</value>
|
|
</interrupt>
|
|
<registers>
|
|
<register>
|
|
<name>CTL0</name>
|
|
<displayName>CTL0</displayName>
|
|
<description>Control register 0</description>
|
|
<addressOffset>0x0</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SRESET</name>
|
|
<description>Software reset</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>SALT</name>
|
|
<description>SMBus alert</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PECTRANS</name>
|
|
<description>PEC Transfer</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>POAP</name>
|
|
<description>Position of ACK and PEC when receiving</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ACKEN</name>
|
|
<description>Whether or not to send an ACK</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>STOP</name>
|
|
<description>Generate a STOP condition on I2C bus</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>START</name>
|
|
<description>Generate a START condition on I2C bus</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>SS</name>
|
|
<description>Whether to stretch SCL low when data is not ready in slave mode</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>GCEN</name>
|
|
<description>Whether or not to response to a General Call (0x00)</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PECEN</name>
|
|
<description>PEC Calculation Switch</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ARPEN</name>
|
|
<description>ARP protocol in SMBus switch</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>SMBSEL</name>
|
|
<description>SMBusType Selection</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>SMBEN</name>
|
|
<description>SMBus/I2C mode switch</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>I2CEN</name>
|
|
<description>I2C peripheral enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CTL1</name>
|
|
<displayName>CTL1</displayName>
|
|
<description>Control register 1</description>
|
|
<addressOffset>0x04</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DMALST</name>
|
|
<description>Flag indicating DMA last transfer</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DMAON</name>
|
|
<description>DMA mode switch</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>BUFIE</name>
|
|
<description>Buffer interrupt enable</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>EVIE</name>
|
|
<description>Event interrupt enable</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ERRIE</name>
|
|
<description>Error interrupt enable</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>I2CCLK</name>
|
|
<description>I2C Peripheral clock frequency</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>6</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SADDR0</name>
|
|
<displayName>SADDR0</displayName>
|
|
<description>Slave address register 0</description>
|
|
<addressOffset>0x08</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>ADDFORMAT</name>
|
|
<description>Address mode for the I2C slave</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ADDRESS9_8</name>
|
|
<description>Highest two bits of a 10-bit address</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ADDRESS7_1</name>
|
|
<description>7-bit address or bits 7:1 of a 10-bit address</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>7</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ADDRESS0</name>
|
|
<description>Bit 0 of a 10-bit address</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SADDR1</name>
|
|
<displayName>SADDR1</displayName>
|
|
<description>Slave address register 1</description>
|
|
<addressOffset>0x0C</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>ADDRESS2</name>
|
|
<description>Second I2C address for the slave in Dual-Address mode</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>7</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DUADEN</name>
|
|
<description>Dual-Address mode switch</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DATA</name>
|
|
<displayName>DATA</displayName>
|
|
<description>Transfer buffer register</description>
|
|
<addressOffset>0x10</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TRB</name>
|
|
<description>Transmission or reception data buffer register</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>STAT0</name>
|
|
<displayName>STAT0</displayName>
|
|
<description>Transfer status register 0</description>
|
|
<addressOffset>0x14</addressOffset>
|
|
<size>0x10</size>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SMBALT</name>
|
|
<description>SMBus Alert status</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>SMBTO</name>
|
|
<description>Timeout signal in SMBus mode</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>PECERR</name>
|
|
<description>PEC error when receiving data</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>OUERR</name>
|
|
<description>Over-run or under-run situation occurs in slave mode</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>AERR</name>
|
|
<description>Acknowledge error</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>LOSTARB</name>
|
|
<description>Arbitration Lost in master mode</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>BERR</name>
|
|
<description>A bus error occurs indication a unexpected START or STOP condition on I2C bus</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>TBE</name>
|
|
<description>I2C_DATA is Empty during transmitting</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RBNE</name>
|
|
<description>I2C_DATA is not Empty during receiving</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>STPDET</name>
|
|
<description>STOP condition detected in slave mode</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>ADD10SEND</name>
|
|
<description>Header of 10-bit address is sent in master mode</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>BTC</name>
|
|
<description>Byte transmission completed</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>ADDSEND</name>
|
|
<description>Address is sent in master mode or received and matches in slave mode</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>SBSEND</name>
|
|
<description>START condition sent out in master mode</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>STAT1</name>
|
|
<displayName>STAT1</displayName>
|
|
<description>Transfer status register 1</description>
|
|
<addressOffset>0x18</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>PECV</name>
|
|
<description>Packet Error Checking Value that calculated by hardware when PEC is enabled</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DUMODF</name>
|
|
<description>Dual Flag in slave mode</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>HSTSMB</name>
|
|
<description>SMBus Host Header detected in slave mode</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DEFSMB</name>
|
|
<description>Default address of SMBusDevice</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>RXGC</name>
|
|
<description>General call address (00h) received</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TR</name>
|
|
<description>Whether the I2C is a transmitter or a receiver</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>I2CBSY</name>
|
|
<description>Busy flag</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>MASTER</name>
|
|
<description>A flag indicating whether I2C block is in master or slave mode</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CKCFG</name>
|
|
<displayName>CKCFG</displayName>
|
|
<description>Clock configure register</description>
|
|
<addressOffset>0x1C</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FAST</name>
|
|
<description>I2C speed selection in master mode</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DTCY</name>
|
|
<description>Duty cycle in fast mode</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CLKC</name>
|
|
<description>I2C Clock control in master mode</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>12</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RT</name>
|
|
<displayName>RT</displayName>
|
|
<description>Rise time register</description>
|
|
<addressOffset>0x20</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0002</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>RISETIME</name>
|
|
<description>Maximum rise time in master mode</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>6</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral>
|
|
<peripheral derivedFrom="I2C0">
|
|
<name>I2C1</name>
|
|
<baseAddress>0x40005800</baseAddress>
|
|
<interrupt>
|
|
<name>I2C1_EV</name>
|
|
<value>52</value>
|
|
</interrupt>
|
|
<interrupt>
|
|
<name>I2C1_ER</name>
|
|
<value>53</value>
|
|
</interrupt>
|
|
</peripheral>
|
|
|
|
<peripheral>
|
|
<name>ECLIC</name>
|
|
<description>Enhanced Core Local Interrupt Controller</description>
|
|
<groupName>ECLIC</groupName>
|
|
<baseAddress>0xD2000000</baseAddress>
|
|
<addressBlock>
|
|
<offset>0x0</offset>
|
|
<size>0xFFFF</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<registers>
|
|
<register>
|
|
<name>CLICCFG</name>
|
|
<displayName>CLICCFG</displayName>
|
|
<description>cliccfg Register</description>
|
|
<addressOffset>0x0</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>NLBITS</name>
|
|
<description>NLBITS</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINFO</name>
|
|
<displayName>CLICINFO</displayName>
|
|
<description>clicinfo Register</description>
|
|
<addressOffset>0x04</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>NUM_INTERRUPT</name>
|
|
<description>NUM_INTERRUPT</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>13</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>VERSION</name>
|
|
<description>VERSION</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CLICINTCTLBITS</name>
|
|
<description>CLICINTCTLBITS</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>MTH</name>
|
|
<displayName>MTH</displayName>
|
|
<description>MTH Register</description>
|
|
<addressOffset>0x0b</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>MTH</name>
|
|
<description>MTH</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIP_0</name>
|
|
<displayName>CLICINTIP_0</displayName>
|
|
<description>clicintip Register</description>
|
|
<addressOffset>0x1000</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IP</name>
|
|
<description>IP</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIP_1</name>
|
|
<displayName>CLICINTIP_1</displayName>
|
|
<description>clicintip Register</description>
|
|
<addressOffset>0x1004</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IP</name>
|
|
<description>IP</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIP_2</name>
|
|
<displayName>CLICINTIP_2</displayName>
|
|
<description>clicintip Register</description>
|
|
<addressOffset>0x1008</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IP</name>
|
|
<description>IP</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIP_3</name>
|
|
<displayName>CLICINTIP_3</displayName>
|
|
<description>clicintip Register</description>
|
|
<addressOffset>0x100C</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IP</name>
|
|
<description>IP</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIP_4</name>
|
|
<displayName>CLICINTIP_4</displayName>
|
|
<description>clicintip Register</description>
|
|
<addressOffset>0x1010</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IP</name>
|
|
<description>IP</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIP_5</name>
|
|
<displayName>CLICINTIP_5</displayName>
|
|
<description>clicintip Register</description>
|
|
<addressOffset>0x1014</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IP</name>
|
|
<description>IP</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIP_6</name>
|
|
<displayName>CLICINTIP_6</displayName>
|
|
<description>clicintip Register</description>
|
|
<addressOffset>0x1018</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IP</name>
|
|
<description>IP</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIP_7</name>
|
|
<displayName>CLICINTIP_7</displayName>
|
|
<description>clicintip Register</description>
|
|
<addressOffset>0x101C</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IP</name>
|
|
<description>IP</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIP_8</name>
|
|
<displayName>CLICINTIP_8</displayName>
|
|
<description>clicintip Register</description>
|
|
<addressOffset>0x1020</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IP</name>
|
|
<description>IP</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIP_9</name>
|
|
<displayName>CLICINTIP_9</displayName>
|
|
<description>clicintip Register</description>
|
|
<addressOffset>0x1024</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IP</name>
|
|
<description>IP</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIP_10</name>
|
|
<displayName>CLICINTIP_10</displayName>
|
|
<description>clicintip Register</description>
|
|
<addressOffset>0x1028</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IP</name>
|
|
<description>IP</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIP_11</name>
|
|
<displayName>CLICINTIP_11</displayName>
|
|
<description>clicintip Register</description>
|
|
<addressOffset>0x102C</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IP</name>
|
|
<description>IP</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIP_12</name>
|
|
<displayName>CLICINTIP_12</displayName>
|
|
<description>clicintip Register</description>
|
|
<addressOffset>0x1030</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IP</name>
|
|
<description>IP</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIP_13</name>
|
|
<displayName>CLICINTIP_13</displayName>
|
|
<description>clicintip Register</description>
|
|
<addressOffset>0x1034</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IP</name>
|
|
<description>IP</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIP_14</name>
|
|
<displayName>CLICINTIP_14</displayName>
|
|
<description>clicintip Register</description>
|
|
<addressOffset>0x1038</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IP</name>
|
|
<description>IP</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIP_15</name>
|
|
<displayName>CLICINTIP_15</displayName>
|
|
<description>clicintip Register</description>
|
|
<addressOffset>0x103C</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IP</name>
|
|
<description>IP</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIP_16</name>
|
|
<displayName>CLICINTIP_16</displayName>
|
|
<description>clicintip Register</description>
|
|
<addressOffset>0x1040</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IP</name>
|
|
<description>IP</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIP_17</name>
|
|
<displayName>CLICINTIP_17</displayName>
|
|
<description>clicintip Register</description>
|
|
<addressOffset>0x1044</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IP</name>
|
|
<description>IP</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIP_18</name>
|
|
<displayName>CLICINTIP_18</displayName>
|
|
<description>clicintip Register</description>
|
|
<addressOffset>0x1048</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IP</name>
|
|
<description>IP</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIP_19</name>
|
|
<displayName>CLICINTIP_19</displayName>
|
|
<description>clicintip Register</description>
|
|
<addressOffset>0x104C</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IP</name>
|
|
<description>IP</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIP_20</name>
|
|
<displayName>CLICINTIP_20</displayName>
|
|
<description>clicintip Register</description>
|
|
<addressOffset>0x1050</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IP</name>
|
|
<description>IP</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIP_21</name>
|
|
<displayName>CLICINTIP_21</displayName>
|
|
<description>clicintip Register</description>
|
|
<addressOffset>0x1054</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IP</name>
|
|
<description>IP</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIP_22</name>
|
|
<displayName>CLICINTIP_22</displayName>
|
|
<description>clicintip Register</description>
|
|
<addressOffset>0x1058</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IP</name>
|
|
<description>IP</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIP_23</name>
|
|
<displayName>CLICINTIP_23</displayName>
|
|
<description>clicintip Register</description>
|
|
<addressOffset>0x105C</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IP</name>
|
|
<description>IP</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIP_24</name>
|
|
<displayName>CLICINTIP_24</displayName>
|
|
<description>clicintip Register</description>
|
|
<addressOffset>0x1060</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IP</name>
|
|
<description>IP</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIP_25</name>
|
|
<displayName>CLICINTIP_25</displayName>
|
|
<description>clicintip Register</description>
|
|
<addressOffset>0x1064</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IP</name>
|
|
<description>IP</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIP_26</name>
|
|
<displayName>CLICINTIP_26</displayName>
|
|
<description>clicintip Register</description>
|
|
<addressOffset>0x1068</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IP</name>
|
|
<description>IP</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIP_27</name>
|
|
<displayName>CLICINTIP_27</displayName>
|
|
<description>clicintip Register</description>
|
|
<addressOffset>0x106C</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IP</name>
|
|
<description>IP</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIP_28</name>
|
|
<displayName>CLICINTIP_28</displayName>
|
|
<description>clicintip Register</description>
|
|
<addressOffset>0x1070</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IP</name>
|
|
<description>IP</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIP_29</name>
|
|
<displayName>CLICINTIP_29</displayName>
|
|
<description>clicintip Register</description>
|
|
<addressOffset>0x1074</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IP</name>
|
|
<description>IP</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIP_30</name>
|
|
<displayName>CLICINTIP_30</displayName>
|
|
<description>clicintip Register</description>
|
|
<addressOffset>0x1078</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IP</name>
|
|
<description>IP</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIP_31</name>
|
|
<displayName>CLICINTIP_31</displayName>
|
|
<description>clicintip Register</description>
|
|
<addressOffset>0x107C</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IP</name>
|
|
<description>IP</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIP_32</name>
|
|
<displayName>CLICINTIP_32</displayName>
|
|
<description>clicintip Register</description>
|
|
<addressOffset>0x1080</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IP</name>
|
|
<description>IP</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIP_33</name>
|
|
<displayName>CLICINTIP_33</displayName>
|
|
<description>clicintip Register</description>
|
|
<addressOffset>0x1084</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IP</name>
|
|
<description>IP</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIP_34</name>
|
|
<displayName>CLICINTIP_34</displayName>
|
|
<description>clicintip Register</description>
|
|
<addressOffset>0x1088</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IP</name>
|
|
<description>IP</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIP_35</name>
|
|
<displayName>CLICINTIP_35</displayName>
|
|
<description>clicintip Register</description>
|
|
<addressOffset>0x108C</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IP</name>
|
|
<description>IP</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIP_36</name>
|
|
<displayName>CLICINTIP_36</displayName>
|
|
<description>clicintip Register</description>
|
|
<addressOffset>0x1090</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IP</name>
|
|
<description>IP</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIP_37</name>
|
|
<displayName>CLICINTIP_37</displayName>
|
|
<description>clicintip Register</description>
|
|
<addressOffset>0x1094</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IP</name>
|
|
<description>IP</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIP_38</name>
|
|
<displayName>CLICINTIP_38</displayName>
|
|
<description>clicintip Register</description>
|
|
<addressOffset>0x1098</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IP</name>
|
|
<description>IP</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIP_39</name>
|
|
<displayName>CLICINTIP_39</displayName>
|
|
<description>clicintip Register</description>
|
|
<addressOffset>0x109C</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IP</name>
|
|
<description>IP</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIP_40</name>
|
|
<displayName>CLICINTIP_40</displayName>
|
|
<description>clicintip Register</description>
|
|
<addressOffset>0x10A0</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IP</name>
|
|
<description>IP</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIP_41</name>
|
|
<displayName>CLICINTIP_41</displayName>
|
|
<description>clicintip Register</description>
|
|
<addressOffset>0x10A4</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IP</name>
|
|
<description>IP</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIP_42</name>
|
|
<displayName>CLICINTIP_42</displayName>
|
|
<description>clicintip Register</description>
|
|
<addressOffset>0x10A8</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IP</name>
|
|
<description>IP</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIP_43</name>
|
|
<displayName>CLICINTIP_43</displayName>
|
|
<description>clicintip Register</description>
|
|
<addressOffset>0x10AC</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IP</name>
|
|
<description>IP</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIP_44</name>
|
|
<displayName>CLICINTIP_44</displayName>
|
|
<description>clicintip Register</description>
|
|
<addressOffset>0x10B0</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IP</name>
|
|
<description>IP</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIP_45</name>
|
|
<displayName>CLICINTIP_45</displayName>
|
|
<description>clicintip Register</description>
|
|
<addressOffset>0x10B4</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IP</name>
|
|
<description>IP</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIP_46</name>
|
|
<displayName>CLICINTIP_46</displayName>
|
|
<description>clicintip Register</description>
|
|
<addressOffset>0x10B8</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IP</name>
|
|
<description>IP</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIP_47</name>
|
|
<displayName>CLICINTIP_47</displayName>
|
|
<description>clicintip Register</description>
|
|
<addressOffset>0x10BC</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IP</name>
|
|
<description>IP</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIP_48</name>
|
|
<displayName>CLICINTIP_48</displayName>
|
|
<description>clicintip Register</description>
|
|
<addressOffset>0x10C0</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IP</name>
|
|
<description>IP</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIP_49</name>
|
|
<displayName>CLICINTIP_49</displayName>
|
|
<description>clicintip Register</description>
|
|
<addressOffset>0x10C4</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IP</name>
|
|
<description>IP</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIP_50</name>
|
|
<displayName>CLICINTIP_50</displayName>
|
|
<description>clicintip Register</description>
|
|
<addressOffset>0x10C8</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IP</name>
|
|
<description>IP</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIP_51</name>
|
|
<displayName>CLICINTIP_51</displayName>
|
|
<description>clicintip Register</description>
|
|
<addressOffset>0x10CC</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IP</name>
|
|
<description>IP</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIP_52</name>
|
|
<displayName>CLICINTIP_52</displayName>
|
|
<description>clicintip Register</description>
|
|
<addressOffset>0x10D0</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IP</name>
|
|
<description>IP</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIP_53</name>
|
|
<displayName>CLICINTIP_53</displayName>
|
|
<description>clicintip Register</description>
|
|
<addressOffset>0x10D4</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IP</name>
|
|
<description>IP</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIP_54</name>
|
|
<displayName>CLICINTIP_54</displayName>
|
|
<description>clicintip Register</description>
|
|
<addressOffset>0x10D8</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IP</name>
|
|
<description>IP</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIP_55</name>
|
|
<displayName>CLICINTIP_55</displayName>
|
|
<description>clicintip Register</description>
|
|
<addressOffset>0x10DC</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IP</name>
|
|
<description>IP</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIP_56</name>
|
|
<displayName>CLICINTIP_56</displayName>
|
|
<description>clicintip Register</description>
|
|
<addressOffset>0x10E0</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IP</name>
|
|
<description>IP</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIP_57</name>
|
|
<displayName>CLICINTIP_57</displayName>
|
|
<description>clicintip Register</description>
|
|
<addressOffset>0x10E4</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IP</name>
|
|
<description>IP</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIP_58</name>
|
|
<displayName>CLICINTIP_58</displayName>
|
|
<description>clicintip Register</description>
|
|
<addressOffset>0x10E8</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IP</name>
|
|
<description>IP</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIP_59</name>
|
|
<displayName>CLICINTIP_59</displayName>
|
|
<description>clicintip Register</description>
|
|
<addressOffset>0x10EC</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IP</name>
|
|
<description>IP</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIP_60</name>
|
|
<displayName>CLICINTIP_60</displayName>
|
|
<description>clicintip Register</description>
|
|
<addressOffset>0x10F0</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IP</name>
|
|
<description>IP</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIP_61</name>
|
|
<displayName>CLICINTIP_61</displayName>
|
|
<description>clicintip Register</description>
|
|
<addressOffset>0x10F4</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IP</name>
|
|
<description>IP</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIP_62</name>
|
|
<displayName>CLICINTIP_62</displayName>
|
|
<description>clicintip Register</description>
|
|
<addressOffset>0x10F8</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IP</name>
|
|
<description>IP</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIP_63</name>
|
|
<displayName>CLICINTIP_63</displayName>
|
|
<description>clicintip Register</description>
|
|
<addressOffset>0x10FC</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IP</name>
|
|
<description>IP</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIP_64</name>
|
|
<displayName>CLICINTIP_64</displayName>
|
|
<description>clicintip Register</description>
|
|
<addressOffset>0x1100</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IP</name>
|
|
<description>IP</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIP_65</name>
|
|
<displayName>CLICINTIP_65</displayName>
|
|
<description>clicintip Register</description>
|
|
<addressOffset>0x1104</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IP</name>
|
|
<description>IP</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIP_66</name>
|
|
<displayName>CLICINTIP_66</displayName>
|
|
<description>clicintip Register</description>
|
|
<addressOffset>0x1108</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IP</name>
|
|
<description>IP</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIP_67</name>
|
|
<displayName>CLICINTIP_67</displayName>
|
|
<description>clicintip Register</description>
|
|
<addressOffset>0x110C</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IP</name>
|
|
<description>IP</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIP_68</name>
|
|
<displayName>CLICINTIP_68</displayName>
|
|
<description>clicintip Register</description>
|
|
<addressOffset>0x1110</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IP</name>
|
|
<description>IP</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIP_69</name>
|
|
<displayName>CLICINTIP_69</displayName>
|
|
<description>clicintip Register</description>
|
|
<addressOffset>0x1114</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IP</name>
|
|
<description>IP</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIP_70</name>
|
|
<displayName>CLICINTIP_70</displayName>
|
|
<description>clicintip Register</description>
|
|
<addressOffset>0x1118</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IP</name>
|
|
<description>IP</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIP_71</name>
|
|
<displayName>CLICINTIP_71</displayName>
|
|
<description>clicintip Register</description>
|
|
<addressOffset>0x111C</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IP</name>
|
|
<description>IP</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIP_72</name>
|
|
<displayName>CLICINTIP_72</displayName>
|
|
<description>clicintip Register</description>
|
|
<addressOffset>0x1120</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IP</name>
|
|
<description>IP</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIP_73</name>
|
|
<displayName>CLICINTIP_73</displayName>
|
|
<description>clicintip Register</description>
|
|
<addressOffset>0x1124</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IP</name>
|
|
<description>IP</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIP_74</name>
|
|
<displayName>CLICINTIP_74</displayName>
|
|
<description>clicintip Register</description>
|
|
<addressOffset>0x1128</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IP</name>
|
|
<description>IP</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIP_75</name>
|
|
<displayName>CLICINTIP_75</displayName>
|
|
<description>clicintip Register</description>
|
|
<addressOffset>0x112C</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IP</name>
|
|
<description>IP</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIP_76</name>
|
|
<displayName>CLICINTIP_76</displayName>
|
|
<description>clicintip Register</description>
|
|
<addressOffset>0x1130</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IP</name>
|
|
<description>IP</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIP_77</name>
|
|
<displayName>CLICINTIP_77</displayName>
|
|
<description>clicintip Register</description>
|
|
<addressOffset>0x1134</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IP</name>
|
|
<description>IP</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIP_78</name>
|
|
<displayName>CLICINTIP_78</displayName>
|
|
<description>clicintip Register</description>
|
|
<addressOffset>0x1138</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IP</name>
|
|
<description>IP</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIP_79</name>
|
|
<displayName>CLICINTIP_79</displayName>
|
|
<description>clicintip Register</description>
|
|
<addressOffset>0x113C</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IP</name>
|
|
<description>IP</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIP_80</name>
|
|
<displayName>CLICINTIP_80</displayName>
|
|
<description>clicintip Register</description>
|
|
<addressOffset>0x1140</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IP</name>
|
|
<description>IP</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIP_81</name>
|
|
<displayName>CLICINTIP_81</displayName>
|
|
<description>clicintip Register</description>
|
|
<addressOffset>0x1144</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IP</name>
|
|
<description>IP</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIP_82</name>
|
|
<displayName>CLICINTIP_82</displayName>
|
|
<description>clicintip Register</description>
|
|
<addressOffset>0x1148</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IP</name>
|
|
<description>IP</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIP_83</name>
|
|
<displayName>CLICINTIP_83</displayName>
|
|
<description>clicintip Register</description>
|
|
<addressOffset>0x114C</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IP</name>
|
|
<description>IP</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIP_84</name>
|
|
<displayName>CLICINTIP_84</displayName>
|
|
<description>clicintip Register</description>
|
|
<addressOffset>0x1150</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IP</name>
|
|
<description>IP</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIP_85</name>
|
|
<displayName>CLICINTIP_85</displayName>
|
|
<description>clicintip Register</description>
|
|
<addressOffset>0x1158</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IP</name>
|
|
<description>IP</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIP_86</name>
|
|
<displayName>CLICINTIP_86</displayName>
|
|
<description>clicintip Register</description>
|
|
<addressOffset>0x115C</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IP</name>
|
|
<description>IP</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIE_0</name>
|
|
<displayName>CLICINTIE_0</displayName>
|
|
<description>clicintie Register</description>
|
|
<addressOffset>0x1001</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIE_1</name>
|
|
<displayName>CLICINTIE_1</displayName>
|
|
<description>clicintie Register</description>
|
|
<addressOffset>0x1005</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIE_2</name>
|
|
<displayName>CLICINTIE_2</displayName>
|
|
<description>clicintie Register</description>
|
|
<addressOffset>0x1009</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIE_3</name>
|
|
<displayName>CLICINTIE_3</displayName>
|
|
<description>clicintie Register</description>
|
|
<addressOffset>0x100D</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIE_4</name>
|
|
<displayName>CLICINTIE_4</displayName>
|
|
<description>clicintie Register</description>
|
|
<addressOffset>0x1011</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIE_5</name>
|
|
<displayName>CLICINTIE_5</displayName>
|
|
<description>clicintie Register</description>
|
|
<addressOffset>0x1015</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIE_6</name>
|
|
<displayName>CLICINTIE_6</displayName>
|
|
<description>clicintie Register</description>
|
|
<addressOffset>0x1019</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIE_7</name>
|
|
<displayName>CLICINTIE_7</displayName>
|
|
<description>clicintie Register</description>
|
|
<addressOffset>0x101D</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIE_8</name>
|
|
<displayName>CLICINTIE_8</displayName>
|
|
<description>clicintie Register</description>
|
|
<addressOffset>0x1021</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIE_9</name>
|
|
<displayName>CLICINTIE_9</displayName>
|
|
<description>clicintie Register</description>
|
|
<addressOffset>0x1025</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIE_10</name>
|
|
<displayName>CLICINTIE_10</displayName>
|
|
<description>clicintie Register</description>
|
|
<addressOffset>0x1029</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIE_11</name>
|
|
<displayName>CLICINTIE_11</displayName>
|
|
<description>clicintie Register</description>
|
|
<addressOffset>0x102D</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIE_12</name>
|
|
<displayName>CLICINTIE_12</displayName>
|
|
<description>clicintie Register</description>
|
|
<addressOffset>0x1031</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIE_13</name>
|
|
<displayName>CLICINTIE_13</displayName>
|
|
<description>clicintie Register</description>
|
|
<addressOffset>0x1035</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIE_14</name>
|
|
<displayName>CLICINTIE_14</displayName>
|
|
<description>clicintie Register</description>
|
|
<addressOffset>0x1039</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIE_15</name>
|
|
<displayName>CLICINTIE_15</displayName>
|
|
<description>clicintie Register</description>
|
|
<addressOffset>0x103D</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIE_16</name>
|
|
<displayName>CLICINTIE_16</displayName>
|
|
<description>clicintie Register</description>
|
|
<addressOffset>0x1041</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIE_17</name>
|
|
<displayName>CLICINTIE_17</displayName>
|
|
<description>clicintie Register</description>
|
|
<addressOffset>0x1045</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIE_18</name>
|
|
<displayName>CLICINTIE_18</displayName>
|
|
<description>clicintie Register</description>
|
|
<addressOffset>0x1049</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIE_19</name>
|
|
<displayName>CLICINTIE_19</displayName>
|
|
<description>clicintie Register</description>
|
|
<addressOffset>0x104D</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIE_20</name>
|
|
<displayName>CLICINTIE_20</displayName>
|
|
<description>clicintie Register</description>
|
|
<addressOffset>0x1051</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIE_21</name>
|
|
<displayName>CLICINTIE_21</displayName>
|
|
<description>clicintie Register</description>
|
|
<addressOffset>0x1055</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIE_22</name>
|
|
<displayName>CLICINTIE_22</displayName>
|
|
<description>clicintie Register</description>
|
|
<addressOffset>0x1059</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIE_23</name>
|
|
<displayName>CLICINTIE_23</displayName>
|
|
<description>clicintie Register</description>
|
|
<addressOffset>0x105D</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIE_24</name>
|
|
<displayName>CLICINTIE_24</displayName>
|
|
<description>clicintie Register</description>
|
|
<addressOffset>0x1061</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIE_25</name>
|
|
<displayName>CLICINTIE_25</displayName>
|
|
<description>clicintie Register</description>
|
|
<addressOffset>0x1065</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIE_26</name>
|
|
<displayName>CLICINTIE_26</displayName>
|
|
<description>clicintie Register</description>
|
|
<addressOffset>0x1069</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIE_27</name>
|
|
<displayName>CLICINTIE_27</displayName>
|
|
<description>clicintie Register</description>
|
|
<addressOffset>0x106D</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIE_28</name>
|
|
<displayName>CLICINTIE_28</displayName>
|
|
<description>clicintie Register</description>
|
|
<addressOffset>0x1071</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIE_29</name>
|
|
<displayName>CLICINTIE_29</displayName>
|
|
<description>clicintie Register</description>
|
|
<addressOffset>0x1075</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIE_30</name>
|
|
<displayName>CLICINTIE_30</displayName>
|
|
<description>clicintie Register</description>
|
|
<addressOffset>0x1079</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIE_31</name>
|
|
<displayName>CLICINTIE_31</displayName>
|
|
<description>clicintie Register</description>
|
|
<addressOffset>0x107D</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIE_32</name>
|
|
<displayName>CLICINTIE_32</displayName>
|
|
<description>clicintie Register</description>
|
|
<addressOffset>0x1081</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIE_33</name>
|
|
<displayName>CLICINTIE_33</displayName>
|
|
<description>clicintie Register</description>
|
|
<addressOffset>0x1085</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIE_34</name>
|
|
<displayName>CLICINTIE_34</displayName>
|
|
<description>clicintie Register</description>
|
|
<addressOffset>0x1089</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIE_35</name>
|
|
<displayName>CLICINTIE_35</displayName>
|
|
<description>clicintie Register</description>
|
|
<addressOffset>0x108D</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIE_36</name>
|
|
<displayName>CLICINTIE_36</displayName>
|
|
<description>clicintie Register</description>
|
|
<addressOffset>0x1091</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIE_37</name>
|
|
<displayName>CLICINTIE_37</displayName>
|
|
<description>clicintie Register</description>
|
|
<addressOffset>0x1095</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIE_38</name>
|
|
<displayName>CLICINTIE_38</displayName>
|
|
<description>clicintie Register</description>
|
|
<addressOffset>0x1099</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIE_39</name>
|
|
<displayName>CLICINTIE_39</displayName>
|
|
<description>clicintie Register</description>
|
|
<addressOffset>0x109D</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIE_40</name>
|
|
<displayName>CLICINTIE_40</displayName>
|
|
<description>clicintie Register</description>
|
|
<addressOffset>0x10A1</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIE_41</name>
|
|
<displayName>CLICINTIE_41</displayName>
|
|
<description>clicintie Register</description>
|
|
<addressOffset>0x10A5</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIE_42</name>
|
|
<displayName>CLICINTIE_42</displayName>
|
|
<description>clicintie Register</description>
|
|
<addressOffset>0x10A9</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIE_43</name>
|
|
<displayName>CLICINTIE_43</displayName>
|
|
<description>clicintie Register</description>
|
|
<addressOffset>0x10AD</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIE_44</name>
|
|
<displayName>CLICINTIE_44</displayName>
|
|
<description>clicintie Register</description>
|
|
<addressOffset>0x10B1</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIE_45</name>
|
|
<displayName>CLICINTIE_45</displayName>
|
|
<description>clicintie Register</description>
|
|
<addressOffset>0x10B5</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIE_46</name>
|
|
<displayName>CLICINTIE_46</displayName>
|
|
<description>clicintie Register</description>
|
|
<addressOffset>0x10B9</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIE_47</name>
|
|
<displayName>CLICINTIE_47</displayName>
|
|
<description>clicintie Register</description>
|
|
<addressOffset>0x10BD</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIE_48</name>
|
|
<displayName>CLICINTIE_48</displayName>
|
|
<description>clicintie Register</description>
|
|
<addressOffset>0x10C1</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIE_49</name>
|
|
<displayName>CLICINTIE_49</displayName>
|
|
<description>clicintie Register</description>
|
|
<addressOffset>0x10C5</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIE_50</name>
|
|
<displayName>CLICINTIE_50</displayName>
|
|
<description>clicintie Register</description>
|
|
<addressOffset>0x10C9</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIE_51</name>
|
|
<displayName>CLICINTIE_51</displayName>
|
|
<description>clicintie Register</description>
|
|
<addressOffset>0x10CD</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIE_52</name>
|
|
<displayName>CLICINTIE_52</displayName>
|
|
<description>clicintie Register</description>
|
|
<addressOffset>0x10D1</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIE_53</name>
|
|
<displayName>CLICINTIE_53</displayName>
|
|
<description>clicintie Register</description>
|
|
<addressOffset>0x10D5</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIE_54</name>
|
|
<displayName>CLICINTIE_54</displayName>
|
|
<description>clicintie Register</description>
|
|
<addressOffset>0x10D9</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIE_55</name>
|
|
<displayName>CLICINTIE_7</displayName>
|
|
<description>clicintie Register</description>
|
|
<addressOffset>0x10DD</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIE_56</name>
|
|
<displayName>CLICINTIE_56</displayName>
|
|
<description>clicintie Register</description>
|
|
<addressOffset>0x10E1</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIE_57</name>
|
|
<displayName>CLICINTIE_57</displayName>
|
|
<description>clicintie Register</description>
|
|
<addressOffset>0x10E5</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIE_58</name>
|
|
<displayName>CLICINTIE_58</displayName>
|
|
<description>clicintie Register</description>
|
|
<addressOffset>0x10E9</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIE_59</name>
|
|
<displayName>CLICINTIE_59</displayName>
|
|
<description>clicintie Register</description>
|
|
<addressOffset>0x10ED</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIE_60</name>
|
|
<displayName>CLICINTIE_60</displayName>
|
|
<description>clicintie Register</description>
|
|
<addressOffset>0x10F1</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIE_61</name>
|
|
<displayName>CLICINTIE_61</displayName>
|
|
<description>clicintie Register</description>
|
|
<addressOffset>0x10F5</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIE_62</name>
|
|
<displayName>CLICINTIE_62</displayName>
|
|
<description>clicintie Register</description>
|
|
<addressOffset>0x10F9</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIE_63</name>
|
|
<displayName>CLICINTIE_63</displayName>
|
|
<description>clicintie Register</description>
|
|
<addressOffset>0x10FD</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIE_64</name>
|
|
<displayName>CLICINTIE_64</displayName>
|
|
<description>clicintie Register</description>
|
|
<addressOffset>0x1101</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIE_65</name>
|
|
<displayName>CLICINTIE_65</displayName>
|
|
<description>clicintie Register</description>
|
|
<addressOffset>0x1105</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIE_66</name>
|
|
<displayName>CLICINTIE_66</displayName>
|
|
<description>clicintie Register</description>
|
|
<addressOffset>0x1109</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIE_67</name>
|
|
<displayName>CLICINTIE_67</displayName>
|
|
<description>clicintie Register</description>
|
|
<addressOffset>0x110D</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIE_68</name>
|
|
<displayName>CLICINTIE_68</displayName>
|
|
<description>clicintie Register</description>
|
|
<addressOffset>0x1111</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIE_69</name>
|
|
<displayName>CLICINTIE_69</displayName>
|
|
<description>clicintie Register</description>
|
|
<addressOffset>0x1115</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIE_70</name>
|
|
<displayName>CLICINTIE_70</displayName>
|
|
<description>clicintie Register</description>
|
|
<addressOffset>0x1119</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIE_71</name>
|
|
<displayName>CLICINTIE_71</displayName>
|
|
<description>clicintie Register</description>
|
|
<addressOffset>0x111D</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIE_72</name>
|
|
<displayName>CLICINTIE_72</displayName>
|
|
<description>clicintie Register</description>
|
|
<addressOffset>0x1121</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIE_73</name>
|
|
<displayName>CLICINTIE_73</displayName>
|
|
<description>clicintie Register</description>
|
|
<addressOffset>0x1125</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIE_74</name>
|
|
<displayName>CLICINTIE_74</displayName>
|
|
<description>clicintie Register</description>
|
|
<addressOffset>0x1129</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIE_75</name>
|
|
<displayName>CLICINTIE_75</displayName>
|
|
<description>clicintie Register</description>
|
|
<addressOffset>0x112D</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIE_76</name>
|
|
<displayName>CLICINTIE_76</displayName>
|
|
<description>clicintie Register</description>
|
|
<addressOffset>0x1131</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIE_77</name>
|
|
<displayName>CLICINTIE_77</displayName>
|
|
<description>clicintie Register</description>
|
|
<addressOffset>0x1135</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIE_78</name>
|
|
<displayName>CLICINTIE_78</displayName>
|
|
<description>clicintie Register</description>
|
|
<addressOffset>0x1139</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIE_79</name>
|
|
<displayName>CLICINTIE_79</displayName>
|
|
<description>clicintie Register</description>
|
|
<addressOffset>0x113D</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIE_80</name>
|
|
<displayName>CLICINTIE_80</displayName>
|
|
<description>clicintie Register</description>
|
|
<addressOffset>0x1141</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIE_81</name>
|
|
<displayName>CLICINTIE_81</displayName>
|
|
<description>clicintie Register</description>
|
|
<addressOffset>0x1145</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIE_82</name>
|
|
<displayName>CLICINTIE_82</displayName>
|
|
<description>clicintie Register</description>
|
|
<addressOffset>0x1149</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIE_83</name>
|
|
<displayName>CLICINTIE_83</displayName>
|
|
<description>clicintie Register</description>
|
|
<addressOffset>0x114D</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIE_84</name>
|
|
<displayName>CLICINTIE_84</displayName>
|
|
<description>clicintie Register</description>
|
|
<addressOffset>0x1151</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIE_85</name>
|
|
<displayName>CLICINTIE_85</displayName>
|
|
<description>clicintie Register</description>
|
|
<addressOffset>0x1155</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTIE_86</name>
|
|
<displayName>CLICINTIE_86</displayName>
|
|
<description>clicintie Register</description>
|
|
<addressOffset>0x1159</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
|
|
<register>
|
|
<name>CLICINTATTR_0</name>
|
|
<displayName>CLICINTIE_0</displayName>
|
|
<description>clicintattr Register</description>
|
|
<addressOffset>0x1002</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SHV</name>
|
|
<description>SHV</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TRIG</name>
|
|
<description>TRIG</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTATTR_1</name>
|
|
<displayName>CLICINTIE_1</displayName>
|
|
<description>clicintattr Register</description>
|
|
<addressOffset>0x1006</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SHV</name>
|
|
<description>SHV</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TRIG</name>
|
|
<description>TRIG</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTATTR_2</name>
|
|
<displayName>CLICINTIE_2</displayName>
|
|
<description>clicintattr Register</description>
|
|
<addressOffset>0x100A</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SHV</name>
|
|
<description>SHV</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TRIG</name>
|
|
<description>TRIG</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTATTR_3</name>
|
|
<displayName>CLICINTIE_3</displayName>
|
|
<description>clicintattr Register</description>
|
|
<addressOffset>0x100E</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SHV</name>
|
|
<description>SHV</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TRIG</name>
|
|
<description>TRIG</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTATTR_4</name>
|
|
<displayName>CLICINTIE_4</displayName>
|
|
<description>clicintattr Register</description>
|
|
<addressOffset>0x1012</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SHV</name>
|
|
<description>SHV</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TRIG</name>
|
|
<description>TRIG</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTATTR_5</name>
|
|
<displayName>CLICINTIE_5</displayName>
|
|
<description>clicintattr Register</description>
|
|
<addressOffset>0x1016</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SHV</name>
|
|
<description>SHV</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TRIG</name>
|
|
<description>TRIG</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTATTR_6</name>
|
|
<displayName>CLICINTIE_6</displayName>
|
|
<description>clicintattr Register</description>
|
|
<addressOffset>0x101A</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SHV</name>
|
|
<description>SHV</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TRIG</name>
|
|
<description>TRIG</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTATTR_7</name>
|
|
<displayName>CLICINTIE_7</displayName>
|
|
<description>clicintattr Register</description>
|
|
<addressOffset>0x101E</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SHV</name>
|
|
<description>SHV</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TRIG</name>
|
|
<description>TRIG</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTATTR_8</name>
|
|
<displayName>CLICINTIE_8</displayName>
|
|
<description>clicintattr Register</description>
|
|
<addressOffset>0x1022</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SHV</name>
|
|
<description>SHV</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TRIG</name>
|
|
<description>TRIG</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTATTR_9</name>
|
|
<displayName>CLICINTIE_9</displayName>
|
|
<description>clicintattr Register</description>
|
|
<addressOffset>0x1026</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SHV</name>
|
|
<description>SHV</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TRIG</name>
|
|
<description>TRIG</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTATTR_10</name>
|
|
<displayName>CLICINTIE_10</displayName>
|
|
<description>clicintattr Register</description>
|
|
<addressOffset>0x102A</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SHV</name>
|
|
<description>SHV</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TRIG</name>
|
|
<description>TRIG</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTATTR_11</name>
|
|
<displayName>CLICINTIE_11</displayName>
|
|
<description>clicintattr Register</description>
|
|
<addressOffset>0x102E</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SHV</name>
|
|
<description>SHV</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TRIG</name>
|
|
<description>TRIG</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTATTR_12</name>
|
|
<displayName>CLICINTIE_12</displayName>
|
|
<description>clicintattr Register</description>
|
|
<addressOffset>0x1032</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SHV</name>
|
|
<description>SHV</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TRIG</name>
|
|
<description>TRIG</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTATTR_13</name>
|
|
<displayName>CLICINTIE_13</displayName>
|
|
<description>clicintattr Register</description>
|
|
<addressOffset>0x1036</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SHV</name>
|
|
<description>SHV</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TRIG</name>
|
|
<description>TRIG</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTATTR_14</name>
|
|
<displayName>CLICINTIE_14</displayName>
|
|
<description>clicintattr Register</description>
|
|
<addressOffset>0x103A</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SHV</name>
|
|
<description>SHV</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TRIG</name>
|
|
<description>TRIG</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTATTR_15</name>
|
|
<displayName>CLICINTIE_15</displayName>
|
|
<description>clicintattr Register</description>
|
|
<addressOffset>0x103E</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SHV</name>
|
|
<description>SHV</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TRIG</name>
|
|
<description>TRIG</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTATTR_16</name>
|
|
<displayName>CLICINTIE_16</displayName>
|
|
<description>clicintattr Register</description>
|
|
<addressOffset>0x1042</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SHV</name>
|
|
<description>SHV</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TRIG</name>
|
|
<description>TRIG</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTATTR_17</name>
|
|
<displayName>CLICINTIE_17</displayName>
|
|
<description>clicintattr Register</description>
|
|
<addressOffset>0x1046</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SHV</name>
|
|
<description>SHV</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TRIG</name>
|
|
<description>TRIG</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTATTR_18</name>
|
|
<displayName>CLICINTIE_18</displayName>
|
|
<description>clicintattr Register</description>
|
|
<addressOffset>0x104A</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SHV</name>
|
|
<description>SHV</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TRIG</name>
|
|
<description>TRIG</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTATTR_19</name>
|
|
<displayName>CLICINTIE_19</displayName>
|
|
<description>clicintattr Register</description>
|
|
<addressOffset>0x104E</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SHV</name>
|
|
<description>SHV</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TRIG</name>
|
|
<description>TRIG</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTATTR_20</name>
|
|
<displayName>CLICINTIE_20</displayName>
|
|
<description>clicintattr Register</description>
|
|
<addressOffset>0x1052</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SHV</name>
|
|
<description>SHV</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TRIG</name>
|
|
<description>TRIG</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTATTR_21</name>
|
|
<displayName>CLICINTIE_21</displayName>
|
|
<description>clicintattr Register</description>
|
|
<addressOffset>0x1056</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SHV</name>
|
|
<description>SHV</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TRIG</name>
|
|
<description>TRIG</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTATTR_22</name>
|
|
<displayName>CLICINTIE_22</displayName>
|
|
<description>clicintattr Register</description>
|
|
<addressOffset>0x105A</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SHV</name>
|
|
<description>SHV</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TRIG</name>
|
|
<description>TRIG</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTATTR_23</name>
|
|
<displayName>CLICINTIE_23</displayName>
|
|
<description>clicintattr Register</description>
|
|
<addressOffset>0x105E</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SHV</name>
|
|
<description>SHV</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TRIG</name>
|
|
<description>TRIG</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTATTR_24</name>
|
|
<displayName>CLICINTIE_24</displayName>
|
|
<description>clicintattr Register</description>
|
|
<addressOffset>0x1062</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SHV</name>
|
|
<description>SHV</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TRIG</name>
|
|
<description>TRIG</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTATTR_25</name>
|
|
<displayName>CLICINTIE_25</displayName>
|
|
<description>clicintattr Register</description>
|
|
<addressOffset>0x1066</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SHV</name>
|
|
<description>SHV</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TRIG</name>
|
|
<description>TRIG</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTATTR_26</name>
|
|
<displayName>CLICINTIE_26</displayName>
|
|
<description>clicintattr Register</description>
|
|
<addressOffset>0x106A</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SHV</name>
|
|
<description>SHV</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TRIG</name>
|
|
<description>TRIG</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTATTR_27</name>
|
|
<displayName>CLICINTIE_27</displayName>
|
|
<description>clicintattr Register</description>
|
|
<addressOffset>0x106E</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SHV</name>
|
|
<description>SHV</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TRIG</name>
|
|
<description>TRIG</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTATTR_28</name>
|
|
<displayName>CLICINTIE_28</displayName>
|
|
<description>clicintattr Register</description>
|
|
<addressOffset>0x1072</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SHV</name>
|
|
<description>SHV</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TRIG</name>
|
|
<description>TRIG</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTATTR_29</name>
|
|
<displayName>CLICINTIE_29</displayName>
|
|
<description>clicintattr Register</description>
|
|
<addressOffset>0x1076</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SHV</name>
|
|
<description>SHV</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TRIG</name>
|
|
<description>TRIG</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTATTR_30</name>
|
|
<displayName>CLICINTIE_30</displayName>
|
|
<description>clicintattr Register</description>
|
|
<addressOffset>0x107A</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SHV</name>
|
|
<description>SHV</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TRIG</name>
|
|
<description>TRIG</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTATTR_31</name>
|
|
<displayName>CLICINTIE_31</displayName>
|
|
<description>clicintattr Register</description>
|
|
<addressOffset>0x107E</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SHV</name>
|
|
<description>SHV</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TRIG</name>
|
|
<description>TRIG</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTATTR_32</name>
|
|
<displayName>CLICINTIE_32</displayName>
|
|
<description>clicintattr Register</description>
|
|
<addressOffset>0x1082</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SHV</name>
|
|
<description>SHV</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TRIG</name>
|
|
<description>TRIG</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTATTR_33</name>
|
|
<displayName>CLICINTIE_33</displayName>
|
|
<description>clicintattr Register</description>
|
|
<addressOffset>0x1086</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SHV</name>
|
|
<description>SHV</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TRIG</name>
|
|
<description>TRIG</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTATTR_34</name>
|
|
<displayName>CLICINTIE_34</displayName>
|
|
<description>clicintattr Register</description>
|
|
<addressOffset>0x108A</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SHV</name>
|
|
<description>SHV</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TRIG</name>
|
|
<description>TRIG</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTATTR_35</name>
|
|
<displayName>CLICINTIE_35</displayName>
|
|
<description>clicintattr Register</description>
|
|
<addressOffset>0x108E</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SHV</name>
|
|
<description>SHV</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TRIG</name>
|
|
<description>TRIG</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTATTR_36</name>
|
|
<displayName>CLICINTIE_36</displayName>
|
|
<description>clicintattr Register</description>
|
|
<addressOffset>0x1092</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SHV</name>
|
|
<description>SHV</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TRIG</name>
|
|
<description>TRIG</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTATTR_37</name>
|
|
<displayName>CLICINTIE_37</displayName>
|
|
<description>clicintattr Register</description>
|
|
<addressOffset>0x1096</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SHV</name>
|
|
<description>SHV</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TRIG</name>
|
|
<description>TRIG</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTATTR_38</name>
|
|
<displayName>CLICINTIE_38</displayName>
|
|
<description>clicintattr Register</description>
|
|
<addressOffset>0x109A</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SHV</name>
|
|
<description>SHV</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TRIG</name>
|
|
<description>TRIG</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTATTR_39</name>
|
|
<displayName>CLICINTIE_39</displayName>
|
|
<description>clicintattr Register</description>
|
|
<addressOffset>0x109E</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SHV</name>
|
|
<description>SHV</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TRIG</name>
|
|
<description>TRIG</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTATTR_40</name>
|
|
<displayName>CLICINTIE_40</displayName>
|
|
<description>clicintattr Register</description>
|
|
<addressOffset>0x10A2</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SHV</name>
|
|
<description>SHV</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TRIG</name>
|
|
<description>TRIG</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTATTR_41</name>
|
|
<displayName>CLICINTIE_41</displayName>
|
|
<description>clicintattr Register</description>
|
|
<addressOffset>0x10A6</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SHV</name>
|
|
<description>SHV</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TRIG</name>
|
|
<description>TRIG</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTATTR_42</name>
|
|
<displayName>CLICINTIE_42</displayName>
|
|
<description>clicintattr Register</description>
|
|
<addressOffset>0x10AA</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SHV</name>
|
|
<description>SHV</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TRIG</name>
|
|
<description>TRIG</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTATTR_43</name>
|
|
<displayName>CLICINTIE_43</displayName>
|
|
<description>clicintattr Register</description>
|
|
<addressOffset>0x10AE</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SHV</name>
|
|
<description>SHV</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TRIG</name>
|
|
<description>TRIG</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTATTR_44</name>
|
|
<displayName>CLICINTIE_44</displayName>
|
|
<description>clicintattr Register</description>
|
|
<addressOffset>0x10B2</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SHV</name>
|
|
<description>SHV</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TRIG</name>
|
|
<description>TRIG</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTATTR_45</name>
|
|
<displayName>CLICINTIE_45</displayName>
|
|
<description>clicintattr Register</description>
|
|
<addressOffset>0x10B6</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SHV</name>
|
|
<description>SHV</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TRIG</name>
|
|
<description>TRIG</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTATTR_46</name>
|
|
<displayName>CLICINTIE_46</displayName>
|
|
<description>clicintattr Register</description>
|
|
<addressOffset>0x10BA</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SHV</name>
|
|
<description>SHV</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TRIG</name>
|
|
<description>TRIG</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTATTR_47</name>
|
|
<displayName>CLICINTIE_47</displayName>
|
|
<description>clicintattr Register</description>
|
|
<addressOffset>0x10BE</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SHV</name>
|
|
<description>SHV</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TRIG</name>
|
|
<description>TRIG</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTATTR_48</name>
|
|
<displayName>CLICINTIE_48</displayName>
|
|
<description>clicintattr Register</description>
|
|
<addressOffset>0x10C2</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SHV</name>
|
|
<description>SHV</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TRIG</name>
|
|
<description>TRIG</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTATTR_49</name>
|
|
<displayName>CLICINTIE_49</displayName>
|
|
<description>clicintattr Register</description>
|
|
<addressOffset>0x10C6</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SHV</name>
|
|
<description>SHV</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TRIG</name>
|
|
<description>TRIG</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTATTR_50</name>
|
|
<displayName>CLICINTIE_50</displayName>
|
|
<description>clicintattr Register</description>
|
|
<addressOffset>0x10CA</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SHV</name>
|
|
<description>SHV</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TRIG</name>
|
|
<description>TRIG</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTATTR_51</name>
|
|
<displayName>CLICINTIE_51</displayName>
|
|
<description>clicintattr Register</description>
|
|
<addressOffset>0x10CE</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SHV</name>
|
|
<description>SHV</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TRIG</name>
|
|
<description>TRIG</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTATTR_52</name>
|
|
<displayName>CLICINTIE_52</displayName>
|
|
<description>clicintattr Register</description>
|
|
<addressOffset>0x10D2</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SHV</name>
|
|
<description>SHV</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TRIG</name>
|
|
<description>TRIG</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTATTR_53</name>
|
|
<displayName>CLICINTIE_53</displayName>
|
|
<description>clicintattr Register</description>
|
|
<addressOffset>0x10D6</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SHV</name>
|
|
<description>SHV</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TRIG</name>
|
|
<description>TRIG</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTATTR_54</name>
|
|
<displayName>CLICINTIE_54</displayName>
|
|
<description>clicintattr Register</description>
|
|
<addressOffset>0x10DA</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SHV</name>
|
|
<description>SHV</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TRIG</name>
|
|
<description>TRIG</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTATTR_55</name>
|
|
<displayName>CLICINTIE_55</displayName>
|
|
<description>clicintattr Register</description>
|
|
<addressOffset>0x10DE</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SHV</name>
|
|
<description>SHV</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TRIG</name>
|
|
<description>TRIG</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTATTR_56</name>
|
|
<displayName>CLICINTIE_56</displayName>
|
|
<description>clicintattr Register</description>
|
|
<addressOffset>0x10E2</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SHV</name>
|
|
<description>SHV</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TRIG</name>
|
|
<description>TRIG</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTATTR_57</name>
|
|
<displayName>CLICINTIE_57</displayName>
|
|
<description>clicintattr Register</description>
|
|
<addressOffset>0x10E6</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SHV</name>
|
|
<description>SHV</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TRIG</name>
|
|
<description>TRIG</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTATTR_58</name>
|
|
<displayName>CLICINTIE_58</displayName>
|
|
<description>clicintattr Register</description>
|
|
<addressOffset>0x10EA</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SHV</name>
|
|
<description>SHV</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TRIG</name>
|
|
<description>TRIG</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTATTR_59</name>
|
|
<displayName>CLICINTIE_59</displayName>
|
|
<description>clicintattr Register</description>
|
|
<addressOffset>0x10EE</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SHV</name>
|
|
<description>SHV</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TRIG</name>
|
|
<description>TRIG</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTATTR_60</name>
|
|
<displayName>CLICINTIE_60</displayName>
|
|
<description>clicintattr Register</description>
|
|
<addressOffset>0x10F2</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SHV</name>
|
|
<description>SHV</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TRIG</name>
|
|
<description>TRIG</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTATTR_61</name>
|
|
<displayName>CLICINTIE_61</displayName>
|
|
<description>clicintattr Register</description>
|
|
<addressOffset>0x10F6</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SHV</name>
|
|
<description>SHV</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TRIG</name>
|
|
<description>TRIG</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTATTR_62</name>
|
|
<displayName>CLICINTIE_62</displayName>
|
|
<description>clicintattr Register</description>
|
|
<addressOffset>0x10FA</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SHV</name>
|
|
<description>SHV</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TRIG</name>
|
|
<description>TRIG</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTATTR_63</name>
|
|
<displayName>CLICINTIE_63</displayName>
|
|
<description>clicintattr Register</description>
|
|
<addressOffset>0x10FE</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SHV</name>
|
|
<description>SHV</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TRIG</name>
|
|
<description>TRIG</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTATTR_64</name>
|
|
<displayName>CLICINTIE_64</displayName>
|
|
<description>clicintattr Register</description>
|
|
<addressOffset>0x1102</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SHV</name>
|
|
<description>SHV</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TRIG</name>
|
|
<description>TRIG</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTATTR_65</name>
|
|
<displayName>CLICINTIE_65</displayName>
|
|
<description>clicintattr Register</description>
|
|
<addressOffset>0x1106</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SHV</name>
|
|
<description>SHV</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TRIG</name>
|
|
<description>TRIG</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTATTR_66</name>
|
|
<displayName>CLICINTIE_66</displayName>
|
|
<description>clicintattr Register</description>
|
|
<addressOffset>0x110A</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SHV</name>
|
|
<description>SHV</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TRIG</name>
|
|
<description>TRIG</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTATTR_67</name>
|
|
<displayName>CLICINTIE_67</displayName>
|
|
<description>clicintattr Register</description>
|
|
<addressOffset>0x110E</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SHV</name>
|
|
<description>SHV</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TRIG</name>
|
|
<description>TRIG</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTATTR_68</name>
|
|
<displayName>CLICINTIE_68</displayName>
|
|
<description>clicintattr Register</description>
|
|
<addressOffset>0x1112</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SHV</name>
|
|
<description>SHV</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TRIG</name>
|
|
<description>TRIG</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTATTR_69</name>
|
|
<displayName>CLICINTIE_69</displayName>
|
|
<description>clicintattr Register</description>
|
|
<addressOffset>0x1116</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SHV</name>
|
|
<description>SHV</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TRIG</name>
|
|
<description>TRIG</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTATTR_70</name>
|
|
<displayName>CLICINTIE_70</displayName>
|
|
<description>clicintattr Register</description>
|
|
<addressOffset>0x111A</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SHV</name>
|
|
<description>SHV</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TRIG</name>
|
|
<description>TRIG</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTATTR_71</name>
|
|
<displayName>CLICINTIE_71</displayName>
|
|
<description>clicintattr Register</description>
|
|
<addressOffset>0x111E</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SHV</name>
|
|
<description>SHV</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TRIG</name>
|
|
<description>TRIG</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTATTR_72</name>
|
|
<displayName>CLICINTIE_72</displayName>
|
|
<description>clicintattr Register</description>
|
|
<addressOffset>0x1122</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SHV</name>
|
|
<description>SHV</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TRIG</name>
|
|
<description>TRIG</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTATTR_73</name>
|
|
<displayName>CLICINTIE_73</displayName>
|
|
<description>clicintattr Register</description>
|
|
<addressOffset>0x1126</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SHV</name>
|
|
<description>SHV</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TRIG</name>
|
|
<description>TRIG</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTATTR_74</name>
|
|
<displayName>CLICINTIE_74</displayName>
|
|
<description>clicintattr Register</description>
|
|
<addressOffset>0x112A</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SHV</name>
|
|
<description>SHV</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TRIG</name>
|
|
<description>TRIG</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTATTR_75</name>
|
|
<displayName>CLICINTIE_75</displayName>
|
|
<description>clicintattr Register</description>
|
|
<addressOffset>0x112E</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SHV</name>
|
|
<description>SHV</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TRIG</name>
|
|
<description>TRIG</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTATTR_76</name>
|
|
<displayName>CLICINTIE_76</displayName>
|
|
<description>clicintattr Register</description>
|
|
<addressOffset>0x1132</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SHV</name>
|
|
<description>SHV</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TRIG</name>
|
|
<description>TRIG</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTATTR_77</name>
|
|
<displayName>CLICINTIE_77</displayName>
|
|
<description>clicintattr Register</description>
|
|
<addressOffset>0x1136</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SHV</name>
|
|
<description>SHV</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TRIG</name>
|
|
<description>TRIG</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTATTR_78</name>
|
|
<displayName>CLICINTIE_78</displayName>
|
|
<description>clicintattr Register</description>
|
|
<addressOffset>0x113A</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SHV</name>
|
|
<description>SHV</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TRIG</name>
|
|
<description>TRIG</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTATTR_79</name>
|
|
<displayName>CLICINTIE_79</displayName>
|
|
<description>clicintattr Register</description>
|
|
<addressOffset>0x113E</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SHV</name>
|
|
<description>SHV</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TRIG</name>
|
|
<description>TRIG</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTATTR_80</name>
|
|
<displayName>CLICINTIE_80</displayName>
|
|
<description>clicintattr Register</description>
|
|
<addressOffset>0x1142</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SHV</name>
|
|
<description>SHV</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TRIG</name>
|
|
<description>TRIG</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTATTR_81</name>
|
|
<displayName>CLICINTIE_81</displayName>
|
|
<description>clicintattr Register</description>
|
|
<addressOffset>0x1146</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SHV</name>
|
|
<description>SHV</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TRIG</name>
|
|
<description>TRIG</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTATTR_82</name>
|
|
<displayName>CLICINTIE_82</displayName>
|
|
<description>clicintattr Register</description>
|
|
<addressOffset>0x114A</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SHV</name>
|
|
<description>SHV</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TRIG</name>
|
|
<description>TRIG</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTATTR_83</name>
|
|
<displayName>CLICINTIE_83</displayName>
|
|
<description>clicintattr Register</description>
|
|
<addressOffset>0x114E</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SHV</name>
|
|
<description>SHV</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TRIG</name>
|
|
<description>TRIG</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTATTR_84</name>
|
|
<displayName>CLICINTIE_84</displayName>
|
|
<description>clicintattr Register</description>
|
|
<addressOffset>0x1152</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SHV</name>
|
|
<description>SHV</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TRIG</name>
|
|
<description>TRIG</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTATTR_85</name>
|
|
<displayName>CLICINTIE_85</displayName>
|
|
<description>clicintattr Register</description>
|
|
<addressOffset>0x1156</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SHV</name>
|
|
<description>SHV</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TRIG</name>
|
|
<description>TRIG</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTATTR_86</name>
|
|
<displayName>CLICINTIE_86</displayName>
|
|
<description>clicintattr Register</description>
|
|
<addressOffset>0x115A</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SHV</name>
|
|
<description>SHV</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TRIG</name>
|
|
<description>TRIG</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
|
|
<register>
|
|
<name>CLICINTCTL_0</name>
|
|
<displayName>CLICINTCTL_0</displayName>
|
|
<description>clicintctl Register</description>
|
|
<addressOffset>0x1003</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LEVEL_PRIORITY</name>
|
|
<description>LEVEL_PRIORITY</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTCTL_1</name>
|
|
<displayName>CLICINTCTL_1</displayName>
|
|
<description>clicintctl Register</description>
|
|
<addressOffset>0x1007</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LEVEL_PRIORITY</name>
|
|
<description>LEVEL_PRIORITY</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTCTL_2</name>
|
|
<displayName>CLICINTCTL_2</displayName>
|
|
<description>clicintctl Register</description>
|
|
<addressOffset>0x100B</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LEVEL_PRIORITY</name>
|
|
<description>LEVEL_PRIORITY</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTCTL_3</name>
|
|
<displayName>CLICINTCTL_3</displayName>
|
|
<description>clicintctl Register</description>
|
|
<addressOffset>0x100F</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LEVEL_PRIORITY</name>
|
|
<description>LEVEL_PRIORITY</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTCTL_4</name>
|
|
<displayName>CLICINTCTL_4</displayName>
|
|
<description>clicintctl Register</description>
|
|
<addressOffset>0x1013</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LEVEL_PRIORITY</name>
|
|
<description>LEVEL_PRIORITY</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTCTL_5</name>
|
|
<displayName>CLICINTCTL_5</displayName>
|
|
<description>clicintctl Register</description>
|
|
<addressOffset>0x1017</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LEVEL_PRIORITY</name>
|
|
<description>LEVEL_PRIORITY</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTCTL_6</name>
|
|
<displayName>CLICINTCTL_6</displayName>
|
|
<description>clicintctl Register</description>
|
|
<addressOffset>0x101B</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LEVEL_PRIORITY</name>
|
|
<description>LEVEL_PRIORITY</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTCTL_7</name>
|
|
<displayName>CLICINTCTL_7</displayName>
|
|
<description>clicintctl Register</description>
|
|
<addressOffset>0x101F</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LEVEL_PRIORITY</name>
|
|
<description>LEVEL_PRIORITY</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTCTL_8</name>
|
|
<displayName>CLICINTCTL_8</displayName>
|
|
<description>clicintctl Register</description>
|
|
<addressOffset>0x1023</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LEVEL_PRIORITY</name>
|
|
<description>LEVEL_PRIORITY</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTCTL_9</name>
|
|
<displayName>CLICINTCTL_9</displayName>
|
|
<description>clicintctl Register</description>
|
|
<addressOffset>0x1027</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LEVEL_PRIORITY</name>
|
|
<description>LEVEL_PRIORITY</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTCTL_10</name>
|
|
<displayName>CLICINTCTL_10</displayName>
|
|
<description>clicintctl Register</description>
|
|
<addressOffset>0x102B</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LEVEL_PRIORITY</name>
|
|
<description>LEVEL_PRIORITY</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTCTL_11</name>
|
|
<displayName>CLICINTCTL_11</displayName>
|
|
<description>clicintctl Register</description>
|
|
<addressOffset>0x102F</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LEVEL_PRIORITY</name>
|
|
<description>LEVEL_PRIORITY</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTCTL_12</name>
|
|
<displayName>CLICINTCTL_12</displayName>
|
|
<description>clicintctl Register</description>
|
|
<addressOffset>0x1033</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LEVEL_PRIORITY</name>
|
|
<description>LEVEL_PRIORITY</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTCTL_13</name>
|
|
<displayName>CLICINTCTL_13</displayName>
|
|
<description>clicintctl Register</description>
|
|
<addressOffset>0x1037</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LEVEL_PRIORITY</name>
|
|
<description>LEVEL_PRIORITY</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTCTL_14</name>
|
|
<displayName>CLICINTCTL_14</displayName>
|
|
<description>clicintctl Register</description>
|
|
<addressOffset>0x103B</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LEVEL_PRIORITY</name>
|
|
<description>LEVEL_PRIORITY</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTCTL_15</name>
|
|
<displayName>CLICINTCTL_15</displayName>
|
|
<description>clicintctl Register</description>
|
|
<addressOffset>0x103F</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LEVEL_PRIORITY</name>
|
|
<description>LEVEL_PRIORITY</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTCTL_16</name>
|
|
<displayName>CLICINTCTL_16</displayName>
|
|
<description>clicintctl Register</description>
|
|
<addressOffset>0x1043</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LEVEL_PRIORITY</name>
|
|
<description>LEVEL_PRIORITY</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTCTL_17</name>
|
|
<displayName>CLICINTCTL_17</displayName>
|
|
<description>clicintctl Register</description>
|
|
<addressOffset>0x1047</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LEVEL_PRIORITY</name>
|
|
<description>LEVEL_PRIORITY</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTCTL_18</name>
|
|
<displayName>CLICINTCTL_18</displayName>
|
|
<description>clicintctl Register</description>
|
|
<addressOffset>0x104B</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LEVEL_PRIORITY</name>
|
|
<description>LEVEL_PRIORITY</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTCTL_19</name>
|
|
<displayName>CLICINTCTL_19</displayName>
|
|
<description>clicintctl Register</description>
|
|
<addressOffset>0x104F</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LEVEL_PRIORITY</name>
|
|
<description>LEVEL_PRIORITY</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTCTL_20</name>
|
|
<displayName>CLICINTCTL_20</displayName>
|
|
<description>clicintctl Register</description>
|
|
<addressOffset>0x1053</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LEVEL_PRIORITY</name>
|
|
<description>LEVEL_PRIORITY</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTCTL_21</name>
|
|
<displayName>CLICINTCTL_21</displayName>
|
|
<description>clicintctl Register</description>
|
|
<addressOffset>0x1057</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LEVEL_PRIORITY</name>
|
|
<description>LEVEL_PRIORITY</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTCTL_22</name>
|
|
<displayName>CLICINTCTL_22</displayName>
|
|
<description>clicintctl Register</description>
|
|
<addressOffset>0x105B</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LEVEL_PRIORITY</name>
|
|
<description>LEVEL_PRIORITY</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTCTL_23</name>
|
|
<displayName>CLICINTCTL_23</displayName>
|
|
<description>clicintctl Register</description>
|
|
<addressOffset>0x105F</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LEVEL_PRIORITY</name>
|
|
<description>LEVEL_PRIORITY</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTCTL_24</name>
|
|
<displayName>CLICINTCTL_24</displayName>
|
|
<description>clicintctl Register</description>
|
|
<addressOffset>0x1063</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LEVEL_PRIORITY</name>
|
|
<description>LEVEL_PRIORITY</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTCTL_25</name>
|
|
<displayName>CLICINTCTL_25</displayName>
|
|
<description>clicintctl Register</description>
|
|
<addressOffset>0x1067</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LEVEL_PRIORITY</name>
|
|
<description>LEVEL_PRIORITY</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTCTL_26</name>
|
|
<displayName>CLICINTCTL_26</displayName>
|
|
<description>clicintctl Register</description>
|
|
<addressOffset>0x106B</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LEVEL_PRIORITY</name>
|
|
<description>LEVEL_PRIORITY</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTCTL_27</name>
|
|
<displayName>CLICINTCTL_27</displayName>
|
|
<description>clicintctl Register</description>
|
|
<addressOffset>0x106F</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LEVEL_PRIORITY</name>
|
|
<description>LEVEL_PRIORITY</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTCTL_28</name>
|
|
<displayName>CLICINTCTL_28</displayName>
|
|
<description>clicintctl Register</description>
|
|
<addressOffset>0x1073</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LEVEL_PRIORITY</name>
|
|
<description>LEVEL_PRIORITY</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTCTL_29</name>
|
|
<displayName>CLICINTCTL_29</displayName>
|
|
<description>clicintctl Register</description>
|
|
<addressOffset>0x1077</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LEVEL_PRIORITY</name>
|
|
<description>LEVEL_PRIORITY</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTCTL_30</name>
|
|
<displayName>CLICINTCTL_30</displayName>
|
|
<description>clicintctl Register</description>
|
|
<addressOffset>0x107B</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LEVEL_PRIORITY</name>
|
|
<description>LEVEL_PRIORITY</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTCTL_31</name>
|
|
<displayName>CLICINTCTL_31</displayName>
|
|
<description>clicintctl Register</description>
|
|
<addressOffset>0x107F</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LEVEL_PRIORITY</name>
|
|
<description>LEVEL_PRIORITY</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTCTL_32</name>
|
|
<displayName>CLICINTCTL_32</displayName>
|
|
<description>clicintctl Register</description>
|
|
<addressOffset>0x1083</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LEVEL_PRIORITY</name>
|
|
<description>LEVEL_PRIORITY</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTCTL_33</name>
|
|
<displayName>CLICINTCTL_33</displayName>
|
|
<description>clicintctl Register</description>
|
|
<addressOffset>0x1087</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LEVEL_PRIORITY</name>
|
|
<description>LEVEL_PRIORITY</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTCTL_34</name>
|
|
<displayName>CLICINTCTL_34</displayName>
|
|
<description>clicintctl Register</description>
|
|
<addressOffset>0x108B</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LEVEL_PRIORITY</name>
|
|
<description>LEVEL_PRIORITY</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTCTL_35</name>
|
|
<displayName>CLICINTCTL_35</displayName>
|
|
<description>clicintctl Register</description>
|
|
<addressOffset>0x108F</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LEVEL_PRIORITY</name>
|
|
<description>LEVEL_PRIORITY</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTCTL_36</name>
|
|
<displayName>CLICINTCTL_36</displayName>
|
|
<description>clicintctl Register</description>
|
|
<addressOffset>0x1093</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LEVEL_PRIORITY</name>
|
|
<description>LEVEL_PRIORITY</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTCTL_37</name>
|
|
<displayName>CLICINTCTL_37</displayName>
|
|
<description>clicintctl Register</description>
|
|
<addressOffset>0x1097</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LEVEL_PRIORITY</name>
|
|
<description>LEVEL_PRIORITY</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTCTL_38</name>
|
|
<displayName>CLICINTCTL_38</displayName>
|
|
<description>clicintctl Register</description>
|
|
<addressOffset>0x109B</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LEVEL_PRIORITY</name>
|
|
<description>LEVEL_PRIORITY</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTCTL_39</name>
|
|
<displayName>CLICINTCTL_39</displayName>
|
|
<description>clicintctl Register</description>
|
|
<addressOffset>0x109F</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LEVEL_PRIORITY</name>
|
|
<description>LEVEL_PRIORITY</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTCTL_40</name>
|
|
<displayName>CLICINTCTL_40</displayName>
|
|
<description>clicintctl Register</description>
|
|
<addressOffset>0x10A3</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LEVEL_PRIORITY</name>
|
|
<description>LEVEL_PRIORITY</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTCTL_41</name>
|
|
<displayName>CLICINTCTL_41</displayName>
|
|
<description>clicintctl Register</description>
|
|
<addressOffset>0x10A7</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LEVEL_PRIORITY</name>
|
|
<description>LEVEL_PRIORITY</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTCTL_42</name>
|
|
<displayName>CLICINTCTL_42</displayName>
|
|
<description>clicintctl Register</description>
|
|
<addressOffset>0x10AB</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LEVEL_PRIORITY</name>
|
|
<description>LEVEL_PRIORITY</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTCTL_43</name>
|
|
<displayName>CLICINTCTL_43</displayName>
|
|
<description>clicintctl Register</description>
|
|
<addressOffset>0x10AF</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LEVEL_PRIORITY</name>
|
|
<description>LEVEL_PRIORITY</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTCTL_44</name>
|
|
<displayName>CLICINTCTL_44</displayName>
|
|
<description>clicintctl Register</description>
|
|
<addressOffset>0x10B3</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LEVEL_PRIORITY</name>
|
|
<description>LEVEL_PRIORITY</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTCTL_45</name>
|
|
<displayName>CLICINTCTL_45</displayName>
|
|
<description>clicintctl Register</description>
|
|
<addressOffset>0x10B7</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LEVEL_PRIORITY</name>
|
|
<description>LEVEL_PRIORITY</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTCTL_46</name>
|
|
<displayName>CLICINTCTL_46</displayName>
|
|
<description>clicintctl Register</description>
|
|
<addressOffset>0x10BB</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LEVEL_PRIORITY</name>
|
|
<description>LEVEL_PRIORITY</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTCTL_47</name>
|
|
<displayName>CLICINTCTL_47</displayName>
|
|
<description>clicintctl Register</description>
|
|
<addressOffset>0x10BF</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LEVEL_PRIORITY</name>
|
|
<description>LEVEL_PRIORITY</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTCTL_48</name>
|
|
<displayName>CLICINTCTL_48</displayName>
|
|
<description>clicintctl Register</description>
|
|
<addressOffset>0x10C3</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LEVEL_PRIORITY</name>
|
|
<description>LEVEL_PRIORITY</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTCTL_49</name>
|
|
<displayName>CLICINTCTL_49</displayName>
|
|
<description>clicintctl Register</description>
|
|
<addressOffset>0x10C7</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LEVEL_PRIORITY</name>
|
|
<description>LEVEL_PRIORITY</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTCTL_50</name>
|
|
<displayName>CLICINTCTL_50</displayName>
|
|
<description>clicintctl Register</description>
|
|
<addressOffset>0x10CB</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LEVEL_PRIORITY</name>
|
|
<description>LEVEL_PRIORITY</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTCTL_51</name>
|
|
<displayName>CLICINTCTL_51</displayName>
|
|
<description>clicintctl Register</description>
|
|
<addressOffset>0x10CF</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LEVEL_PRIORITY</name>
|
|
<description>LEVEL_PRIORITY</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTCTL_52</name>
|
|
<displayName>CLICINTCTL_52</displayName>
|
|
<description>clicintctl Register</description>
|
|
<addressOffset>0x10D3</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LEVEL_PRIORITY</name>
|
|
<description>LEVEL_PRIORITY</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTCTL_53</name>
|
|
<displayName>CLICINTCTL_53</displayName>
|
|
<description>clicintctl Register</description>
|
|
<addressOffset>0x10D7</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LEVEL_PRIORITY</name>
|
|
<description>LEVEL_PRIORITY</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTCTL_54</name>
|
|
<displayName>CLICINTCTL_54</displayName>
|
|
<description>clicintctl Register</description>
|
|
<addressOffset>0x10DB</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LEVEL_PRIORITY</name>
|
|
<description>LEVEL_PRIORITY</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTCTL_55</name>
|
|
<displayName>CLICINTCTL_55</displayName>
|
|
<description>clicintctl Register</description>
|
|
<addressOffset>0x10DF</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LEVEL_PRIORITY</name>
|
|
<description>LEVEL_PRIORITY</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTCTL_56</name>
|
|
<displayName>CLICINTCTL_56</displayName>
|
|
<description>clicintctl Register</description>
|
|
<addressOffset>0x10E3</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LEVEL_PRIORITY</name>
|
|
<description>LEVEL_PRIORITY</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTCTL_57</name>
|
|
<displayName>CLICINTCTL_57</displayName>
|
|
<description>clicintctl Register</description>
|
|
<addressOffset>0x10E7</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LEVEL_PRIORITY</name>
|
|
<description>LEVEL_PRIORITY</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTCTL_58</name>
|
|
<displayName>CLICINTCTL_58</displayName>
|
|
<description>clicintctl Register</description>
|
|
<addressOffset>0x10EB</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LEVEL_PRIORITY</name>
|
|
<description>LEVEL_PRIORITY</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTCTL_59</name>
|
|
<displayName>CLICINTCTL_59</displayName>
|
|
<description>clicintctl Register</description>
|
|
<addressOffset>0x10EF</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LEVEL_PRIORITY</name>
|
|
<description>LEVEL_PRIORITY</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTCTL_60</name>
|
|
<displayName>CLICINTCTL_60</displayName>
|
|
<description>clicintctl Register</description>
|
|
<addressOffset>0x10F3</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LEVEL_PRIORITY</name>
|
|
<description>LEVEL_PRIORITY</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTCTL_61</name>
|
|
<displayName>CLICINTCTL_61</displayName>
|
|
<description>clicintctl Register</description>
|
|
<addressOffset>0x10F7</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LEVEL_PRIORITY</name>
|
|
<description>LEVEL_PRIORITY</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTCTL_62</name>
|
|
<displayName>CLICINTCTL_62</displayName>
|
|
<description>clicintctl Register</description>
|
|
<addressOffset>0x10FB</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LEVEL_PRIORITY</name>
|
|
<description>LEVEL_PRIORITY</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTCTL_63</name>
|
|
<displayName>CLICINTCTL_63</displayName>
|
|
<description>clicintctl Register</description>
|
|
<addressOffset>0x10FF</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LEVEL_PRIORITY</name>
|
|
<description>LEVEL_PRIORITY</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTCTL_64</name>
|
|
<displayName>CLICINTCTL_64</displayName>
|
|
<description>clicintctl Register</description>
|
|
<addressOffset>0x1103</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LEVEL_PRIORITY</name>
|
|
<description>LEVEL_PRIORITY</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTCTL_65</name>
|
|
<displayName>CLICINTCTL_65</displayName>
|
|
<description>clicintctl Register</description>
|
|
<addressOffset>0x1107</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LEVEL_PRIORITY</name>
|
|
<description>LEVEL_PRIORITY</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTCTL_66</name>
|
|
<displayName>CLICINTCTL_66</displayName>
|
|
<description>clicintctl Register</description>
|
|
<addressOffset>0x110B</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LEVEL_PRIORITY</name>
|
|
<description>LEVEL_PRIORITY</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTCTL_67</name>
|
|
<displayName>CLICINTCTL_67</displayName>
|
|
<description>clicintctl Register</description>
|
|
<addressOffset>0x110F</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LEVEL_PRIORITY</name>
|
|
<description>LEVEL_PRIORITY</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTCTL_68</name>
|
|
<displayName>CLICINTCTL_68</displayName>
|
|
<description>clicintctl Register</description>
|
|
<addressOffset>0x1113</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LEVEL_PRIORITY</name>
|
|
<description>LEVEL_PRIORITY</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTCTL_69</name>
|
|
<displayName>CLICINTCTL_69</displayName>
|
|
<description>clicintctl Register</description>
|
|
<addressOffset>0x1117</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LEVEL_PRIORITY</name>
|
|
<description>LEVEL_PRIORITY</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTCTL_70</name>
|
|
<displayName>CLICINTCTL_70</displayName>
|
|
<description>clicintctl Register</description>
|
|
<addressOffset>0x111B</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LEVEL_PRIORITY</name>
|
|
<description>LEVEL_PRIORITY</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTCTL_71</name>
|
|
<displayName>CLICINTCTL_71</displayName>
|
|
<description>clicintctl Register</description>
|
|
<addressOffset>0x111F</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LEVEL_PRIORITY</name>
|
|
<description>LEVEL_PRIORITY</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTCTL_72</name>
|
|
<displayName>CLICINTCTL_72</displayName>
|
|
<description>clicintctl Register</description>
|
|
<addressOffset>0x1123</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LEVEL_PRIORITY</name>
|
|
<description>LEVEL_PRIORITY</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTCTL_73</name>
|
|
<displayName>CLICINTCTL_73</displayName>
|
|
<description>clicintctl Register</description>
|
|
<addressOffset>0x1127</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LEVEL_PRIORITY</name>
|
|
<description>LEVEL_PRIORITY</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTCTL_74</name>
|
|
<displayName>CLICINTCTL_74</displayName>
|
|
<description>clicintctl Register</description>
|
|
<addressOffset>0x112B</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LEVEL_PRIORITY</name>
|
|
<description>LEVEL_PRIORITY</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTCTL_75</name>
|
|
<displayName>CLICINTCTL_75</displayName>
|
|
<description>clicintctl Register</description>
|
|
<addressOffset>0x112F</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LEVEL_PRIORITY</name>
|
|
<description>LEVEL_PRIORITY</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTCTL_76</name>
|
|
<displayName>CLICINTCTL_76</displayName>
|
|
<description>clicintctl Register</description>
|
|
<addressOffset>0x1133</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LEVEL_PRIORITY</name>
|
|
<description>LEVEL_PRIORITY</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTCTL_77</name>
|
|
<displayName>CLICINTCTL_77</displayName>
|
|
<description>clicintctl Register</description>
|
|
<addressOffset>0x1137</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LEVEL_PRIORITY</name>
|
|
<description>LEVEL_PRIORITY</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTCTL_78</name>
|
|
<displayName>CLICINTCTL_78</displayName>
|
|
<description>clicintctl Register</description>
|
|
<addressOffset>0x113B</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LEVEL_PRIORITY</name>
|
|
<description>LEVEL_PRIORITY</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTCTL_79</name>
|
|
<displayName>CLICINTCTL_79</displayName>
|
|
<description>clicintctl Register</description>
|
|
<addressOffset>0x113F</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LEVEL_PRIORITY</name>
|
|
<description>LEVEL_PRIORITY</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTCTL_80</name>
|
|
<displayName>CLICINTCTL_80</displayName>
|
|
<description>clicintctl Register</description>
|
|
<addressOffset>0x1143</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LEVEL_PRIORITY</name>
|
|
<description>LEVEL_PRIORITY</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTCTL_81</name>
|
|
<displayName>CLICINTCTL_81</displayName>
|
|
<description>clicintctl Register</description>
|
|
<addressOffset>0x1147</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LEVEL_PRIORITY</name>
|
|
<description>LEVEL_PRIORITY</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTCTL_82</name>
|
|
<displayName>CLICINTCTL_82</displayName>
|
|
<description>clicintctl Register</description>
|
|
<addressOffset>0x114B</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LEVEL_PRIORITY</name>
|
|
<description>LEVEL_PRIORITY</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTCTL_83</name>
|
|
<displayName>CLICINTCTL_83</displayName>
|
|
<description>clicintctl Register</description>
|
|
<addressOffset>0x114F</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LEVEL_PRIORITY</name>
|
|
<description>LEVEL_PRIORITY</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTCTL_84</name>
|
|
<displayName>CLICINTCTL_84</displayName>
|
|
<description>clicintctl Register</description>
|
|
<addressOffset>0x1153</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LEVEL_PRIORITY</name>
|
|
<description>LEVEL_PRIORITY</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTCTL_85</name>
|
|
<displayName>CLICINTCTL_85</displayName>
|
|
<description>clicintctl Register</description>
|
|
<addressOffset>0x1157</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LEVEL_PRIORITY</name>
|
|
<description>LEVEL_PRIORITY</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLICINTCTL_86</name>
|
|
<displayName>CLICINTCTL_86</displayName>
|
|
<description>clicintctl Register</description>
|
|
<addressOffset>0x115B</addressOffset>
|
|
<size>0x08</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LEVEL_PRIORITY</name>
|
|
<description>LEVEL_PRIORITY</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral>
|
|
|
|
<peripheral>
|
|
<name>PMU</name>
|
|
<description>Power management unit</description>
|
|
<groupName>PMU</groupName>
|
|
<baseAddress>0x40007000</baseAddress>
|
|
<addressBlock>
|
|
<offset>0x0</offset>
|
|
<size>0x400</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<registers>
|
|
<register>
|
|
<name>CTL</name>
|
|
<displayName>CTL</displayName>
|
|
<description>power control register</description>
|
|
<addressOffset>0x00</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>BKPWEN</name>
|
|
<description>Backup Domain Write Enable</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>LVDT</name>
|
|
<description>Low Voltage Detector Threshold</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>LVDEN</name>
|
|
<description>Low Voltage Detector Enable</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>STBRST</name>
|
|
<description>Standby Flag Reset</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>WURST</name>
|
|
<description>Wakeup Flag Reset</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>STBMOD</name>
|
|
<description>Standby Mode</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>LDOLP</name>
|
|
<description>LDO Low Power Mode</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CS</name>
|
|
<displayName>CS</displayName>
|
|
<description>power control/status register</description>
|
|
<addressOffset>0x04</addressOffset>
|
|
<size>0x20</size>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>WUPEN</name>
|
|
<description>Enable WKUP pin</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>LVDF</name>
|
|
<description>Low Voltage Detector Status Flag</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>STBF</name>
|
|
<description>Standby flag</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>WUF</name>
|
|
<description>Wakeup flag</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>RCU</name>
|
|
<description>Reset and clock unit</description>
|
|
<groupName>RCU</groupName>
|
|
<baseAddress>0x40021000</baseAddress>
|
|
<addressBlock>
|
|
<offset>0x0</offset>
|
|
<size>0x400</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<interrupt>
|
|
<name>RCU</name>
|
|
<value>24</value>
|
|
</interrupt>
|
|
<registers>
|
|
<register>
|
|
<name>CTL</name>
|
|
<displayName>CTL</displayName>
|
|
<description>Control register</description>
|
|
<addressOffset>0x0</addressOffset>
|
|
<size>0x20</size>
|
|
<resetValue>0x00000083</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IRC8MEN</name>
|
|
<description>Internal 8MHz RC oscillator Enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>IRC8MSTB</name>
|
|
<description>IRC8M Internal 8MHz RC Oscillator stabilization Flag</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>IRC8MADJ</name>
|
|
<description>Internal 8MHz RC Oscillator clock trim adjust value</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>5</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>IRC8MCALIB</name>
|
|
<description>Internal 8MHz RC Oscillator calibration value register</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>HXTALEN</name>
|
|
<description>External High Speed oscillator Enable</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>HXTALSTB</name>
|
|
<description>External crystal oscillator (HXTAL) clock stabilization flag</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>HXTALBPS</name>
|
|
<description>External crystal oscillator (HXTAL) clock bypass mode enable</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CKMEN</name>
|
|
<description>HXTAL Clock Monitor Enable</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>PLLEN</name>
|
|
<description>PLL enable</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>PLLSTB</name>
|
|
<description>PLL Clock Stabilization Flag</description>
|
|
<bitOffset>25</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>PLL1EN</name>
|
|
<description>PLL1 enable</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>PLL1STB</name>
|
|
<description>PLL1 Clock Stabilization Flag</description>
|
|
<bitOffset>27</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>PLL2EN</name>
|
|
<description>PLL2 enable</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>PLL2STB</name>
|
|
<description>PLL2 Clock Stabilization Flag</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CFG0</name>
|
|
<displayName>CFG0</displayName>
|
|
<description>Clock configuration register 0
|
|
(RCU_CFG0)</description>
|
|
<addressOffset>0x04</addressOffset>
|
|
<size>0x20</size>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SCS</name>
|
|
<description>System clock switch</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>SCSS</name>
|
|
<description>System clock switch status</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>AHBPSC</name>
|
|
<description>AHB prescaler selection</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>APB1PSC</name>
|
|
<description>APB1 prescaler selection</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>APB2PSC</name>
|
|
<description>APB2 prescaler selection</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>ADCPSC_1_0</name>
|
|
<description>ADC clock prescaler selection</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>PLLSEL</name>
|
|
<description>PLL Clock Source Selection</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>PREDV0_LSB</name>
|
|
<description>The LSB of PREDV0 division factor</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>PLLMF_3_0</name>
|
|
<description>The PLL clock multiplication factor</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>USBFSPSC</name>
|
|
<description>USBFS clock prescaler selection</description>
|
|
<bitOffset>22</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CKOUT0SEL</name>
|
|
<description>CKOUT0 Clock Source Selection</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>ADCPSC_2</name>
|
|
<description>Bit 2 of ADCPSC</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>PLLMF_4</name>
|
|
<description>Bit 4 of PLLMF</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>INT</name>
|
|
<displayName>INT</displayName>
|
|
<description>Clock interrupt register
|
|
(RCU_INT)</description>
|
|
<addressOffset>0x08</addressOffset>
|
|
<size>0x20</size>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IRC40KSTBIF</name>
|
|
<description>IRC40K stabilization interrupt flag</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>LXTALSTBIF</name>
|
|
<description>LXTAL stabilization interrupt flag</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>IRC8MSTBIF</name>
|
|
<description>IRC8M stabilization interrupt flag</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>HXTALSTBIF</name>
|
|
<description>HXTAL stabilization interrupt flag</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>PLLSTBIF</name>
|
|
<description>PLL stabilization interrupt flag</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>PLL1STBIF</name>
|
|
<description>PLL1 stabilization interrupt flag</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>PLL2STBIF</name>
|
|
<description>PLL2 stabilization interrupt flag</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CKMIF</name>
|
|
<description>HXTAL Clock Stuck Interrupt Flag</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>IRC40KSTBIE</name>
|
|
<description>IRC40K Stabilization interrupt enable</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>LXTALSTBIE</name>
|
|
<description>LXTAL Stabilization Interrupt Enable</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>IRC8MSTBIE</name>
|
|
<description>IRC8M Stabilization Interrupt Enable</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>HXTALSTBIE</name>
|
|
<description>HXTAL Stabilization Interrupt Enable</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>PLLSTBIE</name>
|
|
<description>PLL Stabilization Interrupt Enable</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>PLL1STBIE</name>
|
|
<description>PLL1 Stabilization Interrupt Enable</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>PLL2STBIE</name>
|
|
<description>PLL2 Stabilization Interrupt Enable</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>IRC40KSTBIC</name>
|
|
<description>IRC40K Stabilization Interrupt Clear</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>LXTALSTBIC</name>
|
|
<description>LXTAL Stabilization Interrupt Clear</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>IRC8MSTBIC</name>
|
|
<description>IRC8M Stabilization Interrupt Clear</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>HXTALSTBIC</name>
|
|
<description>HXTAL Stabilization Interrupt Clear</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>PLLSTBIC</name>
|
|
<description>PLL stabilization Interrupt Clear</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>PLL1STBIC</name>
|
|
<description>PLL1 stabilization Interrupt Clear</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>PLL2STBIC</name>
|
|
<description>PLL2 stabilization Interrupt Clear</description>
|
|
<bitOffset>22</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CKMIC</name>
|
|
<description>HXTAL Clock Stuck Interrupt Clear</description>
|
|
<bitOffset>23</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
|
|
<register>
|
|
<name>APB2RST</name>
|
|
<displayName>APB2RST</displayName>
|
|
<description>APB2 reset register
|
|
(RCU_APB2RST)</description>
|
|
<addressOffset>0x0C</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>AFRST</name>
|
|
<description>Alternate function I/O reset</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PARST</name>
|
|
<description>GPIO port A reset</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PBRST</name>
|
|
<description>GPIO port B reset</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PCRST</name>
|
|
<description>GPIO port C reset</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PDRST</name>
|
|
<description>GPIO port D reset</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PERST</name>
|
|
<description>GPIO port E reset</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ADC0RST</name>
|
|
<description>ADC0 reset</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ADC1RST</name>
|
|
<description>ADC1 reset</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TIMER0RST</name>
|
|
<description>Timer 0 reset</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>SPI0RST</name>
|
|
<description>SPI0 reset</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>USART0RST</name>
|
|
<description>USART0 Reset</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>APB1RST</name>
|
|
<displayName>APB1RST</displayName>
|
|
<description>APB1 reset register
|
|
(RCU_APB1RST)</description>
|
|
<addressOffset>0x10</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TIMER1RST</name>
|
|
<description>TIMER1 timer reset</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TIMER2RST</name>
|
|
<description>TIMER2 timer reset</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TIMER3RST</name>
|
|
<description>TIMER3 timer reset</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TIMER4RST</name>
|
|
<description>TIMER4 timer reset</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TIMER5RST</name>
|
|
<description>TIMER5 timer reset</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TIMER6RST</name>
|
|
<description>TIMER6 timer reset</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>WWDGTRST</name>
|
|
<description>Window watchdog timer reset</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>SPI1RST</name>
|
|
<description>SPI1 reset</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>SPI2RST</name>
|
|
<description>SPI2 reset</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>USART1RST</name>
|
|
<description>USART1 reset</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>USART2RST</name>
|
|
<description>USART2 reset</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>UART3RST</name>
|
|
<description>UART3 reset</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>UART4RST</name>
|
|
<description>UART4 reset</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>I2C0RST</name>
|
|
<description>I2C0 reset</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>I2C1RST</name>
|
|
<description>I2C1 reset</description>
|
|
<bitOffset>22</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CAN0RST</name>
|
|
<description>CAN0 reset</description>
|
|
<bitOffset>25</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CAN1RST</name>
|
|
<description>CAN1 reset</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>BKPIRST</name>
|
|
<description>Backup interface reset</description>
|
|
<bitOffset>27</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PMURST</name>
|
|
<description>Power control reset</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DACRST</name>
|
|
<description>DAC reset</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
|
|
<register>
|
|
<name>AHBEN</name>
|
|
<displayName>AHBEN</displayName>
|
|
<description>AHB enable register</description>
|
|
<addressOffset>0x14</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000014</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DMA0EN</name>
|
|
<description>DMA0 clock enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DMA1EN</name>
|
|
<description>DMA1 clock enable</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>SRAMSPEN</name>
|
|
<description>SRAM interface clock enable when sleep mode</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FMCSPEN</name>
|
|
<description>FMC clock enable when sleep mode</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CRCEN</name>
|
|
<description>CRC clock enable</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>EXMCEN</name>
|
|
<description>EXMC clock enable</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>USBFSEN</name>
|
|
<description>USBFS clock enable</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>APB2EN</name>
|
|
<displayName>APB2EN</displayName>
|
|
<description>APB2 clock enable register
|
|
(RCU_APB2EN)</description>
|
|
<addressOffset>0x18</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>AFEN</name>
|
|
<description>Alternate function IO clock enable </description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PAEN</name>
|
|
<description>GPIO port A clock enable</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PBEN</name>
|
|
<description>GPIO port B clock enable</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PCEN</name>
|
|
<description>GPIO port C clock enable</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PDEN</name>
|
|
<description>GPIO port D clock enable </description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PEEN</name>
|
|
<description>GPIO port E clock enable </description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ADC0EN</name>
|
|
<description>ADC0 clock enable</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ADC1EN</name>
|
|
<description>ADC1 clock enable</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TIMER0EN</name>
|
|
<description>TIMER0 clock enable </description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>SPI0EN</name>
|
|
<description>SPI0 clock enable</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>USART0EN</name>
|
|
<description>USART0 clock enable</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
|
|
<register>
|
|
<name>APB1EN</name>
|
|
<displayName>APB1EN</displayName>
|
|
<description>APB1 clock enable register
|
|
(RCU_APB1EN)</description>
|
|
<addressOffset>0x1C</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TIMER1EN</name>
|
|
<description>TIMER1 timer clock enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TIMER2EN</name>
|
|
<description>TIMER2 timer clock enable</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TIMER3EN</name>
|
|
<description>TIMER3 timer clock enable</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TIMER4EN</name>
|
|
<description>TIMER4 timer clock enable</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TIMER5EN</name>
|
|
<description>TIMER5 timer clock enable</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TIMER6EN</name>
|
|
<description>TIMER6 timer clock enable</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>WWDGTEN</name>
|
|
<description>Window watchdog timer clock enable</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>SPI1EN</name>
|
|
<description>SPI1 clock enable</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>SPI2EN</name>
|
|
<description>SPI2 clock enable</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>USART1EN</name>
|
|
<description>USART1 clock enable</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>USART2EN</name>
|
|
<description>USART2 clock enable</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>UART3EN</name>
|
|
<description>UART3 clock enable</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>UART4EN</name>
|
|
<description>UART4 clock enable</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>I2C0EN</name>
|
|
<description>I2C0 clock enable</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>I2C1EN</name>
|
|
<description>I2C1 clock enable</description>
|
|
<bitOffset>22</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CAN0EN</name>
|
|
<description>CAN0 clock enable</description>
|
|
<bitOffset>25</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CAN1EN</name>
|
|
<description>CAN1 clock enable</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>BKPIEN</name>
|
|
<description>Backup interface clock enable </description>
|
|
<bitOffset>27</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PMUEN</name>
|
|
<description>Power control clock enable </description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DACEN</name>
|
|
<description>DAC clock enable</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
|
|
<register>
|
|
<name>BDCTL</name>
|
|
<displayName>BDCTL</displayName>
|
|
<description>Backup domain control register
|
|
(RCU_BDCTL)</description>
|
|
<addressOffset>0x20</addressOffset>
|
|
<size>0x20</size>
|
|
<resetValue>0x00000018</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LXTALEN</name>
|
|
<description>LXTAL enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>LXTALSTB</name>
|
|
<description>External low-speed oscillator stabilization</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>LXTALBPS</name>
|
|
<description>LXTAL bypass mode enable</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>RTCSRC</name>
|
|
<description>RTC clock entry selection</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>RTCEN</name>
|
|
<description>RTC clock enable</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>BKPRST</name>
|
|
<description>Backup domain reset</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RSTSCK</name>
|
|
<displayName>RSTSCK</displayName>
|
|
<description>Reset source /clock register
|
|
(RCU_RSTSCK)</description>
|
|
<addressOffset>0x24</addressOffset>
|
|
<size>0x20</size>
|
|
<resetValue>0x0C000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IRC40KEN</name>
|
|
<description>IRC40K enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>IRC40KSTB</name>
|
|
<description>IRC40K stabilization</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RSTFC</name>
|
|
<description>Reset flag clear</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>EPRSTF</name>
|
|
<description>External PIN reset flag</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>PORRSTF</name>
|
|
<description>Power reset flag</description>
|
|
<bitOffset>27</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>SWRSTF</name>
|
|
<description>Software reset flag</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>FWDGTRSTF</name>
|
|
<description>Free Watchdog timer reset flag</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>WWDGTRSTF</name>
|
|
<description>Window watchdog timer reset flag</description>
|
|
<bitOffset>30</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>LPRSTF</name>
|
|
<description>Low-power reset flag</description>
|
|
<bitOffset>31</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
|
|
<register>
|
|
<name>AHBRST</name>
|
|
<displayName>AHBRST</displayName>
|
|
<description>AHB reset register</description>
|
|
<addressOffset>0x28</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>USBFSRST</name>
|
|
<description>USBFS reset</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
|
|
<register>
|
|
<name>CFG1</name>
|
|
<displayName>CFG1</displayName>
|
|
<description>Clock Configuration register 1</description>
|
|
<addressOffset>0x2C</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>PREDV0</name>
|
|
<description>PREDV0 division factor</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PREDV1</name>
|
|
<description>PREDV1 division factor</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PLL1MF</name>
|
|
<description>The PLL1 clock multiplication factor</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PLL2MF</name>
|
|
<description>The PLL2 clock multiplication factor</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PREDV0SEL</name>
|
|
<description>PREDV0 input Clock Source Selection</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>I2S1SEL</name>
|
|
<description>I2S1 Clock Source Selection</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>I2S2SEL</name>
|
|
<description>I2S2 Clock Source Selection</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DSV</name>
|
|
<displayName>DSV</displayName>
|
|
<description>Deep sleep mode Voltage register</description>
|
|
<addressOffset>0x34</addressOffset>
|
|
<size>0x20</size>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DSLPVS</name>
|
|
<description>Deep-sleep mode voltage select</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral>
|
|
|
|
<peripheral>
|
|
<name>RTC</name>
|
|
<description>Real-time clock</description>
|
|
<groupName>RTC</groupName>
|
|
<baseAddress>0x40002800</baseAddress>
|
|
<addressBlock>
|
|
<offset>0x0</offset>
|
|
<size>0x400</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<interrupt>
|
|
<name>RTC</name>
|
|
<value>22</value>
|
|
</interrupt>
|
|
<interrupt>
|
|
<name>RTC_Alarm</name>
|
|
<value>60</value>
|
|
</interrupt>
|
|
<registers>
|
|
<register>
|
|
<name>INTEN</name>
|
|
<displayName>INTEN</displayName>
|
|
<description>RTC interrupt enable register</description>
|
|
<addressOffset>0x0</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>OVIE</name>
|
|
<description>Overflow interrupt enable</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ALRMIE</name>
|
|
<description>Alarm interrupt enable</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>SCIE</name>
|
|
<description>Second interrupt</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CTL</name>
|
|
<displayName>CTL</displayName>
|
|
<description>control register</description>
|
|
<addressOffset>0x04</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000020</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LWOFF</name>
|
|
<description>Last write operation finished flag</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CMF</name>
|
|
<description>Configuration mode flag</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>RSYNF</name>
|
|
<description>Registers synchronized flag</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>OVIF</name>
|
|
<description>Overflow interrupt flag</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ALRMIF</name>
|
|
<description>Alarm interrupt flag</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>SCIF</name>
|
|
<description>Sencond interrupt flag</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PSCH</name>
|
|
<displayName>PSCH</displayName>
|
|
<description>RTC prescaler high register</description>
|
|
<addressOffset>0x08</addressOffset>
|
|
<size>0x20</size>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>PSC</name>
|
|
<description>RTC prescaler value high</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PSCL</name>
|
|
<displayName>PSCL</displayName>
|
|
<description> RTC prescaler low
|
|
register</description>
|
|
<addressOffset>0x0C</addressOffset>
|
|
<size>0x20</size>
|
|
<resetValue>0x00008000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>PSC</name>
|
|
<description>RTC prescaler value low</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DIVH</name>
|
|
<displayName>DIVH</displayName>
|
|
<description>RTC divider high register</description>
|
|
<addressOffset>0x10</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DIV</name>
|
|
<description>RTC divider value high</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DIVL</name>
|
|
<displayName>DIVL</displayName>
|
|
<description>RTC divider low register</description>
|
|
<addressOffset>0x14</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00008000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DIV</name>
|
|
<description>RTC divider value low</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CNTH</name>
|
|
<displayName>CNTH</displayName>
|
|
<description>RTC counter high register</description>
|
|
<addressOffset>0x18</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CNT</name>
|
|
<description>RTC counter value high</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CNTL</name>
|
|
<displayName>CNTL</displayName>
|
|
<description>RTC counter low register</description>
|
|
<addressOffset>0x1C</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CNT</name>
|
|
<description>RTC counter value low</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>ALRMH</name>
|
|
<displayName>ALRMH</displayName>
|
|
<description>Alarm high register</description>
|
|
<addressOffset>0x20</addressOffset>
|
|
<size>0x20</size>
|
|
<access>write</access>
|
|
<resetValue>0x0000FFFF</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>ALRM</name>
|
|
<description>Alarm value high</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>ALRML</name>
|
|
<displayName>ALRML</displayName>
|
|
<description>RTC alarm low register</description>
|
|
<addressOffset>0x24</addressOffset>
|
|
<size>0x20</size>
|
|
<access>write</access>
|
|
<resetValue>0x0000FFFF</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>ALRM</name>
|
|
<description>alarm value low</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral>
|
|
|
|
<peripheral>
|
|
<name>SPI0</name>
|
|
<description>Serial peripheral interface</description>
|
|
<groupName>SPI</groupName>
|
|
<baseAddress>0x40013000</baseAddress>
|
|
<addressBlock>
|
|
<offset>0x0</offset>
|
|
<size>0x400</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<interrupt>
|
|
<name>SPI0</name>
|
|
<value>54</value>
|
|
</interrupt>
|
|
<registers>
|
|
<register>
|
|
<name>CTL0</name>
|
|
<displayName>CTL0</displayName>
|
|
<description>control register 0</description>
|
|
<addressOffset>0x0</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>BDEN</name>
|
|
<description>Bidirectional
|
|
enable</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>BDOEN</name>
|
|
<description>Bidirectional Transmit output enable
|
|
</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CRCEN</name>
|
|
<description>CRC Calculation Enable</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CRCNT</name>
|
|
<description>CRC Next Transfer</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FF16</name>
|
|
<description>Data frame format</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>RO</name>
|
|
<description>Receive only</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>SWNSSEN</name>
|
|
<description>NSS Software Mode Selection</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>SWNSS</name>
|
|
<description>NSS Pin Selection In NSS Software Mode</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>LF</name>
|
|
<description>LSB First Mode</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>SPIEN</name>
|
|
<description>SPI enable</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PSC</name>
|
|
<description>Master Clock Prescaler Selection</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>MSTMOD</name>
|
|
<description>Master Mode Enable</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CKPL</name>
|
|
<description>Clock polarity Selection</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CKPH</name>
|
|
<description>Clock Phase Selection</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CTL1</name>
|
|
<displayName>CTL1</displayName>
|
|
<description>control register 1</description>
|
|
<addressOffset>0x04</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TBEIE</name>
|
|
<description>Tx buffer empty interrupt
|
|
enable</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>RBNEIE</name>
|
|
<description>RX buffer not empty interrupt
|
|
enable</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ERRIE</name>
|
|
<description>Error interrupt enable</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TMOD</name>
|
|
<description>SPI TI mode enable</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>NSSP</name>
|
|
<description>SPI NSS pulse mode enable</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>NSSDRV</name>
|
|
<description>Drive NSS Output</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DMATEN</name>
|
|
<description>Transmit Buffer DMA Enable</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DMAREN</name>
|
|
<description>Rx buffer DMA enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>STAT</name>
|
|
<displayName>STAT</displayName>
|
|
<description>status register</description>
|
|
<addressOffset>0x08</addressOffset>
|
|
<size>0x10</size>
|
|
<resetValue>0x0002</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FERR</name>
|
|
<description>Format error</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TRANS</name>
|
|
<description>Transmitting On-going Bit</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXORERR</name>
|
|
<description>Reception Overrun Error Bit</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CONFERR</name>
|
|
<description>SPI Configuration error</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CRCERR</name>
|
|
<description>SPI CRC Error Bit</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>TXURERR</name>
|
|
<description>Transmission underrun error bit</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>I2SCH</name>
|
|
<description>I2S channel side</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TBE</name>
|
|
<description>Transmit Buffer Empty</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RBNE</name>
|
|
<description>Receive Buffer Not Empty</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DATA</name>
|
|
<displayName>DATA</displayName>
|
|
<description>data register</description>
|
|
<addressOffset>0x0C</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SPI_DATA</name>
|
|
<description>Data transfer register</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CRCPOLY</name>
|
|
<displayName>CRCPOLY</displayName>
|
|
<description>CRC polynomial register</description>
|
|
<addressOffset>0x10</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0007</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CRCPOLY</name>
|
|
<description>CRC polynomial value</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RCRC</name>
|
|
<displayName>RCRC</displayName>
|
|
<description>RX CRC register</description>
|
|
<addressOffset>0x14</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>RCRC</name>
|
|
<description>RX CRC value</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TCRC</name>
|
|
<displayName>TCRC</displayName>
|
|
<description>TX CRC register</description>
|
|
<addressOffset>0x18</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TCRC</name>
|
|
<description>Tx CRC value</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>I2SCTL</name>
|
|
<displayName>I2SCTL</displayName>
|
|
<description>I2S control register</description>
|
|
<addressOffset>0x1C</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>I2SSEL</name>
|
|
<description>I2S mode selection</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>I2SEN</name>
|
|
<description>I2S Enable</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>I2SOPMOD</name>
|
|
<description>I2S operation mode</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PCMSMOD</name>
|
|
<description>PCM frame synchronization mode</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>I2SSTD</name>
|
|
<description>I2S standard selection</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CKPL</name>
|
|
<description>Idle state clock polarity</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DTLEN</name>
|
|
<description>Data length</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CHLEN</name>
|
|
<description>Channel length (number of bits per audio
|
|
channel)</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>I2SPSC</name>
|
|
<displayName>I2SPSC</displayName>
|
|
<description>I2S prescaler register</description>
|
|
<addressOffset>0x20</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0002</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>MCKOEN</name>
|
|
<description>I2S_MCK output enable</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>OF</name>
|
|
<description>Odd factor for the
|
|
prescaler</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DIV</name>
|
|
<description>Dividing factor for the prescaler</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral>
|
|
<peripheral derivedFrom="SPI0">
|
|
<name>SPI1</name>
|
|
<baseAddress>0x40003800</baseAddress>
|
|
<interrupt>
|
|
<name>SPI1</name>
|
|
<value>55</value>
|
|
</interrupt>
|
|
</peripheral>
|
|
<peripheral derivedFrom="SPI0">
|
|
<name>SPI2</name>
|
|
<baseAddress>0x40003C00</baseAddress>
|
|
<interrupt>
|
|
<name>SPI2</name>
|
|
<value>70</value>
|
|
</interrupt>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>TIMER0</name>
|
|
<description>Advanced-timers</description>
|
|
<groupName>TIMER</groupName>
|
|
<baseAddress>0x40012c00</baseAddress>
|
|
<addressBlock>
|
|
<offset>0x0</offset>
|
|
<size>0x400</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<interrupt>
|
|
<name>TIMER0_BRK</name>
|
|
<value>43</value>
|
|
</interrupt>
|
|
<interrupt>
|
|
<name>TIMER0_UP</name>
|
|
<value>44</value>
|
|
</interrupt>
|
|
<interrupt>
|
|
<name>TIMER0_TRG_CMT</name>
|
|
<value>45</value>
|
|
</interrupt>
|
|
<interrupt>
|
|
<name>TIMER0_Channel</name>
|
|
<value>46</value>
|
|
</interrupt>
|
|
<registers>
|
|
<register>
|
|
<name>CTL0</name>
|
|
<displayName>CTL0</displayName>
|
|
<description>control register 0</description>
|
|
<addressOffset>0x0</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CKDIV</name>
|
|
<description>Clock division</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ARSE</name>
|
|
<description>Auto-reload shadow enable</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CAM</name>
|
|
<description>Counter aligns mode
|
|
selection</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DIR</name>
|
|
<description>Direction</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>SPM</name>
|
|
<description>Single pulse mode</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>UPS</name>
|
|
<description>Update source</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>UPDIS</name>
|
|
<description>Update disable</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CEN</name>
|
|
<description>Counter enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CTL1</name>
|
|
<displayName>CTL1</displayName>
|
|
<description>control register 1</description>
|
|
<addressOffset>0x04</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>ISO3</name>
|
|
<description>Idle state of channel 3 output</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ISO2N</name>
|
|
<description>Idle state of channel 2 complementary output</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ISO2</name>
|
|
<description>Idle state of channel 2 output</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ISO1N</name>
|
|
<description>Idle state of channel 1 complementary output</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ISO1</name>
|
|
<description>Idle state of channel 1 output</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ISO0N</name>
|
|
<description>Idle state of channel 0 complementary output</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ISO0</name>
|
|
<description>Idle state of channel 0 output</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TI0S</name>
|
|
<description>Channel 0 trigger input selection</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>MMC</name>
|
|
<description>Master mode control</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DMAS</name>
|
|
<description>DMA request source selection</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CCUC</name>
|
|
<description>Commutation control shadow register update control</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CCSE</name>
|
|
<description>Commutation control shadow enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SMCFG</name>
|
|
<displayName>SMCFG</displayName>
|
|
<description>slave mode configuration register</description>
|
|
<addressOffset>0x08</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>ETP</name>
|
|
<description>External trigger polarity</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>SMC1</name>
|
|
<description>Part of SMC for enable External clock mode1</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ETPSC</name>
|
|
<description>External trigger prescaler</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ETFC</name>
|
|
<description>External trigger filter control</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>MSM</name>
|
|
<description>Master/Slave mode</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TRGS</name>
|
|
<description>Trigger selection</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>SMC</name>
|
|
<description>Slave mode selection</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DMAINTEN</name>
|
|
<displayName>DMAINTEN</displayName>
|
|
<description>DMA/Interrupt enable register</description>
|
|
<addressOffset>0x0C</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TRGDEN</name>
|
|
<description>Trigger DMA request enable</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CMTDEN</name>
|
|
<description>Commutation DMA request enable</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH3DEN</name>
|
|
<description>Channel 3 capture/compare DMA request enable</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH2DEN</name>
|
|
<description>Channel 2 capture/compare DMA request enable</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH1DEN</name>
|
|
<description>Channel 1 capture/compare DMA request enable</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH0DEN</name>
|
|
<description>Channel 0 capture/compare DMA request enable</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>UPDEN</name>
|
|
<description>Update DMA request enable</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>BRKIE</name>
|
|
<description>Break interrupt enable</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TRGIE</name>
|
|
<description>Trigger interrupt enable</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CMTIE</name>
|
|
<description>commutation interrupt enable</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH3IE</name>
|
|
<description>Channel 3 capture/compare interrupt enable</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH2IE</name>
|
|
<description>Channel 2 capture/compare interrupt enable</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH1IE</name>
|
|
<description>Channel 1 capture/compare interrupt enable</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH0IE</name>
|
|
<description>Channel 0 capture/compare interrupt enable</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>UPIE</name>
|
|
<description>Update interrupt enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>INTF</name>
|
|
<displayName>INTF</displayName>
|
|
<description>Interrupt flag register</description>
|
|
<addressOffset>0x10</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CH3OF</name>
|
|
<description>Channel 3 over capture flag</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH2OF</name>
|
|
<description>Channel 2 over capture flag</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH1OF</name>
|
|
<description>Channel 1 over capture flag</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH0OF</name>
|
|
<description>Channel 0 over capture flag</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>BRKIF</name>
|
|
<description>Break interrupt flag</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TRGIF</name>
|
|
<description>Trigger interrupt flag</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CMTIF</name>
|
|
<description>Channel commutation interrupt flag</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH3IF</name>
|
|
<description>Channel 3 capture/compare interrupt flag</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH2IF</name>
|
|
<description> Channel 2 capture/compare interrupt flag</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH1IF</name>
|
|
<description>Channel 1 capture/compare interrupt flag</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH0IF</name>
|
|
<description>Channel 0 capture/compare interrupt flag</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>UPIF</name>
|
|
<description>Update interrupt flag</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SWEVG</name>
|
|
<displayName>SWEVG</displayName>
|
|
<description>Software event generation register</description>
|
|
<addressOffset>0x14</addressOffset>
|
|
<size>0x10</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>BRKG</name>
|
|
<description>Break event generation</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TRGG</name>
|
|
<description>Trigger event generation</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CMTG</name>
|
|
<description>Channel commutation event generation</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH3G</name>
|
|
<description>Channel 3 capture or compare event generation</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH2G</name>
|
|
<description>Channel 2 capture or compare event generation</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH1G</name>
|
|
<description>Channel 1 capture or compare event generation</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH0G</name>
|
|
<description>Channel 0 capture or compare event generation</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>UPG</name>
|
|
<description>Update event generation</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CHCTL0_Output</name>
|
|
<displayName>CHCTL0_Output</displayName>
|
|
<description>Channel control register 0 (output
|
|
mode)</description>
|
|
<addressOffset>0x18</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CH1COMCEN</name>
|
|
<description>Channel 1 output compare clear enable</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH1COMCTL</name>
|
|
<description>Channel 1 compare output control</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH1COMSEN</name>
|
|
<description>Channel 1 output compare shadow enable</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH1COMFEN</name>
|
|
<description>Channel 1 output compare fast enable</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH1MS</name>
|
|
<description>Channel 1 mode selection</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH0COMCEN</name>
|
|
<description>Channel 0 output compare clear enable</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH0COMCTL</name>
|
|
<description>Channel 0 compare output control</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH0COMSEN</name>
|
|
<description>Channel 0 compare output shadow enable</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH0COMFEN</name>
|
|
<description>Channel 0 output compare fast enable</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH0MS</name>
|
|
<description>Channel 0 I/O mode selection</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CHCTL0_Input</name>
|
|
<displayName>CHCTL0_Input</displayName>
|
|
<description>Channel control register 0 (input
|
|
mode)</description>
|
|
<alternateRegister>CHCTL0_Output</alternateRegister>
|
|
<addressOffset>0x18</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CH1CAPFLT</name>
|
|
<description>Channel 1 input capture filter control</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH1CAPPSC</name>
|
|
<description>Channel 1 input capture prescaler</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH1MS</name>
|
|
<description>Channel 1 mode selection</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH0CAPFLT</name>
|
|
<description>Channel 0 input capture filter control</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH0CAPPSC</name>
|
|
<description>Channel 0 input capture prescaler</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH0MS</name>
|
|
<description>Channel 0 mode selection</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CHCTL1_Output</name>
|
|
<displayName>CHCTL1_Output</displayName>
|
|
<description>Channel control register 1 (output
|
|
mode)</description>
|
|
<addressOffset>0x1C</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CH3COMCEN</name>
|
|
<description>Channel 3 output compare clear enable</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH3COMCTL</name>
|
|
<description>Channel 3 compare output control</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH3COMSEN</name>
|
|
<description>Channel 3 output compare shadow enable</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH3COMFEN</name>
|
|
<description>Channel 3 output compare fast enable</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH3MS</name>
|
|
<description>Channel 3 mode selection</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH2COMCEN</name>
|
|
<description>Channel 2 output compare clear enable</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH2COMCTL</name>
|
|
<description>Channel 2 compare output control</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH2COMSEN</name>
|
|
<description>Channel 2 compare output shadow enable</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH2COMFEN</name>
|
|
<description>Channel 2 output compare fast enable</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH2MS</name>
|
|
<description>Channel 2 I/O mode selection</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CHCTL1_Input</name>
|
|
<displayName>CHCTL1_Input</displayName>
|
|
<description>Channel control register 1 (input
|
|
mode)</description>
|
|
<alternateRegister>CHCTL1_Output</alternateRegister>
|
|
<addressOffset>0x1C</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CH3CAPFLT</name>
|
|
<description>Channel 3 input capture filter control</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH3CAPPSC</name>
|
|
<description>Channel 3 input capture prescaler</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH3MS</name>
|
|
<description>Channel 3 mode selection</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH2CAPFLT</name>
|
|
<description>Channel 2 input capture filter control</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH2CAPPSC</name>
|
|
<description>Channel 2 input capture prescaler</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH2MS</name>
|
|
<description>Channel 2 mode selection</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CHCTL2</name>
|
|
<displayName>CHCTL2</displayName>
|
|
<description>Channel control register 2</description>
|
|
<addressOffset>0x20</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CH3P</name>
|
|
<description>Channel 3 capture/compare function polarity</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH3EN</name>
|
|
<description>Channel 3 capture/compare function enable</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH2NP</name>
|
|
<description>Channel 2 complementary output polarity</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH2NEN</name>
|
|
<description>Channel 2 complementary output enable</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH2P</name>
|
|
<description>Channel 2 capture/compare function polarity</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH2EN</name>
|
|
<description>Channel 2 capture/compare function enable</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH1NP</name>
|
|
<description>Channel 1 complementary output polarity</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH1NEN</name>
|
|
<description>Channel 1 complementary output enable</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH1P</name>
|
|
<description>Channel 1 capture/compare function polarity</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH1EN</name>
|
|
<description>Channel 1 capture/compare function enable</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH0NP</name>
|
|
<description>Channel 0 complementary output polarity</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH0NEN</name>
|
|
<description>Channel 0 complementary output enable</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH0P</name>
|
|
<description>Channel 0 capture/compare function polarity</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH0EN</name>
|
|
<description>Channel 0 capture/compare function enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CNT</name>
|
|
<displayName>CNT</displayName>
|
|
<description>counter</description>
|
|
<addressOffset>0x24</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CNT</name>
|
|
<description>current counter value</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PSC</name>
|
|
<displayName>PSC</displayName>
|
|
<description>prescaler</description>
|
|
<addressOffset>0x28</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>PSC</name>
|
|
<description>Prescaler value of the counter clock</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CAR</name>
|
|
<displayName>CAR</displayName>
|
|
<description>Counter auto reload register</description>
|
|
<addressOffset>0x2C</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CARL</name>
|
|
<description>Counter auto reload value</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CREP</name>
|
|
<displayName>CREP</displayName>
|
|
<description>Counter repetition register</description>
|
|
<addressOffset>0x30</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CREP</name>
|
|
<description>Counter repetition value</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CH0CV</name>
|
|
<displayName>CH0CV</displayName>
|
|
<description>Channel 0 capture/compare value register</description>
|
|
<addressOffset>0x34</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CH0VAL</name>
|
|
<description>Capture or compare value of channel0</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CH1CV</name>
|
|
<displayName>CH1CV</displayName>
|
|
<description>Channel 1 capture/compare value register</description>
|
|
<addressOffset>0x38</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CH1VAL</name>
|
|
<description>Capture or compare value of channel1</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CH2CV</name>
|
|
<displayName>CH2CV</displayName>
|
|
<description>Channel 2 capture/compare value register</description>
|
|
<addressOffset>0x3C</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CH2VAL</name>
|
|
<description>Capture or compare value of channel 2</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CH3CV</name>
|
|
<displayName>CH3CV</displayName>
|
|
<description>Channel 3 capture/compare value register</description>
|
|
<addressOffset>0x40</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CH3VAL</name>
|
|
<description>Capture or compare value of channel 3</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CCHP</name>
|
|
<displayName>CCHP</displayName>
|
|
<description>channel complementary protection register</description>
|
|
<addressOffset>0x44</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>POEN</name>
|
|
<description>Primary output enable</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>OAEN</name>
|
|
<description>Output automatic enable</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>BRKP</name>
|
|
<description>Break polarity</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>BRKEN</name>
|
|
<description>Break enable</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ROS</name>
|
|
<description>Run mode off-state configure</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>IOS</name>
|
|
<description>Idle mode off-state configure</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PROT</name>
|
|
<description>Complementary register protect control</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DTCFG</name>
|
|
<description>Dead time configure</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DMACFG</name>
|
|
<displayName>DMACFG</displayName>
|
|
<description>DMA configuration register</description>
|
|
<addressOffset>0x48</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DMATC</name>
|
|
<description>DMA transfer count</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>5</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DMATA</name>
|
|
<description>DMA transfer access start address</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>5</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DMATB</name>
|
|
<displayName>DMATB</displayName>
|
|
<description>DMA transfer buffer register</description>
|
|
<addressOffset>0x4C</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DMATB</name>
|
|
<description>DMA transfer buffer</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>TIMER1</name>
|
|
<description>General-purpose-timers</description>
|
|
<groupName>TIMER</groupName>
|
|
<baseAddress>0x40000000</baseAddress>
|
|
<addressBlock>
|
|
<offset>0x0</offset>
|
|
<size>0x400</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<interrupt>
|
|
<name>TIMER1</name>
|
|
<value>47</value>
|
|
</interrupt>
|
|
<registers>
|
|
<register>
|
|
<name>CTL0</name>
|
|
<displayName>CTL0</displayName>
|
|
<description>control register 0</description>
|
|
<addressOffset>0x0</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CKDIV</name>
|
|
<description>Clock division</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ARSE</name>
|
|
<description>Auto-reload shadow enable</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CAM</name>
|
|
<description>Counter aligns mode selection</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DIR</name>
|
|
<description>Direction</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>SPM</name>
|
|
<description>Single pulse mode</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>UPS</name>
|
|
<description>Update source</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>UPDIS</name>
|
|
<description>Update disable</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CEN</name>
|
|
<description>Counter enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CTL1</name>
|
|
<displayName>CTL1</displayName>
|
|
<description>control register 1</description>
|
|
<addressOffset>0x04</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TI0S</name>
|
|
<description>Channel 0 trigger input selection</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>MMC</name>
|
|
<description>Master mode control</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DMAS</name>
|
|
<description>DMA request source selection</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SMCFG</name>
|
|
<displayName>SMCFG</displayName>
|
|
<description>slave mode control register</description>
|
|
<addressOffset>0x08</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>ETP</name>
|
|
<description>External trigger polarity</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>SMC1</name>
|
|
<description>Part of SMC for enable External clock mode1</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ETPSC</name>
|
|
<description>External trigger prescaler</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ETFC</name>
|
|
<description>External trigger filter control</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>MSM</name>
|
|
<description>Master-slave mode</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TRGS</name>
|
|
<description>Trigger selection</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>SMC</name>
|
|
<description>Slave mode control</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DMAINTEN</name>
|
|
<displayName>DMAINTEN</displayName>
|
|
<description>DMA/Interrupt enable register</description>
|
|
<addressOffset>0x0C</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TRGDEN</name>
|
|
<description>Trigger DMA request enable</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH3DEN</name>
|
|
<description>Channel 3 capture/compare DMA request enable</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH2DEN</name>
|
|
<description>Channel 2 capture/compare DMA request enable</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH1DEN</name>
|
|
<description>Channel 1 capture/compare DMA request enable</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH0DEN</name>
|
|
<description>Channel 0 capture/compare DMA request enable</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>UPDEN</name>
|
|
<description>Update DMA request enable</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TRGIE</name>
|
|
<description>Trigger interrupt enable</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH3IE</name>
|
|
<description>Channel 3 capture/compare interrupt enable</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH2IE</name>
|
|
<description>Channel 2 capture/compare interrupt enable</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH1IE</name>
|
|
<description>Channel 1 capture/compare interrupt enable</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH0IE</name>
|
|
<description>Channel 0 capture/compare interrupt enable</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>UPIE</name>
|
|
<description>Update interrupt enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>INTF</name>
|
|
<displayName>INTF</displayName>
|
|
<description>interrupt flag register</description>
|
|
<addressOffset>0x10</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CH3OF</name>
|
|
<description>Channel 3 over capture flag</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH2OF</name>
|
|
<description>Channel 2 over capture flag</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH1OF</name>
|
|
<description>Channel 1 over capture flag</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH0OF</name>
|
|
<description>Channel 0 over capture flag</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TRGIF</name>
|
|
<description>Trigger interrupt flag</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH3IF</name>
|
|
<description>Channel 3 capture/compare interrupt enable</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH2IF</name>
|
|
<description>Channel 2 capture/compare interrupt enable</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH1IF</name>
|
|
<description>Channel 1 capture/compare interrupt flag</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH0IF</name>
|
|
<description>Channel 0 capture/compare interrupt flag</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>UPIF</name>
|
|
<description>Update interrupt flag</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SWEVG</name>
|
|
<displayName>SWEVG</displayName>
|
|
<description>event generation register</description>
|
|
<addressOffset>0x14</addressOffset>
|
|
<size>0x10</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TRGG</name>
|
|
<description>Trigger event generation</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH3G</name>
|
|
<description>Channel 3 capture or compare event generation</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH2G</name>
|
|
<description>Channel 2 capture or compare event generation</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH1G</name>
|
|
<description>Channel 1 capture or compare event generation</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH0G</name>
|
|
<description>Channel 0 capture or compare event generation</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>UPG</name>
|
|
<description>Update generation</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CHCTL0_Output</name>
|
|
<displayName>CHCTL0_Output</displayName>
|
|
<description>Channel control register 0 (output
|
|
mode)</description>
|
|
<addressOffset>0x18</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CH1COMCEN</name>
|
|
<description>Channel 1 output compare clear enable</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH1COMCTL</name>
|
|
<description>Channel 1 compare output control</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH1COMSEN</name>
|
|
<description>Channel 1 output compare shadow enable</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH1COMFEN</name>
|
|
<description>Channel 1 output compare fast enable</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH1MS</name>
|
|
<description>Channel 1 mode selection</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH0COMCEN</name>
|
|
<description>Channel 0 output compare clear enable</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH0COMCTL</name>
|
|
<description> Channel 0 compare output control</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH0COMSEN</name>
|
|
<description>Channel 0 compare output shadow enable</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH0COMFEN</name>
|
|
<description>Channel 0 output compare fast enable</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH0MS</name>
|
|
<description>Channel 0 I/O mode selection</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CHCTL0_Input</name>
|
|
<displayName>CHCTL0_Input</displayName>
|
|
<description>Channel control register 0 (input
|
|
mode)</description>
|
|
<alternateRegister>CHCTL0_Output</alternateRegister>
|
|
<addressOffset>0x18</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CH1CAPFLT</name>
|
|
<description>Channel 1 input capture filter control</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH1CAPPSC</name>
|
|
<description>Channel 1 input capture prescaler</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH1MS</name>
|
|
<description>Channel 1 mode selection</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH0CAPFLT</name>
|
|
<description>Channel 0 input capture filter control</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH0CAPPSC</name>
|
|
<description>Channel 0 input capture prescaler</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH0MS</name>
|
|
<description>Channel 0 mode selection</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CHCTL1_Output</name>
|
|
<displayName>CHCTL1_Output</displayName>
|
|
<description>Channel control register 1 (output mode)</description>
|
|
<addressOffset>0x1C</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CH3COMCEN</name>
|
|
<description>Channel 3 output compare clear enable</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH3COMCTL</name>
|
|
<description>Channel 3 compare output control</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH3COMSEN</name>
|
|
<description>Channel 3 output compare shadow enable</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH3COMFEN</name>
|
|
<description>Channel 3 output compare fast enable</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH3MS</name>
|
|
<description>Channel 3 mode selection</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH2COMCEN</name>
|
|
<description>Channel 2 output compare clear enable</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH2COMCTL</name>
|
|
<description>Channel 2 compare output control</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH2COMSEN</name>
|
|
<description>Channel 2 compare output shadow enable</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH2COMFEN</name>
|
|
<description>Channel 2 output compare fast enable</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH2MS</name>
|
|
<description>Channel 2 I/O mode selection</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CHCTL1_Input</name>
|
|
<displayName>CHCTL1_Input</displayName>
|
|
<description>Channel control register 1 (input
|
|
mode)</description>
|
|
<alternateRegister>CHCTL1_Output</alternateRegister>
|
|
<addressOffset>0x1C</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CH3CAPFLT</name>
|
|
<description>Channel 3 input capture filter control</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH3CAPPSC</name>
|
|
<description>Channel 3 input capture prescaler</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH3MS</name>
|
|
<description>Channel 3 mode selection</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH2CAPFLT</name>
|
|
<description>Channel 2 input capture filter control</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH2CAPPSC</name>
|
|
<description>Channel 2 input capture prescaler</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH2MS</name>
|
|
<description>Channel 2 mode selection</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CHCTL2</name>
|
|
<displayName>CHCTL2</displayName>
|
|
<description>Channel control register 2</description>
|
|
<addressOffset>0x20</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CH3P</name>
|
|
<description>Channel 3 capture/compare function polarity</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH3EN</name>
|
|
<description>Channel 3 capture/compare function enable</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH2P</name>
|
|
<description>Channel 2 capture/compare function polarity</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH2EN</name>
|
|
<description>Channel 2 capture/compare function enable</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH1P</name>
|
|
<description>Channel 1 capture/compare function polarity</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH1EN</name>
|
|
<description>Channel 1 capture/compare function enable</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH0P</name>
|
|
<description>Channel 0 capture/compare function polarity</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH0EN</name>
|
|
<description>Channel 0 capture/compare function enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CNT</name>
|
|
<displayName>CNT</displayName>
|
|
<description>Counter register</description>
|
|
<addressOffset>0x24</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CNT</name>
|
|
<description>counter value</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PSC</name>
|
|
<displayName>PSC</displayName>
|
|
<description>Prescaler register</description>
|
|
<addressOffset>0x28</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>PSC</name>
|
|
<description>Prescaler value of the counter clock</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CAR</name>
|
|
<displayName>CAR</displayName>
|
|
<description>Counter auto reload register</description>
|
|
<addressOffset>0x2C</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CARL</name>
|
|
<description>Counter auto reload value</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CH0CV</name>
|
|
<displayName>CH0CV</displayName>
|
|
<description>Channel 0 capture/compare value register</description>
|
|
<addressOffset>0x34</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CH0VAL</name>
|
|
<description>Capture or compare value of channel 0</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CH1CV</name>
|
|
<displayName>CH1CV</displayName>
|
|
<description>Channel 1 capture/compare value register</description>
|
|
<addressOffset>0x38</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CH1VAL</name>
|
|
<description>Capture or compare value of channel1</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CH2CV</name>
|
|
<displayName>CH2CV</displayName>
|
|
<description>Channel 2 capture/compare value register</description>
|
|
<addressOffset>0x3C</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CH2VAL</name>
|
|
<description>Capture or compare value of channel 2</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CH3CV</name>
|
|
<displayName>CH3CV</displayName>
|
|
<description>Channel 3 capture/compare value register</description>
|
|
<addressOffset>0x40</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CH3VAL</name>
|
|
<description>Capture or compare value of channel 3</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DMACFG</name>
|
|
<displayName>DMACFG</displayName>
|
|
<description>DMA configuration register</description>
|
|
<addressOffset>0x48</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DMATC</name>
|
|
<description>DMA transfer count</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>5</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DMATA</name>
|
|
<description>DMA transfer access start address</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>5</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DMATB</name>
|
|
<displayName>DMATB</displayName>
|
|
<description>DMA transfer buffer register</description>
|
|
<addressOffset>0x4C</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DMATB</name>
|
|
<description>DMA transfer buffer</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral>
|
|
<peripheral derivedFrom="TIMER1">
|
|
<name>TIMER2</name>
|
|
<groupName>TIMER</groupName>
|
|
<baseAddress>0x40000400</baseAddress>
|
|
<interrupt>
|
|
<name>TIMER2</name>
|
|
<value>48</value>
|
|
</interrupt>
|
|
</peripheral>
|
|
<peripheral derivedFrom="TIMER1">
|
|
<name>TIMER3</name>
|
|
<groupName>TIMER</groupName>
|
|
<baseAddress>0x40000800</baseAddress>
|
|
<interrupt>
|
|
<name>TIMER3</name>
|
|
<value>49</value>
|
|
</interrupt>
|
|
</peripheral>
|
|
<peripheral derivedFrom="TIMER1">
|
|
<name>TIMER4</name>
|
|
<groupName>TIMER</groupName>
|
|
<baseAddress>0x40000C00</baseAddress>
|
|
<interrupt>
|
|
<name>TIMER4</name>
|
|
<value>69</value>
|
|
</interrupt>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>TIMER5</name>
|
|
<description>Basic-timers</description>
|
|
<groupName>TIMER</groupName>
|
|
<baseAddress>0x40001000</baseAddress>
|
|
<addressBlock>
|
|
<offset>0x0</offset>
|
|
<size>0x400</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<interrupt>
|
|
<name>TIMER5</name>
|
|
<value>73</value>
|
|
</interrupt>
|
|
<registers>
|
|
<register>
|
|
<name>CTL0</name>
|
|
<displayName>CTL0</displayName>
|
|
<description>control register 0</description>
|
|
<addressOffset>0x0</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>ARSE</name>
|
|
<description>Auto-reload shadow enable</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>SPM</name>
|
|
<description>Single pulse mode</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>UPS</name>
|
|
<description>Update source</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>UPDIS</name>
|
|
<description>Update disable</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CEN</name>
|
|
<description>Counter enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CTL1</name>
|
|
<displayName>CTL1</displayName>
|
|
<description>control register 1</description>
|
|
<addressOffset>0x04</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>MMC</name>
|
|
<description>Master mode control</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DMAINTEN</name>
|
|
<displayName>DMAINTEN</displayName>
|
|
<description>DMA/Interrupt enable register</description>
|
|
<addressOffset>0x0C</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>UPDEN</name>
|
|
<description>Update DMA request enable</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>UPIE</name>
|
|
<description>Update interrupt enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>INTF</name>
|
|
<displayName>INTF</displayName>
|
|
<description>Interrupt flag register</description>
|
|
<addressOffset>0x10</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>UPIF</name>
|
|
<description>Update interrupt flag</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SWEVG</name>
|
|
<displayName>SWEVG</displayName>
|
|
<description>event generation register</description>
|
|
<addressOffset>0x14</addressOffset>
|
|
<size>0x10</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>UPG</name>
|
|
<description>Update generation</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CNT</name>
|
|
<displayName>CNT</displayName>
|
|
<description>Counter register</description>
|
|
<addressOffset>0x24</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CNT</name>
|
|
<description>Low counter value</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PSC</name>
|
|
<displayName>PSC</displayName>
|
|
<description>Prescaler register</description>
|
|
<addressOffset>0x28</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>PSC</name>
|
|
<description>Prescaler value of the counter clock</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CAR</name>
|
|
<displayName>CAR</displayName>
|
|
<description>Counter auto reload register</description>
|
|
<addressOffset>0x2C</addressOffset>
|
|
<size>0x10</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CARL</name>
|
|
<description>Counter auto reload value</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral>
|
|
<peripheral derivedFrom="TIMER5">
|
|
<name>TIMER6</name>
|
|
<groupName>TIMER</groupName>
|
|
<baseAddress>0x40001400</baseAddress>
|
|
<interrupt>
|
|
<name>TIMER6</name>
|
|
<value>74</value>
|
|
</interrupt>
|
|
</peripheral>
|
|
|
|
<peripheral>
|
|
<name>USART0</name>
|
|
<description>Universal synchronous asynchronous receiver
|
|
transmitter</description>
|
|
<groupName>USART</groupName>
|
|
<baseAddress>0x40013800</baseAddress>
|
|
<addressBlock>
|
|
<offset>0x0</offset>
|
|
<size>0x400</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<interrupt>
|
|
<name>USART0</name>
|
|
<value>56</value>
|
|
</interrupt>
|
|
<registers>
|
|
<register>
|
|
<name>STAT</name>
|
|
<displayName>STAT</displayName>
|
|
<description>Status register </description>
|
|
<addressOffset>0x00</addressOffset>
|
|
<size>0x20</size>
|
|
<resetValue>0x000000C0</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CTSF</name>
|
|
<description>CTS change flag</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>LBDF</name>
|
|
<description>LIN break detection flag</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>TBE</name>
|
|
<description>Transmit data buffer empty</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TC</name>
|
|
<description>Transmission complete</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>RBNE</name>
|
|
<description>Read data buffer not empty</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>IDLEF</name>
|
|
<description>IDLE frame detected flag</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>ORERR</name>
|
|
<description>Overrun error</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>NERR</name>
|
|
<description>Noise error flag</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>FERR</name>
|
|
<description>Frame error flag</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>PERR</name>
|
|
<description>Parity error flag</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DATA</name>
|
|
<displayName>DATA</displayName>
|
|
<description>Data register</description>
|
|
<addressOffset>0x04</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DATA</name>
|
|
<description>Transmit or read data value</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>9</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>BAUD</name>
|
|
<displayName>BAUD</displayName>
|
|
<description>Baud rate register</description>
|
|
<addressOffset>0x08</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>INTDIV</name>
|
|
<description>Integer part of baud-rate divider</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>12</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FRADIV</name>
|
|
<description>Fraction part of baud-rate divider</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CTL0</name>
|
|
<displayName>CTL0</displayName>
|
|
<description>Control register 0</description>
|
|
<addressOffset>0x0C</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>UEN</name>
|
|
<description>USART enable</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>WL</name>
|
|
<description>Word length</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>WM</name>
|
|
<description>Wakeup method in mute mode</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PCEN</name>
|
|
<description>Parity check function enable</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PM</name>
|
|
<description>Parity mode</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PERRIE</name>
|
|
<description>Parity error interrupt enable</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TBEIE</name>
|
|
<description>Transmitter buffer empty interrupt enable</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TCIE</name>
|
|
<description>Transmission complete interrupt enable</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>RBNEIE</name>
|
|
<description>Read data buffer not empty interrupt and overrun error interrupt enable</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>IDLEIE</name>
|
|
<description>IDLE line detected interrupt enable</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TEN</name>
|
|
<description>Transmitter enable</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>REN</name>
|
|
<description>Receiver enable</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>RWU</name>
|
|
<description>Receiver wakeup from mute mode</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>SBKCMD</name>
|
|
<description>Send break command</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CTL1</name>
|
|
<displayName>CTL1</displayName>
|
|
<description>Control register 1</description>
|
|
<addressOffset>0x10</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LMEN</name>
|
|
<description>LIN mode enable</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>STB</name>
|
|
<description>STOP bits length</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CKEN</name>
|
|
<description>CK pin enable</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CPL</name>
|
|
<description>Clock polarity</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CPH</name>
|
|
<description>Clock phase</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CLEN</name>
|
|
<description>CK Length</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>LBDIE</name>
|
|
<description>LIN break detection interrupt
|
|
enable</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>LBLEN</name>
|
|
<description>LIN break frame length</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ADDR</name>
|
|
<description>Address of the USART</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CTL2</name>
|
|
<displayName>CTL2</displayName>
|
|
<description>Control register 2</description>
|
|
<addressOffset>0x14</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CTSIE</name>
|
|
<description>CTS interrupt enable</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CTSEN</name>
|
|
<description>CTS enable</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>RTSEN</name>
|
|
<description>RTS enable</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DENT</name>
|
|
<description>DMA request enable for transmission</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DENR</name>
|
|
<description>DMA request enable for reception</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>SCEN</name>
|
|
<description>Smartcard mode enable</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>NKEN</name>
|
|
<description>Smartcard NACK enable</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>HDEN</name>
|
|
<description>Half-duplex selection</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>IRLP</name>
|
|
<description>IrDA low-power</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>IREN</name>
|
|
<description>IrDA mode enable</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ERRIE</name>
|
|
<description>Error interrupt enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>GP</name>
|
|
<displayName>GP</displayName>
|
|
<description>Guard time and prescaler
|
|
register</description>
|
|
<addressOffset>0x18</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>GUAT</name>
|
|
<description>Guard time value in Smartcard mode</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PSC</name>
|
|
<description>Prescaler value</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral>
|
|
<peripheral derivedFrom="USART0">
|
|
<name>USART1</name>
|
|
<baseAddress>0x40004400</baseAddress>
|
|
<interrupt>
|
|
<name>USART1</name>
|
|
<value>57</value>
|
|
</interrupt>
|
|
</peripheral>
|
|
<peripheral derivedFrom="USART0">
|
|
<name>USART2</name>
|
|
<baseAddress>0x40004800</baseAddress>
|
|
<interrupt>
|
|
<name>USART2</name>
|
|
<value>58</value>
|
|
</interrupt>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>UART3</name>
|
|
<description>Universal asynchronous receiver
|
|
transmitter</description>
|
|
<groupName>UART</groupName>
|
|
<baseAddress>0x40004C00</baseAddress>
|
|
<addressBlock>
|
|
<offset>0x0</offset>
|
|
<size>0x400</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<interrupt>
|
|
<name>UART3</name>
|
|
<value>71</value>
|
|
</interrupt>
|
|
<registers>
|
|
<register>
|
|
<name>STAT</name>
|
|
<displayName>STAT</displayName>
|
|
<description>Status register </description>
|
|
<addressOffset>0x00</addressOffset>
|
|
<size>0x20</size>
|
|
<resetValue>0x000000C0</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LBDF</name>
|
|
<description>LIN break detection flag</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>TBE</name>
|
|
<description>Transmit data buffer empty</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TC</name>
|
|
<description>Transmission complete</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>RBNE</name>
|
|
<description>Read data buffer not empty</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>IDLEF</name>
|
|
<description>IDLE frame detected flag</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>ORERR</name>
|
|
<description>Overrun error</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>NERR</name>
|
|
<description>Noise error flag</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>FERR</name>
|
|
<description>Frame error flag</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>PERR</name>
|
|
<description>Parity error flag</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DATA</name>
|
|
<displayName>DATA</displayName>
|
|
<description>Data register</description>
|
|
<addressOffset>0x04</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DATA</name>
|
|
<description>Transmit or read data value</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>9</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>BAUD</name>
|
|
<displayName>BAUD</displayName>
|
|
<description>Baud rate register</description>
|
|
<addressOffset>0x08</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>INTDIV</name>
|
|
<description>Integer part of baud-rate divider</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>12</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FRADIV</name>
|
|
<description>Fraction part of baud-rate divider</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CTL0</name>
|
|
<displayName>CTL0</displayName>
|
|
<description>Control register 0</description>
|
|
<addressOffset>0x0C</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>UEN</name>
|
|
<description>USART enable</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>WL</name>
|
|
<description>Word length</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>WM</name>
|
|
<description>Wakeup method in mute mode</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PCEN</name>
|
|
<description>Parity check function enable</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PM</name>
|
|
<description>Parity mode</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PERRIE</name>
|
|
<description>Parity error interrupt enable</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TBEIE</name>
|
|
<description>Transmitter buffer empty interrupt enable</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TCIE</name>
|
|
<description>Transmission complete interrupt enable</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>RBNEIE</name>
|
|
<description>Read data buffer not empty interrupt and overrun error interrupt enable</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>IDLEIE</name>
|
|
<description>IDLE line detected interrupt enable</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TEN</name>
|
|
<description>Transmitter enable</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>REN</name>
|
|
<description>Receiver enable</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>RWU</name>
|
|
<description>Receiver wakeup from mute mode</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>SBKCMD</name>
|
|
<description>Send break command</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CTL1</name>
|
|
<displayName>CTL1</displayName>
|
|
<description>Control register 1</description>
|
|
<addressOffset>0x10</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LMEN</name>
|
|
<description>LIN mode enable</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>STB</name>
|
|
<description>STOP bits length</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>LBDIE</name>
|
|
<description>LIN break detection interrupt
|
|
enable</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>LBLEN</name>
|
|
<description>LIN break frame length</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ADDR</name>
|
|
<description>Address of the USART</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CTL2</name>
|
|
<displayName>CTL2</displayName>
|
|
<description>Control register 2</description>
|
|
<addressOffset>0x14</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DENT</name>
|
|
<description>DMA request enable for transmission</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DENR</name>
|
|
<description>DMA request enable for reception</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>HDEN</name>
|
|
<description>Half-duplex selection</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>IRLP</name>
|
|
<description>IrDA low-power</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>IREN</name>
|
|
<description>IrDA mode enable</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ERRIE</name>
|
|
<description>Error interrupt enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>GP</name>
|
|
<displayName>GP</displayName>
|
|
<description>Guard time and prescaler
|
|
register</description>
|
|
<addressOffset>0x18</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>PSC</name>
|
|
<description>Prescaler value</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral>
|
|
<peripheral derivedFrom="UART3">
|
|
<name>UART4</name>
|
|
<baseAddress>0x40005000</baseAddress>
|
|
<interrupt>
|
|
<name>UART4</name>
|
|
<value>72</value>
|
|
</interrupt>
|
|
</peripheral>
|
|
|
|
<peripheral>
|
|
<name>USBFS_GLOBAL</name>
|
|
<description>USB full speed global registers</description>
|
|
<groupName>USBFS</groupName>
|
|
<baseAddress>0x50000000</baseAddress>
|
|
<addressBlock>
|
|
<offset>0x0</offset>
|
|
<size>0x400</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<interrupt>
|
|
<name>USBFS_WKUP</name>
|
|
<value>61</value>
|
|
</interrupt>
|
|
<interrupt>
|
|
<name>USBFS</name>
|
|
<value>86</value>
|
|
</interrupt>
|
|
<registers>
|
|
<register>
|
|
<name>GOTGCS</name>
|
|
<displayName>GOTGCS</displayName>
|
|
<description>Global OTG control and status register
|
|
(USBFS_GOTGCS)</description>
|
|
<addressOffset>0x0</addressOffset>
|
|
<size>0x20</size>
|
|
<resetValue>0x00000800</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SRPS</name>
|
|
<description>SRP success</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>SRPREQ</name>
|
|
<description>SRP request</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>HNPS</name>
|
|
<description>Host success</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>HNPREQ</name>
|
|
<description>HNP request</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>HHNPEN</name>
|
|
<description>Host HNP enable</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>DHNPEN</name>
|
|
<description>Device HNP enabled</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>IDPS</name>
|
|
<description>ID pin status</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>DI</name>
|
|
<description>Debounce interval</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>ASV</name>
|
|
<description>A-session valid</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>BSV</name>
|
|
<description>B-session valid</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>GOTGINTF</name>
|
|
<displayName>GOTGINTF</displayName>
|
|
<description>Global OTG interrupt flag register
|
|
(USBFS_GOTGINTF)</description>
|
|
<addressOffset>0x04</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SESEND</name>
|
|
<description>Session end </description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>SRPEND</name>
|
|
<description>Session request success status
|
|
change</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>HNPEND</name>
|
|
<description>HNP end</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>HNPDET</name>
|
|
<description>Host negotiation request detected</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ADTO</name>
|
|
<description>A-device timeout</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DF</name>
|
|
<description>Debounce finish</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>GAHBCS</name>
|
|
<displayName>GAHBCS</displayName>
|
|
<description>Global AHB control and status register
|
|
(USBFS_GAHBCS)</description>
|
|
<addressOffset>0x08</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>GINTEN</name>
|
|
<description>Global interrupt enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TXFTH</name>
|
|
<description>Tx FIFO threshold</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PTXFTH</name>
|
|
<description>Periodic Tx FIFO threshold</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>GUSBCS</name>
|
|
<displayName>GUSBCS</displayName>
|
|
<description>Global USB control and status register
|
|
(USBFS_GUSBCSR)</description>
|
|
<addressOffset>0x0C</addressOffset>
|
|
<size>0x20</size>
|
|
<resetValue>0x00000A80</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TOC</name>
|
|
<description>Timeout calibration</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>SRPCEN</name>
|
|
<description>SRP capability enable</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>HNPCEN</name>
|
|
<description>HNP capability enable</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>UTT</name>
|
|
<description>USB turnaround time</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>FHM</name>
|
|
<description>Force host mode</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>FDM</name>
|
|
<description>Force device mode</description>
|
|
<bitOffset>30</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>GRSTCTL</name>
|
|
<displayName>GRSTCTL</displayName>
|
|
<description>Global reset control register (USBFS_GRSTCTL)</description>
|
|
<addressOffset>0x10</addressOffset>
|
|
<size>0x20</size>
|
|
<resetValue>0x80000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CSRST</name>
|
|
<description>Core soft reset</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>HCSRST</name>
|
|
<description>HCLK soft reset</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>HFCRST</name>
|
|
<description>Host frame counter reset</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>RXFF</name>
|
|
<description>RxFIFO flush</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>TXFF</name>
|
|
<description>TxFIFO flush</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>TXFNUM</name>
|
|
<description>TxFIFO number</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>5</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>GINTF</name>
|
|
<displayName>GINTF</displayName>
|
|
<description>Global interrupt flag register (USBFS_GINTF)</description>
|
|
<addressOffset>0x14</addressOffset>
|
|
<size>0x20</size>
|
|
<resetValue>0x04000021</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>COPM</name>
|
|
<description>Current operation mode</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>MFIF</name>
|
|
<description>Mode fault interrupt flag</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>OTGIF</name>
|
|
<description>OTG interrupt flag</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>SOF</name>
|
|
<description>Start of frame</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>RXFNEIF</name>
|
|
<description>RxFIFO non-empty interrupt flag</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>NPTXFEIF</name>
|
|
<description>Non-periodic TxFIFO empty interrupt flag</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>GNPINAK</name>
|
|
<description>Global Non-Periodic IN NAK effective</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>GONAK</name>
|
|
<description>Global OUT NAK effective</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>ESP</name>
|
|
<description>Early suspend</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>SP</name>
|
|
<description>USB suspend</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>RST</name>
|
|
<description>USB reset</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>ENUMF</name>
|
|
<description>Enumeration finished</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>ISOOPDIF</name>
|
|
<description>Isochronous OUT packet dropped
|
|
interrupt</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>EOPFIF</name>
|
|
<description>End of periodic frame
|
|
interrupt flag</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>IEPIF</name>
|
|
<description>IN endpoint interrupt flag</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>OEPIF</name>
|
|
<description>OUT endpoint interrupt flag</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>ISOINCIF</name>
|
|
<description>Isochronous IN transfer Not Complete Interrupt Flag</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>PXNCIF_ISOONCIF</name>
|
|
<description>periodic transfer not complete interrupt flag(Host
|
|
mode)/isochronous OUT transfer not complete interrupt flag(Device
|
|
mode)</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>HPIF</name>
|
|
<description>Host port interrupt flag</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>HCIF</name>
|
|
<description>Host channels interrupt flag</description>
|
|
<bitOffset>25</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>PTXFEIF</name>
|
|
<description>Periodic TxFIFO empty interrupt flag</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>IDPSC</name>
|
|
<description>ID pin status change</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>DISCIF</name>
|
|
<description>Disconnect interrupt flag</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>SESIF</name>
|
|
<description>Session interrupt flag</description>
|
|
<bitOffset>30</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>WKUPIF</name>
|
|
<description>Wakeup interrupt flag</description>
|
|
<bitOffset>31</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>GINTEN</name>
|
|
<displayName>GINTEN</displayName>
|
|
<description>Global interrupt enable register
|
|
(USBFS_GINTEN)</description>
|
|
<addressOffset>0x18</addressOffset>
|
|
<size>0x20</size>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>MFIE</name>
|
|
<description>Mode fault interrupt
|
|
enable</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>OTGIE</name>
|
|
<description>OTG interrupt enable </description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>SOFIE</name>
|
|
<description>Start of frame interrupt enable</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>RXFNEIE</name>
|
|
<description>Receive FIFO non-empty
|
|
interrupt enable</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>NPTXFEIE</name>
|
|
<description>Non-periodic TxFIFO empty
|
|
interrupt enable</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>GNPINAKIE</name>
|
|
<description>Global non-periodic IN NAK effective interrupt enable</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>GONAKIE</name>
|
|
<description>Global OUT NAK effective
|
|
interrupt enable</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>ESPIE</name>
|
|
<description>Early suspend interrupt enable</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>SPIE</name>
|
|
<description>USB suspend interrupt enable</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>RSTIE</name>
|
|
<description>USB reset interrupt enable</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>ENUMFIE</name>
|
|
<description>Enumeration finish interrupt enable</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>ISOOPDIE</name>
|
|
<description>Isochronous OUT packet dropped interrupt enable</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>EOPFIE</name>
|
|
<description>End of periodic frame interrupt enable</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>IEPIE</name>
|
|
<description>IN endpoints interrupt enable</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>OEPIE</name>
|
|
<description>OUT endpoints interrupt enable</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>ISOINCIE</name>
|
|
<description>isochronous IN transfer not complete
|
|
interrupt enable</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>PXNCIE_ISOONCIE</name>
|
|
<description>periodic transfer not compelete Interrupt enable(Host
|
|
mode)/isochronous OUT transfer not complete interrupt enable(Device
|
|
mode)</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>HPIE</name>
|
|
<description>Host port interrupt enable</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>HCIE</name>
|
|
<description>Host channels interrupt enable</description>
|
|
<bitOffset>25</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>PTXFEIE</name>
|
|
<description>Periodic TxFIFO empty interrupt enable</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>IDPSCIE</name>
|
|
<description>ID pin status change interrupt enable</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>DISCIE</name>
|
|
<description>Disconnect interrupt enable</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>SESIE</name>
|
|
<description>Session interrupt enable</description>
|
|
<bitOffset>30</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>WKUPIE</name>
|
|
<description>Wakeup interrupt enable</description>
|
|
<bitOffset>31</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>GRSTATR_Device</name>
|
|
<displayName>GRSTATR_Device</displayName>
|
|
<description>Global Receive status read(Device
|
|
mode)</description>
|
|
<addressOffset>0x1C</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EPNUM</name>
|
|
<description>Endpoint number</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>BCOUNT</name>
|
|
<description>Byte count</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>11</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DPID</name>
|
|
<description>Data PID</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>RPCKST</name>
|
|
<description>Recieve packet status</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>GRSTATR_Host</name>
|
|
<displayName>GRSTATR_Host</displayName>
|
|
<description>Global Receive status read(Host
|
|
mode)</description>
|
|
<alternateRegister>GRSTATR_Device</alternateRegister>
|
|
<addressOffset>0x1C</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CNUM</name>
|
|
<description>Channel number</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>BCOUNT</name>
|
|
<description>Byte count</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>11</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DPID</name>
|
|
<description>Data PID</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>RPCKST</name>
|
|
<description>Reivece packet status</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
|
|
<register>
|
|
<name>GRSTATP_Device</name>
|
|
<displayName>GRSTATP_Device</displayName>
|
|
<description>Global Receive status pop(Device
|
|
mode)</description>
|
|
<addressOffset>0x20</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EPNUM</name>
|
|
<description>Endpoint number</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>BCOUNT</name>
|
|
<description>Byte count</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>11</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DPID</name>
|
|
<description>Data PID</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>RPCKST</name>
|
|
<description>Recieve packet status</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>GRSTATP_Host</name>
|
|
<displayName>GRSTATP_Host</displayName>
|
|
<description>Global Receive status pop(Host
|
|
mode)</description>
|
|
<alternateRegister>GRSTATP_Device</alternateRegister>
|
|
<addressOffset>0x20</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CNUM</name>
|
|
<description>Channel number</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>BCOUNT</name>
|
|
<description>Byte count</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>11</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DPID</name>
|
|
<description>Data PID</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>RPCKST</name>
|
|
<description>Reivece packet status</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>GRFLEN</name>
|
|
<displayName>GRFLEN</displayName>
|
|
<description>Global Receive FIFO size register
|
|
(USBFS_GRFLEN)</description>
|
|
<addressOffset>0x24</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000200</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>RXFD</name>
|
|
<description>Rx FIFO depth</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>HNPTFLEN</name>
|
|
<displayName>HNPTFLEN</displayName>
|
|
<description>Host non-periodic transmit FIFO length register
|
|
(Host mode)</description>
|
|
<addressOffset>0x28</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x02000200</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>HNPTXRSAR</name>
|
|
<description>host non-periodic transmit Tx RAM start
|
|
address</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>HNPTXFD</name>
|
|
<description>host non-periodic TxFIFO depth</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DIEP0TFLEN</name>
|
|
<displayName>DIEP0TFLEN</displayName>
|
|
<description>Device IN endpoint 0 transmit FIFO length
|
|
(Device mode)</description>
|
|
<alternateRegister>HNPTFLEN</alternateRegister>
|
|
<addressOffset>0x28</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x02000200</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IEP0TXFD</name>
|
|
<description>in endpoint 0 Tx FIFO depth</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>IEP0TXRSAR</name>
|
|
<description>in endpoint 0 Tx RAM start address</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>HNPTFQSTAT</name>
|
|
<displayName>HNPTFQSTAT</displayName>
|
|
<description>Host non-periodic transmit FIFO/queue
|
|
status register (HNPTFQSTAT)</description>
|
|
<addressOffset>0x2C</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00080200</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>NPTXFS</name>
|
|
<description>Non-periodic TxFIFO space</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>NPTXRQS</name>
|
|
<description>Non-periodic transmit request queue
|
|
space </description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>NPTXRQTOP</name>
|
|
<description>Top of the non-periodic transmit request
|
|
queue</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>7</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>GCCFG</name>
|
|
<displayName>GCCFG</displayName>
|
|
<description>Global core configuration register (USBFS_GCCFG)</description>
|
|
<addressOffset>0x38</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>PWRON</name>
|
|
<description>Power on</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>VBUSACEN</name>
|
|
<description>The VBUS A-device Comparer enable</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>VBUSBCEN</name>
|
|
<description>The VBUS B-device Comparer enable</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>SOFOEN</name>
|
|
<description>SOF output enable</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>VBUSIG</name>
|
|
<description>VBUS ignored</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CID</name>
|
|
<displayName>CID</displayName>
|
|
<description>core ID register</description>
|
|
<addressOffset>0x3C</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00001000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CID</name>
|
|
<description>Core ID</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>32</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>HPTFLEN</name>
|
|
<displayName>HPTFLEN</displayName>
|
|
<description>Host periodic transmit FIFO length register (HPTFLEN)</description>
|
|
<addressOffset>0x100</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x02000600</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>HPTXFSAR</name>
|
|
<description>Host periodic TxFIFO start
|
|
address</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>HPTXFD</name>
|
|
<description>Host periodic TxFIFO depth</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DIEP1TFLEN</name>
|
|
<displayName>DIEP1TFLEN</displayName>
|
|
<description>device IN endpoint transmit FIFO size
|
|
register (DIEP1TFLEN)</description>
|
|
<addressOffset>0x104</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x02000400</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IEPTXRSAR</name>
|
|
<description>IN endpoint FIFO transmit RAM start
|
|
address</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>IEPTXFD</name>
|
|
<description>IN endpoint TxFIFO depth</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DIEP2TFLEN</name>
|
|
<displayName>DIEP2TFLEN</displayName>
|
|
<description>device IN endpoint transmit FIFO size
|
|
register (DIEP2TFLEN)</description>
|
|
<addressOffset>0x108</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x02000400</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IEPTXRSAR</name>
|
|
<description>IN endpoint FIFO transmit RAM start
|
|
address</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>IEPTXFD</name>
|
|
<description>IN endpoint TxFIFO depth</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DIEP3TFLEN</name>
|
|
<displayName>DIEP3TFLEN</displayName>
|
|
<description>device IN endpoint transmit FIFO size
|
|
register (FS_DIEP3TXFLEN)</description>
|
|
<addressOffset>0x10C</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x02000400</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IEPTXRSAR</name>
|
|
<description>IN endpoint FIFO4 transmit RAM start
|
|
address</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>IEPTXFD</name>
|
|
<description>IN endpoint TxFIFO depth</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral>
|
|
|
|
<peripheral>
|
|
<name>USBFS_HOST</name>
|
|
<description>USB on the go full speed host</description>
|
|
<groupName>USBFS</groupName>
|
|
<baseAddress>0x50000400</baseAddress>
|
|
<addressBlock>
|
|
<offset>0x0</offset>
|
|
<size>0x400</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<registers>
|
|
<register>
|
|
<name>HCTL</name>
|
|
<displayName>HCTL</displayName>
|
|
<description>host configuration register
|
|
(HCTL)</description>
|
|
<addressOffset>0x00</addressOffset>
|
|
<size>0x20</size>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CLKSEL</name>
|
|
<description>clock select for USB clock</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>HFT</name>
|
|
<displayName>HFT</displayName>
|
|
<description>Host frame interval
|
|
register</description>
|
|
<addressOffset>0x04</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000BB80</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FRI</name>
|
|
<description>Frame interval</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>HFINFR</name>
|
|
<displayName>HFINFR</displayName>
|
|
<description>FS host frame number/frame time
|
|
remaining register (HFINFR)</description>
|
|
<addressOffset>0x08</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-only</access>
|
|
<resetValue>0xBB800000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FRNUM</name>
|
|
<description>Frame number</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FRT</name>
|
|
<description>Frame remaining time</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>HPTFQSTAT</name>
|
|
<displayName>HPTFQSTAT</displayName>
|
|
<description>Host periodic transmit FIFO/queue
|
|
status register (HPTFQSTAT)</description>
|
|
<addressOffset>0x10</addressOffset>
|
|
<size>0x20</size>
|
|
<resetValue>0x00080200</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>PTXFS</name>
|
|
<description>Periodic transmit data FIFO space
|
|
available</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>PTXREQS</name>
|
|
<description>Periodic transmit request queue space
|
|
available</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>PTXREQT</name>
|
|
<description>Top of the periodic transmit request
|
|
queue</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>HACHINT</name>
|
|
<displayName>HACHINT</displayName>
|
|
<description> Host all channels interrupt
|
|
register</description>
|
|
<addressOffset>0x14</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>HACHINT</name>
|
|
<description>Host all channel interrupts</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>HACHINTEN</name>
|
|
<displayName>HACHINTEN</displayName>
|
|
<description>host all channels interrupt mask
|
|
register</description>
|
|
<addressOffset>0x18</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CINTEN</name>
|
|
<description>Channel interrupt enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>HPCS</name>
|
|
<displayName>HPCS</displayName>
|
|
<description>Host port control and status register (USBFS_HPCS)</description>
|
|
<addressOffset>0x40</addressOffset>
|
|
<size>0x20</size>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>PCST</name>
|
|
<description>Port connect status</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>PCD</name>
|
|
<description>Port connect detected</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>PE</name>
|
|
<description>Port enable</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>PEDC</name>
|
|
<description>Port enable/disable change</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>PREM</name>
|
|
<description>Port resume</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>PSP</name>
|
|
<description>Port suspend</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>PRST</name>
|
|
<description>Port reset</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>PLST</name>
|
|
<description>Port line status</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>PP</name>
|
|
<description>Port power</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>PS</name>
|
|
<description>Port speed</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>HCH0CTL</name>
|
|
<displayName>HCH0CTL</displayName>
|
|
<description>host channel-0 characteristics
|
|
register (HCH0CTL)</description>
|
|
<addressOffset>0x100</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>MPL</name>
|
|
<description>Maximum packet size</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>11</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>EPNUM</name>
|
|
<description>Endpoint number</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>EPDIR</name>
|
|
<description>Endpoint direction</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>LSD</name>
|
|
<description>Low-speed device</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>EPTYPE</name>
|
|
<description>Endpoint type</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DAR</name>
|
|
<description>Device address</description>
|
|
<bitOffset>22</bitOffset>
|
|
<bitWidth>7</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ODDFRM</name>
|
|
<description>Odd frame</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CDIS</name>
|
|
<description>Channel disable</description>
|
|
<bitOffset>30</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CEN</name>
|
|
<description>Channel enable</description>
|
|
<bitOffset>31</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>HCH1CTL</name>
|
|
<displayName>HCH1CTL</displayName>
|
|
<description> host channel-1 characteristics
|
|
register (HCH1CTL)</description>
|
|
<addressOffset>0x120</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>MPL</name>
|
|
<description>Maximum packet size</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>11</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>EPNUM</name>
|
|
<description>Endpoint number</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>EPDIR</name>
|
|
<description>Endpoint direction</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>LSD</name>
|
|
<description>Low-speed device</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>EPTYPE</name>
|
|
<description>Endpoint type</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DAR</name>
|
|
<description>Device address</description>
|
|
<bitOffset>22</bitOffset>
|
|
<bitWidth>7</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ODDFRM</name>
|
|
<description>Odd frame</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CDIS</name>
|
|
<description>Channel disable</description>
|
|
<bitOffset>30</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CEN</name>
|
|
<description>Channel enable</description>
|
|
<bitOffset>31</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>HCH2CTL</name>
|
|
<displayName>HCH2CTL</displayName>
|
|
<description>host channel-2 characteristics
|
|
register (HCH2CTL)</description>
|
|
<addressOffset>0x140</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>MPL</name>
|
|
<description>Maximum packet size</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>11</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>EPNUM</name>
|
|
<description>Endpoint number</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>EPDIR</name>
|
|
<description>Endpoint direction</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>LSD</name>
|
|
<description>Low-speed device</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>EPTYPE</name>
|
|
<description>Endpoint type</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DAR</name>
|
|
<description>Device address</description>
|
|
<bitOffset>22</bitOffset>
|
|
<bitWidth>7</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ODDFRM</name>
|
|
<description>Odd frame</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CDIS</name>
|
|
<description>Channel disable</description>
|
|
<bitOffset>30</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CEN</name>
|
|
<description>Channel enable</description>
|
|
<bitOffset>31</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>HCH3CTL</name>
|
|
<displayName>HCH3CTL</displayName>
|
|
<description>host channel-3 characteristics
|
|
register (HCH3CTL)</description>
|
|
<addressOffset>0x160</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>MPL</name>
|
|
<description>Maximum packet size</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>11</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>EPNUM</name>
|
|
<description>Endpoint number</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>EPDIR</name>
|
|
<description>Endpoint direction</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>LSD</name>
|
|
<description>Low-speed device</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>EPTYPE</name>
|
|
<description>Endpoint type</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DAR</name>
|
|
<description>Device address</description>
|
|
<bitOffset>22</bitOffset>
|
|
<bitWidth>7</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ODDFRM</name>
|
|
<description>Odd frame</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CDIS</name>
|
|
<description>Channel disable</description>
|
|
<bitOffset>30</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CEN</name>
|
|
<description>Channel enable</description>
|
|
<bitOffset>31</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>HCH4CTL</name>
|
|
<displayName>HCH4CTL</displayName>
|
|
<description> host channel-4 characteristics
|
|
register (HCH4CTL)</description>
|
|
<addressOffset>0x180</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>MPL</name>
|
|
<description>Maximum packet size</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>11</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>EPNUM</name>
|
|
<description>Endpoint number</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>EPDIR</name>
|
|
<description>Endpoint direction</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>LSD</name>
|
|
<description>Low-speed device</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>EPTYPE</name>
|
|
<description>Endpoint type</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DAR</name>
|
|
<description>Device address</description>
|
|
<bitOffset>22</bitOffset>
|
|
<bitWidth>7</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ODDFRM</name>
|
|
<description>Odd frame</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CDIS</name>
|
|
<description>Channel disable</description>
|
|
<bitOffset>30</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CEN</name>
|
|
<description>Channel enable</description>
|
|
<bitOffset>31</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>HCH5CTL</name>
|
|
<displayName>HCH5CTL</displayName>
|
|
<description>host channel-5 characteristics
|
|
register (HCH5CTL)</description>
|
|
<addressOffset>0x1A0</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>MPL</name>
|
|
<description>Maximum packet size</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>11</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>EPNUM</name>
|
|
<description>Endpoint number</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>EPDIR</name>
|
|
<description>Endpoint direction</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>LSD</name>
|
|
<description>Low-speed device</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>EPTYPE</name>
|
|
<description>Endpoint type</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DAR</name>
|
|
<description>Device address</description>
|
|
<bitOffset>22</bitOffset>
|
|
<bitWidth>7</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ODDFRM</name>
|
|
<description>Odd frame</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CDIS</name>
|
|
<description>Channel disable</description>
|
|
<bitOffset>30</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CEN</name>
|
|
<description>Channel enable</description>
|
|
<bitOffset>31</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>HCH6CTL</name>
|
|
<displayName>HCH6CTL</displayName>
|
|
<description>host channel-6 characteristics
|
|
register (HCH6CTL)</description>
|
|
<addressOffset>0x1C0</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>MPL</name>
|
|
<description>Maximum packet size</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>11</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>EPNUM</name>
|
|
<description>Endpoint number</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>EPDIR</name>
|
|
<description>Endpoint direction</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>LSD</name>
|
|
<description>Low-speed device</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>EPTYPE</name>
|
|
<description>Endpoint type</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DAR</name>
|
|
<description>Device address</description>
|
|
<bitOffset>22</bitOffset>
|
|
<bitWidth>7</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ODDFRM</name>
|
|
<description>Odd frame</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CDIS</name>
|
|
<description>Channel disable</description>
|
|
<bitOffset>30</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CEN</name>
|
|
<description>Channel enable</description>
|
|
<bitOffset>31</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>HCH7CTL</name>
|
|
<displayName>HCH7CTL</displayName>
|
|
<description>host channel-7 characteristics
|
|
register (HCH7CTL)</description>
|
|
<addressOffset>0x1E0</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>MPL</name>
|
|
<description>Maximum packet size</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>11</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>EPNUM</name>
|
|
<description>Endpoint number</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>EPDIR</name>
|
|
<description>Endpoint direction</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>LSD</name>
|
|
<description>Low-speed device</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>EPTYPE</name>
|
|
<description>Endpoint type</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DAR</name>
|
|
<description>Device address</description>
|
|
<bitOffset>22</bitOffset>
|
|
<bitWidth>7</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ODDFRM</name>
|
|
<description>Odd frame</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CDIS</name>
|
|
<description>Channel disable</description>
|
|
<bitOffset>30</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CEN</name>
|
|
<description>Channel enable</description>
|
|
<bitOffset>31</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>HCH0INTF</name>
|
|
<displayName>HCH0INTF</displayName>
|
|
<description>host channel-0 interrupt register
|
|
(USBFS_HCHxINTF)</description>
|
|
<addressOffset>0x108</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TF</name>
|
|
<description>Transfer finished</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH</name>
|
|
<description>Channel halted</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>STALL</name>
|
|
<description>STALL response received
|
|
interrupt</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>NAK</name>
|
|
<description>NAK response received
|
|
interrupt</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ACK</name>
|
|
<description>ACK response received/transmitted
|
|
interrupt</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>USBER</name>
|
|
<description>USB bus error</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>BBER</name>
|
|
<description>Babble error</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>REQOVR</name>
|
|
<description>Request queue overrun</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DTER</name>
|
|
<description>Data toggle error</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>HCH1INTF</name>
|
|
<displayName>HCH1INTF</displayName>
|
|
<description>host channel-1 interrupt register
|
|
(HCH1INTF)</description>
|
|
<addressOffset>0x128</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TF</name>
|
|
<description>Transfer finished</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH</name>
|
|
<description>Channel halted</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>STALL</name>
|
|
<description>STALL response received
|
|
interrupt</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>NAK</name>
|
|
<description>NAK response received
|
|
interrupt</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ACK</name>
|
|
<description>ACK response received/transmitted
|
|
interrupt</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>USBER</name>
|
|
<description>USB bus error</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>BBER</name>
|
|
<description>Babble error</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>REQOVR</name>
|
|
<description>Request queue overrun</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DTER</name>
|
|
<description>Data toggle error</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>HCH2INTF</name>
|
|
<displayName>HCH2INTF</displayName>
|
|
<description>host channel-2 interrupt register
|
|
(HCH2INTF)</description>
|
|
<addressOffset>0x148</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TF</name>
|
|
<description>Transfer finished</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH</name>
|
|
<description>Channel halted</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>STALL</name>
|
|
<description>STALL response received
|
|
interrupt</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>NAK</name>
|
|
<description>NAK response received
|
|
interrupt</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ACK</name>
|
|
<description>ACK response received/transmitted
|
|
interrupt</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>USBER</name>
|
|
<description>USB bus error</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>BBER</name>
|
|
<description>Babble error</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>REQOVR</name>
|
|
<description>Request queue overrun</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DTER</name>
|
|
<description>Data toggle error</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>HCH3INTF</name>
|
|
<displayName>HCH3INTF</displayName>
|
|
<description>host channel-3 interrupt register
|
|
(HCH3INTF)</description>
|
|
<addressOffset>0x168</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TF</name>
|
|
<description>Transfer finished</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH</name>
|
|
<description>Channel halted</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>STALL</name>
|
|
<description>STALL response received
|
|
interrupt</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>NAK</name>
|
|
<description>NAK response received
|
|
interrupt</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ACK</name>
|
|
<description>ACK response received/transmitted
|
|
interrupt</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>USBER</name>
|
|
<description>USB bus error</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>BBER</name>
|
|
<description>Babble error</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>REQOVR</name>
|
|
<description>Request queue overrun</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DTER</name>
|
|
<description>Data toggle error</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>HCH4INTF</name>
|
|
<displayName>HCH4INTF</displayName>
|
|
<description>host channel-4 interrupt register
|
|
(HCH4INTF)</description>
|
|
<addressOffset>0x188</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TF</name>
|
|
<description>Transfer finished</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH</name>
|
|
<description>Channel halted</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>STALL</name>
|
|
<description>STALL response received
|
|
interrupt</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>NAK</name>
|
|
<description>NAK response received
|
|
interrupt</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ACK</name>
|
|
<description>ACK response received/transmitted
|
|
interrupt</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>USBER</name>
|
|
<description>USB bus error</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>BBER</name>
|
|
<description>Babble error</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>REQOVR</name>
|
|
<description>Request queue overrun</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DTER</name>
|
|
<description>Data toggle error</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>HCH5INTF</name>
|
|
<displayName>HCH5INTF</displayName>
|
|
<description>host channel-5 interrupt register
|
|
(HCH5INTF)</description>
|
|
<addressOffset>0x1A8</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TF</name>
|
|
<description>Transfer finished</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH</name>
|
|
<description>Channel halted</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>STALL</name>
|
|
<description>STALL response received
|
|
interrupt</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>NAK</name>
|
|
<description>NAK response received
|
|
interrupt</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ACK</name>
|
|
<description>ACK response received/transmitted
|
|
interrupt</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>USBER</name>
|
|
<description>USB bus error</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>BBER</name>
|
|
<description>Babble error</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>REQOVR</name>
|
|
<description>Request queue overrun</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DTER</name>
|
|
<description>Data toggle error</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>HCH6INTF</name>
|
|
<displayName>HCH6INTF</displayName>
|
|
<description>host channel-6 interrupt register
|
|
(HCH6INTF)</description>
|
|
<addressOffset>0x1C8</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TF</name>
|
|
<description>Transfer finished</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH</name>
|
|
<description>Channel halted</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>STALL</name>
|
|
<description>STALL response received
|
|
interrupt</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>NAK</name>
|
|
<description>NAK response received
|
|
interrupt</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ACK</name>
|
|
<description>ACK response received/transmitted
|
|
interrupt</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>USBER</name>
|
|
<description>USB bus error</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>BBER</name>
|
|
<description>Babble error</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>REQOVR</name>
|
|
<description>Request queue overrun</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DTER</name>
|
|
<description>Data toggle error</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>HCH7INTF</name>
|
|
<displayName>HCH7INTF</displayName>
|
|
<description>host channel-7 interrupt register
|
|
(HCH7INTF)</description>
|
|
<addressOffset>0x1E8</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TF</name>
|
|
<description>Transfer finished</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CH</name>
|
|
<description>Channel halted</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>STALL</name>
|
|
<description>STALL response received
|
|
interrupt</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>NAK</name>
|
|
<description>NAK response received
|
|
interrupt</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ACK</name>
|
|
<description>ACK response received/transmitted
|
|
interrupt</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>USBER</name>
|
|
<description>USB bus error</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>BBER</name>
|
|
<description>Babble error</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>REQOVR</name>
|
|
<description>Request queue overrun</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DTER</name>
|
|
<description>Data toggle error</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>HCH0INTEN</name>
|
|
<displayName>HCH0INTEN</displayName>
|
|
<description>host channel-0 interrupt enable register
|
|
(HCH0INTEN)</description>
|
|
<addressOffset>0x10C</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TFIE</name>
|
|
<description>Transfer completed interrupt enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CHIE</name>
|
|
<description>Channel halted interrupt enable</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>STALLIE</name>
|
|
<description>STALL interrupt enable</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>NAKIE</name>
|
|
<description>NAK interrupt enable</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ACKIE</name>
|
|
<description>ACK interrupt enable</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>USBERIE</name>
|
|
<description>USB bus error interrupt enable</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>BBERIE</name>
|
|
<description>Babble error interrupt enable</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>REQOVRIE</name>
|
|
<description>request queue overrun interrupt enable</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DTERIE</name>
|
|
<description>Data toggle error interrupt enable</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>HCH1INTEN</name>
|
|
<displayName>HCH1INTEN</displayName>
|
|
<description>host channel-1 interrupt enable register
|
|
(HCH1INTEN)</description>
|
|
<addressOffset>0x12C</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TFIE</name>
|
|
<description>Transfer completed interrupt enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CHIE</name>
|
|
<description>Channel halted interrupt enable</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>STALLIE</name>
|
|
<description>STALL interrupt enable</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>NAKIE</name>
|
|
<description>NAK interrupt enable</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ACKIE</name>
|
|
<description>ACK interrupt enable</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>USBERIE</name>
|
|
<description>USB bus error interrupt enable</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>BBERIE</name>
|
|
<description>Babble error interrupt enable</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>REQOVRIE</name>
|
|
<description>request queue overrun interrupt enable</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DTERIE</name>
|
|
<description>Data toggle error interrupt enable</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>HCH2INTEN</name>
|
|
<displayName>HCH2INTEN</displayName>
|
|
<description>host channel-2 interrupt enable register
|
|
(HCH2INTEN)</description>
|
|
<addressOffset>0x14C</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TFIE</name>
|
|
<description>Transfer completed interrupt enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CHIE</name>
|
|
<description>Channel halted interrupt enable</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>STALLIE</name>
|
|
<description>STALL interrupt enable</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>NAKIE</name>
|
|
<description>NAK interrupt enable</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ACKIE</name>
|
|
<description>ACK interrupt enable</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>USBERIE</name>
|
|
<description>USB bus error interrupt enable</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>BBERIE</name>
|
|
<description>Babble error interrupt enable</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>REQOVRIE</name>
|
|
<description>request queue overrun interrupt enable</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DTERIE</name>
|
|
<description>Data toggle error interrupt enable</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>HCH3INTEN</name>
|
|
<displayName>HCH3INTEN</displayName>
|
|
<description>host channel-3 interrupt enable register
|
|
(HCH3INTEN)</description>
|
|
<addressOffset>0x16C</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TFIE</name>
|
|
<description>Transfer completed interrupt enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CHIE</name>
|
|
<description>Channel halted interrupt enable</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>STALLIE</name>
|
|
<description>STALL interrupt enable</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>NAKIE</name>
|
|
<description>NAK interrupt enable</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ACKIE</name>
|
|
<description>ACK interrupt enable</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>USBERIE</name>
|
|
<description>USB bus error interrupt enable</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>BBERIE</name>
|
|
<description>Babble error interrupt enable</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>REQOVRIE</name>
|
|
<description>request queue overrun interrupt enable</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DTERIE</name>
|
|
<description>Data toggle error interrupt enable</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>HCH4INTEN</name>
|
|
<displayName>HCH4INTEN</displayName>
|
|
<description>host channel-4 interrupt enable register
|
|
(HCH4INTEN)</description>
|
|
<addressOffset>0x18C</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TFIE</name>
|
|
<description>Transfer completed interrupt enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CHIE</name>
|
|
<description>Channel halted interrupt enable</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>STALLIE</name>
|
|
<description>STALL interrupt enable</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>NAKIE</name>
|
|
<description>NAK interrupt enable</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ACKIE</name>
|
|
<description>ACK interrupt enable</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>USBERIE</name>
|
|
<description>USB bus error interrupt enable</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>BBERIE</name>
|
|
<description>Babble error interrupt enable</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>REQOVRIE</name>
|
|
<description>request queue overrun interrupt enable</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DTERIE</name>
|
|
<description>Data toggle error interrupt enable</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>HCH5INTEN</name>
|
|
<displayName>HCH5INTEN</displayName>
|
|
<description>host channel-5 interrupt enable register
|
|
(HCH5INTEN)</description>
|
|
<addressOffset>0x1AC</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TFIE</name>
|
|
<description>Transfer completed interrupt enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CHIE</name>
|
|
<description>Channel halted interrupt enable</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>STALLIE</name>
|
|
<description>STALL interrupt enable</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>NAKIE</name>
|
|
<description>NAK interrupt enable</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ACKIE</name>
|
|
<description>ACK interrupt enable</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>USBERIE</name>
|
|
<description>USB bus error interrupt enable</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>BBERIE</name>
|
|
<description>Babble error interrupt enable</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>REQOVRIE</name>
|
|
<description>request queue overrun interrupt enable</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DTERIE</name>
|
|
<description>Data toggle error interrupt enable</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>HCH6INTEN</name>
|
|
<displayName>HCH6INTEN</displayName>
|
|
<description>host channel-6 interrupt enable register
|
|
(HCH6INTEN)</description>
|
|
<addressOffset>0x1CC</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TFIE</name>
|
|
<description>Transfer completed interrupt enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CHIE</name>
|
|
<description>Channel halted interrupt enable</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>STALLIE</name>
|
|
<description>STALL interrupt enable</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>NAKIE</name>
|
|
<description>NAK interrupt enable</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ACKIE</name>
|
|
<description>ACK interrupt enable</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>USBERIE</name>
|
|
<description>USB bus error interrupt enable</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>BBERIE</name>
|
|
<description>Babble error interrupt enable</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>REQOVRIE</name>
|
|
<description>request queue overrun interrupt enable</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DTERIE</name>
|
|
<description>Data toggle error interrupt enable</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>HCH7INTEN</name>
|
|
<displayName>HCH7INTEN</displayName>
|
|
<description>host channel-7 interrupt enable register
|
|
(HCH7INTEN)</description>
|
|
<addressOffset>0x1EC</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TFIE</name>
|
|
<description>Transfer completed interrupt enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CHIE</name>
|
|
<description>Channel halted interrupt enable</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>STALLIE</name>
|
|
<description>STALL interrupt enable</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>NAKIE</name>
|
|
<description>NAK interrupt enable</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ACKIE</name>
|
|
<description>ACK interrupt enable</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>USBERIE</name>
|
|
<description>USB bus error interrupt enable</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>BBERIE</name>
|
|
<description>Babble error interrupt enable</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>REQOVRIE</name>
|
|
<description>request queue overrun interrupt enable</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DTERIE</name>
|
|
<description>Data toggle error interrupt enable</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>HCH0LEN</name>
|
|
<displayName>HCH0LEN</displayName>
|
|
<description>host channel-0 transfer length
|
|
register</description>
|
|
<addressOffset>0x110</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TLEN</name>
|
|
<description>Transfer length</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>19</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PCNT</name>
|
|
<description>Packet count</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>10</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DPID</name>
|
|
<description>Data PID</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>HCH1LEN</name>
|
|
<displayName>HCH1LEN</displayName>
|
|
<description>host channel-1 transfer length
|
|
register</description>
|
|
<addressOffset>0x130</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TLEN</name>
|
|
<description>Transfer length</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>19</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PCNT</name>
|
|
<description>Packet count</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>10</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DPID</name>
|
|
<description>Data PID</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>HCH2LEN</name>
|
|
<displayName>HCH2LEN</displayName>
|
|
<description> host channel-2 transfer length
|
|
register</description>
|
|
<addressOffset>0x150</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TLEN</name>
|
|
<description>Transfer length</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>19</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PCNT</name>
|
|
<description>Packet count</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>10</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DPID</name>
|
|
<description>Data PID</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>HCH3LEN</name>
|
|
<displayName>HCH3LEN</displayName>
|
|
<description> host channel-3 transfer length
|
|
register</description>
|
|
<addressOffset>0x170</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TLEN</name>
|
|
<description>Transfer length</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>19</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PCNT</name>
|
|
<description>Packet count</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>10</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DPID</name>
|
|
<description>Data PID</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>HCH4LEN</name>
|
|
<displayName>HCH4LEN</displayName>
|
|
<description>host channel-4 transfer length
|
|
register</description>
|
|
<addressOffset>0x190</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TLEN</name>
|
|
<description>Transfer length</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>19</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PCNT</name>
|
|
<description>Packet count</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>10</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DPID</name>
|
|
<description>Data PID</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>HCH5LEN</name>
|
|
<displayName>HCH5LEN</displayName>
|
|
<description>host channel-5 transfer length
|
|
register</description>
|
|
<addressOffset>0x1B0</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TLEN</name>
|
|
<description>Transfer length</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>19</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PCNT</name>
|
|
<description>Packet count</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>10</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DPID</name>
|
|
<description>Data PID</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>HCH6LEN</name>
|
|
<displayName>HCH6LEN</displayName>
|
|
<description>host channel-6 transfer length
|
|
register</description>
|
|
<addressOffset>0x1D0</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TLEN</name>
|
|
<description>Transfer length</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>19</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PCNT</name>
|
|
<description>Packet count</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>10</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DPID</name>
|
|
<description>Data PID</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>HCH7LEN</name>
|
|
<displayName>HCH7LEN</displayName>
|
|
<description>host channel-7 transfer length
|
|
register</description>
|
|
<addressOffset>0x1F0</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TLEN</name>
|
|
<description>Transfer length</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>19</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PCNT</name>
|
|
<description>Packet count</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>10</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DPID</name>
|
|
<description>Data PID</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>USBFS_DEVICE</name>
|
|
<description>USB on the go full speed device</description>
|
|
<groupName>USBFS</groupName>
|
|
<baseAddress>0x50000800</baseAddress>
|
|
<addressBlock>
|
|
<offset>0x00</offset>
|
|
<size>0x400</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<registers>
|
|
<register>
|
|
<name>DCFG</name>
|
|
<displayName>DCFG</displayName>
|
|
<description>device configuration register
|
|
(DCFG)</description>
|
|
<addressOffset>0x0</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DS</name>
|
|
<description>Device speed</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>NZLSOH</name>
|
|
<description>Non-zero-length status OUT
|
|
handshake</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>DAR</name>
|
|
<description>Device address</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>7</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>EOPFT</name>
|
|
<description>end of periodic frame time</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DCTL</name>
|
|
<displayName>DCTL</displayName>
|
|
<description>device control register
|
|
(DCTL)</description>
|
|
<addressOffset>0x04</addressOffset>
|
|
<size>0x20</size>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>RWKUP</name>
|
|
<description>Remote wakeup</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>SD</name>
|
|
<description>Soft disconnect</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>GINS</name>
|
|
<description>Global IN NAK status</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>GONS</name>
|
|
<description>Global OUT NAK status</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>SGINAK</name>
|
|
<description>Set global IN NAK</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CGINAK</name>
|
|
<description>Clear global IN NAK</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>SGONAK</name>
|
|
<description>Set global OUT NAK</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CGONAK</name>
|
|
<description>Clear global OUT NAK</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>POIF</name>
|
|
<description>Power-on initialization flag</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DSTAT</name>
|
|
<displayName>DSTAT</displayName>
|
|
<description>device status register
|
|
(DSTAT)</description>
|
|
<addressOffset>0x08</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SPST</name>
|
|
<description>Suspend status</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>ES</name>
|
|
<description>Enumerated speed</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>FNRSOF</name>
|
|
<description>Frame number of the received
|
|
SOF</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>14</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DIEPINTEN</name>
|
|
<displayName>DIEPINTEN</displayName>
|
|
<description>device IN endpoint common interrupt
|
|
mask register (DIEPINTEN)</description>
|
|
<addressOffset>0x10</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TFEN</name>
|
|
<description>Transfer finished interrupt
|
|
enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>EPDISEN</name>
|
|
<description>Endpoint disabled interrupt
|
|
enable</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CITOEN</name>
|
|
<description>Control IN timeout condition interrupt enable (Non-isochronous
|
|
endpoints)</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>EPTXFUDEN</name>
|
|
<description>Endpoint Tx FIFO underrun interrupt enable bit</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>IEPNEEN</name>
|
|
<description>IN endpoint NAK effective
|
|
interrupt enable</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DOEPINTEN</name>
|
|
<displayName>DOEPINTEN</displayName>
|
|
<description>device OUT endpoint common interrupt
|
|
enable register (DOEPINTEN)</description>
|
|
<addressOffset>0x14</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TFEN</name>
|
|
<description>Transfer finished interrupt
|
|
enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>EPDISEN</name>
|
|
<description>Endpoint disabled interrupt
|
|
enable</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>STPFEN</name>
|
|
<description>SETUP phase finished interrupt enable</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>EPRXFOVREN</name>
|
|
<description> Endpoint Rx FIFO overrun interrupt enable</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>BTBSTPEN</name>
|
|
<description> Back-to-back SETUP packets
|
|
interrupt enable</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DAEPINT</name>
|
|
<displayName>DAEPINT</displayName>
|
|
<description>device all endpoints interrupt
|
|
register (DAEPINT)</description>
|
|
<addressOffset>0x18</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IEPITB</name>
|
|
<description>Device all IN endpoint interrupt bits</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>OEPITB</name>
|
|
<description>Device all OUT endpoint interrupt bits</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DAEPINTEN</name>
|
|
<displayName>DAEPINTEN</displayName>
|
|
<description>Device all endpoints interrupt enable register
|
|
(DAEPINTEN)</description>
|
|
<addressOffset>0x1C</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IEPIE</name>
|
|
<description>IN EP interrupt interrupt enable bits</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>OEPIE</name>
|
|
<description>OUT endpoint interrupt enable bits</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DVBUSDT</name>
|
|
<displayName>DVBUSDT</displayName>
|
|
<description>device VBUS discharge time
|
|
register</description>
|
|
<addressOffset>0x28</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x000017D7</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DVBUSDT</name>
|
|
<description>Device VBUS discharge time</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DVBUSPT</name>
|
|
<displayName>DVBUSPT</displayName>
|
|
<description>device VBUS pulsing time
|
|
register</description>
|
|
<addressOffset>0x2C</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x000005B8</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DVBUSPT</name>
|
|
<description>Device VBUS pulsing time</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>12</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DIEPFEINTEN</name>
|
|
<displayName>DIEPFEINTEN</displayName>
|
|
<description>device IN endpoint FIFO empty
|
|
interrupt enable register</description>
|
|
<addressOffset>0x34</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IEPTXFEIE</name>
|
|
<description>IN EP Tx FIFO empty interrupt enable
|
|
bits</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DIEP0CTL</name>
|
|
<displayName>DIEP0CTL</displayName>
|
|
<description>device IN endpoint 0 control
|
|
register (DIEP0CTL)</description>
|
|
<addressOffset>0x100</addressOffset>
|
|
<size>0x20</size>
|
|
<resetValue>0x00008000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>MPL</name>
|
|
<description>Maximum packet length</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>EPACT</name>
|
|
<description>endpoint active</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>NAKS</name>
|
|
<description>NAK status</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>EPTYPE</name>
|
|
<description>Endpoint type</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>STALL</name>
|
|
<description>STALL handshake</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>TXFNUM</name>
|
|
<description>TxFIFO number</description>
|
|
<bitOffset>22</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CNAK</name>
|
|
<description>Clear NAK</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>SNAK</name>
|
|
<description>Set NAK</description>
|
|
<bitOffset>27</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>EPD</name>
|
|
<description>Endpoint disable</description>
|
|
<bitOffset>30</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>EPEN</name>
|
|
<description>Endpoint enable</description>
|
|
<bitOffset>31</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DIEP1CTL</name>
|
|
<displayName>DIEP1CTL</displayName>
|
|
<description>device in endpoint-1 control
|
|
register</description>
|
|
<addressOffset>0x120</addressOffset>
|
|
<size>0x20</size>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EPEN</name>
|
|
<description>Endpoint enable</description>
|
|
<bitOffset>31</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>EPD</name>
|
|
<description>Endpoint disable</description>
|
|
<bitOffset>30</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>SD1PID_SODDFRM</name>
|
|
<description>Set DATA1 PID/Set odd frame</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>SD0PID_SEVENFRM</name>
|
|
<description>SD0PID/SEVNFRM</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>SNAK</name>
|
|
<description>Set NAK</description>
|
|
<bitOffset>27</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CNAK</name>
|
|
<description>Clear NAK</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXFNUM</name>
|
|
<description>Tx FIFO number</description>
|
|
<bitOffset>22</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>STALL</name>
|
|
<description>STALL handshake</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>EPTYPE</name>
|
|
<description>Endpoint type</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>NAKS</name>
|
|
<description>NAK status</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>EOFRM_DPID</name>
|
|
<description>EOFRM/DPID</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>EPACT</name>
|
|
<description>Endpoint active</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>MPL</name>
|
|
<description>maximum packet length</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>11</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DIEP2CTL</name>
|
|
<displayName>DIEP2CTL</displayName>
|
|
<description>device endpoint-2 control
|
|
register</description>
|
|
<addressOffset>0x140</addressOffset>
|
|
<size>0x20</size>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EPEN</name>
|
|
<description>Endpoint enable</description>
|
|
<bitOffset>31</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>EPD</name>
|
|
<description>Endpoint disable</description>
|
|
<bitOffset>30</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>SD1PID_SODDFRM</name>
|
|
<description>Set DATA1 PID/Set odd frame</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>SD0PID_SEVENFRM</name>
|
|
<description>SD0PID/SEVNFRM</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>SNAK</name>
|
|
<description>Set NAK</description>
|
|
<bitOffset>27</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CNAK</name>
|
|
<description>Clear NAK</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXFNUM</name>
|
|
<description>Tx FIFO number</description>
|
|
<bitOffset>22</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>STALL</name>
|
|
<description>STALL handshake</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>EPTYPE</name>
|
|
<description>Endpoint type</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>NAKS</name>
|
|
<description>NAK status</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>EOFRM_DPID</name>
|
|
<description>EOFRM/DPID</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>EPACT</name>
|
|
<description>Endpoint active</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>MPL</name>
|
|
<description>maximum packet length</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>11</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DIEP3CTL</name>
|
|
<displayName>DIEP3CTL</displayName>
|
|
<description>device endpoint-3 control
|
|
register</description>
|
|
<addressOffset>0x160</addressOffset>
|
|
<size>0x20</size>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EPEN</name>
|
|
<description>Endpoint enable</description>
|
|
<bitOffset>31</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>EPD</name>
|
|
<description>Endpoint disable</description>
|
|
<bitOffset>30</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>SD1PID_SODDFRM</name>
|
|
<description>Set DATA1 PID/Set odd frame</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>SD0PID_SEVENFRM</name>
|
|
<description>SD0PID/SEVNFRM</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>SNAK</name>
|
|
<description>Set NAK</description>
|
|
<bitOffset>27</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CNAK</name>
|
|
<description>Clear NAK</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXFNUM</name>
|
|
<description>Tx FIFO number</description>
|
|
<bitOffset>22</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>STALL</name>
|
|
<description>STALL handshake</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>EPTYPE</name>
|
|
<description>Endpoint type</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>NAKS</name>
|
|
<description>NAK status</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>EOFRM_DPID</name>
|
|
<description>EOFRM/DPID</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>EPACT</name>
|
|
<description>Endpoint active</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>MPL</name>
|
|
<description>maximum packet length</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>11</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DOEP0CTL</name>
|
|
<displayName>DOEP0CTL</displayName>
|
|
<description>device endpoint-0 control
|
|
register</description>
|
|
<addressOffset>0x300</addressOffset>
|
|
<size>0x20</size>
|
|
<resetValue>0x00008000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EPEN</name>
|
|
<description>Endpoint enable</description>
|
|
<bitOffset>31</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>EPD</name>
|
|
<description>Endpoint disable</description>
|
|
<bitOffset>30</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>SNAK</name>
|
|
<description>Set NAK</description>
|
|
<bitOffset>27</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CNAK</name>
|
|
<description>Clear NAK</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>STALL</name>
|
|
<description>STALL handshake</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>SNOOP</name>
|
|
<description>Snoop mode</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>EPTYPE</name>
|
|
<description>Endpoint type</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>NAKS</name>
|
|
<description>NAK status</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>EPACT</name>
|
|
<description>Endpoint active</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>MPL</name>
|
|
<description>Maximum packet length</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DOEP1CTL</name>
|
|
<displayName>DOEP1CTL</displayName>
|
|
<description>device endpoint-1 control
|
|
register</description>
|
|
<addressOffset>0x320</addressOffset>
|
|
<size>0x20</size>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EPEN</name>
|
|
<description>Endpoint enable</description>
|
|
<bitOffset>31</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>EPD</name>
|
|
<description>Endpoint disable</description>
|
|
<bitOffset>30</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>SD1PID_SODDFRM</name>
|
|
<description>SD1PID/SODDFRM</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>SD0PID_SEVENFRM</name>
|
|
<description>SD0PID/SEVENFRM</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>SNAK</name>
|
|
<description>Set NAK</description>
|
|
<bitOffset>27</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CNAK</name>
|
|
<description>Clear NAK</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>STALL</name>
|
|
<description>STALL handshake</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>SNOOP</name>
|
|
<description>Snoop mode</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>EPTYPE</name>
|
|
<description>Endpoint type</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>NAKS</name>
|
|
<description>NAK status</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>EOFRM_DPID</name>
|
|
<description>EOFRM/DPID</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>EPACT</name>
|
|
<description>Endpoint active</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>MPL</name>
|
|
<description>maximum packet length</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>11</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DOEP2CTL</name>
|
|
<displayName>DOEP2CTL</displayName>
|
|
<description>device endpoint-2 control
|
|
register</description>
|
|
<addressOffset>0x340</addressOffset>
|
|
<size>0x20</size>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EPEN</name>
|
|
<description>Endpoint enable</description>
|
|
<bitOffset>31</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>EPD</name>
|
|
<description>Endpoint disable</description>
|
|
<bitOffset>30</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>SD1PID_SODDFRM</name>
|
|
<description>SD1PID/SODDFRM</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>SD0PID_SEVENFRM</name>
|
|
<description>SD0PID/SEVENFRM</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>SNAK</name>
|
|
<description>Set NAK</description>
|
|
<bitOffset>27</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CNAK</name>
|
|
<description>Clear NAK</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>STALL</name>
|
|
<description>STALL handshake</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>SNOOP</name>
|
|
<description>Snoop mode</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>EPTYPE</name>
|
|
<description>Endpoint type</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>NAKS</name>
|
|
<description>NAK status</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>EOFRM_DPID</name>
|
|
<description>EOFRM/DPID</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>EPACT</name>
|
|
<description>Endpoint active</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>MPL</name>
|
|
<description>maximum packet length</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>11</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DOEP3CTL</name>
|
|
<displayName>DOEP3CTL</displayName>
|
|
<description>device endpoint-3 control
|
|
register</description>
|
|
<addressOffset>0x360</addressOffset>
|
|
<size>0x20</size>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EPEN</name>
|
|
<description>Endpoint enable</description>
|
|
<bitOffset>31</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>EPD</name>
|
|
<description>Endpoint disable</description>
|
|
<bitOffset>30</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>SD1PID_SODDFRM</name>
|
|
<description>SD1PID/SODDFRM</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>SD0PID_SEVENFRM</name>
|
|
<description>SD0PID/SEVENFRM</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>SNAK</name>
|
|
<description>Set NAK</description>
|
|
<bitOffset>27</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CNAK</name>
|
|
<description>Clear NAK</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>STALL</name>
|
|
<description>STALL handshake</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>SNOOP</name>
|
|
<description>Snoop mode</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>EPTYPE</name>
|
|
<description>Endpoint type</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>NAKS</name>
|
|
<description>NAK status</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>EOFRM_DPID</name>
|
|
<description>EOFRM/DPID</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>EPACT</name>
|
|
<description>Endpoint active</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>MPL</name>
|
|
<description>maximum packet length</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>11</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DIEP0INTF</name>
|
|
<displayName>DIEP0INTF</displayName>
|
|
<description>device endpoint-0 interrupt
|
|
register</description>
|
|
<addressOffset>0x108</addressOffset>
|
|
<size>0x20</size>
|
|
<resetValue>0x00000080</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TXFE</name>
|
|
<description>Transmit FIFO empty</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>IEPNE</name>
|
|
<description>IN endpoint NAK effective</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>EPTXFUD</name>
|
|
<description>Endpoint Tx FIFO underrun</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CITO</name>
|
|
<description>Control in timeout interrupt</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>EPDIS</name>
|
|
<description>Endpoint finished</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>TF</name>
|
|
<description>Transfer finished</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DIEP1INTF</name>
|
|
<displayName>DIEP1INTF</displayName>
|
|
<description>device endpoint-1 interrupt
|
|
register</description>
|
|
<addressOffset>0x128</addressOffset>
|
|
<size>0x20</size>
|
|
<resetValue>0x00000080</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TXFE</name>
|
|
<description>Transmit FIFO empty</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>IEPNE</name>
|
|
<description>IN endpoint NAK effective</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>EPTXFUD</name>
|
|
<description>Endpoint Tx FIFO underrun</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CITO</name>
|
|
<description>Control in timeout interrupt</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>EPDIS</name>
|
|
<description>Endpoint finished</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>TF</name>
|
|
<description>Transfer finished</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DIEP2INTF</name>
|
|
<displayName>DIEP2INTF</displayName>
|
|
<description>device endpoint-2 interrupt
|
|
register</description>
|
|
<addressOffset>0x148</addressOffset>
|
|
<size>0x20</size>
|
|
<resetValue>0x00000080</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TXFE</name>
|
|
<description>Transmit FIFO empty</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>IEPNE</name>
|
|
<description>IN endpoint NAK effective</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>EPTXFUD</name>
|
|
<description>Endpoint Tx FIFO underrun</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CITO</name>
|
|
<description>Control in timeout interrupt</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>EPDIS</name>
|
|
<description>Endpoint finished</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>TF</name>
|
|
<description>Transfer finished</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DIEP3INTF</name>
|
|
<displayName>DIEP3INTF</displayName>
|
|
<description>device endpoint-3 interrupt
|
|
register</description>
|
|
<addressOffset>0x168</addressOffset>
|
|
<size>0x20</size>
|
|
<resetValue>0x00000080</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TXFE</name>
|
|
<description>Transmit FIFO empty</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>IEPNE</name>
|
|
<description>IN endpoint NAK effective</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>EPTXFUD</name>
|
|
<description>Endpoint Tx FIFO underrun</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CITO</name>
|
|
<description>Control in timeout interrupt</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>EPDIS</name>
|
|
<description>Endpoint finished</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>TF</name>
|
|
<description>Transfer finished</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DOEP0INTF</name>
|
|
<displayName>DOEP0INTF</displayName>
|
|
<description>device out endpoint-0 interrupt flag
|
|
register</description>
|
|
<addressOffset>0x308</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>BTBSTP</name>
|
|
<description>Back-to-back SETUP packets</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>EPRXFOVR</name>
|
|
<description>Endpoint Rx FIFO overrun</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>STPF</name>
|
|
<description>Setup phase finished</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>EPDIS</name>
|
|
<description>Endpoint disabled</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TF</name>
|
|
<description>Transfer finished</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DOEP1INTF</name>
|
|
<displayName>DOEP1INTF</displayName>
|
|
<description>device out endpoint-1 interrupt flag
|
|
register</description>
|
|
<addressOffset>0x328</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>BTBSTP</name>
|
|
<description>Back-to-back SETUP packets</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>EPRXFOVR</name>
|
|
<description>Endpoint Rx FIFO overrun</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>STPF</name>
|
|
<description>Setup phase finished</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>EPDIS</name>
|
|
<description>Endpoint disabled</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TF</name>
|
|
<description>Transfer finished</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DOEP2INTF</name>
|
|
<displayName>DOEP2INTF</displayName>
|
|
<description>device out endpoint-2 interrupt flag
|
|
register</description>
|
|
<addressOffset>0x348</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>BTBSTP</name>
|
|
<description>Back-to-back SETUP packets</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>EPRXFOVR</name>
|
|
<description>Endpoint Rx FIFO overrun</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>STPF</name>
|
|
<description>Setup phase finished</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>EPDIS</name>
|
|
<description>Endpoint disabled</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TF</name>
|
|
<description>Transfer finished</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DOEP3INTF</name>
|
|
<displayName>DOEP3INTF</displayName>
|
|
<description>device out endpoint-3 interrupt flag
|
|
register</description>
|
|
<addressOffset>0x368</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>BTBSTP</name>
|
|
<description>Back-to-back SETUP packets</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>EPRXFOVR</name>
|
|
<description>Endpoint Rx FIFO overrun</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>STPF</name>
|
|
<description>Setup phase finished</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>EPDIS</name>
|
|
<description>Endpoint disabled</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TF</name>
|
|
<description>Transfer finished</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DIEP0LEN</name>
|
|
<displayName>DIEP0LEN</displayName>
|
|
<description>device IN endpoint-0 transfer length
|
|
register</description>
|
|
<addressOffset>0x110</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>PCNT</name>
|
|
<description>Packet count</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TLEN</name>
|
|
<description>Transfer length</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>7</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DOEP0LEN</name>
|
|
<displayName>DOEP0LEN</displayName>
|
|
<description>device OUT endpoint-0 transfer length
|
|
register</description>
|
|
<addressOffset>0x310</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>STPCNT</name>
|
|
<description>SETUP packet count</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PCNT</name>
|
|
<description>Packet count</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TLEN</name>
|
|
<description>Transfer length</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>7</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DIEP1LEN</name>
|
|
<displayName>DIEP1LEN</displayName>
|
|
<description>device IN endpoint-1 transfer length
|
|
register</description>
|
|
<addressOffset>0x130</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>MCPF</name>
|
|
<description>Multi packet count per frame</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PCNT</name>
|
|
<description>Packet count</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>10</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TLEN</name>
|
|
<description>Transfer length</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>19</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DIEP2LEN</name>
|
|
<displayName>DIEP2LEN</displayName>
|
|
<description>device IN endpoint-2 transfer length
|
|
register</description>
|
|
<addressOffset>0x150</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>MCPF</name>
|
|
<description>Multi packet count per frame</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PCNT</name>
|
|
<description>Packet count</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>10</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TLEN</name>
|
|
<description>Transfer length</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>19</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DIEP3LEN</name>
|
|
<displayName>DIEP3LEN</displayName>
|
|
<description>device IN endpoint-3 transfer length
|
|
register</description>
|
|
<addressOffset>0x170</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>MCPF</name>
|
|
<description>Multi packet count per frame</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PCNT</name>
|
|
<description>Packet count</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>10</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TLEN</name>
|
|
<description>Transfer length</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>19</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DOEP1LEN</name>
|
|
<displayName>DOEP1LEN</displayName>
|
|
<description>device OUT endpoint-1 transfer length
|
|
register</description>
|
|
<addressOffset>0x330</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>STPCNT_RXDPID</name>
|
|
<description>SETUP packet count/Received data PID</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PCNT</name>
|
|
<description>Packet count</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>10</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TLEN</name>
|
|
<description>Transfer length</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>19</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DOEP2LEN</name>
|
|
<displayName>DOEP2LEN</displayName>
|
|
<description>device OUT endpoint-2 transfer length
|
|
register</description>
|
|
<addressOffset>0x350</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>STPCNT_RXDPID</name>
|
|
<description>SETUP packet count/Received data PID</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PCNT</name>
|
|
<description>Packet count</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>10</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TLEN</name>
|
|
<description>Transfer length</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>19</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DOEP3LEN</name>
|
|
<displayName>DOEP3LEN</displayName>
|
|
<description>device OUT endpoint-3 transfer length
|
|
register</description>
|
|
<addressOffset>0x370</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>STPCNT_RXDPID</name>
|
|
<description>SETUP packet count/Received data PID</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PCNT</name>
|
|
<description>Packet count</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>10</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>TLEN</name>
|
|
<description>Transfer length</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>19</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DIEP0TFSTAT</name>
|
|
<displayName>DIEP0TFSTAT</displayName>
|
|
<description>device IN endpoint 0 transmit FIFO
|
|
status register</description>
|
|
<addressOffset>0x118</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000200</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IEPTFS</name>
|
|
<description>IN endpoint TxFIFO space
|
|
remaining</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DIEP1TFSTAT</name>
|
|
<displayName>DIEP1TFSTAT</displayName>
|
|
<description>device IN endpoint 1 transmit FIFO
|
|
status register</description>
|
|
<addressOffset>0x138</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000200</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IEPTFS</name>
|
|
<description>IN endpoint TxFIFO space
|
|
remaining</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DIEP2TFSTAT</name>
|
|
<displayName>DIEP2TFSTAT</displayName>
|
|
<description>device IN endpoint 2 transmit FIFO
|
|
status register</description>
|
|
<addressOffset>0x158</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000200</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IEPTFS</name>
|
|
<description>IN endpoint TxFIFO space
|
|
remaining</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DIEP3TFSTAT</name>
|
|
<displayName>DIEP3TFSTAT</displayName>
|
|
<description>device IN endpoint 3 transmit FIFO
|
|
status register</description>
|
|
<addressOffset>0x178</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000200</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IEPTFS</name>
|
|
<description>IN endpoint TxFIFO space
|
|
remaining</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>USBFS_PWRCLK</name>
|
|
<description>USB on the go full speed</description>
|
|
<groupName>USBFS</groupName>
|
|
<baseAddress>0x50000E00</baseAddress>
|
|
<addressBlock>
|
|
<offset>0x0</offset>
|
|
<size>0x100</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<registers>
|
|
<register>
|
|
<name>PWRCLKCTL</name>
|
|
<displayName>PWRCLKCTL</displayName>
|
|
<description>power and clock gating control
|
|
register (PWRCLKCTL)</description>
|
|
<addressOffset>0x00</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SUCLK</name>
|
|
<description>Stop the USB clock</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>SHCLK</name>
|
|
<description>Stop HCLK</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral>
|
|
|
|
<peripheral>
|
|
<name>WWDGT</name>
|
|
<description>Window watchdog timer</description>
|
|
<groupName>WWDGT</groupName>
|
|
<baseAddress>0x40002C00</baseAddress>
|
|
<addressBlock>
|
|
<offset>0x0</offset>
|
|
<size>0x400</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<interrupt>
|
|
<name>WWDGT</name>
|
|
<value>0</value>
|
|
</interrupt>
|
|
<registers>
|
|
<register>
|
|
<name>CTL</name>
|
|
<displayName>CTL</displayName>
|
|
<description>Control register</description>
|
|
<addressOffset>0x0</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000007F</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>WDGTEN</name>
|
|
<description>Activation bit</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>CNT</name>
|
|
<description>7-bit counter</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>7</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CFG</name>
|
|
<displayName>CFG</displayName>
|
|
<description>Configuration register</description>
|
|
<addressOffset>0x04</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000007F</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EWIE</name>
|
|
<description>Early wakeup interrupt</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>PSC</name>
|
|
<description>Prescaler</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
</field>
|
|
<field>
|
|
<name>WIN</name>
|
|
<description>7-bit window value</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>7</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>STAT</name>
|
|
<displayName>STAT</displayName>
|
|
<description>Status register</description>
|
|
<addressOffset>0x08</addressOffset>
|
|
<size>0x20</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EWIF</name>
|
|
<description>Early wakeup interrupt
|
|
flag</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral>
|
|
</peripherals>
|
|
</device>
|