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RMUL2025/lib/cmsis_svd/data/Allwinner-Community/D1-H.svd

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<?xml version="1.0" encoding="utf-8"?>
<device schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="CMSIS-SVD.xsd">
<vendor>Allwinner</vendor>
<name>D1H</name>
<version>1.0</version>
<description>Allwinner's D1-H chip unofficial SVD file maintained by community</description>
<addressUnitBits>8</addressUnitBits>
<width>32</width>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<resetMask>0xFFFFFFFF</resetMask>
<peripherals>
<peripheral>
<name>CCU</name>
<description>Clock Controller Unit</description>
<groupName>System</groupName>
<baseAddress>0x02001000</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x10000</size>
<usage>registers</usage>
</addressBlock>
<registers>
<register>
<name>PLL_CPU_CTRL</name>
<description>PLL_CPU Control Register</description>
<addressOffset>0x0000</addressOffset>
<fields>
<field>
<name>PLL_EN</name>
<description>PLL Enable</description>
<bitRange>[31:31]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PLL_LDO_EN</name>
<description>LDO Enable</description>
<bitRange>[30:30]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LOCK_ENABLE</name>
<description>Lock Enable</description>
<bitRange>[29:29]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LOCK</name>
<description>PLL Lock Status</description>
<bitRange>[28:28]</bitRange>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>unlocked</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>locked</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PLL_OUTPUT_GATE</name>
<description>PLL Output Gating Enable</description>
<bitRange>[27:27]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PLL_LOCK_TIME</name>
<description>PLL Lock Time</description>
<bitRange>[26:24]</bitRange>
</field>
<field>
<name>PLL_N</name>
<description>PLL N</description>
<bitRange>[15:8]</bitRange>
</field>
<field>
<name>PLL_UNLOCK_MDSEL</name>
<description>PLL Unlock Level</description>
<bitRange>[7:6]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>CC_21_29</name>
<value>0b00</value>
</enumeratedValue>
<enumeratedValue>
<name>CC_22_28</name>
<value>0b01</value>
</enumeratedValue>
<enumeratedValue>
<name>CC_20_30</name>
<value>0b1x</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PLL_LOCK_MDSEL</name>
<description>PLL Lock Level</description>
<bitRange>[5:5]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>CC_24_26</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>CC_23_27</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PLL_M</name>
<description>PLL M</description>
<bitRange>[1:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>PLL_DDR_CTRL</name>
<description>PLL_DDR Control Register</description>
<addressOffset>0x0010</addressOffset>
<fields>
<field>
<name>PLL_EN</name>
<description>PLL Enable</description>
<bitRange>[31:31]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PLL_LDO_EN</name>
<description>LDO Enable</description>
<bitRange>[30:30]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LOCK_ENABLE</name>
<description>Lock Enable</description>
<bitRange>[29:29]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LOCK</name>
<description>PLL Lock Status</description>
<bitRange>[28:28]</bitRange>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>unlocked</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>locked</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PLL_OUTPUT_GATE</name>
<description>PLL Output Gating Enable</description>
<bitRange>[27:27]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PLL_SDM_EN</name>
<description>PLL SDM Enable</description>
<bitRange>[24:24]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PLL_N</name>
<description>PLL N</description>
<bitRange>[15:8]</bitRange>
</field>
<field>
<name>PLL_UNLOCK_MDSEL</name>
<description>PLL Unlock Level</description>
<bitRange>[7:6]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>CC_21_29</name>
<value>0b00</value>
</enumeratedValue>
<enumeratedValue>
<name>CC_22_28</name>
<value>0b01</value>
</enumeratedValue>
<enumeratedValue>
<name>CC_20_30</name>
<value>0b1x</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PLL_LOCK_MDSEL</name>
<description>PLL Lock Level</description>
<bitRange>[5:5]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>CC_24_26</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>CC_23_27</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PLL_INPUT_DIV2</name>
<description>PLL Input Div M1</description>
<bitRange>[1:1]</bitRange>
</field>
<field>
<name>PLL_OUTPUT_DIV2</name>
<description>PLL Output Div M0</description>
<bitRange>[0:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>PLL_PERI_CTRL</name>
<description>PLL_PERI Control Register</description>
<addressOffset>0x0020</addressOffset>
<fields>
<field>
<name>PLL_EN</name>
<description>PLL Enable</description>
<bitRange>[31:31]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PLL_LDO_EN</name>
<description>LDO Enable</description>
<bitRange>[30:30]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LOCK_ENABLE</name>
<description>Lock Enable</description>
<bitRange>[29:29]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LOCK</name>
<description>PLL Lock Status</description>
<bitRange>[28:28]</bitRange>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>unlocked</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>locked</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PLL_OUTPUT_GATE</name>
<description>PLL Output Gating Enable</description>
<bitRange>[27:27]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PLL_SDM_EN</name>
<description>PLL SDM Enable</description>
<bitRange>[24:24]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PLL_P1</name>
<description>PLL Output Div P1</description>
<bitRange>[22:20]</bitRange>
</field>
<field>
<name>PLL_P0</name>
<description>PLL Output Div P0</description>
<bitRange>[18:16]</bitRange>
</field>
<field>
<name>PLL_N</name>
<description>PLL N</description>
<bitRange>[15:8]</bitRange>
</field>
<field>
<name>PLL_UNLOCK_MDSEL</name>
<description>PLL Unlock Level</description>
<bitRange>[7:6]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>CC_21_29</name>
<value>0b00</value>
</enumeratedValue>
<enumeratedValue>
<name>CC_22_28</name>
<value>0b01</value>
</enumeratedValue>
<enumeratedValue>
<name>CC_20_30</name>
<value>0b1x</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PLL_LOCK_MDSEL</name>
<description>PLL Lock Level</description>
<bitRange>[5:5]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>CC_24_26</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>CC_23_27</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PLL_INPUT_DIV2</name>
<description>PLL Input Div M</description>
<bitRange>[1:1]</bitRange>
</field>
</fields>
</register>
<register>
<name>PLL_VIDEO0_CTRL</name>
<description>PLL_VIDEO0 Control Register</description>
<addressOffset>0x0040</addressOffset>
<fields>
<field>
<name>PLL_EN</name>
<description>PLL Enable</description>
<bitRange>[31:31]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PLL_LDO_EN</name>
<description>LDO Enable</description>
<bitRange>[30:30]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LOCK_ENABLE</name>
<description>Lock Enable</description>
<bitRange>[29:29]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LOCK</name>
<description>PLL Lock Status</description>
<bitRange>[28:28]</bitRange>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>unlocked</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>locked</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PLL_OUTPUT_GATE</name>
<description>PLL Output Gating Enable</description>
<bitRange>[27:27]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PLL_SDM_EN</name>
<description>PLL SDM Enable</description>
<bitRange>[24:24]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PLL_N</name>
<description>PLL N</description>
<bitRange>[15:8]</bitRange>
</field>
<field>
<name>PLL_UNLOCK_MDSEL</name>
<description>PLL Unlock Level</description>
<bitRange>[7:6]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>CC_21_29</name>
<value>0b00</value>
</enumeratedValue>
<enumeratedValue>
<name>CC_22_28</name>
<value>0b01</value>
</enumeratedValue>
<enumeratedValue>
<name>CC_20_30</name>
<value>0b1x</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PLL_LOCK_MDSEL</name>
<description>PLL Lock Level</description>
<bitRange>[5:5]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>CC_24_26</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>CC_23_27</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PLL_INPUT_DIV2</name>
<description>PLL Input Div M</description>
<bitRange>[1:1]</bitRange>
</field>
<field>
<name>PLL_OUTPUT_DIV2</name>
<description>PLL Output Div D</description>
<bitRange>[0:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>PLL_VIDEO1_CTRL</name>
<description>PLL_VIDEO1 Control Register</description>
<addressOffset>0x0048</addressOffset>
<fields>
<field>
<name>PLL_EN</name>
<description>PLL Enable</description>
<bitRange>[31:31]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PLL_LDO_EN</name>
<description>LDO Enable</description>
<bitRange>[30:30]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LOCK_ENABLE</name>
<description>Lock Enable</description>
<bitRange>[29:29]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LOCK</name>
<description>PLL Lock Status</description>
<bitRange>[28:28]</bitRange>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>unlocked</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>locked</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PLL_OUTPUT_GATE</name>
<description>PLL Output Gating Enable</description>
<bitRange>[27:27]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PLL_SDM_EN</name>
<description>PLL SDM Enable</description>
<bitRange>[24:24]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PLL_N</name>
<description>PLL N</description>
<bitRange>[15:8]</bitRange>
</field>
<field>
<name>PLL_UNLOCK_MDSEL</name>
<description>PLL Unlock Level</description>
<bitRange>[7:6]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>CC_21_29</name>
<value>0b00</value>
</enumeratedValue>
<enumeratedValue>
<name>CC_22_28</name>
<value>0b01</value>
</enumeratedValue>
<enumeratedValue>
<name>CC_20_30</name>
<value>0b1x</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PLL_LOCK_MDSEL</name>
<description>PLL Lock Level</description>
<bitRange>[5:5]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>CC_24_26</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>CC_23_27</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PLL_INPUT_DIV2</name>
<description>PLL Input Div M</description>
<bitRange>[1:1]</bitRange>
</field>
<field>
<name>PLL_OUTPUT_DIV2</name>
<description>PLL Output Div D</description>
<bitRange>[0:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>PLL_VE_CTRL</name>
<description>PLL_VE Control Register</description>
<addressOffset>0x0058</addressOffset>
<fields>
<field>
<name>PLL_EN</name>
<description>PLL Enable</description>
<bitRange>[31:31]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PLL_LDO_EN</name>
<description>LDO Enable</description>
<bitRange>[30:30]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LOCK_ENABLE</name>
<description>Lock Enable</description>
<bitRange>[29:29]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LOCK</name>
<description>PLL Lock Status</description>
<bitRange>[28:28]</bitRange>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>unlocked</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>locked</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PLL_OUTPUT_GATE</name>
<description>PLL Output Gating Enable</description>
<bitRange>[27:27]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PLL_SDM_EN</name>
<description>PLL SDM Enable</description>
<bitRange>[24:24]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PLL_N</name>
<description>PLL N</description>
<bitRange>[15:8]</bitRange>
</field>
<field>
<name>PLL_UNLOCK_MDSEL</name>
<description>PLL Unlock Level</description>
<bitRange>[7:6]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>CC_21_29</name>
<value>0b00</value>
</enumeratedValue>
<enumeratedValue>
<name>CC_22_28</name>
<value>0b01</value>
</enumeratedValue>
<enumeratedValue>
<name>CC_20_30</name>
<value>0b1x</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PLL_LOCK_MDSEL</name>
<description>PLL Lock Level</description>
<bitRange>[5:5]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>CC_24_26</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>CC_23_27</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PLL_INPUT_DIV2</name>
<description>PLL Input Div M1</description>
<bitRange>[1:1]</bitRange>
</field>
<field>
<name>PLL_OUTPUT_DIV2</name>
<description>PLL Output Div M0</description>
<bitRange>[0:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>PLL_AUDIO0_CTRL</name>
<description>PLL_AUDIO0 Control Register</description>
<addressOffset>0x0078</addressOffset>
<fields>
<field>
<name>PLL_EN</name>
<description>PLL Enable</description>
<bitRange>[31:31]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PLL_LDO_EN</name>
<description>LDO Enable</description>
<bitRange>[30:30]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LOCK_ENABLE</name>
<description>Lock Enable</description>
<bitRange>[29:29]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LOCK</name>
<description>PLL Lock Status</description>
<bitRange>[28:28]</bitRange>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>unlocked</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>locked</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PLL_OUTPUT_GATE</name>
<description>PLL Output Gating Enable</description>
<bitRange>[27:27]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PLL_SDM_EN</name>
<description>PLL SDM Enable</description>
<bitRange>[24:24]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PLL_P</name>
<description>PLL Post-div P</description>
<bitRange>[21:16]</bitRange>
</field>
<field>
<name>PLL_N</name>
<description>PLL N</description>
<bitRange>[15:8]</bitRange>
</field>
<field>
<name>PLL_UNLOCK_MDSEL</name>
<description>PLL Unlock Level</description>
<bitRange>[7:6]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>CC_21_29</name>
<value>0b00</value>
</enumeratedValue>
<enumeratedValue>
<name>CC_22_28</name>
<value>0b01</value>
</enumeratedValue>
<enumeratedValue>
<name>CC_20_30</name>
<value>0b1x</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PLL_LOCK_MDSEL</name>
<description>PLL Lock Level</description>
<bitRange>[5:5]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>CC_24_26</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>CC_23_27</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PLL_INPUT_DIV2</name>
<description>PLL Input Div M1</description>
<bitRange>[1:1]</bitRange>
</field>
<field>
<name>PLL_OUTPUT_DIV2</name>
<description>PLL Output Div M0</description>
<bitRange>[0:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>PLL_AUDIO1_CTRL</name>
<description>PLL_AUDIO1 Control Register</description>
<addressOffset>0x0080</addressOffset>
<fields>
<field>
<name>PLL_EN</name>
<description>PLL Enable</description>
<bitRange>[31:31]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PLL_LDO_EN</name>
<description>LDO Enable</description>
<bitRange>[30:30]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LOCK_ENABLE</name>
<description>Lock Enable</description>
<bitRange>[29:29]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LOCK</name>
<description>PLL Lock Status</description>
<bitRange>[28:28]</bitRange>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>unlocked</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>locked</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PLL_OUTPUT_GATE</name>
<description>PLL Output Gating Enable</description>
<bitRange>[27:27]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PLL_SDM_EN</name>
<description>PLL SDM Enable</description>
<bitRange>[24:24]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PLL_P1</name>
<description>PLL Output Div P1</description>
<bitRange>[22:20]</bitRange>
</field>
<field>
<name>PLL_P0</name>
<description>PLL Output Div P0</description>
<bitRange>[18:16]</bitRange>
</field>
<field>
<name>PLL_N</name>
<description>PLL N</description>
<bitRange>[15:8]</bitRange>
</field>
<field>
<name>PLL_UNLOCK_MDSEL</name>
<description>PLL Unlock Level</description>
<bitRange>[7:6]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>CC_21_29</name>
<value>0b00</value>
</enumeratedValue>
<enumeratedValue>
<name>CC_22_28</name>
<value>0b01</value>
</enumeratedValue>
<enumeratedValue>
<name>CC_20_30</name>
<value>0b1x</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PLL_LOCK_MDSEL</name>
<description>PLL Lock Level</description>
<bitRange>[5:5]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>CC_24_26</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>CC_23_27</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PLL_INPUT_DIV2</name>
<description>PLL Input Div M</description>
<bitRange>[1:1]</bitRange>
</field>
</fields>
</register>
<register>
<name>PLL_DDR_PAT0_CTRL</name>
<description>PLL_DDR Pattern0 Control Register</description>
<addressOffset>0x0110</addressOffset>
<fields>
<field>
<name>SIG_DELT_PAT_EN</name>
<description>Sigma-Delta Pattern Enable</description>
<bitRange>[31:31]</bitRange>
</field>
<field>
<name>SPR_FREQ_MODE</name>
<description>Spread Frequency Mode</description>
<bitRange>[30:29]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>DC0</name>
<value>0b00</value>
</enumeratedValue>
<enumeratedValue>
<name>DC1</name>
<value>0b01</value>
</enumeratedValue>
<enumeratedValue>
<name>Triangular_1</name>
<value>0b10</value>
</enumeratedValue>
<enumeratedValue>
<name>Triangular_n</name>
<value>0b11</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>WAVE_STEP</name>
<description>Wave Step</description>
<bitRange>[28:20]</bitRange>
</field>
<field>
<name>SDM_CLK_SEL</name>
<description>SDM Clock Select</description>
<bitRange>[19:19]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>F_24_M</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>F_12_M</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>FREQ</name>
<description>Frequency</description>
<bitRange>[18:17]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>F_31_5_k</name>
<value>0b00</value>
</enumeratedValue>
<enumeratedValue>
<name>F_32_k</name>
<value>0b01</value>
</enumeratedValue>
<enumeratedValue>
<name>F_32_5_k</name>
<value>0b10</value>
</enumeratedValue>
<enumeratedValue>
<name>F_33_k</name>
<value>0b11</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>WAVE_BOT</name>
<description>Wave Bottom</description>
<bitRange>[16:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>PLL_DDR_PAT1_CTRL</name>
<description>PLL_DDR Pattern1 Control Register</description>
<addressOffset>0x0114</addressOffset>
<fields>
<field>
<name>DITHER_EN</name>
<description>Dither Enable</description>
<bitRange>[24:24]</bitRange>
</field>
<field>
<name>FRAC_EN</name>
<description>Fraction Enable</description>
<bitRange>[20:20]</bitRange>
</field>
<field>
<name>FRAC_IN</name>
<description>Fraction In</description>
<bitRange>[16:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>PLL_PERI_PAT0_CTRL</name>
<description>PLL_PERI Pattern0 Control Register</description>
<addressOffset>0x0120</addressOffset>
<fields>
<field>
<name>SIG_DELT_PAT_EN</name>
<description>Sigma-Delta Pattern Enable</description>
<bitRange>[31:31]</bitRange>
</field>
<field>
<name>SPR_FREQ_MODE</name>
<description>Spread Frequency Mode</description>
<bitRange>[30:29]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>DC0</name>
<value>0b00</value>
</enumeratedValue>
<enumeratedValue>
<name>DC1</name>
<value>0b01</value>
</enumeratedValue>
<enumeratedValue>
<name>Triangular_1</name>
<value>0b10</value>
</enumeratedValue>
<enumeratedValue>
<name>Triangular_n</name>
<value>0b11</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>WAVE_STEP</name>
<description>Wave Step</description>
<bitRange>[28:20]</bitRange>
</field>
<field>
<name>SDM_CLK_SEL</name>
<description>SDM Clock Select</description>
<bitRange>[19:19]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>F_24_M</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>F_12_M</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>FREQ</name>
<description>Frequency</description>
<bitRange>[18:17]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>F_31_5_k</name>
<value>0b00</value>
</enumeratedValue>
<enumeratedValue>
<name>F_32_k</name>
<value>0b01</value>
</enumeratedValue>
<enumeratedValue>
<name>F_32_5_k</name>
<value>0b10</value>
</enumeratedValue>
<enumeratedValue>
<name>F_33_k</name>
<value>0b11</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>WAVE_BOT</name>
<description>Wave Bottom</description>
<bitRange>[16:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>PLL_PERI_PAT1_CTRL</name>
<description>PLL_PERI Pattern1 Control Register</description>
<addressOffset>0x0124</addressOffset>
<fields>
<field>
<name>DITHER_EN</name>
<description>Dither Enable</description>
<bitRange>[24:24]</bitRange>
</field>
<field>
<name>FRAC_EN</name>
<description>Fraction Enable</description>
<bitRange>[20:20]</bitRange>
</field>
<field>
<name>FRAC_IN</name>
<description>Fraction In</description>
<bitRange>[16:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>PLL_VIDEO0_PAT0_CTRL</name>
<description>PLL_VIDEO0 Pattern0 Control Register</description>
<addressOffset>0x0140</addressOffset>
<fields>
<field>
<name>SIG_DELT_PAT_EN</name>
<description>Sigma-Delta Pattern Enable</description>
<bitRange>[31:31]</bitRange>
</field>
<field>
<name>SPR_FREQ_MODE</name>
<description>Spread Frequency Mode</description>
<bitRange>[30:29]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>DC0</name>
<value>0b00</value>
</enumeratedValue>
<enumeratedValue>
<name>DC1</name>
<value>0b01</value>
</enumeratedValue>
<enumeratedValue>
<name>Triangular_1</name>
<value>0b10</value>
</enumeratedValue>
<enumeratedValue>
<name>Triangular_n</name>
<value>0b11</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>WAVE_STEP</name>
<description>Wave Step</description>
<bitRange>[28:20]</bitRange>
</field>
<field>
<name>SDM_CLK_SEL</name>
<description>SDM Clock Select</description>
<bitRange>[19:19]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>F_24_M</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>F_12_M</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>FREQ</name>
<description>Frequency</description>
<bitRange>[18:17]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>F_31_5_k</name>
<value>0b00</value>
</enumeratedValue>
<enumeratedValue>
<name>F_32_k</name>
<value>0b01</value>
</enumeratedValue>
<enumeratedValue>
<name>F_32_5_k</name>
<value>0b10</value>
</enumeratedValue>
<enumeratedValue>
<name>F_33_k</name>
<value>0b11</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>WAVE_BOT</name>
<description>Wave Bottom</description>
<bitRange>[16:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>PLL_VIDEO0_PAT1_CTRL</name>
<description>PLL_VIDEO0 Pattern1 Control Register</description>
<addressOffset>0x0144</addressOffset>
<fields>
<field>
<name>DITHER_EN</name>
<description>Dither Enable</description>
<bitRange>[24:24]</bitRange>
</field>
<field>
<name>FRAC_EN</name>
<description>Fraction Enable</description>
<bitRange>[20:20]</bitRange>
</field>
<field>
<name>FRAC_IN</name>
<description>Fraction In</description>
<bitRange>[16:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>PLL_VIDEO1_PAT0_CTRL</name>
<description>PLL_VIDEO1 Pattern0 Control Register</description>
<addressOffset>0x0148</addressOffset>
<fields>
<field>
<name>SIG_DELT_PAT_EN</name>
<description>Sigma-Delta Pattern Enable</description>
<bitRange>[31:31]</bitRange>
</field>
<field>
<name>SPR_FREQ_MODE</name>
<description>Spread Frequency Mode</description>
<bitRange>[30:29]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>DC0</name>
<value>0b00</value>
</enumeratedValue>
<enumeratedValue>
<name>DC1</name>
<value>0b01</value>
</enumeratedValue>
<enumeratedValue>
<name>Triangular_1</name>
<value>0b10</value>
</enumeratedValue>
<enumeratedValue>
<name>Triangular_n</name>
<value>0b11</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>WAVE_STEP</name>
<description>Wave Step</description>
<bitRange>[28:20]</bitRange>
</field>
<field>
<name>SDM_CLK_SEL</name>
<description>SDM Clock Select</description>
<bitRange>[19:19]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>F_24_M</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>F_12_M</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>FREQ</name>
<description>Frequency</description>
<bitRange>[18:17]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>F_31_5_k</name>
<value>0b00</value>
</enumeratedValue>
<enumeratedValue>
<name>F_32_k</name>
<value>0b01</value>
</enumeratedValue>
<enumeratedValue>
<name>F_32_5_k</name>
<value>0b10</value>
</enumeratedValue>
<enumeratedValue>
<name>F_33_k</name>
<value>0b11</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>WAVE_BOT</name>
<description>Wave Bottom</description>
<bitRange>[16:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>PLL_VIDEO1_PAT1_CTRL</name>
<description>PLL_VIDEO1 Pattern1 Control Register</description>
<addressOffset>0x014C</addressOffset>
<fields>
<field>
<name>DITHER_EN</name>
<description>Dither Enable</description>
<bitRange>[24:24]</bitRange>
</field>
<field>
<name>FRAC_EN</name>
<description>Fraction Enable</description>
<bitRange>[20:20]</bitRange>
</field>
<field>
<name>FRAC_IN</name>
<description>Fraction In</description>
<bitRange>[16:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>PLL_VE_PAT0_CTRL</name>
<description>PLL_VE Pattern0 Control Register</description>
<addressOffset>0x0158</addressOffset>
<fields>
<field>
<name>SIG_DELT_PAT_EN</name>
<description>Sigma-Delta Pattern Enable</description>
<bitRange>[31:31]</bitRange>
</field>
<field>
<name>SPR_FREQ_MODE</name>
<description>Spread Frequency Mode</description>
<bitRange>[30:29]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>DC0</name>
<value>0b00</value>
</enumeratedValue>
<enumeratedValue>
<name>DC1</name>
<value>0b01</value>
</enumeratedValue>
<enumeratedValue>
<name>Triangular_1</name>
<value>0b10</value>
</enumeratedValue>
<enumeratedValue>
<name>Triangular_n</name>
<value>0b11</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>WAVE_STEP</name>
<description>Wave Step</description>
<bitRange>[28:20]</bitRange>
</field>
<field>
<name>SDM_CLK_SEL</name>
<description>SDM Clock Select</description>
<bitRange>[19:19]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>F_24_M</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>F_12_M</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>FREQ</name>
<description>Frequency</description>
<bitRange>[18:17]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>F_31_5_k</name>
<value>0b00</value>
</enumeratedValue>
<enumeratedValue>
<name>F_32_k</name>
<value>0b01</value>
</enumeratedValue>
<enumeratedValue>
<name>F_32_5_k</name>
<value>0b10</value>
</enumeratedValue>
<enumeratedValue>
<name>F_33_k</name>
<value>0b11</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>WAVE_BOT</name>
<description>Wave Bottom</description>
<bitRange>[16:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>PLL_VE_PAT1_CTRL</name>
<description>PLL_VE Pattern1 Control Register</description>
<addressOffset>0x015C</addressOffset>
<fields>
<field>
<name>DITHER_EN</name>
<description>Dither Enable</description>
<bitRange>[24:24]</bitRange>
</field>
<field>
<name>FRAC_EN</name>
<description>Fraction Enable</description>
<bitRange>[20:20]</bitRange>
</field>
<field>
<name>FRAC_IN</name>
<description>Fraction In</description>
<bitRange>[16:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>PLL_AUDIO0_PAT0_CTRL</name>
<description>PLL_AUDIO0 Pattern0 Control Register</description>
<addressOffset>0x0178</addressOffset>
<fields>
<field>
<name>SIG_DELT_PAT_EN</name>
<description>Sigma-Delta Pattern Enable</description>
<bitRange>[31:31]</bitRange>
</field>
<field>
<name>SPR_FREQ_MODE</name>
<description>Spread Frequency Mode</description>
<bitRange>[30:29]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>DC0</name>
<value>0b00</value>
</enumeratedValue>
<enumeratedValue>
<name>DC1</name>
<value>0b01</value>
</enumeratedValue>
<enumeratedValue>
<name>Triangular_1</name>
<value>0b10</value>
</enumeratedValue>
<enumeratedValue>
<name>Triangular_n</name>
<value>0b11</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>WAVE_STEP</name>
<description>Wave Step</description>
<bitRange>[28:20]</bitRange>
</field>
<field>
<name>SDM_CLK_SEL</name>
<description>SDM Clock Select</description>
<bitRange>[19:19]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>F_24_M</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>F_12_M</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>FREQ</name>
<description>Frequency</description>
<bitRange>[18:17]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>F_31_5_k</name>
<value>0b00</value>
</enumeratedValue>
<enumeratedValue>
<name>F_32_k</name>
<value>0b01</value>
</enumeratedValue>
<enumeratedValue>
<name>F_32_5_k</name>
<value>0b10</value>
</enumeratedValue>
<enumeratedValue>
<name>F_33_k</name>
<value>0b11</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>WAVE_BOT</name>
<description>Wave Bottom</description>
<bitRange>[16:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>PLL_AUDIO0_PAT1_CTRL</name>
<description>PLL_AUDIO0 Pattern1 Control Register</description>
<addressOffset>0x017C</addressOffset>
<fields>
<field>
<name>DITHER_EN</name>
<description>Dither Enable</description>
<bitRange>[24:24]</bitRange>
</field>
<field>
<name>FRAC_EN</name>
<description>Fraction Enable</description>
<bitRange>[20:20]</bitRange>
</field>
<field>
<name>FRAC_IN</name>
<description>Fraction In</description>
<bitRange>[16:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>PLL_AUDIO1_PAT0_CTRL</name>
<description>PLL_AUDIO1 Pattern0 Control Register</description>
<addressOffset>0x0180</addressOffset>
<fields>
<field>
<name>SIG_DELT_PAT_EN</name>
<description>Sigma-Delta Pattern Enable</description>
<bitRange>[31:31]</bitRange>
</field>
<field>
<name>SPR_FREQ_MODE</name>
<description>Spread Frequency Mode</description>
<bitRange>[30:29]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>DC0</name>
<value>0b00</value>
</enumeratedValue>
<enumeratedValue>
<name>DC1</name>
<value>0b01</value>
</enumeratedValue>
<enumeratedValue>
<name>Triangular_1</name>
<value>0b10</value>
</enumeratedValue>
<enumeratedValue>
<name>Triangular_n</name>
<value>0b11</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>WAVE_STEP</name>
<description>Wave Step</description>
<bitRange>[28:20]</bitRange>
</field>
<field>
<name>SDM_CLK_SEL</name>
<description>SDM Clock Select</description>
<bitRange>[19:19]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>F_24_M</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>F_12_M</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>FREQ</name>
<description>Frequency</description>
<bitRange>[18:17]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>F_31_5_k</name>
<value>0b00</value>
</enumeratedValue>
<enumeratedValue>
<name>F_32_k</name>
<value>0b01</value>
</enumeratedValue>
<enumeratedValue>
<name>F_32_5_k</name>
<value>0b10</value>
</enumeratedValue>
<enumeratedValue>
<name>F_33_k</name>
<value>0b11</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>WAVE_BOT</name>
<description>Wave Bottom</description>
<bitRange>[16:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>PLL_AUDIO1_PAT1_CTRL</name>
<description>PLL_AUDIO1 Pattern1 Control Register</description>
<addressOffset>0x0184</addressOffset>
<fields>
<field>
<name>DITHER_EN</name>
<description>Dither Enable</description>
<bitRange>[24:24]</bitRange>
</field>
<field>
<name>FRAC_EN</name>
<description>Fraction Enable</description>
<bitRange>[20:20]</bitRange>
</field>
<field>
<name>FRAC_IN</name>
<description>Fraction In</description>
<bitRange>[16:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>PLL_CPU_BIAS</name>
<description>PLL_CPU Bias Register</description>
<addressOffset>0x0300</addressOffset>
<fields>
<field>
<name>PLL_VCO_RST_IN</name>
<description>VCO reset in</description>
<bitRange>[31:31]</bitRange>
</field>
<field>
<name>PLL_CP</name>
<description>PLL current bias control</description>
<bitRange>[20:16]</bitRange>
</field>
</fields>
</register>
<register>
<name>PLL_DDR_BIAS</name>
<description>PLL_DDR Bias Register</description>
<addressOffset>0x0310</addressOffset>
<fields>
<field>
<name>PLL_CP</name>
<description>PLL current bias control</description>
<bitRange>[20:16]</bitRange>
</field>
</fields>
</register>
<register>
<name>PLL_PERI_BIAS</name>
<description>PLL_PERI Bias Register</description>
<addressOffset>0x0320</addressOffset>
<fields>
<field>
<name>PLL_CP</name>
<description>PLL current bias control</description>
<bitRange>[20:16]</bitRange>
</field>
</fields>
</register>
<register>
<name>PLL_VIDEO0_BIAS</name>
<description>PLL_VIDEO0 Bias Register</description>
<addressOffset>0x0340</addressOffset>
<fields>
<field>
<name>PLL_CP</name>
<description>PLL current bias control</description>
<bitRange>[20:16]</bitRange>
</field>
</fields>
</register>
<register>
<name>PLL_VIDEO1_BIAS</name>
<description>PLL_VIDEO1 Bias Register</description>
<addressOffset>0x0348</addressOffset>
<fields>
<field>
<name>PLL_CP</name>
<description>PLL current bias control</description>
<bitRange>[20:16]</bitRange>
</field>
</fields>
</register>
<register>
<name>PLL_VE_BIAS</name>
<description>PLL_VE Bias Register</description>
<addressOffset>0x0358</addressOffset>
<fields>
<field>
<name>PLL_CP</name>
<description>PLL current bias control</description>
<bitRange>[20:16]</bitRange>
</field>
</fields>
</register>
<register>
<name>PLL_AUDIO0_BIAS</name>
<description>PLL_AUDIO0 Bias Register</description>
<addressOffset>0x0378</addressOffset>
<fields>
<field>
<name>PLL_CP</name>
<description>PLL current bias control</description>
<bitRange>[20:16]</bitRange>
</field>
</fields>
</register>
<register>
<name>PLL_AUDIO1_BIAS</name>
<description>PLL_AUDIO1 Bias Register</description>
<addressOffset>0x0380</addressOffset>
<fields>
<field>
<name>PLL_CP</name>
<description>PLL current bias control</description>
<bitRange>[20:16]</bitRange>
</field>
</fields>
</register>
<register>
<name>PLL_CPU_TUN</name>
<description>PLL_CPU Tuning Register</description>
<addressOffset>0x0400</addressOffset>
<fields>
<field>
<name>PLL_VCO</name>
<description>VCO range control</description>
<bitRange>[30:28]</bitRange>
</field>
<field>
<name>PLL_VCO_GAIN</name>
<description>KVCO gain control</description>
<bitRange>[26:24]</bitRange>
</field>
<field>
<name>PLL_CNT_INT</name>
<description>Counter initial control</description>
<bitRange>[22:16]</bitRange>
</field>
<field>
<name>PLL_REG_OD</name>
<description>PLL-REG-OD0 for verify</description>
<bitRange>[15:15]</bitRange>
</field>
<field>
<name>PLL_B_IN</name>
<description>PLL-B-IN [6:0] for verify</description>
<bitRange>[14:8]</bitRange>
</field>
<field>
<name>PLL_REG_OD1</name>
<description>PLL-REG-OD1 for verify</description>
<bitRange>[7:7]</bitRange>
</field>
<field>
<name>PLL_B_OUT</name>
<description>PLL-B-OUT [6:0] for verify</description>
<bitRange>[6:0]</bitRange>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>CPU_AXI_CFG</name>
<description>CPU_AXI Configuration Register</description>
<addressOffset>0x0500</addressOffset>
<fields>
<field>
<name>CPU_CLK_SEL</name>
<description>Clock Source Select</description>
<bitRange>[26:24]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>HOSC</name>
<value>0b000</value>
</enumeratedValue>
<enumeratedValue>
<name>CLK32K</name>
<value>0b001</value>
</enumeratedValue>
<enumeratedValue>
<name>CLK16M_RC</name>
<value>0b010</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_CPU_P</name>
<value>0b011</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_PERI_1X</name>
<value>0b100</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_PERI_2X</name>
<value>0b101</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_PERI_800M</name>
<value>0b110</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PLL_CPU_OUT_EXT_DIVP</name>
<description>PLL Output External Divider P</description>
<bitRange>[17:16]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>P1</name>
<value>0b00</value>
</enumeratedValue>
<enumeratedValue>
<name>P2</name>
<value>0b01</value>
</enumeratedValue>
<enumeratedValue>
<name>P4</name>
<value>0b10</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CPU_DIV2</name>
<description>Factor N</description>
<bitRange>[9:8]</bitRange>
</field>
<field>
<name>CPU_DIV1</name>
<description>Factor M</description>
<bitRange>[1:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>CPU_GATING</name>
<description>CPU_GATING Configuration Register</description>
<addressOffset>0x0504</addressOffset>
<fields>
<field>
<name>CPU_GATING</name>
<description>Gating Special Clock</description>
<bitRange>[31:31]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>OFF</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ON</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CPU_GATING_FIELD</name>
<description>CPU Gating Field</description>
<bitRange>[15:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>PSI_CLK</name>
<description>PSI Clock Register</description>
<addressOffset>0x0510</addressOffset>
<fields>
<field>
<name>CLK_SRC_SEL</name>
<description>Clock Source Select</description>
<bitRange>[25:24]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>HOSC</name>
<value>0b00</value>
</enumeratedValue>
<enumeratedValue>
<name>CLK32K</name>
<value>0b01</value>
</enumeratedValue>
<enumeratedValue>
<name>CLK16M_RC</name>
<value>0b10</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_PERI_1X</name>
<value>0b11</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>FACTOR_N</name>
<description>Factor N</description>
<bitRange>[9:8]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>N1</name>
<value>0b00</value>
</enumeratedValue>
<enumeratedValue>
<name>N2</name>
<value>0b01</value>
</enumeratedValue>
<enumeratedValue>
<name>N4</name>
<value>0b10</value>
</enumeratedValue>
<enumeratedValue>
<name>N8</name>
<value>0b11</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>FACTOR_M</name>
<description>Factor M</description>
<bitRange>[1:0]</bitRange>
</field>
</fields>
</register>
<register>
<dim>2</dim>
<dimIncrement>0x4</dimIncrement>
<name>APB%s_CLK</name>
<description>APB Clock Register</description>
<addressOffset>0x0520</addressOffset>
<fields>
<field>
<name>CLK_SRC_SEL</name>
<description>Clock Source Select</description>
<bitRange>[25:24]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>HOSC</name>
<value>0b00</value>
</enumeratedValue>
<enumeratedValue>
<name>CLK32K</name>
<value>0b01</value>
</enumeratedValue>
<enumeratedValue>
<name>PSI_CLK</name>
<value>0b10</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_PERI_1X</name>
<value>0b11</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>FACTOR_N</name>
<description>Factor N</description>
<bitRange>[9:8]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>N1</name>
<value>0b00</value>
</enumeratedValue>
<enumeratedValue>
<name>N2</name>
<value>0b01</value>
</enumeratedValue>
<enumeratedValue>
<name>N4</name>
<value>0b10</value>
</enumeratedValue>
<enumeratedValue>
<name>N8</name>
<value>0b11</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>FACTOR_M</name>
<description>Factor M</description>
<bitRange>[4:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>MBUS_CLK</name>
<description>MBUS Clock Register</description>
<addressOffset>0x0540</addressOffset>
<fields>
<field>
<name>MBUS_RST</name>
<description>MBUS Reset</description>
<bitRange>[30:30]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Assert</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Deassert</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>DE_CLK</name>
<description>DE Clock Register</description>
<addressOffset>0x0600</addressOffset>
<fields>
<field>
<name>CLK_GATING</name>
<description>Gating Clock</description>
<bitRange>[31:31]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>OFF</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ON</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CLK_SRC_SEL</name>
<description>Clock Source Select</description>
<bitRange>[26:24]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>PLL_PERI_2X</name>
<value>0b000</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_VIDEO0_4X</name>
<value>0b001</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_VIDEO1_4X</name>
<value>0b010</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_AUDIO1_DIV2</name>
<value>0b011</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>FACTOR_M</name>
<description>Factor M</description>
<bitRange>[4:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>DE_BGR</name>
<description>DE Bus Gating Reset Register</description>
<addressOffset>0x060C</addressOffset>
<fields>
<field>
<name>RST</name>
<description>Reset</description>
<bitRange>[16:16]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Assert</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Deassert</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>GATING</name>
<description>Gating Clock</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Mask</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Pass</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>DI_CLK</name>
<description>DI Clock Register</description>
<addressOffset>0x0620</addressOffset>
<fields>
<field>
<name>CLK_GATING</name>
<description>Gating Clock</description>
<bitRange>[31:31]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>OFF</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ON</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CLK_SRC_SEL</name>
<description>Clock Source Select</description>
<bitRange>[26:24]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>PLL_PERI_2X</name>
<value>0b000</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_VIDEO0_4X</name>
<value>0b001</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_VIDEO1_4X</name>
<value>0b010</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_AUDIO1_DIV2</name>
<value>0b011</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>FACTOR_M</name>
<description>Factor M</description>
<bitRange>[4:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>DI_BGR</name>
<description>DI Bus Gating Reset Register</description>
<addressOffset>0x062C</addressOffset>
<fields>
<field>
<name>RST</name>
<description>Reset</description>
<bitRange>[16:16]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Assert</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Deassert</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>GATING</name>
<description>Gating Clock</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Mask</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Pass</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>G2D_CLK</name>
<description>G2D Clock Register</description>
<addressOffset>0x0630</addressOffset>
<fields>
<field>
<name>CLK_GATING</name>
<description>Gating Clock</description>
<bitRange>[31:31]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>OFF</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ON</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CLK_SRC_SEL</name>
<description>Clock Source Select</description>
<bitRange>[26:24]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>PLL_PERI_2X</name>
<value>0b000</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_VIDEO0_4X</name>
<value>0b001</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_VIDEO1_4X</name>
<value>0b010</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_AUDIO1_DIV2</name>
<value>0b011</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>FACTOR_M</name>
<description>Factor M</description>
<bitRange>[4:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>G2D_BGR</name>
<description>G2D Bus Gating Reset Register</description>
<addressOffset>0x063C</addressOffset>
<fields>
<field>
<name>RST</name>
<description>Reset</description>
<bitRange>[16:16]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Assert</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Deassert</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>GATING</name>
<description>Gating Clock</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Mask</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Pass</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>CE_CLK</name>
<description>CE Clock Register</description>
<addressOffset>0x0680</addressOffset>
<fields>
<field>
<name>CLK_GATING</name>
<description>Gating Clock</description>
<bitRange>[31:31]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>OFF</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ON</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CLK_SRC_SEL</name>
<description>Clock Source Select</description>
<bitRange>[26:24]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>HOSC</name>
<value>0b00</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_PERI_2X</name>
<value>0b01</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_PERI_1X</name>
<value>0b10</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>FACTOR_N</name>
<description>Factor N</description>
<bitRange>[9:8]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>N1</name>
<value>0b00</value>
</enumeratedValue>
<enumeratedValue>
<name>N2</name>
<value>0b01</value>
</enumeratedValue>
<enumeratedValue>
<name>N4</name>
<value>0b10</value>
</enumeratedValue>
<enumeratedValue>
<name>N8</name>
<value>0b11</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>FACTOR_M</name>
<description>Factor M</description>
<bitRange>[3:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>CE_BGR</name>
<description>CE Bus Gating Reset Register</description>
<addressOffset>0x068C</addressOffset>
<fields>
<field>
<name>RST</name>
<description>Reset</description>
<bitRange>[16:16]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Assert</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Deassert</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>GATING</name>
<description>Gating Clock</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Mask</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Pass</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>VE_CLK</name>
<description>VE Clock Register</description>
<addressOffset>0x0690</addressOffset>
<fields>
<field>
<name>CLK_GATING</name>
<description>Gating Clock</description>
<bitRange>[31:31]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>OFF</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ON</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CLK_SRC_SEL</name>
<description>Clock Source Select</description>
<bitRange>[24:24]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>VEPLL</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_PERI_2X</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>FACTOR_M</name>
<description>Factor M</description>
<bitRange>[4:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>VE_BGR</name>
<description>VE Bus Gating Reset Register</description>
<addressOffset>0x069C</addressOffset>
<fields>
<field>
<name>RST</name>
<description>Reset</description>
<bitRange>[16:16]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Assert</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Deassert</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>GATING</name>
<description>Gating Clock</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Mask</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Pass</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>DMA_BGR</name>
<description>DMA Bus Gating Reset Register</description>
<addressOffset>0x070C</addressOffset>
<fields>
<field>
<name>RST</name>
<description>Reset</description>
<bitRange>[16:16]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Assert</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Deassert</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>GATING</name>
<description>Gating Clock</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Mask</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Pass</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>MSGBOX_BGR</name>
<description>MSGBOX Bus Gating Reset Register</description>
<addressOffset>0x071C</addressOffset>
<fields>
<field>
<dim>3</dim>
<dimIncrement>1</dimIncrement>
<name>MSGBOX%s_RST</name>
<description>CPU, DSP, RISC-V MSGBOX Reset</description>
<bitRange>[16:16]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Assert</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Deassert</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<dim>3</dim>
<dimIncrement>1</dimIncrement>
<name>MSGBOX%s_GATING</name>
<description>Gating Clock for CPU, DSP, RISC-V MSGBOX</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Mask</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Pass</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>SPINLOCK_BGR</name>
<description>SPINLOCK Bus Gating Reset Register</description>
<addressOffset>0x072C</addressOffset>
<fields>
<field>
<name>RST</name>
<description>Reset</description>
<bitRange>[16:16]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Assert</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Deassert</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>GATING</name>
<description>Gating Clock</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Mask</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Pass</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>HSTIMER_BGR</name>
<description>HSTIMER Bus Gating Reset Register</description>
<addressOffset>0x073C</addressOffset>
<fields>
<field>
<name>RST</name>
<description>Reset</description>
<bitRange>[16:16]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Assert</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Deassert</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>GATING</name>
<description>Gating Clock</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Mask</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Pass</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>AVS_CLK</name>
<description>AVS Clock Register</description>
<addressOffset>0x0740</addressOffset>
<fields>
<field>
<name>CLK_GATING</name>
<description>Gating Clock</description>
<bitRange>[31:31]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>OFF</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ON</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>DBGSYS_BGR</name>
<description>DBGSYS Bus Gating Reset Register</description>
<addressOffset>0x078C</addressOffset>
<fields>
<field>
<name>RST</name>
<description>Reset</description>
<bitRange>[16:16]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Assert</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Deassert</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>GATING</name>
<description>Gating Clock</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Mask</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Pass</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>PWM_BGR</name>
<description>PWM Bus Gating Reset Register</description>
<addressOffset>0x07AC</addressOffset>
<fields>
<field>
<name>RST</name>
<description>Reset</description>
<bitRange>[16:16]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Assert</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Deassert</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>GATING</name>
<description>Gating Clock</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Mask</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Pass</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>IOMMU_BGR</name>
<description>IOMMU Bus Gating Reset Register</description>
<addressOffset>0x07BC</addressOffset>
<fields>
<field>
<name>GATING</name>
<description>Gating Clock</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Mask</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Pass</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>DRAM_CLK</name>
<description>DRAM Clock Register</description>
<addressOffset>0x0800</addressOffset>
<fields>
<field>
<name>CLK_GATING</name>
<description>Gating Clock</description>
<bitRange>[31:31]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>OFF</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ON</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SDRCLK_UPD</name>
<description>SDRCLK Configuration 0 Update</description>
<bitRange>[27:27]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>invalid</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>valid</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CLK_SRC_SEL</name>
<description>Clock Source Select</description>
<bitRange>[26:24]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>PLL_DDR</name>
<value>0b00</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_AUDIO1_DIV2</name>
<value>0b01</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_PERI_2X</name>
<value>0b10</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_PERI_800M</name>
<value>0b11</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DRAM_DIV2</name>
<description>Factor N</description>
<bitRange>[9:8]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>N1</name>
<value>0b00</value>
</enumeratedValue>
<enumeratedValue>
<name>N2</name>
<value>0b01</value>
</enumeratedValue>
<enumeratedValue>
<name>N4</name>
<value>0b10</value>
</enumeratedValue>
<enumeratedValue>
<name>N8</name>
<value>0b11</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DRAM_DIV1</name>
<description>Factor M</description>
<bitRange>[1:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>MBUS_MAT_CLK_GATING</name>
<description>MBUS Master Clock Gating Register</description>
<addressOffset>0x0804</addressOffset>
<fields>
<field>
<name>RISCV_MCLK_EN</name>
<description>Gating MBUS Clock</description>
<bitRange>[11:11]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Mask</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Pass</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>G2D_MCLK_EN</name>
<description>Gating MBUS Clock</description>
<bitRange>[10:10]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Mask</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Pass</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CSI_MCLK_EN</name>
<description>Gating MBUS Clock</description>
<bitRange>[8:8]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Mask</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Pass</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>TVIN_MCLK_EN</name>
<description>Gating MBUS Clock</description>
<bitRange>[7:7]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Mask</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Pass</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CE_MCLK_EN</name>
<description>Gating MBUS Clock</description>
<bitRange>[2:2]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Mask</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Pass</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>VE_MCLK_EN</name>
<description>Gating MBUS Clock</description>
<bitRange>[1:1]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Mask</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Pass</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DMA_MCLK_EN</name>
<description>Gating MBUS Clock</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Mask</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Pass</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>DRAM_BGR</name>
<description>DRAM Bus Gating Reset Register</description>
<addressOffset>0x080C</addressOffset>
<fields>
<field>
<name>RST</name>
<description>Reset</description>
<bitRange>[16:16]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Assert</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Deassert</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>GATING</name>
<description>Gating Clock</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Mask</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Pass</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>SMHC0_CLK</name>
<description>SMHC0 Clock Register</description>
<addressOffset>0x0830</addressOffset>
<fields>
<field>
<name>CLK_GATING</name>
<description>Gating Clock</description>
<bitRange>[31:31]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Off</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>On</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CLK_SRC_SEL</name>
<description>Clock Source Select</description>
<bitRange>[26:24]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>HOSC</name>
<value>0b000</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_PERI_1X</name>
<value>0b001</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_PERI_2X</name>
<value>0b010</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_AUDIO1_DIV2</name>
<value>0b011</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>FACTOR_N</name>
<description>Factor N</description>
<bitRange>[9:8]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>N1</name>
<value>0b00</value>
</enumeratedValue>
<enumeratedValue>
<name>N2</name>
<value>0b01</value>
</enumeratedValue>
<enumeratedValue>
<name>N4</name>
<value>0b10</value>
</enumeratedValue>
<enumeratedValue>
<name>N8</name>
<value>0b11</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>FACTOR_M</name>
<description>Factor M</description>
<bitRange>[3:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>SMHC1_CLK</name>
<description>SMHC1 Clock Register</description>
<addressOffset>0x0834</addressOffset>
<fields>
<field>
<name>CLK_GATING</name>
<description>Gating Clock</description>
<bitRange>[31:31]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Off</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>On</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CLK_SRC_SEL</name>
<description>Clock Source Select</description>
<bitRange>[26:24]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>HOSC</name>
<value>0b000</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_PERI_1X</name>
<value>0b001</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_PERI_2X</name>
<value>0b010</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_AUDIO1_DIV2</name>
<value>0b011</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>FACTOR_N</name>
<description>Factor N</description>
<bitRange>[9:8]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>N1</name>
<value>0b00</value>
</enumeratedValue>
<enumeratedValue>
<name>N2</name>
<value>0b01</value>
</enumeratedValue>
<enumeratedValue>
<name>N4</name>
<value>0b10</value>
</enumeratedValue>
<enumeratedValue>
<name>N8</name>
<value>0b11</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>FACTOR_M</name>
<description>Factor M</description>
<bitRange>[3:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>SMHC2_CLK</name>
<description>SMHC2 Clock Register</description>
<addressOffset>0x0838</addressOffset>
<fields>
<field>
<name>CLK_GATING</name>
<description>Gating Clock</description>
<bitRange>[31:31]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Off</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>On</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CLK_SRC_SEL</name>
<description>Clock Source Select</description>
<bitRange>[26:24]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>HOSC</name>
<value>0b000</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_PERI_1X</name>
<value>0b001</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_PERI_2X</name>
<value>0b010</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_PERI_800M</name>
<value>0b011</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_AUDIO1_DIV2</name>
<value>0b100</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>FACTOR_N</name>
<description>Factor N</description>
<bitRange>[9:8]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>N1</name>
<value>0b00</value>
</enumeratedValue>
<enumeratedValue>
<name>N2</name>
<value>0b01</value>
</enumeratedValue>
<enumeratedValue>
<name>N4</name>
<value>0b10</value>
</enumeratedValue>
<enumeratedValue>
<name>N8</name>
<value>0b11</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>FACTOR_M</name>
<description>Factor M</description>
<bitRange>[3:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>SMHC_BGR</name>
<description>SMHC Bus Gating Reset Register</description>
<addressOffset>0x084C</addressOffset>
<fields>
<field>
<dim>3</dim>
<dimIncrement>1</dimIncrement>
<name>SMHC%s_RST</name>
<description>Reset</description>
<bitRange>[16:16]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Assert</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Deassert</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<dim>3</dim>
<dimIncrement>1</dimIncrement>
<name>SMHC%s_GATING</name>
<description>Gating Clock</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Mask</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Pass</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>UART_BGR</name>
<description>UART Bus Gating Reset Register</description>
<addressOffset>0x090C</addressOffset>
<fields>
<field>
<dim>6</dim>
<dimIncrement>1</dimIncrement>
<name>UART%s_RST</name>
<description>Reset</description>
<bitRange>[16:16]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Assert</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Deassert</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<dim>6</dim>
<dimIncrement>1</dimIncrement>
<name>UART%s_GATING</name>
<description>Gating Clock</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Mask</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Pass</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>TWI_BGR</name>
<description>TWI Bus Gating Reset Register</description>
<addressOffset>0x091C</addressOffset>
<fields>
<field>
<dim>4</dim>
<dimIncrement>1</dimIncrement>
<name>TWI%s_RST</name>
<description>Reset</description>
<bitRange>[16:16]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Assert</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Deassert</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<dim>4</dim>
<dimIncrement>1</dimIncrement>
<name>TWI%s_GATING</name>
<description>Gating Clock</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Mask</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Pass</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>SPI0_CLK</name>
<description>SPI0 Clock Register</description>
<addressOffset>0x0940</addressOffset>
<fields>
<field>
<name>CLK_GATING</name>
<description>Gating Clock</description>
<bitRange>[31:31]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Off</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>On</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CLK_SRC_SEL</name>
<description>Clock Source Select</description>
<bitRange>[26:24]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>HOSC</name>
<value>0b000</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_PERI_1X</name>
<value>0b001</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_PERI_2X</name>
<value>0b010</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_AUDIO1_DIV2</name>
<value>0b011</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_AUDIO1_DIV5</name>
<value>0b100</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>FACTOR_N</name>
<description>Factor N</description>
<bitRange>[9:8]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>N1</name>
<value>0b00</value>
</enumeratedValue>
<enumeratedValue>
<name>N2</name>
<value>0b01</value>
</enumeratedValue>
<enumeratedValue>
<name>N4</name>
<value>0b10</value>
</enumeratedValue>
<enumeratedValue>
<name>N8</name>
<value>0b11</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>FACTOR_M</name>
<description>Factor M</description>
<bitRange>[3:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>SPI1_CLK</name>
<description>SPI1 Clock Register</description>
<addressOffset>0x0944</addressOffset>
<fields>
<field>
<name>CLK_GATING</name>
<description>Gating Clock</description>
<bitRange>[31:31]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Off</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>On</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CLK_SRC_SEL</name>
<description>Clock Source Select</description>
<bitRange>[26:24]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>HOSC</name>
<value>0b000</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_PERI_1X</name>
<value>0b001</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_PERI_2X</name>
<value>0b010</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_AUDIO1_DIV2</name>
<value>0b011</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_AUDIO1_DIV5</name>
<value>0b100</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>FACTOR_N</name>
<description>Factor N</description>
<bitRange>[9:8]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>N1</name>
<value>0b00</value>
</enumeratedValue>
<enumeratedValue>
<name>N2</name>
<value>0b01</value>
</enumeratedValue>
<enumeratedValue>
<name>N4</name>
<value>0b10</value>
</enumeratedValue>
<enumeratedValue>
<name>N8</name>
<value>0b11</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>FACTOR_M</name>
<description>Factor M</description>
<bitRange>[3:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>SPI_BGR</name>
<description>SPI Bus Gating Reset Register</description>
<addressOffset>0x096C</addressOffset>
<fields>
<field>
<dim>2</dim>
<dimIncrement>1</dimIncrement>
<name>SPI%s_RST</name>
<description>Reset</description>
<bitRange>[16:16]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Assert</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Deassert</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<dim>2</dim>
<dimIncrement>1</dimIncrement>
<name>SPI%s_GATING</name>
<description>Gating Clock</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Mask</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Pass</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>EMAC_25M_CLK</name>
<description>EMAC_25M Clock Register</description>
<addressOffset>0x0970</addressOffset>
<fields>
<field>
<name>CLK_GATING</name>
<description>Gating Special Clock</description>
<bitRange>[31:31]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Off</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>On</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CLK_SRC_GATING</name>
<description>Gating the Source Clock of Special Clock</description>
<bitRange>[31:31]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Off</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>On</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>EMAC_BGR</name>
<description>EMAC Bus Gating Reset Register</description>
<addressOffset>0x097C</addressOffset>
<fields>
<field>
<name>RST</name>
<description>Reset</description>
<bitRange>[16:16]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Assert</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Deassert</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>GATING</name>
<description>Gating Clock</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Mask</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Pass</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>IRTX_CLK</name>
<description>IRTX Clock Register</description>
<addressOffset>0x09C0</addressOffset>
<fields>
<field>
<name>CLK_GATING</name>
<description>Gating Clock</description>
<bitRange>[31:31]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Off</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>On</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CLK_SRC_SEL</name>
<description>Clock Source Select</description>
<bitRange>[26:24]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>HOSC</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_PERI_1X</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>FACTOR_N</name>
<description>Factor N</description>
<bitRange>[9:8]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>N1</name>
<value>0b00</value>
</enumeratedValue>
<enumeratedValue>
<name>N2</name>
<value>0b01</value>
</enumeratedValue>
<enumeratedValue>
<name>N4</name>
<value>0b10</value>
</enumeratedValue>
<enumeratedValue>
<name>N8</name>
<value>0b11</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>FACTOR_M</name>
<description>Factor M</description>
<bitRange>[3:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>IRTX_BGR</name>
<description>IRTX Bus Gating Reset Register</description>
<addressOffset>0x09CC</addressOffset>
<fields>
<field>
<name>RST</name>
<description>Reset</description>
<bitRange>[16:16]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Assert</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Deassert</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>GATING</name>
<description>Gating Clock</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Mask</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Pass</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>GPADC_BGR</name>
<description>GPADC Bus Gating Reset Register</description>
<addressOffset>0x09EC</addressOffset>
<fields>
<field>
<name>RST</name>
<description>Reset</description>
<bitRange>[16:16]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Assert</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Deassert</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>GATING</name>
<description>Gating Clock</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Mask</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Pass</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>THS_BGR</name>
<description>THS Bus Gating Reset Register</description>
<addressOffset>0x09FC</addressOffset>
<fields>
<field>
<name>RST</name>
<description>Reset</description>
<bitRange>[16:16]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Assert</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Deassert</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>GATING</name>
<description>Gating Clock</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Mask</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Pass</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<dim>3</dim>
<dimIncrement>0x4</dimIncrement>
<name>I2S%s_CLK</name>
<description>I2S Clock Register</description>
<addressOffset>0x0A10</addressOffset>
<fields>
<field>
<name>CLK_GATING</name>
<description>Gating Clock</description>
<bitRange>[31:31]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Off</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>On</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CLK_SRC_SEL</name>
<description>Clock Source Select</description>
<bitRange>[26:24]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>PLL_AUDIO0_1X</name>
<value>0b00</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_AUDIO0_4X</name>
<value>0b01</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_AUDIO1_DIV2</name>
<value>0b10</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_AUDIO1_DIV5</name>
<value>0b11</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>FACTOR_N</name>
<description>Factor N</description>
<bitRange>[9:8]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>N1</name>
<value>0b00</value>
</enumeratedValue>
<enumeratedValue>
<name>N2</name>
<value>0b01</value>
</enumeratedValue>
<enumeratedValue>
<name>N4</name>
<value>0b10</value>
</enumeratedValue>
<enumeratedValue>
<name>N8</name>
<value>0b11</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>FACTOR_M</name>
<description>Factor M</description>
<bitRange>[4:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>I2S2_ASRC_CLK</name>
<description>I2S2_ASRC Clock Register</description>
<addressOffset>0x0A1C</addressOffset>
<fields>
<field>
<name>CLK_GATING</name>
<description>Gating Clock</description>
<bitRange>[31:31]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Off</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>On</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CLK_SRC_SEL</name>
<description>Clock Source Select</description>
<bitRange>[26:24]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>PLL_AUDIO0_4X</name>
<value>0b00</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_PERI_1X</name>
<value>0b01</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_AUDIO1_DIV2</name>
<value>0b10</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_AUDIO1_DIV5</name>
<value>0b11</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>FACTOR_N</name>
<description>Factor N</description>
<bitRange>[9:8]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>N1</name>
<value>0b00</value>
</enumeratedValue>
<enumeratedValue>
<name>N2</name>
<value>0b01</value>
</enumeratedValue>
<enumeratedValue>
<name>N4</name>
<value>0b10</value>
</enumeratedValue>
<enumeratedValue>
<name>N8</name>
<value>0b11</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>FACTOR_M</name>
<description>Factor M</description>
<bitRange>[4:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>I2S_BGR</name>
<description>I2S Bus Gating Reset Register</description>
<addressOffset>0x0A20</addressOffset>
<fields>
<field>
<dim>3</dim>
<dimIncrement>1</dimIncrement>
<name>I2S%s_RST</name>
<description>Reset</description>
<bitRange>[16:16]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Assert</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Deassert</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<dim>3</dim>
<dimIncrement>1</dimIncrement>
<name>I2S%s_GATING</name>
<description>Gating Clock</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Mask</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Pass</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>OWA_TX_CLK</name>
<description>OWA_TX Clock Register</description>
<addressOffset>0x0A24</addressOffset>
<fields>
<field>
<name>CLK_GATING</name>
<description>Gating Clock</description>
<bitRange>[31:31]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Off</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>On</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CLK_SRC_SEL</name>
<description>Clock Source Select</description>
<bitRange>[26:24]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>PLL_AUDIO0_1X</name>
<value>0b00</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_AUDIO0_4X</name>
<value>0b01</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_AUDIO1_DIV2</name>
<value>0b10</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_AUDIO1_DIV5</name>
<value>0b11</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>FACTOR_N</name>
<description>Factor N</description>
<bitRange>[9:8]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>N1</name>
<value>0b00</value>
</enumeratedValue>
<enumeratedValue>
<name>N2</name>
<value>0b01</value>
</enumeratedValue>
<enumeratedValue>
<name>N4</name>
<value>0b10</value>
</enumeratedValue>
<enumeratedValue>
<name>N8</name>
<value>0b11</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>FACTOR_M</name>
<description>Factor M</description>
<bitRange>[4:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>OWA_RX_CLK</name>
<description>OWA_RX Clock Register</description>
<addressOffset>0x0A28</addressOffset>
<fields>
<field>
<name>CLK_GATING</name>
<description>Gating Clock</description>
<bitRange>[31:31]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Off</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>On</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CLK_SRC_SEL</name>
<description>Clock Source Select</description>
<bitRange>[26:24]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>PLL_PERI_1X</name>
<value>0b00</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_AUDIO1_DIV2</name>
<value>0b01</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_AUDIO1_DIV5</name>
<value>0b10</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>FACTOR_N</name>
<description>Factor N</description>
<bitRange>[9:8]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>N1</name>
<value>0b00</value>
</enumeratedValue>
<enumeratedValue>
<name>N2</name>
<value>0b01</value>
</enumeratedValue>
<enumeratedValue>
<name>N4</name>
<value>0b10</value>
</enumeratedValue>
<enumeratedValue>
<name>N8</name>
<value>0b11</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>FACTOR_M</name>
<description>Factor M</description>
<bitRange>[4:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>OWA_BGR</name>
<description>OWA Bus Gating Reset Register</description>
<addressOffset>0x0A2C</addressOffset>
<fields>
<field>
<name>RST</name>
<description>Reset</description>
<bitRange>[16:16]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Assert</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Deassert</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>GATING</name>
<description>Gating Clock</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Mask</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Pass</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>DMIC_CLK</name>
<description>DMIC Clock Register</description>
<addressOffset>0x0A40</addressOffset>
<fields>
<field>
<name>CLK_GATING</name>
<description>Gating Clock</description>
<bitRange>[31:31]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Off</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>On</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CLK_SRC_SEL</name>
<description>Clock Source Select</description>
<bitRange>[26:24]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>PLL_PERI_1X</name>
<value>0b00</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_AUDIO1_DIV2</name>
<value>0b01</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_AUDIO1_DIV5</name>
<value>0b10</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>FACTOR_N</name>
<description>Factor N</description>
<bitRange>[9:8]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>N1</name>
<value>0b00</value>
</enumeratedValue>
<enumeratedValue>
<name>N2</name>
<value>0b01</value>
</enumeratedValue>
<enumeratedValue>
<name>N4</name>
<value>0b10</value>
</enumeratedValue>
<enumeratedValue>
<name>N8</name>
<value>0b11</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>FACTOR_M</name>
<description>Factor M</description>
<bitRange>[4:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>DMIC_BGR</name>
<description>DMIC Bus Gating Reset Register</description>
<addressOffset>0x0A4C</addressOffset>
<fields>
<field>
<name>RST</name>
<description>Reset</description>
<bitRange>[16:16]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Assert</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Deassert</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>GATING</name>
<description>Gating Clock</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Mask</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Pass</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>AUDIO_CODEC_DAC_CLK</name>
<description>AUDIO_CODEC_DAC Clock Register</description>
<addressOffset>0x0A50</addressOffset>
<fields>
<field>
<name>CLK_GATING</name>
<description>Gating Clock</description>
<bitRange>[31:31]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Off</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>On</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CLK_SRC_SEL</name>
<description>Clock Source Select</description>
<bitRange>[26:24]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>PLL_AUDIO0_1X</name>
<value>0b00</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_AUDIO1_DIV2</name>
<value>0b01</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_AUDIO1_DIV5</name>
<value>0b10</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>FACTOR_N</name>
<description>Factor N</description>
<bitRange>[9:8]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>N1</name>
<value>0b00</value>
</enumeratedValue>
<enumeratedValue>
<name>N2</name>
<value>0b01</value>
</enumeratedValue>
<enumeratedValue>
<name>N4</name>
<value>0b10</value>
</enumeratedValue>
<enumeratedValue>
<name>N8</name>
<value>0b11</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>FACTOR_M</name>
<description>Factor M</description>
<bitRange>[4:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>AUDIO_CODEC_ADC_CLK</name>
<description>AUDIO_CODEC_ADC Clock Register</description>
<addressOffset>0x0A54</addressOffset>
<fields>
<field>
<name>CLK_GATING</name>
<description>Gating Clock</description>
<bitRange>[31:31]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Off</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>On</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CLK_SRC_SEL</name>
<description>Clock Source Select</description>
<bitRange>[26:24]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>PLL_AUDIO0_1X</name>
<value>0b00</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_AUDIO1_DIV2</name>
<value>0b01</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_AUDIO1_DIV5</name>
<value>0b10</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>FACTOR_N</name>
<description>Factor N</description>
<bitRange>[9:8]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>N1</name>
<value>0b00</value>
</enumeratedValue>
<enumeratedValue>
<name>N2</name>
<value>0b01</value>
</enumeratedValue>
<enumeratedValue>
<name>N4</name>
<value>0b10</value>
</enumeratedValue>
<enumeratedValue>
<name>N8</name>
<value>0b11</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>FACTOR_M</name>
<description>Factor M</description>
<bitRange>[4:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>AUDIO_CODEC_BGR</name>
<description>AUDIO_CODEC Bus Gating Reset Register</description>
<addressOffset>0x0A5C</addressOffset>
<fields>
<field>
<name>RST</name>
<description>Reset</description>
<bitRange>[16:16]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Assert</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Deassert</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>GATING</name>
<description>Gating Clock</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Mask</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Pass</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>USB0_CLK</name>
<description>USB0 Clock Register</description>
<addressOffset>0x0A70</addressOffset>
<fields>
<field>
<name>CLKEN</name>
<description>Gating Special Clock</description>
<bitRange>[31:31]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Off</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>On</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>RSTN</name>
<description>PHY Reset</description>
<bitRange>[30:30]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Assert</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Deassert</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CLK12M_SEL</name>
<description>OHCI 12M Source Select</description>
<bitRange>[25:24]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>DIV_48M</name>
<value>0b00</value>
</enumeratedValue>
<enumeratedValue>
<name>DIV_24M</name>
<value>0b01</value>
</enumeratedValue>
<enumeratedValue>
<name>RTC_32K</name>
<value>0b10</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>USB1_CLK</name>
<description>USB1 Clock Register</description>
<addressOffset>0x0A74</addressOffset>
<fields>
<field>
<name>CLKEN</name>
<description>Gating Special Clock</description>
<bitRange>[31:31]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Off</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>On</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>RSTN</name>
<description>PHY Reset</description>
<bitRange>[30:30]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Assert</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Deassert</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CLK12M_SEL</name>
<description>OHCI 12M Source Select</description>
<bitRange>[25:24]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>DIV_48M</name>
<value>0b00</value>
</enumeratedValue>
<enumeratedValue>
<name>DIV_24M</name>
<value>0b01</value>
</enumeratedValue>
<enumeratedValue>
<name>RTC_32K</name>
<value>0b10</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>USB_BGR</name>
<description>USB Bus Gating Reset Register</description>
<addressOffset>0x0A8C</addressOffset>
<fields>
<field>
<name>USBOTG0_RST</name>
<description>USBOTG0 Reset</description>
<bitRange>[24:24]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Assert</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Deassert</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<dim>2</dim>
<dimIncrement>1</dimIncrement>
<name>USBEHCI%s_RST</name>
<description>USBEHCI Reset</description>
<bitRange>[20:20]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Assert</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Deassert</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<dim>2</dim>
<dimIncrement>1</dimIncrement>
<name>USBOHCI%s_RST</name>
<description>USBOHCI Reset</description>
<bitRange>[16:16]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Assert</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Deassert</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>USBOTG0_GATING</name>
<description>USBOTG0 Gating Clock</description>
<bitRange>[8:8]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Mask</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Pass</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<dim>2</dim>
<dimIncrement>1</dimIncrement>
<name>USBEHCI%s_GATING</name>
<description>USBEHCI Gating Clock</description>
<bitRange>[4:4]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Mask</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Pass</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<dim>2</dim>
<dimIncrement>1</dimIncrement>
<name>USBOHCI%s_GATING</name>
<description>USBOHCI Gating Clock</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Mask</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Pass</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>LRADC_BGR</name>
<description>LRADC Bus Gating Reset Register</description>
<addressOffset>0x0A9C</addressOffset>
<fields>
<field>
<name>RST</name>
<description>Reset</description>
<bitRange>[16:16]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Assert</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Deassert</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>GATING</name>
<description>Gating Clock</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Mask</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Pass</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>DPSS_TOP_BGR</name>
<description>DPSS_TOP Bus Gating Reset Register</description>
<addressOffset>0x0ABC</addressOffset>
<fields>
<field>
<name>RST</name>
<description>Reset</description>
<bitRange>[16:16]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Assert</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Deassert</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>GATING</name>
<description>Gating Clock</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Mask</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Pass</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>DSI_CLK</name>
<description>DSI Clock Register</description>
<addressOffset>0x0B24</addressOffset>
<fields>
<field>
<name>CLK_GATING</name>
<description>Gating Clock</description>
<bitRange>[31:31]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Off</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>On</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CLK_SRC_SEL</name>
<description>Clock Source Select</description>
<bitRange>[26:24]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>HOSC</name>
<value>0b000</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_PERI_1X</name>
<value>0b001</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_VIDEO0_2X</name>
<value>0b010</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_VIDEO1_2X</name>
<value>0b011</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_AUDIO1_DIV2</name>
<value>0b100</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>FACTOR_M</name>
<description>Factor M</description>
<bitRange>[3:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>DSI_BGR</name>
<description>DSI Bus Gating Reset Register</description>
<addressOffset>0x0B4C</addressOffset>
<fields>
<field>
<name>RST</name>
<description>Reset</description>
<bitRange>[16:16]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Assert</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Deassert</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>GATING</name>
<description>Gating Clock</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Mask</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Pass</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>TCONLCD_CLK</name>
<description>TCONLCD Clock Register</description>
<addressOffset>0x0B60</addressOffset>
<fields>
<field>
<name>CLK_GATING</name>
<description>Gating Clock</description>
<bitRange>[31:31]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Off</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>On</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CLK_SRC_SEL</name>
<description>Clock Source Select</description>
<bitRange>[26:24]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>PLL_VIDEO0_1X</name>
<value>0b000</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_VIDEO0_4X</name>
<value>0b001</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_VIDEO1_1X</name>
<value>0b010</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_VIDEO1_4X</name>
<value>0b011</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_PERI_2X</name>
<value>0b100</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_AUDIO1_DIV2</name>
<value>0b101</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>FACTOR_N</name>
<description>Factor N</description>
<bitRange>[9:8]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>N1</name>
<value>0b00</value>
</enumeratedValue>
<enumeratedValue>
<name>N2</name>
<value>0b01</value>
</enumeratedValue>
<enumeratedValue>
<name>N4</name>
<value>0b10</value>
</enumeratedValue>
<enumeratedValue>
<name>N8</name>
<value>0b11</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>FACTOR_M</name>
<description>Factor M</description>
<bitRange>[3:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>TCONLCD_BGR</name>
<description>TCONLCD Bus Gating Reset Register</description>
<addressOffset>0x0B7C</addressOffset>
<fields>
<field>
<name>RST</name>
<description>Reset</description>
<bitRange>[16:16]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Assert</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Deassert</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>GATING</name>
<description>Gating Clock</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Mask</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Pass</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>TCONTV_CLK</name>
<description>TCONTV Clock Register</description>
<addressOffset>0x0B80</addressOffset>
<fields>
<field>
<name>CLK_GATING</name>
<description>Gating Clock</description>
<bitRange>[31:31]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Off</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>On</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CLK_SRC_SEL</name>
<description>Clock Source Select</description>
<bitRange>[26:24]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>PLL_VIDEO0_1X</name>
<value>0b000</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_VIDEO0_4X</name>
<value>0b001</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_VIDEO1_1X</name>
<value>0b010</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_VIDEO1_4X</name>
<value>0b011</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_PERI_2X</name>
<value>0b100</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_AUDIO1_DIV2</name>
<value>0b101</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>FACTOR_N</name>
<description>Factor N</description>
<bitRange>[9:8]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>N1</name>
<value>0b00</value>
</enumeratedValue>
<enumeratedValue>
<name>N2</name>
<value>0b01</value>
</enumeratedValue>
<enumeratedValue>
<name>N4</name>
<value>0b10</value>
</enumeratedValue>
<enumeratedValue>
<name>N8</name>
<value>0b11</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>FACTOR_M</name>
<description>Factor M</description>
<bitRange>[3:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>TCONTV_BGR</name>
<description>TCONTV Bus Gating Reset Register</description>
<addressOffset>0x0B9C</addressOffset>
<fields>
<field>
<name>RST</name>
<description>Reset</description>
<bitRange>[16:16]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Assert</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Deassert</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>GATING</name>
<description>Gating Clock</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Mask</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Pass</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>LVDS_BGR</name>
<description>LVDS Bus Gating Reset Register</description>
<addressOffset>0x0BAC</addressOffset>
<fields>
<field>
<name>RST</name>
<description>Reset</description>
<bitRange>[16:16]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Assert</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Deassert</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>TVE_CLK</name>
<description>TVE Clock Register</description>
<addressOffset>0x0BB0</addressOffset>
<fields>
<field>
<name>CLK_GATING</name>
<description>Gating Clock</description>
<bitRange>[31:31]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Off</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>On</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CLK_SRC_SEL</name>
<description>Clock Source Select</description>
<bitRange>[26:24]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>PLL_VIDEO0_1X</name>
<value>0b000</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_VIDEO0_4X</name>
<value>0b001</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_VIDEO1_1X</name>
<value>0b010</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_VIDEO1_4X</name>
<value>0b011</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_PERI_2X</name>
<value>0b100</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_AUDIO1_DIV2</name>
<value>0b101</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>FACTOR_N</name>
<description>Factor N</description>
<bitRange>[9:8]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>N1</name>
<value>0b00</value>
</enumeratedValue>
<enumeratedValue>
<name>N2</name>
<value>0b01</value>
</enumeratedValue>
<enumeratedValue>
<name>N4</name>
<value>0b10</value>
</enumeratedValue>
<enumeratedValue>
<name>N8</name>
<value>0b11</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>FACTOR_M</name>
<description>Factor M</description>
<bitRange>[3:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>TVE_BGR</name>
<description>TVE Bus Gating Reset Register</description>
<addressOffset>0x0BBC</addressOffset>
<fields>
<field>
<name>RST</name>
<description>Reset</description>
<bitRange>[17:17]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Assert</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Deassert</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>TOP_RST</name>
<description>Reset</description>
<bitRange>[16:16]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Assert</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Deassert</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>GATING</name>
<description>Gating Clock</description>
<bitRange>[1:1]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Mask</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Pass</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>TOP_GATING</name>
<description>Gating Clock</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Mask</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Pass</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>TVD_CLK</name>
<description>TVD Clock Register</description>
<addressOffset>0x0BC0</addressOffset>
<fields>
<field>
<name>CLK_GATING</name>
<description>Gating Clock</description>
<bitRange>[31:31]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Off</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>On</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CLK_SRC_SEL</name>
<description>Clock Source Select</description>
<bitRange>[26:24]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>HOSC</name>
<value>0b000</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_VIDEO0_1X</name>
<value>0b001</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_VIDEO1_1X</name>
<value>0b010</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_PERI_1X</name>
<value>0b011</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>FACTOR_M</name>
<description>Factor M</description>
<bitRange>[4:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>TVD_BGR</name>
<description>TVD Bus Gating Reset Register</description>
<addressOffset>0x0BDC</addressOffset>
<fields>
<field>
<name>RST</name>
<description>Reset</description>
<bitRange>[17:17]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Assert</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Deassert</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>TOP_RST</name>
<description>Reset</description>
<bitRange>[16:16]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Assert</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Deassert</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>GATING</name>
<description>Gating Clock</description>
<bitRange>[1:1]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Mask</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Pass</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>TOP_GATING</name>
<description>Gating Clock</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Mask</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Pass</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>LEDC_CLK</name>
<description>LEDC Clock Register</description>
<addressOffset>0x0BF0</addressOffset>
<fields>
<field>
<name>CLK_GATING</name>
<description>Gating Clock</description>
<bitRange>[31:31]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Off</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>On</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CLK_SRC_SEL</name>
<description>Clock Source Select</description>
<bitRange>[26:24]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>HOSC</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_PERI_1X</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>FACTOR_N</name>
<description>Factor N</description>
<bitRange>[9:8]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>N1</name>
<value>0b00</value>
</enumeratedValue>
<enumeratedValue>
<name>N2</name>
<value>0b01</value>
</enumeratedValue>
<enumeratedValue>
<name>N4</name>
<value>0b10</value>
</enumeratedValue>
<enumeratedValue>
<name>N8</name>
<value>0b11</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>FACTOR_M</name>
<description>Factor M</description>
<bitRange>[3:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>LEDC_BGR</name>
<description>LEDC Bus Gating Reset Register</description>
<addressOffset>0x0BFC</addressOffset>
<fields>
<field>
<name>RST</name>
<description>Reset</description>
<bitRange>[16:16]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Assert</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Deassert</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>GATING</name>
<description>Gating Clock</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Mask</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Pass</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>CSI_CLK</name>
<description>CSI Clock Register</description>
<addressOffset>0x0C04</addressOffset>
<fields>
<field>
<name>CLK_GATING</name>
<description>Gating Clock</description>
<bitRange>[31:31]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Off</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>On</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CLK_SRC_SEL</name>
<description>Clock Source Select</description>
<bitRange>[26:24]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>PLL_PERI_2X</name>
<value>0b000</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_VIDEO0_2X</name>
<value>0b001</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_VIDEO1_2X</name>
<value>0b010</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>FACTOR_M</name>
<description>Factor M</description>
<bitRange>[3:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>CSI_MASTER_CLK</name>
<description>CSI Master Clock Register</description>
<addressOffset>0x0C08</addressOffset>
<fields>
<field>
<name>CLK_GATING</name>
<description>Gating Clock</description>
<bitRange>[31:31]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Off</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>On</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CLK_SRC_SEL</name>
<description>Clock Source Select</description>
<bitRange>[26:24]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>HOSC</name>
<value>0b000</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_PERI_1X</name>
<value>0b001</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_VIDEO0_1X</name>
<value>0b010</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_VIDEO1_1X</name>
<value>0b011</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_AUDIO1_DIV2</name>
<value>0b100</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_AUDIO1_DIV5</name>
<value>0b101</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>FACTOR_M</name>
<description>Factor M</description>
<bitRange>[4:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>CSI_BGR</name>
<description>CSI Bus Gating Reset Register</description>
<addressOffset>0x0C1C</addressOffset>
<fields>
<field>
<name>RST</name>
<description>Reset</description>
<bitRange>[16:16]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Assert</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Deassert</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>GATING</name>
<description>Gating Clock</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Mask</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Pass</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>TPADC_CLK</name>
<description>TPADC Clock Register</description>
<addressOffset>0x0C50</addressOffset>
<fields>
<field>
<name>CLK_GATING</name>
<description>Gating Clock</description>
<bitRange>[31:31]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Off</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>On</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CLK_SRC_SEL</name>
<description>Clock Source Select</description>
<bitRange>[26:24]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>HOSC</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_AUDIO0_1X</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>TPADC_BGR</name>
<description>TPADC Bus Gating Reset Register</description>
<addressOffset>0x0C5C</addressOffset>
<fields>
<field>
<name>RST</name>
<description>Reset</description>
<bitRange>[16:16]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Assert</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Deassert</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>GATING</name>
<description>Gating Clock</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Mask</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Pass</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>DSP_CLK</name>
<description>DSP Clock Register</description>
<addressOffset>0x0C70</addressOffset>
<fields>
<field>
<name>CLK_GATING</name>
<description>Gating Clock</description>
<bitRange>[31:31]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Off</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>On</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CLK_SRC_SEL</name>
<description>Clock Source Select</description>
<bitRange>[26:24]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>HOSC</name>
<value>0b000</value>
</enumeratedValue>
<enumeratedValue>
<name>CLK32K</name>
<value>0b001</value>
</enumeratedValue>
<enumeratedValue>
<name>CLK16M_RC</name>
<value>0b010</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_PERI_2X</name>
<value>0b011</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_AUDIO1_DIV2</name>
<value>0b100</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>FACTOR_M</name>
<description>Factor M</description>
<bitRange>[4:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>DSP_BGR</name>
<description>DSP Bus Gating Reset Register</description>
<addressOffset>0x0C7C</addressOffset>
<fields>
<field>
<name>DBG_RST</name>
<description>Reset</description>
<bitRange>[18:18]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Assert</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Deassert</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CFG_RST</name>
<description>Reset</description>
<bitRange>[17:17]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Assert</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Deassert</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>RST</name>
<description>Reset</description>
<bitRange>[16:16]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Assert</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Deassert</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CFG_GATING</name>
<description>Gating Clock</description>
<bitRange>[1:1]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Mask</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Pass</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>RISCV_CLK</name>
<description>RISC-V Clock Register</description>
<addressOffset>0x0D00</addressOffset>
<fields>
<field>
<name>CLK_SRC_SEL</name>
<description>Clock Source Select</description>
<bitRange>[26:24]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>HOSC</name>
<value>0b000</value>
</enumeratedValue>
<enumeratedValue>
<name>CLK32K</name>
<value>0b001</value>
</enumeratedValue>
<enumeratedValue>
<name>CLK16M_RC</name>
<value>0b010</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_PERI_800M</name>
<value>0b011</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_PERI_1X</name>
<value>0b100</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_CPU</name>
<value>0b101</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_AUDIO1_DIV2</name>
<value>0b110</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>AXI_DIV_CFG</name>
<description>Factor N</description>
<bitRange>[9:8]</bitRange>
</field>
<field>
<name>DIV_CFG</name>
<description>Factor M</description>
<bitRange>[4:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>RISCV_GATING</name>
<description>RISC-V GATING Configuration Register</description>
<addressOffset>0x0D04</addressOffset>
<fields>
<field>
<name>GATING</name>
<description>Gating Clock</description>
<bitRange>[31:31]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Mask</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Pass</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>GATING_FIELD</name>
<bitRange>[15:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>RISCV_CFG_BGR</name>
<description>RISC-V_CFG Bus Gating Reset Register</description>
<addressOffset>0x0D0C</addressOffset>
<fields>
<field>
<name>RST</name>
<description>Reset</description>
<bitRange>[16:16]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Assert</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Deassert</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>GATING</name>
<description>Gating Clock</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Mask</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Pass</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>PLL_LOCK_DBG_CTRL</name>
<description>PLL Lock Debug Control Register</description>
<addressOffset>0x0F04</addressOffset>
<fields>
<field>
<name>PLL_LOCK_FLAG_EN</name>
<description>Debug Enable</description>
<bitRange>[31:31]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CLK_SRC_SEL</name>
<description>Clock Source Select</description>
<bitRange>[22:20]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>PLL_CPUX</name>
<value>0b000</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_DDR</name>
<value>0b001</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_PERI_2X</name>
<value>0b010</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_VIDEO0_4X</name>
<value>0b011</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_VIDEO1_4X</name>
<value>0b100</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_VE</name>
<value>0b101</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_AUDIO0</name>
<value>0b110</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_AUDIO1</name>
<value>0b111</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>FRE_DET_CTRL</name>
<description>Frequency Detect Control Register</description>
<addressOffset>0x0F08</addressOffset>
<fields>
<field>
<name>ERROR_FLAG</name>
<description>Error Flag</description>
<bitRange>[31:31]</bitRange>
<modifiedWriteValues>zeroToClear</modifiedWriteValues>
<enumeratedValues>
<enumeratedValue>
<name>W0C</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Error</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DET_TIME</name>
<description>Detect Time</description>
<bitRange>[8:4]</bitRange>
</field>
<field>
<name>FRE_DET_IRQ_EN</name>
<description>Frequence Detect IRQ Enable</description>
<bitRange>[1:1]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>FRE_DET_FUN_EN</name>
<description>Frequence Detect Function Enable</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>FRE_UP_LIM</name>
<description>Frequency Up Limit Register</description>
<addressOffset>0x0F0C</addressOffset>
</register>
<register>
<name>FRE_DOWN_LIM</name>
<description>Frequency Down Limit Register</description>
<addressOffset>0x0F10</addressOffset>
</register>
<register>
<name>CCU_FAN_GATE</name>
<description>CCU FANOUT CLOCK GATE Register</description>
<addressOffset>0x0F30</addressOffset>
<fields>
<field>
<name>CLK32K_EN</name>
<description>Gating for CLK32K</description>
<bitRange>[4:4]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>OFF</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ON</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CLK25M_EN</name>
<description>Gating for CLK25M</description>
<bitRange>[3:3]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>OFF</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ON</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CLK16M_EN</name>
<description>Gating for CLK16M</description>
<bitRange>[2:2]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>OFF</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ON</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CLK12M_EN</name>
<description>Gating for CLK12M</description>
<bitRange>[1:1]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>OFF</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ON</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CLK24M_EN</name>
<description>Gating for CLK24M</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>OFF</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ON</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>CLK27M_FAN</name>
<description>CLK27M FANOUT Register</description>
<addressOffset>0x0F34</addressOffset>
<fields>
<field>
<name>GATING</name>
<description>Gating for CLK27M</description>
<bitRange>[31:31]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>OFF</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ON</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CLK_SRC_SEL</name>
<description>Clock Source Select</description>
<bitRange>[25:24]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>PLL_VIDEO0_1X</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>PLL_VIDEO1_1X</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DIV1</name>
<description>Factor N</description>
<bitRange>[9:8]</bitRange>
</field>
<field>
<name>DIV0</name>
<description>Factor M</description>
<bitRange>[4:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>PCLK_FAN</name>
<description>PCLK FANOUT Register</description>
<addressOffset>0x0F38</addressOffset>
<fields>
<field>
<name>GATING</name>
<description>Gating for PCLK</description>
<bitRange>[31:31]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>OFF</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ON</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DIV</name>
<description>Factor M</description>
<bitRange>[4:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>CCU_FAN</name>
<description>CCU FANOUT Register</description>
<addressOffset>0x0F3C</addressOffset>
<fields>
<field>
<dim>3</dim>
<dimIncrement>1</dimIncrement>
<name>CLK_FANOUT%s_EN</name>
<description>Gating for CLK_FANOUT</description>
<bitRange>[21:21]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>OFF</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ON</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<dim>3</dim>
<dimIncrement>3</dimIncrement>
<name>CLK_FANOUT%s_SEL</name>
<bitRange>[2:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>CLK32K</name>
<value>0b000</value>
</enumeratedValue>
<enumeratedValue>
<name>CLK12M</name>
<value>0b001</value>
</enumeratedValue>
<enumeratedValue>
<name>CLK16M</name>
<value>0b010</value>
</enumeratedValue>
<enumeratedValue>
<name>CLK24M</name>
<value>0b011</value>
</enumeratedValue>
<enumeratedValue>
<name>CLK25M</name>
<value>0b100</value>
</enumeratedValue>
<enumeratedValue>
<name>CLK27M</name>
<value>0b101</value>
</enumeratedValue>
<enumeratedValue>
<name>PCLK</name>
<value>0b110</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>SYS_CFG</name>
<description>System Configuration</description>
<groupName>System</groupName>
<baseAddress>0x03000000</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x1000</size>
<usage>registers</usage>
</addressBlock>
<registers>
<register>
<name>DSP_BOOT_RAMMAP</name>
<description>DSP Boot SRAM Remap Control Register</description>
<addressOffset>0x0008</addressOffset>
<fields>
<field>
<name>DSP_BOOT_SRAM_REMAP_ENABLE</name>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>DSP_SYS</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>SYS_BOOT</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>VER</name>
<description>Version Register</description>
<addressOffset>0x0024</addressOffset>
<access>read-only</access>
<fields>
<field>
<name>BOOT_SEL_PAD_STA</name>
<bitRange>[12:11]</bitRange>
</field>
<field>
<name>FEL_SEL_PAD_STA</name>
<description>Fel Select Pin Status</description>
<bitRange>[8:8]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>RUN_FEL</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>TRY_MEDIA_BOOT</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>EMAC_EPHY_CLK0</name>
<description>EMAC-EPHY Clock Register 0</description>
<addressOffset>0x0030</addressOffset>
<fields>
<field>
<name>BPS_EFUSE</name>
<bitRange>[31:28]</bitRange>
</field>
<field>
<name>XMII_SEL</name>
<bitRange>[27:27]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Internal</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>External</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>EPHY_MODE</name>
<bitRange>[26:25]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Normal</name>
<value>0b00</value>
</enumeratedValue>
<enumeratedValue>
<name>Simulation</name>
<value>0b01</value>
</enumeratedValue>
<enumeratedValue>
<name>AFE_Test</name>
<value>0b10</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PHY_ADDR</name>
<bitRange>[24:20]</bitRange>
</field>
<field>
<name>CLK_SEL</name>
<bitRange>[18:18]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>F25M</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>F24M</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LED_POL</name>
<bitRange>[17:17]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>High</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Low</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SHUTDOWN</name>
<bitRange>[16:16]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Power_up</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Shut_down</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PHY_SELECT</name>
<bitRange>[15:15]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>External</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Internal</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>RMII_EN</name>
<bitRange>[13:13]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>ETXDC</name>
<bitRange>[12:10]</bitRange>
</field>
<field>
<name>ERXDC</name>
<bitRange>[9:5]</bitRange>
</field>
<field>
<name>ERXIE</name>
<bitRange>[4:4]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>ETXIE</name>
<bitRange>[3:3]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>EPIT</name>
<bitRange>[2:2]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>MII</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>RGMII</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>ETCS</name>
<bitRange>[1:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>MII</name>
<value>0b00</value>
</enumeratedValue>
<enumeratedValue>
<name>External_GMII_RGMII</name>
<value>0b01</value>
</enumeratedValue>
<enumeratedValue>
<name>Internal_GMII_RGMII</name>
<value>0b10</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>SYS_LDO_CTRL</name>
<description>System LDO Control Register</description>
<addressOffset>0x0150</addressOffset>
<fields>
<field>
<name>SPARE</name>
<bitRange>[31:24]</bitRange>
</field>
<field>
<name>LDOB_TRIM</name>
<bitRange>[15:8]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>O1_167</name>
<value>0b000000</value>
</enumeratedValue>
<enumeratedValue>
<name>O1_18</name>
<value>0b000001</value>
</enumeratedValue>
<enumeratedValue>
<name>O1_193</name>
<value>0b000010</value>
</enumeratedValue>
<enumeratedValue>
<name>O1_207</name>
<value>0b000011</value>
</enumeratedValue>
<enumeratedValue>
<name>O1_22</name>
<value>0b000100</value>
</enumeratedValue>
<enumeratedValue>
<name>O1_233</name>
<value>0b000101</value>
</enumeratedValue>
<enumeratedValue>
<name>O1_247</name>
<value>0b000110</value>
</enumeratedValue>
<enumeratedValue>
<name>O1_260</name>
<value>0b000111</value>
</enumeratedValue>
<enumeratedValue>
<name>O1_273</name>
<value>0b001000</value>
</enumeratedValue>
<enumeratedValue>
<name>O1_287</name>
<value>0b001001</value>
</enumeratedValue>
<enumeratedValue>
<name>O1_3</name>
<value>0b001010</value>
</enumeratedValue>
<enumeratedValue>
<name>O1_313</name>
<value>0b001011</value>
</enumeratedValue>
<enumeratedValue>
<name>O1_327</name>
<value>0b001100</value>
</enumeratedValue>
<enumeratedValue>
<name>O1_340</name>
<value>0b001101</value>
</enumeratedValue>
<enumeratedValue>
<name>O1_353</name>
<value>0b001110</value>
</enumeratedValue>
<enumeratedValue>
<name>O1_367</name>
<value>0b001111</value>
</enumeratedValue>
<enumeratedValue>
<name>O1_38</name>
<value>0b010000</value>
</enumeratedValue>
<enumeratedValue>
<name>O1_393</name>
<value>0b010001</value>
</enumeratedValue>
<enumeratedValue>
<name>O1_407</name>
<value>0b010010</value>
</enumeratedValue>
<enumeratedValue>
<name>O1_42</name>
<value>0b010011</value>
</enumeratedValue>
<enumeratedValue>
<name>O1_433</name>
<value>0b010100</value>
</enumeratedValue>
<enumeratedValue>
<name>O1_447</name>
<value>0b010101</value>
</enumeratedValue>
<enumeratedValue>
<name>O1_46</name>
<value>0b010110</value>
</enumeratedValue>
<enumeratedValue>
<name>O1_473</name>
<value>0b010111</value>
</enumeratedValue>
<enumeratedValue>
<name>O1_487</name>
<value>0b011000</value>
</enumeratedValue>
<enumeratedValue>
<name>O1_5</name>
<value>0b011001</value>
</enumeratedValue>
<enumeratedValue>
<name>O1_513</name>
<value>0b011010</value>
</enumeratedValue>
<enumeratedValue>
<name>O1_527</name>
<value>0b011011</value>
</enumeratedValue>
<enumeratedValue>
<name>O1_54</name>
<value>0b011100</value>
</enumeratedValue>
<enumeratedValue>
<name>O1_553</name>
<value>0b011101</value>
</enumeratedValue>
<enumeratedValue>
<name>O1_567</name>
<value>0b011110</value>
</enumeratedValue>
<enumeratedValue>
<name>O1_58</name>
<value>0b011111</value>
</enumeratedValue>
<enumeratedValue>
<name>O1_593</name>
<value>0b100000</value>
</enumeratedValue>
<enumeratedValue>
<name>O1_607</name>
<value>0b100001</value>
</enumeratedValue>
<enumeratedValue>
<name>O1_627</name>
<value>0b100010</value>
</enumeratedValue>
<enumeratedValue>
<name>O1_64</name>
<value>0b100011</value>
</enumeratedValue>
<enumeratedValue>
<name>O1_653</name>
<value>0b100100</value>
</enumeratedValue>
<enumeratedValue>
<name>O1_667</name>
<value>0b100101</value>
</enumeratedValue>
<enumeratedValue>
<name>O1_680</name>
<value>0b100110</value>
</enumeratedValue>
<enumeratedValue>
<name>O1_693</name>
<value>0b100111</value>
</enumeratedValue>
<enumeratedValue>
<name>O1_707</name>
<value>0b101000</value>
</enumeratedValue>
<enumeratedValue>
<name>O1_720</name>
<value>0b101001</value>
</enumeratedValue>
<enumeratedValue>
<name>O1_733</name>
<value>0b101010</value>
</enumeratedValue>
<enumeratedValue>
<name>O1_747</name>
<value>0b101011</value>
</enumeratedValue>
<enumeratedValue>
<name>O1_76</name>
<value>0b101100</value>
</enumeratedValue>
<enumeratedValue>
<name>O1_773</name>
<value>0b101101</value>
</enumeratedValue>
<enumeratedValue>
<name>O1_787</name>
<value>0b101110</value>
</enumeratedValue>
<enumeratedValue>
<name>O1_8</name>
<value>0b101111</value>
</enumeratedValue>
<enumeratedValue>
<name>O1_813</name>
<value>0b110000</value>
</enumeratedValue>
<enumeratedValue>
<name>O1_827</name>
<value>0b110001</value>
</enumeratedValue>
<enumeratedValue>
<name>O1_84</name>
<value>0b110010</value>
</enumeratedValue>
<enumeratedValue>
<name>O1_853</name>
<value>0b110011</value>
</enumeratedValue>
<enumeratedValue>
<name>O1_867</name>
<value>0b110100</value>
</enumeratedValue>
<enumeratedValue>
<name>O1_88</name>
<value>0b110101</value>
</enumeratedValue>
<enumeratedValue>
<name>O1_893</name>
<value>0b110110</value>
</enumeratedValue>
<enumeratedValue>
<name>O1_907</name>
<value>0b110111</value>
</enumeratedValue>
<enumeratedValue>
<name>O1_92</name>
<value>0b111000</value>
</enumeratedValue>
<enumeratedValue>
<name>O1_933</name>
<value>0b111001</value>
</enumeratedValue>
<enumeratedValue>
<name>O1_947</name>
<value>0b111010</value>
</enumeratedValue>
<enumeratedValue>
<name>O1_96</name>
<value>0b111011</value>
</enumeratedValue>
<enumeratedValue>
<name>O1_973</name>
<value>0b111100</value>
</enumeratedValue>
<enumeratedValue>
<name>O1_987</name>
<value>0b111101</value>
</enumeratedValue>
<enumeratedValue>
<name>O2</name>
<value>0b111110</value>
</enumeratedValue>
<enumeratedValue>
<name>O2_013</name>
<value>0b111111</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LDOA_TRIM</name>
<bitRange>[7:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>O1_593</name>
<value>0b00000</value>
</enumeratedValue>
<enumeratedValue>
<name>O1_607</name>
<value>0b00001</value>
</enumeratedValue>
<enumeratedValue>
<name>O1_627</name>
<value>0b00010</value>
</enumeratedValue>
<enumeratedValue>
<name>O1_64</name>
<value>0b00011</value>
</enumeratedValue>
<enumeratedValue>
<name>O1_653</name>
<value>0b00100</value>
</enumeratedValue>
<enumeratedValue>
<name>O1_667</name>
<value>0b00101</value>
</enumeratedValue>
<enumeratedValue>
<name>O1_680</name>
<value>0b00110</value>
</enumeratedValue>
<enumeratedValue>
<name>O1_693</name>
<value>0b00111</value>
</enumeratedValue>
<enumeratedValue>
<name>O1_707</name>
<value>0b01000</value>
</enumeratedValue>
<enumeratedValue>
<name>O1_720</name>
<value>0b01001</value>
</enumeratedValue>
<enumeratedValue>
<name>O1_733</name>
<value>0b01010</value>
</enumeratedValue>
<enumeratedValue>
<name>O1_747</name>
<value>0b01011</value>
</enumeratedValue>
<enumeratedValue>
<name>O1_76</name>
<value>0b01100</value>
</enumeratedValue>
<enumeratedValue>
<name>O1_773</name>
<value>0b01101</value>
</enumeratedValue>
<enumeratedValue>
<name>O1_787</name>
<value>0b01110</value>
</enumeratedValue>
<enumeratedValue>
<name>O1_8</name>
<value>0b01111</value>
</enumeratedValue>
<enumeratedValue>
<name>O1_813</name>
<value>0b10000</value>
</enumeratedValue>
<enumeratedValue>
<name>O1_827</name>
<value>0b10001</value>
</enumeratedValue>
<enumeratedValue>
<name>O1_84</name>
<value>0b10010</value>
</enumeratedValue>
<enumeratedValue>
<name>O1_853</name>
<value>0b10011</value>
</enumeratedValue>
<enumeratedValue>
<name>O1_867</name>
<value>0b10100</value>
</enumeratedValue>
<enumeratedValue>
<name>O1_88</name>
<value>0b10101</value>
</enumeratedValue>
<enumeratedValue>
<name>O1_893</name>
<value>0b10110</value>
</enumeratedValue>
<enumeratedValue>
<name>O1_907</name>
<value>0b10111</value>
</enumeratedValue>
<enumeratedValue>
<name>O1_92</name>
<value>0b11000</value>
</enumeratedValue>
<enumeratedValue>
<name>O1_933</name>
<value>0b11001</value>
</enumeratedValue>
<enumeratedValue>
<name>O1_947</name>
<value>0b11010</value>
</enumeratedValue>
<enumeratedValue>
<name>O1_96</name>
<value>0b11011</value>
</enumeratedValue>
<enumeratedValue>
<name>O1_973</name>
<value>0b11100</value>
</enumeratedValue>
<enumeratedValue>
<name>O1_987</name>
<value>0b11101</value>
</enumeratedValue>
<enumeratedValue>
<name>O2</name>
<value>0b11110</value>
</enumeratedValue>
<enumeratedValue>
<name>O2_013</name>
<value>0b11111</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>RESCAL_CTRL</name>
<description>Resistor Calibration Control Register</description>
<addressOffset>0x0160</addressOffset>
<fields>
<field>
<name>DDR_RES240_Trimming_SEL</name>
<description>240ohms Resistor Trimming Source Select</description>
<bitRange>[8:8]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>RESCAL</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>RES240_TRIM</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>RESCAL_MODE</name>
<description>RESCAL Calibration Mode Select</description>
<bitRange>[2:2]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Auto_Calibration</name>
<value>0</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CAL_ANA_EN</name>
<description>Calibration Circuits Analog Enable</description>
<bitRange>[1:1]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CAL_EN</name>
<description>Auto Calibration Enable</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>RES240_CTRL</name>
<description>240ohms Resistor Manual Control Register</description>
<addressOffset>0x0168</addressOffset>
<fields>
<field>
<name>DDR_RES240_TRIM</name>
<description>240ohms Resistor trimming bit</description>
<bitRange>[5:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>RESCAL_STATUS</name>
<description>Resistor Calibration Status Register</description>
<addressOffset>0x016C</addressOffset>
<access>read-only</access>
<fields>
<field>
<name>COUT</name>
<description>Calibration Circuits Analog COmpare Output</description>
<bitRange>[8:8]</bitRange>
</field>
<field>
<name>RES_CAL_DO</name>
<description>RESCAL Calibration Results Output</description>
<bitRange>[5:0]</bitRange>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>RISCV_CFG</name>
<description>RISC-V System Configuration</description>
<groupName>System</groupName>
<baseAddress>0x06010000</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x1000</size>
<usage>registers</usage>
</addressBlock>
<registers>
<register>
<name>RISCV_STA_ADD0_REG</name>
<description>RISCV Start Address0 Register</description>
<addressOffset>0x0004</addressOffset>
</register>
<register>
<name>RISCV_STA_ADD1_REG</name>
<description>RISCV Start Address1 Register</description>
<addressOffset>0x0008</addressOffset>
<fields>
<field>
<name>STA_ADD_H</name>
<description>Start Address High 8-bit</description>
<bitRange>[7:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>RF1P_CFG_REG</name>
<description>RF1P Configuration Register</description>
<addressOffset>0x0010</addressOffset>
<fields>
<field>
<name>RF1P_CFG</name>
<description>RF1P Configuration</description>
<bitRange>[7:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>ROM_CFG_REG</name>
<description>ROM Configuration Register</description>
<addressOffset>0x001C</addressOffset>
<fields>
<field>
<name>ROM_CFG</name>
<description>ROM Configuration</description>
<bitRange>[7:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>WAKEUP_EN_REG</name>
<description>Wakeup Enable Register</description>
<addressOffset>0x0020</addressOffset>
<fields>
<field>
<name>WP_EN</name>
<description>Wakeup Enable</description>
<bitRange>[0:0]</bitRange>
</field>
</fields>
</register>
<register>
<dim>5</dim>
<dimIncrement>0x04</dimIncrement>
<name>WAKEUP_MASK%s_REG</name>
<description>Wakeup Mask Register</description>
<addressOffset>0x0024</addressOffset>
</register>
<register>
<name>TS_TMODE_SEL_REG</name>
<description>Timestamp Test Mode Select Register</description>
<addressOffset>0x0040</addressOffset>
<fields>
<field>
<name>TS_TEST_MODE_EN</name>
<description>Timestamp Test Mode Enable</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Normal</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Test</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>SRAM_ADDR_TWIST_REG</name>
<description>SRAM Address Twist Register</description>
<addressOffset>0x0044</addressOffset>
<fields>
<field>
<name>SRAM_TS_KF</name>
<description>SRAM Twist Keyfield</description>
<bitRange>[31:16]</bitRange>
<access>write-only</access>
</field>
<field>
<name>SRAM_ADDR_TS_FG</name>
<description>SRAM Address Twist Flag</description>
<bitRange>[0:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>WORK_MODE_REG</name>
<description>Work Mode Register</description>
<addressOffset>0x0048</addressOffset>
<access>read-only</access>
<fields>
<field>
<name>WM_STA</name>
<description>Work Mode Status</description>
<bitRange>[1:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Normal</name>
<value>0b00</value>
</enumeratedValue>
<enumeratedValue>
<name>Low_Power</name>
<value>0b01</value>
</enumeratedValue>
<enumeratedValue>
<name>Debug</name>
<value>0b10</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>RETITE_PC0_REG</name>
<description>Retire PC0 Register</description>
<addressOffset>0x0050</addressOffset>
<access>read-only</access>
</register>
<register>
<name>RETITE_PC1_REG</name>
<description>Retire PC1 Register</description>
<addressOffset>0x0054</addressOffset>
<access>read-only</access>
<fields>
<field>
<name>RT_SIG</name>
<description>Retire Signal</description>
<bitRange>[31:31]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>not_have</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>have</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>RT_PC_H</name>
<description>Retire PC[39:32]</description>
<bitRange>[7:0]</bitRange>
</field>
</fields>
</register>
<register>
<dim>5</dim>
<dimIncrement>0x04</dimIncrement>
<name>IRQ_MODE%s_REG</name>
<description>IRQ Mode Register</description>
<addressOffset>0x0060</addressOffset>
</register>
<register>
<name>RISCV_AXI_PMU_CTRL</name>
<description>RISCV AXI PMU Control Register</description>
<addressOffset>0x0104</addressOffset>
<fields>
<field>
<name>PMU_CLR</name>
<description>PMU Clear</description>
<bitRange>[1:1]</bitRange>
<modifiedWriteValues>clear</modifiedWriteValues>
<enumeratedValues>
<enumeratedValue>
<name>no_operation</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>cleared</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PMU_EN</name>
<description>PMU Enable</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disabled</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enabled</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>RISCV_AXI_PMU_PRD</name>
<description>RISCV AXI PMU Period Register</description>
<addressOffset>0x0108</addressOffset>
</register>
<register>
<name>RISCV_AXI_PMU_LAT_RD</name>
<description>RISCV AXI PMU Read Latency Register</description>
<addressOffset>0x010C</addressOffset>
<access>read-only</access>
</register>
<register>
<name>RISCV_AXI_PMU_LAT_WR</name>
<description>RISCV AXI PMU Write Latency Register</description>
<addressOffset>0x0110</addressOffset>
<access>read-only</access>
</register>
<register>
<name>RISCV_AXI_PMU_REQ_RD</name>
<description>RISCV AXI PMU Read Request Register</description>
<addressOffset>0x0114</addressOffset>
<access>read-only</access>
</register>
<register>
<name>RISCV_AXI_PMU_REQ_WR</name>
<description>RISCV AXI PMU Write Request Register</description>
<addressOffset>0x0118</addressOffset>
<access>read-only</access>
</register>
<register>
<name>RISCV_AXI_PMU_BW_RD</name>
<description>RISCV AXI PMU Read Bandwidth Register</description>
<addressOffset>0x011C</addressOffset>
<access>read-only</access>
</register>
<register>
<name>RISCV_AXI_PMU_BW_WR</name>
<description>RISCV AXI PMU Write Bandwidth Register</description>
<addressOffset>0x0120</addressOffset>
<access>read-only</access>
</register>
</registers>
</peripheral>
<peripheral>
<name>CLINT</name>
<description>Core-Local Interruptor</description>
<groupName>System</groupName>
<baseAddress>0x14000000</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x10000</size>
<usage>registers</usage>
</addressBlock>
<registers>
<register>
<name>msip</name>
<description>MSIP Register for hart 0</description>
<addressOffset>0x0000</addressOffset>
<writeConstraint>
<range>
<minimum>0</minimum>
<maximum>1</maximum>
</range>
</writeConstraint>
</register>
<register>
<name>mtimecmpl</name>
<description>MTIMECMPL Register for hart 0</description>
<addressOffset>0x4000</addressOffset>
</register>
<register>
<name>mtimecmph</name>
<description>MTIMECMPH Register for hart 0</description>
<addressOffset>0x4004</addressOffset>
</register>
<register>
<name>mtime</name>
<description>MTIME\n\nREF: opensbi</description>
<addressOffset>0xBFF8</addressOffset>
<size>64</size>
<access>read-only</access>
</register>
<register>
<name>ssip</name>
<description>SSIP Register for hart 0</description>
<addressOffset>0xC000</addressOffset>
<writeConstraint>
<range>
<minimum>0</minimum>
<maximum>1</maximum>
</range>
</writeConstraint>
</register>
<register>
<name>stimecmpl</name>
<description>STIMECMPL Register for hart 0</description>
<addressOffset>0xD000</addressOffset>
</register>
<register>
<name>stimecmph</name>
<description>STIMECMPH Register for hart 0</description>
<addressOffset>0xD004</addressOffset>
</register>
</registers>
</peripheral>
<peripheral>
<name>TIMER</name>
<description>Timer Module, includes timer0, timer1, watchdog and audio video synchronization</description>
<groupName>System</groupName>
<baseAddress>0x02050000</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x1000</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>TIMER0</name>
<value>75</value>
</interrupt>
<interrupt>
<name>TIMER1</name>
<value>76</value>
</interrupt>
<interrupt>
<name>WATCHDOG</name>
<value>79</value>
</interrupt>
<registers>
<register>
<name>tmr_irq_en</name>
<description>Timer IRQ Enable Register</description>
<addressOffset>0x0000</addressOffset>
<fields>
<field>
<name>tmr1_irq_en</name>
<bitRange>[1:1]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disabled</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enabled</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>tmr0_irq_en</name>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disabled</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enabled</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>tmr_irq_sta</name>
<description>Timer Status Register</description>
<addressOffset>0x0004</addressOffset>
<fields>
<field>
<name>tmr1_irq_pend</name>
<bitRange>[1:1]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>no_effect</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>pending</name>
<description>Indicates that the interval value of the timer 1 is reached. Write 1 to clear the pending status.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>tmr0_irq_pend</name>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>no_effect</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>pending</name>
<description>Indicates that the interval value of the timer 0 is reached. Write 1 to clear the pending status.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<dim>2</dim>
<dimIncrement>0x10</dimIncrement>
<name>tmr%s_ctrl</name>
<description>Timer IRQ Enable Register</description>
<addressOffset>0x0010</addressOffset>
<fields>
<field>
<name>tmr_mode</name>
<bitRange>[7:7]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>periodic</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>single_counting</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>tmr_clk_pres</name>
<bitRange>[6:4]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>P1</name>
<value>0b000</value>
</enumeratedValue>
<enumeratedValue>
<name>P2</name>
<value>0b001</value>
</enumeratedValue>
<enumeratedValue>
<name>P4</name>
<value>0b010</value>
</enumeratedValue>
<enumeratedValue>
<name>P8</name>
<value>0b011</value>
</enumeratedValue>
<enumeratedValue>
<name>P16</name>
<value>0b100</value>
</enumeratedValue>
<enumeratedValue>
<name>P32</name>
<value>0b101</value>
</enumeratedValue>
<enumeratedValue>
<name>P64</name>
<value>0b110</value>
</enumeratedValue>
<enumeratedValue>
<name>P128</name>
<value>0b111</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>tmr_clk_src</name>
<bitRange>[3:2]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>losc</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>osc24_m</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>tmr_reload</name>
<bitRange>[1:1]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>no_effect</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>reload</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>tmr_en</name>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>stop_pause</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>start</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<dim>2</dim>
<dimIncrement>0x10</dimIncrement>
<name>tmr%s_intv_value</name>
<description>Timer Interval Value Register</description>
<addressOffset>0x0014</addressOffset>
</register>
<register>
<dim>2</dim>
<dimIncrement>0x10</dimIncrement>
<name>tmr%s_cur_value</name>
<description>Timer Current Value Register</description>
<addressOffset>0x0018</addressOffset>
</register>
<register>
<name>wdog_irq_en</name>
<description>Watchdog IRQ Enable Register</description>
<addressOffset>0x00A0</addressOffset>
<fields>
<field>
<name>wdog_irq_en</name>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disabled</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enabled</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>wdog_irq_sta</name>
<description>Watchdog Status Register</description>
<addressOffset>0x00A4</addressOffset>
<fields>
<field>
<name>wdog_irq_pend</name>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>no_effect</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>pending</name>
<description>Indicates that the interval value of the watchdog is reached.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>wdog_soft_rst</name>
<description>Watchdog Software Reset Register</description>
<addressOffset>0x00A8</addressOffset>
<fields>
<field>
<name>KEY_FIELD</name>
<description>Key Field</description>
<bitRange>[31:16]</bitRange>
<access>write-only</access>
</field>
<field>
<name>SOFT_RST_EN</name>
<description>Soft Reset Enable</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Deassert</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Reset</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>wdog_ctrl</name>
<description>Watchdog Control Register</description>
<addressOffset>0x00B0</addressOffset>
<fields>
<field>
<name>WDOG_KEY_FIELD</name>
<description>Watchdog Key Field</description>
<bitRange>[12:1]</bitRange>
<access>write-only</access>
</field>
<field>
<name>WDOG_RESTART</name>
<description>Watchdog Restart</description>
<bitRange>[0:0]</bitRange>
<modifiedWriteValues>oneToSet</modifiedWriteValues>
<enumeratedValues>
<enumeratedValue>
<name>no_effect</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>restart</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>wdog_cfg</name>
<description>Watchdog Configuration Register</description>
<addressOffset>0x00B4</addressOffset>
<fields>
<field>
<name>KEY_FIELD</name>
<description>Key Field</description>
<bitRange>[31:16]</bitRange>
<access>write-only</access>
</field>
<field>
<name>WDOG_CLK_SRC</name>
<description>Select the clock source for the watchdog.</description>
<bitRange>[8:8]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>HOSC_32K</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>LOSC_32K</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>WDOG_MODE</name>
<description>Configure the operating mode for the watchdog</description>
<bitRange>[1:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>whold_system</name>
<value>0b01</value>
</enumeratedValue>
<enumeratedValue>
<name>only_interrupt</name>
<value>0b10</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>wdog_mode</name>
<description>Watchdog Mode Register</description>
<addressOffset>0x00B8</addressOffset>
<fields>
<field>
<name>KEY_FIELD</name>
<description>Key Field</description>
<bitRange>[31:16]</bitRange>
<access>write-only</access>
</field>
<field>
<name>WDOG_INTV_VALUE</name>
<description>Watchdog Interval Value</description>
<bitRange>[7:4]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>C16000</name>
<value>0b0000</value>
</enumeratedValue>
<enumeratedValue>
<name>C32000</name>
<value>0b0001</value>
</enumeratedValue>
<enumeratedValue>
<name>C64000</name>
<value>0b0010</value>
</enumeratedValue>
<enumeratedValue>
<name>C96000</name>
<value>0b0011</value>
</enumeratedValue>
<enumeratedValue>
<name>C128000</name>
<value>0b0100</value>
</enumeratedValue>
<enumeratedValue>
<name>C160000</name>
<value>0b0101</value>
</enumeratedValue>
<enumeratedValue>
<name>C192000</name>
<value>0b0110</value>
</enumeratedValue>
<enumeratedValue>
<name>C256000</name>
<value>0b0111</value>
</enumeratedValue>
<enumeratedValue>
<name>C320000</name>
<value>0b1000</value>
</enumeratedValue>
<enumeratedValue>
<name>C384000</name>
<value>0b1001</value>
</enumeratedValue>
<enumeratedValue>
<name>C448000</name>
<value>0b1010</value>
</enumeratedValue>
<enumeratedValue>
<name>C512000</name>
<value>0b1011</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>WDOG_EN</name>
<description>Watchdog Enable</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>no_effect</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>wdog_output_cfg</name>
<description>Watchdog Output Configuration Register</description>
<addressOffset>0x00BC</addressOffset>
<fields>
<field>
<name>WDOG_OUTPUT_CONFIG</name>
<description>Configure the valid time for the watchdog reset signal.</description>
<bitRange>[11:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>avs_cnt_ctl</name>
<description>AVS Counter Control Register</description>
<addressOffset>0x00C0</addressOffset>
<fields>
<field>
<dim>2</dim>
<dimIncrement>1</dimIncrement>
<name>AVS_CNT%s_PS</name>
<description>Audio Video Sync Counter Pause Control</description>
<bitRange>[8:8]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>not_pause</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>pause</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<dim>2</dim>
<dimIncrement>1</dimIncrement>
<name>AVS_CNT%s_EN</name>
<description>Audio Video Sync Counter Enable</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disabled</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enabled</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>avs_cnt0</name>
<description>AVS Counter 0 Register</description>
<addressOffset>0x00C4</addressOffset>
</register>
<register>
<name>avs_cnt1</name>
<description>AVS Counter 1 Register</description>
<addressOffset>0x00C8</addressOffset>
</register>
<register>
<name>avs_cnt_div</name>
<description>AVS Counter Divisor Register</description>
<addressOffset>0x00CC</addressOffset>
<fields>
<field>
<dim>2</dim>
<dimIncrement>16</dimIncrement>
<name>AVS_CNT%s_D</name>
<description>The divisor factor of AVS</description>
<bitRange>[11:0]</bitRange>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>HSTimer</name>
<description>High Speed Timer</description>
<groupName>System</groupName>
<baseAddress>0x03008000</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x1000</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>HSTIMER0</name>
<value>71</value>
</interrupt>
<interrupt>
<name>HSTIMER1</name>
<value>72</value>
</interrupt>
<registers>
<register>
<name>HS_TMR_IRQ_EN</name>
<description>HS Timer IRQ Enable Register</description>
<addressOffset>0x0000</addressOffset>
<fields>
<field>
<dim>2</dim>
<dimIncrement>1</dimIncrement>
<name>HS_TMR%s_INT_EN</name>
<description>HSTimer Interrupt Enable</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disabled</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enabled</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>HS_TMR_IRQ_STAS</name>
<description>HS Timer Status Register</description>
<addressOffset>0x0004</addressOffset>
<fields>
<field>
<dim>2</dim>
<dimIncrement>1</dimIncrement>
<name>HS_TMR%s_IRQ_PEND</name>
<description>HSTimer IRQ Pending</description>
<bitRange>[0:0]</bitRange>
<modifiedWriteValues>oneToClear</modifiedWriteValues>
<enumeratedValues>
<enumeratedValue>
<name>no_effect</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>pending</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<dim>2</dim>
<dimIncrement>0x20</dimIncrement>
<name>HS_TMR%s_CTRL</name>
<description>HS Timer Control Register</description>
<addressOffset>0x0020</addressOffset>
<fields>
<field>
<name>HS_TMR_TEST</name>
<description>Select the operating mode for HSTimer</description>
<bitRange>[31:31]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Normal</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Test</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>HS_TMR_MODE</name>
<description>Select the timing mode for HSTimer</description>
<bitRange>[7:7]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>periodic</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>one_shot</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>HS_TMR_CLK</name>
<description>Select the pre-scale for the HSTimer clock sources</description>
<bitRange>[6:4]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>P1</name>
<value>0b000</value>
</enumeratedValue>
<enumeratedValue>
<name>P2</name>
<value>0b001</value>
</enumeratedValue>
<enumeratedValue>
<name>P4</name>
<value>0b010</value>
</enumeratedValue>
<enumeratedValue>
<name>P8</name>
<value>0b011</value>
</enumeratedValue>
<enumeratedValue>
<name>P16</name>
<value>0b100</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>HS_TMR_RELOAD</name>
<description>HSTimer Reload</description>
<bitRange>[1:1]</bitRange>
<modifiedWriteValues>oneToSet</modifiedWriteValues>
<enumeratedValues>
<enumeratedValue>
<name>no_effect</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>reload</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>HS_TMR_EN</name>
<description>HSTimer Enable</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>stop_pause</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>start</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<dim>2</dim>
<dimIncrement>0x20</dimIncrement>
<name>HS_TMR%s_INTV_LO</name>
<description>HS Timer Interval Value Low Register</description>
<addressOffset>0x0024</addressOffset>
</register>
<register>
<dim>2</dim>
<dimIncrement>0x20</dimIncrement>
<name>HS_TMR%s_INTV_HI</name>
<description>HS Timer Interval Value High Register</description>
<addressOffset>0x0028</addressOffset>
<fields>
<field>
<name>HS_TMR_INTV_VALUE_HI</name>
<bitRange>[23:0]</bitRange>
</field>
</fields>
</register>
<register>
<dim>2</dim>
<dimIncrement>0x20</dimIncrement>
<name>HS_TMR%s_CURNT_LO</name>
<description>HS Timer Current Value Low Register</description>
<addressOffset>0x002C</addressOffset>
</register>
<register>
<dim>2</dim>
<dimIncrement>0x20</dimIncrement>
<name>HS_TMR%s_CURNT_HI</name>
<description>HS Timer Current Value High Register</description>
<addressOffset>0x0030</addressOffset>
<fields>
<field>
<name>HS_TMR_CUR_VALUE_HI</name>
<bitRange>[23:0]</bitRange>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>PLIC</name>
<description>Platform Level Interrupt Control</description>
<groupName>System</groupName>
<baseAddress>0x10000000</baseAddress>
<registers>
<register>
<dim>256</dim>
<dimIncrement>0x4</dimIncrement>
<name>prio[%s]</name>
<description>Interrupt Priority Register</description>
<addressOffset>0x000000</addressOffset>
<fields>
<field>
<name>priority</name>
<lsb>0</lsb>
<msb>4</msb>
<enumeratedValues>
<enumeratedValue>
<name>P0</name>
<description>Priority 0 (never interrupt)</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>P1</name>
<description>Priority 1</description>
<value>1</value>
</enumeratedValue>
<enumeratedValue>
<name>P2</name>
<description>Priority 2</description>
<value>2</value>
</enumeratedValue>
<enumeratedValue>
<name>P3</name>
<description>Priority 3</description>
<value>3</value>
</enumeratedValue>
<enumeratedValue>
<name>P4</name>
<description>Priority 4</description>
<value>4</value>
</enumeratedValue>
<enumeratedValue>
<name>P5</name>
<description>Priority 5</description>
<value>5</value>
</enumeratedValue>
<enumeratedValue>
<name>P6</name>
<description>Priority 6</description>
<value>6</value>
</enumeratedValue>
<enumeratedValue>
<name>P7</name>
<description>Priority 7</description>
<value>7</value>
</enumeratedValue>
<enumeratedValue>
<name>P8</name>
<description>Priority 8</description>
<value>8</value>
</enumeratedValue>
<enumeratedValue>
<name>P9</name>
<description>Priority 9</description>
<value>9</value>
</enumeratedValue>
<enumeratedValue>
<name>P10</name>
<description>Priority 10</description>
<value>10</value>
</enumeratedValue>
<enumeratedValue>
<name>P11</name>
<description>Priority 11</description>
<value>11</value>
</enumeratedValue>
<enumeratedValue>
<name>P12</name>
<description>Priority 12</description>
<value>12</value>
</enumeratedValue>
<enumeratedValue>
<name>P13</name>
<description>Priority 13</description>
<value>13</value>
</enumeratedValue>
<enumeratedValue>
<name>P14</name>
<description>Priority 14</description>
<value>14</value>
</enumeratedValue>
<enumeratedValue>
<name>P15</name>
<description>Priority 15</description>
<value>15</value>
</enumeratedValue>
<enumeratedValue>
<name>P16</name>
<description>Priority 16</description>
<value>16</value>
</enumeratedValue>
<enumeratedValue>
<name>P17</name>
<description>Priority 17</description>
<value>17</value>
</enumeratedValue>
<enumeratedValue>
<name>P18</name>
<description>Priority 18</description>
<value>18</value>
</enumeratedValue>
<enumeratedValue>
<name>P19</name>
<description>Priority 19</description>
<value>19</value>
</enumeratedValue>
<enumeratedValue>
<name>P20</name>
<description>Priority 20</description>
<value>20</value>
</enumeratedValue>
<enumeratedValue>
<name>P21</name>
<description>Priority 21</description>
<value>21</value>
</enumeratedValue>
<enumeratedValue>
<name>P22</name>
<description>Priority 22</description>
<value>22</value>
</enumeratedValue>
<enumeratedValue>
<name>P23</name>
<description>Priority 23</description>
<value>23</value>
</enumeratedValue>
<enumeratedValue>
<name>P24</name>
<description>Priority 24</description>
<value>24</value>
</enumeratedValue>
<enumeratedValue>
<name>P25</name>
<description>Priority 25</description>
<value>25</value>
</enumeratedValue>
<enumeratedValue>
<name>P26</name>
<description>Priority 26</description>
<value>26</value>
</enumeratedValue>
<enumeratedValue>
<name>P27</name>
<description>Priority 27</description>
<value>27</value>
</enumeratedValue>
<enumeratedValue>
<name>P28</name>
<description>Priority 28</description>
<value>28</value>
</enumeratedValue>
<enumeratedValue>
<name>P29</name>
<description>Priority 29</description>
<value>29</value>
</enumeratedValue>
<enumeratedValue>
<name>P30</name>
<description>Priority 30</description>
<value>30</value>
</enumeratedValue>
<enumeratedValue>
<name>P31</name>
<description>Priority 31</description>
<value>31</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<dim>9</dim>
<dimIncrement>0x4</dimIncrement>
<name>ip[%s]</name>
<description>Interrupt Pending Register</description>
<addressOffset>0x001000</addressOffset>
</register>
<register>
<dim>9</dim>
<dimIncrement>0x04</dimIncrement>
<name>mie[%s]</name>
<description>Machine Mode Interrupt Enable Register</description>
<addressOffset>0x002000</addressOffset>
</register>
<register>
<dim>9</dim>
<dimIncrement>0x04</dimIncrement>
<name>sie[%s]</name>
<description>Supervisor Mode Interrupt Enable Register</description>
<addressOffset>0x002080</addressOffset>
</register>
<register>
<name>ctrl</name>
<description>Control Register</description>
<addressOffset>0x1FFFFC</addressOffset>
<fields>
<field>
<name>ctrl</name>
<description>PLIC Control</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>m</name>
<description>Only the machine mode can access to all registers in PLIC. Supervisor mode can only access the interrupt threshold register and the interrupt response/completion register.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ms</name>
<description>The machine mode and the supervisor mode can access all registers. CTRL is accessible only in the machine mode.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>mth</name>
<description>Machine Mode Priority Threshold Register</description>
<addressOffset>0x200000</addressOffset>
<fields>
<field>
<name>priority</name>
<lsb>0</lsb>
<msb>4</msb>
<enumeratedValues>
<enumeratedValue>
<name>P0</name>
<description>Priority 0 (never interrupt)</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>P1</name>
<description>Priority 1</description>
<value>1</value>
</enumeratedValue>
<enumeratedValue>
<name>P2</name>
<description>Priority 2</description>
<value>2</value>
</enumeratedValue>
<enumeratedValue>
<name>P3</name>
<description>Priority 3</description>
<value>3</value>
</enumeratedValue>
<enumeratedValue>
<name>P4</name>
<description>Priority 4</description>
<value>4</value>
</enumeratedValue>
<enumeratedValue>
<name>P5</name>
<description>Priority 5</description>
<value>5</value>
</enumeratedValue>
<enumeratedValue>
<name>P6</name>
<description>Priority 6</description>
<value>6</value>
</enumeratedValue>
<enumeratedValue>
<name>P7</name>
<description>Priority 7</description>
<value>7</value>
</enumeratedValue>
<enumeratedValue>
<name>P8</name>
<description>Priority 8</description>
<value>8</value>
</enumeratedValue>
<enumeratedValue>
<name>P9</name>
<description>Priority 9</description>
<value>9</value>
</enumeratedValue>
<enumeratedValue>
<name>P10</name>
<description>Priority 10</description>
<value>10</value>
</enumeratedValue>
<enumeratedValue>
<name>P11</name>
<description>Priority 11</description>
<value>11</value>
</enumeratedValue>
<enumeratedValue>
<name>P12</name>
<description>Priority 12</description>
<value>12</value>
</enumeratedValue>
<enumeratedValue>
<name>P13</name>
<description>Priority 13</description>
<value>13</value>
</enumeratedValue>
<enumeratedValue>
<name>P14</name>
<description>Priority 14</description>
<value>14</value>
</enumeratedValue>
<enumeratedValue>
<name>P15</name>
<description>Priority 15</description>
<value>15</value>
</enumeratedValue>
<enumeratedValue>
<name>P16</name>
<description>Priority 16</description>
<value>16</value>
</enumeratedValue>
<enumeratedValue>
<name>P17</name>
<description>Priority 17</description>
<value>17</value>
</enumeratedValue>
<enumeratedValue>
<name>P18</name>
<description>Priority 18</description>
<value>18</value>
</enumeratedValue>
<enumeratedValue>
<name>P19</name>
<description>Priority 19</description>
<value>19</value>
</enumeratedValue>
<enumeratedValue>
<name>P20</name>
<description>Priority 20</description>
<value>20</value>
</enumeratedValue>
<enumeratedValue>
<name>P21</name>
<description>Priority 21</description>
<value>21</value>
</enumeratedValue>
<enumeratedValue>
<name>P22</name>
<description>Priority 22</description>
<value>22</value>
</enumeratedValue>
<enumeratedValue>
<name>P23</name>
<description>Priority 23</description>
<value>23</value>
</enumeratedValue>
<enumeratedValue>
<name>P24</name>
<description>Priority 24</description>
<value>24</value>
</enumeratedValue>
<enumeratedValue>
<name>P25</name>
<description>Priority 25</description>
<value>25</value>
</enumeratedValue>
<enumeratedValue>
<name>P26</name>
<description>Priority 26</description>
<value>26</value>
</enumeratedValue>
<enumeratedValue>
<name>P27</name>
<description>Priority 27</description>
<value>27</value>
</enumeratedValue>
<enumeratedValue>
<name>P28</name>
<description>Priority 28</description>
<value>28</value>
</enumeratedValue>
<enumeratedValue>
<name>P29</name>
<description>Priority 29</description>
<value>29</value>
</enumeratedValue>
<enumeratedValue>
<name>P30</name>
<description>Priority 30</description>
<value>30</value>
</enumeratedValue>
<enumeratedValue>
<name>P31</name>
<description>Priority 31</description>
<value>31</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>mclaim</name>
<description>Machine Mode Claim/Complete Register</description>
<addressOffset>0x200004</addressOffset>
<fields>
<field>
<name>mclaim</name>
<bitRange>[9:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>sth</name>
<description>Supervisor Mode Priority Threshold Register</description>
<addressOffset>0x201000</addressOffset>
<fields>
<field>
<name>priority</name>
<lsb>0</lsb>
<msb>4</msb>
<enumeratedValues>
<enumeratedValue>
<name>P0</name>
<description>Priority 0 (never interrupt)</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>P1</name>
<description>Priority 1</description>
<value>1</value>
</enumeratedValue>
<enumeratedValue>
<name>P2</name>
<description>Priority 2</description>
<value>2</value>
</enumeratedValue>
<enumeratedValue>
<name>P3</name>
<description>Priority 3</description>
<value>3</value>
</enumeratedValue>
<enumeratedValue>
<name>P4</name>
<description>Priority 4</description>
<value>4</value>
</enumeratedValue>
<enumeratedValue>
<name>P5</name>
<description>Priority 5</description>
<value>5</value>
</enumeratedValue>
<enumeratedValue>
<name>P6</name>
<description>Priority 6</description>
<value>6</value>
</enumeratedValue>
<enumeratedValue>
<name>P7</name>
<description>Priority 7</description>
<value>7</value>
</enumeratedValue>
<enumeratedValue>
<name>P8</name>
<description>Priority 8</description>
<value>8</value>
</enumeratedValue>
<enumeratedValue>
<name>P9</name>
<description>Priority 9</description>
<value>9</value>
</enumeratedValue>
<enumeratedValue>
<name>P10</name>
<description>Priority 10</description>
<value>10</value>
</enumeratedValue>
<enumeratedValue>
<name>P11</name>
<description>Priority 11</description>
<value>11</value>
</enumeratedValue>
<enumeratedValue>
<name>P12</name>
<description>Priority 12</description>
<value>12</value>
</enumeratedValue>
<enumeratedValue>
<name>P13</name>
<description>Priority 13</description>
<value>13</value>
</enumeratedValue>
<enumeratedValue>
<name>P14</name>
<description>Priority 14</description>
<value>14</value>
</enumeratedValue>
<enumeratedValue>
<name>P15</name>
<description>Priority 15</description>
<value>15</value>
</enumeratedValue>
<enumeratedValue>
<name>P16</name>
<description>Priority 16</description>
<value>16</value>
</enumeratedValue>
<enumeratedValue>
<name>P17</name>
<description>Priority 17</description>
<value>17</value>
</enumeratedValue>
<enumeratedValue>
<name>P18</name>
<description>Priority 18</description>
<value>18</value>
</enumeratedValue>
<enumeratedValue>
<name>P19</name>
<description>Priority 19</description>
<value>19</value>
</enumeratedValue>
<enumeratedValue>
<name>P20</name>
<description>Priority 20</description>
<value>20</value>
</enumeratedValue>
<enumeratedValue>
<name>P21</name>
<description>Priority 21</description>
<value>21</value>
</enumeratedValue>
<enumeratedValue>
<name>P22</name>
<description>Priority 22</description>
<value>22</value>
</enumeratedValue>
<enumeratedValue>
<name>P23</name>
<description>Priority 23</description>
<value>23</value>
</enumeratedValue>
<enumeratedValue>
<name>P24</name>
<description>Priority 24</description>
<value>24</value>
</enumeratedValue>
<enumeratedValue>
<name>P25</name>
<description>Priority 25</description>
<value>25</value>
</enumeratedValue>
<enumeratedValue>
<name>P26</name>
<description>Priority 26</description>
<value>26</value>
</enumeratedValue>
<enumeratedValue>
<name>P27</name>
<description>Priority 27</description>
<value>27</value>
</enumeratedValue>
<enumeratedValue>
<name>P28</name>
<description>Priority 28</description>
<value>28</value>
</enumeratedValue>
<enumeratedValue>
<name>P29</name>
<description>Priority 29</description>
<value>29</value>
</enumeratedValue>
<enumeratedValue>
<name>P30</name>
<description>Priority 30</description>
<value>30</value>
</enumeratedValue>
<enumeratedValue>
<name>P31</name>
<description>Priority 31</description>
<value>31</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>sclaim</name>
<description>Supervisor Mode Claim/Complete Register</description>
<addressOffset>0x201004</addressOffset>
<fields>
<field>
<name>sclaim</name>
<bitRange>[9:0]</bitRange>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>DMAC</name>
<description>Direct Memory Access Controller</description>
<groupName>System</groupName>
<baseAddress>0x03002000</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x1000</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>DMAC_NS</name>
<value>66</value>
</interrupt>
<registers>
<register>
<name>DMAC_IRQ_EN_REG0</name>
<description>DMAC IRQ Enable Register 0</description>
<addressOffset>0x0000</addressOffset>
</register>
<register>
<name>DMAC_IRQ_EN_REG1</name>
<description>DMAC IRQ Enable Register 1</description>
<addressOffset>0x0004</addressOffset>
</register>
<register>
<name>DMAC_IRQ_PEND_REG0</name>
<description>DMAC IRQ Pending Register 0</description>
<addressOffset>0x0010</addressOffset>
</register>
<register>
<name>DMAC_IRQ_PEND_REG1</name>
<description>DMAC IRQ Pending Register 1</description>
<addressOffset>0x0014</addressOffset>
</register>
<register>
<name>DMAC_AUTO_GATE_REG</name>
<description>DMAC Auto Gating Register</description>
<addressOffset>0x0028</addressOffset>
</register>
<register>
<name>DMAC_STA_REG</name>
<description>DMAC Status Register</description>
<addressOffset>0x0030</addressOffset>
</register>
<register>
<dim>16</dim>
<dimIncrement>0x0040</dimIncrement>
<name>DMAC_EN_REG%s</name>
<description>DMAC Channel Enable Register</description>
<addressOffset>0x0100</addressOffset>
</register>
<register>
<dim>16</dim>
<dimIncrement>0x0040</dimIncrement>
<name>DMAC_PAU_REG%s</name>
<description>DMAC Channel Pause Register</description>
<addressOffset>0x0104</addressOffset>
</register>
<register>
<dim>16</dim>
<dimIncrement>0x0040</dimIncrement>
<name>DMAC_DESC_ADDR_REG%s</name>
<description>DMAC Channel Start Address Register</description>
<addressOffset>0x0108</addressOffset>
</register>
<register>
<dim>16</dim>
<dimIncrement>0x0040</dimIncrement>
<name>DMAC_CFG_REG%s</name>
<description>DMAC Channel Configuration Register</description>
<addressOffset>0x010C</addressOffset>
</register>
<register>
<dim>16</dim>
<dimIncrement>0x0040</dimIncrement>
<name>DMAC_CUR_SRC_REG%s</name>
<description>DMAC Channel Current Source Register</description>
<addressOffset>0x0110</addressOffset>
</register>
<register>
<dim>16</dim>
<dimIncrement>0x0040</dimIncrement>
<name>DMAC_CUR_DEST_REG%s</name>
<description>DMAC Channel Current Destination Register</description>
<addressOffset>0x0114</addressOffset>
</register>
<register>
<dim>16</dim>
<dimIncrement>0x0040</dimIncrement>
<name>DMAC_BCNT_LEFT_REG%s</name>
<description>DMAC Channel Byte Counter Left Register</description>
<addressOffset>0x0118</addressOffset>
</register>
<register>
<dim>16</dim>
<dimIncrement>0x0040</dimIncrement>
<name>DMAC_PARA_REG%s</name>
<description>DMAC Channel Parameter Register</description>
<addressOffset>0x011C</addressOffset>
</register>
<register>
<dim>16</dim>
<dimIncrement>0x0040</dimIncrement>
<name>DMAC_MODE_REG%s</name>
<description>DMAC Mode Register</description>
<addressOffset>0x0128</addressOffset>
</register>
<register>
<dim>16</dim>
<dimIncrement>0x0040</dimIncrement>
<name>DMAC_FDESC_ADDR_REG%s</name>
<description>DMAC Former Descriptor Address Register</description>
<addressOffset>0x012C</addressOffset>
</register>
<register>
<dim>16</dim>
<dimIncrement>0x0040</dimIncrement>
<name>DMAC_PKG_NUM_REG%s</name>
<description>DMAC Package Number Register</description>
<addressOffset>0x0130</addressOffset>
</register>
</registers>
</peripheral>
<peripheral>
<name>THC</name>
<description>Thermal Sensor Controller</description>
<groupName>System</groupName>
<baseAddress>0x02009400</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x400</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>THS</name>
<value>74</value>
</interrupt>
<registers>
<register>
<name>THS_CTRL</name>
<description>THS Control Register</description>
<addressOffset>0x0000</addressOffset>
</register>
<register>
<name>THS_EN</name>
<description>THS Enable Register</description>
<addressOffset>0x0004</addressOffset>
</register>
<register>
<name>THS_PER</name>
<description>THS Period Control Register</description>
<addressOffset>0x0008</addressOffset>
</register>
<register>
<name>THS_DATA_INTC</name>
<description>THS Data Interrupt Control Register</description>
<addressOffset>0x0010</addressOffset>
</register>
<register>
<name>THS_SHUT_INTC</name>
<description>THS Shut Interrupt Control Register</description>
<addressOffset>0x0014</addressOffset>
</register>
<register>
<name>THS_ALARM_INTC</name>
<description>THS Alarm Interrupt Control Register</description>
<addressOffset>0x0018</addressOffset>
</register>
<register>
<name>THS_DATA_INTS</name>
<description>THS Data Interrupt Status Register</description>
<addressOffset>0x0020</addressOffset>
</register>
<register>
<name>THS_SHUT_INTS</name>
<description>THS Shut Interrupt Status Register</description>
<addressOffset>0x0024</addressOffset>
</register>
<register>
<name>THS_ALARMO_INTS</name>
<description>THS Alarm off Interrupt Status Register</description>
<addressOffset>0x0028</addressOffset>
</register>
<register>
<name>THS_ALARM_INTS</name>
<description>THS Alarm Interrupt Status Register</description>
<addressOffset>0x002C</addressOffset>
</register>
<register>
<name>THS_FILTER</name>
<description>THS Median Filter Control Register</description>
<addressOffset>0x0030</addressOffset>
</register>
<register>
<name>THS_ALARM_CTRL</name>
<description>THS Alarm Threshold Control Register</description>
<addressOffset>0x0040</addressOffset>
</register>
<register>
<name>THS_SHUTDOWN_CTRL</name>
<description>THS Shutdown Threshold Control Register</description>
<addressOffset>0x0080</addressOffset>
</register>
<register>
<name>THS_CDATA</name>
<description>THS Calibration Data</description>
<addressOffset>0x00A0</addressOffset>
</register>
<register>
<name>THS_DATA</name>
<description>THS Data Register</description>
<addressOffset>0x00C0</addressOffset>
</register>
</registers>
</peripheral>
<peripheral>
<name>IOMMU</name>
<description>I/O Memory Management Unit</description>
<groupName>System</groupName>
<baseAddress>0x02010000</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x10000</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>IOMMU</name>
<value>80</value>
</interrupt>
<registers>
<register>
<name>IOMMU_RESET_REG</name>
<description>IOMMU Reset Register</description>
<addressOffset>0x0010</addressOffset>
</register>
<register>
<name>IOMMU_ENABLE_REG</name>
<description>IOMMU Enable Register</description>
<addressOffset>0x0020</addressOffset>
</register>
<register>
<name>IOMMU_BYPASS_REG</name>
<description>IOMMU Bypass Register</description>
<addressOffset>0x0030</addressOffset>
</register>
<register>
<name>IOMMU_AUTO_GATING_REG</name>
<description>IOMMU Auto Gating Register</description>
<addressOffset>0x0040</addressOffset>
</register>
<register>
<name>IOMMU_WBUF_CTRL_REG</name>
<description>IOMMU Write Buffer Control Register</description>
<addressOffset>0x0044</addressOffset>
</register>
<register>
<name>IOMMU_OOO_CTRL_REG</name>
<description>IOMMU Out of Order Control Register</description>
<addressOffset>0x0048</addressOffset>
</register>
<register>
<name>IOMMU_4KB_BDY_PRT_CTRL_REG</name>
<description>IOMMU 4KB Boundary Protect Control Register</description>
<addressOffset>0x004C</addressOffset>
</register>
<register>
<name>IOMMU_TTB_REG</name>
<description>IOMMU Translation Table Base Register</description>
<addressOffset>0x0050</addressOffset>
</register>
<register>
<name>IOMMU_TLB_ENABLE_REG</name>
<description>IOMMU TLB Enable Register</description>
<addressOffset>0x0060</addressOffset>
</register>
<register>
<name>IOMMU_TLB_PREFETCH_REG</name>
<description>IOMMU TLB Prefetch Register</description>
<addressOffset>0x0070</addressOffset>
</register>
<register>
<name>IOMMU_TLB_FLUSH_ENABLE_REG</name>
<description>IOMMU TLB Flush Enable Register</description>
<addressOffset>0x0080</addressOffset>
</register>
<register>
<name>IOMMU_TLB_IVLD_MODE_SEL_REG</name>
<description>IOMMU TLB Invalidation Mode Select Register</description>
<addressOffset>0x0084</addressOffset>
</register>
<register>
<name>IOMMU_TLB_IVLD_STA_ADDR_REG</name>
<description>IOMMU TLB Invalidation Start Address Register</description>
<addressOffset>0x0088</addressOffset>
</register>
<register>
<name>IOMMU_TLB_IVLD_END_ADDR_REG</name>
<description>IOMMU TLB Invalidation End Address Register</description>
<addressOffset>0x008C</addressOffset>
</register>
<register>
<name>IOMMU_TLB_IVLD_ADDR_REG</name>
<description>IOMMU TLB Invalidation Address Register</description>
<addressOffset>0x0090</addressOffset>
</register>
<register>
<name>IOMMU_TLB_IVLD_ADDR_MASK_REG</name>
<description>IOMMU TLB Invalidation Address Mask Register</description>
<addressOffset>0x0094</addressOffset>
</register>
<register>
<name>IOMMU_TLB_IVLD_ENABLE_REG</name>
<description>IOMMU TLB Invalidation Enable Register</description>
<addressOffset>0x0098</addressOffset>
</register>
<register>
<name>IOMMU_PC_IVLD_MODE_SEL_REG</name>
<description>IOMMU PC Invalidation Mode Select Register</description>
<addressOffset>0x009C</addressOffset>
</register>
<register>
<name>IOMMU_PC_IVLD_ADDR_REG</name>
<description>IOMMU PC Invalidation Address Register</description>
<addressOffset>0x00A0</addressOffset>
</register>
<register>
<name>IOMMU_PC_IVLD_STA_ADDR_REG</name>
<description>IOMMU PC Invalidation Start Address Register</description>
<addressOffset>0x00A4</addressOffset>
</register>
<register>
<name>IOMMU_PC_IVLD_ENABLE_REG</name>
<description>IOMMU PC Invalidation Enable Register</description>
<addressOffset>0x00A8</addressOffset>
</register>
<register>
<name>IOMMU_PC_IVLD_END_ADDR_REG</name>
<description>IOMMU PC Invalidation End Address Register</description>
<addressOffset>0x00AC</addressOffset>
</register>
<register>
<name>IOMMU_DM_AUT_CTRL0_REG</name>
<description>IOMMU Domain Authority Control 0 Register</description>
<addressOffset>0x00B0</addressOffset>
</register>
<register>
<name>IOMMU_DM_AUT_CTRL1_REG</name>
<description>IOMMU Domain Authority Control 1 Register</description>
<addressOffset>0x00B4</addressOffset>
</register>
<register>
<name>IOMMU_DM_AUT_CTRL2_REG</name>
<description>IOMMU Domain Authority Control 2 Register</description>
<addressOffset>0x00B8</addressOffset>
</register>
<register>
<name>IOMMU_DM_AUT_CTRL3_REG</name>
<description>IOMMU Domain Authority Control 3 Register</description>
<addressOffset>0x00BC</addressOffset>
</register>
<register>
<name>IOMMU_DM_AUT_CTRL4_REG</name>
<description>IOMMU Domain Authority Control 4 Register</description>
<addressOffset>0x00C0</addressOffset>
</register>
<register>
<name>IOMMU_DM_AUT_CTRL5_REG</name>
<description>IOMMU Domain Authority Control 5 Register</description>
<addressOffset>0x00C4</addressOffset>
</register>
<register>
<name>IOMMU_DM_AUT_CTRL6_REG</name>
<description>IOMMU Domain Authority Control 6 Register</description>
<addressOffset>0x00C8</addressOffset>
</register>
<register>
<name>IOMMU_DM_AUT_CTRL7_REG</name>
<description>IOMMU Domain Authority Control 7 Register</description>
<addressOffset>0x00CC</addressOffset>
</register>
<register>
<name>IOMMU_DM_AUT_OVWT_REG</name>
<description>IOMMU Domain Authority Overwrite Register</description>
<addressOffset>0x00D0</addressOffset>
</register>
<register>
<name>IOMMU_INT_ENABLE_REG</name>
<description>IOMMU Interrupt Enable Register</description>
<addressOffset>0x0100</addressOffset>
</register>
<register>
<name>IOMMU_INT_CLR_REG</name>
<description>IOMMU Interrupt Clear Register</description>
<addressOffset>0x0104</addressOffset>
</register>
<register>
<name>IOMMU_INT_STA_REG</name>
<description>IOMMU Interrupt Status Register</description>
<addressOffset>0x0108</addressOffset>
</register>
<register>
<name>IOMMU_INT_ERR_ADDR0_REG</name>
<description>IOMMU Interrupt Error Address 0</description>
<addressOffset>0x0110</addressOffset>
</register>
<register>
<name>IOMMU_INT_ERR_ADDR1_REG</name>
<description>IOMMU Interrupt Error Address 1</description>
<addressOffset>0x0114</addressOffset>
</register>
<register>
<name>IOMMU_INT_ERR_ADDR2_REG</name>
<description>IOMMU Interrupt Error Address 2</description>
<addressOffset>0x0118</addressOffset>
</register>
<register>
<name>IOMMU_INT_ERR_ADDR3_REG</name>
<description>IOMMU Interrupt Error Address 3</description>
<addressOffset>0x011C</addressOffset>
</register>
<register>
<name>IOMMU_INT_ERR_ADDR4_REG</name>
<description>IOMMU Interrupt Error Address 4</description>
<addressOffset>0x0120</addressOffset>
</register>
<register>
<name>IOMMU_INT_ERR_ADDR5_REG</name>
<description>IOMMU Interrupt Error Address 5</description>
<addressOffset>0x0124</addressOffset>
</register>
<register>
<name>IOMMU_INT_ERR_ADDR6_REG</name>
<description>IOMMU Interrupt Error Address 6</description>
<addressOffset>0x0128</addressOffset>
</register>
<register>
<name>IOMMU_INT_ERR_ADDR7_REG</name>
<description>IOMMU Interrupt Error Address 7</description>
<addressOffset>0x0130</addressOffset>
</register>
<register>
<name>IOMMU_INT_ERR_ADDR8_REG</name>
<description>IOMMU Interrupt Error Address 8</description>
<addressOffset>0x0134</addressOffset>
</register>
<register>
<name>IOMMU_INT_ERR_DATA0_REG</name>
<description>IOMMU Interrupt Error Data 0 Register</description>
<addressOffset>0x0150</addressOffset>
</register>
<register>
<name>IOMMU_INT_ERR_DATA1_REG</name>
<description>IOMMU Interrupt Error Data 1 Register</description>
<addressOffset>0x0154</addressOffset>
</register>
<register>
<name>IOMMU_INT_ERR_DATA2_REG</name>
<description>IOMMU Interrupt Error Data 2 Register</description>
<addressOffset>0x0158</addressOffset>
</register>
<register>
<name>IOMMU_INT_ERR_DATA3_REG</name>
<description>IOMMU Interrupt Error Data 3 Register</description>
<addressOffset>0x015C</addressOffset>
</register>
<register>
<name>IOMMU_INT_ERR_DATA4_REG</name>
<description>IOMMU Interrupt Error Data 4 Register</description>
<addressOffset>0x0160</addressOffset>
</register>
<register>
<name>IOMMU_INT_ERR_DATA5_REG</name>
<description>IOMMU Interrupt Error Data 5 Register</description>
<addressOffset>0x0164</addressOffset>
</register>
<register>
<name>IOMMU_INT_ERR_DATA6_REG</name>
<description>IOMMU Interrupt Error Data 6 Register</description>
<addressOffset>0x0168</addressOffset>
</register>
<register>
<name>IOMMU_INT_ERR_DATA7_REG</name>
<description>IOMMU Interrupt Error Data 7 Register</description>
<addressOffset>0x0170</addressOffset>
</register>
<register>
<name>IOMMU_INT_ERR_DATA8_REG</name>
<description>IOMMU Interrupt Error Data 8 Register</description>
<addressOffset>0x0174</addressOffset>
</register>
<register>
<name>IOMMU_L1PG_INT_REG</name>
<description>IOMMU L1 Page Table Interrupt Register</description>
<addressOffset>0x0180</addressOffset>
</register>
<register>
<name>IOMMU_L2PG_INT_REG</name>
<description>IOMMU L2 Page Table Interrupt Register</description>
<addressOffset>0x0184</addressOffset>
</register>
<register>
<name>IOMMU_VA_REG</name>
<description>IOMMU Virtual Address Register</description>
<addressOffset>0x0190</addressOffset>
</register>
<register>
<name>IOMMU_VA_DATA_REG</name>
<description>IOMMU Virtual Address Data Register</description>
<addressOffset>0x0194</addressOffset>
</register>
<register>
<name>IOMMU_VA_CONFIG_REG</name>
<description>IOMMU Virtual Address Configuration Register</description>
<addressOffset>0x0198</addressOffset>
</register>
<register>
<name>IOMMU_PMU_ENABLE_REG</name>
<description>IOMMU PMU Enable Register</description>
<addressOffset>0x0200</addressOffset>
</register>
<register>
<name>IOMMU_PMU_CLR_REG</name>
<description>IOMMU PMU Clear Register</description>
<addressOffset>0x0210</addressOffset>
</register>
<register>
<name>IOMMU_PMU_ACCESS_LOW0_REG</name>
<description>IOMMU PMU Access Low 0 Register</description>
<addressOffset>0x0230</addressOffset>
</register>
<register>
<name>IOMMU_PMU_ACCESS_HIGH0_REG</name>
<description>IOMMU PMU Access High 0 Register</description>
<addressOffset>0x0234</addressOffset>
</register>
<register>
<name>IOMMU_PMU_HIT_LOW0_REG</name>
<description>IOMMU PMU Hit Low 0 Register</description>
<addressOffset>0x0238</addressOffset>
</register>
<register>
<name>IOMMU_PMU_HIT_HIGH0_REG</name>
<description>IOMMU PMU Hit High 0 Register</description>
<addressOffset>0x023C</addressOffset>
</register>
<register>
<name>IOMMU_PMU_ACCESS_LOW1_REG</name>
<description>IOMMU PMU Access Low 1 Register</description>
<addressOffset>0x0240</addressOffset>
</register>
<register>
<name>IOMMU_PMU_ACCESS_HIGH1_REG</name>
<description>IOMMU PMU Access High 1 Register</description>
<addressOffset>0x0244</addressOffset>
</register>
<register>
<name>IOMMU_PMU_HIT_LOW1_REG</name>
<description>IOMMU PMU Hit Low 1 Register</description>
<addressOffset>0x0248</addressOffset>
</register>
<register>
<name>IOMMU_PMU_HIT_HIGH1_REG</name>
<description>IOMMU PMU Hit High 1 Register</description>
<addressOffset>0x024C</addressOffset>
</register>
<register>
<name>IOMMU_PMU_ACCESS_LOW2_REG</name>
<description>IOMMU PMU Access Low 2 Register</description>
<addressOffset>0x0250</addressOffset>
</register>
<register>
<name>IOMMU_PMU_ACCESS_HIGH2_REG</name>
<description>IOMMU PMU Access High 2 Register</description>
<addressOffset>0x0254</addressOffset>
</register>
<register>
<name>IOMMU_PMU_HIT_LOW2_REG</name>
<description>IOMMU PMU Hit Low 2 Register</description>
<addressOffset>0x0258</addressOffset>
</register>
<register>
<name>IOMMU_PMU_HIT_HIGH2_REG</name>
<description>IOMMU PMU Hit High 2 Register</description>
<addressOffset>0x025C</addressOffset>
</register>
<register>
<name>IOMMU_PMU_ACCESS_LOW3_REG</name>
<description>IOMMU PMU Access Low 3 Register</description>
<addressOffset>0x0260</addressOffset>
</register>
<register>
<name>IOMMU_PMU_ACCESS_HIGH3_REG</name>
<description>IOMMU PMU Access High 3 Register</description>
<addressOffset>0x0264</addressOffset>
</register>
<register>
<name>IOMMU_PMU_HIT_LOW3_REG</name>
<description>IOMMU PMU Hit Low 3 Register</description>
<addressOffset>0x0268</addressOffset>
</register>
<register>
<name>IOMMU_PMU_HIT_HIGH3_REG</name>
<description>IOMMU PMU Hit High 3 Register</description>
<addressOffset>0x026C</addressOffset>
</register>
<register>
<name>IOMMU_PMU_ACCESS_LOW4_REG</name>
<description>IOMMU PMU Access Low 4 Register</description>
<addressOffset>0x0270</addressOffset>
</register>
<register>
<name>IOMMU_PMU_ACCESS_HIGH4_REG</name>
<description>IOMMU PMU Access High 4 Register</description>
<addressOffset>0x0274</addressOffset>
</register>
<register>
<name>IOMMU_PMU_HIT_LOW4_REG</name>
<description>IOMMU PMU Hit Low 4 Register</description>
<addressOffset>0x0278</addressOffset>
</register>
<register>
<name>IOMMU_PMU_HIT_HIGH4_REG</name>
<description>IOMMU PMU Hit High 4 Register</description>
<addressOffset>0x027C</addressOffset>
</register>
<register>
<name>IOMMU_PMU_ACCESS_LOW5_REG</name>
<description>IOMMU PMU Access Low 5 Register</description>
<addressOffset>0x0280</addressOffset>
</register>
<register>
<name>IOMMU_PMU_ACCESS_HIGH5_REG</name>
<description>IOMMU PMU Access High 5 Register</description>
<addressOffset>0x0284</addressOffset>
</register>
<register>
<name>IOMMU_PMU_HIT_LOW5_REG</name>
<description>IOMMU PMU Hit Low 5 Register</description>
<addressOffset>0x0288</addressOffset>
</register>
<register>
<name>IOMMU_PMU_HIT_HIGH5_REG</name>
<description>IOMMU PMU Hit High 5 Register</description>
<addressOffset>0x028C</addressOffset>
</register>
<register>
<name>IOMMU_PMU_ACCESS_LOW6_REG</name>
<description>IOMMU PMU Access Low 6 Register</description>
<addressOffset>0x0290</addressOffset>
</register>
<register>
<name>IOMMU_PMU_ACCESS_HIGH6_REG</name>
<description>IOMMU PMU Access High 6 Register</description>
<addressOffset>0x0294</addressOffset>
</register>
<register>
<name>IOMMU_PMU_HIT_LOW6_REG</name>
<description>IOMMU PMU Hit Low 6 Register</description>
<addressOffset>0x0298</addressOffset>
</register>
<register>
<name>IOMMU_PMU_HIT_HIGH6_REG</name>
<description>IOMMU PMU Hit High 6 Register</description>
<addressOffset>0x029C</addressOffset>
</register>
<register>
<name>IOMMU_PMU_ACCESS_LOW7_REG</name>
<description>IOMMU PMU Access Low 7 Register</description>
<addressOffset>0x02D0</addressOffset>
</register>
<register>
<name>IOMMU_PMU_ACCESS_HIGH7_REG</name>
<description>IOMMU PMU Access High 7 Register</description>
<addressOffset>0x02D4</addressOffset>
</register>
<register>
<name>IOMMU_PMU_HIT_LOW7_REG</name>
<description>IOMMU PMU Hit Low 7 Register</description>
<addressOffset>0x02D8</addressOffset>
</register>
<register>
<name>IOMMU_PMU_HIT_HIGH7_REG</name>
<description>IOMMU PMU Hit High 7 Register</description>
<addressOffset>0x02DC</addressOffset>
</register>
<register>
<name>IOMMU_PMU_ACCESS_LOW8_REG</name>
<description>IOMMU PMU Access Low 8 Register</description>
<addressOffset>0x02E0</addressOffset>
</register>
<register>
<name>IOMMU_PMU_ACCESS_HIGH8_REG</name>
<description>IOMMU PMU Access High 8 Register</description>
<addressOffset>0x02E4</addressOffset>
</register>
<register>
<name>IOMMU_PMU_HIT_LOW8_REG</name>
<description>IOMMU PMU Hit Low 8 Register</description>
<addressOffset>0x02E8</addressOffset>
</register>
<register>
<name>IOMMU_PMU_HIT_HIGH8_REG</name>
<description>IOMMU PMU Hit High 8 Register</description>
<addressOffset>0x02EC</addressOffset>
</register>
<register>
<name>IOMMU_PMU_TL_LOW0_REG</name>
<description>IOMMU Total Latency Low 0 Register</description>
<addressOffset>0x0300</addressOffset>
</register>
<register>
<name>IOMMU_PMU_TL_HIGH0_REG</name>
<description>IOMMU Total Latency High 0 Register</description>
<addressOffset>0x0304</addressOffset>
</register>
<register>
<name>IOMMU_PMU_ML0_REG</name>
<description>IOMMU Max Latency 0 Register</description>
<addressOffset>0x0308</addressOffset>
</register>
<register>
<name>IOMMU_PMU_TL_LOW1_REG</name>
<description>IOMMU Total Latency Low 1 Register</description>
<addressOffset>0x0310</addressOffset>
</register>
<register>
<name>IOMMU_PMU_TL_HIGH1_REG</name>
<description>IOMMU Total Latency High 1 Register</description>
<addressOffset>0x0314</addressOffset>
</register>
<register>
<name>IOMMU_PMU_ML1_REG</name>
<description>IOMMU Max Latency 1 Register</description>
<addressOffset>0x0318</addressOffset>
</register>
<register>
<name>IOMMU_PMU_TL_LOW2_REG</name>
<description>IOMMU Total Latency Low 2 Register</description>
<addressOffset>0x0320</addressOffset>
</register>
<register>
<name>IOMMU_PMU_TL_HIGH2_REG</name>
<description>IOMMU Total Latency High 2 Register</description>
<addressOffset>0x0324</addressOffset>
</register>
<register>
<name>IOMMU_PMU_ML2_REG</name>
<description>IOMMU Max Latency 2 Register</description>
<addressOffset>0x0328</addressOffset>
</register>
<register>
<name>IOMMU_PMU_TL_LOW3_REG</name>
<description>IOMMU Total Latency Low 3 Register</description>
<addressOffset>0x0330</addressOffset>
</register>
<register>
<name>IOMMU_PMU_TL_HIGH3_REG</name>
<description>IOMMU Total Latency High 3 Register</description>
<addressOffset>0x0334</addressOffset>
</register>
<register>
<name>IOMMU_PMU_ML3_REG</name>
<description>IOMMU Max Latency 3 Register</description>
<addressOffset>0x0338</addressOffset>
</register>
<register>
<name>IOMMU_PMU_TL_LOW4_REG</name>
<description>IOMMU Total Latency Low 4 Register</description>
<addressOffset>0x0340</addressOffset>
</register>
<register>
<name>IOMMU_PMU_TL_HIGH4_REG</name>
<description>IOMMU Total Latency High 4 Register</description>
<addressOffset>0x0344</addressOffset>
</register>
<register>
<name>IOMMU_PMU_ML4_REG</name>
<description>IOMMU Max Latency 4 Register</description>
<addressOffset>0x0348</addressOffset>
</register>
<register>
<name>IOMMU_PMU_TL_LOW5_REG</name>
<description>IOMMU Total Latency Low 5 Register</description>
<addressOffset>0x0350</addressOffset>
</register>
<register>
<name>IOMMU_PMU_TL_HIGH5_REG</name>
<description>IOMMU Total Latency High 5 Register</description>
<addressOffset>0x0354</addressOffset>
</register>
<register>
<name>IOMMU_PMU_ML5_REG</name>
<description>IOMMU Max Latency 5 Register</description>
<addressOffset>0x0358</addressOffset>
</register>
<register>
<name>IOMMU_PMU_TL_LOW6_REG</name>
<description>IOMMU Total Latency Low 6 Register</description>
<addressOffset>0x0360</addressOffset>
</register>
<register>
<name>IOMMU_PMU_TL_HIGH6_REG</name>
<description>IOMMU Total Latency High 6 Register</description>
<addressOffset>0x0364</addressOffset>
</register>
<register>
<name>IOMMU_PMU_ML6_REG</name>
<description>IOMMU Max Latency 6 Register</description>
<addressOffset>0x0368</addressOffset>
</register>
</registers>
</peripheral>
<peripheral>
<name>DSP_MSGBOX</name>
<description>DSP Message Box</description>
<groupName>System</groupName>
<baseAddress>0x01701000</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x1000</size>
<usage>registers</usage>
</addressBlock>
<registers>
<register>
<dim>2</dim>
<dimIncrement>0x0100</dimIncrement>
<name>MSGBOX_RD_IRQ_EN_REG_%s</name>
<description>MSGBOX Read IRQ Enable Register</description>
<addressOffset>0x0020</addressOffset>
</register>
<register>
<dim>2</dim>
<dimIncrement>0x0100</dimIncrement>
<name>MSGBOX_RD_IRQ_STATUS_REG_%s</name>
<description>MSGBOX Read IRQ Status Register</description>
<addressOffset>0x0024</addressOffset>
</register>
<register>
<dim>2</dim>
<dimIncrement>0x0100</dimIncrement>
<name>MSGBOX_WR_IRQ_EN_REG_%s</name>
<description>MSGBOX Write IRQ Enable Register</description>
<addressOffset>0x0030</addressOffset>
</register>
<register>
<dim>2</dim>
<dimIncrement>0x0100</dimIncrement>
<name>MSGBOX_WR_IRQ_STATUS_REG_%s</name>
<description>MSGBOX Write IRQ Status Register</description>
<addressOffset>0x0034</addressOffset>
</register>
<register>
<dim>2</dim>
<dimIncrement>0x0100</dimIncrement>
<name>MSGBOX_DEBUG_REG_%s</name>
<description>MSGBOX Debug Register</description>
<addressOffset>0x0040</addressOffset>
</register>
<cluster>
<dim>2</dim>
<dimIncrement>0x0100</dimIncrement>
<name>MSGBOX_FIFO_STATUS_REG_N%s</name>
<description>MSGBOX FIFO Status Register</description>
<addressOffset>0x0050</addressOffset>
<register>
<dim>3</dim>
<dimIncrement>0x0004</dimIncrement>
<name>MSGBOX_FIFO_STATUS_REG_P%s</name>
<description>MSGBOX FIFO Status Register</description>
<addressOffset>0</addressOffset>
</register>
</cluster>
<cluster>
<dim>2</dim>
<dimIncrement>0x0100</dimIncrement>
<name>MSGBOX_MSG_STATUS_REG_N%s</name>
<description>MSGBOX Message Status Register</description>
<addressOffset>0x0060</addressOffset>
<register>
<dim>3</dim>
<dimIncrement>0x0004</dimIncrement>
<name>MSGBOX_MSG_STATUS_REG_P%s</name>
<description>MSGBOX Message Status Register</description>
<addressOffset>0</addressOffset>
</register>
</cluster>
<cluster>
<dim>2</dim>
<dimIncrement>0x0100</dimIncrement>
<name>MSGBOX_MSG_REG_N%s</name>
<description>MSGBOX Message Queue Register</description>
<addressOffset>0x0070</addressOffset>
<register>
<dim>3</dim>
<dimIncrement>0x0004</dimIncrement>
<name>MSGBOX_MSG_REG_P%s</name>
<description>MSGBOX Message Queue Register</description>
<addressOffset>0</addressOffset>
</register>
</cluster>
<cluster>
<dim>2</dim>
<dimIncrement>0x0100</dimIncrement>
<name>MSGBOX_WR_INT_THRESHOLD_REG_N%s</name>
<description>MSGBOX Write IRQ Threshold Register</description>
<addressOffset>0x0080</addressOffset>
<register>
<dim>3</dim>
<dimIncrement>0x0004</dimIncrement>
<name>MSGBOX_WR_INT_THRESHOLD_REG_P%s</name>
<description>MSGBOX Write IRQ Threshold Register</description>
<addressOffset>0</addressOffset>
</register>
</cluster>
</registers>
</peripheral>
<peripheral>
<name>RISC_V_MSGBOX</name>
<description>RISC-V Message Box</description>
<groupName>System</groupName>
<baseAddress>0x0601F000</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x1000</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>RISC-V_MBOX_RISC-V</name>
<value>144</value>
</interrupt>
<interrupt>
<name>RISC-V_MBOX_DSP</name>
<value>145</value>
</interrupt>
<registers>
<register>
<dim>2</dim>
<dimIncrement>0x0100</dimIncrement>
<name>MSGBOX_RD_IRQ_EN_REG_%s</name>
<description>MSGBOX Read IRQ Enable Register</description>
<addressOffset>0x0020</addressOffset>
</register>
<register>
<dim>2</dim>
<dimIncrement>0x0100</dimIncrement>
<name>MSGBOX_RD_IRQ_STATUS_REG_%s</name>
<description>MSGBOX Read IRQ Status Register</description>
<addressOffset>0x0024</addressOffset>
</register>
<register>
<dim>2</dim>
<dimIncrement>0x0100</dimIncrement>
<name>MSGBOX_WR_IRQ_EN_REG_%s</name>
<description>MSGBOX Write IRQ Enable Register</description>
<addressOffset>0x0030</addressOffset>
</register>
<register>
<dim>2</dim>
<dimIncrement>0x0100</dimIncrement>
<name>MSGBOX_WR_IRQ_STATUS_REG_%s</name>
<description>MSGBOX Write IRQ Status Register</description>
<addressOffset>0x0034</addressOffset>
</register>
<register>
<dim>2</dim>
<dimIncrement>0x0100</dimIncrement>
<name>MSGBOX_DEBUG_REG_%s</name>
<description>MSGBOX Debug Register</description>
<addressOffset>0x0040</addressOffset>
</register>
<cluster>
<dim>2</dim>
<dimIncrement>0x0100</dimIncrement>
<name>MSGBOX_FIFO_STATUS_REG_N%s</name>
<description>MSGBOX FIFO Status Register</description>
<addressOffset>0x0050</addressOffset>
<register>
<dim>3</dim>
<dimIncrement>0x0004</dimIncrement>
<name>MSGBOX_FIFO_STATUS_REG_P%s</name>
<description>MSGBOX FIFO Status Register</description>
<addressOffset>0</addressOffset>
</register>
</cluster>
<cluster>
<dim>2</dim>
<dimIncrement>0x0100</dimIncrement>
<name>MSGBOX_MSG_STATUS_REG_N%s</name>
<description>MSGBOX Message Status Register</description>
<addressOffset>0x0060</addressOffset>
<register>
<dim>3</dim>
<dimIncrement>0x0004</dimIncrement>
<name>MSGBOX_MSG_STATUS_REG_P%s</name>
<description>MSGBOX Message Status Register</description>
<addressOffset>0</addressOffset>
</register>
</cluster>
<cluster>
<dim>2</dim>
<dimIncrement>0x0100</dimIncrement>
<name>MSGBOX_MSG_REG_N%s</name>
<description>MSGBOX Message Queue Register</description>
<addressOffset>0x0070</addressOffset>
<register>
<dim>3</dim>
<dimIncrement>0x0004</dimIncrement>
<name>MSGBOX_MSG_REG_P%s</name>
<description>MSGBOX Message Queue Register</description>
<addressOffset>0</addressOffset>
</register>
</cluster>
<cluster>
<dim>2</dim>
<dimIncrement>0x0100</dimIncrement>
<name>MSGBOX_WR_INT_THRESHOLD_REG_N%s</name>
<description>MSGBOX Write IRQ Threshold Register</description>
<addressOffset>0x0080</addressOffset>
<register>
<dim>3</dim>
<dimIncrement>0x0004</dimIncrement>
<name>MSGBOX_WR_INT_THRESHOLD_REG_P%s</name>
<description>MSGBOX Write IRQ Threshold Register</description>
<addressOffset>0</addressOffset>
</register>
</cluster>
</registers>
</peripheral>
<peripheral>
<name>Spinlock</name>
<description>Spinlock</description>
<groupName>System</groupName>
<baseAddress>0x03005000</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x1000</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>SPINLOCK</name>
<value>70</value>
</interrupt>
<registers>
<register>
<name>SPINLOCK_SYSTATUS_REG</name>
<description>Spinlock System Status Register</description>
<addressOffset>0x0000</addressOffset>
</register>
<register>
<name>SPINLOCK_STATUS_REG</name>
<description>Spinlock Status Register</description>
<addressOffset>0x0010</addressOffset>
</register>
<register>
<name>SPINLOCK_IRQ_EN_REG</name>
<description>Spinlock Interrupt Enable Register</description>
<addressOffset>0x0020</addressOffset>
</register>
<register>
<name>SPINLOCK_IRQ_STA_REG</name>
<description>Spinlock Interrupt Status Register</description>
<addressOffset>0x0040</addressOffset>
</register>
<register>
<name>SPINLOCK_LOCKID0_REG</name>
<description>Spinlock Lockid0 Register</description>
<addressOffset>0x0080</addressOffset>
</register>
<register>
<name>SPINLOCK_LOCKID1_REG</name>
<description>Spinlock Lockid1 Register</description>
<addressOffset>0x0084</addressOffset>
</register>
<register>
<name>SPINLOCK_LOCKID2_REG</name>
<description>Spinlock Lockid2 Register</description>
<addressOffset>0x0088</addressOffset>
</register>
<register>
<name>SPINLOCK_LOCKID3_REG</name>
<description>Spinlock Lockid3 Register</description>
<addressOffset>0x008C</addressOffset>
</register>
<register>
<name>SPINLOCK_LOCKID4_REG</name>
<description>Spinlock Lockid4 Register</description>
<addressOffset>0x0090</addressOffset>
</register>
<register>
<dim>32</dim>
<dimIncrement>0x0004</dimIncrement>
<name>SPINLOCK_LOCK_REG%s</name>
<description>Spinlock Register</description>
<addressOffset>0x0100</addressOffset>
</register>
</registers>
</peripheral>
<peripheral>
<name>RTC</name>
<description>Real Time CLock</description>
<groupName>System</groupName>
<baseAddress>0x07090000</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x1000</size>
<usage>registers</usage>
</addressBlock>
<registers>
<register>
<name>LOSC_CTRL_REG</name>
<description>Low Oscillator Control Register</description>
<addressOffset>0x0000</addressOffset>
</register>
<register>
<name>LOSC_AUTO_SWT_STA_REG</name>
<description>LOSC Auto Switch Status Register</description>
<addressOffset>0x0004</addressOffset>
</register>
<register>
<name>INTOSC_CLK_PRESCAL_REG</name>
<description>Internal OSC Clock Pre-scalar Register</description>
<addressOffset>0x0008</addressOffset>
</register>
<register>
<name>RTC_DAY_REG</name>
<description>RTC Year-Month-Day Register</description>
<addressOffset>0x0010</addressOffset>
</register>
<register>
<name>RTC_HH_MM_SS_REG</name>
<description>RTC Hour-Minute-Second Register</description>
<addressOffset>0x0014</addressOffset>
</register>
<register>
<name>ALARM0_DAY_SET_REG</name>
<description>Alarm 0 Day Setting Register</description>
<addressOffset>0x0020</addressOffset>
</register>
<register>
<name>ALARM0_CUR_VLU_REG</name>
<description>Alarm 0 Counter Current Value Register</description>
<addressOffset>0x0024</addressOffset>
</register>
<register>
<name>ALARM0_ENABLE_REG</name>
<description>Alarm 0 Enable Register</description>
<addressOffset>0x0028</addressOffset>
</register>
<register>
<name>ALARM0_IRQ_EN</name>
<description>Alarm 0 IRQ Enable Register</description>
<addressOffset>0x002C</addressOffset>
</register>
<register>
<name>ALARM0_IRQ_STA_REG</name>
<description>Alarm 0 IRQ Status Register</description>
<addressOffset>0x0030</addressOffset>
</register>
<register>
<name>ALARM_CONFIG_REG</name>
<description>Alarm Configuration Register</description>
<addressOffset>0x0050</addressOffset>
</register>
<register>
<name>_32K_FOUT_CTRL_GATING_REG</name>
<description>32K Fanout Control Gating Register</description>
<addressOffset>0x0060</addressOffset>
</register>
<register>
<dim>8</dim>
<dimIncrement>0x04</dimIncrement>
<name>GP_DATA_REG%s</name>
<description>General Purpose Register</description>
<addressOffset>0x0100</addressOffset>
</register>
<register>
<name>FBOOT_INFO_REG0</name>
<description>Fast Boot Information Register0</description>
<addressOffset>0x0120</addressOffset>
</register>
<register>
<name>FBOOT_INFO_REG1</name>
<description>Fast Boot Information Register1</description>
<addressOffset>0x0124</addressOffset>
</register>
<register>
<name>DCXO_CTRL_REG</name>
<description>DCXO Control Register</description>
<addressOffset>0x0160</addressOffset>
</register>
<register>
<name>RTC_VIO_REG</name>
<description>RTC_VIO Regulation Register</description>
<addressOffset>0x0190</addressOffset>
</register>
<register>
<name>IC_CHARA_REG</name>
<description>IC Characteristic Register</description>
<addressOffset>0x01F0</addressOffset>
</register>
<register>
<name>VDD_OFF_GATING_CTRL_REG</name>
<description>VDD Off Gating Control Register</description>
<addressOffset>0x01F4</addressOffset>
</register>
<register>
<name>EFUSE_HV_PWRSWT_CTRL_REG</name>
<description>Efuse High Voltage Power Switch Control Register</description>
<addressOffset>0x0204</addressOffset>
</register>
<register>
<name>RTC_SPI_CLK_CTRL_REG</name>
<description>RTC SPI Clock Control Register</description>
<addressOffset>0x0310</addressOffset>
</register>
</registers>
</peripheral>
<peripheral>
<name>TCON_LCD0</name>
<description>Timing COntroller LCD</description>
<groupName>VideoOutputInterfaces</groupName>
<baseAddress>0x05461000</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x1000</size>
<usage>registers</usage>
</addressBlock>
<registers>
<register>
<name>LCD_GCTL_REG</name>
<description>LCD Global Control Register</description>
<addressOffset>0x0000</addressOffset>
</register>
<register>
<name>LCD_GINT0_REG</name>
<description>LCD Global Interrupt Register0</description>
<addressOffset>0x0004</addressOffset>
</register>
<register>
<name>LCD_GINT1_REG</name>
<description>LCD Global Interrupt Register1</description>
<addressOffset>0x0008</addressOffset>
</register>
<register>
<name>LCD_FRM_CTL_REG</name>
<description>LCD FRM Control Register</description>
<addressOffset>0x0010</addressOffset>
</register>
<register>
<dim>6</dim>
<dimIncrement>0x04</dimIncrement>
<name>LCD_FRM_SEED_REG%s</name>
<description>LCD FRM Seed Register</description>
<addressOffset>0x0014</addressOffset>
</register>
<register>
<dim>4</dim>
<dimIncrement>0x04</dimIncrement>
<name>LCD_FRM_TAB_REG%s</name>
<description>LCD FRM Table Register</description>
<addressOffset>0x002C</addressOffset>
</register>
<register>
<name>LCD_3D_FIFO_REG</name>
<description>LCD 3D FIFO Register</description>
<addressOffset>0x003C</addressOffset>
</register>
<register>
<name>LCD_CTL_REG</name>
<description>LCD Control Register</description>
<addressOffset>0x0040</addressOffset>
</register>
<register>
<name>LCD_DCLK_REG</name>
<description>LCD Data Clock Register</description>
<addressOffset>0x0044</addressOffset>
</register>
<register>
<name>LCD_BASIC0_REG</name>
<description>LCD Basic Timing Register0</description>
<addressOffset>0x0048</addressOffset>
</register>
<register>
<name>LCD_BASIC1_REG</name>
<description>LCD Basic Timing Register1</description>
<addressOffset>0x004C</addressOffset>
</register>
<register>
<name>LCD_BASIC2_REG</name>
<description>LCD Basic Timing Register2</description>
<addressOffset>0x0050</addressOffset>
</register>
<register>
<name>LCD_BASIC3_REG</name>
<description>LCD Basic Timing Register3</description>
<addressOffset>0x0054</addressOffset>
</register>
<register>
<name>LCD_HV_IF_REG</name>
<description>LCD HV Panel Interface Register</description>
<addressOffset>0x0058</addressOffset>
</register>
<register>
<name>LCD_CPU_IF_REG</name>
<description>LCD CPU Panel Interface Register</description>
<addressOffset>0x0060</addressOffset>
</register>
<register>
<name>LCD_CPU_WR_REG</name>
<description>LCD CPU Panel Write Data Register</description>
<addressOffset>0x0064</addressOffset>
</register>
<register>
<name>LCD_CPU_RD0_REG</name>
<description>LCD CPU Panel Read Data Register0</description>
<addressOffset>0x0068</addressOffset>
</register>
<register>
<name>LCD_CPU_RD1_REG</name>
<description>LCD CPU Panel Read Data Register1</description>
<addressOffset>0x006C</addressOffset>
</register>
<register>
<name>LCD_LVDS_IF_REG</name>
<description>LCD LVDS Configure Register</description>
<addressOffset>0x0084</addressOffset>
</register>
<register>
<name>LCD_IO_POL_REG</name>
<description>LCD IO Polarity Register</description>
<addressOffset>0x0088</addressOffset>
</register>
<register>
<name>LCD_IO_TRI_REG</name>
<description>LCD IO Control Register</description>
<addressOffset>0x008C</addressOffset>
</register>
<register>
<name>LCD_DEBUG_REG</name>
<description>LCD Debug Register</description>
<addressOffset>0x00FC</addressOffset>
</register>
<register>
<name>LCD_CEU_CTL_REG</name>
<description>LCD CEU Control Register</description>
<addressOffset>0x0100</addressOffset>
</register>
<register>
<!-- It appears that the documentation for this register is incorrect -->
<!-- Need More Information -->
<dim>3</dim>
<dimIncrement>0x04</dimIncrement>
<name>LCD_CEU_COEF_MUL_REG%s</name>
<description>LCD CEU Coefficient Register0</description>
<addressOffset>0x0110</addressOffset>
</register>
<register>
<dim>3</dim>
<dimIncrement>0x10</dimIncrement>
<name>LCD_CEU_COEF_ADD_REG%s</name>
<description>LCD CEU Coefficient Register1</description>
<addressOffset>0x011C</addressOffset>
</register>
<register>
<dim>3</dim>
<dimIncrement>0x04</dimIncrement>
<name>LCD_CEU_COEF_RANG_REG%s</name>
<description>LCD CEU Coefficient Register2</description>
<addressOffset>0x0140</addressOffset>
</register>
<register>
<name>LCD_CPU_TRI0_REG</name>
<description>LCD CPU Panel Trigger Register0</description>
<addressOffset>0x0160</addressOffset>
</register>
<register>
<name>LCD_CPU_TRI1_REG</name>
<description>LCD CPU Panel Trigger Register1</description>
<addressOffset>0x0164</addressOffset>
</register>
<register>
<name>LCD_CPU_TRI2_REG</name>
<description>LCD CPU Panel Trigger Register2</description>
<addressOffset>0x0168</addressOffset>
</register>
<register>
<name>LCD_CPU_TRI3_REG</name>
<description>LCD CPU Panel Trigger Register3</description>
<addressOffset>0x016C</addressOffset>
</register>
<register>
<name>LCD_CPU_TRI4_REG</name>
<description>LCD CPU Panel Trigger Register4</description>
<addressOffset>0x0170</addressOffset>
</register>
<register>
<name>LCD_CPU_TRI5_REG</name>
<description>LCD CPU Panel Trigger Register5</description>
<addressOffset>0x0174</addressOffset>
</register>
<register>
<name>LCD_CMAP_CTL_REG</name>
<description>LCD Color Map Control Register</description>
<addressOffset>0x0180</addressOffset>
</register>
<register>
<name>LCD_CMAP_ODD0_REG</name>
<description>LCD Color Map Odd Line Register0</description>
<addressOffset>0x0190</addressOffset>
</register>
<register>
<name>LCD_CMAP_ODD1_REG</name>
<description>LCD Color Map Odd Line Register1</description>
<addressOffset>0x0194</addressOffset>
</register>
<register>
<name>LCD_CMAP_EVEN0_REG</name>
<description>LCD Color Map Even Line Register0</description>
<addressOffset>0x0198</addressOffset>
</register>
<register>
<name>LCD_CMAP_EVEN1_REG</name>
<description>LCD Color Map Even Line Register1</description>
<addressOffset>0x019C</addressOffset>
</register>
<register>
<name>LCD_SAFE_PERIOD_REG</name>
<description>LCD Safe Period Register</description>
<addressOffset>0x01F0</addressOffset>
</register>
<register>
<name>LCD_LVDS0_ANA_REG</name>
<description>LCD LVDS Analog Register 0</description>
<addressOffset>0x0220</addressOffset>
</register>
<register>
<name>LCD_LVDS1_ANA_REG</name>
<description>LCD LVDS Analog Register 1</description>
<addressOffset>0x0224</addressOffset>
</register>
<register>
<name>LCD_SYNC_CTL_REG</name>
<description>LCD Sync Control Register</description>
<addressOffset>0x0230</addressOffset>
</register>
<register>
<name>LCD_SYNC_POS_REG</name>
<description>LCD Sync Position Register</description>
<addressOffset>0x0234</addressOffset>
</register>
<register>
<name>LCD_SLAVE_STOP_POS_REG</name>
<description>LCD Slave Stop Position Register</description>
<addressOffset>0x0238</addressOffset>
</register>
<register>
<name>LCD_LVDS1_IF_REG</name>
<description>LCD LVDS1 IF Register</description>
<addressOffset>0x0244</addressOffset>
</register>
<register>
<dim>256</dim>
<dimIncrement>0x04</dimIncrement>
<name>LCD_GAMMA_TABLE_REG%s</name>
<description>LCD Gamma Table Register</description>
<addressOffset>0x0400</addressOffset>
</register>
</registers>
</peripheral>
<peripheral>
<name>TCON_TV0</name>
<description>Timing COntroller TV</description>
<groupName>VideoOutputInterfaces</groupName>
<baseAddress>0x05470000</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x1000</size>
<usage>registers</usage>
</addressBlock>
<registers>
<register>
<name>TV_GCTL_REG</name>
<description>TV Global Control Register</description>
<addressOffset>0x0000</addressOffset>
</register>
<register>
<name>TV_GINT0_REG</name>
<description>TV Global Interrupt Register0</description>
<addressOffset>0x0004</addressOffset>
</register>
<register>
<name>TV_GINT1_REG</name>
<description>TV Global Interrupt Register1</description>
<addressOffset>0x0008</addressOffset>
</register>
<register>
<name>TV_SRC_CTL_REG</name>
<description>TV Source Control Register</description>
<addressOffset>0x0040</addressOffset>
</register>
<register>
<name>TV_CTL_REG</name>
<description>TV Control Register</description>
<addressOffset>0x0090</addressOffset>
</register>
<register>
<name>TV_BASIC0_REG</name>
<description>TV Basic Timing Register0</description>
<addressOffset>0x0094</addressOffset>
</register>
<register>
<name>TV_BASIC1_REG</name>
<description>TV Basic Timing Register1</description>
<addressOffset>0x0098</addressOffset>
</register>
<register>
<name>TV_BASIC2_REG</name>
<description>TV Basic Timing Register2</description>
<addressOffset>0x009C</addressOffset>
</register>
<register>
<name>TV_BASIC3_REG</name>
<description>TV Basic Timing Register3</description>
<addressOffset>0x00A0</addressOffset>
</register>
<register>
<name>TV_BASIC4_REG</name>
<description>TV Basic Timing Register4</description>
<addressOffset>0x00A4</addressOffset>
</register>
<register>
<name>TV_BASIC5_REG</name>
<description>TV Basic Timing Register5</description>
<addressOffset>0x00A8</addressOffset>
</register>
<register>
<name>TV_IO_POL_REG</name>
<description>TV SYNC Signal Polarity Register</description>
<addressOffset>0x0088</addressOffset>
</register>
<register>
<name>TV_IO_TRI_REG</name>
<description>TV SYNC Signal IO Control Register</description>
<addressOffset>0x008C</addressOffset>
</register>
<register>
<name>TV_DEBUG_REG</name>
<description>TV Debug Register</description>
<addressOffset>0x00FC</addressOffset>
</register>
<register>
<name>TV_CEU_CTL_REG</name>
<description>TV CEU Control Register</description>
<addressOffset>0x0100</addressOffset>
</register>
<register>
<dim>11</dim>
<dimIncrement>0x04</dimIncrement>
<name>TV_CEU_COEF_MUL_REG%s</name>
<description>TV CEU Coefficient Register0</description>
<addressOffset>0x0110</addressOffset>
</register>
<register>
<dim>3</dim>
<dimIncrement>0x04</dimIncrement>
<name>TV_CEU_COEF_RANG_REG%s</name>
<description>TV CEU Coefficient Register2</description>
<addressOffset>0x0140</addressOffset>
</register>
<register>
<name>TV_SAFE_PERIOD_REG</name>
<description>TV Safe Period Register</description>
<addressOffset>0x01F0</addressOffset>
</register>
<register>
<name>TV_FILL_CTL_REG</name>
<description>TV Fill Data Control Register</description>
<addressOffset>0x0300</addressOffset>
</register>
<register>
<dim>3</dim>
<dimIncrement>0x0C</dimIncrement>
<name>TV_FILL_BEGIN_REG%s</name>
<description>TV Fill Data Begin Register</description>
<addressOffset>0x0304</addressOffset>
</register>
<register>
<dim>3</dim>
<dimIncrement>0x0C</dimIncrement>
<name>TV_FILL_END_REG%s</name>
<description>TV Fill Data End Register</description>
<addressOffset>0x0308</addressOffset>
</register>
<register>
<dim>3</dim>
<dimIncrement>0x0C</dimIncrement>
<name>TV_FILL_DATA_REG%s</name>
<description>TV Fill Data Value Register</description>
<addressOffset>0x030C</addressOffset>
</register>
<register>
<name>TV_DATA_IO_POL0_REG</name>
<description>TCON Data IO Polarity Control0</description>
<addressOffset>0x0330</addressOffset>
</register>
<register>
<name>TV_DATA_IO_POL1_REG</name>
<description>TCON Data IO Polarity Control1</description>
<addressOffset>0x0334</addressOffset>
</register>
<register>
<name>TV_DATA_IO_TRI0_REG</name>
<description>TCON Data IO Enable Control0</description>
<addressOffset>0x0338</addressOffset>
</register>
<register>
<name>TV_DATA_IO_TRI1_REG</name>
<description>TCON Data IO Enable Control1</description>
<addressOffset>0x033C</addressOffset>
</register>
<register>
<name>TV_PIXELDEPTH_MODE_REG</name>
<description>TV Pixeldepth Mode Control Register</description>
<addressOffset>0x0340</addressOffset>
</register>
</registers>
</peripheral>
<peripheral>
<name>TVE_TOP</name>
<description>TV Encoder TOP</description>
<groupName>VideoOutputInterfaces</groupName>
<baseAddress>0x05600000</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x4000</size>
<usage>registers</usage>
</addressBlock>
<registers>
<register>
<name>TVE_DAC_MAP</name>
<description>TV Encoder DAC MAP Register</description>
<addressOffset>0x0020</addressOffset>
</register>
<register>
<name>TVE_DAC_STATUS</name>
<description>TV Encoder DAC STAUTS Register</description>
<addressOffset>0x0024</addressOffset>
</register>
<register>
<name>TVE_DAC_CFG0</name>
<description>TV Encoder DAC CFG0 Register</description>
<addressOffset>0x0028</addressOffset>
</register>
<register>
<name>TVE_DAC_CFG1</name>
<description>TV Encoder DAC CFG1 Register</description>
<addressOffset>0x002C</addressOffset>
</register>
<register>
<name>TVE_DAC_CFG2</name>
<description>TV Encoder DAC CFG2 Register</description>
<addressOffset>0x0030</addressOffset>
</register>
<register>
<name>TVE_DAC_CFG3</name>
<description>TV Encoder DAC CFG2 Register</description>
<addressOffset>0x0034</addressOffset>
</register>
<register>
<name>TVE_DAC_TEST</name>
<description>TV Encoder DAC TEST Register</description>
<addressOffset>0x00F0</addressOffset>
</register>
</registers>
</peripheral>
<peripheral>
<name>TVE</name>
<description>TV Encoder</description>
<groupName>VideoOutputInterfaces</groupName>
<baseAddress>0x05604000</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x4000</size>
<usage>registers</usage>
</addressBlock>
<registers>
<register>
<name>TVE_000_REG</name>
<description>TV Encoder Clock Gating Register</description>
<addressOffset>0x0000</addressOffset>
</register>
<register>
<name>TVE_004_REG</name>
<description>TV Encoder Configuration Register</description>
<addressOffset>0x0004</addressOffset>
</register>
<register>
<name>TVE_008_REG</name>
<description>TV Encoder DAC Register1</description>
<addressOffset>0x0008</addressOffset>
</register>
<register>
<name>TVE_00C_REG</name>
<description>TV Encoder Notch and DAC Delay Register</description>
<addressOffset>0x000C</addressOffset>
</register>
<register>
<name>TVE_010_REG</name>
<description>TV Encoder Chroma Frequency Register</description>
<addressOffset>0x0010</addressOffset>
</register>
<register>
<name>TVE_014_REG</name>
<description>TV Encoder Front/Back Porch Register</description>
<addressOffset>0x0014</addressOffset>
</register>
<register>
<name>TVE_018_REG</name>
<description>TV Encoder HD Mode VSYNC Register</description>
<addressOffset>0x0018</addressOffset>
</register>
<register>
<name>TVE_01C_REG</name>
<description>TV Encoder Line Number Register</description>
<addressOffset>0x001C</addressOffset>
</register>
<register>
<name>TVE_020_REG</name>
<description>TV Encoder Level Register</description>
<addressOffset>0x0020</addressOffset>
</register>
<register>
<name>TVE_024_REG</name>
<description>TV Encoder DAC Register2</description>
<addressOffset>0x0024</addressOffset>
</register>
<register>
<name>TVE_030_REG</name>
<description>TV Encoder Auto Detection Enable Register</description>
<addressOffset>0x0030</addressOffset>
</register>
<register>
<name>TVE_034_REG</name>
<description>TV Encoder Auto Detection Interrupt Status Register</description>
<addressOffset>0x0034</addressOffset>
</register>
<register>
<name>TVE_038_REG</name>
<description>TV Encoder Auto Detection Status Register</description>
<addressOffset>0x0038</addressOffset>
</register>
<register>
<name>TVE_03C_REG</name>
<description>TV Encoder Auto Detection De-bounce Setting Register</description>
<addressOffset>0x003C</addressOffset>
</register>
<register>
<name>TVE_0F8_REG</name>
<description>TV Encoder Auto Detect Configuration Register0</description>
<addressOffset>0x00F8</addressOffset>
</register>
<register>
<name>TVE_0FC_REG</name>
<description>TV Encoder Auto Detect Configuration Register1</description>
<addressOffset>0x00FC</addressOffset>
</register>
<register>
<name>TVE_100_REG</name>
<description>TV Encoder Color Burst Phase Reset Configuration Register</description>
<addressOffset>0x0100</addressOffset>
</register>
<register>
<name>TVE_104_REG</name>
<description>TV Encoder VSYNC Number Register</description>
<addressOffset>0x0104</addressOffset>
</register>
<register>
<name>TVE_108_REG</name>
<description>TV Encoder Notch Filter Frequency Register</description>
<addressOffset>0x0108</addressOffset>
</register>
<register>
<name>TVE_10C_REG</name>
<description>TV Encoder Cb/Cr Level/Gain Register</description>
<addressOffset>0x010C</addressOffset>
</register>
<register>
<name>TVE_110_REG</name>
<description>TV Encoder Tint and Color Burst Phase Register</description>
<addressOffset>0x0110</addressOffset>
</register>
<register>
<name>TVE_114_REG</name>
<description>TV Encoder Burst Width Register</description>
<addressOffset>0x0114</addressOffset>
</register>
<register>
<name>TVE_118_REG</name>
<description>TV Encoder Cb/Cr Gain Register</description>
<addressOffset>0x0118</addressOffset>
</register>
<register>
<name>TVE_11C_REG</name>
<description>TV Encoder Sync and VBI Level Register</description>
<addressOffset>0x011C</addressOffset>
</register>
<register>
<name>TVE_120_REG</name>
<description>TV Encoder White Level Register</description>
<addressOffset>0x0120</addressOffset>
</register>
<register>
<name>TVE_124_REG</name>
<description>TV Encoder Video Active Line Register</description>
<addressOffset>0x0124</addressOffset>
</register>
<register>
<name>TVE_128_REG</name>
<description>TV Encoder Video Chroma BW and CompGain Register</description>
<addressOffset>0x0128</addressOffset>
</register>
<register>
<name>TVE_12C_REG</name>
<description>TV Encoder Register</description>
<addressOffset>0x012C</addressOffset>
</register>
<register>
<name>TVE_130_REG</name>
<description>TV Encoder Re-sync Parameters Register</description>
<addressOffset>0x0130</addressOffset>
</register>
<register>
<name>TVE_134_REG</name>
<description>TV Encoder Slave Parameter Register</description>
<addressOffset>0x0134</addressOffset>
</register>
<register>
<name>TVE_138_REG</name>
<description>TV Encoder Configuration Register0</description>
<addressOffset>0x0138</addressOffset>
</register>
<register>
<name>TVE_13C_REG</name>
<description>TV Encoder Configuration Register1</description>
<addressOffset>0x013C</addressOffset>
</register>
<register>
<name>TVE_380_REG</name>
<description>TV Encoder Low Pass Control Register</description>
<addressOffset>0x0380</addressOffset>
</register>
<register>
<name>TVE_384_REG</name>
<description>TV Encoder Low Pass Filter Control Register</description>
<addressOffset>0x0384</addressOffset>
</register>
</registers>
</peripheral>
<peripheral>
<name>CSIC</name>
<description>CMOS Sensor Interface Controller</description>
<groupName>VideoInputInterfaces</groupName>
<baseAddress>0x05800000</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x400000</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>CSI_DMA0</name>
<value>111</value>
</interrupt>
<interrupt>
<name>CSI_DMA1</name>
<value>112</value>
</interrupt>
<interrupt>
<name>CSI_TOP_PKT</name>
<value>122</value>
</interrupt>
<registers>
<cluster>
<name>CSIC_CCU</name>
<description>CSIC_CCU</description>
<addressOffset>0x0000</addressOffset>
<register>
<name>CCU_CLK_MODE_REG</name>
<description>CCU Clock Mode Register</description>
<addressOffset>0x0000</addressOffset>
</register>
<register>
<name>CCU_PARSER_CLK_EN_REG</name>
<description>CCU Parser Clock Enable Register</description>
<addressOffset>0x0004</addressOffset>
</register>
<register>
<name>CCU_POST0_CLK_EN_REG</name>
<description>CCU Post0 Clock Enable Register</description>
<addressOffset>0x000C</addressOffset>
</register>
</cluster>
<cluster>
<name>CSIC_TOP</name>
<description>CSIC_TOP</description>
<addressOffset>0x0800</addressOffset>
<register>
<name>CSIC_TOP_EN_REG</name>
<description>CSIC TOP Enable Register</description>
<addressOffset>0x0000</addressOffset>
</register>
<register>
<name>CSIC_PTN_GEN_EN_REG</name>
<description>CSIC Pattern Generation Enable Register</description>
<addressOffset>0x0004</addressOffset>
</register>
<register>
<name>CSIC_PTN_CTRL_REG</name>
<description>CSIC Pattern Control Register</description>
<addressOffset>0x0008</addressOffset>
</register>
<register>
<name>CSIC_PTN_LEN_REG</name>
<description>CSIC Pattern Generation Length Register</description>
<addressOffset>0x0020</addressOffset>
</register>
<register>
<name>CSIC_PTN_ADDR_REG</name>
<description>CSIC Pattern Generation Address Register</description>
<addressOffset>0x0024</addressOffset>
</register>
<register>
<name>CSIC_PTN_ISP_SIZE_REG</name>
<description>CSIC Pattern ISP Size Register</description>
<addressOffset>0x0028</addressOffset>
</register>
<register>
<name>CSIC_DMA0_INPUT_SEL_REG</name>
<description>CSIC DMA0 Input Select Register</description>
<addressOffset>0x00A0</addressOffset>
</register>
<register>
<name>CSIC_DMA1_INPUT_SEL_REG</name>
<description>CSIC DMA1 Input Select Register</description>
<addressOffset>0x00A4</addressOffset>
</register>
<register>
<name>CSIC_BIST_CS_REG</name>
<description>CSIC BIST CS Register</description>
<addressOffset>0x00DC</addressOffset>
</register>
<register>
<name>CSIC_BIST_CONTROL_REG</name>
<description>CSIC BIST Control Register</description>
<addressOffset>0x00E0</addressOffset>
</register>
<register>
<name>CSIC_BIST_START_REG</name>
<description>CSIC BIST Start Register</description>
<addressOffset>0x00E4</addressOffset>
</register>
<register>
<name>CSIC_BIST_END_REG</name>
<description>CSIC BIST End Register</description>
<addressOffset>0x00E8</addressOffset>
</register>
<register>
<name>CSIC_BIST_DATA_MASK_REG</name>
<description>CSIC BIST Data Mask Register</description>
<addressOffset>0x00EC</addressOffset>
</register>
<register>
<name>CSIC_MBUS_REQ_MAX_REG</name>
<description>CSIC MBUS REQ MAX Register</description>
<addressOffset>0x00F0</addressOffset>
</register>
<register>
<name>CSIC_MULF_MOD_REG</name>
<description>CSIC Multi-Frame Mode Register</description>
<addressOffset>0x0100</addressOffset>
</register>
<register>
<name>CSIC_MULF_INT_REG</name>
<description>CSIC Multi-Frame Interrupt Register</description>
<addressOffset>0x0104</addressOffset>
</register>
</cluster>
<cluster>
<name>CSIC_PARSER0</name>
<description>CSIC_PARSER0</description>
<addressOffset>0x1000</addressOffset>
<register>
<name>PRS_EN_REG</name>
<description>Parser Enable Register</description>
<addressOffset>0x0000</addressOffset>
</register>
<register>
<name>PRS_NCSIC_IF_CFG_REG</name>
<description>Parser NCSIC Interface Configuration Register</description>
<addressOffset>0x0004</addressOffset>
</register>
<register>
<name>PRS_CAP_REG</name>
<description>Parser Capture Register</description>
<addressOffset>0x000C</addressOffset>
</register>
<register>
<name>CSIC_PRS_SIGNAL_STA_REG</name>
<description>CSIC Parser Signal Status Register</description>
<addressOffset>0x0010</addressOffset>
</register>
<register>
<name>CSIC_PRS_NCSIC_BT656_HEAD_CFG_REG</name>
<description>CSIC Parser NCSIC BT656 Header Configuration Register</description>
<addressOffset>0x0014</addressOffset>
</register>
<register>
<name>PRS_C0_INFMT_REG</name>
<description>Parser Channel_0 Input Format Register</description>
<addressOffset>0x0024</addressOffset>
</register>
<register>
<name>PRS_C0_OUTPUT_HSIZE_REG</name>
<description>Parser Channel_0 Output Horizontal Size Register</description>
<addressOffset>0x0028</addressOffset>
</register>
<register>
<name>PRS_C0_OUTPUT_VSIZE_REG</name>
<description>Parser Channel_0 Output Vertical Size Register</description>
<addressOffset>0x002C</addressOffset>
</register>
<register>
<name>PRS_C0_INPUT_PARA0_REG</name>
<description>Parser Channel_0 Input Parameter0 Register</description>
<addressOffset>0x0030</addressOffset>
</register>
<register>
<name>PRS_C0_INPUT_PARA1_REG</name>
<description>Parser Channel_0 Input Parameter1 Register</description>
<addressOffset>0x0034</addressOffset>
</register>
<register>
<name>PRS_C0_INPUT_PARA2_REG</name>
<description>Parser Channel_0 Input Parameter2 Register</description>
<addressOffset>0x0038</addressOffset>
</register>
<register>
<name>PRS_C0_INPUT_PARA3_REG</name>
<description>Parser Channel_0 Input Parameter3 Register</description>
<addressOffset>0x003C</addressOffset>
</register>
<register>
<name>PRS_C0_INT_EN_REG</name>
<description>Parser Channel_0 Interrupt Enable Register</description>
<addressOffset>0x0040</addressOffset>
</register>
<register>
<name>PRS_C0_INT_STA_REG</name>
<description>Parser Channel_0 Interrupt Status Register</description>
<addressOffset>0x0044</addressOffset>
</register>
<register>
<name>PRS_CH0_LINE_TIME_REG</name>
<description>Parser Channel_0 Line Time Register</description>
<addressOffset>0x0048</addressOffset>
</register>
<register>
<name>PRS_C1_INFMT_REG</name>
<description>Parser Channel_1 Input Format Register</description>
<addressOffset>0x0124</addressOffset>
</register>
<register>
<name>PRS_C1_OUTPUT_HSIZE_REG</name>
<description>Parser Channel_1 Output Horizontal Size</description>
<addressOffset>0x0128</addressOffset>
</register>
<register>
<name>PRS_C1_OUTPUT_VSIZE_REG</name>
<description>Parser Channel_1 Output Vertical Size Register</description>
<addressOffset>0x012C</addressOffset>
</register>
<register>
<name>PRS_C1_INPUT_PARA0_REG</name>
<description>Parser Channel_1 Input Parameter0 Register</description>
<addressOffset>0x0130</addressOffset>
</register>
<register>
<name>PRS_C1_INPUT_PARA1_REG</name>
<description>Parser Channel_1 Input Parameter1 Register</description>
<addressOffset>0x0134</addressOffset>
</register>
<register>
<name>PRS_C1_INPUT_PARA2_REG</name>
<description>Parser Channel_1 Input Parameter2 Register</description>
<addressOffset>0x0138</addressOffset>
</register>
<register>
<name>PRS_C1_INPUT_PARA3_REG</name>
<description>Parser Channel_1 Input Parameter3 Register</description>
<addressOffset>0x013C</addressOffset>
</register>
<register>
<name>PRS_C1_INT_EN_REG</name>
<description>Parser Channel_1 Interrupt Enable Register</description>
<addressOffset>0x0140</addressOffset>
</register>
<register>
<name>PRS_C1_INT_STA_REG</name>
<description>Parser Channel_1 Interrupt Status Register</description>
<addressOffset>0x0144</addressOffset>
</register>
<register>
<name>PRS_CH1_LINE_TIME_REG</name>
<description>Parser Channel_1 Line Time Register</description>
<addressOffset>0x0148</addressOffset>
</register>
<register>
<name>PRS_C2_INFMT_REG</name>
<description>Parser Channel_2 Input Format Register</description>
<addressOffset>0x0224</addressOffset>
</register>
<register>
<name>PRS_C2_OUTPUT_HSIZE_REG</name>
<description>Parser Channel_2 Output Horizontal Size Register</description>
<addressOffset>0x0228</addressOffset>
</register>
<register>
<name>PRS_C2_OUTPUT_VSIZE_REG</name>
<description>Parser Channel_2 Output Vertical Size Register</description>
<addressOffset>0x022C</addressOffset>
</register>
<register>
<name>PRS_C2_INPUT_PARA0_REG</name>
<description>Parser Channel_2 Input Parameter0 Register</description>
<addressOffset>0x0230</addressOffset>
</register>
<register>
<name>PRS_C2_INPUT_PARA1_REG</name>
<description>Parser Channel_2 Input Parameter1 Register</description>
<addressOffset>0x0234</addressOffset>
</register>
<register>
<name>PRS_C2_INPUT_PARA2_REG</name>
<description>Parser Channel_2 Input Parameter2 Register</description>
<addressOffset>0x0238</addressOffset>
</register>
<register>
<name>PRS_C2_INPUT_PARA3_REG</name>
<description>Parser Channel_2 Input Parameter3 Register</description>
<addressOffset>0x023C</addressOffset>
</register>
<register>
<name>PRS_C2_INT_EN_REG</name>
<description>Parser Channel_2 Interrupt Enable Register</description>
<addressOffset>0x0240</addressOffset>
</register>
<register>
<name>PRS_C2_INT_STA_REG</name>
<description>Parser Channel_2 Interrupt Status Register</description>
<addressOffset>0x0244</addressOffset>
</register>
<register>
<name>PRS_CH2_LINE_TIME_REG</name>
<description>Parser Channel_2 Line Time Register</description>
<addressOffset>0x0248</addressOffset>
</register>
<register>
<name>PRS_C3_INFMT_REG</name>
<description>Parser Channel_3 Input Format Register</description>
<addressOffset>0x0324</addressOffset>
</register>
<register>
<name>PRS_C3_OUTPUT_HSIZE_REG</name>
<description>Parser Channel_3 Output Horizontal Size Register</description>
<addressOffset>0x0328</addressOffset>
</register>
<register>
<name>PRS_C3_OUTPUT_VSIZE_REG</name>
<description>Parser Channel_3 Output Vertical Size Register</description>
<addressOffset>0x032C</addressOffset>
</register>
<register>
<name>PRS_C3_INPUT_PARA0_REG</name>
<description>Parser Channel_3 Input Parameter0 Register</description>
<addressOffset>0x0330</addressOffset>
</register>
<register>
<name>PRS_C3_INPUT_PARA1_REG</name>
<description>Parser Channel_3 Input Parameter1 Register</description>
<addressOffset>0x0334</addressOffset>
</register>
<register>
<name>PRS_C3_INPUT_PARA2_REG</name>
<description>Parser Channel_3 Input Parameter2 Register</description>
<addressOffset>0x0338</addressOffset>
</register>
<register>
<name>PRS_C3_INPUT_PARA3_REG</name>
<description>Parser Channel_3 Input Parameter3 Register</description>
<addressOffset>0x033C</addressOffset>
</register>
<register>
<name>PRS_C3_INT_EN_REG</name>
<description>Parser Channel_3 Interrupt Enable Register</description>
<addressOffset>0x0340</addressOffset>
</register>
<register>
<name>PRS_C3_INT_STA_REG</name>
<description>Parser Channel_3 Interrupt Status Register</description>
<addressOffset>0x0344</addressOffset>
</register>
<register>
<name>PRS_CH3_LINE_TIME_REG</name>
<description>Parser Channel_3 Line Time Register</description>
<addressOffset>0x0348</addressOffset>
</register>
<register>
<name>CSIC_PRS_NCSIC_RX_SIGNAL0_DLY_ADJ_REG</name>
<description>CSIC Parser NCSIC RX Signal0 Delay Adjust Register</description>
<addressOffset>0x0500</addressOffset>
</register>
<register>
<name>CSIC_PRS_NCSIC_RX_SIGNAL5_DLY_ADJ_REG</name>
<description>CSIC Parser NCSIC RX Signal5 Delay Adjust Register</description>
<addressOffset>0x0514</addressOffset>
</register>
<register>
<name>CSIC_PRS_NCSIC_RX_SIGNAL6_DLY_ADJ_REG</name>
<description>CSIC Parser NCSIC RX Signal6 Delay Adjust Register</description>
<addressOffset>0x0518</addressOffset>
</register>
</cluster>
<cluster>
<dim>2</dim>
<dimIncrement>0x0200</dimIncrement>
<name>CSIC_DMA%s</name>
<description>CSIC_DMA</description>
<addressOffset>0x9000</addressOffset>
<register>
<name>CSIC_DMA_EN_REG</name>
<description>CSIC DMA Enable Register</description>
<addressOffset>0x0000</addressOffset>
</register>
<register>
<name>CSIC_DMA_CFG_REG</name>
<description>CSIC DMA Configuration Register</description>
<addressOffset>0x0004</addressOffset>
</register>
<register>
<name>CSIC_DMA_HSIZE_REG</name>
<description>CSIC DMA Horizontal Size Register</description>
<addressOffset>0x0010</addressOffset>
</register>
<register>
<name>CSIC_DMA_VSIZE_REG</name>
<description>CSIC DMA Vertical Size Register</description>
<addressOffset>0x0014</addressOffset>
</register>
<register>
<name>CSIC_DMA_F0_BUFA_REG</name>
<description>CSIC DMA FIFO 0 Output Buffer-A Address Register</description>
<addressOffset>0x0020</addressOffset>
</register>
<register>
<name>CSIC_DMA_F0_BUFA_RESULT_REG</name>
<description>CSIC DMA FIFO 0 Output Buffer-A Address Result Register</description>
<addressOffset>0x0024</addressOffset>
</register>
<register>
<name>CSIC_DMA_F1_BUFA_REG</name>
<description>CSIC DMA FIFO 1 Output Buffer-A Address Register</description>
<addressOffset>0x0028</addressOffset>
</register>
<register>
<name>CSIC_DMA_F1_BUFA_RESULT_REG</name>
<description>CSIC DMA FIFO 1 Output Buffer-A Address Result Register</description>
<addressOffset>0x002C</addressOffset>
</register>
<register>
<name>CSIC_DMA_F2_BUFA_REG</name>
<description>CSIC DMA FIFO 2 Output Buffer-A Address Register</description>
<addressOffset>0x0030</addressOffset>
</register>
<register>
<name>CSIC_DMA_F2_BUFA_RESULT_REG</name>
<description>CSIC DMA FIFO 2 Output Buffer-A Address Result Register</description>
<addressOffset>0x0034</addressOffset>
</register>
<register>
<name>CSIC_DMA_BUF_LEN_REG</name>
<description>CSIC DMA Buffer Length Register</description>
<addressOffset>0x0038</addressOffset>
</register>
<register>
<name>CSIC_DMA_FLIP_SIZE_REG</name>
<description>CSIC DMA Flip Size Register</description>
<addressOffset>0x003C</addressOffset>
</register>
<register>
<name>CSIC_DMA_VI_TO_TH0_REG</name>
<description>CSIC DMA Video Input Timeout Threshold0 Register</description>
<addressOffset>0x0040</addressOffset>
</register>
<register>
<name>CSIC_DMA_VI_TO_TH1_REG</name>
<description>CSIC DMA Video Input Timeout Threshold1 Register</description>
<addressOffset>0x0044</addressOffset>
</register>
<register>
<name>CSIC_DMA_VI_TO_CNT_VAL_REG</name>
<description>CSIC DMA Video Input Timeout Counter Value Register</description>
<addressOffset>0x0048</addressOffset>
</register>
<register>
<name>CSIC_DMA_CAP_STA_REG</name>
<description>CSIC DMA Capture Status Register</description>
<addressOffset>0x004C</addressOffset>
</register>
<register>
<name>CSIC_DMA_INT_EN_REG</name>
<description>CSIC DMA Interrupt Enable Register</description>
<addressOffset>0x0050</addressOffset>
</register>
<register>
<name>CSIC_DMA_INT_STA_REG</name>
<description>CSIC DMA Interrupt Status Register</description>
<addressOffset>0x0054</addressOffset>
</register>
<register>
<name>CSIC_DMA_LINE_CNT_REG</name>
<description>CSIC DMA LINE Counter Register</description>
<addressOffset>0x0058</addressOffset>
</register>
<register>
<name>CSIC_DMA_FRM_CNT_REG</name>
<description>CSIC DMA Frame Counter Register</description>
<addressOffset>0x005C</addressOffset>
</register>
<register>
<name>CSIC_DMA_FRM_CLK_CNT_REG</name>
<description>CSIC DMA Frame Clock Counter Register</description>
<addressOffset>0x0060</addressOffset>
</register>
<register>
<name>CSIC_DMA_ACC_ITNL_CLK_CNT_REG</name>
<description>CSIC DMA Accumulated And Internal Clock Counter Register</description>
<addressOffset>0x0064</addressOffset>
</register>
<register>
<name>CSIC_DMA_FIFO_STAT_REG</name>
<description>CSIC DMA FIFO Statistic Register</description>
<addressOffset>0x0068</addressOffset>
</register>
<register>
<name>CSIC_DMA_FIFO_THRS_REG</name>
<description>CSIC DMA FIFO Threshold Register</description>
<addressOffset>0x006C</addressOffset>
</register>
<register>
<name>CSIC_DMA_PCLK_STAT_REG</name>
<description>CSIC DMA PCLK Statistic Register</description>
<addressOffset>0x0070</addressOffset>
</register>
<register>
<name>CSIC_DMA_BUF_ADDR_FIFO0_ENTRY_REG</name>
<description>CSIC DMA BUF Address FIFO0 Entry Register</description>
<addressOffset>0x0080</addressOffset>
</register>
<register>
<name>CSIC_DMA_BUF_ADDR_FIFO1_ENTRY_REG</name>
<description>CSIC DMA BUF Address FIFO1 Entry Register</description>
<addressOffset>0x0084</addressOffset>
</register>
<register>
<name>CSIC_DMA_BUF_ADDR_FIFO2_ENTRY_REG</name>
<description>CSIC DMA BUF Address FIFO2 Entry Register</description>
<addressOffset>0x0088</addressOffset>
</register>
<register>
<name>CSIC_DMA_BUF_TH_REG</name>
<description>CSIC DMA BUF Threshold Register</description>
<addressOffset>0x008C</addressOffset>
</register>
<register>
<name>CSIC_DMA_BUF_ADDR_FIFO_CON_REG</name>
<description>CSIC DMA BUF Address FIFO Content Register</description>
<addressOffset>0x0090</addressOffset>
</register>
<register>
<name>CSIC_DMA_STORED_FRM_CNT_REG</name>
<description>CSIC DMA Stored Frame Counter Register</description>
<addressOffset>0x0094</addressOffset>
</register>
<register>
<name>CSIC_FEATURE_REG</name>
<description>CSIC DMA Feature List Register</description>
<addressOffset>0x01F4</addressOffset>
</register>
</cluster>
</registers>
</peripheral>
<peripheral>
<name>TVD_TOP</name>
<description>Television Decoder TOP</description>
<groupName>VideoInputInterfaces</groupName>
<baseAddress>0x05C00000</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x1000</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>TVD</name>
<value>123</value>
</interrupt>
<registers>
<register>
<name>TVD_TOP_MAP</name>
<description>TVD TOP MAP Register</description>
<addressOffset>0x0000</addressOffset>
</register>
<register>
<name>TVD_3D_CTL1</name>
<description>TVD 3D DMA CONTROL Register1</description>
<addressOffset>0x0008</addressOffset>
</register>
<register>
<name>TVD_3D_CTL2</name>
<description>TVD 3D DMA CONTROL Register2</description>
<addressOffset>0x000C</addressOffset>
</register>
<register>
<name>TVD_3D_CTL3</name>
<description>TVD 3D DMA CONTROL Register3</description>
<addressOffset>0x0010</addressOffset>
</register>
<register>
<name>TVD_3D_CTL4</name>
<description>TVD 3D DMA CONTROL Register4</description>
<addressOffset>0x0014</addressOffset>
</register>
<register>
<name>TVD_3D_CTL5</name>
<description>TVD 3D DMA CONTROL Register5</description>
<addressOffset>0x0018</addressOffset>
</register>
<register>
<dim>4</dim>
<dimIncrement>0x20</dimIncrement>
<name>TVD_TOP_CTL%s</name>
<description>TVD TOP CONTROL Register</description>
<addressOffset>0x0024</addressOffset>
</register>
<register>
<dim>4</dim>
<dimIncrement>0x20</dimIncrement>
<name>TVD_ADC_CTL%s</name>
<description>TVD ADC CONTROL Register</description>
<addressOffset>0x0028</addressOffset>
</register>
<register>
<dim>4</dim>
<dimIncrement>0x20</dimIncrement>
<name>TVD_ADC_CFG%s</name>
<description>TVD ADC CONFIGURATION Register</description>
<addressOffset>0x002C</addressOffset>
</register>
</registers>
</peripheral>
<peripheral>
<name>TVD0</name>
<description>Television Decoder</description>
<groupName>VideoInputInterfaces</groupName>
<baseAddress>0x05C01000</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x1000</size>
<usage>registers</usage>
</addressBlock>
<registers>
<register>
<name>TVD_EN</name>
<description>TVD MODULE CONTROL Register</description>
<addressOffset>0x0000</addressOffset>
</register>
<register>
<name>TVD_MODE</name>
<description>TVD MODE CONTROL Register</description>
<addressOffset>0x0004</addressOffset>
</register>
<register>
<name>TVD_CLAMP_AGC1</name>
<description>TVD CLAMP And AGC CONTROL Register1</description>
<addressOffset>0x0008</addressOffset>
</register>
<register>
<name>TVD_CLAMP_AGC2</name>
<description>TVD CLAMP And AGC CONTROL Register2</description>
<addressOffset>0x000C</addressOffset>
</register>
<register>
<name>TVD_HLOCK1</name>
<description>TVD HLOCK CONTROL Register1</description>
<addressOffset>0x0010</addressOffset>
</register>
<register>
<name>TVD_HLOCK2</name>
<description>TVD HLOCK CONTROL Register2</description>
<addressOffset>0x0014</addressOffset>
</register>
<register>
<name>TVD_HLOCK3</name>
<description>TVD HLOCK CONTROL Register3</description>
<addressOffset>0x0018</addressOffset>
</register>
<register>
<name>TVD_HLOCK4</name>
<description>TVD HLOCK CONTROL Register4</description>
<addressOffset>0x001C</addressOffset>
</register>
<register>
<name>TVD_HLOCK5</name>
<description>TVD HLOCK CONTROL Register5</description>
<addressOffset>0x0020</addressOffset>
</register>
<register>
<name>TVD_VLOCK1</name>
<description>TVD VLOCK CONTROL Register1</description>
<addressOffset>0x0024</addressOffset>
</register>
<register>
<name>TVD_VLOCK2</name>
<description>TVD VLOCK CONTROL Register2</description>
<addressOffset>0x0028</addressOffset>
</register>
<register>
<name>TVD_CLOCK1</name>
<description>TVD CHROMA LOCK CONTROL Register1</description>
<addressOffset>0x0030</addressOffset>
</register>
<register>
<name>TVD_CLOCK2</name>
<description>TVD CHROMA LOCK CONTROL Register2</description>
<addressOffset>0x0034</addressOffset>
</register>
<register>
<name>TVD_YC_SEP1</name>
<description>TVD YC SEPERATION CONROL Register1</description>
<addressOffset>0x0040</addressOffset>
</register>
<register>
<name>TVD_YC_SEP2</name>
<description>TVD YC SEPERATION CONROL Register2</description>
<addressOffset>0x0044</addressOffset>
</register>
<register>
<name>TVD_ENHANCE1</name>
<description>TVD ENHANCEMENT CONTROL Register1</description>
<addressOffset>0x0050</addressOffset>
</register>
<register>
<name>TVD_ENHANCE2</name>
<description>TVD ENHANCEMENT CONTROL Register2</description>
<addressOffset>0x0054</addressOffset>
</register>
<register>
<name>TVD_ENHANCE3</name>
<description>TVD ENHANCEMENT CONTROL Register3</description>
<addressOffset>0x0058</addressOffset>
</register>
<register>
<name>TVD_WB1</name>
<description>TVD WB DMA CONTROL Register1</description>
<addressOffset>0x0060</addressOffset>
</register>
<register>
<name>TVD_WB2</name>
<description>TVD WB DMA CONTROL Register2</description>
<addressOffset>0x0064</addressOffset>
</register>
<register>
<name>TVD_WB3</name>
<description>TVD WB DMA CONTROL Register3</description>
<addressOffset>0x0068</addressOffset>
</register>
<register>
<name>TVD_WB4</name>
<description>TVD WB DMA CONTROL Register4</description>
<addressOffset>0x006C</addressOffset>
</register>
<register>
<name>TVD_IRQ_CTL</name>
<description>TVD DMA Interrupt Control Register</description>
<addressOffset>0x0080</addressOffset>
</register>
<register>
<name>TVD_IRQ_STATUS</name>
<description>TVD DMA Interrupt Status Register</description>
<addressOffset>0x0090</addressOffset>
</register>
<register>
<name>TVD_DEBUG1</name>
<description>TVD DEBUG CONTROL Register1</description>
<addressOffset>0x0100</addressOffset>
</register>
<register>
<name>TVD_STATUS1</name>
<description>TVD DEBUG STATUS Register1</description>
<addressOffset>0x0180</addressOffset>
</register>
<register>
<name>TVD_STATUS2</name>
<description>TVD DEBUG STATUS Register2</description>
<addressOffset>0x0184</addressOffset>
</register>
<register>
<name>TVD_STATUS3</name>
<description>TVD DEBUG STATUS Register3</description>
<addressOffset>0x0188</addressOffset>
</register>
<register>
<name>TVD_STATUS4</name>
<description>TVD DEBUG STATUS Register4</description>
<addressOffset>0x018C</addressOffset>
</register>
<register>
<name>TVD_STATUS5</name>
<description>TVD DEBUG STATUS Register5</description>
<addressOffset>0x0190</addressOffset>
</register>
<register>
<name>TVD_STATUS6</name>
<description>TVD DEBUG STATUS Register6</description>
<addressOffset>0x0194</addressOffset>
</register>
</registers>
</peripheral>
<peripheral>
<dim>3</dim>
<dimIncrement>0x1000</dimIncrement>
<name>SMHC[%s]</name>
<description>SD/MMC Host Controller</description>
<groupName>Memory</groupName>
<baseAddress>0x04020000</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x1000</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>SMHC0</name>
<value>56</value>
</interrupt>
<interrupt>
<name>SMHC1</name>
<value>57</value>
</interrupt>
<interrupt>
<name>SMHC2</name>
<value>58</value>
</interrupt>
<registers>
<register>
<name>SMHC_CTRL</name>
<description>Control Register</description>
<addressOffset>0x0000</addressOffset>
<fields>
<field>
<name>FIFO_AC_MOD</name>
<description>FIFO Accesss Mode</description>
<bitRange>[31:31]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>DMA</name>
<description>DMA bus</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB</name>
<description>AHB bus</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>TIME_UNIT_CMD</name>
<description>Time unit for command line</description>
<bitRange>[12:12]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>C1</name>
<description>1 card clock period</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>C256</name>
<description>256 card clock period</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>TIME_UNIT_DAT</name>
<description>Time unit for data line</description>
<bitRange>[11:11]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>C1</name>
<description>1 card clock period</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>C256</name>
<description>256 card clock period</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DDR_MOD_SEL</name>
<description>DDR Mode Select</description>
<bitRange>[10:10]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>SDR</name>
<description>SDR mode</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>DDR</name>
<description>DDR mode</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CD_DBC_ENB</name>
<description>Card Detect (Data[3] status) De-bounce Enable</description>
<bitRange>[8:8]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<description>Disable de-bounce</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<description>Enable de-bounce</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DMA_ENB</name>
<description>DMA Global Enable</description>
<bitRange>[5:5]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<description>Disable DMA to transfer data via AHB bus</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<description>Enable DMA to transfer data</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>INE_ENB</name>
<description>GLobal Interrupt Enable</description>
<bitRange>[4:4]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<description>Disable interrupts</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<description>Enable interrupts</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DMA_RST</name>
<description>DMA Reset</description>
<bitRange>[2:2]</bitRange>
</field>
<field>
<name>FIFO_RST</name>
<description>FIFO Reset</description>
<bitRange>[1:1]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>no_effect</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>reset</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SOFT_RST</name>
<description>Software Reset</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>no_effect</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>reset</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>SMHC_CLKDIV</name>
<description>Clock Control Register</description>
<addressOffset>0x0004</addressOffset>
<fields>
<field>
<name>MASK_DATA0</name>
<bitRange>[31:31]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>not_mask</name>
<description>Do not mask data0 when update clock</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>mask</name>
<description>Mask data0 when update clock</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CCLK_CTRL</name>
<description>Card Clock Output Control</description>
<bitRange>[17:17]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>on</name>
<description>Card clock is always on</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>off_idle</name>
<description>Turn off card clock when FSM is in IDLE state</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CCLK_ENB</name>
<description>Card Clock Enable</description>
<bitRange>[16:16]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>off</name>
<description>Card Clock is off</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>on</name>
<description>Card Clock is on</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CCLK_DIV</name>
<description>Card Clock Divider</description>
<bitRange>[7:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>SMHC_TMOUT</name>
<description>Time Out Register</description>
<addressOffset>0x0008</addressOffset>
<fields>
<field>
<name>DTO_LMT</name>
<description>Data Iimeout Limit</description>
<bitRange>[31:8]</bitRange>
</field>
<field>
<name>RTO_LMT</name>
<description>Response Timeout Limit</description>
<bitRange>[7:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>SMHC_CTYPE</name>
<description>Bus Width Register</description>
<addressOffset>0x000C</addressOffset>
<fields>
<field>
<name>CARD_WID</name>
<description>Card Width</description>
<bitRange>[1:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>b1</name>
<description>1-bit width</description>
<value>0b00</value>
</enumeratedValue>
<enumeratedValue>
<name>b4</name>
<description>4-bit width</description>
<value>0b01</value>
</enumeratedValue>
<enumeratedValue>
<name>b8</name>
<description>8-bit width</description>
<value>0b1x</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>SMHC_BLKSIZ</name>
<description>Block Size Register</description>
<addressOffset>0x0010</addressOffset>
<fields>
<field>
<name>BLK_SZ</name>
<description>Block SIze</description>
<bitRange>[15:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>SMHC_BYTCNT</name>
<description>Byte Count Register</description>
<addressOffset>0x0014</addressOffset>
</register>
<register>
<name>SMHC_CMD</name>
<description>Command Register</description>
<addressOffset>0x0018</addressOffset>
<fields>
<field>
<name>CMD_LOAD</name>
<description>Start Command</description>
<bitRange>[31:31]</bitRange>
</field>
<field>
<name>VOL_SW</name>
<description>Voltage Switch</description>
<bitRange>[28:28]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>normal</name>
<description>Normal command</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>voltage_switch</name>
<description>Voltage switch command, set for CMD11 only</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>BOOT_ABT</name>
<description>Boot Abort</description>
<bitRange>[27:27]</bitRange>
</field>
<field>
<name>EXP_BOOT_ACK</name>
<description>Expect Boot Acknowledge</description>
<bitRange>[26:26]</bitRange>
</field>
<field>
<name>BOOT_MOD</name>
<description>Boot Mode</description>
<bitRange>[25:24]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>normal</name>
<description>Normal command</description>
<value>0b00</value>
</enumeratedValue>
<enumeratedValue>
<name>mandatory_boot</name>
<description>Mandatory Boot operation</description>
<value>0b01</value>
</enumeratedValue>
<enumeratedValue>
<name>alternate_boot</name>
<description>Alternate Boot operation</description>
<value>0b10</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PRG_CLK</name>
<description>Change Clock</description>
<bitRange>[21:21]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>normal</name>
<description>Normal command</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>change</name>
<description>Change Card Clock</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SEND_INIT_SEQ</name>
<description>Send Initialization</description>
<bitRange>[15:15]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>normal</name>
<description>Normal command sending</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>init_cmd</name>
<description>Send initialization sequence before sending this command</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>STOP_ABT_CMD</name>
<description>Stop Abort Command</description>
<bitRange>[14:14]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>normal</name>
<description>Normal command sending</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>stop</name>
<description>Send Stop or Abort command to stop the current data transfer in progress</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>WAIT_PRE_OVER</name>
<description>Wait for Data Transfer Over</description>
<bitRange>[13:13]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>at_once</name>
<description>Send command at once, does not care about data transferring</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>wait</name>
<description>Wait for data transfer completion before sending the current command</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>STOP_CMD_FLAG</name>
<description>Send Stop CMD Automatically (CMD12)</description>
<bitRange>[12:12]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>no_stop</name>
<description>Do not send stop command at the end of the data transfer</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>auto_stop</name>
<description>Send stop command automatically at the end of the data transfer</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>TRANS_MODE</name>
<description>Transfer Mode</description>
<bitRange>[11:11]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>block</name>
<description>Block data transfer command</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>stream</name>
<description>Stream data transfer commmand</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>TRANS_DIR</name>
<description>Transfer Direction</description>
<bitRange>[10:10]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>read</name>
<description>Read operation</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>write</name>
<description>Write operation</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DATA_TRANS</name>
<description>Data Transfer</description>
<bitRange>[9:9]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>without</name>
<description>Without data transfer</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>with</name>
<description>With data transfer</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CHK_RESP_CRC</name>
<description>Check Response CRC</description>
<bitRange>[8:8]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>not_check</name>
<description>Do not check response CRC</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>check</name>
<description>Check response CRC</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LONG_RESP</name>
<description>Response Type</description>
<bitRange>[7:7]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>short</name>
<description>Short Response (48 bits)</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>long</name>
<description>Long Response (136 bits)</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>RESP_RCV</name>
<description>Response Receive</description>
<bitRange>[6:6]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>without</name>
<description>Command without response</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>with</name>
<description>Command with response</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CMD_IDX</name>
<description>CMD Index</description>
<bitRange>[5:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>SMHC_CMDARG</name>
<description>Command Argument Register</description>
<addressOffset>0x001C</addressOffset>
</register>
<register>
<name>SMHC_RESP0</name>
<description>Response 0 Register</description>
<addressOffset>0x0020</addressOffset>
<access>read-only</access>
</register>
<register>
<name>SMHC_RESP1</name>
<description>Response 1 Register</description>
<addressOffset>0x0024</addressOffset>
<access>read-only</access>
</register>
<register>
<name>SMHC_RESP2</name>
<description>Response 2 Register</description>
<addressOffset>0x0028</addressOffset>
<access>read-only</access>
</register>
<register>
<name>SMHC_RESP3</name>
<description>Response 3 Register</description>
<addressOffset>0x002C</addressOffset>
<access>read-only</access>
</register>
<register>
<name>SMHC_INTMASK</name>
<description>Interrupt Mask Register</description>
<addressOffset>0x0030</addressOffset>
<fields>
<field>
<name>CARD_REMOVAL_INT_EN</name>
<description>Card Removed Interrupt Enable</description>
<bitRange>[31:31]</bitRange>
</field>
<field>
<name>CARD_INSERT_INT_EN</name>
<description>Card Inserted Interrupt Enable</description>
<bitRange>[30:30]</bitRange>
</field>
<field>
<name>SDIO_INT_EN</name>
<description>SDIO Interrupt Enable</description>
<bitRange>[16:16]</bitRange>
</field>
<field>
<name>DEE_INT_EN</name>
<description>Data End-bit Error Interrupt Enable</description>
<bitRange>[15:15]</bitRange>
</field>
<field>
<name>ACD_INT_EN</name>
<description>Auto Command Done Interrupt Enable</description>
<bitRange>[14:14]</bitRange>
</field>
<field>
<name>DSE_BC_INT_EN</name>
<description>Data Start Error Interrupt Enable</description>
<bitRange>[13:13]</bitRange>
</field>
<field>
<name>CB_IW_INT_EN</name>
<description>Command Busy and Illegal Write Interrupt Enable</description>
<bitRange>[12:12]</bitRange>
</field>
<field>
<name>FU_FO_INT_EN</name>
<description>FIFO Underrun/Overflow Interrupt Enable</description>
<bitRange>[11:11]</bitRange>
</field>
<field>
<name>DSTO_VSD_INT_EN</name>
<description>Data Starvation Timeout/V1.8 Switch Done Interrupt Enable</description>
<bitRange>[10:10]</bitRange>
</field>
<field>
<name>DTO_BDS_INT_EN</name>
<description>Data Timeout/Boot Data Start Interrupt Enable</description>
<bitRange>[9:9]</bitRange>
</field>
<field>
<name>RTO_BACK_INT_EN</name>
<description>Response Timeout/Boot ACK Received Interrupt Enable</description>
<bitRange>[8:8]</bitRange>
</field>
<field>
<name>DCE_INT_EN</name>
<description>Data CRC Error Interrupt Enable</description>
<bitRange>[7:7]</bitRange>
</field>
<field>
<name>RCE_INT_EN</name>
<description>Response CRC Error Interrupt Enable</description>
<bitRange>[6:6]</bitRange>
</field>
<field>
<name>DRR_INT_EN</name>
<description>Data Receive Request Interrupt Enable</description>
<bitRange>[5:5]</bitRange>
</field>
<field>
<name>DTR_INT_EN</name>
<description>Data Transmit Request Interrupt Enable</description>
<bitRange>[4:4]</bitRange>
</field>
<field>
<name>DTC_INT_EN</name>
<description>Data Transfer Complete Interrupt Enable</description>
<bitRange>[3:3]</bitRange>
</field>
<field>
<name>CC_INT_EN</name>
<description>Command Complete Interrupt Enable</description>
<bitRange>[2:2]</bitRange>
</field>
<field>
<name>RE_INT_EN</name>
<description>Response Error Interrupt Enable</description>
<bitRange>[1:1]</bitRange>
</field>
</fields>
</register>
<register>
<name>SMHC_MINTSTS</name>
<description>Masked Interrupt Status Register</description>
<addressOffset>0x0034</addressOffset>
<access>read-only</access>
<fields>
<field>
<name>M_CARD_REMOVAL_INT</name>
<description>Card Removed</description>
<bitRange>[31:31]</bitRange>
</field>
<field>
<name>M_CARD_INSERT</name>
<description>Card Inserted</description>
<bitRange>[30:30]</bitRange>
</field>
<field>
<name>M_SDIO_INT</name>
<description>SDIO Interrupt</description>
<bitRange>[16:16]</bitRange>
</field>
<field>
<name>M_DEE_INT</name>
<description>Data End-bit Error</description>
<bitRange>[15:15]</bitRange>
</field>
<field>
<name>M_ACD_INT</name>
<description>Auto Command Done</description>
<bitRange>[14:14]</bitRange>
</field>
<field>
<name>M_DSE_BC_INT</name>
<description>Data Start Error/Busy Clear</description>
<bitRange>[13:13]</bitRange>
</field>
<field>
<name>M_CB_IW_INT</name>
<description>Command Busy and Illegal Write</description>
<bitRange>[12:12]</bitRange>
</field>
<field>
<name>M_FU_FO_INT</name>
<description>FIFO Underrun/Overflow</description>
<bitRange>[11:11]</bitRange>
</field>
<field>
<name>M_DSTO_VSD_INT</name>
<description>Data Starvation Timeout/V1.8 Switch Done</description>
<bitRange>[10:10]</bitRange>
</field>
<field>
<name>M_DTO_BDS_INT</name>
<description>Data Timeout/Boot Data Start</description>
<bitRange>[9:9]</bitRange>
</field>
<field>
<name>M_RTO_BACK_INT</name>
<description>Response Timeout/Boot ACK Received</description>
<bitRange>[8:8]</bitRange>
</field>
<field>
<name>M_DCE_INT</name>
<description>Data CRC Error</description>
<bitRange>[7:7]</bitRange>
</field>
<field>
<name>M_RCE_INT</name>
<description>Response CRC Error</description>
<bitRange>[6:6]</bitRange>
</field>
<field>
<name>M_DRR_INT</name>
<description>Data Receive Request</description>
<bitRange>[5:5]</bitRange>
</field>
<field>
<name>M_DTR_INT</name>
<description>Data Transmit Request</description>
<bitRange>[4:4]</bitRange>
</field>
<field>
<name>M_DTC_INT</name>
<description>Data Transfer Complete</description>
<bitRange>[3:3]</bitRange>
</field>
<field>
<name>M_CC_INT</name>
<description>Command Complete</description>
<bitRange>[2:2]</bitRange>
</field>
<field>
<name>M_RE_INT</name>
<description>Response Errors</description>
<bitRange>[1:1]</bitRange>
</field>
</fields>
</register>
<register>
<name>SMHC_RINTSTS</name>
<description>Raw Interrupt Status Register</description>
<addressOffset>0x0038</addressOffset>
<fields>
<field>
<name>CARD_REMOVAL</name>
<description>Card Removed</description>
<bitRange>[31:31]</bitRange>
</field>
<field>
<name>CARD_INSERT</name>
<description>Card Inserted</description>
<bitRange>[30:30]</bitRange>
</field>
<field>
<name>SDIOI_INT</name>
<description>SDIO Interrupt</description>
<bitRange>[16:16]</bitRange>
</field>
<field>
<name>DEE</name>
<description>Data End-bit Error</description>
<bitRange>[15:15]</bitRange>
</field>
<field>
<name>ACD</name>
<description>Auto Command Done</description>
<bitRange>[14:14]</bitRange>
</field>
<field>
<name>DSE_BC</name>
<description>Data Start Error/Busy Clear</description>
<bitRange>[13:13]</bitRange>
</field>
<field>
<name>CB_IW</name>
<description>Command Busy and Illegal Write</description>
<bitRange>[12:12]</bitRange>
</field>
<field>
<name>FU_FO</name>
<description>FIFO Underrun/Overflow</description>
<bitRange>[11:11]</bitRange>
</field>
<field>
<name>DSTO_VSD</name>
<description>Data Starvation Timeout/V1.8 Switch Done</description>
<bitRange>[10:10]</bitRange>
</field>
<field>
<name>DTO_BDS</name>
<description>Data Timeout/Boot Data Start</description>
<bitRange>[9:9]</bitRange>
</field>
<field>
<name>RTO_BACK</name>
<description>Response Timeout/Boot ACK Received</description>
<bitRange>[8:8]</bitRange>
</field>
<field>
<name>DCE</name>
<description>Data CRC Error</description>
<bitRange>[7:7]</bitRange>
</field>
<field>
<name>RCE</name>
<description>Response CRC Error</description>
<bitRange>[6:6]</bitRange>
</field>
<field>
<name>DRR</name>
<description>Data Receive Request</description>
<bitRange>[5:5]</bitRange>
</field>
<field>
<name>DTR</name>
<description>Data Transmit Request</description>
<bitRange>[4:4]</bitRange>
</field>
<field>
<name>DTC</name>
<description>Data Transfer Complete</description>
<bitRange>[3:3]</bitRange>
</field>
<field>
<name>CC</name>
<description>Command Complete</description>
<bitRange>[2:2]</bitRange>
</field>
<field>
<name>RE</name>
<description>Response Error</description>
<bitRange>[1:1]</bitRange>
</field>
</fields>
</register>
<register>
<name>SMHC_STATUS</name>
<description>Status Register</description>
<addressOffset>0x003C</addressOffset>
<access>read-only</access>
<fields>
<field>
<name>DMA_REQ</name>
<description>DMA Request</description>
<bitRange>[31:31]</bitRange>
</field>
<field>
<name>FIFO_LEVEL</name>
<description>FIFO Level</description>
<bitRange>[25:17]</bitRange>
</field>
<field>
<name>RESP_IDX</name>
<description>Response Index</description>
<bitRange>[16:11]</bitRange>
</field>
<field>
<name>FSM_BUSY</name>
<description>Data FSM Busy</description>
<bitRange>[10:10]</bitRange>
</field>
<field>
<name>CARD_BUSY</name>
<description>Card Data Busy</description>
<bitRange>[9:9]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>not_busy</name>
<description>Card data is not busy</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>busy</name>
<description>Card data is busy</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CARD_PRESENT</name>
<description>Data[3] Statuss</description>
<bitRange>[8:8]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>not_present</name>
<description>The card is not present</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>present</name>
<description>The card is present</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>FSM_STA</name>
<description>Command FSM States</description>
<bitRange>[7:4]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>idle</name>
<description>Idle</description>
<value>0b0000</value>
</enumeratedValue>
<enumeratedValue>
<name>sis</name>
<description>Send init sequence</description>
<value>0b0001</value>
</enumeratedValue>
<enumeratedValue>
<name>txcsb</name>
<description>TX CMD start bit</description>
<value>0b0010</value>
</enumeratedValue>
<enumeratedValue>
<name>txctb</name>
<description>TX CMD TX bit</description>
<value>0b0011</value>
</enumeratedValue>
<enumeratedValue>
<name>txcia</name>
<description>TX CMD index + argument</description>
<value>0b0100</value>
</enumeratedValue>
<enumeratedValue>
<name>txcc</name>
<description>TX CMD CRC7</description>
<value>0b0101</value>
</enumeratedValue>
<enumeratedValue>
<name>txceb</name>
<description>TX CMD end bit</description>
<value>0b0110</value>
</enumeratedValue>
<enumeratedValue>
<name>rxrsb</name>
<description>RX response start bit</description>
<value>0b0111</value>
</enumeratedValue>
<enumeratedValue>
<name>rxrir</name>
<description>RX response IRQ responses</description>
<value>0b1000</value>
</enumeratedValue>
<enumeratedValue>
<name>rxrtb</name>
<description>RX response TX bit</description>
<value>0b1001</value>
</enumeratedValue>
<enumeratedValue>
<name>rxrci</name>
<description>RX response CMD index</description>
<value>0b1010</value>
</enumeratedValue>
<enumeratedValue>
<name>rxrd</name>
<description>RX response data</description>
<value>0b1011</value>
</enumeratedValue>
<enumeratedValue>
<name>rxrc</name>
<description>RX response CRC7</description>
<value>0b1100</value>
</enumeratedValue>
<enumeratedValue>
<name>rxreb</name>
<description>RX response end bit</description>
<value>0b1101</value>
</enumeratedValue>
<enumeratedValue>
<name>cpwn</name>
<description>CMD path wait NCC</description>
<value>0b1110</value>
</enumeratedValue>
<enumeratedValue>
<name>wait</name>
<description>Wait; CMD-to-response turn around</description>
<value>0b1111</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>FIFO_FULL</name>
<description>sFIFO Full</description>
<bitRange>[3:3]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>not_full</name>
<description>FIFO is not full</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>full</name>
<description>FIFO is full</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>FIFO_EMPTY</name>
<description>FIFO Empty</description>
<bitRange>[2:2]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>not_sempty</name>
<description>FIFO is not empty</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>empty</name>
<description>FIFO is empty</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>FIFO_TX_LEVEL</name>
<description>FIFO TX Water Level Flag</description>
<bitRange>[1:1]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>not_reach</name>
<description>FIFO does not reach the transmit trigger level</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>reach</name>
<description>FIFO reaches the transmit trigger level</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>FIFO_RX_LEVEL</name>
<description>FIFO RX Water Level Flag</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>not_reach</name>
<description>FIFO does not reach the receive trigger level</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>reach</name>
<description>FIFO reaches the receive trigger level</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>SMHC_FIFOTH</name>
<description>FIFO Water Level Register</description>
<addressOffset>0x0040</addressOffset>
<fields>
<field>
<name>BSIZE_OF_TRANS</name>
<description>sBurst Size of Multiple Transaction</description>
<bitRange>[30:28]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>T1</name>
<description> 1 transfer</description>
<value>0b000</value>
</enumeratedValue>
<enumeratedValue>
<name>T4</name>
<description> 4 transfers</description>
<value>0b001</value>
</enumeratedValue>
<enumeratedValue>
<name>T8</name>
<description> 8 transfers</description>
<value>0b010</value>
</enumeratedValue>
<enumeratedValue>
<name>T16</name>
<description> 16 transfers</description>
<value>0b011</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>RX_TL</name>
<description>RX Trigger Level</description>
<bitRange>[23:16]</bitRange>
</field>
<field>
<name>TX_TL</name>
<description>TX Trigger Level</description>
<bitRange>[7:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>SMHC_FUNS</name>
<description>FIFO Function Select Register</description>
<addressOffset>0x0044</addressOffset>
<fields>
<field>
<name>ABT_RDATA</name>
<description>Abort Read Data</description>
<bitRange>[2:2]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>ignored</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>abort</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>READ_WAIT</name>
<description>Read Wait</description>
<bitRange>[1:1]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>clear</name>
<description>Clear SDIO read wait</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>assert</name>
<description>Assert SDIO read wait</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>HOST_SEND_MIMC_IRQRESQ</name>
<description>Host Send MMC IRQ Response</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>ignored</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>send</name>
<description>Send auto IRQ response</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>SMHC_TBC0</name>
<description>Transferred Byte Count between Controller and Card</description>
<addressOffset>0x0048</addressOffset>
<access>read-only</access>
</register>
<register>
<name>SMHC_TBC1</name>
<description>Transferred Byte Count between Host Memory and Internal FIFO</description>
<addressOffset>0x004C</addressOffset>
<access>read-only</access>
</register>
<register>
<name>SMHC_DBGC</name>
<description>Current Debug Control Register</description>
<addressOffset>0x0050</addressOffset>
</register>
<register>
<name>SMHC_CSDC</name>
<description>CRC Status Detect Control Registers</description>
<addressOffset>0x0054</addressOffset>
<fields>
<field>
<name>CRC_DET_PARA</name>
<bitRange>[3:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>HS400</name>
<value>0b110</value>
</enumeratedValue>
<enumeratedValue>
<name>Other</name>
<value>0b011</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>SMHC_A12A</name>
<description>Auto Command 12 Argument Register</description>
<addressOffset>0x0058</addressOffset>
<fields>
<field>
<name>SD_A12A</name>
<bitRange>[15:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>SMHC_NTSR</name>
<description>SD New Timing Set Register</description>
<addressOffset>0x005C</addressOffset>
<fields>
<field>
<name>MODE_SELECT</name>
<bitRange>[31:31]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>old_mode</name>
<description>Old mode of Sample/Output Timing</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>new_mode</name>
<description>New mode of Sample/Output Timing</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CMD_DAT_RX_PHASE_CLR</name>
<description>Clear the input phase of command lines and data lines during the update clock operation</description>
<bitRange>[24:24]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Disabled</name>
<description>Disabled</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enabled</name>
<description>Enabled</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DAT_CRC_STATUS_RX_PHASE_CLR</name>
<description>Clear the input phase of data lines before receiving the CRC status</description>
<bitRange>[22:22]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Disabled</name>
<description>Disabled</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enabled</name>
<description>Enabled</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DAT_TRANS_RX_PHASE_CLR</name>
<description>Clear the input phase of data lines before transferring the data</description>
<bitRange>[21:21]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Disabled</name>
<description>Disabled</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enabled</name>
<description>Enabled</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DAT_RECV_RX_PHASE_CLR</name>
<description>Clear the input phase of data lines before receiving the data</description>
<bitRange>[20:20]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Disabled</name>
<description>Disabled</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enabled</name>
<description>Enabled</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CMD_SEND_RX_PHASE_CLR</name>
<description>Clear command rx phase before sending the command</description>
<bitRange>[16:16]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Disabled</name>
<description>Disabled</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enabled</name>
<description>Enabled</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DAT_SAMPLE_TIMING_PHASE</name>
<bitRange>[9:8]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>O90</name>
<description>Sample timing phase offset 90</description>
<value>0b00</value>
</enumeratedValue>
<enumeratedValue>
<name>O180</name>
<description>Sample timing phase offset 180</description>
<value>0b01</value>
</enumeratedValue>
<enumeratedValue>
<name>O270</name>
<description>Sample timing phase offset 270</description>
<value>0b10</value>
</enumeratedValue>
<enumeratedValue>
<name>O0</name>
<description>Sample timing phase offset 0 (only for SD2 hs400 mode)</description>
<value>0b11</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CMD_SAMPLE_TIMING_PHASE</name>
<bitRange>[5:4]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>O90</name>
<description>Sample timing phase offset 90</description>
<value>0b00</value>
</enumeratedValue>
<enumeratedValue>
<name>O180</name>
<description>Sample timing phase offset 180</description>
<value>0b01</value>
</enumeratedValue>
<enumeratedValue>
<name>O270</name>
<description>Sample timing phase offset 270</description>
<value>0b10</value>
</enumeratedValue>
<enumeratedValue>
<name>O0</name>
<description>Ignore</description>
<value>0b11</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>HS400_NEW_SAMPLE_EN</name>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<description>Disable hs400 new sample method</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<description>Enable hs400 new sample method</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>SMHC_HWRST</name>
<description>Hardware Reset Register</description>
<addressOffset>0x0078</addressOffset>
<fields>
<field>
<name>HW_RST</name>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>active</name>
<description>Active mode</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Reset</name>
<description>Reset</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>SMHC_IDMAC</name>
<description>IDMAC Control Register</description>
<addressOffset>0x0080</addressOffset>
<fields>
<field>
<name>DES_LOAD_CTRL</name>
<bitRange>[31:31]</bitRange>
<access>write-only</access>
</field>
<field>
<name>IDMAC_ENB</name>
<description>IDMAC Enable</description>
<bitRange>[7:7]</bitRange>
</field>
<field>
<name>FIX_BUST_CTRL</name>
<description>Fixed Burst</description>
<bitRange>[1:1]</bitRange>
</field>
<field>
<name>IDMAC_RST</name>
<description>DMA Reset</description>
<bitRange>[0:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>SMHC_DLBA</name>
<description>Descriptor List Base Address Register</description>
<addressOffset>0x0084</addressOffset>
</register>
<register>
<name>SMHC_IDST</name>
<description>IDMAC Status Register</description>
<addressOffset>0x0088</addressOffset>
<fields>
<field>
<name>IDMAC_ERR_STA</name>
<description>Error Bits</description>
<bitRange>[12:10]</bitRange>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>transmission</name>
<description>Host Abort received during the transmission</description>
<value>0b001</value>
</enumeratedValue>
<enumeratedValue>
<name>reception</name>
<description>Host Abort received during the reception</description>
<value>0b010</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>ABN_INT_SUM</name>
<description>Abnormal Interrupt Summary</description>
<bitRange>[9:9]</bitRange>
</field>
<field>
<name>NOR_INT_SUM</name>
<description>Normal Interrupt Summary</description>
<bitRange>[8:8]</bitRange>
</field>
<field>
<name>ERR_FLAG_SUM</name>
<description>Card Error Summary</description>
<bitRange>[5:5]</bitRange>
</field>
<field>
<name>DES_UNAVL_INT</name>
<description>Descriptor Unavailable Interrupt</description>
<bitRange>[4:4]</bitRange>
</field>
<field>
<name>FATAL_BERR_INT</name>
<description>Fatal Bus Error Interrupt</description>
<bitRange>[2:2]</bitRange>
</field>
<field>
<name>RX_INT</name>
<description>Receive Interrupt</description>
<bitRange>[1:1]</bitRange>
</field>
<field>
<name>TX_INT</name>
<description>Transmit Interrupt</description>
<bitRange>[0:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>SMHC_IDIE</name>
<description>IDMAC Interrupt Enable Register</description>
<addressOffset>0x008C</addressOffset>
<fields>
<field>
<name>ERR_SUM_INT_ENB</name>
<description>Card Error Summary Interrupt Enable</description>
<bitRange>[5:5]</bitRange>
</field>
<field>
<name>DES_UNAVL_INT_ENB</name>
<description> Descriptor Unavailable Interrupt</description>
<bitRange>[4:4]</bitRange>
</field>
<field>
<name>FERR_INT_ENB</name>
<description>Fatal Bus Error Enable</description>
<bitRange>[2:2]</bitRange>
</field>
<field>
<name>RX_INT_ENB</name>
<description>Receive Interrupt Enables</description>
<bitRange>[1:1]</bitRange>
</field>
<field>
<name>TX_INT_ENB</name>
<description>Transmit Interrupt Enable</description>
<bitRange>[0:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>SMHC_THLD</name>
<description>Card Threshold Control Register</description>
<addressOffset>0x0100</addressOffset>
<fields>
<field>
<name>CARD_WR_THLD</name>
<description>Card Read/Write Threshold Size</description>
<bitRange>[27:16]</bitRange>
</field>
<field>
<name>CARD_WR_THLD_ENB</name>
<description>Card Read/Write Threshold Enable</description>
<bitRange>[2:2]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disabled</name>
<description>Card write threshold disabled</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enabled</name>
<description>Card write threshold enabled</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>BCIG</name>
<description>Busy Clear Interrupt Generation</description>
<bitRange>[1:1]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disabled</name>
<description>Busy clear interrupt disabled</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enabled</name>
<description>Busy clear interrupt enabled</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CARD_RD_THLD_ENB</name>
<description>Card Read Threshold Enable</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disabled</name>
<description>Card read threshold disabled</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enabled</name>
<description>Card read threshold enabled</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>SMHC_SFC</name>
<description>Sample FIFO Control Register</description>
<addressOffset>0x0104</addressOffset>
<fields>
<field>
<name>STOP_CLK_CTRL</name>
<description>Stop Clock Control</description>
<bitRange>[4:1]</bitRange>
</field>
<field>
<name>BYPASS_EN</name>
<description>Bypass enable</description>
<bitRange>[0:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>SMHC_A23A</name>
<description>Auto Command 23 Argument Register</description>
<addressOffset>0x0108</addressOffset>
</register>
<register>
<name>EMMC_DDR_SBIT_DET</name>
<description>eMMC4.5 DDR Start Bit Detection Control Register</description>
<addressOffset>0x010C</addressOffset>
<fields>
<field>
<name>HS400_MD_EN</name>
<description>HS400 Mode Enable</description>
<bitRange>[31:31]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disabled</name>
<description>Disabled</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enabled</name>
<description>Enabled</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>HALF_START_BIT</name>
<description>Control for start bit detection mechanism inside mstorage based on duration of start bit</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>full</name>
<description>Full cycle</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>less</name>
<description>Less than one full cycle</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>SMHC_EXT_CMD</name>
<description>Extended Command Register</description>
<addressOffset>0x0138</addressOffset>
<fields>
<field>
<name>AUTO_CMD23_EN</name>
<description>Send CMD23 Automatically</description>
<bitRange>[0:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>SMHC_EXT_RESP</name>
<description>Extended Response Register</description>
<addressOffset>0x013C</addressOffset>
<access>read-only</access>
</register>
<register>
<name>SMHC_DRV_DL</name>
<description>Drive Delay Control Register</description>
<addressOffset>0x0140</addressOffset>
<fields>
<field>
<name>DAT_DRV_PH_SEL</name>
<description>Data Drive Phase Select</description>
<bitRange>[17:17]</bitRange>
</field>
<field>
<name>CMD_DRV_PH_SEL</name>
<description>Command Drive Phase Select</description>
<bitRange>[16:16]</bitRange>
</field>
</fields>
</register>
<register>
<name>SMHC_SMAP_DL</name>
<description>Sample Delay Control Register</description>
<addressOffset>0x0144</addressOffset>
<fields>
<field>
<name>SAMP_DL_CAL_START</name>
<description>Sample Delay Calibration Start</description>
<bitRange>[15:15]</bitRange>
</field>
<field>
<name>SAMP_DL_CAL_DONE</name>
<description>Sample Delay Calibration Done</description>
<bitRange>[14:14]</bitRange>
<access>read-only</access>
</field>
<field>
<name>SAMP_DL</name>
<description>Sample Delay</description>
<bitRange>[13:8]</bitRange>
<access>read-only</access>
</field>
<field>
<name>SAMP_DL_SW_EN</name>
<description>Sample Delay Software Enable</description>
<bitRange>[7:7]</bitRange>
</field>
<field>
<name>SAMP_DL_SW</name>
<description>Sample Delay Software</description>
<bitRange>[5:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>SMHC_DS_DL</name>
<description>Data Strobe Delay Control Register</description>
<addressOffset>0x0148</addressOffset>
<fields>
<field>
<name>DS_DL_CAL_START</name>
<description>Data Strobe Delay Calibration Start</description>
<bitRange>[15:15]</bitRange>
</field>
<field>
<name>DS_DL_CAL_DONE</name>
<description>Data Strobe Delay Calibration Done</description>
<bitRange>[14:14]</bitRange>
<access>read-only</access>
</field>
<field>
<name>DS_DL</name>
<description>Data Strobe Delay</description>
<bitRange>[13:8]</bitRange>
<access>read-only</access>
</field>
<field>
<name>DS_DL_SW_EN</name>
<description>Sample Delay Software Enable</description>
<bitRange>[7:7]</bitRange>
</field>
<field>
<name>DS_DL_SW</name>
<description>Data Storbe Delay Software</description>
<bitRange>[5:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>SMHC_HS400_DL</name>
<description>HS400 Delay Control Register</description>
<addressOffset>0x014C</addressOffset>
<fields>
<field>
<name>HS400_DL_CAL_START</name>
<description>HS400 Delay Calibration Start</description>
<bitRange>[15:15]</bitRange>
</field>
<field>
<name>HS400_DL_CAL_DONE</name>
<description>HS400 Delay Calibration Done</description>
<bitRange>[14:14]</bitRange>
<access>read-only</access>
</field>
<field>
<name>HS400_DL</name>
<description>HS400 Delay</description>
<bitRange>[11:8]</bitRange>
<access>read-only</access>
</field>
<field>
<name>HS400_DL_SW_EN</name>
<description>Sample Delay Software Enable</description>
<bitRange>[7:7]</bitRange>
</field>
<field>
<name>HS400_DL_SW</name>
<description>HS400 Delay Software</description>
<bitRange>[3:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>SMHC_FIFO</name>
<description>Read/Write FIFO</description>
<addressOffset>0x0200</addressOffset>
</register>
</registers>
</peripheral>
<peripheral>
<dim>3</dim>
<dimIncrement>0x1000</dimIncrement>
<name>I2S_PCM[%s]</name>
<description>I2S/PCM</description>
<groupName>Audio</groupName>
<baseAddress>0x02032000</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x1000</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>I2S_PCM0</name>
<value>42</value>
</interrupt>
<interrupt>
<name>I2S_PCM1</name>
<value>43</value>
</interrupt>
<interrupt>
<name>I2S_PCM2</name>
<value>44</value>
</interrupt>
<registers>
<register>
<name>I2S_PCM_CTL</name>
<description>I2S/PCM Control Register</description>
<addressOffset>0x0000</addressOffset>
</register>
<register>
<name>I2S_PCM_FMT0</name>
<description>I2S/PCM Format Register 0</description>
<addressOffset>0x0004</addressOffset>
</register>
<register>
<name>I2S_PCM_FMT1</name>
<description>I2S/PCM Format Register 1</description>
<addressOffset>0x0008</addressOffset>
</register>
<register>
<name>I2S_PCM_ISTA</name>
<description>I2S/PCM Interrupt Status Register</description>
<addressOffset>0x000C</addressOffset>
</register>
<register>
<name>I2S_PCM_RXFIFO</name>
<description>I2S/PCM RXFIFO Register</description>
<addressOffset>0x0010</addressOffset>
</register>
<register>
<name>I2S_PCM_FCTL</name>
<description>I2S/PCM FIFO Control Register</description>
<addressOffset>0x0014</addressOffset>
</register>
<register>
<name>I2S_PCM_FSTA</name>
<description>I2S/PCM FIFO Status Register</description>
<addressOffset>0x0018</addressOffset>
</register>
<register>
<name>I2S_PCM_INT</name>
<description>I2S/PCM DMA and Interrupt Control Register</description>
<addressOffset>0x001C</addressOffset>
</register>
<register>
<name>I2S_PCM_TXFIFO</name>
<description>I2S/PCM TXFIFO Register</description>
<addressOffset>0x0020</addressOffset>
</register>
<register>
<name>I2S_PCM_CLKD</name>
<description>I2S/PCM Clock Divide Register</description>
<addressOffset>0x0024</addressOffset>
</register>
<register>
<name>I2S_PCM_TXCNT</name>
<description>I2S/PCM TX Sample Counter Register</description>
<addressOffset>0x0028</addressOffset>
</register>
<register>
<name>I2S_PCM_RXCNT</name>
<description>I2S/PCM RX Sample Counter Register</description>
<addressOffset>0x002C</addressOffset>
</register>
<register>
<name>I2S_PCM_CHCFG</name>
<description>I2S/PCM Channel Configuration Register</description>
<addressOffset>0x0030</addressOffset>
</register>
<register>
<name>I2S_PCM_TX0CHSEL</name>
<description>I2S/PCM TX0 Channel Select Register</description>
<addressOffset>0x0034</addressOffset>
</register>
<register>
<name>I2S_PCM_TX1CHSEL</name>
<description>I2S/PCM TX1 Channel Select Register</description>
<addressOffset>0x0038</addressOffset>
</register>
<register>
<name>I2S_PCM_TX2CHSEL</name>
<description>I2S/PCM TX2 Channel Select Register</description>
<addressOffset>0x003C</addressOffset>
</register>
<register>
<name>I2S_PCM_TX3CHSEL</name>
<description>I2S/PCM TX3 Channel Select Register</description>
<addressOffset>0x0040</addressOffset>
</register>
<register>
<name>I2S_PCM_TX0CHMAP0</name>
<description>I2S/PCM TX0 Channel Mapping Register0</description>
<addressOffset>0x0044</addressOffset>
</register>
<register>
<name>I2S_PCM_TX0CHMAP1</name>
<description>I2S/PCM TX0 Channel Mapping Register1</description>
<addressOffset>0x0048</addressOffset>
</register>
<register>
<name>I2S_PCM_TX1CHMAP0</name>
<description>I2S/PCM TX1 Channel Mapping Register0</description>
<addressOffset>0x004C</addressOffset>
</register>
<register>
<name>I2S_PCM_TX1CHMAP1</name>
<description>I2S/PCM TX1 Channel Mapping Register1</description>
<addressOffset>0x0050</addressOffset>
</register>
<register>
<name>I2S_PCM_TX2CHMAP0</name>
<description>I2S/PCM TX2 Channel Mapping Register0</description>
<addressOffset>0x0054</addressOffset>
</register>
<register>
<name>I2S_PCM_TX2CHMAP1</name>
<description>I2S/PCM TX2 Channel Mapping Register1</description>
<addressOffset>0x0058</addressOffset>
</register>
<register>
<name>I2S_PCM_TX3CHMAP0</name>
<description>I2S/PCM TX3 Channel Mapping Register0</description>
<addressOffset>0x005C</addressOffset>
</register>
<register>
<name>I2S_PCM_TX3CHMAP1</name>
<description>I2S/PCM TX3 Channel Mapping Register1</description>
<addressOffset>0x0060</addressOffset>
</register>
<register>
<name>I2S_PCM_RXCHSEL</name>
<description>I2S/PCM RX Channel Select Register</description>
<addressOffset>0x0064</addressOffset>
</register>
<register>
<name>I2S_PCM_RXCHMAP0</name>
<description>I2S/PCM RX Channel Mapping Register0</description>
<addressOffset>0x0068</addressOffset>
</register>
<register>
<name>I2S_PCM_RXCHMAP1</name>
<description>I2S/PCM RX Channel Mapping Register1</description>
<addressOffset>0x006C</addressOffset>
</register>
<register>
<name>I2S_PCM_RXCHMAP2</name>
<description>I2S/PCM RX Channel Mapping Register2</description>
<addressOffset>0x0070</addressOffset>
</register>
<register>
<name>I2S_PCM_RXCHMAP3</name>
<description>I2S/PCM RX Channel Mapping Register3</description>
<addressOffset>0x0074</addressOffset>
</register>
<register>
<name>MCLKCFG</name>
<description>ASRC MCLK Configuration Register</description>
<addressOffset>0x0080</addressOffset>
</register>
<register>
<name>FsoutCFG</name>
<description>ASRC Out Sample Rate Configuration Register</description>
<addressOffset>0x0084</addressOffset>
</register>
<register>
<name>FsinEXTCFG</name>
<description>ASRC Input Sample Pulse Extend Configuration Register</description>
<addressOffset>0x0088</addressOffset>
</register>
<register>
<name>ASRCCFG</name>
<description>ASRC Enable Register</description>
<addressOffset>0x008C</addressOffset>
</register>
<register>
<name>ASRCMANCFG</name>
<description>ASRC Manual Ratio Configuration Register</description>
<addressOffset>0x0090</addressOffset>
</register>
<register>
<name>ASRCRATIOSTAT</name>
<description>ASRC Status Register</description>
<addressOffset>0x0094</addressOffset>
</register>
<register>
<name>ASRCFIFOSTAT</name>
<description>ASRC FIFO Level Status Register</description>
<addressOffset>0x0098</addressOffset>
</register>
<register>
<name>ASRCMBISTCFG</name>
<description>ASRC MBIST Test Configuration Register</description>
<addressOffset>0x009C</addressOffset>
</register>
<register>
<name>ASRCMBISTSTAT</name>
<description>ASRC MBIST Test Status Register</description>
<addressOffset>0x00A0</addressOffset>
</register>
</registers>
</peripheral>
<peripheral>
<name>DMIC</name>
<description>DMIC</description>
<groupName>Audio</groupName>
<baseAddress>0x02031000</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x400</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>DMIC</name>
<value>40</value>
</interrupt>
<registers>
<register>
<name>DMIC_EN</name>
<description>DMIC Enable Control Register</description>
<addressOffset>0x0000</addressOffset>
</register>
<register>
<name>DMIC_SR</name>
<description>DMIC Sample Rate Register</description>
<addressOffset>0x0004</addressOffset>
</register>
<register>
<name>DMIC_CTR</name>
<description>DMIC Control Register</description>
<addressOffset>0x0008</addressOffset>
</register>
<register>
<name>DMIC_DATA</name>
<description>DMIC Data Register</description>
<addressOffset>0x0010</addressOffset>
</register>
<register>
<name>DMIC_INTC</name>
<description>DMIC Interrupt Control Register</description>
<addressOffset>0x0014</addressOffset>
</register>
<register>
<name>DMIC_INTS</name>
<description>DMIC Interrupt Status Register</description>
<addressOffset>0x0018</addressOffset>
</register>
<register>
<name>DMIC_RXFIFO_CTR</name>
<description>DMIC RXFIFO Control Register</description>
<addressOffset>0x001C</addressOffset>
</register>
<register>
<name>DMIC_RXFIFO_STA</name>
<description>DMIC RXFIFO Status Register</description>
<addressOffset>0x0020</addressOffset>
</register>
<register>
<name>DMIC_CH_NUM</name>
<description>DMIC Channel Numbers Register</description>
<addressOffset>0x0024</addressOffset>
</register>
<register>
<name>DMIC_CH_MAP</name>
<description>DMIC Channel Mapping Register</description>
<addressOffset>0x0028</addressOffset>
</register>
<register>
<name>DMIC_CNT</name>
<description>DMIC Counter Register</description>
<addressOffset>0x002C</addressOffset>
</register>
<register>
<name>DATA0_DATA1_VOL_CTR</name>
<description>Data0 and Data1 Volume Control Register</description>
<addressOffset>0x0030</addressOffset>
</register>
<register>
<name>DATA2_DATA3_VOL_CTR</name>
<description>Data2 And Data3 Volume Control Register</description>
<addressOffset>0x0034</addressOffset>
</register>
<register>
<name>HPF_EN_CTR</name>
<description>High Pass Filter Enable Control Register</description>
<addressOffset>0x0038</addressOffset>
</register>
<register>
<name>HPF_COEF_REG</name>
<description>High Pass Filter Coefficient Register</description>
<addressOffset>0x003C</addressOffset>
</register>
<register>
<name>HPF_GAIN_REG</name>
<description>High Pass Filter Gain Register</description>
<addressOffset>0x0040</addressOffset>
</register>
</registers>
</peripheral>
<peripheral>
<name>OWA</name>
<description>One Wire Audio</description>
<groupName>Audio</groupName>
<baseAddress>0x02036000</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x400</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>OWA</name>
<value>39</value>
</interrupt>
<registers>
<register>
<name>OWA_GEN_CTL</name>
<description>OWA General Control Register</description>
<addressOffset>0x0000</addressOffset>
</register>
<register>
<name>OWA_TX_CFIG</name>
<description>OWA TX Configuration Register</description>
<addressOffset>0x0004</addressOffset>
</register>
<register>
<name>OWA_RX_CFIG</name>
<description>OWA RX Configuration Register</description>
<addressOffset>0x0008</addressOffset>
</register>
<register>
<name>OWA_ISTA</name>
<description>OWA Interrupt Status Register</description>
<addressOffset>0x000C</addressOffset>
</register>
<register>
<name>OWA_RXFIFO</name>
<description>OWA RXFIFO Register</description>
<addressOffset>0x0010</addressOffset>
</register>
<register>
<name>OWA_FCTL</name>
<description>OWA FIFO Control Register</description>
<addressOffset>0x0014</addressOffset>
</register>
<register>
<name>OWA_FSTA</name>
<description>OWA FIFO Status Register</description>
<addressOffset>0x0018</addressOffset>
</register>
<register>
<name>OWA_INT</name>
<description>OWA Interrupt Control Register</description>
<addressOffset>0x001C</addressOffset>
</register>
<register>
<name>OWA_TX_FIFO</name>
<description>OWA TX FIFO Register</description>
<addressOffset>0x0020</addressOffset>
</register>
<register>
<name>OWA_TX_CNT</name>
<description>OWA TX Counter Register</description>
<addressOffset>0x0024</addressOffset>
</register>
<register>
<name>OWA_RX_CNT</name>
<description>OWA RX Counter Register</description>
<addressOffset>0x0028</addressOffset>
</register>
<register>
<name>OWA_TX_CHSTA0</name>
<description>OWA TX Channel Status Register0</description>
<addressOffset>0x002C</addressOffset>
</register>
<register>
<name>OWA_TX_CHSTA1</name>
<description>OWA TX Channel Status Register1</description>
<addressOffset>0x0030</addressOffset>
</register>
<register>
<name>OWA_RXCHSTA0</name>
<description>OWA RX Channel Status Register0</description>
<addressOffset>0x0034</addressOffset>
</register>
<register>
<name>OWA_RXCHSTA1</name>
<description>OWA RX Channel Status Register1</description>
<addressOffset>0x0038</addressOffset>
</register>
<register>
<name>OWA_EXP_CTL</name>
<description>OWA Expand Control Register</description>
<addressOffset>0x0040</addressOffset>
</register>
<register>
<name>OWA_EXP_ISTA</name>
<description>OWA Expand Interrupt Status Register</description>
<addressOffset>0x0044</addressOffset>
</register>
<register>
<name>OWA_EXP_INFO_0</name>
<description>OWA Expand Infomation Register0</description>
<addressOffset>0x0048</addressOffset>
</register>
<register>
<name>OWA_EXP_INFO_1</name>
<description>OWA Expand Infomation Register1</description>
<addressOffset>0x004C</addressOffset>
</register>
<register>
<name>OWA_EXP_DBG_0</name>
<description>OWA Expand Debug Register0</description>
<addressOffset>0x0050</addressOffset>
</register>
<register>
<name>OWA_EXP_DBG_1</name>
<description>OWA Expand Debug Register1</description>
<addressOffset>0x0054</addressOffset>
</register>
</registers>
</peripheral>
<peripheral>
<name>AudioCodec</name>
<description>Audio Codec</description>
<groupName>Audio</groupName>
<baseAddress>0x02030000</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x1000</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>AUDIO_CODEC</name>
<value>41</value>
</interrupt>
<registers>
<register>
<name>AC_DAC_DPC</name>
<description>DAC Digital Part Control Register</description>
<addressOffset>0x0000</addressOffset>
</register>
<register>
<name>DAC_VOL_CTRL</name>
<description>DAC Volume Control Register</description>
<addressOffset>0x0004</addressOffset>
</register>
<register>
<name>AC_DAC_FIFOC</name>
<description>DAC FIFO Control Register</description>
<addressOffset>0x0010</addressOffset>
</register>
<register>
<name>AC_DAC_FIFOS</name>
<description>DAC FIFO Status Register</description>
<addressOffset>0x0014</addressOffset>
</register>
<register>
<name>AC_DAC_TXDATA</name>
<description>DAC TX DATA Register</description>
<addressOffset>0x0020</addressOffset>
</register>
<register>
<name>AC_DAC_CNT</name>
<description>DAC TX FIFO Counter Register</description>
<addressOffset>0x0024</addressOffset>
</register>
<register>
<name>AC_DAC_DG</name>
<description>DAC Debug Register</description>
<addressOffset>0x0028</addressOffset>
</register>
<register>
<name>AC_ADC_FIFOC</name>
<description>ADC FIFO Control Register</description>
<addressOffset>0x0030</addressOffset>
</register>
<register>
<name>ADC_VOL_CTRL1</name>
<description>ADC Volume Control1 Register</description>
<addressOffset>0x0034</addressOffset>
</register>
<register>
<name>AC_ADC_FIFOS</name>
<description>ADC FIFO Status Register</description>
<addressOffset>0x0038</addressOffset>
</register>
<register>
<name>AC_ADC_RXDATA</name>
<description>ADC RX Data Register</description>
<addressOffset>0x0040</addressOffset>
</register>
<register>
<name>AC_ADC_CNT</name>
<description>ADC RX Counter Register</description>
<addressOffset>0x0044</addressOffset>
</register>
<register>
<name>AC_ADC_DG</name>
<description>ADC Debug Register</description>
<addressOffset>0x004C</addressOffset>
</register>
<register>
<name>ADC_DIG_CTRL</name>
<description>ADC Digtial Control Register</description>
<addressOffset>0x0050</addressOffset>
</register>
<register>
<name>VRA1SPEEDUP_DOWN_CTRL</name>
<description>VRA1 Speedup Down Control Register</description>
<addressOffset>0x0054</addressOffset>
</register>
<register>
<name>AC_DAC_DAP_CTRL</name>
<description>DAC DAP Control Register</description>
<addressOffset>0x00F0</addressOffset>
</register>
<register>
<name>AC_ADC_DAP_CTR</name>
<description>ADC DAP Control Register</description>
<addressOffset>0x00F8</addressOffset>
</register>
<register>
<name>AC_DAC_DRC_HHPFC</name>
<description>DAC DRC High HPF Coef Register</description>
<addressOffset>0x0100</addressOffset>
</register>
<register>
<name>AC_DAC_DRC_LHPFC</name>
<description>DAC DRC Low HPF Coef Register</description>
<addressOffset>0x0104</addressOffset>
</register>
<register>
<name>AC_DAC_DRC_CTRL</name>
<description>DAC DRC Control Register</description>
<addressOffset>0x0108</addressOffset>
</register>
<register>
<name>AC_DAC_DRC_LPFHAT</name>
<description>DAC DRC Left Peak Filter High Attack Time Coef Register</description>
<addressOffset>0x010C</addressOffset>
</register>
<register>
<name>AC_DAC_DRC_LPFLAT</name>
<description>DAC DRC Left Peak Filter Low Attack Time Coef Register</description>
<addressOffset>0x0110</addressOffset>
</register>
<register>
<name>AC_DAC_DRC_RPFHAT</name>
<description>DAC DRC Right Peak Filter High Attack Time Coef Register</description>
<addressOffset>0x0114</addressOffset>
</register>
<register>
<name>AC_DAC_DRC_RPFLAT</name>
<description>DAC DRC Peak Filter Low Attack Time Coef Register</description>
<addressOffset>0x0118</addressOffset>
</register>
<register>
<name>AC_DAC_DRC_LPFHRT</name>
<description>DAC DRC Left Peak Filter High Release Time Coef Register</description>
<addressOffset>0x011C</addressOffset>
</register>
<register>
<name>AC_DAC_DRC_LPFLRT</name>
<description>DAC DRC Left Peak Filter Low Release Time Coef Register</description>
<addressOffset>0x0120</addressOffset>
</register>
<register>
<name>AC_DAC_DRC_RPFHRT</name>
<description>DAC DRC Right Peak filter High Release Time Coef Register</description>
<addressOffset>0x0124</addressOffset>
</register>
<register>
<name>AC_DAC_DRC_RPFLRT</name>
<description>DAC DRC Right Peak filter Low Release Time Coef Register</description>
<addressOffset>0x0128</addressOffset>
</register>
<register>
<name>AC_DAC_DRC_LRMSHAT</name>
<description>DAC DRC Left RMS Filter High Coef Register</description>
<addressOffset>0x012C</addressOffset>
</register>
<register>
<name>AC_DAC_DRC_LRMSLAT</name>
<description>DAC DRC Left RMS Filter Low Coef Register</description>
<addressOffset>0x0130</addressOffset>
</register>
<register>
<name>AC_DAC_DRC_RRMSHAT</name>
<description>DAC DRC Right RMS Filter High Coef Register</description>
<addressOffset>0x0134</addressOffset>
</register>
<register>
<name>AC_DAC_DRC_RRMSLAT</name>
<description>DAC DRC Right RMS Filter Low Coef Register</description>
<addressOffset>0x0138</addressOffset>
</register>
<register>
<name>AC_DAC_DRC_HCT</name>
<description>DAC DRC Compressor Threshold High Setting Register</description>
<addressOffset>0x013C</addressOffset>
</register>
<register>
<name>AC_DAC_DRC_LCT</name>
<description>DAC DRC Compressor Slope High Setting Register</description>
<addressOffset>0x0140</addressOffset>
</register>
<register>
<name>AC_DAC_DRC_HKC</name>
<description>DAC DRC Compressor Slope High Setting Register</description>
<addressOffset>0x0144</addressOffset>
</register>
<register>
<name>AC_DAC_DRC_LKC</name>
<description>DAC DRC Compressor Slope Low Setting Register</description>
<addressOffset>0x0148</addressOffset>
</register>
<register>
<name>AC_DAC_DRC_HOPC</name>
<description>DAC DRC Compressor High Output at Compressor Threshold Register</description>
<addressOffset>0x014C</addressOffset>
</register>
<register>
<name>AC_DAC_DRC_LOPC</name>
<description>DAC DRC Compressor Low Output at Compressor Threshold Register</description>
<addressOffset>0x0150</addressOffset>
</register>
<register>
<name>AC_DAC_DRC_HLT</name>
<description>DAC DRC Limiter Threshold High Setting Register</description>
<addressOffset>0x0154</addressOffset>
</register>
<register>
<name>AC_DAC_DRC_LLT</name>
<description>DAC DRC Limiter Threshold Low Setting Register</description>
<addressOffset>0x0158</addressOffset>
</register>
<register>
<name>AC_DAC_DRC_HKl</name>
<description>DAC DRC Limiter Slope High Setting Register</description>
<addressOffset>0x015C</addressOffset>
</register>
<register>
<name>AC_DAC_DRC_LKl</name>
<description>DAC DRC Limiter Slope Low Setting Register</description>
<addressOffset>0x0160</addressOffset>
</register>
<register>
<name>AC_DAC_DRC_HOPL</name>
<description>DAC DRC Limiter High Output at Limiter Threshold</description>
<addressOffset>0x0164</addressOffset>
</register>
<register>
<name>AC_DAC_DRC_LOPL</name>
<description>DAC DRC Limiter Low Output at Limiter Threshold</description>
<addressOffset>0x0168</addressOffset>
</register>
<register>
<name>AC_DAC_DRC_HET</name>
<description>DAC DRC Expander Threshold High Setting Register</description>
<addressOffset>0x016C</addressOffset>
</register>
<register>
<name>AC_DAC_DRC_LET</name>
<description>DAC DRC Expander Threshold Low Setting Register</description>
<addressOffset>0x0170</addressOffset>
</register>
<register>
<name>AC_DAC_DRC_HKE</name>
<description>DAC DRC Expander Slope High Setting Register</description>
<addressOffset>0x0174</addressOffset>
</register>
<register>
<name>AC_DAC_DRC_LKE</name>
<description>DAC DRC Expander Slope Low Setting Register</description>
<addressOffset>0x0178</addressOffset>
</register>
<register>
<name>AC_DAC_DRC_HOPE</name>
<description>DAC DRC Expander High Output at Expander Threshold</description>
<addressOffset>0x017C</addressOffset>
</register>
<register>
<name>AC_DAC_DRC_LOPE</name>
<description>DAC DRC Expander Low Output at Expander Threshold</description>
<addressOffset>0x0180</addressOffset>
</register>
<register>
<name>AC_DAC_DRC_HKN</name>
<description>DAC DRC Linear Slope High Setting Register</description>
<addressOffset>0x0184</addressOffset>
</register>
<register>
<name>AC_DAC_DRC_LKN</name>
<description>DAC DRC Linear Slope Low Setting Register</description>
<addressOffset>0x0188</addressOffset>
</register>
<register>
<name>AC_DAC_DRC_SFHAT</name>
<description>DAC DRC Smooth filter Gain High Attack Time Coef Register</description>
<addressOffset>0x018C</addressOffset>
</register>
<register>
<name>AC_DAC_DRC_SFLAT</name>
<description>DAC DRC Smooth filter Gain Low Attack Time Coef Register</description>
<addressOffset>0x0190</addressOffset>
</register>
<register>
<name>AC_DAC_DRC_SFHRT</name>
<description>DAC DRC Smooth filter Gain High Release Time Coef Register</description>
<addressOffset>0x0194</addressOffset>
</register>
<register>
<name>AC_DAC_DRC_SFLRT</name>
<description>DAC DRC Smooth filter Gain Low Release Time Coef Register</description>
<addressOffset>0x0198</addressOffset>
</register>
<register>
<name>AC_DAC_DRC_MXGHS</name>
<description>DAC DRC MAX Gain High Setting Register</description>
<addressOffset>0x019C</addressOffset>
</register>
<register>
<name>AC_DAC_DRC_MXGLS</name>
<description>DAC DRC MAX Gain Low Setting Register</description>
<addressOffset>0x01A0</addressOffset>
</register>
<register>
<name>AC_DAC_DRC_MNGHS</name>
<description>DAC DRC MIN Gain High Setting Register</description>
<addressOffset>0x01A4</addressOffset>
</register>
<register>
<name>AC_DAC_DRC_MNGLS</name>
<description>DAC DRC MIN Gain Low Setting Register</description>
<addressOffset>0x01A8</addressOffset>
</register>
<register>
<name>AC_DAC_DRC_EPSHC</name>
<description>DAC DRC Expander Smooth Time High Coef Register</description>
<addressOffset>0x01AC</addressOffset>
</register>
<register>
<name>AC_DAC_DRC_EPSLC</name>
<description>DAC DRC Expander Smooth Time Low Coef Register</description>
<addressOffset>0x01B0</addressOffset>
</register>
<register>
<name>AC_DAC_DRC_HPFHGAIN</name>
<description>DAC DRC HPF Gain High Coef Register</description>
<addressOffset>0x01B8</addressOffset>
</register>
<register>
<name>AC_DAC_DRC_HPFLGAIN</name>
<description>DAC DRC HPF Gain Low Coef Register</description>
<addressOffset>0x01BC</addressOffset>
</register>
<register>
<name>AC_ADC_DRC_HHPFC</name>
<description>ADC DRC High HPF Coef Register</description>
<addressOffset>0x0200</addressOffset>
</register>
<register>
<name>AC_ADC_DRC_LHPFC</name>
<description>ADC DRC Low HPF Coef Register</description>
<addressOffset>0x0204</addressOffset>
</register>
<register>
<name>AC_ADC_DRC_CTRL</name>
<description>ADC DRC Control Register</description>
<addressOffset>0x0208</addressOffset>
</register>
<register>
<name>AC_ADC_DRC_LPFHAT</name>
<description>ADC DRC Left Peak Filter High Attack Time Coef Register</description>
<addressOffset>0x020C</addressOffset>
</register>
<register>
<name>AC_ADC_DRC_LPFLAT</name>
<description>ADC DRC Left Peak Filter Low Attack Time Coef Register</description>
<addressOffset>0x0210</addressOffset>
</register>
<register>
<name>AC_ADC_DRC_RPFHAT</name>
<description>ADC DRC Right Peak Filter High Attack Time Coef Register</description>
<addressOffset>0x0214</addressOffset>
</register>
<register>
<name>AC_ADC_DRC_RPFLAT</name>
<description>ADC DRC Right Peak Filter Low Attack Time Coef Register</description>
<addressOffset>0x0218</addressOffset>
</register>
<register>
<name>AC_ADC_DRC_LPFHRT</name>
<description>ADC DRC Left Peak Filter High Release Time Coef Register</description>
<addressOffset>0x021C</addressOffset>
</register>
<register>
<name>AC_ADC_DRC_LPFLRT</name>
<description>ADC DRC Left Peak Filter Low Release Time Coef Register</description>
<addressOffset>0x0220</addressOffset>
</register>
<register>
<name>AC_ADC_DRC_RPFHRT</name>
<description>ADC DRC Right Peak Filter High Release Time Coef Register</description>
<addressOffset>0x0224</addressOffset>
</register>
<register>
<name>AC_ADC_DRC_RPFLRT</name>
<description>ADC DRC Right Peak Filter Low Release Time Coef Register</description>
<addressOffset>0x0228</addressOffset>
</register>
<register>
<name>AC_ADC_DRC_LRMSHAT</name>
<description>ADC DRC Left RMS Filter High Coef Register</description>
<addressOffset>0x022C</addressOffset>
</register>
<register>
<name>AC_ADC_DRC_LRMSLAT</name>
<description>ADC DRC Left RMS Filter Low Coef Register</description>
<addressOffset>0x0230</addressOffset>
</register>
<register>
<name>AC_ADC_DRC_RRMSHAT</name>
<description>ADC DRC Right RMS Filter High Coef Register</description>
<addressOffset>0x0234</addressOffset>
</register>
<register>
<name>AC_ADC_DRC_RRMSLAT</name>
<description>ADC DRC Right RMS Filter Low Coef Register</description>
<addressOffset>0x0238</addressOffset>
</register>
<register>
<name>AC_ADC_DRC_HCT</name>
<description>ADC DRC Compressor Threshold High Setting Register</description>
<addressOffset>0x023C</addressOffset>
</register>
<register>
<name>AC_ADC_DRC_LCT</name>
<description>ADC DRC Compressor Slope High Setting Register</description>
<addressOffset>0x0240</addressOffset>
</register>
<register>
<name>AC_ADC_DRC_HKC</name>
<description>ADC DRC Compressor Slope High Setting Register</description>
<addressOffset>0x0244</addressOffset>
</register>
<register>
<name>AC_ADC_DRC_LKC</name>
<description>ADC DRC Compressor Slope Low Setting Register</description>
<addressOffset>0x0248</addressOffset>
</register>
<register>
<name>AC_ADC_DRC_HOPC</name>
<description>ADC DRC Compressor High Output at Compressor Threshold Register</description>
<addressOffset>0x024C</addressOffset>
</register>
<register>
<name>AC_ADC_DRC_LOPC</name>
<description>ADC DRC Compressor Low Output at Compressor Threshold Register</description>
<addressOffset>0x0250</addressOffset>
</register>
<register>
<name>AC_ADC_DRC_HLT</name>
<description>ADC DRC Limiter Threshold High Setting Register</description>
<addressOffset>0x0254</addressOffset>
</register>
<register>
<name>AC_ADC_DRC_LLT</name>
<description>ADC DRC Limiter Threshold Low Setting Register</description>
<addressOffset>0x0258</addressOffset>
</register>
<register>
<name>AC_ADC_DRC_HKl</name>
<description>ADC DRC Limiter Slope High Setting Register</description>
<addressOffset>0x025C</addressOffset>
</register>
<register>
<name>AC_ADC_DRC_LKl</name>
<description>ADC DRC Limiter Slope Low Setting Register</description>
<addressOffset>0x0260</addressOffset>
</register>
<register>
<name>AC_ADC_DRC_HOPL</name>
<description>ADC DRC Limiter High Output at Limiter Threshold</description>
<addressOffset>0x0264</addressOffset>
</register>
<register>
<name>AC_ADC_DRC_LOPL</name>
<description>ADC DRC Limiter Low Output at Limiter Threshold</description>
<addressOffset>0x0268</addressOffset>
</register>
<register>
<name>AC_ADC_DRC_HET</name>
<description>ADC DRC Expander Threshold High Setting Register</description>
<addressOffset>0x026C</addressOffset>
</register>
<register>
<name>AC_ADC_DRC_LET</name>
<description>ADC DRC Expander Threshold Low Setting Register</description>
<addressOffset>0x0270</addressOffset>
</register>
<register>
<name>AC_ADC_DRC_HKE</name>
<description>ADC DRC Expander Slope High Setting Register</description>
<addressOffset>0x0274</addressOffset>
</register>
<register>
<name>AC_ADC_DRC_LKE</name>
<description>ADC DRC Expander Slope Low Setting Register</description>
<addressOffset>0x0278</addressOffset>
</register>
<register>
<name>AC_ADC_DRC_HOPE</name>
<description>ADC DRC Expander High Output at Expander Threshold</description>
<addressOffset>0x027C</addressOffset>
</register>
<register>
<name>AC_ADC_DRC_LOPE</name>
<description>ADC DRC Expander Low Output at Expander Threshold</description>
<addressOffset>0x0280</addressOffset>
</register>
<register>
<name>AC_ADC_DRC_HKN</name>
<description>ADC DRC Linear Slope High Setting Register</description>
<addressOffset>0x0284</addressOffset>
</register>
<register>
<name>AC_ADC_DRC_LKN</name>
<description>ADC DRC Linear Slope Low Setting Register</description>
<addressOffset>0x0288</addressOffset>
</register>
<register>
<name>AC_ADC_DRC_SFHAT</name>
<description>ADC DRC Smooth filter Gain High Attack Time Coef Register</description>
<addressOffset>0x028C</addressOffset>
</register>
<register>
<name>AC_ADC_DRC_SFLAT</name>
<description>ADC DRC Smooth filter Gain Low Attack Time Coef Register</description>
<addressOffset>0x0290</addressOffset>
</register>
<register>
<name>AC_ADC_DRC_SFHRT</name>
<description>ADC DRC Smooth filter Gain High Release Time Coef Register</description>
<addressOffset>0x0294</addressOffset>
</register>
<register>
<name>AC_ADC_DRC_SFLRT</name>
<description>ADC DRC Smooth filter Gain Low Release Time Coef Register</description>
<addressOffset>0x0298</addressOffset>
</register>
<register>
<name>AC_ADC_DRC_MXGHS</name>
<description>ADC DRC MAX Gain High Setting Register</description>
<addressOffset>0x029C</addressOffset>
</register>
<register>
<name>AC_ADC_DRC_MXGLS</name>
<description>ADC DRC MAX Gain Low Setting Register</description>
<addressOffset>0x02A0</addressOffset>
</register>
<register>
<name>AC_ADC_DRC_MNGHS</name>
<description>ADC DRC MIN Gain High Setting Register</description>
<addressOffset>0x02A4</addressOffset>
</register>
<register>
<name>AC_ADC_DRC_MNGLS</name>
<description>ADC DRC MIN Gain Low Setting Register</description>
<addressOffset>0x02A8</addressOffset>
</register>
<register>
<name>AC_ADC_DRC_EPSHC</name>
<description>ADC DRC Expander Smooth Time High Coef Register</description>
<addressOffset>0x02AC</addressOffset>
</register>
<register>
<name>AC_ADC_DRC_EPSLC</name>
<description>ADC DRC Expander Smooth Time Low Coef Register</description>
<addressOffset>0x02B0</addressOffset>
</register>
<register>
<name>AC_ADC_DRC_HPFHGAIN</name>
<description>ADC DRC HPF Gain High Coef Register</description>
<addressOffset>0x02B8</addressOffset>
</register>
<register>
<name>AC_ADC_DRC_HPFLGAIN</name>
<description>ADC DRC HPF Gain Low Coef Register</description>
<addressOffset>0x02BC</addressOffset>
</register>
<register>
<name>ADC1_REG</name>
<description>ADC1 Analog Control Register</description>
<addressOffset>0x0300</addressOffset>
</register>
<register>
<name>ADC2_REG</name>
<description>ADC2 Analog Control Register</description>
<addressOffset>0x0304</addressOffset>
</register>
<register>
<name>ADC3_REG</name>
<description>ADC3 Analog Control Register</description>
<addressOffset>0x0308</addressOffset>
</register>
<register>
<name>DAC_REG</name>
<description>DAC Analog Control Register</description>
<addressOffset>0x0310</addressOffset>
</register>
<register>
<name>MICBIAS_REG</name>
<description>MICBIAS Analog Control Register</description>
<addressOffset>0x0318</addressOffset>
</register>
<register>
<name>RAMP_REG</name>
<description>BIAS Analog Control Register</description>
<addressOffset>0x031C</addressOffset>
</register>
<register>
<name>BIAS_REG</name>
<description>BIAS Analog Control Register</description>
<addressOffset>0x0320</addressOffset>
</register>
<register>
<name>ADC5_REG</name>
<description>ADC5 Analog Control Register</description>
<addressOffset>0x0330</addressOffset>
</register>
</registers>
</peripheral>
<peripheral>
<dim>4</dim>
<dimIncrement>0x400</dimIncrement>
<name>TWI[%s]</name>
<description>Two Wire Interface</description>
<groupName>Interfaces</groupName>
<baseAddress>0x02502000</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x400</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>TWI0</name>
<value>25</value>
</interrupt>
<interrupt>
<name>TWI1</name>
<value>26</value>
</interrupt>
<interrupt>
<name>TWI2</name>
<value>27</value>
</interrupt>
<interrupt>
<name>TWI3</name>
<value>28</value>
</interrupt>
<registers>
<register>
<name>TWI_ADDR</name>
<description>TWI Slave Address Register</description>
<addressOffset>0x0000</addressOffset>
<fields>
<field>
<name>SLA</name>
<description>Slave Address</description>
<bitRange>[7:1]</bitRange>
</field>
<field>
<name>GCE</name>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>TWI_XADDR</name>
<description>TWI Extended Slave Address Register</description>
<addressOffset>0x0004</addressOffset>
<fields>
<field>
<name>SLAX</name>
<description>Extend Slave Address\n\nSLAX[7:0]</description>
<bitRange>[7:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>TWI_DATA</name>
<description>TWI Data Byte Register</description>
<addressOffset>0x0008</addressOffset>
<fields>
<field>
<name>data</name>
<description>Data byte transmitted or received</description>
<bitRange>[7:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>TWI_CNTR</name>
<description>TWI Control Register</description>
<addressOffset>0x000C</addressOffset>
<fields>
<field>
<name>int_en</name>
<description>Interrupt Enable</description>
<bitRange>[7:7]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>low</name>
<description>The interrupt line always low</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>high</name>
<description>The interrupt line will go high when INT_FLAG is set</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>bus_en</name>
<description>TWI Bus Enable</description>
<bitRange>[6:6]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>ignored</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>respond</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>m_sta</name>
<description>Master Mode Start</description>
<bitRange>[5:5]</bitRange>
</field>
<field>
<name>m_stp</name>
<description>Master Mode Stop</description>
<bitRange>[4:4]</bitRange>
</field>
<field>
<name>int_flag</name>
<description>Interrupt Flag</description>
<bitRange>[3:3]</bitRange>
</field>
<field>
<name>a_ack</name>
<description>Assert Acknowledge</description>
<bitRange>[2:2]</bitRange>
</field>
<field>
<name>clk_count_mode</name>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>oscl</name>
<description>scl clock high period count on oscl</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>iscl</name>
<description>scl clock high period count on iscl</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>TWI_STAT</name>
<description>TWI Status Register</description>
<addressOffset>0x0010</addressOffset>
<access>read-only</access>
<fields>
<field>
<name>sta</name>
<bitRange>[7:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>be</name>
<description>Bus error</description>
<value>0x00</value>
</enumeratedValue>
<enumeratedValue>
<name>sct</name>
<description>START condition transmitted</description>
<value>0x08</value>
</enumeratedValue>
<enumeratedValue>
<name>rsct</name>
<description>Repeated START condition transmitted</description>
<value>0x10</value>
</enumeratedValue>
<enumeratedValue>
<name>awbt_ar</name>
<description>Address + Write bit transmitted, ACK received</description>
<value>0x18</value>
</enumeratedValue>
<enumeratedValue>
<name>awbt_anr</name>
<description>Address + Write bit transmitted, ACK not received</description>
<value>0x20</value>
</enumeratedValue>
<enumeratedValue>
<name>dbtm_ar</name>
<description>Data byte transmitted in master mode, ACK received</description>
<value>0x28</value>
</enumeratedValue>
<enumeratedValue>
<name>dbtm_anr</name>
<description>Data byte transmitted in master mode, ACK not received</description>
<value>0x30</value>
</enumeratedValue>
<enumeratedValue>
<name>al_a_db</name>
<description>Arbitration lost in address or data byte</description>
<value>0x38</value>
</enumeratedValue>
<enumeratedValue>
<name>arbt_ar</name>
<description>Address + Read bit transmitted, ACK received</description>
<value>0x40</value>
</enumeratedValue>
<enumeratedValue>
<name>arbt_anr</name>
<description>Address + Read bit transmitted, ACK not received</description>
<value>0x48</value>
</enumeratedValue>
<enumeratedValue>
<name>dbrm_at</name>
<description>Data byte received in master mode, ACK transmitted</description>
<value>0x50</value>
</enumeratedValue>
<enumeratedValue>
<name>dbrm_ant</name>
<description>Data byte received in master mode, not ACK transmitted</description>
<value>0x58</value>
</enumeratedValue>
<enumeratedValue>
<name>sawr_at</name>
<description>Slave address + Write bit received, ACK transmitted</description>
<value>0x60</value>
</enumeratedValue>
<enumeratedValue>
<name>al_am_sawr_at</name>
<description>Arbitration lost in the address as master, slave address + Write bit received, ACK transmitted</description>
<value>0x68</value>
</enumeratedValue>
<enumeratedValue>
<name>gcar_at</name>
<description>General Call address received, ACK transmitted</description>
<value>0x70</value>
</enumeratedValue>
<enumeratedValue>
<name>al_am_gcar_at</name>
<description>Arbitration lost in the address as master, General Call address received, ACK transmitted</description>
<value>0x78</value>
</enumeratedValue>
<enumeratedValue>
<name>dbr_sar_at</name>
<description>Data byte received after slave address received, ACK transmitted</description>
<value>0x80</value>
</enumeratedValue>
<enumeratedValue>
<name>dbr_sar_ant</name>
<description>Data byte received after slave address received, not ACK transmitted</description>
<value>0x88</value>
</enumeratedValue>
<enumeratedValue>
<name>dbr_gcr_at</name>
<description>Data byte received after General Call received, ACK transmitted</description>
<value>0x90</value>
</enumeratedValue>
<enumeratedValue>
<name>dbr_gcr_ant</name>
<description>Data byte received after General Call received, not ACK transmitted</description>
<value>0x98</value>
</enumeratedValue>
<enumeratedValue>
<name>srscrs</name>
<description>STOP or repeated START condition received in slave mode</description>
<value>0xA0</value>
</enumeratedValue>
<enumeratedValue>
<name>sarr_at</name>
<description>Slave address + Read bit received, ACK transmitted</description>
<value>0xA8</value>
</enumeratedValue>
<enumeratedValue>
<name>al_am_sarr_at</name>
<description>Arbitration lost in the address as master, slave address + Read bit received, ACK transmitted</description>
<value>0xB0</value>
</enumeratedValue>
<enumeratedValue>
<name>dbts_ar</name>
<description>Data byte transmitted in slave mode, ACK received</description>
<value>0xB8</value>
</enumeratedValue>
<enumeratedValue>
<name>dbts_anr</name>
<description>Data byte transmitted in slave mode, ACK not received</description>
<value>0xC0</value>
</enumeratedValue>
<enumeratedValue>
<name>lbts_ar</name>
<description>The Last byte transmitted in slave mode, ACK received</description>
<value>0xC8</value>
</enumeratedValue>
<enumeratedValue>
<name>sawt_ar</name>
<description>Second Address byte + Write bit transmitted, ACK received</description>
<value>0xD0</value>
</enumeratedValue>
<enumeratedValue>
<name>sawt_anr</name>
<description>Second Address byte + Write bit transmitted, ACK not received</description>
<value>0xD8</value>
</enumeratedValue>
<enumeratedValue>
<name>nrsi</name>
<description>No relevant status information, INT_FLAG=0</description>
<value>0xF8</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>TWI_CCR</name>
<description>TWI Clock Control Register</description>
<addressOffset>0x0014</addressOffset>
<fields>
<field>
<name>clk_duty</name>
<description>Setting duty cycle of clock as master</description>
<bitRange>[7:7]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>P50</name>
<description>50%</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>P40</name>
<description>40%</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>clk_m</name>
<bitRange>[6:3]</bitRange>
</field>
<field>
<name>clk_n</name>
<bitRange>[2:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>TWI_SRST</name>
<description>TWI Software Reset Register</description>
<addressOffset>0x0018</addressOffset>
<fields>
<field>
<name>soft_rst</name>
<description>Soft Reset</description>
<bitRange>[0:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>TWI_EFR</name>
<description>TWI Enhance Feature Register</description>
<addressOffset>0x001C</addressOffset>
<fields>
<field>
<name>dbn</name>
<description>Data Byte Number Follow Read Command Control</description>
<bitRange>[1:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>B0</name>
<description>No data byte can be written after the read command</description>
<value>0b00</value>
</enumeratedValue>
<enumeratedValue>
<name>B1</name>
<description>1-byte data can be written after the read command</description>
<value>0b01</value>
</enumeratedValue>
<enumeratedValue>
<name>B2</name>
<description>2-byte data can be written after the read command</description>
<value>0b10</value>
</enumeratedValue>
<enumeratedValue>
<name>B3</name>
<description>3-byte data can be written after the read command</description>
<value>0b11</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>TWI_LCR</name>
<description>TWI Line Control Register</description>
<addressOffset>0x0020</addressOffset>
<fields>
<field>
<name>scl_state</name>
<description>Current State of TWI_SCL</description>
<bitRange>[5:5]</bitRange>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>low</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>high</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>sda_state</name>
<description>Current State of TWI_SDA</description>
<bitRange>[4:4]</bitRange>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>low</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>high</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>scl_ctl</name>
<description>TWI_SCL Line State Control Bit</description>
<bitRange>[3:3]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>low</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>high</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>scl_ctl_en</name>
<description>TWI_SCL Line State Control Enable</description>
<bitRange>[2:2]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>sda_ctl</name>
<description>TWI_SDA Line State Control Bit</description>
<bitRange>[1:1]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>low</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>high</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>sda_ctl_en</name>
<description>TWI_SDA Line State Control Enable</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>TWI_DRV_CTRL</name>
<description>TWI_DRV Control Register</description>
<addressOffset>0x0200</addressOffset>
<fields>
<field>
<name>start_tran</name>
<description>Start transmission</description>
<bitRange>[31:31]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>idle</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>start</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>restart_mode</name>
<description>Restart mode</description>
<bitRange>[29:29]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>restart</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>stop_restart</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>read_tran_mode</name>
<description>Read transition mode</description>
<bitRange>[28:28]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>send</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>not_send</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>tran_result</name>
<description>Transition result</description>
<bitRange>[27:24]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>ok</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>fail</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>twi_sta</name>
<description>TWI status</description>
<bitRange>[23:16]</bitRange>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>be</name>
<description>bus error</description>
<value>0x00</value>
</enumeratedValue>
<enumeratedValue>
<name>sct</name>
<description>START condition transmitted</description>
<value>0x08</value>
</enumeratedValue>
<enumeratedValue>
<name>rsct</name>
<description>Repeated START condition transmitted</description>
<value>0x10</value>
</enumeratedValue>
<enumeratedValue>
<name>awbt_ar</name>
<description>Address + Write bit transmitted, ACK received</description>
<value>0x18</value>
</enumeratedValue>
<enumeratedValue>
<name>awbt_anr</name>
<description>Address + Write bit transmitted, ACK not received</description>
<value>0x20</value>
</enumeratedValue>
<enumeratedValue>
<name>dbtm_ar</name>
<description>Data byte transmitted in master mode, ACK received</description>
<value>0x28</value>
</enumeratedValue>
<enumeratedValue>
<name>dbtm_anr</name>
<description>Data byte transmitted in master mode, ACK not received</description>
<value>0x30</value>
</enumeratedValue>
<enumeratedValue>
<name>al_a_db</name>
<description>Arbitration lost in address or data byte</description>
<value>0x38</value>
</enumeratedValue>
<enumeratedValue>
<name>arbt_ar</name>
<description>Address + Read bit transmitted, ACK received</description>
<value>0x40</value>
</enumeratedValue>
<enumeratedValue>
<name>arbt_anr</name>
<description>Address + Read bit transmitted, ACK not received</description>
<value>0x48</value>
</enumeratedValue>
<enumeratedValue>
<name>dbrm_ar</name>
<description>Data byte received in master mode, ACK received</description>
<value>0x50</value>
</enumeratedValue>
<enumeratedValue>
<name>dbrm_anr</name>
<description>Data byte received in master mode, ACK not received</description>
<value>0x58</value>
</enumeratedValue>
<enumeratedValue>
<name>t_s9sc</name>
<description>Timeout when sending the 9th SCL clock</description>
<value>0x01</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>timeout_n</name>
<description>Timeout number</description>
<bitRange>[15:8]</bitRange>
</field>
<field>
<name>soft_reset</name>
<description>Software reset</description>
<bitRange>[1:1]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>normal</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>reset</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>twi_drv_en</name>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>TWI_DRV_CFG</name>
<description>TWI_DRV Transmission Configuration Register</description>
<addressOffset>0x0204</addressOffset>
<fields>
<field>
<name>pkt_interval</name>
<bitRange>[31:16]</bitRange>
</field>
<field>
<name>packet_cnt</name>
<bitRange>[15:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>TWI_DRV_SLV</name>
<description>TWI_DRV Slave ID Register</description>
<addressOffset>0x0208</addressOffset>
<fields>
<field>
<name>slv_id</name>
<description>Slave device ID</description>
<bitRange>[15:9]</bitRange>
</field>
<field>
<name>cmd</name>
<description>R/W operation to slave device</description>
<bitRange>[8:8]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>write</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>read</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>slv_id_x</name>
<description>SLAX[7:0]</description>
<bitRange>[7:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>TWI_DRV_FMT</name>
<description>TWI_DRV Packet Format Register</description>
<addressOffset>0x020C</addressOffset>
<fields>
<field>
<name>addr_byte</name>
<bitRange>[23:16]</bitRange>
</field>
<field>
<name>data_byte</name>
<bitRange>[15:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>TWI_DRV_BUS_CTRL</name>
<description>TWI_DRV Bus Control Register</description>
<addressOffset>0x0210</addressOffset>
<fields>
<field>
<name>clk_count_mode</name>
<bitRange>[16:16]</bitRange>
<access>write-only</access>
<enumeratedValues>
<enumeratedValue>
<name>oscl</name>
<description>scl clock high period count on oscl</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>iscl</name>
<description>scl clock high period count on iscl</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>clk_duty</name>
<description>Setting duty cycle of clock as master</description>
<bitRange>[15:15]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>P50</name>
<description>50%</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>P40</name>
<description>40%</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>clk_n</name>
<bitRange>[14:12]</bitRange>
</field>
<field>
<name>clk_m</name>
<bitRange>[11:8]</bitRange>
</field>
<field>
<name>scl_sta</name>
<description>SCL current status</description>
<bitRange>[7:7]</bitRange>
<access>read-only</access>
</field>
<field>
<name>sda_sta</name>
<description>SDA current status</description>
<bitRange>[6:6]</bitRange>
<access>read-only</access>
</field>
<field>
<name>scl_mov</name>
<description>SCL manual output value</description>
<bitRange>[3:3]</bitRange>
</field>
<field>
<name>sda_mov</name>
<description>SDA manual output value</description>
<bitRange>[2:2]</bitRange>
</field>
<field>
<name>scl_moe</name>
<description>SCL manual output enable</description>
<bitRange>[1:1]</bitRange>
</field>
<field>
<name>sda_moe</name>
<description>SDA manual output enable</description>
<bitRange>[0:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>TWI_DRV_INT_CTRL</name>
<description>TWI_DRV Interrupt Control Register</description>
<addressOffset>0x0214</addressOffset>
<fields>
<field>
<name>rx_req_int_en</name>
<bitRange>[19:19]</bitRange>
</field>
<field>
<name>tx_req_int_en</name>
<bitRange>[18:18]</bitRange>
</field>
<field>
<name>tran_err_int_en</name>
<bitRange>[17:17]</bitRange>
</field>
<field>
<name>tran_com_int_en</name>
<bitRange>[16:16]</bitRange>
</field>
<field>
<name>rx_req_pd</name>
<bitRange>[3:3]</bitRange>
</field>
<field>
<name>tx_req_pd</name>
<bitRange>[2:2]</bitRange>
</field>
<field>
<name>tran_err_pd</name>
<bitRange>[1:1]</bitRange>
</field>
<field>
<name>tran_com_pd</name>
<bitRange>[0:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>TWI_DRV_DMA_CFG</name>
<description>TWI_DRV DMA Configure Register</description>
<addressOffset>0x0218</addressOffset>
<fields>
<field>
<name>dma_rx_en</name>
<bitRange>[24:23]</bitRange>
</field>
<field>
<name>rx_trig</name>
<bitRange>[21:16]</bitRange>
</field>
<field>
<name>dma_tx_en</name>
<bitRange>[8:8]</bitRange>
</field>
<field>
<name>tx_trig</name>
<bitRange>[5:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>TWI_DRV_FIFO_CON</name>
<description>TWI_DRV FIFO Content Register</description>
<addressOffset>0x021C</addressOffset>
<fields>
<field>
<name>recv_fifo_clear</name>
<bitRange>[22:22]</bitRange>
</field>
<field>
<name>recv_fifo_content</name>
<bitRange>[21:16]</bitRange>
</field>
<field>
<name>send_fifo_clear</name>
<bitRange>[6:6]</bitRange>
</field>
<field>
<name>send_fifo_content</name>
<bitRange>[5:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>TWI_DRV_SEND_FIFO_ACC</name>
<description>TWI_DRV Send Data FIFO Access Register</description>
<addressOffset>0x0300</addressOffset>
<access>write-only</access>
<fields>
<field>
<name>send_data_fifo</name>
<bitRange>[7:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>TWI_DRV_RECV_FIFO_ACC</name>
<description>TWI_DRV Receive Data FIFO Access Register</description>
<addressOffset>0x0304</addressOffset>
<access>read-only</access>
<fields>
<field>
<name>recv_data_fifo</name>
<bitRange>[7:0]</bitRange>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<dim>6</dim>
<dimIncrement>0x400</dimIncrement>
<name>UART[%s]</name>
<description>Universal Asynchronous Receiver Transmitter</description>
<groupName>Interfaces</groupName>
<baseAddress>0x02500000</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x400</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>UART0</name>
<value>18</value>
</interrupt>
<interrupt>
<name>UART1</name>
<value>19</value>
</interrupt>
<interrupt>
<name>UART2</name>
<value>20</value>
</interrupt>
<interrupt>
<name>UART3</name>
<value>21</value>
</interrupt>
<interrupt>
<name>UART4</name>
<value>22</value>
</interrupt>
<interrupt>
<name>UART5</name>
<value>23</value>
</interrupt>
<registers>
<register>
<name>RBR</name>
<description>UART Receive Buffer Register</description>
<addressOffset>0x0000</addressOffset>
<access>read-only</access>
<fields>
<field>
<name>rbr</name>
<bitRange>[7:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>THR</name>
<description>UART Transmit Holding Register</description>
<addressOffset>0x0000</addressOffset>
<access>write-only</access>
<fields>
<field>
<name>thr</name>
<bitRange>[7:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>DLL</name>
<description>UART Divisor Latch Low Register</description>
<addressOffset>0x0000</addressOffset>
<fields>
<field>
<name>dll</name>
<bitRange>[7:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>DLH</name>
<description>UART Divisor Latch High Register</description>
<addressOffset>0x0004</addressOffset>
<fields>
<field>
<name>dlh</name>
<bitRange>[7:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>IER</name>
<description>UART Interrupt Enable Register</description>
<addressOffset>0x0004</addressOffset>
<fields>
<field>
<name>ptime</name>
<description>Programmable THRE Interrupt Mode Enable</description>
<bitRange>[7:7]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>rs485_int_en</name>
<description>RS485 Interrupt Enable</description>
<bitRange>[4:4]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>edssi</name>
<description>Enable Modem Status Interrupt</description>
<bitRange>[3:3]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>elsi</name>
<description>Enable Receiver Line Status Interrupt</description>
<bitRange>[2:2]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>etbei</name>
<description>Enable Transmit Holding Register Empty Interrupt</description>
<bitRange>[1:1]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>erbfi</name>
<description>Enable Received Data Available Interrupt</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>IIR</name>
<description>UART Interrupt Identity Register</description>
<addressOffset>0x0008</addressOffset>
<access>read-only</access>
<fields>
<field>
<name>feflag</name>
<description>FIFOs Enable Flag</description>
<bitRange>[7:6]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0b00</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>0b11</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>iid</name>
<description>Interrupt ID</description>
<bitRange>[3:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>modem_status</name>
<value>0b0000</value>
</enumeratedValue>
<enumeratedValue>
<name>no_interrupt_pending</name>
<value>0b0001</value>
</enumeratedValue>
<enumeratedValue>
<name>thr_empty</name>
<value>0b0010</value>
</enumeratedValue>
<enumeratedValue>
<name>rs485_interrupt</name>
<value>0b0011</value>
</enumeratedValue>
<enumeratedValue>
<name>received_data_available</name>
<value>0b0100</value>
</enumeratedValue>
<enumeratedValue>
<name>receiver_line_status</name>
<value>0b0110</value>
</enumeratedValue>
<enumeratedValue>
<name>busy_detect</name>
<value>0b0111</value>
</enumeratedValue>
<enumeratedValue>
<name>character_timeout</name>
<value>0b1100</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>FCR</name>
<description>UART FIFO Control Register</description>
<addressOffset>0x0008</addressOffset>
<access>write-only</access>
<fields>
<field>
<name>rt</name>
<bitRange>[7:6]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>one_character</name>
<value>0b00</value>
</enumeratedValue>
<enumeratedValue>
<name>quarter_full</name>
<value>0b01</value>
</enumeratedValue>
<enumeratedValue>
<name>half_full</name>
<value>0b10</value>
</enumeratedValue>
<enumeratedValue>
<name>two_less_than_full</name>
<value>0b11</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>tft</name>
<bitRange>[5:4]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>empty</name>
<value>0b00</value>
</enumeratedValue>
<enumeratedValue>
<name>two_characters</name>
<value>0b01</value>
</enumeratedValue>
<enumeratedValue>
<name>quarter_full</name>
<value>0b10</value>
</enumeratedValue>
<enumeratedValue>
<name>half_full</name>
<value>0b11</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>dmam</name>
<bitRange>[3:3]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>mode_0</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>mode_1</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>xfifor</name>
<bitRange>[2:2]</bitRange>
</field>
<field>
<name>rfifor</name>
<bitRange>[1:1]</bitRange>
</field>
<field>
<name>fifoe</name>
<bitRange>[0:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>LCR</name>
<description>UART Line Control Register</description>
<addressOffset>0x000C</addressOffset>
<fields>
<field>
<name>dlab</name>
<description>Divisor Latch Access Bit</description>
<bitRange>[7:7]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>rx_buffer</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>divisor_latch</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>bc</name>
<description>Break Control Bit</description>
<bitRange>[6:6]</bitRange>
</field>
<field>
<name>eps</name>
<description>Even Parity Select</description>
<bitRange>[5:4]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>odd</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>even</name>
<value>1</value>
</enumeratedValue>
<enumeratedValue>
<name>rs485_data</name>
<value>0b10</value>
</enumeratedValue>
<enumeratedValue>
<name>rs485_addr</name>
<value>0b11</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>pen</name>
<description>Parity Enable</description>
<bitRange>[3:3]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disabled</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enabled</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>stop</name>
<description>Number of stop bits</description>
<bitRange>[2:2]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>one</name>
<description>1 stop bit</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>two</name>
<description>1.5 stop bits when DLS(LCR[1:0]) is zero, else 2 stop bits</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>dls</name>
<description>Data Length Select</description>
<bitRange>[1:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>five</name>
<description>5 bits</description>
<value>0b00</value>
</enumeratedValue>
<enumeratedValue>
<name>six</name>
<description>6 bits</description>
<value>0b01</value>
</enumeratedValue>
<enumeratedValue>
<name>seven</name>
<description>7 bits</description>
<value>0b10</value>
</enumeratedValue>
<enumeratedValue>
<name>eight</name>
<description>8 bits</description>
<value>0b11</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>MCR</name>
<description>UART Modem Control Register</description>
<addressOffset>0x0010</addressOffset>
<fields>
<field>
<name>function</name>
<description>UART Function: Select IrDA or RS485</description>
<bitRange>[7:6]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>UART</name>
<value>0b00</value>
</enumeratedValue>
<enumeratedValue>
<name>IrDA_SIR</name>
<value>0b01</value>
</enumeratedValue>
<enumeratedValue>
<name>RS485</name>
<value>0b10</value>
</enumeratedValue>
<enumeratedValue>
<name>reserved</name>
<value>0b11</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>afce</name>
<description>Auto Flow Control Enable</description>
<bitRange>[5:5]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disabled</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enabled</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>loop</name>
<description>Loop Back Mode</description>
<bitRange>[4:4]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>normal</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>loop_back</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>rts</name>
<description>Request to Send</description>
<bitRange>[1:1]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>deasserted</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>asserted</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>dtr</name>
<description>Data Terminal Ready</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>deasserted</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>asserted</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>LSR</name>
<description>UART Line Status Register</description>
<addressOffset>0x0014</addressOffset>
<access>read-only</access>
<fields>
<field>
<name>fifoerr</name>
<description>RX Data Error in FIFO</description>
<bitRange>[7:7]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>error</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>temt</name>
<description>Transmitter Empty</description>
<bitRange>[6:6]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>empty</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>thre</name>
<description>TX Holding Register Empty</description>
<bitRange>[5:5]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>empty</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>bi</name>
<description>Break Interrupt</description>
<bitRange>[4:4]</bitRange>
</field>
<field>
<name>fe</name>
<description>Framing Error</description>
<bitRange>[3:3]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>error</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>pe</name>
<description>Parity Error</description>
<bitRange>[2:2]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>error</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>oe</name>
<description>Overrun Error</description>
<bitRange>[1:1]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>error</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>dr</name>
<description>Data Ready</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>ready</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>MSR</name>
<description>UART Modem Status Register</description>
<addressOffset>0x0018</addressOffset>
<access>read-only</access>
<fields>
<field>
<name>dcd</name>
<description>Line State of Data Carrier Detect</description>
<bitRange>[7:7]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>deasserted</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>asserted</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>ri</name>
<description>Line State of Ring Indicator</description>
<bitRange>[6:6]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>deasserted</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>asserted</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>dsr</name>
<description>Line State of Data Set Ready</description>
<bitRange>[5:5]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>deasserted</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>asserted</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>cts</name>
<description>Line State of Clear To Send</description>
<bitRange>[4:4]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>deasserted</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>asserted</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>ddcd</name>
<description>Delta Data Carrier Detect</description>
<bitRange>[3:3]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>no_change</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>change</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>teri</name>
<description>Trailing Edge Ring Indicator</description>
<bitRange>[2:2]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>no_change</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>change</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>ddsr</name>
<description>Delta Data Set Ready</description>
<bitRange>[1:1]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>no_change</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>change</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>dcts</name>
<description>Delta Clear to Send</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>no_change</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>change</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>SCH</name>
<description>UART Scratch Register</description>
<addressOffset>0x001C</addressOffset>
<fields>
<field>
<name>scratch</name>
<bitRange>[7:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>USR</name>
<description>UART Status Register</description>
<addressOffset>0x007C</addressOffset>
<access>read-only</access>
<fields>
<field>
<name>rff</name>
<description>RX FIFO Full</description>
<bitRange>[4:4]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>not_full</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>full</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>rfne</name>
<description>RX FIFO Not Empty</description>
<bitRange>[3:3]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>empty</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>not_empty</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>tfe</name>
<description>TX FIFO Empty</description>
<bitRange>[2:2]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>not_empty</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>empty</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>tfnf</name>
<description>TX FIFO Not Full</description>
<bitRange>[1:1]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>full</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>not_full</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>busy</name>
<description>UART Busy Bit</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>idle</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>busy</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>TFL</name>
<description>UART Transmit FIFO Level Register</description>
<addressOffset>0x0080</addressOffset>
<access>read-only</access>
<fields>
<field>
<name>tfl</name>
<description>TX FIFO Level</description>
<bitRange>[8:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>RFL</name>
<description>UART Receive FIFO Level Register</description>
<addressOffset>0x0084</addressOffset>
<access>read-only</access>
<fields>
<field>
<name>rfl</name>
<description>RX FIFO Level</description>
<bitRange>[8:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>HSK</name>
<description>UART DMA Handshake Configuration Register</description>
<addressOffset>0x0088</addressOffset>
<fields>
<field>
<name>hsk</name>
<description>Handshake configuration</description>
<bitRange>[7:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>wait_cycle</name>
<value>0xA5</value>
</enumeratedValue>
<enumeratedValue>
<name>handshake</name>
<value>0xE5</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>DMA_REQ_EN</name>
<description>UART DMA Request Enable Register</description>
<addressOffset>0x008C</addressOffset>
<fields>
<field>
<name>timeout_enable</name>
<description>DMA Timeout Enable</description>
<bitRange>[2:2]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>tx_req_enable</name>
<description>DMA TX REQ Enable</description>
<bitRange>[1:1]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>rx_req_enable</name>
<description>DMA RX REQ Enable</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>HALT</name>
<description>UART Halt TX Register</description>
<addressOffset>0x00A4</addressOffset>
<fields>
<field>
<name>pte</name>
<description>The sending of TX_REQ</description>
<bitRange>[7:7]</bitRange>
</field>
<field>
<name>dma_pte_rx</name>
<description>The Transmission of RX_DRQ</description>
<bitRange>[6:6]</bitRange>
</field>
<field>
<name>sir_rx_invert</name>
<description>SIR RX Pulse Polarity Invert</description>
<bitRange>[5:5]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>not_invert</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>invert</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>sir_tx_invert</name>
<description>SIR TX Pulse Polarity Invert</description>
<bitRange>[4:4]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>not_invert</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>invert</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>change_update</name>
<bitRange>[2:2]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>finished</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>update_trigger</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>chcfg_at_busy</name>
<bitRange>[1:1]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>halt_tx</name>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disabled</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enabled</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>DBG_DLL</name>
<description>UART Debug DLL Register</description>
<addressOffset>0x00B0</addressOffset>
<access>read-only</access>
<fields>
<field>
<name>DBG_DLL</name>
<bitRange>[7:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>DBG_DLH</name>
<description>UART Debug DLH Register</description>
<addressOffset>0x00B4</addressOffset>
<access>read-only</access>
<fields>
<field>
<name>DBG_DLH</name>
<bitRange>[7:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>FCC</name>
<description>UART FIFO Clock Control Register</description>
<addressOffset>0x00F0</addressOffset>
<fields>
<field>
<name>fifo_depth</name>
<bitRange>[31:8]</bitRange>
<access>read-only</access>
</field>
<field>
<name>rx_fifo_clock_mode</name>
<bitRange>[2:2]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>wr_apb</name>
<description>Sync mode, writing/reading clocks use apb clock</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>w_apb_r_ahb</name>
<description>Sync mode, writing clock uses apb clock, reading clock uses ahb clock</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>tx_fifo_clock_enable</name>
<bitRange>[1:1]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>rx_fifo_clock_enable</name>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>RXDMA_CTRL</name>
<description>UART RXDMA Control Register</description>
<addressOffset>0x0100</addressOffset>
<fields>
<field>
<name>timeout_threshold</name>
<description>RXDMA Timeout Threshold\n\nUnit is 1 UART bit time</description>
<bitRange>[23:8]</bitRange>
</field>
<field>
<name>timeout_enable</name>
<description>RXDMA Timeout Enable</description>
<bitRange>[6:6]</bitRange>
</field>
<field>
<name>ahb_burst_mode</name>
<description>Set for AHB port burst supported</description>
<bitRange>[5:4]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>SINGLE</name>
<value>0b00</value>
</enumeratedValue>
<enumeratedValue>
<name>INCR4</name>
<value>0b01</value>
</enumeratedValue>
<enumeratedValue>
<name>INCR8</name>
<value>0b10</value>
</enumeratedValue>
<enumeratedValue>
<name>INCR16</name>
<value>0b11</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>blk_size</name>
<bitRange>[3:2]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>B8</name>
<value>0b00</value>
</enumeratedValue>
<enumeratedValue>
<name>B16</name>
<value>0b01</value>
</enumeratedValue>
<enumeratedValue>
<name>B32</name>
<value>0b10</value>
</enumeratedValue>
<enumeratedValue>
<name>B64</name>
<value>0b11</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>mode</name>
<bitRange>[1:1]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Continous</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Limited</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>enable</name>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>RXDMA_STR</name>
<description>UART RXDMA Start Register</description>
<addressOffset>0x0104</addressOffset>
<fields>
<field>
<name>start</name>
<bitRange>[0:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>RXDMA_STA</name>
<description>UART RXDMA Status Register</description>
<addressOffset>0x0108</addressOffset>
<fields>
<field>
<name>buffer_read_address_updating</name>
<bitRange>[1:1]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>ready</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>busy</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>busy</name>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>idle</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>busy</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>RXDMA_LMT</name>
<description>UART RXDMA Limit Register</description>
<addressOffset>0x010C</addressOffset>
<fields>
<field>
<name>limit_size</name>
<bitRange>[15:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>RXDMA_SADDRL</name>
<description>UART RXDMA Buffer Start Address Low Register</description>
<addressOffset>0x0110</addressOffset>
</register>
<register>
<name>RXDMA_SADDRH</name>
<description>UART RXDMA Buffer Start Address High Register</description>
<addressOffset>0x0114</addressOffset>
<fields>
<field>
<name>saddr</name>
<description>RXDMA Buffer Start Address [33:32]</description>
<bitRange>[1:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>RXDMA_BL</name>
<description>UART RXDMA Buffer Length Register</description>
<addressOffset>0x0118</addressOffset>
<fields>
<field>
<name>buffer_length</name>
<bitRange>[15:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>RXDMA_IE</name>
<description>UART RXDMA Interrupt Enable Register</description>
<addressOffset>0x0120</addressOffset>
<fields>
<field>
<name>buffer_overrun</name>
<bitRange>[3:3]</bitRange>
</field>
<field>
<name>timeout_done</name>
<bitRange>[2:2]</bitRange>
</field>
<field>
<name>blk_done</name>
<bitRange>[1:1]</bitRange>
</field>
<field>
<name>limit_done</name>
<bitRange>[0:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>RXDMA_IS</name>
<description>UART RXDMA Interrupt Status Register</description>
<addressOffset>0x0124</addressOffset>
<fields>
<field>
<name>buffer_overrun</name>
<bitRange>[3:3]</bitRange>
</field>
<field>
<name>timeout_done</name>
<bitRange>[2:2]</bitRange>
</field>
<field>
<name>blk_done</name>
<bitRange>[1:1]</bitRange>
</field>
<field>
<name>limit_done</name>
<bitRange>[0:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>RXDMA_WADDRL</name>
<description>UART RXDMA Write Address Low Register</description>
<addressOffset>0x0128</addressOffset>
<access>read-only</access>
</register>
<register>
<name>RXDMA_WADDRH</name>
<description>UART RXDMA Write Address High Register</description>
<addressOffset>0x012C</addressOffset>
<access>read-only</access>
<fields>
<field>
<name>waddr</name>
<description>RXDMA Current Write Address [33:32]</description>
<bitRange>[1:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>RXDMA_RADDRL</name>
<description>UART RXDMA Read Address Low Register</description>
<addressOffset>0x0130</addressOffset>
</register>
<register>
<name>RXDMA_RADDRH</name>
<description>UART RXDMA Read Address High Register</description>
<addressOffset>0x0134</addressOffset>
<fields>
<field>
<name>raddr</name>
<description>RXDMA Current Read Address [33:32]</description>
<bitRange>[1:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>RXDMA_DCNT</name>
<description>UART RXDMA Data Count Register</description>
<addressOffset>0x0138</addressOffset>
<fields>
<field>
<name>data_count</name>
<bitRange>[15:0]</bitRange>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>SPI0</name>
<description>Serial Peripheral Interface</description>
<groupName>Interfaces</groupName>
<baseAddress>0x04025000</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x1000</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>SPI0</name>
<value>31</value>
</interrupt>
<registers>
<register>
<name>SPI_GCR</name>
<description>SPI Global Control Register</description>
<addressOffset>0x0004</addressOffset>
<fields>
<field>
<name>srst</name>
<description>Soft reset</description>
<bitRange>[31:31]</bitRange>
</field>
<field>
<name>tp_en</name>
<description>Transmit Pause Enable</description>
<bitRange>[7:7]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>normal</name>
<description>normal operation, ignore RXFIFO status</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>stop_when_full</name>
<description>Stop transmit data when RXFIFO full</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>mode_selec</name>
<description>Sample timing Mode Select</description>
<bitRange>[2:2]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>old_mode</name>
<description>Old mode of Sample Timing</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>new_mode</name>
<description>New mode of Sample Timing</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>mode</name>
<description>SPI Function Mode Select</description>
<bitRange>[1:1]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>slave</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>master</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>en</name>
<description>SPI Module Enable Control</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>SPI_TCR</name>
<description>SPI Transfer Control Register</description>
<addressOffset>0x0008</addressOffset>
<fields>
<field>
<name>xch</name>
<description>Exchange Burst</description>
<bitRange>[31:31]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>idle</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>initiate_exchange</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>sdc1</name>
<description>Master Sample Data Control register1</description>
<bitRange>[15:15]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>normal</name>
<description>normal operation, do not delay the internal read sample point</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>delay</name>
<description>delay the internal read sample point</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>sddm</name>
<description>Sending Data Delay Mode</description>
<bitRange>[14:14]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>normal</name>
<description>normal sending</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>delay</name>
<description>delay sending</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>sdm</name>
<description>Master Sample Data Mode</description>
<bitRange>[13:13]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>delay</name>
<description>delay sample mode</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>normal</name>
<description>normal sample mode</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>fbs</name>
<description>First Transmit Bit Select</description>
<bitRange>[12:12]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>msb</name>
<description>MSB first</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>lsb</name>
<description>LSB first</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>sdc</name>
<description>Master Sample Data Control</description>
<bitRange>[11:11]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>normal</name>
<description>Normal operation, do not delay the internal read sample point</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>delay</name>
<description>Delay the internal read sample point</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>rpsm</name>
<description>Rapids Mode Select</description>
<bitRange>[10:10]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>normal</name>
<description>Normal write mode</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>rapid</name>
<description>Rapid write mode</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>ddb</name>
<description>Dummy Burst Type</description>
<bitRange>[9:9]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>zero</name>
<description>The bit value of dummy SPI burst is zero</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>one</name>
<description>The bit value of dummy SPI burst is one</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>dhb</name>
<description>Discard Hash Burst</description>
<bitRange>[8:8]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>receive</name>
<description>Receiving all SPI bursts in the BC period</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>discard</name>
<description>Discard unused SPI bursts</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>ss_level</name>
<bitRange>[7:7]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>low</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>high</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>ss_owner</name>
<bitRange>[6:6]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>spi_controller</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>software</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>ss_sel</name>
<bitRange>[5:4]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>ss0</name>
<value>0b00</value>
</enumeratedValue>
<enumeratedValue>
<name>ss1</name>
<value>0b01</value>
</enumeratedValue>
<enumeratedValue>
<name>ss2</name>
<value>0b10</value>
</enumeratedValue>
<enumeratedValue>
<name>ss3</name>
<value>0b11</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>ssctl</name>
<bitRange>[3:3]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>assert</name>
<description>SPI_SSx remains asserted between SPI bursts</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>negate</name>
<description>Negate SPI_SSx between SPI bursts</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>spol</name>
<description>SPI Chip Select Signal Polarity Control</description>
<bitRange>[2:2]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>high</name>
<description>Active high polarity</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>low</name>
<description>Active low polarity</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>cpol</name>
<description>SPI Clock Polarity Control</description>
<bitRange>[1:1]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>high</name>
<description>Active high polarity</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>low</name>
<description>Active low polarity</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>cpha</name>
<description>SPI Clock/Data Phase Control</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>P0</name>
<description>Phase 0 (Leading edge for sample data)</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>P1</name>
<description>Phase 1 (Leading edge for setup data)</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>SPI_IER</name>
<description>SPI Interrupt Control Register</description>
<addressOffset>0x0010</addressOffset>
<fields>
<field>
<name>ss_int_en</name>
<description>SSI Interrupt Enable</description>
<bitRange>[13:13]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>tc_int_en</name>
<description>Transfer Completed Interrupt Enable</description>
<bitRange>[12:12]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>tf_udr_int_en</name>
<description>TXFIFO Underrun Interrupt Enable</description>
<bitRange>[11:11]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>tf_ovf_int_en</name>
<description>TXFIFO Overflow Interrupt Enable</description>
<bitRange>[10:10]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>rf_udr_int_en</name>
<description>RXFIFO Underrun Interrupt Enable</description>
<bitRange>[9:9]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>rf_ovf_int_en</name>
<description>RXFIFO Overflow Interrupt Enable</description>
<bitRange>[8:8]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>tf_full_int_en</name>
<description>TXFIFO Full Interrupt Enable</description>
<bitRange>[6:6]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>tf_emp_int_en</name>
<description>TXFIFO Empty Interrupt Enable</description>
<bitRange>[5:5]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>tf_erq_int_en</name>
<description>TXFIFO Empty Request Interrupt Enable</description>
<bitRange>[4:4]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>rf_full_int_en</name>
<description>RXFIFO Full Interrupt Enable</description>
<bitRange>[2:2]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>rf_emp_int_en</name>
<description>RXFIFO Empty Interrupt Enable</description>
<bitRange>[1:1]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>rf_rdy_int_en</name>
<description>RXFIFO Ready Request Interrupt Enable</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>SPI_ISR</name>
<description>SPI Interrupt Status Register</description>
<addressOffset>0x0014</addressOffset>
<fields>
<field>
<name>ssi</name>
<description>SS Invalid Enable</description>
<bitRange>[13:13]</bitRange>
</field>
<field>
<name>tc</name>
<description>Transfer Completed</description>
<bitRange>[12:12]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>busy</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>transfer_completed</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>tf_udr</name>
<description>TXFIFO Underrun</description>
<bitRange>[11:11]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>not_underrun</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>underrun</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>tf_ovf</name>
<description>TXFIFO Overflow</description>
<bitRange>[10:10]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>not_overflow</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>overflow</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>rf_udr</name>
<description>RXFIFO Underrun</description>
<bitRange>[9:9]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>not_underrun</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>underrun</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>rf_ovf</name>
<description>RXFIFO Overflow</description>
<bitRange>[8:8]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>not_overflow</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>overflow</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>tf_full</name>
<description>TXFIFO Full</description>
<bitRange>[6:6]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>not_full</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>full</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>tf_emp</name>
<description>TXFIFO Empty</description>
<bitRange>[5:5]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>not_empty</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>empty</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>tf_ready</name>
<description>TXFIFO Ready</description>
<bitRange>[4:4]</bitRange>
</field>
<field>
<name>rf_full</name>
<description>RXFIFO Full</description>
<bitRange>[2:2]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>not_full</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>full</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>rf_emp</name>
<description>RXFIFO Empty</description>
<bitRange>[1:1]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>not_empty</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>empty</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>rf_rdy</name>
<description>RXFIFO Ready</description>
<bitRange>[0:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>SPI_FCR</name>
<description>SPI FIFO Control Register</description>
<addressOffset>0x0018</addressOffset>
<fields>
<field>
<name>tf_rst</name>
<description>TXFIFO Reset</description>
<bitRange>[31:31]</bitRange>
</field>
<field>
<name>tf_test_en</name>
<description>TXFIFO Test Mode Enable</description>
<bitRange>[30:30]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>tf_drq_en</name>
<description>TXFIFO DMA Request Enable</description>
<bitRange>[24:24]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>tf_trig_level</name>
<description>TXFIFO Empty Request Trigger Level</description>
<bitRange>[23:16]</bitRange>
</field>
<field>
<name>rf_rst</name>
<description>RXFIFO Reset</description>
<bitRange>[15:15]</bitRange>
</field>
<field>
<name>rf_test_en</name>
<description>RXFIFO Test Mode Enable</description>
<bitRange>[14:14]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>rf_drq_en</name>
<description>RXFIFO DMA Request Enable</description>
<bitRange>[8:8]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>rf_trig_level</name>
<description>RXFIFO Ready Request Trigger Level</description>
<bitRange>[7:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>SPI_FSR</name>
<description>SPI FIFO Status Register</description>
<addressOffset>0x001C</addressOffset>
<access>read-only</access>
<fields>
<field>
<name>tb_wr</name>
<description>TXFIFO Write Buffer Write Enable</description>
<bitRange>[31:31]</bitRange>
</field>
<field>
<name>tb_cnt</name>
<description>TXFIFO Write Buffer Counter</description>
<bitRange>[30:28]</bitRange>
</field>
<field>
<name>tf_cnt</name>
<description>TXFIFO Counter\n\nThese bits indicate the number of bytes in TXFIFO</description>
<bitRange>[23:16]</bitRange>
</field>
<field>
<name>rb_wr</name>
<description>RXFIFO Write Buffer Write Enable</description>
<bitRange>[15:15]</bitRange>
</field>
<field>
<name>rb_cnt</name>
<description>RXFIFO Write Buffer Counter</description>
<bitRange>[14:12]</bitRange>
</field>
<field>
<name>rf_cnt</name>
<description>RXFIFO Counter\n\nThese bits indicate the number of bytes in RXFIFO</description>
<bitRange>[7:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>SPI_WCR</name>
<description>SPI Wait Clock Register</description>
<addressOffset>0x0020</addressOffset>
<fields>
<field>
<name>swc</name>
<description>Dual mode direction switch wait clock counter</description>
<bitRange>[19:16]</bitRange>
</field>
<field>
<name>wwc</name>
<description>Wait clock counter</description>
<bitRange>[15:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>SPI_SAMP_DL</name>
<description>SPI Sample Delay Control Register</description>
<addressOffset>0x0028</addressOffset>
<fields>
<field>
<name>samp_dl_cal_start</name>
<description>Sample Delay Calibration Start</description>
<bitRange>[15:15]</bitRange>
</field>
<field>
<name>samp_dl_cal_done</name>
<description>Sample Delay Calibration Dont</description>
<bitRange>[14:14]</bitRange>
<access>read-only</access>
</field>
<field>
<name>samp_dl</name>
<description>Sample Delay</description>
<bitRange>[13:8]</bitRange>
<access>read-only</access>
</field>
<field>
<name>samp_dl_sw_en</name>
<description>Sample Delay Software Enable</description>
<bitRange>[7:7]</bitRange>
</field>
<field>
<name>samp_dl_sw</name>
<description>Sample Delay Software</description>
<bitRange>[5:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>SPI_MBC</name>
<description>SPI Master Burst Counter Register</description>
<addressOffset>0x0030</addressOffset>
<fields>
<field>
<name>mbc</name>
<description>Master Burst Counter</description>
<bitRange>[23:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>SPI_MTC</name>
<description>SPI Master Transmit Counter Register</description>
<addressOffset>0x0034</addressOffset>
<fields>
<field>
<name>mwtc</name>
<description>Master Write Transmit Counter</description>
<bitRange>[23:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>SPI_BCC</name>
<description>SPI Master Burst Control Register</description>
<addressOffset>0x0038</addressOffset>
<fields>
<field>
<name>quad_en</name>
<description>Quad Mode Enable</description>
<bitRange>[29:29]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>drm</name>
<description>Master Dual Mode RX Enable</description>
<bitRange>[28:28]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>single</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>dual</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>dbc</name>
<description>Master Dummy Burst Counter</description>
<bitRange>[27:24]</bitRange>
</field>
<field>
<name>stc</name>
<description>Master Single Mode Transmit Counter</description>
<bitRange>[23:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>SPI_BATC</name>
<description>SPI Bit-Aligned Transfer Configure Register</description>
<addressOffset>0x0040</addressOffset>
<fields>
<field>
<name>tce</name>
<description>Transfer Control Enable</description>
<bitRange>[31:31]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>idle</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>init</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>msms</name>
<description>Master Sample Standard</description>
<bitRange>[30:30]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>delay</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>standard</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>tbc</name>
<description>Transfer Bits Completed</description>
<bitRange>[25:25]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>busy</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>completed</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>tbc_int_en</name>
<description>Transfer Bits Completed Interrupt Enable</description>
<bitRange>[24:24]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>rx_frm_len</name>
<description>Configure the length of serial data frame of RX</description>
<bitRange>[21:16]</bitRange>
</field>
<field>
<name>tx_frm_len</name>
<description>Configure the length of serial data frame of TX</description>
<bitRange>[13:8]</bitRange>
</field>
<field>
<name>ss_level</name>
<bitRange>[7:7]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>low</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>high</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>ss_owner</name>
<description>SS Output Owner Select</description>
<bitRange>[6:6]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>SPI_controller</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Software</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>spol</name>
<description>SPI Chip Select Signal Polarity Control</description>
<bitRange>[5:5]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>high</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>low</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>ss_sel</name>
<description>SPI Chip Select</description>
<bitRange>[3:2]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>SS0</name>
<value>0b00</value>
</enumeratedValue>
<enumeratedValue>
<name>SS1</name>
<value>0b01</value>
</enumeratedValue>
<enumeratedValue>
<name>SS2</name>
<value>0b10</value>
</enumeratedValue>
<enumeratedValue>
<name>SS3</name>
<value>0b11</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>wms</name>
<description>Work Mode Select</description>
<bitRange>[1:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>byte_aligned</name>
<value>0b00</value>
</enumeratedValue>
<enumeratedValue>
<name>reserved</name>
<value>0b01</value>
</enumeratedValue>
<enumeratedValue>
<name>bit_aligned_3wire</name>
<value>0b10</value>
</enumeratedValue>
<enumeratedValue>
<name>bit_aligned_standard</name>
<value>0b11</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>SPI_BA_CCR</name>
<description>SPI Bit-Aligned Clock Configuration Register</description>
<addressOffset>0x0044</addressOffset>
<fields>
<field>
<name>cdr_n</name>
<description>Clock Divide Rate</description>
<bitRange>[7:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>SPI_TBR</name>
<description>SPI TX Bit Register\n\nVTB [31:0]: The Value of the Transmit Bits</description>
<addressOffset>0x0048</addressOffset>
</register>
<register>
<name>SPI_RBR</name>
<description>SPI RX Bit Register\n\nVRB [31:0]: The Value of the Receive Bits</description>
<addressOffset>0x004C</addressOffset>
</register>
<register>
<name>SPI_NDMA_MODE_CTL</name>
<description>SPI Normal DMA Mode Control Register</description>
<addressOffset>0x0088</addressOffset>
<fields>
<field>
<name>spi_act_m</name>
<description>SPI NDMA Active Mode</description>
<bitRange>[7:6]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>low</name>
<value>0b00</value>
</enumeratedValue>
<enumeratedValue>
<name>high</name>
<value>0b01</value>
</enumeratedValue>
<enumeratedValue>
<name>drq_control</name>
<value>0b10</value>
</enumeratedValue>
<enumeratedValue>
<name>controller_control</name>
<value>0b11</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>spi_ack_m</name>
<description>SPI NDMA Acknowledge Mode</description>
<bitRange>[5:5]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>ignore</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>after_detect</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>spi_dma_wait</name>
<bitRange>[4:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>SPI_TXD</name>
<description>SPI TX Data Register\n\nTDATA [31:0]: Transmit Data</description>
<addressOffset>0x0200</addressOffset>
</register>
<register>
<name>SPI_RXD</name>
<description>SPI RX Data Register\n\nRDATA [31:0]: Receive Data</description>
<addressOffset>0x0300</addressOffset>
</register>
</registers>
</peripheral>
<peripheral>
<name>SPI_DBI</name>
<description>Serial Peripheral Interface Display Bus Interface</description>
<groupName>Interfaces</groupName>
<baseAddress>0x04026000</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x1000</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>SPI1</name>
<value>32</value>
</interrupt>
<registers>
<register>
<name>SPI_GCR</name>
<description>SPI Global Control Register</description>
<addressOffset>0x0004</addressOffset>
<fields>
<field>
<name>srst</name>
<description>Soft reset</description>
<bitRange>[31:31]</bitRange>
</field>
<field>
<name>tp_en</name>
<description>Transmit Pause Enable</description>
<bitRange>[7:7]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>normal</name>
<description>normal operation, ignore RXFIFO status</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>stop_when_full</name>
<description>Stop transmit data when RXFIFO full</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>mode_selec</name>
<description>Sample timing Mode Select</description>
<bitRange>[2:2]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>old_mode</name>
<description>Old mode of Sample Timing</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>new_mode</name>
<description>New mode of Sample Timing</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>mode</name>
<description>SPI Function Mode Select</description>
<bitRange>[1:1]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>slave</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>master</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>en</name>
<description>SPI Module Enable Control</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>SPI_TCR</name>
<description>SPI Transfer Control Register</description>
<addressOffset>0x0008</addressOffset>
<fields>
<field>
<name>xch</name>
<description>Exchange Burst</description>
<bitRange>[31:31]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>idle</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>initiate_exchange</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>sdc1</name>
<description>Master Sample Data Control register1</description>
<bitRange>[15:15]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>normal</name>
<description>normal operation, do not delay the internal read sample point</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>delay</name>
<description>delay the internal read sample point</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>sddm</name>
<description>Sending Data Delay Mode</description>
<bitRange>[14:14]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>normal</name>
<description>normal sending</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>delay</name>
<description>delay sending</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>sdm</name>
<description>Master Sample Data Mode</description>
<bitRange>[13:13]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>delay</name>
<description>delay sample mode</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>normal</name>
<description>normal sample mode</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>fbs</name>
<description>First Transmit Bit Select</description>
<bitRange>[12:12]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>msb</name>
<description>MSB first</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>lsb</name>
<description>LSB first</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>sdc</name>
<description>Master Sample Data Control</description>
<bitRange>[11:11]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>normal</name>
<description>Normal operation, do not delay the internal read sample point</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>delay</name>
<description>Delay the internal read sample point</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>rpsm</name>
<description>Rapids Mode Select</description>
<bitRange>[10:10]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>normal</name>
<description>Normal write mode</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>rapid</name>
<description>Rapid write mode</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>ddb</name>
<description>Dummy Burst Type</description>
<bitRange>[9:9]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>zero</name>
<description>The bit value of dummy SPI burst is zero</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>one</name>
<description>The bit value of dummy SPI burst is one</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>dhb</name>
<description>Discard Hash Burst</description>
<bitRange>[8:8]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>receive</name>
<description>Receiving all SPI bursts in the BC period</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>discard</name>
<description>Discard unused SPI bursts</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>ss_level</name>
<bitRange>[7:7]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>low</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>high</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>ss_owner</name>
<bitRange>[6:6]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>spi_controller</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>software</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>ss_sel</name>
<bitRange>[5:4]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>ss0</name>
<value>0b00</value>
</enumeratedValue>
<enumeratedValue>
<name>ss1</name>
<value>0b01</value>
</enumeratedValue>
<enumeratedValue>
<name>ss2</name>
<value>0b10</value>
</enumeratedValue>
<enumeratedValue>
<name>ss3</name>
<value>0b11</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>ssctl</name>
<bitRange>[3:3]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>assert</name>
<description>SPI_SSx remains asserted between SPI bursts</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>negate</name>
<description>Negate SPI_SSx between SPI bursts</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>spol</name>
<description>SPI Chip Select Signal Polarity Control</description>
<bitRange>[2:2]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>high</name>
<description>Active high polarity</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>low</name>
<description>Active low polarity</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>cpol</name>
<description>SPI Clock Polarity Control</description>
<bitRange>[1:1]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>high</name>
<description>Active high polarity</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>low</name>
<description>Active low polarity</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>cpha</name>
<description>SPI Clock/Data Phase Control</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>P0</name>
<description>Phase 0 (Leading edge for sample data)</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>P1</name>
<description>Phase 1 (Leading edge for setup data)</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>SPI_IER</name>
<description>SPI Interrupt Control Register</description>
<addressOffset>0x0010</addressOffset>
<fields>
<field>
<name>ss_int_en</name>
<description>SSI Interrupt Enable</description>
<bitRange>[13:13]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>tc_int_en</name>
<description>Transfer Completed Interrupt Enable</description>
<bitRange>[12:12]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>tf_udr_int_en</name>
<description>TXFIFO Underrun Interrupt Enable</description>
<bitRange>[11:11]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>tf_ovf_int_en</name>
<description>TXFIFO Overflow Interrupt Enable</description>
<bitRange>[10:10]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>rf_udr_int_en</name>
<description>RXFIFO Underrun Interrupt Enable</description>
<bitRange>[9:9]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>rf_ovf_int_en</name>
<description>RXFIFO Overflow Interrupt Enable</description>
<bitRange>[8:8]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>tf_full_int_en</name>
<description>TXFIFO Full Interrupt Enable</description>
<bitRange>[6:6]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>tf_emp_int_en</name>
<description>TXFIFO Empty Interrupt Enable</description>
<bitRange>[5:5]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>tf_erq_int_en</name>
<description>TXFIFO Empty Request Interrupt Enable</description>
<bitRange>[4:4]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>rf_full_int_en</name>
<description>RXFIFO Full Interrupt Enable</description>
<bitRange>[2:2]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>rf_emp_int_en</name>
<description>RXFIFO Empty Interrupt Enable</description>
<bitRange>[1:1]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>rf_rdy_int_en</name>
<description>RXFIFO Ready Request Interrupt Enable</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>SPI_ISR</name>
<description>SPI Interrupt Status Register</description>
<addressOffset>0x0014</addressOffset>
<fields>
<field>
<name>ssi</name>
<description>SS Invalid Enable</description>
<bitRange>[13:13]</bitRange>
</field>
<field>
<name>tc</name>
<description>Transfer Completed</description>
<bitRange>[12:12]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>busy</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>transfer_completed</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>tf_udr</name>
<description>TXFIFO Underrun</description>
<bitRange>[11:11]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>not_underrun</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>underrun</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>tf_ovf</name>
<description>TXFIFO Overflow</description>
<bitRange>[10:10]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>not_overflow</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>overflow</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>rf_udr</name>
<description>RXFIFO Underrun</description>
<bitRange>[9:9]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>not_underrun</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>underrun</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>rf_ovf</name>
<description>RXFIFO Overflow</description>
<bitRange>[8:8]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>not_overflow</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>overflow</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>tf_full</name>
<description>TXFIFO Full</description>
<bitRange>[6:6]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>not_full</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>full</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>tf_emp</name>
<description>TXFIFO Empty</description>
<bitRange>[5:5]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>not_empty</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>empty</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>tf_ready</name>
<description>TXFIFO Ready</description>
<bitRange>[4:4]</bitRange>
</field>
<field>
<name>rf_full</name>
<description>RXFIFO Full</description>
<bitRange>[2:2]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>not_full</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>full</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>rf_emp</name>
<description>RXFIFO Empty</description>
<bitRange>[1:1]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>not_empty</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>empty</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>rf_rdy</name>
<description>RXFIFO Ready</description>
<bitRange>[0:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>SPI_FCR</name>
<description>SPI FIFO Control Register</description>
<addressOffset>0x0018</addressOffset>
<fields>
<field>
<name>tf_rst</name>
<description>TXFIFO Reset</description>
<bitRange>[31:31]</bitRange>
</field>
<field>
<name>tf_test_en</name>
<description>TXFIFO Test Mode Enable</description>
<bitRange>[30:30]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>tf_drq_en</name>
<description>TXFIFO DMA Request Enable</description>
<bitRange>[24:24]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>tf_trig_level</name>
<description>TXFIFO Empty Request Trigger Level</description>
<bitRange>[23:16]</bitRange>
</field>
<field>
<name>rf_rst</name>
<description>RXFIFO Reset</description>
<bitRange>[15:15]</bitRange>
</field>
<field>
<name>rf_test_en</name>
<description>RXFIFO Test Mode Enable</description>
<bitRange>[14:14]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>rf_drq_en</name>
<description>RXFIFO DMA Request Enable</description>
<bitRange>[8:8]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>rf_trig_level</name>
<description>RXFIFO Ready Request Trigger Level</description>
<bitRange>[7:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>SPI_FSR</name>
<description>SPI FIFO Status Register</description>
<addressOffset>0x001C</addressOffset>
<access>read-only</access>
<fields>
<field>
<name>tb_wr</name>
<description>TXFIFO Write Buffer Write Enable</description>
<bitRange>[31:31]</bitRange>
</field>
<field>
<name>tb_cnt</name>
<description>TXFIFO Write Buffer Counter</description>
<bitRange>[30:28]</bitRange>
</field>
<field>
<name>tf_cnt</name>
<description>TXFIFO Counter\n\nThese bits indicate the number of bytes in TXFIFO</description>
<bitRange>[23:16]</bitRange>
</field>
<field>
<name>rb_wr</name>
<description>RXFIFO Write Buffer Write Enable</description>
<bitRange>[15:15]</bitRange>
</field>
<field>
<name>rb_cnt</name>
<description>RXFIFO Write Buffer Counter</description>
<bitRange>[14:12]</bitRange>
</field>
<field>
<name>rf_cnt</name>
<description>RXFIFO Counter\n\nThese bits indicate the number of bytes in RXFIFO</description>
<bitRange>[7:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>SPI_WCR</name>
<description>SPI Wait Clock Register</description>
<addressOffset>0x0020</addressOffset>
<fields>
<field>
<name>swc</name>
<description>Dual mode direction switch wait clock counter</description>
<bitRange>[19:16]</bitRange>
</field>
<field>
<name>wwc</name>
<description>Wait clock counter</description>
<bitRange>[15:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>SPI_SAMP_DL</name>
<description>SPI Sample Delay Control Register</description>
<addressOffset>0x0028</addressOffset>
<fields>
<field>
<name>samp_dl_cal_start</name>
<description>Sample Delay Calibration Start</description>
<bitRange>[15:15]</bitRange>
</field>
<field>
<name>samp_dl_cal_done</name>
<description>Sample Delay Calibration Dont</description>
<bitRange>[14:14]</bitRange>
<access>read-only</access>
</field>
<field>
<name>samp_dl</name>
<description>Sample Delay</description>
<bitRange>[13:8]</bitRange>
<access>read-only</access>
</field>
<field>
<name>samp_dl_sw_en</name>
<description>Sample Delay Software Enable</description>
<bitRange>[7:7]</bitRange>
</field>
<field>
<name>samp_dl_sw</name>
<description>Sample Delay Software</description>
<bitRange>[5:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>SPI_MBC</name>
<description>SPI Master Burst Counter Register</description>
<addressOffset>0x0030</addressOffset>
<fields>
<field>
<name>mbc</name>
<description>Master Burst Counter</description>
<bitRange>[23:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>SPI_MTC</name>
<description>SPI Master Transmit Counter Register</description>
<addressOffset>0x0034</addressOffset>
<fields>
<field>
<name>mwtc</name>
<description>Master Write Transmit Counter</description>
<bitRange>[23:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>SPI_BCC</name>
<description>SPI Master Burst Control Register</description>
<addressOffset>0x0038</addressOffset>
<fields>
<field>
<name>quad_en</name>
<description>Quad Mode Enable</description>
<bitRange>[29:29]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>drm</name>
<description>Master Dual Mode RX Enable</description>
<bitRange>[28:28]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>single</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>dual</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>dbc</name>
<description>Master Dummy Burst Counter</description>
<bitRange>[27:24]</bitRange>
</field>
<field>
<name>stc</name>
<description>Master Single Mode Transmit Counter</description>
<bitRange>[23:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>SPI_BATC</name>
<description>SPI Bit-Aligned Transfer Configure Register</description>
<addressOffset>0x0040</addressOffset>
<fields>
<field>
<name>tce</name>
<description>Transfer Control Enable</description>
<bitRange>[31:31]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>idle</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>init</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>msms</name>
<description>Master Sample Standard</description>
<bitRange>[30:30]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>delay</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>standard</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>tbc</name>
<description>Transfer Bits Completed</description>
<bitRange>[25:25]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>busy</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>completed</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>tbc_int_en</name>
<description>Transfer Bits Completed Interrupt Enable</description>
<bitRange>[24:24]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>rx_frm_len</name>
<description>Configure the length of serial data frame of RX</description>
<bitRange>[21:16]</bitRange>
</field>
<field>
<name>tx_frm_len</name>
<description>Configure the length of serial data frame of TX</description>
<bitRange>[13:8]</bitRange>
</field>
<field>
<name>ss_level</name>
<bitRange>[7:7]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>low</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>high</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>ss_owner</name>
<description>SS Output Owner Select</description>
<bitRange>[6:6]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>SPI_controller</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Software</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>spol</name>
<description>SPI Chip Select Signal Polarity Control</description>
<bitRange>[5:5]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>high</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>low</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>ss_sel</name>
<description>SPI Chip Select</description>
<bitRange>[3:2]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>SS0</name>
<value>0b00</value>
</enumeratedValue>
<enumeratedValue>
<name>SS1</name>
<value>0b01</value>
</enumeratedValue>
<enumeratedValue>
<name>SS2</name>
<value>0b10</value>
</enumeratedValue>
<enumeratedValue>
<name>SS3</name>
<value>0b11</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>wms</name>
<description>Work Mode Select</description>
<bitRange>[1:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>byte_aligned</name>
<value>0b00</value>
</enumeratedValue>
<enumeratedValue>
<name>reserved</name>
<value>0b01</value>
</enumeratedValue>
<enumeratedValue>
<name>bit_aligned_3wire</name>
<value>0b10</value>
</enumeratedValue>
<enumeratedValue>
<name>bit_aligned_standard</name>
<value>0b11</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>SPI_BA_CCR</name>
<description>SPI Bit-Aligned Clock Configuration Register</description>
<addressOffset>0x0044</addressOffset>
<fields>
<field>
<name>cdr_n</name>
<description>Clock Divide Rate</description>
<bitRange>[7:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>SPI_TBR</name>
<description>SPI TX Bit Register\n\nVTB [31:0]: The Value of the Transmit Bits</description>
<addressOffset>0x0048</addressOffset>
</register>
<register>
<name>SPI_RBR</name>
<description>SPI RX Bit Register\n\nVRB [31:0]: The Value of the Receive Bits</description>
<addressOffset>0x004C</addressOffset>
</register>
<register>
<name>SPI_NDMA_MODE_CTL</name>
<description>SPI Normal DMA Mode Control Register</description>
<addressOffset>0x0088</addressOffset>
<fields>
<field>
<name>spi_act_m</name>
<description>SPI NDMA Active Mode</description>
<bitRange>[7:6]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>low</name>
<value>0b00</value>
</enumeratedValue>
<enumeratedValue>
<name>high</name>
<value>0b01</value>
</enumeratedValue>
<enumeratedValue>
<name>drq_control</name>
<value>0b10</value>
</enumeratedValue>
<enumeratedValue>
<name>controller_control</name>
<value>0b11</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>spi_ack_m</name>
<description>SPI NDMA Acknowledge Mode</description>
<bitRange>[5:5]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>ignore</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>after_detect</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>spi_dma_wait</name>
<bitRange>[4:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>DBI_CTL_0</name>
<description>DBI Control Register 0</description>
<addressOffset>0x0100</addressOffset>
<fields>
<field>
<name>cmdt</name>
<description>Command Type</description>
<bitRange>[31:31]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>write</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>read</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>wcdc</name>
<description>Write Command Dummy Cycles</description>
<bitRange>[30:20]</bitRange>
</field>
<field>
<name>dat_seq</name>
<description>Output Data Sequence</description>
<bitRange>[19:19]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>msb</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>lsb</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>rgb_seq</name>
<description>Output RGB Sequence</description>
<bitRange>[18:16]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>RGB</name>
<value>0b000</value>
</enumeratedValue>
<enumeratedValue>
<name>RBG</name>
<value>0b001</value>
</enumeratedValue>
<enumeratedValue>
<name>GRB</name>
<value>0b010</value>
</enumeratedValue>
<enumeratedValue>
<name>GBR</name>
<value>0b011</value>
</enumeratedValue>
<enumeratedValue>
<name>BRG</name>
<value>0b100</value>
</enumeratedValue>
<enumeratedValue>
<name>BGR</name>
<value>0b101</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>tran_mod</name>
<description>Transmit Mode</description>
<bitRange>[15:15]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>command_parameter</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>video</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>dat_fmt</name>
<description>Output Data Format</description>
<bitRange>[14:12]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>RGB111</name>
<value>0b000</value>
</enumeratedValue>
<enumeratedValue>
<name>RGB444</name>
<value>0b001</value>
</enumeratedValue>
<enumeratedValue>
<name>RGB565</name>
<value>0b010</value>
</enumeratedValue>
<enumeratedValue>
<name>RGB666</name>
<value>0b011</value>
</enumeratedValue>
<enumeratedValue>
<name>RGB888</name>
<value>0b100</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>dbi_interface</name>
<bitRange>[10:8]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>L3I1</name>
<description>3 Line Interface I</description>
<value>0b000</value>
</enumeratedValue>
<enumeratedValue>
<name>L3I2</name>
<description>3 Line Interface II</description>
<value>0b001</value>
</enumeratedValue>
<enumeratedValue>
<name>L4I1</name>
<description>4 Line Interface I</description>
<value>0b010</value>
</enumeratedValue>
<enumeratedValue>
<name>L4I2</name>
<description>4 Line Interface II</description>
<value>0b011</value>
</enumeratedValue>
<enumeratedValue>
<name>D2LI</name>
<description>2 Data Lane Interface</description>
<value>0b100</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>rgb_src_fmt</name>
<description>RGB Source Format</description>
<bitRange>[7:4]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>RGB</name>
<value>0b000</value>
</enumeratedValue>
<enumeratedValue>
<name>RBG</name>
<value>0b001</value>
</enumeratedValue>
<enumeratedValue>
<name>GRB</name>
<value>0b010</value>
</enumeratedValue>
<enumeratedValue>
<name>GBR</name>
<value>0b011</value>
</enumeratedValue>
<enumeratedValue>
<name>BRG</name>
<value>0b100</value>
</enumeratedValue>
<enumeratedValue>
<name>BGR</name>
<value>0b101</value>
</enumeratedValue>
<enumeratedValue>
<name>GRBG_0</name>
<value>0b110</value>
</enumeratedValue>
<enumeratedValue>
<name>GBRG_0</name>
<value>0b111</value>
</enumeratedValue>
<enumeratedValue>
<name>GRBG_1</name>
<value>0b1000</value>
</enumeratedValue>
<enumeratedValue>
<name>GBRG_1</name>
<value>0b1001</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>dum_val</name>
<description>Dummy Cycle Value</description>
<bitRange>[3:3]</bitRange>
</field>
<field>
<name>rgb_bo</name>
<description>RGB Bit Order</description>
<bitRange>[2:2]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>data</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>swap</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>element_a_pos</name>
<description>Element A Position</description>
<bitRange>[1:1]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>31_24</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>7_0</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>vi_src_type</name>
<description>Video Source Type</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>rgb32</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>rgb16</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>DBI_CTL_1</name>
<description>DBI Control Register 1</description>
<addressOffset>0x0104</addressOffset>
<fields>
<field>
<name>dbi_soft_trg</name>
<description>DBI Soft Trigger</description>
<bitRange>[31:31]</bitRange>
</field>
<field>
<name>dbi_en_mode_sel</name>
<description>DBI Enable Mode Select</description>
<bitRange>[30:29]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>DBI</name>
<value>0b00</value>
</enumeratedValue>
<enumeratedValue>
<name>Software</name>
<value>0b01</value>
</enumeratedValue>
<enumeratedValue>
<name>Timer</name>
<value>0b10</value>
</enumeratedValue>
<enumeratedValue>
<name>TE</name>
<value>0b11</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>RGB666_FMT</name>
<description>2 Data Lane RGB666 Format</description>
<bitRange>[27:26]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>normal</name>
<value>0b00</value>
</enumeratedValue>
<enumeratedValue>
<name>special_ilitek</name>
<value>0b01</value>
</enumeratedValue>
<enumeratedValue>
<name>special_new_vision</name>
<value>0b10</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>dbi_rxclk_inv</name>
<description>DBI RX Clock Inverse</description>
<bitRange>[25:25]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>positive</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>negative</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>dbi_clko_mod</name>
<description>DBI Output Clock Mode</description>
<bitRange>[24:24]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>always_on</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>auto_gating</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>dbi_clko_inv</name>
<description>DBI Clock Output Inverse</description>
<bitRange>[23:23]</bitRange>
</field>
<field>
<name>dcx_data</name>
<description>DCX Data Value</description>
<bitRange>[22:22]</bitRange>
</field>
<field>
<name>RGB16_data_source_select</name>
<description>RGB 16 Data Source Select</description>
<bitRange>[21:21]</bitRange>
</field>
<field>
<name>rdat_lsb</name>
<description>Bit Order of Read Data</description>
<bitRange>[20:20]</bitRange>
</field>
<field>
<name>rcdc</name>
<description>Read Command Dummy Cycles</description>
<bitRange>[15:8]</bitRange>
</field>
<field>
<name>rdbn</name>
<description>Read Data Number of Bytes</description>
<bitRange>[7:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>DBI_CTL_2</name>
<description>DBI Control Register 2</description>
<addressOffset>0x0108</addressOffset>
<fields>
<field>
<name>dbi_fifo_drq_en</name>
<description>DBI FIFO DMA Request Enable</description>
<bitRange>[15:15]</bitRange>
</field>
<field>
<name>dbi_trig_level</name>
<description>DBI FIFO Empty Request Trigger Level</description>
<bitRange>[14:8]</bitRange>
</field>
<field>
<name>dbi_sdq_out_sel</name>
<description>DBI SDI PIN Output Select</description>
<bitRange>[6:6]</bitRange>
</field>
<field>
<name>dbi_dcx_sel</name>
<description>DBI DCX PIN Function Select</description>
<bitRange>[5:5]</bitRange>
</field>
<field>
<name>dbi_sdi_sel</name>
<description>DBI SDI PIN FUnction Select</description>
<bitRange>[4:3]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>dbi_sdi</name>
<value>0b00</value>
</enumeratedValue>
<enumeratedValue>
<name>dbi_te</name>
<value>0b01</value>
</enumeratedValue>
<enumeratedValue>
<name>dbi_dcx</name>
<value>0b10</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>te_dbc_sel</name>
<description>TE debounce function select</description>
<bitRange>[2:2]</bitRange>
</field>
<field>
<name>te_trig_sel</name>
<description>TE edge trigger select</description>
<bitRange>[1:1]</bitRange>
</field>
<field>
<name>te_en</name>
<description>TE Enable</description>
<bitRange>[0:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>DBI_TIMER</name>
<description>DBI Timer Control Register</description>
<addressOffset>0x010C</addressOffset>
<fields>
<field>
<name>dbi_tm_en</name>
<description>DBI Timer Enable</description>
<bitRange>[31:31]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>enable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>disable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>dbi_timer_value</name>
<bitRange>[30:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>DBI_VIDEO_SZIE</name>
<description>DBI Video Size Configuration Register</description>
<addressOffset>0x0110</addressOffset>
<fields>
<field>
<name>v_size</name>
<bitRange>[26:16]</bitRange>
</field>
<field>
<name>h_size</name>
<bitRange>[10:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>DBI_INT</name>
<description>DBI Interrupt Register</description>
<addressOffset>0x0120</addressOffset>
<fields>
<field>
<name>dbi_fifo_empty_int</name>
<bitRange>[14:14]</bitRange>
</field>
<field>
<name>dbi_fifo_full_int</name>
<bitRange>[13:13]</bitRange>
</field>
<field>
<name>timer_int</name>
<bitRange>[12:12]</bitRange>
</field>
<field>
<name>rd_done_int</name>
<bitRange>[11:11]</bitRange>
</field>
<field>
<name>te_int</name>
<bitRange>[10:10]</bitRange>
</field>
<field>
<name>fram_done_int</name>
<bitRange>[9:9]</bitRange>
</field>
<field>
<name>line_done_int</name>
<bitRange>[8:8]</bitRange>
</field>
<field>
<name>dbi_fifo_empty_int_en</name>
<bitRange>[6:6]</bitRange>
</field>
<field>
<name>dbi_fifo_full_int_en</name>
<bitRange>[5:5]</bitRange>
</field>
<field>
<name>timer_int_en</name>
<bitRange>[4:4]</bitRange>
</field>
<field>
<name>rd_done_int_en</name>
<bitRange>[3:3]</bitRange>
</field>
<field>
<name>te_int_en</name>
<bitRange>[2:2]</bitRange>
</field>
<field>
<name>fram_done_int_en</name>
<bitRange>[1:1]</bitRange>
</field>
<field>
<name>line_done_int_en</name>
<bitRange>[0:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>DBI_DEBUG_0</name>
<description>DBI BEBUG 0 Register</description>
<addressOffset>0x0124</addressOffset>
<access>read-only</access>
<fields>
<field>
<name>dbi_fifo_avail</name>
<bitRange>[22:16]</bitRange>
</field>
<field>
<name>te_val</name>
<bitRange>[12:12]</bitRange>
</field>
<field>
<name>dbi_rxcs</name>
<bitRange>[11:8]</bitRange>
</field>
<field>
<name>sh_cs</name>
<bitRange>[7:4]</bitRange>
</field>
<field>
<name>dbi_txcs</name>
<bitRange>[3:2]</bitRange>
</field>
<field>
<name>mem_cs</name>
<bitRange>[1:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>DBI_DEBUG_1</name>
<description>DBI BEBUG 1 Register</description>
<addressOffset>0x0128</addressOffset>
<access>read-only</access>
<fields>
<field>
<name>lcnt</name>
<bitRange>[25:16]</bitRange>
</field>
<field>
<name>ccnt</name>
<bitRange>[11:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>SPI_TXD</name>
<description>SPI TX Data Register\n\nTDATA [31:0]: Transmit Data</description>
<addressOffset>0x0200</addressOffset>
</register>
<register>
<name>SPI_RXD</name>
<description>SPI RX Data Register\n\nRDATA [31:0]: Receive Data</description>
<addressOffset>0x0300</addressOffset>
</register>
</registers>
</peripheral>
<peripheral>
<name>USB0</name>
<description>USB2.0 DRD</description>
<groupName>Interfaces</groupName>
<baseAddress>0x04100000</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x100000</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>USB0_DEVICE</name>
<value>45</value>
</interrupt>
<interrupt>
<name>USB0_EHCI</name>
<value>46</value>
</interrupt>
<interrupt>
<name>USB0_OHCI</name>
<value>47</value>
</interrupt>
</peripheral>
<peripheral>
<name>USB1</name>
<description>USB2.0 HOST</description>
<groupName>Interfaces</groupName>
<baseAddress>0x04200000</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x100000</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>USB1_EHCI</name>
<value>49</value>
</interrupt>
<interrupt>
<name>USB1_OHCI</name>
<value>50</value>
</interrupt>
<registers>
<register>
<name>E_CAPLENGTH</name>
<description>EHCI Capability Register Length Register</description>
<addressOffset>0x0000</addressOffset>
</register>
<register>
<name>E_HCIVERSION</name>
<description>EHCI Host Interface Version Number Register</description>
<addressOffset>0x0002</addressOffset>
</register>
<register>
<name>E_HCSPARAMS</name>
<description>EHCI Host Control Structural Parameter Register</description>
<addressOffset>0x0004</addressOffset>
</register>
<register>
<name>E_HCCPARAMS</name>
<description>EHCI Host Control Capability Parameter Register</description>
<addressOffset>0x0008</addressOffset>
</register>
<register>
<name>E_HCSPPORTROUTE</name>
<description>EHCI Companion Port Route Description</description>
<addressOffset>0x000C</addressOffset>
</register>
<register>
<name>E_USBCMD</name>
<description>EHCI USB Command Register</description>
<addressOffset>0x0010</addressOffset>
</register>
<register>
<name>E_USBSTS</name>
<description>EHCI USB Status Register</description>
<addressOffset>0x0014</addressOffset>
</register>
<register>
<name>E_USBINTR</name>
<description>EHCI USB Interrupt Enable Register</description>
<addressOffset>0x0018</addressOffset>
</register>
<register>
<name>E_FRINDEX</name>
<description>EHCI USB Frame Index Register</description>
<addressOffset>0x001C</addressOffset>
</register>
<register>
<name>E_CTRLDSSEGMENT</name>
<description>EHCI 4G Segment Selector Register</description>
<addressOffset>0x0020</addressOffset>
</register>
<register>
<name>E_PERIODICLISTBASE</name>
<description>EHCI Frame List Base Address Register</description>
<addressOffset>0x0024</addressOffset>
</register>
<register>
<name>E_ASYNCLISTADDR</name>
<description>EHCI Next Asynchronous List Address Register</description>
<addressOffset>0x0028</addressOffset>
</register>
<register>
<name>E_CONFIGFLAG</name>
<description>EHCI Configured Flag Register</description>
<addressOffset>0x0050</addressOffset>
</register>
<register>
<name>E_PORTSC</name>
<description>EHCI Port Status/Control Register</description>
<addressOffset>0x0054</addressOffset>
</register>
<register>
<name>O_HcControl</name>
<description>OHCI Control Register</description>
<addressOffset>0x0404</addressOffset>
</register>
<register>
<name>O_HcCommandStatus</name>
<description>OHCI Command Status Register</description>
<addressOffset>0x0408</addressOffset>
</register>
<register>
<name>O_HcInterruptStatus</name>
<description>OHCI Interrupt Status Register</description>
<addressOffset>0x040C</addressOffset>
</register>
<register>
<name>O_HcInterruptEnable</name>
<description>OHCI Interrupt Enable Register</description>
<addressOffset>0x0410</addressOffset>
</register>
<register>
<name>O_HcInterruptDisable</name>
<description>OHCI Interrupt Disable Register</description>
<addressOffset>0x0414</addressOffset>
</register>
<register>
<name>O_HcHCCA</name>
<description>OHCI HCCA Base</description>
<addressOffset>0x0418</addressOffset>
</register>
<register>
<name>O_HcPeriodCurrentED</name>
<description>OHCI Period Current ED Base</description>
<addressOffset>0x041C</addressOffset>
</register>
<register>
<name>O_HcControlHeadED</name>
<description>OHCI Control Head ED Base</description>
<addressOffset>0x0420</addressOffset>
</register>
<register>
<name>O_HcControlCurrentED</name>
<description>OHCI Control Current ED Base</description>
<addressOffset>0x0424</addressOffset>
</register>
<register>
<name>O_HcBulkHeadED</name>
<description>OHCI Bulk Head ED Base</description>
<addressOffset>0x0428</addressOffset>
</register>
<register>
<name>O_HcBulkCurrentED</name>
<description>OHCI Bulk Current ED Base</description>
<addressOffset>0x042C</addressOffset>
</register>
<register>
<name>O_HcDoneHead</name>
<description>OHCI Done Head Base</description>
<addressOffset>0x0430</addressOffset>
</register>
<register>
<name>O_HcFmInterval</name>
<description>OHCI Frame Interval Register</description>
<addressOffset>0x0434</addressOffset>
</register>
<register>
<name>O_HcFmRemaining</name>
<description>OHCI Frame Remaining Register</description>
<addressOffset>0x0438</addressOffset>
</register>
<register>
<name>O_HcFmNumber</name>
<description>OHCI Frame Number Register</description>
<addressOffset>0x043C</addressOffset>
</register>
<register>
<name>O_HcPerioddicStart</name>
<description>OHCI Periodic Start Register</description>
<addressOffset>0x0440</addressOffset>
</register>
<register>
<name>O_HcLSThreshold</name>
<description>OHCI LS Threshold Register</description>
<addressOffset>0x0444</addressOffset>
</register>
<register>
<name>O_HcRhDescriptorA</name>
<description>OHCI Root Hub Descriptor Register A</description>
<addressOffset>0x0448</addressOffset>
</register>
<register>
<name>O_HcRhDesriptorB</name>
<description>OHCI Root Hub Descriptor Register B</description>
<addressOffset>0x044C</addressOffset>
</register>
<register>
<name>O_HcRhStatus</name>
<description>OHCI Root Hub Status Register</description>
<addressOffset>0x0450</addressOffset>
</register>
<register>
<name>O_HcRhPortStatus</name>
<description>OHCI Root Hub Port Status Register</description>
<addressOffset>0x0454</addressOffset>
</register>
<register>
<name>HCI_Interface</name>
<description>HCI Interface Register</description>
<addressOffset>0x0800</addressOffset>
</register>
<register>
<name>HCI_CTRL3</name>
<description>HCI Control Register</description>
<addressOffset>0x0808</addressOffset>
</register>
<register>
<name>PHY_Control</name>
<description>PHY Control Register</description>
<addressOffset>0x0810</addressOffset>
</register>
<register>
<name>PHY_STATUS</name>
<description>PHY Status Register</description>
<addressOffset>0x0824</addressOffset>
</register>
<register>
<name>HCI_SIE_PORT_DISABLE_CONTROL</name>
<description>HCI SIE Port Disable Control Register</description>
<addressOffset>0x0828</addressOffset>
</register>
</registers>
</peripheral>
<peripheral>
<name>GPIO</name>
<description>Gerneral Purpose Input/Output</description>
<groupName>Interfaces</groupName>
<baseAddress>0x02000000</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x800</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>GPIOB_NS</name>
<value>85</value>
</interrupt>
<interrupt>
<name>GPIOC_NS</name>
<value>87</value>
</interrupt>
<interrupt>
<name>GPIOD_NS</name>
<value>89</value>
</interrupt>
<interrupt>
<name>GPIOE_NS</name>
<value>91</value>
</interrupt>
<interrupt>
<name>GPIOF_NS</name>
<value>93</value>
</interrupt>
<registers>
<register>
<name>pb_cfg0</name>
<description>PB Configure Register 0</description>
<addressOffset>0x0030</addressOffset>
<fields>
<field>
<name>pb7_select</name>
<bitRange>[31:28]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>input</name>
<value>0b0000</value>
</enumeratedValue>
<enumeratedValue>
<name>output</name>
<value>0b0001</value>
</enumeratedValue>
<enumeratedValue>
<name>lcd0_d17</name>
<value>0b0010</value>
</enumeratedValue>
<enumeratedValue>
<name>i2_s2_mclk</name>
<value>0b0011</value>
</enumeratedValue>
<enumeratedValue>
<name>twi3_sda</name>
<value>0b0100</value>
</enumeratedValue>
<enumeratedValue>
<name>ir_rx</name>
<value>0b0101</value>
</enumeratedValue>
<enumeratedValue>
<name>lcd0_d23</name>
<value>0b0110</value>
</enumeratedValue>
<enumeratedValue>
<name>uart3_rx</name>
<value>0b0111</value>
</enumeratedValue>
<enumeratedValue>
<name>cpubist1</name>
<value>0b1000</value>
</enumeratedValue>
<enumeratedValue>
<name>reserved</name>
<value>0b1001</value>
</enumeratedValue>
<enumeratedValue>
<name>pb_eint7</name>
<value>0b1110</value>
</enumeratedValue>
<enumeratedValue>
<name>io_disable</name>
<value>0b1111</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>pb6_select</name>
<bitRange>[27:24]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>input</name>
<value>0b0000</value>
</enumeratedValue>
<enumeratedValue>
<name>output</name>
<value>0b0001</value>
</enumeratedValue>
<enumeratedValue>
<name>lcd0_d16</name>
<value>0b0010</value>
</enumeratedValue>
<enumeratedValue>
<name>i2_s2_lrck</name>
<value>0b0011</value>
</enumeratedValue>
<enumeratedValue>
<name>twi3_sck</name>
<value>0b0100</value>
</enumeratedValue>
<enumeratedValue>
<name>pwm1</name>
<value>0b0101</value>
</enumeratedValue>
<enumeratedValue>
<name>lcd0_d22</name>
<value>0b0110</value>
</enumeratedValue>
<enumeratedValue>
<name>uart3_tx</name>
<value>0b0111</value>
</enumeratedValue>
<enumeratedValue>
<name>cpubist0</name>
<value>0b1000</value>
</enumeratedValue>
<enumeratedValue>
<name>reserved</name>
<value>0b1001</value>
</enumeratedValue>
<enumeratedValue>
<name>pb_eint6</name>
<value>0b1110</value>
</enumeratedValue>
<enumeratedValue>
<name>io_disable</name>
<value>0b1111</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>pb5_select</name>
<bitRange>[23:20]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>input</name>
<value>0b0000</value>
</enumeratedValue>
<enumeratedValue>
<name>output</name>
<value>0b0001</value>
</enumeratedValue>
<enumeratedValue>
<name>lcd0_d9</name>
<value>0b0010</value>
</enumeratedValue>
<enumeratedValue>
<name>i2_s2_bclk</name>
<value>0b0011</value>
</enumeratedValue>
<enumeratedValue>
<name>twi1_sda</name>
<value>0b0100</value>
</enumeratedValue>
<enumeratedValue>
<name>pwm0</name>
<value>0b0101</value>
</enumeratedValue>
<enumeratedValue>
<name>lcd0_d21</name>
<value>0b0110</value>
</enumeratedValue>
<enumeratedValue>
<name>uart5_rx</name>
<value>0b0111</value>
</enumeratedValue>
<enumeratedValue>
<name>reserved</name>
<value>0b1000</value>
</enumeratedValue>
<enumeratedValue>
<name>reserved</name>
<value>0b1001</value>
</enumeratedValue>
<enumeratedValue>
<name>pb_eint5</name>
<value>0b1110</value>
</enumeratedValue>
<enumeratedValue>
<name>io_disable</name>
<value>0b1111</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>pb4_select</name>
<bitRange>[19:16]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>input</name>
<value>0b0000</value>
</enumeratedValue>
<enumeratedValue>
<name>output</name>
<value>0b0001</value>
</enumeratedValue>
<enumeratedValue>
<name>lcd0_d8</name>
<value>0b0010</value>
</enumeratedValue>
<enumeratedValue>
<name>i2_s2_dout0</name>
<value>0b0011</value>
</enumeratedValue>
<enumeratedValue>
<name>twi1_sck</name>
<value>0b0100</value>
</enumeratedValue>
<enumeratedValue>
<name>i2_s2_din1</name>
<value>0b0101</value>
</enumeratedValue>
<enumeratedValue>
<name>lcd0_d20</name>
<value>0b0110</value>
</enumeratedValue>
<enumeratedValue>
<name>uart5_tx</name>
<value>0b0111</value>
</enumeratedValue>
<enumeratedValue>
<name>reserved</name>
<value>0b1000</value>
</enumeratedValue>
<enumeratedValue>
<name>reserved</name>
<value>0b1001</value>
</enumeratedValue>
<enumeratedValue>
<name>pb_eint4</name>
<value>0b1110</value>
</enumeratedValue>
<enumeratedValue>
<name>io_disable</name>
<value>0b1111</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>pb3_select</name>
<bitRange>[15:12]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>input</name>
<value>0b0000</value>
</enumeratedValue>
<enumeratedValue>
<name>output</name>
<value>0b0001</value>
</enumeratedValue>
<enumeratedValue>
<name>lcd0_d1</name>
<value>0b0010</value>
</enumeratedValue>
<enumeratedValue>
<name>i2_s2_dout1</name>
<value>0b0011</value>
</enumeratedValue>
<enumeratedValue>
<name>twi0_sck</name>
<value>0b0100</value>
</enumeratedValue>
<enumeratedValue>
<name>i2_s2_din0</name>
<value>0b0101</value>
</enumeratedValue>
<enumeratedValue>
<name>lcd0_d19</name>
<value>0b0110</value>
</enumeratedValue>
<enumeratedValue>
<name>uart4_rx</name>
<value>0b0111</value>
</enumeratedValue>
<enumeratedValue>
<name>reserved</name>
<value>0b1000</value>
</enumeratedValue>
<enumeratedValue>
<name>reserved</name>
<value>0b1001</value>
</enumeratedValue>
<enumeratedValue>
<name>pb_eint3</name>
<value>0b1110</value>
</enumeratedValue>
<enumeratedValue>
<name>io_disable</name>
<value>0b1111</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>pb2_select</name>
<bitRange>[11:8]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>input</name>
<value>0b0000</value>
</enumeratedValue>
<enumeratedValue>
<name>output</name>
<value>0b0001</value>
</enumeratedValue>
<enumeratedValue>
<name>lcd0_d0</name>
<value>0b0010</value>
</enumeratedValue>
<enumeratedValue>
<name>i2_s2_dout2</name>
<value>0b0011</value>
</enumeratedValue>
<enumeratedValue>
<name>twi0_sda</name>
<value>0b0100</value>
</enumeratedValue>
<enumeratedValue>
<name>i2_s2_din2</name>
<value>0b0101</value>
</enumeratedValue>
<enumeratedValue>
<name>lcd0_d18</name>
<value>0b0110</value>
</enumeratedValue>
<enumeratedValue>
<name>uart4_tx</name>
<value>0b0111</value>
</enumeratedValue>
<enumeratedValue>
<name>reserved</name>
<value>0b1000</value>
</enumeratedValue>
<enumeratedValue>
<name>reserved</name>
<value>0b1001</value>
</enumeratedValue>
<enumeratedValue>
<name>pb_eint2</name>
<value>0b1110</value>
</enumeratedValue>
<enumeratedValue>
<name>io_disable</name>
<value>0b1111</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>pb1_select</name>
<bitRange>[7:4]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>input</name>
<value>0b0000</value>
</enumeratedValue>
<enumeratedValue>
<name>output</name>
<value>0b0001</value>
</enumeratedValue>
<enumeratedValue>
<name>pwm4</name>
<value>0b0010</value>
</enumeratedValue>
<enumeratedValue>
<name>i2_s2_dout3</name>
<value>0b0011</value>
</enumeratedValue>
<enumeratedValue>
<name>twi2_sda</name>
<value>0b0100</value>
</enumeratedValue>
<enumeratedValue>
<name>i2_s2_din3</name>
<value>0b0101</value>
</enumeratedValue>
<enumeratedValue>
<name>uart0_rx</name>
<value>0b0110</value>
</enumeratedValue>
<enumeratedValue>
<name>uart2_rx</name>
<value>0b0111</value>
</enumeratedValue>
<enumeratedValue>
<name>ir_rx</name>
<value>0b1000</value>
</enumeratedValue>
<enumeratedValue>
<name>reserved</name>
<value>0b1001</value>
</enumeratedValue>
<enumeratedValue>
<name>pb_eint1</name>
<value>0b1110</value>
</enumeratedValue>
<enumeratedValue>
<name>io_disable</name>
<value>0b1111</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>pb0_select</name>
<bitRange>[3:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>input</name>
<value>0b0000</value>
</enumeratedValue>
<enumeratedValue>
<name>output</name>
<value>0b0001</value>
</enumeratedValue>
<enumeratedValue>
<name>pwm3</name>
<value>0b0010</value>
</enumeratedValue>
<enumeratedValue>
<name>ir_tx</name>
<value>0b0011</value>
</enumeratedValue>
<enumeratedValue>
<name>twi2_sck</name>
<value>0b0100</value>
</enumeratedValue>
<enumeratedValue>
<name>spi1_wp__dbi_te</name>
<value>0b0101</value>
</enumeratedValue>
<enumeratedValue>
<name>uart0_tx</name>
<value>0b0110</value>
</enumeratedValue>
<enumeratedValue>
<name>uart2_tx</name>
<value>0b0111</value>
</enumeratedValue>
<enumeratedValue>
<name>owa_out</name>
<value>0b1000</value>
</enumeratedValue>
<enumeratedValue>
<name>reserved</name>
<value>0b1001</value>
</enumeratedValue>
<enumeratedValue>
<name>pb_eint0</name>
<value>0b1110</value>
</enumeratedValue>
<enumeratedValue>
<name>io_disable</name>
<value>0b1111</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>pb_cfg1</name>
<description>PB Configure Register 1</description>
<addressOffset>0x0034</addressOffset>
<fields>
<field>
<name>pb12_select</name>
<bitRange>[19:16]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>input</name>
<value>0b0000</value>
</enumeratedValue>
<enumeratedValue>
<name>output</name>
<value>0b0001</value>
</enumeratedValue>
<enumeratedValue>
<name>dmic_clk</name>
<value>0b0010</value>
</enumeratedValue>
<enumeratedValue>
<name>pwm0</name>
<value>0b0011</value>
</enumeratedValue>
<enumeratedValue>
<name>owa_in</name>
<value>0b0100</value>
</enumeratedValue>
<enumeratedValue>
<name>spi1_cs__dbi_csx</name>
<value>0b0101</value>
</enumeratedValue>
<enumeratedValue>
<name>clk_fanout2</name>
<value>0b0110</value>
</enumeratedValue>
<enumeratedValue>
<name>ir_rx</name>
<value>0b0111</value>
</enumeratedValue>
<enumeratedValue>
<name>reserved</name>
<value>0b1000</value>
</enumeratedValue>
<enumeratedValue>
<name>reserved</name>
<value>0b1001</value>
</enumeratedValue>
<enumeratedValue>
<name>pb_eint12</name>
<value>0b1110</value>
</enumeratedValue>
<enumeratedValue>
<name>io_disable</name>
<value>0b1111</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>pb11_select</name>
<bitRange>[15:12]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>input</name>
<value>0b0000</value>
</enumeratedValue>
<enumeratedValue>
<name>output</name>
<value>0b0001</value>
</enumeratedValue>
<enumeratedValue>
<name>dmic_data0</name>
<value>0b0010</value>
</enumeratedValue>
<enumeratedValue>
<name>pwm2</name>
<value>0b0011</value>
</enumeratedValue>
<enumeratedValue>
<name>twi0_sda</name>
<value>0b0100</value>
</enumeratedValue>
<enumeratedValue>
<name>spi1_clk__dbi_sclk</name>
<value>0b0101</value>
</enumeratedValue>
<enumeratedValue>
<name>clk_fanout1</name>
<value>0b0110</value>
</enumeratedValue>
<enumeratedValue>
<name>uart1_cts</name>
<value>0b0111</value>
</enumeratedValue>
<enumeratedValue>
<name>reserved</name>
<value>0b1000</value>
</enumeratedValue>
<enumeratedValue>
<name>reserved</name>
<value>0b1001</value>
</enumeratedValue>
<enumeratedValue>
<name>pb_eint11</name>
<value>0b1110</value>
</enumeratedValue>
<enumeratedValue>
<name>io_disable</name>
<value>0b1111</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>pb10_select</name>
<bitRange>[11:8]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>input</name>
<value>0b0000</value>
</enumeratedValue>
<enumeratedValue>
<name>output</name>
<value>0b0001</value>
</enumeratedValue>
<enumeratedValue>
<name>dmic_data1</name>
<value>0b0010</value>
</enumeratedValue>
<enumeratedValue>
<name>pwm7</name>
<value>0b0011</value>
</enumeratedValue>
<enumeratedValue>
<name>twi0_sck</name>
<value>0b0100</value>
</enumeratedValue>
<enumeratedValue>
<name>spi1_mosi__dbi_sdo</name>
<value>0b0101</value>
</enumeratedValue>
<enumeratedValue>
<name>clk_fanout0</name>
<value>0b0110</value>
</enumeratedValue>
<enumeratedValue>
<name>uart1_rts</name>
<value>0b0111</value>
</enumeratedValue>
<enumeratedValue>
<name>reserved</name>
<value>0b1000</value>
</enumeratedValue>
<enumeratedValue>
<name>reserved</name>
<value>0b1001</value>
</enumeratedValue>
<enumeratedValue>
<name>pb_eint10</name>
<value>0b1110</value>
</enumeratedValue>
<enumeratedValue>
<name>io_disable</name>
<value>0b1111</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>pb9_select</name>
<bitRange>[7:4]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>input</name>
<value>0b0000</value>
</enumeratedValue>
<enumeratedValue>
<name>output</name>
<value>0b0001</value>
</enumeratedValue>
<enumeratedValue>
<name>dmic_data2</name>
<value>0b0010</value>
</enumeratedValue>
<enumeratedValue>
<name>pwm6</name>
<value>0b0011</value>
</enumeratedValue>
<enumeratedValue>
<name>twi2_sda</name>
<value>0b0100</value>
</enumeratedValue>
<enumeratedValue>
<name>spi1_miso__dbi_sdi__dbi_te__dbi_dcx</name>
<value>0b0101</value>
</enumeratedValue>
<enumeratedValue>
<name>uart0_rx</name>
<value>0b0110</value>
</enumeratedValue>
<enumeratedValue>
<name>uart1_rx</name>
<value>0b0111</value>
</enumeratedValue>
<enumeratedValue>
<name>reserved</name>
<value>0b1000</value>
</enumeratedValue>
<enumeratedValue>
<name>reserved</name>
<value>0b1001</value>
</enumeratedValue>
<enumeratedValue>
<name>pb_eint9</name>
<value>0b1110</value>
</enumeratedValue>
<enumeratedValue>
<name>io_disable</name>
<value>0b1111</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>pb8_select</name>
<bitRange>[3:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>input</name>
<value>0b0000</value>
</enumeratedValue>
<enumeratedValue>
<name>output</name>
<value>0b0001</value>
</enumeratedValue>
<enumeratedValue>
<name>dmic_data3</name>
<value>0b0010</value>
</enumeratedValue>
<enumeratedValue>
<name>pwm5</name>
<value>0b0011</value>
</enumeratedValue>
<enumeratedValue>
<name>twi2_sck</name>
<value>0b0100</value>
</enumeratedValue>
<enumeratedValue>
<name>spi1_hold_dbi_dcx_dbi_wrx</name>
<value>0b0101</value>
</enumeratedValue>
<enumeratedValue>
<name>uart0_tx</name>
<value>0b0110</value>
</enumeratedValue>
<enumeratedValue>
<name>uart1_tx</name>
<value>0b0111</value>
</enumeratedValue>
<enumeratedValue>
<name>reserved</name>
<value>0b1000</value>
</enumeratedValue>
<enumeratedValue>
<name>reserved</name>
<value>0b1001</value>
</enumeratedValue>
<enumeratedValue>
<name>pb_eint8</name>
<value>0b1110</value>
</enumeratedValue>
<enumeratedValue>
<name>io_disable</name>
<value>0b1111</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>pb_dat</name>
<description>PB Data Register</description>
<addressOffset>0x0040</addressOffset>
<fields>
<field>
<name>pb_dat</name>
<bitRange>[12:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>pb_drv0</name>
<description>PB Multi_Driving Register 0</description>
<addressOffset>0x0044</addressOffset>
<fields>
<field>
<dim>8</dim>
<dimIncrement>4</dimIncrement>
<name>PB%s_DRV</name>
<description>PB Multi_Driving Select</description>
<bitRange>[1:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>L0</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>L1</name>
<value>1</value>
</enumeratedValue>
<enumeratedValue>
<name>L2</name>
<value>2</value>
</enumeratedValue>
<enumeratedValue>
<name>L3</name>
<value>3</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>pb_drv1</name>
<description>PB Multi_Driving Register 1</description>
<addressOffset>0x0048</addressOffset>
<fields>
<field>
<dim>5</dim>
<dimIncrement>4</dimIncrement>
<dimIndex>8-12</dimIndex>
<name>PB%s_DRV</name>
<description>PB Multi_Driving Select</description>
<bitRange>[1:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>L0</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>L1</name>
<value>1</value>
</enumeratedValue>
<enumeratedValue>
<name>L2</name>
<value>2</value>
</enumeratedValue>
<enumeratedValue>
<name>L3</name>
<value>3</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>pb_pull0</name>
<description>PB Pull Register 0</description>
<addressOffset>0x0054</addressOffset>
<fields>
<field>
<dim>13</dim>
<dimIncrement>2</dimIncrement>
<name>PC%s_PULL</name>
<description>PC Pull_up/down Select</description>
<bitRange>[1:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>pull_disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>pull_up</name>
<value>1</value>
</enumeratedValue>
<enumeratedValue>
<name>pull_down</name>
<value>2</value>
</enumeratedValue>
<enumeratedValue>
<name>reserved</name>
<value>3</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>pc_cfg0</name>
<description>PC Configure Register 0</description>
<addressOffset>0x0060</addressOffset>
<fields>
<field>
<name>PC7_SELECT</name>
<description>PC7 Select</description>
<bitRange>[31:28]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Input</name>
<value>0b0000</value>
</enumeratedValue>
<enumeratedValue>
<name>SPI0_HOLD</name>
<value>0b0010</value>
</enumeratedValue>
<enumeratedValue>
<name>UART3_RX</name>
<value>0b0100</value>
</enumeratedValue>
<enumeratedValue>
<name>TCON_TRIG</name>
<value>0b0110</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1000</value>
</enumeratedValue>
<enumeratedValue>
<name>PC_EINT7</name>
<value>0b1110</value>
</enumeratedValue>
<enumeratedValue>
<name>Output</name>
<value>0b0001</value>
</enumeratedValue>
<enumeratedValue>
<name>SDC2_D3</name>
<value>0b0011</value>
</enumeratedValue>
<enumeratedValue>
<name>TWI3_SDA</name>
<value>0b0101</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0111</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1001</value>
</enumeratedValue>
<enumeratedValue>
<name>IO_Disable</name>
<value>0b1111</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PC6_SELECT</name>
<description>PC6 Select</description>
<bitRange>[27:24]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Input</name>
<value>0b0000</value>
</enumeratedValue>
<enumeratedValue>
<name>SPI0_WP</name>
<value>0b0010</value>
</enumeratedValue>
<enumeratedValue>
<name>UART3_TX</name>
<value>0b0100</value>
</enumeratedValue>
<enumeratedValue>
<name>DBG_CLK</name>
<value>0b0110</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1000</value>
</enumeratedValue>
<enumeratedValue>
<name>PC_EINT6</name>
<value>0b1110</value>
</enumeratedValue>
<enumeratedValue>
<name>Output</name>
<value>0b0001</value>
</enumeratedValue>
<enumeratedValue>
<name>SDC2_D0</name>
<value>0b0011</value>
</enumeratedValue>
<enumeratedValue>
<name>TWI3_SCK</name>
<value>0b0101</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0111</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1001</value>
</enumeratedValue>
<enumeratedValue>
<name>IO_Disable</name>
<value>0b1111</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PC5_SELECT</name>
<description>PC5 Select</description>
<bitRange>[23:20]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Input</name>
<value>0b0000</value>
</enumeratedValue>
<enumeratedValue>
<name>SPI0_MISO</name>
<value>0b0010</value>
</enumeratedValue>
<enumeratedValue>
<name>BOOT_SEL1</name>
<value>0b0100</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0110</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1000</value>
</enumeratedValue>
<enumeratedValue>
<name>PC_EINT5</name>
<value>0b1110</value>
</enumeratedValue>
<enumeratedValue>
<name>Output</name>
<value>0b0001</value>
</enumeratedValue>
<enumeratedValue>
<name>SDC2_D1</name>
<value>0b0011</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0101</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0111</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1001</value>
</enumeratedValue>
<enumeratedValue>
<name>IO_Disable</name>
<value>0b1111</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PC4_SELECT</name>
<description>PC4 Select</description>
<bitRange>[19:16]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Input</name>
<value>0b0000</value>
</enumeratedValue>
<enumeratedValue>
<name>SPI0_MOSI</name>
<value>0b0010</value>
</enumeratedValue>
<enumeratedValue>
<name>BOOT_SEL0</name>
<value>0b0100</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0110</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1000</value>
</enumeratedValue>
<enumeratedValue>
<name>PC_EINT4</name>
<value>0b1110</value>
</enumeratedValue>
<enumeratedValue>
<name>Output</name>
<value>0b0001</value>
</enumeratedValue>
<enumeratedValue>
<name>SDC2_D2</name>
<value>0b0011</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0101</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0111</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1001</value>
</enumeratedValue>
<enumeratedValue>
<name>IO_Disable</name>
<value>0b1111</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PC3_SELECT</name>
<description>PC3 Select</description>
<bitRange>[15:12]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Input</name>
<value>0b0000</value>
</enumeratedValue>
<enumeratedValue>
<name>SPI0_CS0</name>
<value>0b0010</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0100</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0110</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1000</value>
</enumeratedValue>
<enumeratedValue>
<name>PC_EINT3</name>
<value>0b1110</value>
</enumeratedValue>
<enumeratedValue>
<name>Output</name>
<value>0b0001</value>
</enumeratedValue>
<enumeratedValue>
<name>SDC2_CMD</name>
<value>0b0011</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0101</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0111</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1001</value>
</enumeratedValue>
<enumeratedValue>
<name>IO_Disable</name>
<value>0b1111</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PC2_SELECT</name>
<description>PC2 Select</description>
<bitRange>[11:8]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Input</name>
<value>0b0000</value>
</enumeratedValue>
<enumeratedValue>
<name>SPI0_CLK</name>
<value>0b0010</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0100</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0110</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1000</value>
</enumeratedValue>
<enumeratedValue>
<name>PC_EINT2</name>
<value>0b1110</value>
</enumeratedValue>
<enumeratedValue>
<name>Output</name>
<value>0b0001</value>
</enumeratedValue>
<enumeratedValue>
<name>SDC2_CLK</name>
<value>0b0011</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0101</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0111</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1001</value>
</enumeratedValue>
<enumeratedValue>
<name>IO_Disable</name>
<value>0b1111</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PC1_SELECT</name>
<description>PC1 Select.</description>
<bitRange>[7:4]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Input</name>
<value>0b0000</value>
</enumeratedValue>
<enumeratedValue>
<name>UART2_RX</name>
<value>0b0010</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0100</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0110</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1000</value>
</enumeratedValue>
<enumeratedValue>
<name>PC_EINT1</name>
<value>0b1110</value>
</enumeratedValue>
<enumeratedValue>
<name>Output</name>
<value>0b0001</value>
</enumeratedValue>
<enumeratedValue>
<name>TWI2_SDA</name>
<value>0b0011</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0101</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0111</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1001</value>
</enumeratedValue>
<enumeratedValue>
<name>IO_Disable</name>
<value>0b1111</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PC0_SELECT</name>
<description>PC0 Select</description>
<bitRange>[3:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Input</name>
<value>0b0000</value>
</enumeratedValue>
<enumeratedValue>
<name>UART2_TX</name>
<value>0b0010</value>
</enumeratedValue>
<enumeratedValue>
<name>LEDC_DO</name>
<value>0b0100</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0110</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1000</value>
</enumeratedValue>
<enumeratedValue>
<name>PC_EINT0</name>
<value>0b1110</value>
</enumeratedValue>
<enumeratedValue>
<name>Output</name>
<value>0b0001</value>
</enumeratedValue>
<enumeratedValue>
<name>TWI2_SCK</name>
<value>0b0011</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0101</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0111</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1001</value>
</enumeratedValue>
<enumeratedValue>
<name>IO_Disable</name>
<value>0b1111</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>pc_dat</name>
<description>PC Data Register</description>
<addressOffset>0x0070</addressOffset>
<fields>
<field>
<name>PC_DAT</name>
<bitRange>[7:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>pc_drv0</name>
<description>PC Multi_Driving Register 0</description>
<addressOffset>0x0074</addressOffset>
<fields>
<field>
<dim>8</dim>
<dimIncrement>4</dimIncrement>
<name>PC%s_DRV</name>
<description>PC Multi_Driving Select</description>
<bitRange>[1:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>L0</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>L1</name>
<value>1</value>
</enumeratedValue>
<enumeratedValue>
<name>L2</name>
<value>2</value>
</enumeratedValue>
<enumeratedValue>
<name>L3</name>
<value>3</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>pc_pull0</name>
<description>PC Pull Register 0</description>
<addressOffset>0x0084</addressOffset>
<fields>
<field>
<dim>8</dim>
<dimIncrement>2</dimIncrement>
<name>PC%s_PULL</name>
<description>PC Pull_up/down Select</description>
<bitRange>[1:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>pull_disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>pull_up</name>
<value>1</value>
</enumeratedValue>
<enumeratedValue>
<name>pull_down</name>
<value>2</value>
</enumeratedValue>
<enumeratedValue>
<name>reserved</name>
<value>3</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>pd_cfg0</name>
<description>PD Configure Register 0</description>
<addressOffset>0x0090</addressOffset>
<fields>
<field>
<name>PD7_SELECT</name>
<description>PD7 Select</description>
<bitRange>[31:28]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Input</name>
<value>0b0000</value>
</enumeratedValue>
<enumeratedValue>
<name>LCD0_D11</name>
<value>0b0010</value>
</enumeratedValue>
<enumeratedValue>
<name>DSI_D2N</name>
<value>0b0100</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0110</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1000</value>
</enumeratedValue>
<enumeratedValue>
<name>PD_EINT7</name>
<value>0b1110</value>
</enumeratedValue>
<enumeratedValue>
<name>Output</name>
<value>0b0001</value>
</enumeratedValue>
<enumeratedValue>
<name>LVDS0_CKN</name>
<value>0b0011</value>
</enumeratedValue>
<enumeratedValue>
<name>UART4_TX</name>
<value>0b0101</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0111</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1001</value>
</enumeratedValue>
<enumeratedValue>
<name>IO_Disable</name>
<value>0b1111</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PD6_SELECT</name>
<description>PD6 Select</description>
<bitRange>[27:24]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Input</name>
<value>0b0000</value>
</enumeratedValue>
<enumeratedValue>
<name>LCD0_D10</name>
<value>0b0010</value>
</enumeratedValue>
<enumeratedValue>
<name>DSI_D2P</name>
<value>0b0100</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0110</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1000</value>
</enumeratedValue>
<enumeratedValue>
<name>PD_EINT6</name>
<value>0b1110</value>
</enumeratedValue>
<enumeratedValue>
<name>Output</name>
<value>0b0001</value>
</enumeratedValue>
<enumeratedValue>
<name>LVDS0_CKP</name>
<value>0b0011</value>
</enumeratedValue>
<enumeratedValue>
<name>UART5_RX</name>
<value>0b0101</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0111</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1001</value>
</enumeratedValue>
<enumeratedValue>
<name>IO_Disable</name>
<value>0b1111</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PD5_SELECT</name>
<description>PD5 Select</description>
<bitRange>[23:20]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Input</name>
<value>0b0000</value>
</enumeratedValue>
<enumeratedValue>
<name>LCD0_D7</name>
<value>0b0010</value>
</enumeratedValue>
<enumeratedValue>
<name>DSI_CKN</name>
<value>0b0100</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0110</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1000</value>
</enumeratedValue>
<enumeratedValue>
<name>PD_EINT5</name>
<value>0b1110</value>
</enumeratedValue>
<enumeratedValue>
<name>Output</name>
<value>0b0001</value>
</enumeratedValue>
<enumeratedValue>
<name>LVDS0_V2N</name>
<value>0b0011</value>
</enumeratedValue>
<enumeratedValue>
<name>UART5_TX</name>
<value>0b0101</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0111</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1001</value>
</enumeratedValue>
<enumeratedValue>
<name>IO_Disable</name>
<value>0b1111</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PD4_SELECT</name>
<description>PD4 Select</description>
<bitRange>[19:16]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Input</name>
<value>0b0000</value>
</enumeratedValue>
<enumeratedValue>
<name>LCD0_D6</name>
<value>0b0010</value>
</enumeratedValue>
<enumeratedValue>
<name>DSI_CKP</name>
<value>0b0100</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0110</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1000</value>
</enumeratedValue>
<enumeratedValue>
<name>PD_EINT4</name>
<value>0b1110</value>
</enumeratedValue>
<enumeratedValue>
<name>Output</name>
<value>0b0001</value>
</enumeratedValue>
<enumeratedValue>
<name>LVDS0_V2P</name>
<value>0b0011</value>
</enumeratedValue>
<enumeratedValue>
<name>UART2_CTS</name>
<value>0b0101</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0111</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1001</value>
</enumeratedValue>
<enumeratedValue>
<name>IO_Disable</name>
<value>0b1111</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PD3_SELECT</name>
<description>PD3 Select</description>
<bitRange>[15:12]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Input</name>
<value>0b0000</value>
</enumeratedValue>
<enumeratedValue>
<name>LCD0_D5</name>
<value>0b0010</value>
</enumeratedValue>
<enumeratedValue>
<name>DSI_D1N</name>
<value>0b0100</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0110</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1000</value>
</enumeratedValue>
<enumeratedValue>
<name>PD_EINT3</name>
<value>0b1110</value>
</enumeratedValue>
<enumeratedValue>
<name>Output</name>
<value>0b0001</value>
</enumeratedValue>
<enumeratedValue>
<name>LVDS0_V1N</name>
<value>0b0011</value>
</enumeratedValue>
<enumeratedValue>
<name>UART2_RTS</name>
<value>0b0101</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0111</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1001</value>
</enumeratedValue>
<enumeratedValue>
<name>IO_Disable</name>
<value>0b1111</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PD2_SELECT</name>
<description>PD2 Select</description>
<bitRange>[11:8]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Input</name>
<value>0b0000</value>
</enumeratedValue>
<enumeratedValue>
<name>LCD0_D4</name>
<value>0b0010</value>
</enumeratedValue>
<enumeratedValue>
<name>DSI_D1P</name>
<value>0b0100</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0110</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1000</value>
</enumeratedValue>
<enumeratedValue>
<name>PD_EINT2</name>
<value>0b1110</value>
</enumeratedValue>
<enumeratedValue>
<name>Output</name>
<value>0b0001</value>
</enumeratedValue>
<enumeratedValue>
<name>LVDS0_V1P</name>
<value>0b0011</value>
</enumeratedValue>
<enumeratedValue>
<name>UART2_RX</name>
<value>0b0101</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0111</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1001</value>
</enumeratedValue>
<enumeratedValue>
<name>IO_Disable</name>
<value>0b1111</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PD1_SELECT</name>
<description>PD1 Select</description>
<bitRange>[7:4]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Input</name>
<value>0b0000</value>
</enumeratedValue>
<enumeratedValue>
<name>LCD0_D3</name>
<value>0b0010</value>
</enumeratedValue>
<enumeratedValue>
<name>DSI_D0N</name>
<value>0b0100</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0110</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1000</value>
</enumeratedValue>
<enumeratedValue>
<name>PD_EINT1</name>
<value>0b1110</value>
</enumeratedValue>
<enumeratedValue>
<name>Output</name>
<value>0b0001</value>
</enumeratedValue>
<enumeratedValue>
<name>LVDS0_V0N</name>
<value>0b0011</value>
</enumeratedValue>
<enumeratedValue>
<name>UART2_TX</name>
<value>0b0101</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0111</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1001</value>
</enumeratedValue>
<enumeratedValue>
<name>IO_Disable</name>
<value>0b1111</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PD0_SELECT</name>
<description>PD0 Select</description>
<bitRange>[3:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Input</name>
<value>0b0000</value>
</enumeratedValue>
<enumeratedValue>
<name>LCD0_D2</name>
<value>0b0010</value>
</enumeratedValue>
<enumeratedValue>
<name>DSI_D0P</name>
<value>0b0100</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0110</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1000</value>
</enumeratedValue>
<enumeratedValue>
<name>PD_EINT0</name>
<value>0b1110</value>
</enumeratedValue>
<enumeratedValue>
<name>Output</name>
<value>0b0001</value>
</enumeratedValue>
<enumeratedValue>
<name>LVDS0_V0P</name>
<value>0b0011</value>
</enumeratedValue>
<enumeratedValue>
<name>TWI0_SCK</name>
<value>0b0101</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0111</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1001</value>
</enumeratedValue>
<enumeratedValue>
<name>IO_Disable</name>
<value>0b1111</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>pd_cfg1</name>
<description>PD Configure Register 1</description>
<addressOffset>0x0094</addressOffset>
<fields>
<field>
<name>PD15_SELECT</name>
<description>PD15 Select</description>
<bitRange>[31:28]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Input</name>
<value>0b0000</value>
</enumeratedValue>
<enumeratedValue>
<name>LCD0_D21</name>
<value>0b0010</value>
</enumeratedValue>
<enumeratedValue>
<name>SPI1_WP_DBI_TE</name>
<value>0b0100</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0110</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1000</value>
</enumeratedValue>
<enumeratedValue>
<name>PD_EINT15</name>
<value>0b1110</value>
</enumeratedValue>
<enumeratedValue>
<name>Output</name>
<value>0b0001</value>
</enumeratedValue>
<enumeratedValue>
<name>LVDS1_V2N</name>
<value>0b0011</value>
</enumeratedValue>
<enumeratedValue>
<name>IR_RX</name>
<value>0b0101</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0111</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1001</value>
</enumeratedValue>
<enumeratedValue>
<name>IO_Disable</name>
<value>0b1111</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PD14_SELECT</name>
<description>PD14 Select</description>
<bitRange>[27:24]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Input</name>
<value>0b0000</value>
</enumeratedValue>
<enumeratedValue>
<name>LCD0_D20</name>
<value>0b0010</value>
</enumeratedValue>
<enumeratedValue>
<name>SPI1_HOLD_DBI_DCX_DBI_WRX</name>
<value>0b0100</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0110</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1000</value>
</enumeratedValue>
<enumeratedValue>
<name>PD_EINT14</name>
<value>0b1110</value>
</enumeratedValue>
<enumeratedValue>
<name>Output</name>
<value>0b0001</value>
</enumeratedValue>
<enumeratedValue>
<name>LVDS1_V2P</name>
<value>0b0011</value>
</enumeratedValue>
<enumeratedValue>
<name>UART3_CTS</name>
<value>0b0101</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0111</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1001</value>
</enumeratedValue>
<enumeratedValue>
<name>IO_Disable</name>
<value>0b1111</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PD13_SELECT</name>
<description>PD13 Select</description>
<bitRange>[23:20]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Input</name>
<value>0b0000</value>
</enumeratedValue>
<enumeratedValue>
<name>Output</name>
<value>0b0001</value>
</enumeratedValue>
<enumeratedValue>
<name>LCD0_D19</name>
<value>0b0010</value>
</enumeratedValue>
<enumeratedValue>
<name>LVDS1_V1N</name>
<value>0b0011</value>
</enumeratedValue>
<enumeratedValue>
<name>SPI1_MISO_DBI_SDI_DBI_TE_DBI_DCX</name>
<value>0b0100</value>
</enumeratedValue>
<enumeratedValue>
<name>UART3_RTS</name>
<value>0b0101</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0110</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1000</value>
</enumeratedValue>
<enumeratedValue>
<name>PD_EINT13</name>
<value>0b1110</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0111</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1001</value>
</enumeratedValue>
<enumeratedValue>
<name>IO_Disable</name>
<value>0b1111</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PD12_SELECT</name>
<description>PD12 Select</description>
<bitRange>[19:16]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Input</name>
<value>0b0000</value>
</enumeratedValue>
<enumeratedValue>
<name>LCD0_D18</name>
<value>0b0010</value>
</enumeratedValue>
<enumeratedValue>
<name>SPI1_MOSI_DBI_SDO</name>
<value>0b0100</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0110</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1000</value>
</enumeratedValue>
<enumeratedValue>
<name>PD_EINT12</name>
<value>0b1110</value>
</enumeratedValue>
<enumeratedValue>
<name>Output</name>
<value>0b0001</value>
</enumeratedValue>
<enumeratedValue>
<name>LVDS1_V1P</name>
<value>0b0011</value>
</enumeratedValue>
<enumeratedValue>
<name>TWI0_SDA</name>
<value>0b0101</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0111</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1001</value>
</enumeratedValue>
<enumeratedValue>
<name>IO_Disable</name>
<value>0b1111</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PD11_SELECT</name>
<description>PD11 Select</description>
<bitRange>[15:12]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Input</name>
<value>0b0000</value>
</enumeratedValue>
<enumeratedValue>
<name>LCD0_D15</name>
<value>0b0010</value>
</enumeratedValue>
<enumeratedValue>
<name>SPI1_CLK_DBI_SCLK</name>
<value>0b0100</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0110</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1000</value>
</enumeratedValue>
<enumeratedValue>
<name>PD_EINT11</name>
<value>0b1110</value>
</enumeratedValue>
<enumeratedValue>
<name>Output</name>
<value>0b0001</value>
</enumeratedValue>
<enumeratedValue>
<name>LVDS1_V0N</name>
<value>0b0011</value>
</enumeratedValue>
<enumeratedValue>
<name>UART3_RX</name>
<value>0b0101</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0111</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1001</value>
</enumeratedValue>
<enumeratedValue>
<name>IO_Disable</name>
<value>0b1111</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PD10_SELECT</name>
<description>PD10 Select</description>
<bitRange>[11:8]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Input</name>
<value>0b0000</value>
</enumeratedValue>
<enumeratedValue>
<name>LCD0_D14</name>
<value>0b0010</value>
</enumeratedValue>
<enumeratedValue>
<name>SPI1_CS_DBI_CSX</name>
<value>0b0100</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0110</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1000</value>
</enumeratedValue>
<enumeratedValue>
<name>PD_EINT10</name>
<value>0b1110</value>
</enumeratedValue>
<enumeratedValue>
<name>Output</name>
<value>0b0001</value>
</enumeratedValue>
<enumeratedValue>
<name>LVDS1_V0P</name>
<value>0b0011</value>
</enumeratedValue>
<enumeratedValue>
<name>UART3_TX</name>
<value>0b0101</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0111</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1001</value>
</enumeratedValue>
<enumeratedValue>
<name>IO_Disable</name>
<value>0b1111</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PD9_SELECT</name>
<description>PD9 Select</description>
<bitRange>[7:4]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Input</name>
<value>0b0000</value>
</enumeratedValue>
<enumeratedValue>
<name>LCD0_D13</name>
<value>0b0010</value>
</enumeratedValue>
<enumeratedValue>
<name>DSI_D3N</name>
<value>0b0100</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0110</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1000</value>
</enumeratedValue>
<enumeratedValue>
<name>PD_EINT9</name>
<value>0b1110</value>
</enumeratedValue>
<enumeratedValue>
<name>Output</name>
<value>0b0001</value>
</enumeratedValue>
<enumeratedValue>
<name>LVDS0_V3N</name>
<value>0b0011</value>
</enumeratedValue>
<enumeratedValue>
<name>PWM6</name>
<value>0b0101</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0111</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1001</value>
</enumeratedValue>
<enumeratedValue>
<name>IO_Disable</name>
<value>0b1111</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PD8_SELECT</name>
<description>PD8 Select</description>
<bitRange>[3:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Input</name>
<value>0b0000</value>
</enumeratedValue>
<enumeratedValue>
<name>LCD0_D12</name>
<value>0b0010</value>
</enumeratedValue>
<enumeratedValue>
<name>DSI_D3P</name>
<value>0b0100</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0110</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1000</value>
</enumeratedValue>
<enumeratedValue>
<name>PD_EINT8</name>
<value>0b1110</value>
</enumeratedValue>
<enumeratedValue>
<name>Output</name>
<value>0b0001</value>
</enumeratedValue>
<enumeratedValue>
<name>LVDS0_V3P</name>
<value>0b0011</value>
</enumeratedValue>
<enumeratedValue>
<name>UART4_RX</name>
<value>0b0101</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0111</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1001</value>
</enumeratedValue>
<enumeratedValue>
<name>IO_Disable</name>
<value>0b1111</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>pd_cfg2</name>
<description>PD Configure Register 2</description>
<addressOffset>0x0098</addressOffset>
<fields>
<field>
<name>PD22_SELECT</name>
<description>PD22 Select</description>
<bitRange>[27:24]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Input</name>
<value>0b0000</value>
</enumeratedValue>
<enumeratedValue>
<name>OWA_OUT</name>
<value>0b0010</value>
</enumeratedValue>
<enumeratedValue>
<name>UART1_RX</name>
<value>0b0100</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0110</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1000</value>
</enumeratedValue>
<enumeratedValue>
<name>PD_EINT22</name>
<value>0b1110</value>
</enumeratedValue>
<enumeratedValue>
<name>Output</name>
<value>0b0001</value>
</enumeratedValue>
<enumeratedValue>
<name>IR_RX</name>
<value>0b0011</value>
</enumeratedValue>
<enumeratedValue>
<name>PWM7</name>
<value>0b0101</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0111</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1001</value>
</enumeratedValue>
<enumeratedValue>
<name>IO_Disable</name>
<value>0b1111</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PD21_SELECT</name>
<description>PD21 Select</description>
<bitRange>[23:20]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Input</name>
<value>0b0000</value>
</enumeratedValue>
<enumeratedValue>
<name>LCD0_VSYNC</name>
<value>0b0010</value>
</enumeratedValue>
<enumeratedValue>
<name>UART1_TX</name>
<value>0b0100</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0110</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1000</value>
</enumeratedValue>
<enumeratedValue>
<name>PD_EINT21</name>
<value>0b1110</value>
</enumeratedValue>
<enumeratedValue>
<name>Output</name>
<value>0b0001</value>
</enumeratedValue>
<enumeratedValue>
<name>TWI2_SDA</name>
<value>0b0011</value>
</enumeratedValue>
<enumeratedValue>
<name>PWM5</name>
<value>0b0101</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0111</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1001</value>
</enumeratedValue>
<enumeratedValue>
<name>IO_Disable</name>
<value>0b1111</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PD20_SELECT</name>
<description>PD20 Select</description>
<bitRange>[19:16]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Input</name>
<value>0b0000</value>
</enumeratedValue>
<enumeratedValue>
<name>LCD0_HSYNC</name>
<value>0b0010</value>
</enumeratedValue>
<enumeratedValue>
<name>DMIC_CLK</name>
<value>0b0100</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0110</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1000</value>
</enumeratedValue>
<enumeratedValue>
<name>PD_EINT20</name>
<value>0b1110</value>
</enumeratedValue>
<enumeratedValue>
<name>Output</name>
<value>0b0001</value>
</enumeratedValue>
<enumeratedValue>
<name>TWI2_SCK</name>
<value>0b0011</value>
</enumeratedValue>
<enumeratedValue>
<name>PWM4</name>
<value>0b0101</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0111</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1001</value>
</enumeratedValue>
<enumeratedValue>
<name>IO_Disable</name>
<value>0b1111</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PD19_SELECT</name>
<description>PD19 Select</description>
<bitRange>[15:12]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Input</name>
<value>0b0000</value>
</enumeratedValue>
<enumeratedValue>
<name>LCD0_DE</name>
<value>0b0010</value>
</enumeratedValue>
<enumeratedValue>
<name>DMIC_DATA0</name>
<value>0b0100</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0110</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1000</value>
</enumeratedValue>
<enumeratedValue>
<name>PD_EINT19</name>
<value>0b1110</value>
</enumeratedValue>
<enumeratedValue>
<name>Output</name>
<value>0b0001</value>
</enumeratedValue>
<enumeratedValue>
<name>LVDS1_V3N</name>
<value>0b0011</value>
</enumeratedValue>
<enumeratedValue>
<name>PWM3</name>
<value>0b0101</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0111</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1001</value>
</enumeratedValue>
<enumeratedValue>
<name>IO_Disable</name>
<value>0b1111</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PD18_SELECT</name>
<description>PD18 Select</description>
<bitRange>[11:8]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Input</name>
<value>0b0000</value>
</enumeratedValue>
<enumeratedValue>
<name>LCD0_CLK</name>
<value>0b0010</value>
</enumeratedValue>
<enumeratedValue>
<name>DMIC_DATA1</name>
<value>0b0100</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0110</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1000</value>
</enumeratedValue>
<enumeratedValue>
<name>PD_EINT18</name>
<value>0b1110</value>
</enumeratedValue>
<enumeratedValue>
<name>Output</name>
<value>0b0001</value>
</enumeratedValue>
<enumeratedValue>
<name>LVDS1_V3P</name>
<value>0b0011</value>
</enumeratedValue>
<enumeratedValue>
<name>PWM2</name>
<value>0b0101</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0111</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1001</value>
</enumeratedValue>
<enumeratedValue>
<name>IO_Disable</name>
<value>0b1111</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PD17_SELECT</name>
<description>PD17 Select</description>
<bitRange>[7:4]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Input</name>
<value>0b0000</value>
</enumeratedValue>
<enumeratedValue>
<name>LCD0_D23</name>
<value>0b0010</value>
</enumeratedValue>
<enumeratedValue>
<name>DMIC_DATA2</name>
<value>0b0100</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0110</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1000</value>
</enumeratedValue>
<enumeratedValue>
<name>PD_EINT17</name>
<value>0b1110</value>
</enumeratedValue>
<enumeratedValue>
<name>Output</name>
<value>0b0001</value>
</enumeratedValue>
<enumeratedValue>
<name>LVDS1_CKN</name>
<value>0b0011</value>
</enumeratedValue>
<enumeratedValue>
<name>PWM1</name>
<value>0b0101</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0111</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1001</value>
</enumeratedValue>
<enumeratedValue>
<name>IO_Disable</name>
<value>0b1111</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PD16_SELECT</name>
<description>PD16 Select</description>
<bitRange>[3:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Input</name>
<value>0b0000</value>
</enumeratedValue>
<enumeratedValue>
<name>LCD0_D22</name>
<value>0b0010</value>
</enumeratedValue>
<enumeratedValue>
<name>DMIC_DATA3</name>
<value>0b0100</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0110</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1000</value>
</enumeratedValue>
<enumeratedValue>
<name>PD_EINT16</name>
<value>0b1110</value>
</enumeratedValue>
<enumeratedValue>
<name>Output</name>
<value>0b0001</value>
</enumeratedValue>
<enumeratedValue>
<name>LVDS1_CKP</name>
<value>0b0011</value>
</enumeratedValue>
<enumeratedValue>
<name>PWM0</name>
<value>0b0101</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0111</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1001</value>
</enumeratedValue>
<enumeratedValue>
<name>IO_Disable</name>
<value>0b1111</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>pd_dat</name>
<description>PD Data Register</description>
<addressOffset>0x00A0</addressOffset>
<fields>
<field>
<name>pd_dat</name>
<bitRange>[22:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>pd_drv0</name>
<description>PD Multi_Driving Register 0</description>
<addressOffset>0x00A4</addressOffset>
<fields>
<field>
<dim>8</dim>
<dimIncrement>4</dimIncrement>
<name>PD%s_DRV</name>
<description>PD Multi_Driving Select</description>
<bitRange>[1:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>L0</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>L1</name>
<value>1</value>
</enumeratedValue>
<enumeratedValue>
<name>L2</name>
<value>2</value>
</enumeratedValue>
<enumeratedValue>
<name>L3</name>
<value>3</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>pd_drv1</name>
<description>PD Multi_Driving Register 1</description>
<addressOffset>0x00A8</addressOffset>
<fields>
<field>
<dim>8</dim>
<dimIncrement>4</dimIncrement>
<dimIndex>8-15</dimIndex>
<name>PD%s_DRV</name>
<description>PD Multi_Driving Select</description>
<bitRange>[1:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>L0</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>L1</name>
<value>1</value>
</enumeratedValue>
<enumeratedValue>
<name>L2</name>
<value>2</value>
</enumeratedValue>
<enumeratedValue>
<name>L3</name>
<value>3</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>pd_drv2</name>
<description>PD Multi_Driving Register 2</description>
<addressOffset>0x00AC</addressOffset>
<fields>
<field>
<dim>7</dim>
<dimIncrement>4</dimIncrement>
<dimIndex>16-22</dimIndex>
<name>PD%s_DRV</name>
<description>PD Multi_Driving Select</description>
<bitRange>[1:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>L0</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>L1</name>
<value>1</value>
</enumeratedValue>
<enumeratedValue>
<name>L2</name>
<value>2</value>
</enumeratedValue>
<enumeratedValue>
<name>L3</name>
<value>3</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>pd_pull0</name>
<description>PD Pull Register 0</description>
<addressOffset>0x00B4</addressOffset>
<fields>
<field>
<dim>16</dim>
<dimIncrement>2</dimIncrement>
<name>PD%s_PULL</name>
<description>PD Pull_up/down Select</description>
<bitRange>[1:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>pull_disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>pull_up</name>
<value>1</value>
</enumeratedValue>
<enumeratedValue>
<name>pull_down</name>
<value>2</value>
</enumeratedValue>
<enumeratedValue>
<name>reserved</name>
<value>3</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>pd_pull1</name>
<description>PD Pull Register 1</description>
<addressOffset>0x00B8</addressOffset>
<fields>
<field>
<dim>7</dim>
<dimIncrement>2</dimIncrement>
<dimIndex>16-22</dimIndex>
<name>PD%s_PULL</name>
<description>PD Pull_up/down Select</description>
<bitRange>[1:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>pull_disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>pull_up</name>
<value>1</value>
</enumeratedValue>
<enumeratedValue>
<name>pull_down</name>
<value>2</value>
</enumeratedValue>
<enumeratedValue>
<name>reserved</name>
<value>3</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>pe_cfg0</name>
<description>PE Configure Register 0</description>
<addressOffset>0x00C0</addressOffset>
<fields>
<field>
<name>PE7_SELECT</name>
<description>PE7 Select</description>
<bitRange>[31:28]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Input</name>
<value>0b0000</value>
</enumeratedValue>
<enumeratedValue>
<name>NCSI0_D3</name>
<value>0b0010</value>
</enumeratedValue>
<enumeratedValue>
<name>TWI3_SDA</name>
<value>0b0100</value>
</enumeratedValue>
<enumeratedValue>
<name>D_JTAG_CK</name>
<value>0b0110</value>
</enumeratedValue>
<enumeratedValue>
<name>RGMII_CLKIN_RMII_RXER</name>
<value>0b1000</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1001</value>
</enumeratedValue>
<enumeratedValue>
<name>PE_EINT7</name>
<value>0b1110</value>
</enumeratedValue>
<enumeratedValue>
<name>IO_Disable</name>
<value>0b1111</value>
</enumeratedValue>
<enumeratedValue>
<name>Output</name>
<value>0b0001</value>
</enumeratedValue>
<enumeratedValue>
<name>UART5_RX</name>
<value>0b0011</value>
</enumeratedValue>
<enumeratedValue>
<name>OWA_OUT</name>
<value>0b0101</value>
</enumeratedValue>
<enumeratedValue>
<name>R_JTAG_CK</name>
<value>0b0111</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PE6_SELECT</name>
<description>PE6 Select</description>
<bitRange>[27:24]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Input</name>
<value>0b0000</value>
</enumeratedValue>
<enumeratedValue>
<name>NCSI0_D2</name>
<value>0b0010</value>
</enumeratedValue>
<enumeratedValue>
<name>TWI3_SCK</name>
<value>0b0100</value>
</enumeratedValue>
<enumeratedValue>
<name>D_JTAG_DO</name>
<value>0b0110</value>
</enumeratedValue>
<enumeratedValue>
<name>RMII_TXCTRL_RMII_TXEN</name>
<value>0b1000</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1001</value>
</enumeratedValue>
<enumeratedValue>
<name>PE_EINT6</name>
<value>0b1110</value>
</enumeratedValue>
<enumeratedValue>
<name>IO_Disable</name>
<value>0b1111</value>
</enumeratedValue>
<enumeratedValue>
<name>Output</name>
<value>0b0001</value>
</enumeratedValue>
<enumeratedValue>
<name>UART5_TX</name>
<value>0b0011</value>
</enumeratedValue>
<enumeratedValue>
<name>OWA_IN</name>
<value>0b0101</value>
</enumeratedValue>
<enumeratedValue>
<name>R_JTAG_DO</name>
<value>0b0111</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PE5_SELECT</name>
<description>PE5 Select</description>
<bitRange>[23:20]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Input</name>
<value>0b0000</value>
</enumeratedValue>
<enumeratedValue>
<name>NCSI0_D1</name>
<value>0b0010</value>
</enumeratedValue>
<enumeratedValue>
<name>TWI2_SDA</name>
<value>0b0100</value>
</enumeratedValue>
<enumeratedValue>
<name>D_JTAG_DI</name>
<value>0b0110</value>
</enumeratedValue>
<enumeratedValue>
<name>RGMII_TXD1_RMII_TXD1</name>
<value>0b1000</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1001</value>
</enumeratedValue>
<enumeratedValue>
<name>PE_EINT5</name>
<value>0b1110</value>
</enumeratedValue>
<enumeratedValue>
<name>IO_Disable</name>
<value>0b1111</value>
</enumeratedValue>
<enumeratedValue>
<name>Output</name>
<value>0b0001</value>
</enumeratedValue>
<enumeratedValue>
<name>UART4_RX</name>
<value>0b0011</value>
</enumeratedValue>
<enumeratedValue>
<name>LEDC_DO</name>
<value>0b0101</value>
</enumeratedValue>
<enumeratedValue>
<name>R_JTAG_DI</name>
<value>0b0111</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PE4_SELECT</name>
<description>PE4 Select</description>
<bitRange>[19:16]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Input</name>
<value>0b0000</value>
</enumeratedValue>
<enumeratedValue>
<name>NCSI0_D0</name>
<value>0b0010</value>
</enumeratedValue>
<enumeratedValue>
<name>TWI2_SCK</name>
<value>0b0100</value>
</enumeratedValue>
<enumeratedValue>
<name>D_JTAG_MS</name>
<value>0b0110</value>
</enumeratedValue>
<enumeratedValue>
<name>RGMII_TXD0_RMII_TXD0</name>
<value>0b1000</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1001</value>
</enumeratedValue>
<enumeratedValue>
<name>PE_EINT4</name>
<value>0b1110</value>
</enumeratedValue>
<enumeratedValue>
<name>IO_Disable</name>
<value>0b1111</value>
</enumeratedValue>
<enumeratedValue>
<name>Output</name>
<value>0b0001</value>
</enumeratedValue>
<enumeratedValue>
<name>UART4_TX</name>
<value>0b0011</value>
</enumeratedValue>
<enumeratedValue>
<name>CLK_FANOUT2</name>
<value>0b0101</value>
</enumeratedValue>
<enumeratedValue>
<name>R_JTAG_MS</name>
<value>0b0111</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PE3_SELECT</name>
<description>PE3 Select</description>
<bitRange>[15:12]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Input</name>
<value>0b0000</value>
</enumeratedValue>
<enumeratedValue>
<name>NCSI0_MCLK</name>
<value>0b0010</value>
</enumeratedValue>
<enumeratedValue>
<name>TWI0_SDA</name>
<value>0b0100</value>
</enumeratedValue>
<enumeratedValue>
<name>UART0_RX</name>
<value>0b0110</value>
</enumeratedValue>
<enumeratedValue>
<name>RGMII_TXCK_RMII_TXCK</name>
<value>0b1000</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1001</value>
</enumeratedValue>
<enumeratedValue>
<name>PE_EINT3</name>
<value>0b1110</value>
</enumeratedValue>
<enumeratedValue>
<name>IO_Disable</name>
<value>0b1111</value>
</enumeratedValue>
<enumeratedValue>
<name>Output</name>
<value>0b0001</value>
</enumeratedValue>
<enumeratedValue>
<name>UART2_RX</name>
<value>0b0011</value>
</enumeratedValue>
<enumeratedValue>
<name>CLK_FANOUT1</name>
<value>0b0101</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0111</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PE2_SELECT</name>
<description>PE2 Select</description>
<bitRange>[11:8]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Input</name>
<value>0b0000</value>
</enumeratedValue>
<enumeratedValue>
<name>NCSI0_PCLK</name>
<value>0b0010</value>
</enumeratedValue>
<enumeratedValue>
<name>TWI0_SCK</name>
<value>0b0100</value>
</enumeratedValue>
<enumeratedValue>
<name>UART0_TX</name>
<value>0b0110</value>
</enumeratedValue>
<enumeratedValue>
<name>RGMII_RXD1_RMII_RXD1</name>
<value>0b1000</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1001</value>
</enumeratedValue>
<enumeratedValue>
<name>PE_EINT2</name>
<value>0b1110</value>
</enumeratedValue>
<enumeratedValue>
<name>IO_Disable</name>
<value>0b1111</value>
</enumeratedValue>
<enumeratedValue>
<name>Output</name>
<value>0b0001</value>
</enumeratedValue>
<enumeratedValue>
<name>UART2_TX</name>
<value>0b0011</value>
</enumeratedValue>
<enumeratedValue>
<name>CLK_FANOUT0</name>
<value>0b0101</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0111</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PE1_SELECT</name>
<description>PE1 Select</description>
<bitRange>[7:4]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Input</name>
<value>0b0000</value>
</enumeratedValue>
<enumeratedValue>
<name>NCSI0_VSYNC</name>
<value>0b0010</value>
</enumeratedValue>
<enumeratedValue>
<name>TWI1_SDA</name>
<value>0b0100</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0110</value>
</enumeratedValue>
<enumeratedValue>
<name>RGMII_RXD0_RMII_RXD0</name>
<value>0b1000</value>
</enumeratedValue>
<enumeratedValue>
<name>PE_EINT1</name>
<value>0b1110</value>
</enumeratedValue>
<enumeratedValue>
<name>Output</name>
<value>0b0001</value>
</enumeratedValue>
<enumeratedValue>
<name>UART2_CTS</name>
<value>0b0011</value>
</enumeratedValue>
<enumeratedValue>
<name>LCD0_VSYNC</name>
<value>0b0101</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0111</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1001</value>
</enumeratedValue>
<enumeratedValue>
<name>IO_Disable</name>
<value>0b1111</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PE0_SELECT</name>
<description>PE0 Select</description>
<bitRange>[3:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Input</name>
<value>0b0000</value>
</enumeratedValue>
<enumeratedValue>
<name>NCSI0_HSYNC</name>
<value>0b0010</value>
</enumeratedValue>
<enumeratedValue>
<name>TWI1_SCK</name>
<value>0b0100</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0110</value>
</enumeratedValue>
<enumeratedValue>
<name>RGMII_RXCTRL_RMII_CRS_DV</name>
<value>0b1000</value>
</enumeratedValue>
<enumeratedValue>
<name>PE_EINT0</name>
<value>0b1110</value>
</enumeratedValue>
<enumeratedValue>
<name>Output</name>
<value>0b0001</value>
</enumeratedValue>
<enumeratedValue>
<name>UART2_RTS</name>
<value>0b0011</value>
</enumeratedValue>
<enumeratedValue>
<name>LCD0_HSYNC</name>
<value>0b0101</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0111</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1001</value>
</enumeratedValue>
<enumeratedValue>
<name>IO_Disable</name>
<value>0b1111</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>pe_cfg1</name>
<description>PE Configure Register 1</description>
<addressOffset>0x00C4</addressOffset>
<fields>
<field>
<name>PE15_SELECT</name>
<description>PE15 Select</description>
<bitRange>[31:28]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Input</name>
<value>0b0000</value>
</enumeratedValue>
<enumeratedValue>
<name>TWI1_SDA</name>
<value>0b0010</value>
</enumeratedValue>
<enumeratedValue>
<name>PWM6</name>
<value>0b0100</value>
</enumeratedValue>
<enumeratedValue>
<name>DMIC_DATA1</name>
<value>0b0110</value>
</enumeratedValue>
<enumeratedValue>
<name>RGMII_RXCK</name>
<value>0b1000</value>
</enumeratedValue>
<enumeratedValue>
<name>PE_EINT15</name>
<value>0b1110</value>
</enumeratedValue>
<enumeratedValue>
<name>Output</name>
<value>0b0001</value>
</enumeratedValue>
<enumeratedValue>
<name>D_JTAG_DI</name>
<value>0b0011</value>
</enumeratedValue>
<enumeratedValue>
<name>I2S0_LRCK</name>
<value>0b0101</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0111</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1001</value>
</enumeratedValue>
<enumeratedValue>
<name>IO_Disable</name>
<value>0b1111</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PE14_SELECT</name>
<description>PE14 Select</description>
<bitRange>[27:24]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Input</name>
<value>0b0000</value>
</enumeratedValue>
<enumeratedValue>
<name>TWI1_SCK</name>
<value>0b0010</value>
</enumeratedValue>
<enumeratedValue>
<name>I2S0_DOUT1</name>
<value>0b0100</value>
</enumeratedValue>
<enumeratedValue>
<name>DMIC_DATA2</name>
<value>0b0110</value>
</enumeratedValue>
<enumeratedValue>
<name>RGMII_RXD3</name>
<value>0b1000</value>
</enumeratedValue>
<enumeratedValue>
<name>PE_EINT14</name>
<value>0b1110</value>
</enumeratedValue>
<enumeratedValue>
<name>Output</name>
<value>0b0001</value>
</enumeratedValue>
<enumeratedValue>
<name>D_JTAG_MS</name>
<value>0b0011</value>
</enumeratedValue>
<enumeratedValue>
<name>I2S0_DIN0</name>
<value>0b0101</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0111</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1001</value>
</enumeratedValue>
<enumeratedValue>
<name>IO_Disable</name>
<value>0b1111</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PE13_SELECT</name>
<description>PE13 Select</description>
<bitRange>[23:20]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Input</name>
<value>0b0000</value>
</enumeratedValue>
<enumeratedValue>
<name>TWI2_SDA</name>
<value>0b0010</value>
</enumeratedValue>
<enumeratedValue>
<name>I2S0_DOUT0</name>
<value>0b0100</value>
</enumeratedValue>
<enumeratedValue>
<name>DMIC_DATA3</name>
<value>0b0110</value>
</enumeratedValue>
<enumeratedValue>
<name>RGMII_RXD2</name>
<value>0b1000</value>
</enumeratedValue>
<enumeratedValue>
<name>PE_EINT13</name>
<value>0b1110</value>
</enumeratedValue>
<enumeratedValue>
<name>Output</name>
<value>0b0001</value>
</enumeratedValue>
<enumeratedValue>
<name>PWM5</name>
<value>0b0011</value>
</enumeratedValue>
<enumeratedValue>
<name>I2S0_DIN1</name>
<value>0b0101</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0111</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1001</value>
</enumeratedValue>
<enumeratedValue>
<name>IO_Disable</name>
<value>0b1111</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PE12_SELECT</name>
<description>PE12 Select</description>
<bitRange>[19:16]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Input</name>
<value>0b0000</value>
</enumeratedValue>
<enumeratedValue>
<name>TWI2_SCK</name>
<value>0b0010</value>
</enumeratedValue>
<enumeratedValue>
<name>I2S0_DOUT2</name>
<value>0b0100</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0110</value>
</enumeratedValue>
<enumeratedValue>
<name>RGMII_TXD3</name>
<value>0b1000</value>
</enumeratedValue>
<enumeratedValue>
<name>PE_EINT12</name>
<value>0b1110</value>
</enumeratedValue>
<enumeratedValue>
<name>Output</name>
<value>0b0001</value>
</enumeratedValue>
<enumeratedValue>
<name>NCSI0_FIELD</name>
<value>0b0011</value>
</enumeratedValue>
<enumeratedValue>
<name>I2S0_DIN2</name>
<value>0b0101</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0111</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1001</value>
</enumeratedValue>
<enumeratedValue>
<name>IO_Disable</name>
<value>0b1111</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PE11_SELECT</name>
<description>PE11 Select</description>
<bitRange>[15:12]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Input</name>
<value>0b0000</value>
</enumeratedValue>
<enumeratedValue>
<name>NCSI0_D7</name>
<value>0b0010</value>
</enumeratedValue>
<enumeratedValue>
<name>I2S0_DOUT3</name>
<value>0b0100</value>
</enumeratedValue>
<enumeratedValue>
<name>JTAG_CK</name>
<value>0b0110</value>
</enumeratedValue>
<enumeratedValue>
<name>RGMII_TXD2</name>
<value>0b1000</value>
</enumeratedValue>
<enumeratedValue>
<name>PE_EINT11</name>
<value>0b1110</value>
</enumeratedValue>
<enumeratedValue>
<name>Output</name>
<value>0b0001</value>
</enumeratedValue>
<enumeratedValue>
<name>UART1_RX</name>
<value>0b0011</value>
</enumeratedValue>
<enumeratedValue>
<name>I2S0_DIN3</name>
<value>0b0101</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0111</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1001</value>
</enumeratedValue>
<enumeratedValue>
<name>IO_Disable</name>
<value>0b1111</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PE10_SELECT</name>
<description>PE10 Select</description>
<bitRange>[11:8]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Input</name>
<value>0b0000</value>
</enumeratedValue>
<enumeratedValue>
<name>NCSI0_D6</name>
<value>0b0010</value>
</enumeratedValue>
<enumeratedValue>
<name>PWM4</name>
<value>0b0100</value>
</enumeratedValue>
<enumeratedValue>
<name>JTAG_DO</name>
<value>0b0110</value>
</enumeratedValue>
<enumeratedValue>
<name>EPHY_25M</name>
<value>0b1000</value>
</enumeratedValue>
<enumeratedValue>
<name>PE_EINT10</name>
<value>0b1110</value>
</enumeratedValue>
<enumeratedValue>
<name>Output</name>
<value>0b0001</value>
</enumeratedValue>
<enumeratedValue>
<name>UART1_TX</name>
<value>0b0011</value>
</enumeratedValue>
<enumeratedValue>
<name>IR_RX</name>
<value>0b0101</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0111</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1001</value>
</enumeratedValue>
<enumeratedValue>
<name>IO_Disable</name>
<value>0b1111</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PE9_SELECT</name>
<description>PE9 Select</description>
<bitRange>[7:4]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Input</name>
<value>0b0000</value>
</enumeratedValue>
<enumeratedValue>
<name>NCSI0_D5</name>
<value>0b0010</value>
</enumeratedValue>
<enumeratedValue>
<name>PWM3</name>
<value>0b0100</value>
</enumeratedValue>
<enumeratedValue>
<name>JTAG_DI</name>
<value>0b0110</value>
</enumeratedValue>
<enumeratedValue>
<name>MDIO</name>
<value>0b1000</value>
</enumeratedValue>
<enumeratedValue>
<name>PE_EINT9</name>
<value>0b1110</value>
</enumeratedValue>
<enumeratedValue>
<name>Output</name>
<value>0b0001</value>
</enumeratedValue>
<enumeratedValue>
<name>UART1_CTS</name>
<value>0b0011</value>
</enumeratedValue>
<enumeratedValue>
<name>UART3_RX</name>
<value>0b0101</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0111</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1001</value>
</enumeratedValue>
<enumeratedValue>
<name>IO_Disable</name>
<value>0b1111</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PE8_SELECT</name>
<description>PE8 Select</description>
<bitRange>[3:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Input</name>
<value>0b0000</value>
</enumeratedValue>
<enumeratedValue>
<name>NCSI0_D4</name>
<value>0b0010</value>
</enumeratedValue>
<enumeratedValue>
<name>PWM2</name>
<value>0b0100</value>
</enumeratedValue>
<enumeratedValue>
<name>JTAG_MS</name>
<value>0b0110</value>
</enumeratedValue>
<enumeratedValue>
<name>MDC</name>
<value>0b1000</value>
</enumeratedValue>
<enumeratedValue>
<name>PE_EINT8</name>
<value>0b1110</value>
</enumeratedValue>
<enumeratedValue>
<name>Output</name>
<value>0b0001</value>
</enumeratedValue>
<enumeratedValue>
<name>UART1_RTS</name>
<value>0b0011</value>
</enumeratedValue>
<enumeratedValue>
<name>UART3_TX</name>
<value>0b0101</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0111</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1001</value>
</enumeratedValue>
<enumeratedValue>
<name>IO_Disable</name>
<value>0b1111</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>pe_cfg2</name>
<description>PE Configure Register 2</description>
<addressOffset>0x00C8</addressOffset>
<fields>
<field>
<name>PE17_SELECT</name>
<description>PE17 Select</description>
<bitRange>[7:4]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Input</name>
<value>0b0000</value>
</enumeratedValue>
<enumeratedValue>
<name>TWI3_SDA</name>
<value>0b0010</value>
</enumeratedValue>
<enumeratedValue>
<name>IR_TX</name>
<value>0b0100</value>
</enumeratedValue>
<enumeratedValue>
<name>DMIC_CLK</name>
<value>0b0110</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1000</value>
</enumeratedValue>
<enumeratedValue>
<name>PE_EINT17</name>
<value>0b1110</value>
</enumeratedValue>
<enumeratedValue>
<name>Output</name>
<value>0b0001</value>
</enumeratedValue>
<enumeratedValue>
<name>D_JTAG_CK</name>
<value>0b0011</value>
</enumeratedValue>
<enumeratedValue>
<name>I2S0_MCLK</name>
<value>0b0101</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0111</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1001</value>
</enumeratedValue>
<enumeratedValue>
<name>IO_Disable</name>
<value>0b1111</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PE16_SELECT</name>
<description>PE16 Select</description>
<bitRange>[3:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Input</name>
<value>0b0000</value>
</enumeratedValue>
<enumeratedValue>
<name>TWI3_SCK</name>
<value>0b0010</value>
</enumeratedValue>
<enumeratedValue>
<name>PWM7</name>
<value>0b0100</value>
</enumeratedValue>
<enumeratedValue>
<name>DMIC_DATA0</name>
<value>0b0110</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1000</value>
</enumeratedValue>
<enumeratedValue>
<name>PE_EINT16</name>
<value>0b1110</value>
</enumeratedValue>
<enumeratedValue>
<name>Output</name>
<value>0b0001</value>
</enumeratedValue>
<enumeratedValue>
<name>D_JTAG_DO</name>
<value>0b0011</value>
</enumeratedValue>
<enumeratedValue>
<name>I2S0_BCLK</name>
<value>0b0101</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0111</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1001</value>
</enumeratedValue>
<enumeratedValue>
<name>IO_Disable</name>
<value>0b1111</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>pe_dat</name>
<description>PE Data Register</description>
<addressOffset>0x00D0</addressOffset>
<fields>
<field>
<name>PE_DAT</name>
<description>PE Data</description>
<bitRange>[17:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>pe_drv0</name>
<description>PE Multi_Driving Register 0</description>
<addressOffset>0x00D4</addressOffset>
<fields>
<field>
<dim>8</dim>
<dimIncrement>4</dimIncrement>
<name>PE%s_DRV</name>
<description>PE Multi_Driving Select</description>
<bitRange>[1:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>L0</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>L1</name>
<value>1</value>
</enumeratedValue>
<enumeratedValue>
<name>L2</name>
<value>2</value>
</enumeratedValue>
<enumeratedValue>
<name>L3</name>
<value>3</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>pe_drv1</name>
<description>PE Multi_Driving Register 1</description>
<addressOffset>0x00D8</addressOffset>
<fields>
<field>
<dim>8</dim>
<dimIncrement>4</dimIncrement>
<dimIndex>8-15</dimIndex>
<name>PE%s_DRV</name>
<description>PE Multi_Driving Select</description>
<bitRange>[1:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>L0</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>L1</name>
<value>1</value>
</enumeratedValue>
<enumeratedValue>
<name>L2</name>
<value>2</value>
</enumeratedValue>
<enumeratedValue>
<name>L3</name>
<value>3</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>pe_drv2</name>
<description>PE Multi_Driving Register 2</description>
<addressOffset>0x00DC</addressOffset>
<fields>
<field>
<dim>2</dim>
<dimIncrement>4</dimIncrement>
<dimIndex>16-17</dimIndex>
<name>PE%s_DRV</name>
<description>PE Multi_Driving Select</description>
<bitRange>[1:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>L0</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>L1</name>
<value>1</value>
</enumeratedValue>
<enumeratedValue>
<name>L2</name>
<value>2</value>
</enumeratedValue>
<enumeratedValue>
<name>L3</name>
<value>3</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>pe_pull0</name>
<description>PE Pull Register 0</description>
<addressOffset>0x00E4</addressOffset>
<fields>
<field>
<dim>16</dim>
<dimIncrement>2</dimIncrement>
<name>PE%s_PULL</name>
<description>PE Pull_up/down Select</description>
<bitRange>[1:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>pull_disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>pull_up</name>
<value>1</value>
</enumeratedValue>
<enumeratedValue>
<name>pull_down</name>
<value>2</value>
</enumeratedValue>
<enumeratedValue>
<name>reserved</name>
<value>3</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>pe_pull1</name>
<description>PE Pull Register 1</description>
<addressOffset>0x00E8</addressOffset>
<fields>
<field>
<dim>2</dim>
<dimIncrement>2</dimIncrement>
<dimIndex>16-17</dimIndex>
<name>PE%s_PULL</name>
<description>PE Pull_up/down Select</description>
<bitRange>[1:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>pull_disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>pull_up</name>
<value>1</value>
</enumeratedValue>
<enumeratedValue>
<name>pull_down</name>
<value>2</value>
</enumeratedValue>
<enumeratedValue>
<name>reserved</name>
<value>3</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>pf_cfg0</name>
<description>PF Configure Register 0</description>
<addressOffset>0x00F0</addressOffset>
<fields>
<field>
<name>PF6_SELECT</name>
<description>PF6 Select</description>
<bitRange>[27:24]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Input</name>
<value>0b0000</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0010</value>
</enumeratedValue>
<enumeratedValue>
<name>IR_RX</name>
<value>0b0100</value>
</enumeratedValue>
<enumeratedValue>
<name>PWM5</name>
<value>0b0110</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1000</value>
</enumeratedValue>
<enumeratedValue>
<name>PF_EINT6</name>
<value>0b1110</value>
</enumeratedValue>
<enumeratedValue>
<name>Output</name>
<value>0b0001</value>
</enumeratedValue>
<enumeratedValue>
<name>OWA_OUT</name>
<value>0b0011</value>
</enumeratedValue>
<enumeratedValue>
<name>I2S2_MCLK</name>
<value>0b0101</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0111</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1001</value>
</enumeratedValue>
<enumeratedValue>
<name>IO_Disable</name>
<value>0b1111</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PF5_SELECT</name>
<description>PF5 Select</description>
<bitRange>[23:20]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Input</name>
<value>0b0000</value>
</enumeratedValue>
<enumeratedValue>
<name>SDC0_D2</name>
<value>0b0010</value>
</enumeratedValue>
<enumeratedValue>
<name>R_JTAG_CK</name>
<value>0b0100</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0110</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1000</value>
</enumeratedValue>
<enumeratedValue>
<name>PF_EINT5</name>
<value>0b1110</value>
</enumeratedValue>
<enumeratedValue>
<name>Output</name>
<value>0b0001</value>
</enumeratedValue>
<enumeratedValue>
<name>JTAG_CK</name>
<value>0b0011</value>
</enumeratedValue>
<enumeratedValue>
<name>I2S2_LRCK</name>
<value>0b0101</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0111</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1001</value>
</enumeratedValue>
<enumeratedValue>
<name>IO_Disable</name>
<value>0b1111</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PF4_SELECT</name>
<description>PF4 Select</description>
<bitRange>[19:16]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Input</name>
<value>0b0000</value>
</enumeratedValue>
<enumeratedValue>
<name>SDC0_D3</name>
<value>0b0010</value>
</enumeratedValue>
<enumeratedValue>
<name>TWI0_SDA</name>
<value>0b0100</value>
</enumeratedValue>
<enumeratedValue>
<name>IR_TX</name>
<value>0b0110</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1000</value>
</enumeratedValue>
<enumeratedValue>
<name>PF_EINT4</name>
<value>0b1110</value>
</enumeratedValue>
<enumeratedValue>
<name>Output</name>
<value>0b0001</value>
</enumeratedValue>
<enumeratedValue>
<name>UART0_RX</name>
<value>0b0011</value>
</enumeratedValue>
<enumeratedValue>
<name>PWM6</name>
<value>0b0101</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0111</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1001</value>
</enumeratedValue>
<enumeratedValue>
<name>IO_Disable</name>
<value>0b1111</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PF3_SELECT</name>
<description>PF3 Select</description>
<bitRange>[15:12]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Input</name>
<value>0b0000</value>
</enumeratedValue>
<enumeratedValue>
<name>SDC0_CMD</name>
<value>0b0010</value>
</enumeratedValue>
<enumeratedValue>
<name>R_JTAG_DO</name>
<value>0b0100</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0110</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1000</value>
</enumeratedValue>
<enumeratedValue>
<name>PF_EINT3</name>
<value>0b1110</value>
</enumeratedValue>
<enumeratedValue>
<name>Output</name>
<value>0b0001</value>
</enumeratedValue>
<enumeratedValue>
<name>JTAG_DO</name>
<value>0b0011</value>
</enumeratedValue>
<enumeratedValue>
<name>I2S2_BCLK</name>
<value>0b0101</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0111</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1001</value>
</enumeratedValue>
<enumeratedValue>
<name>IO_Disable</name>
<value>0b1111</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PF2_SELECT</name>
<description>PF2 Select</description>
<bitRange>[11:8]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Input</name>
<value>0b0000</value>
</enumeratedValue>
<enumeratedValue>
<name>SDC0_CLK</name>
<value>0b0010</value>
</enumeratedValue>
<enumeratedValue>
<name>TWI0_SCK</name>
<value>0b0100</value>
</enumeratedValue>
<enumeratedValue>
<name>OWA_IN</name>
<value>0b0110</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1000</value>
</enumeratedValue>
<enumeratedValue>
<name>PF_EINT2</name>
<value>0b1110</value>
</enumeratedValue>
<enumeratedValue>
<name>Output</name>
<value>0b0001</value>
</enumeratedValue>
<enumeratedValue>
<name>UART0_TX</name>
<value>0b0011</value>
</enumeratedValue>
<enumeratedValue>
<name>LEDC_DO</name>
<value>0b0101</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0111</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1001</value>
</enumeratedValue>
<enumeratedValue>
<name>IO_Disable</name>
<value>0b1111</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PF1_SELECT</name>
<description>PF1 Select</description>
<bitRange>[7:4]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Input</name>
<value>0b0000</value>
</enumeratedValue>
<enumeratedValue>
<name>SDC0_D0</name>
<value>0b0010</value>
</enumeratedValue>
<enumeratedValue>
<name>R_JTAG_DI</name>
<value>0b0100</value>
</enumeratedValue>
<enumeratedValue>
<name>I2S2_DIN1</name>
<value>0b0110</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1000</value>
</enumeratedValue>
<enumeratedValue>
<name>PF_EINT1</name>
<value>0b1110</value>
</enumeratedValue>
<enumeratedValue>
<name>Output</name>
<value>0b0001</value>
</enumeratedValue>
<enumeratedValue>
<name>JTAG_DI</name>
<value>0b0011</value>
</enumeratedValue>
<enumeratedValue>
<name>I2S2_DOUT0</name>
<value>0b0101</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0111</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1001</value>
</enumeratedValue>
<enumeratedValue>
<name>IO_Disable</name>
<value>0b1111</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PF0_SELECT</name>
<description>PF0 Select</description>
<bitRange>[3:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Input</name>
<value>0b0000</value>
</enumeratedValue>
<enumeratedValue>
<name>SDC0_D1</name>
<value>0b0010</value>
</enumeratedValue>
<enumeratedValue>
<name>R_JTAG_MS</name>
<value>0b0100</value>
</enumeratedValue>
<enumeratedValue>
<name>I2S2_DIN0</name>
<value>0b0110</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1000</value>
</enumeratedValue>
<enumeratedValue>
<name>PF_EINT0</name>
<value>0b1110</value>
</enumeratedValue>
<enumeratedValue>
<name>Output</name>
<value>0b0001</value>
</enumeratedValue>
<enumeratedValue>
<name>JTAG_MS</name>
<value>0b0011</value>
</enumeratedValue>
<enumeratedValue>
<name>I2S2_DOUT1</name>
<value>0b0101</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0111</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1001</value>
</enumeratedValue>
<enumeratedValue>
<name>IO_Disable</name>
<value>0b1111</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>pf_dat</name>
<description>PF Data Register</description>
<addressOffset>0x0100</addressOffset>
<fields>
<field>
<name>PF_DAT</name>
<description>PF Data</description>
<bitRange>[6:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>pf_drv0</name>
<description>PF Multi_Driving Register 0</description>
<addressOffset>0x0104</addressOffset>
<fields>
<field>
<dim>7</dim>
<dimIncrement>4</dimIncrement>
<name>PF%s_DRV</name>
<description>PF Multi_Driving Select</description>
<bitRange>[1:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>L0</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>L1</name>
<value>1</value>
</enumeratedValue>
<enumeratedValue>
<name>L2</name>
<value>2</value>
</enumeratedValue>
<enumeratedValue>
<name>L3</name>
<value>3</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>pf_pull0</name>
<description>PF Pull Register 0</description>
<addressOffset>0x0114</addressOffset>
<fields>
<field>
<dim>7</dim>
<dimIncrement>2</dimIncrement>
<name>PF%s_PULL</name>
<description>PF Pull_up/down Select</description>
<bitRange>[1:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>pull_disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>pull_up</name>
<value>1</value>
</enumeratedValue>
<enumeratedValue>
<name>pull_down</name>
<value>2</value>
</enumeratedValue>
<enumeratedValue>
<name>reserved</name>
<value>3</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>pg_cfg0</name>
<description>PG Configure Register 0</description>
<addressOffset>0x0120</addressOffset>
<fields>
<field>
<name>PG7_SELECT</name>
<description>PG7 Select</description>
<bitRange>[31:28]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Input</name>
<value>0b0000</value>
</enumeratedValue>
<enumeratedValue>
<name>UART1_RX</name>
<value>0b0010</value>
</enumeratedValue>
<enumeratedValue>
<name>RGMII_TXD3</name>
<value>0b0100</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0110</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1000</value>
</enumeratedValue>
<enumeratedValue>
<name>PG_EINT7</name>
<value>0b1110</value>
</enumeratedValue>
<enumeratedValue>
<name>Output</name>
<value>0b0001</value>
</enumeratedValue>
<enumeratedValue>
<name>TWI2_SDA</name>
<value>0b0011</value>
</enumeratedValue>
<enumeratedValue>
<name>OWA_IN</name>
<value>0b0101</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0111</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1001</value>
</enumeratedValue>
<enumeratedValue>
<name>IO_Disable</name>
<value>0b1111</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PG6_SELECT</name>
<description>PG6 Select</description>
<bitRange>[27:24]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Input</name>
<value>0b0000</value>
</enumeratedValue>
<enumeratedValue>
<name>UART1_TX</name>
<value>0b0010</value>
</enumeratedValue>
<enumeratedValue>
<name>RGMII_TXD2</name>
<value>0b0100</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0110</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1000</value>
</enumeratedValue>
<enumeratedValue>
<name>PG_EINT6</name>
<value>0b1110</value>
</enumeratedValue>
<enumeratedValue>
<name>Output</name>
<value>0b0001</value>
</enumeratedValue>
<enumeratedValue>
<name>TWI2_SCK</name>
<value>0b0011</value>
</enumeratedValue>
<enumeratedValue>
<name>PWM1</name>
<value>0b0101</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0111</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1001</value>
</enumeratedValue>
<enumeratedValue>
<name>IO_Disable</name>
<value>0b1111</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PG5_SELECT</name>
<description>PG5 Select</description>
<bitRange>[23:20]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Input</name>
<value>0b0000</value>
</enumeratedValue>
<enumeratedValue>
<name>SDC1_D3</name>
<value>0b0010</value>
</enumeratedValue>
<enumeratedValue>
<name>RGMII_TXD1_RMII_TXD1</name>
<value>0b0100</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0110</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1000</value>
</enumeratedValue>
<enumeratedValue>
<name>PG_EINT5</name>
<value>0b1110</value>
</enumeratedValue>
<enumeratedValue>
<name>Output</name>
<value>0b0001</value>
</enumeratedValue>
<enumeratedValue>
<name>UART5_RX</name>
<value>0b0011</value>
</enumeratedValue>
<enumeratedValue>
<name>PWM4</name>
<value>0b0101</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0111</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1001</value>
</enumeratedValue>
<enumeratedValue>
<name>IO_Disable</name>
<value>0b1111</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PG4_SELECT</name>
<description>PG4 Select</description>
<bitRange>[19:16]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Input</name>
<value>0b0000</value>
</enumeratedValue>
<enumeratedValue>
<name>SDC1_D2</name>
<value>0b0010</value>
</enumeratedValue>
<enumeratedValue>
<name>RGMII_TXD0_RMII_TXD0</name>
<value>0b0100</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0110</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1000</value>
</enumeratedValue>
<enumeratedValue>
<name>PG_EINT4</name>
<value>0b1110</value>
</enumeratedValue>
<enumeratedValue>
<name>Output</name>
<value>0b0001</value>
</enumeratedValue>
<enumeratedValue>
<name>UART5_TX</name>
<value>0b0011</value>
</enumeratedValue>
<enumeratedValue>
<name>PWM5</name>
<value>0b0101</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0111</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1001</value>
</enumeratedValue>
<enumeratedValue>
<name>IO_Disable</name>
<value>0b1111</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PG3_SELECT</name>
<description>PG3 Select</description>
<bitRange>[15:12]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Input</name>
<value>0b0000</value>
</enumeratedValue>
<enumeratedValue>
<name>SDC1_D1</name>
<value>0b0010</value>
</enumeratedValue>
<enumeratedValue>
<name>RGMII_TXCK_RMII_TXCK</name>
<value>0b0100</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0110</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1000</value>
</enumeratedValue>
<enumeratedValue>
<name>PG_EINT3</name>
<value>0b1110</value>
</enumeratedValue>
<enumeratedValue>
<name>Output</name>
<value>0b0001</value>
</enumeratedValue>
<enumeratedValue>
<name>UART3_CTS</name>
<value>0b0011</value>
</enumeratedValue>
<enumeratedValue>
<name>UART4_RX</name>
<value>0b0101</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0111</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1001</value>
</enumeratedValue>
<enumeratedValue>
<name>IO_Disable</name>
<value>0b1111</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PG2_SELECT</name>
<description>PG2 Select</description>
<bitRange>[11:8]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Input</name>
<value>0b0000</value>
</enumeratedValue>
<enumeratedValue>
<name>SDC1_D0</name>
<value>0b0010</value>
</enumeratedValue>
<enumeratedValue>
<name>RGMII_RXD1_RMII_RXD1</name>
<value>0b0100</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0110</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1000</value>
</enumeratedValue>
<enumeratedValue>
<name>PG_EINT2</name>
<value>0b1110</value>
</enumeratedValue>
<enumeratedValue>
<name>Output</name>
<value>0b0001</value>
</enumeratedValue>
<enumeratedValue>
<name>UART3_RTS</name>
<value>0b0011</value>
</enumeratedValue>
<enumeratedValue>
<name>UART4_TX</name>
<value>0b0101</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0111</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1001</value>
</enumeratedValue>
<enumeratedValue>
<name>IO_Disable</name>
<value>0b1111</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PG1_SELECT</name>
<description>PG1 Select</description>
<bitRange>[7:4]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Input</name>
<value>0b0000</value>
</enumeratedValue>
<enumeratedValue>
<name>SDC1_CMD</name>
<value>0b0010</value>
</enumeratedValue>
<enumeratedValue>
<name>RGMII_RXD0_RMII_RXD0</name>
<value>0b0100</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0110</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1000</value>
</enumeratedValue>
<enumeratedValue>
<name>PG_EINT1</name>
<value>0b1110</value>
</enumeratedValue>
<enumeratedValue>
<name>Output</name>
<value>0b0001</value>
</enumeratedValue>
<enumeratedValue>
<name>UART3_RX</name>
<value>0b0011</value>
</enumeratedValue>
<enumeratedValue>
<name>PWM6</name>
<value>0b0101</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0111</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1001</value>
</enumeratedValue>
<enumeratedValue>
<name>IO_Disable</name>
<value>0b1111</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PG0_SELECT</name>
<description>PG0 Select</description>
<bitRange>[3:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Input</name>
<value>0b0000</value>
</enumeratedValue>
<enumeratedValue>
<name>SDC1_CLK</name>
<value>0b0010</value>
</enumeratedValue>
<enumeratedValue>
<name>RGMII_RXCTRL_RMII_CRS_DV</name>
<value>0b0100</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0110</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1000</value>
</enumeratedValue>
<enumeratedValue>
<name>PG_EINT0</name>
<value>0b1110</value>
</enumeratedValue>
<enumeratedValue>
<name>Output</name>
<value>0b0001</value>
</enumeratedValue>
<enumeratedValue>
<name>UART3_TX</name>
<value>0b0011</value>
</enumeratedValue>
<enumeratedValue>
<name>PWM7</name>
<value>0b0101</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0111</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1001</value>
</enumeratedValue>
<enumeratedValue>
<name>IO_Disable</name>
<value>0b1111</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>pg_cfg1</name>
<description>PG Configure Register 1</description>
<addressOffset>0x0124</addressOffset>
<fields>
<field>
<name>PG15_SELECT</name>
<description>PG15 Select</description>
<bitRange>[31:28]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Input</name>
<value>0b0000</value>
</enumeratedValue>
<enumeratedValue>
<name>I2S1_DOUT0</name>
<value>0b0010</value>
</enumeratedValue>
<enumeratedValue>
<name>MDIO</name>
<value>0b0100</value>
</enumeratedValue>
<enumeratedValue>
<name>SPI0_HOLD</name>
<value>0b0110</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1000</value>
</enumeratedValue>
<enumeratedValue>
<name>PG_EINT15</name>
<value>0b1110</value>
</enumeratedValue>
<enumeratedValue>
<name>Output</name>
<value>0b0001</value>
</enumeratedValue>
<enumeratedValue>
<name>TWI2_SDA</name>
<value>0b0011</value>
</enumeratedValue>
<enumeratedValue>
<name>I2S1_DIN1</name>
<value>0b0101</value>
</enumeratedValue>
<enumeratedValue>
<name>UART1_CTS</name>
<value>0b0111</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1001</value>
</enumeratedValue>
<enumeratedValue>
<name>IO_Disable</name>
<value>0b1111</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PG14_SELECT</name>
<description>PG14 Select</description>
<bitRange>[27:24]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Input</name>
<value>0b0000</value>
</enumeratedValue>
<enumeratedValue>
<name>I2S1_DIN0</name>
<value>0b0010</value>
</enumeratedValue>
<enumeratedValue>
<name>MDC</name>
<value>0b0100</value>
</enumeratedValue>
<enumeratedValue>
<name>SPI0_WP</name>
<value>0b0110</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1000</value>
</enumeratedValue>
<enumeratedValue>
<name>PG_EINT14</name>
<value>0b1110</value>
</enumeratedValue>
<enumeratedValue>
<name>Output</name>
<value>0b0001</value>
</enumeratedValue>
<enumeratedValue>
<name>TWI2_SCK</name>
<value>0b0011</value>
</enumeratedValue>
<enumeratedValue>
<name>I2S1_DOUT1</name>
<value>0b0101</value>
</enumeratedValue>
<enumeratedValue>
<name>UART1_RTS</name>
<value>0b0111</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1001</value>
</enumeratedValue>
<enumeratedValue>
<name>IO_Disable</name>
<value>0b1111</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PG13_SELECT</name>
<description>PG13 Select</description>
<bitRange>[23:20]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Input</name>
<value>0b0000</value>
</enumeratedValue>
<enumeratedValue>
<name>I2S1_BCLK</name>
<value>0b0010</value>
</enumeratedValue>
<enumeratedValue>
<name>RGMII_CLKIN_RMII_RXER</name>
<value>0b0100</value>
</enumeratedValue>
<enumeratedValue>
<name>LEDC_DO</name>
<value>0b0110</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1000</value>
</enumeratedValue>
<enumeratedValue>
<name>PG_EINT13</name>
<value>0b1110</value>
</enumeratedValue>
<enumeratedValue>
<name>Output</name>
<value>0b0001</value>
</enumeratedValue>
<enumeratedValue>
<name>TWI0_SDA</name>
<value>0b0011</value>
</enumeratedValue>
<enumeratedValue>
<name>PWM2</name>
<value>0b0101</value>
</enumeratedValue>
<enumeratedValue>
<name>UART1_RX</name>
<value>0b0111</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1001</value>
</enumeratedValue>
<enumeratedValue>
<name>IO_Disable</name>
<value>0b1111</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PG12_SELECT</name>
<description>PG12 Select</description>
<bitRange>[19:16]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Input</name>
<value>0b0000</value>
</enumeratedValue>
<enumeratedValue>
<name>Output</name>
<value>0b0001</value>
</enumeratedValue>
<enumeratedValue>
<name>I2S1_LRCK</name>
<value>0b0010</value>
</enumeratedValue>
<enumeratedValue>
<name>TWI0_SCK</name>
<value>0b0011</value>
</enumeratedValue>
<enumeratedValue>
<name>RGMII_TXCTRL_RMII_TXEN</name>
<value>0b0100</value>
</enumeratedValue>
<enumeratedValue>
<name>CLK_FANOUT2</name>
<value>0b0101</value>
</enumeratedValue>
<enumeratedValue>
<name>PWM0</name>
<value>0b0110</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1000</value>
</enumeratedValue>
<enumeratedValue>
<name>PG_EINT12</name>
<value>0b1110</value>
</enumeratedValue>
<enumeratedValue>
<name>UART1_TX</name>
<value>0b0111</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1001</value>
</enumeratedValue>
<enumeratedValue>
<name>IO_Disable</name>
<value>0b1111</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PG11_SELECT</name>
<description>PG11 Select</description>
<bitRange>[15:12]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Input</name>
<value>0b0000</value>
</enumeratedValue>
<enumeratedValue>
<name>I2S1_MCLK</name>
<value>0b0010</value>
</enumeratedValue>
<enumeratedValue>
<name>EPHY_25M</name>
<value>0b0100</value>
</enumeratedValue>
<enumeratedValue>
<name>TCON_TRIG</name>
<value>0b0110</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1000</value>
</enumeratedValue>
<enumeratedValue>
<name>PG_EINT11</name>
<value>0b1110</value>
</enumeratedValue>
<enumeratedValue>
<name>Output</name>
<value>0b0001</value>
</enumeratedValue>
<enumeratedValue>
<name>TWI3_SDA</name>
<value>0b0011</value>
</enumeratedValue>
<enumeratedValue>
<name>CLK_FANOUT1</name>
<value>0b0101</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0111</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1001</value>
</enumeratedValue>
<enumeratedValue>
<name>IO_Disable</name>
<value>0b1111</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PG10_SELECT</name>
<description>PG10 Select</description>
<bitRange>[11:8]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Input</name>
<value>0b0000</value>
</enumeratedValue>
<enumeratedValue>
<name>PWM3</name>
<value>0b0010</value>
</enumeratedValue>
<enumeratedValue>
<name>RGMII_RXCK</name>
<value>0b0100</value>
</enumeratedValue>
<enumeratedValue>
<name>IR_RX</name>
<value>0b0110</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1000</value>
</enumeratedValue>
<enumeratedValue>
<name>PG_EINT10</name>
<value>0b1110</value>
</enumeratedValue>
<enumeratedValue>
<name>Output</name>
<value>0b0001</value>
</enumeratedValue>
<enumeratedValue>
<name>TWI3_SCK</name>
<value>0b0011</value>
</enumeratedValue>
<enumeratedValue>
<name>CLK_FANOUT0</name>
<value>0b0101</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0111</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1001</value>
</enumeratedValue>
<enumeratedValue>
<name>IO_Disable</name>
<value>0b1111</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PG9_SELECT</name>
<description>PG9 Select</description>
<bitRange>[7:4]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Input</name>
<value>0b0000</value>
</enumeratedValue>
<enumeratedValue>
<name>UART1_CTS</name>
<value>0b0010</value>
</enumeratedValue>
<enumeratedValue>
<name>RGMII_RXD3</name>
<value>0b0100</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0110</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1000</value>
</enumeratedValue>
<enumeratedValue>
<name>PG_EINT9</name>
<value>0b1110</value>
</enumeratedValue>
<enumeratedValue>
<name>Output</name>
<value>0b0001</value>
</enumeratedValue>
<enumeratedValue>
<name>TWI1_SDA</name>
<value>0b0011</value>
</enumeratedValue>
<enumeratedValue>
<name>UART3_RX</name>
<value>0b0101</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0111</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1001</value>
</enumeratedValue>
<enumeratedValue>
<name>IO_Disable</name>
<value>0b1111</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PG8_SELECT</name>
<description>PG8 Select</description>
<bitRange>[3:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Input</name>
<value>0b0000</value>
</enumeratedValue>
<enumeratedValue>
<name>UART1_RTS</name>
<value>0b0010</value>
</enumeratedValue>
<enumeratedValue>
<name>RGMII_RXD2</name>
<value>0b0100</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0110</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1000</value>
</enumeratedValue>
<enumeratedValue>
<name>PG_EINT8</name>
<value>0b1110</value>
</enumeratedValue>
<enumeratedValue>
<name>Output</name>
<value>0b0001</value>
</enumeratedValue>
<enumeratedValue>
<name>TWI1_SCK</name>
<value>0b0011</value>
</enumeratedValue>
<enumeratedValue>
<name>UART3_TX</name>
<value>0b0101</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b0111</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1001</value>
</enumeratedValue>
<enumeratedValue>
<name>IO_Disable</name>
<value>0b1111</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>pg_cfg2</name>
<description>PG Configure Register 2</description>
<addressOffset>0x0128</addressOffset>
<fields>
<field>
<name>PG18_SELECT</name>
<description>PG18 Select</description>
<bitRange>[11:8]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Input</name>
<value>0b0000</value>
</enumeratedValue>
<enumeratedValue>
<name>UART2_RX</name>
<value>0b0010</value>
</enumeratedValue>
<enumeratedValue>
<name>PWM6</name>
<value>0b0100</value>
</enumeratedValue>
<enumeratedValue>
<name>OWA_OUT</name>
<value>0b0110</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1000</value>
</enumeratedValue>
<enumeratedValue>
<name>PG_EINT18</name>
<value>0b1110</value>
</enumeratedValue>
<enumeratedValue>
<name>Output</name>
<value>0b0001</value>
</enumeratedValue>
<enumeratedValue>
<name>TWI3_SDA</name>
<value>0b0011</value>
</enumeratedValue>
<enumeratedValue>
<name>CLK_FANOUT1</name>
<value>0b0101</value>
</enumeratedValue>
<enumeratedValue>
<name>UART0_RX</name>
<value>0b0111</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1001</value>
</enumeratedValue>
<enumeratedValue>
<name>IO_Disable</name>
<value>0b1111</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PG17_SELECT</name>
<description>PG17 Select</description>
<bitRange>[7:4]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Input</name>
<value>0b0000</value>
</enumeratedValue>
<enumeratedValue>
<name>UART2_TX</name>
<value>0b0010</value>
</enumeratedValue>
<enumeratedValue>
<name>PWM7</name>
<value>0b0100</value>
</enumeratedValue>
<enumeratedValue>
<name>IR_TX</name>
<value>0b0110</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1000</value>
</enumeratedValue>
<enumeratedValue>
<name>PG_EINT17</name>
<value>0b1110</value>
</enumeratedValue>
<enumeratedValue>
<name>Output</name>
<value>0b0001</value>
</enumeratedValue>
<enumeratedValue>
<name>TWI3_SCK</name>
<value>0b0011</value>
</enumeratedValue>
<enumeratedValue>
<name>CLK_FANOUT0</name>
<value>0b0101</value>
</enumeratedValue>
<enumeratedValue>
<name>UART0_TX</name>
<value>0b0111</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1001</value>
</enumeratedValue>
<enumeratedValue>
<name>IO_Disable</name>
<value>0b1111</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PG16_SELECT</name>
<description>PG16 Select</description>
<bitRange>[3:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Input</name>
<value>0b0000</value>
</enumeratedValue>
<enumeratedValue>
<name>IR_RX</name>
<value>0b0010</value>
</enumeratedValue>
<enumeratedValue>
<name>PWM5</name>
<value>0b0100</value>
</enumeratedValue>
<enumeratedValue>
<name>OWA_IN</name>
<value>0b0110</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1000</value>
</enumeratedValue>
<enumeratedValue>
<name>PG_EINT16</name>
<value>0b1110</value>
</enumeratedValue>
<enumeratedValue>
<name>Output</name>
<value>0b0001</value>
</enumeratedValue>
<enumeratedValue>
<name>TCON_TRIG</name>
<value>0b0011</value>
</enumeratedValue>
<enumeratedValue>
<name>CLK_FANOUT2</name>
<value>0b0101</value>
</enumeratedValue>
<enumeratedValue>
<name>LEDC_DO</name>
<value>0b0111</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b1001</value>
</enumeratedValue>
<enumeratedValue>
<name>IO_Disable</name>
<value>0b1111</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>pg_dat</name>
<description>PG Data Register</description>
<addressOffset>0x0130</addressOffset>
<fields>
<field>
<name>PG_DAT</name>
<description>PG Data</description>
<bitRange>[18:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>pg_drv0</name>
<description>PG Multi_Driving Register 0</description>
<addressOffset>0x0134</addressOffset>
<fields>
<field>
<dim>8</dim>
<dimIncrement>4</dimIncrement>
<name>PG%s_DRV</name>
<description>PG Multi_Driving Select</description>
<bitRange>[1:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>L0</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>L1</name>
<value>1</value>
</enumeratedValue>
<enumeratedValue>
<name>L2</name>
<value>2</value>
</enumeratedValue>
<enumeratedValue>
<name>L3</name>
<value>3</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>pg_drv1</name>
<description>PG Multi_Driving Register 1</description>
<addressOffset>0x0138</addressOffset>
<fields>
<field>
<dim>8</dim>
<dimIncrement>4</dimIncrement>
<dimIndex>8-15</dimIndex>
<name>PG%s_DRV</name>
<description>PG Multi_Driving Select</description>
<bitRange>[1:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>L0</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>L1</name>
<value>1</value>
</enumeratedValue>
<enumeratedValue>
<name>L2</name>
<value>2</value>
</enumeratedValue>
<enumeratedValue>
<name>L3</name>
<value>3</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>pg_drv2</name>
<description>PG Multi_Driving Register 2</description>
<addressOffset>0x013C</addressOffset>
<fields>
<field>
<dim>3</dim>
<dimIncrement>4</dimIncrement>
<dimIndex>16-18</dimIndex>
<name>PG%s_DRV</name>
<description>PG Multi_Driving Select</description>
<bitRange>[1:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>L0</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>L1</name>
<value>1</value>
</enumeratedValue>
<enumeratedValue>
<name>L2</name>
<value>2</value>
</enumeratedValue>
<enumeratedValue>
<name>L3</name>
<value>3</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>pg_pull0</name>
<description>PG Pull Register 0</description>
<addressOffset>0x0144</addressOffset>
<fields>
<field>
<dim>16</dim>
<dimIncrement>2</dimIncrement>
<name>PG%s_PULL</name>
<description>PG Pull_up/down Select</description>
<bitRange>[1:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>pull_disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>pull_up</name>
<value>1</value>
</enumeratedValue>
<enumeratedValue>
<name>pull_down</name>
<value>2</value>
</enumeratedValue>
<enumeratedValue>
<name>reserved</name>
<value>3</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>pg_pull1</name>
<description>PG Pull Register 1</description>
<addressOffset>0x0148</addressOffset>
<fields>
<field>
<dim>3</dim>
<dimIncrement>2</dimIncrement>
<dimIndex>16-18</dimIndex>
<name>PG%s_PULL</name>
<description>PG Pull_up/down Select</description>
<bitRange>[1:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>pull_disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>pull_up</name>
<value>1</value>
</enumeratedValue>
<enumeratedValue>
<name>pull_down</name>
<value>2</value>
</enumeratedValue>
<enumeratedValue>
<name>reserved</name>
<value>3</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>pb_eint_cfg0</name>
<description>PB External Interrupt Configure Register 0</description>
<addressOffset>0x0220</addressOffset>
<fields>
<field>
<dim>8</dim>
<dimIncrement>4</dimIncrement>
<name>EINT%s_CFG</name>
<description>External INT Mode</description>
<bitRange>[3:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>positive_edge</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>negative_edge</name>
<value>1</value>
</enumeratedValue>
<enumeratedValue>
<name>high_level</name>
<value>2</value>
</enumeratedValue>
<enumeratedValue>
<name>low_level</name>
<value>3</value>
</enumeratedValue>
<enumeratedValue>
<name>double_edge</name>
<value>4</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>pb_eint_cfg1</name>
<description>PB External Interrupt Configure Register 1</description>
<addressOffset>0x0224</addressOffset>
<fields>
<field>
<dim>5</dim>
<dimIncrement>4</dimIncrement>
<dimIndex>8-12</dimIndex>
<name>EINT%s_CFG</name>
<description>External INT Mode</description>
<bitRange>[3:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>positive_edge</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>negative_edge</name>
<value>1</value>
</enumeratedValue>
<enumeratedValue>
<name>high_level</name>
<value>2</value>
</enumeratedValue>
<enumeratedValue>
<name>low_level</name>
<value>3</value>
</enumeratedValue>
<enumeratedValue>
<name>double_edge</name>
<value>4</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>pb_eint_ctl</name>
<description>PB External Interrupt Control Register</description>
<addressOffset>0x0230</addressOffset>
<fields>
<field>
<dim>12</dim>
<dimIncrement>1</dimIncrement>
<name>EINT%s_CTL</name>
<description>External INT Enable</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>pb_eint_status</name>
<description>PB External Interrupt Status Register</description>
<addressOffset>0x0234</addressOffset>
<fields>
<field>
<dim>12</dim>
<dimIncrement>1</dimIncrement>
<name>EINT%s_STATUS</name>
<description>External INT Pending Bit</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>no_pending</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>pending</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>pb_eint_deb</name>
<description>PB External Interrupt Debounce Register</description>
<addressOffset>0x0238</addressOffset>
<fields>
<field>
<name>DEB_CLK_PRE_SCALE</name>
<description>Debounce Clock Pre_scale n</description>
<bitRange>[6:4]</bitRange>
</field>
<field>
<name>PIO_INT_CLK_SELECT</name>
<description>PIO Interrupt Clock Select</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>LOSC_32KHz</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>HOSC_24MHz</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>pc_eint_cfg0</name>
<description>PC External Interrupt Configure Register 0</description>
<addressOffset>0x0240</addressOffset>
<fields>
<field>
<dim>8</dim>
<dimIncrement>4</dimIncrement>
<name>EINT%s_CFG</name>
<description>External INT Mode</description>
<bitRange>[3:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>positive_edge</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>negative_edge</name>
<value>1</value>
</enumeratedValue>
<enumeratedValue>
<name>high_level</name>
<value>2</value>
</enumeratedValue>
<enumeratedValue>
<name>low_level</name>
<value>3</value>
</enumeratedValue>
<enumeratedValue>
<name>double_edge</name>
<value>4</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>pc_eint_ctl</name>
<description>PC External Interrupt Control Register</description>
<addressOffset>0x0250</addressOffset>
<fields>
<field>
<dim>8</dim>
<dimIncrement>1</dimIncrement>
<name>EINT%s_CTL</name>
<description>External INT Enable</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>pc_eint_status</name>
<description>PC External Interrupt Status Register</description>
<addressOffset>0x0254</addressOffset>
<fields>
<field>
<dim>8</dim>
<dimIncrement>1</dimIncrement>
<name>EINT%s_STATUS</name>
<description>External INT Pending Bit</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>no_pending</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>pending</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>pc_eint_deb</name>
<description>PC External Interrupt Debounce Register</description>
<addressOffset>0x0258</addressOffset>
<fields>
<field>
<name>DEB_CLK_PRE_SCALE</name>
<description>Debounce Clock Pre_scale n</description>
<bitRange>[6:4]</bitRange>
</field>
<field>
<name>PIO_INT_CLK_SELECT</name>
<description>PIO Interrupt Clock Select</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>LOSC_32KHz</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>HOSC_24MHz</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>pd_eint_cfg0</name>
<description>PD External Interrupt Configure Register 0</description>
<addressOffset>0x0260</addressOffset>
<fields>
<field>
<dim>8</dim>
<dimIncrement>4</dimIncrement>
<name>EINT%s_CFG</name>
<description>External INT Mode</description>
<bitRange>[3:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>positive_edge</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>negative_edge</name>
<value>1</value>
</enumeratedValue>
<enumeratedValue>
<name>high_level</name>
<value>2</value>
</enumeratedValue>
<enumeratedValue>
<name>low_level</name>
<value>3</value>
</enumeratedValue>
<enumeratedValue>
<name>double_edge</name>
<value>4</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>pd_eint_cfg1</name>
<description>PD External Interrupt Configure Register 1</description>
<addressOffset>0x0264</addressOffset>
<fields>
<field>
<dim>8</dim>
<dimIncrement>4</dimIncrement>
<dimIndex>8-15</dimIndex>
<name>EINT%s_CFG</name>
<description>External INT Mode</description>
<bitRange>[3:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>positive_edge</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>negative_edge</name>
<value>1</value>
</enumeratedValue>
<enumeratedValue>
<name>high_level</name>
<value>2</value>
</enumeratedValue>
<enumeratedValue>
<name>low_level</name>
<value>3</value>
</enumeratedValue>
<enumeratedValue>
<name>double_edge</name>
<value>4</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>pd_eint_cfg2</name>
<description>PD External Interrupt Configure Register 2</description>
<addressOffset>0x0268</addressOffset>
<fields>
<field>
<dim>7</dim>
<dimIncrement>4</dimIncrement>
<dimIndex>16-22</dimIndex>
<name>EINT%s_CFG</name>
<description>External INT Mode</description>
<bitRange>[3:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>positive_edge</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>negative_edge</name>
<value>1</value>
</enumeratedValue>
<enumeratedValue>
<name>high_level</name>
<value>2</value>
</enumeratedValue>
<enumeratedValue>
<name>low_level</name>
<value>3</value>
</enumeratedValue>
<enumeratedValue>
<name>double_edge</name>
<value>4</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>pd_eint_ctl</name>
<description>PD External Interrupt Control Register</description>
<addressOffset>0x0270</addressOffset>
<fields>
<field>
<dim>23</dim>
<dimIncrement>1</dimIncrement>
<name>EINT%s_CTL</name>
<description>External INT Enable</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>pd_eint_status</name>
<description>PD External Interrupt Status Register</description>
<addressOffset>0x0274</addressOffset>
<fields>
<field>
<dim>23</dim>
<dimIncrement>1</dimIncrement>
<name>EINT%s_STATUS</name>
<description>External INT Pending Bit</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>no_pending</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>pending</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>pd_eint_deb</name>
<description>PD External Interrupt Debounce Register</description>
<addressOffset>0x0278</addressOffset>
<fields>
<field>
<name>DEB_CLK_PRE_SCALE</name>
<description>Debounce Clock Pre_scale n</description>
<bitRange>[6:4]</bitRange>
</field>
<field>
<name>PIO_INT_CLK_SELECT</name>
<description>PIO Interrupt Clock Select</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>LOSC_32KHz</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>HOSC_24MHz</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>pe_eint_cfg0</name>
<description>PE External Interrupt Configure Register 0</description>
<addressOffset>0x0280</addressOffset>
<fields>
<field>
<dim>8</dim>
<dimIncrement>4</dimIncrement>
<name>EINT%s_CFG</name>
<description>External INT Mode</description>
<bitRange>[3:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>positive_edge</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>negative_edge</name>
<value>1</value>
</enumeratedValue>
<enumeratedValue>
<name>high_level</name>
<value>2</value>
</enumeratedValue>
<enumeratedValue>
<name>low_level</name>
<value>3</value>
</enumeratedValue>
<enumeratedValue>
<name>double_edge</name>
<value>4</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>pe_eint_cfg1</name>
<description>PE External Interrupt Configure Register 1</description>
<addressOffset>0x0284</addressOffset>
<fields>
<field>
<dim>8</dim>
<dimIncrement>4</dimIncrement>
<dimIndex>8-15</dimIndex>
<name>EINT%s_CFG</name>
<description>External INT Mode</description>
<bitRange>[3:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>positive_edge</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>negative_edge</name>
<value>1</value>
</enumeratedValue>
<enumeratedValue>
<name>high_level</name>
<value>2</value>
</enumeratedValue>
<enumeratedValue>
<name>low_level</name>
<value>3</value>
</enumeratedValue>
<enumeratedValue>
<name>double_edge</name>
<value>4</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>pe_eint_cfg2</name>
<description>PE External Interrupt Configure Register 2</description>
<addressOffset>0x0288</addressOffset>
<fields>
<field>
<dim>2</dim>
<dimIncrement>4</dimIncrement>
<dimIndex>16-17</dimIndex>
<name>EINT%s_CFG</name>
<description>External INT Mode</description>
<bitRange>[3:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>positive_edge</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>negative_edge</name>
<value>1</value>
</enumeratedValue>
<enumeratedValue>
<name>high_level</name>
<value>2</value>
</enumeratedValue>
<enumeratedValue>
<name>low_level</name>
<value>3</value>
</enumeratedValue>
<enumeratedValue>
<name>double_edge</name>
<value>4</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>pe_eint_ctl</name>
<description>PE External Interrupt Control Register</description>
<addressOffset>0x0290</addressOffset>
<fields>
<field>
<dim>18</dim>
<dimIncrement>1</dimIncrement>
<name>EINT%s_CTL</name>
<description>External INT Enable</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>pe_eint_status</name>
<description>PE External Interrupt Status Register</description>
<addressOffset>0x0294</addressOffset>
<fields>
<field>
<dim>18</dim>
<dimIncrement>1</dimIncrement>
<name>EINT%s_STATUS</name>
<description>External INT Pending Bit</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>no_pending</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>pending</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>pe_eint_deb</name>
<description>PE External Interrupt Debounce Register</description>
<addressOffset>0x0298</addressOffset>
<fields>
<field>
<name>DEB_CLK_PRE_SCALE</name>
<description>Debounce Clock Pre_scale n</description>
<bitRange>[6:4]</bitRange>
</field>
<field>
<name>PIO_INT_CLK_SELECT</name>
<description>PIO Interrupt Clock Select</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>LOSC_32KHz</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>HOSC_24MHz</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>pf_eint_cfg0</name>
<description>PF External Interrupt Configure Register 0</description>
<addressOffset>0x02A0</addressOffset>
<fields>
<field>
<dim>7</dim>
<dimIncrement>4</dimIncrement>
<name>EINT%s_CFG</name>
<description>External INT Mode</description>
<bitRange>[3:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>positive_edge</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>negative_edge</name>
<value>1</value>
</enumeratedValue>
<enumeratedValue>
<name>high_level</name>
<value>2</value>
</enumeratedValue>
<enumeratedValue>
<name>low_level</name>
<value>3</value>
</enumeratedValue>
<enumeratedValue>
<name>double_edge</name>
<value>4</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>pf_eint_ctl</name>
<description>PF External Interrupt Control Register</description>
<addressOffset>0x02B0</addressOffset>
<fields>
<field>
<dim>7</dim>
<dimIncrement>1</dimIncrement>
<name>EINT%s_CTL</name>
<description>External INT Enable</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>pf_eint_status</name>
<description>PF External Interrupt Status Register</description>
<addressOffset>0x02B4</addressOffset>
<fields>
<field>
<dim>7</dim>
<dimIncrement>1</dimIncrement>
<name>EINT%s_STATUS</name>
<description>External INT Pending Bit</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>no_pending</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>pending</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>pf_eint_deb</name>
<description>PF External Interrupt Debounce Register</description>
<addressOffset>0x02B8</addressOffset>
<fields>
<field>
<name>DEB_CLK_PRE_SCALE</name>
<description>Debounce Clock Pre_scale n</description>
<bitRange>[6:4]</bitRange>
</field>
<field>
<name>PIO_INT_CLK_SELECT</name>
<description>PIO Interrupt Clock Select</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>LOSC_32KHz</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>HOSC_24MHz</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>pg_eint_cfg0</name>
<description>PG External Interrupt Configure Register 0</description>
<addressOffset>0x02C0</addressOffset>
<fields>
<field>
<dim>8</dim>
<dimIncrement>4</dimIncrement>
<name>EINT%s_CFG</name>
<description>External INT Mode</description>
<bitRange>[3:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>positive_edge</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>negative_edge</name>
<value>1</value>
</enumeratedValue>
<enumeratedValue>
<name>high_level</name>
<value>2</value>
</enumeratedValue>
<enumeratedValue>
<name>low_level</name>
<value>3</value>
</enumeratedValue>
<enumeratedValue>
<name>double_edge</name>
<value>4</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>pg_eint_cfg1</name>
<description>PG External Interrupt Configure Register 1</description>
<addressOffset>0x02C4</addressOffset>
<fields>
<field>
<dim>8</dim>
<dimIncrement>4</dimIncrement>
<dimIndex>8-15</dimIndex>
<name>EINT%s_CFG</name>
<description>External INT Mode</description>
<bitRange>[3:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>positive_edge</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>negative_edge</name>
<value>1</value>
</enumeratedValue>
<enumeratedValue>
<name>high_level</name>
<value>2</value>
</enumeratedValue>
<enumeratedValue>
<name>low_level</name>
<value>3</value>
</enumeratedValue>
<enumeratedValue>
<name>double_edge</name>
<value>4</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>pg_eint_cfg2</name>
<description>PG External Interrupt Configure Register 2</description>
<addressOffset>0x02C8</addressOffset>
<fields>
<field>
<dim>3</dim>
<dimIncrement>4</dimIncrement>
<dimIndex>16-18</dimIndex>
<name>EINT%s_CFG</name>
<description>External INT Mode</description>
<bitRange>[3:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>positive_edge</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>negative_edge</name>
<value>1</value>
</enumeratedValue>
<enumeratedValue>
<name>high_level</name>
<value>2</value>
</enumeratedValue>
<enumeratedValue>
<name>low_level</name>
<value>3</value>
</enumeratedValue>
<enumeratedValue>
<name>double_edge</name>
<value>4</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>pg_eint_ctl</name>
<description>PG External Interrupt Control Register</description>
<addressOffset>0x02D0</addressOffset>
<fields>
<field>
<dim>19</dim>
<dimIncrement>1</dimIncrement>
<name>EINT%s_CTL</name>
<description>External INT Enable</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>pg_eint_status</name>
<description>PG External Interrupt Status Register</description>
<addressOffset>0x02D4</addressOffset>
<fields>
<field>
<dim>18</dim>
<dimIncrement>1</dimIncrement>
<name>EINT%s_STATUS</name>
<description>External INT Pending Bit</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>no_pending</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>pending</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>pg_eint_deb</name>
<description>PG External Interrupt Debounce Register</description>
<addressOffset>0x02D8</addressOffset>
<fields>
<field>
<name>DEB_CLK_PRE_SCALE</name>
<description>Debounce Clock Pre_scale n</description>
<bitRange>[6:4]</bitRange>
</field>
<field>
<name>PIO_INT_CLK_SELECT</name>
<description>PIO Interrupt Clock Select</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>LOSC_32KHz</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>HOSC_24MHz</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>pio_pow_mod_sel</name>
<description>PIO Group Withstand Voltage Mode Select Register</description>
<addressOffset>0x0340</addressOffset>
<fields>
<field>
<name>VCC_IO_PWR_MOD_SEL</name>
<description>VCC_IO POWER MODE Select</description>
<bitRange>[12:12]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>V33</name>
<description>3.3 V</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>V18</name>
<description>1.8 V</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<dim>5</dim>
<dimIncrement>1</dimIncrement>
<dimIndex>C,D,E,F,G</dimIndex>
<name>P%s_PWR_MOD_SEL</name>
<description>PX_POWER POWER MODE Select</description>
<bitRange>[2:2]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>V33</name>
<description>3.3 V</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>V18</name>
<description>1.8 V</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>pio_pow_ms_ctl</name>
<description>PIO Group Withstand Voltage Mode Select Control Register</description>
<addressOffset>0x0344</addressOffset>
<fields>
<field>
<name>VCCIO_WS_VOL_MOD_SEL</name>
<description>VCC_IO Withstand Voltage Mode Select Control</description>
<bitRange>[12:12]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>enable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>disable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<dim>5</dim>
<dimIncrement>1</dimIncrement>
<dimIndex>C,D,E,F,G</dimIndex>
<name>VCC_P%s_WS_VOL_MOD_SEL</name>
<description>VCC_PX Withstand Voltage Mode Select Control</description>
<bitRange>[2:2]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>enable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>disable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>pio_pow_val</name>
<description>PIO Group Power Value Register</description>
<addressOffset>0x0348</addressOffset>
<access>read-only</access>
<fields>
<field>
<name>VCCIO_PWS_VAL</name>
<description>VCC_IO Power Value</description>
<bitRange>[12:12]</bitRange>
</field>
<field>
<dim>5</dim>
<dimIncrement>1</dimIncrement>
<dimIndex>C,D,E,F,G</dimIndex>
<name>P%s_PWR_VAL</name>
<description>PX_Port Power Value</description>
<bitRange>[2:2]</bitRange>
</field>
</fields>
</register>
<register>
<name>pio_pow_vol_sel_ctl</name>
<description>PIO Group Power Voltage Select Control Register</description>
<addressOffset>0x0350</addressOffset>
<fields>
<field>
<name>VCC_PF_PWR_VOL_SEL</name>
<description>VCC_PF Power Voltage Select Control</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>V18</name>
<description>1.8V</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>V33</name>
<description>3.3V</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>GPADC</name>
<description>General Purpose ADC</description>
<groupName>Interfaces</groupName>
<baseAddress>0x02009000</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x400</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>GPADC</name>
<value>73</value>
</interrupt>
<registers>
<register>
<name>GP_SR_CON</name>
<description>GPADC Sample Rate Configure Register</description>
<addressOffset>0x0000</addressOffset>
</register>
<register>
<name>GP_CTRL</name>
<description>GPADC Control Register</description>
<addressOffset>0x0004</addressOffset>
</register>
<register>
<name>GP_CS_EN</name>
<description>GPADC Compare and Select Enable Register</description>
<addressOffset>0x0008</addressOffset>
</register>
<register>
<name>GP_FIFO_INTC</name>
<description>GPADC FIFO Interrupt Control Register</description>
<addressOffset>0x000C</addressOffset>
</register>
<register>
<name>GP_FIFO_INTS</name>
<description>GPADC FIFO Interrupt Status Register</description>
<addressOffset>0x0010</addressOffset>
</register>
<register>
<name>GP_FIFO_DATA</name>
<description>GPADC FIFO Data Register</description>
<addressOffset>0x0014</addressOffset>
</register>
<register>
<name>GP_CDATA</name>
<description>GPADC Calibration Data Register</description>
<addressOffset>0x0018</addressOffset>
</register>
<register>
<name>GP_DATAL_INTC</name>
<description>GPADC Data Low Interrupt Configure Register</description>
<addressOffset>0x0020</addressOffset>
</register>
<register>
<name>GP_DATAH_INTC</name>
<description>GPADC Data High Interrupt Configure Register</description>
<addressOffset>0x0024</addressOffset>
</register>
<register>
<name>GP_DATA_INTC</name>
<description>GPADC Data Interrupt Configure Register</description>
<addressOffset>0x0028</addressOffset>
</register>
<register>
<name>GP_DATAL_INTS</name>
<description>GPADC Data Low Interrupt Status Register</description>
<addressOffset>0x0030</addressOffset>
</register>
<register>
<name>GP_DATAH_INTS</name>
<description>GPADC Data High Interrupt Status Register</description>
<addressOffset>0x0034</addressOffset>
</register>
<register>
<name>GP_DATA_INTS</name>
<description>GPADC Data Interrupt Status Register</description>
<addressOffset>0x0038</addressOffset>
</register>
<register>
<name>GP_CH0_CMP_DATA</name>
<description>GPADC CH0 Compare Data Register</description>
<addressOffset>0x0040</addressOffset>
</register>
<register>
<name>GP_CH1_CMP_DATA</name>
<description>GPADC CH1 Compare Data Register</description>
<addressOffset>0x0044</addressOffset>
</register>
<register>
<name>GP_CH0_DATA</name>
<description>GPADC CH0 Data Register</description>
<addressOffset>0x0080</addressOffset>
</register>
<register>
<name>GP_CH1_DATA</name>
<description>GPADC CH1 Data Register</description>
<addressOffset>0x0084</addressOffset>
</register>
</registers>
</peripheral>
<peripheral>
<name>TPADC</name>
<description>Touch Panel ADC</description>
<groupName>Interfaces</groupName>
<baseAddress>0x02009C00</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x400</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>TPADC</name>
<value>78</value>
</interrupt>
<registers>
<register>
<name>TP_CTRL0</name>
<description>TP Control Register 0</description>
<addressOffset>0x0000</addressOffset>
</register>
<register>
<name>TP_CTRL1</name>
<description>TP Control Register 1</description>
<addressOffset>0x0004</addressOffset>
</register>
<register>
<name>TP_CTRL2</name>
<description>TP Control Register 2</description>
<addressOffset>0x0008</addressOffset>
</register>
<register>
<name>TP_CTRL3</name>
<description>TP Control Register 3</description>
<addressOffset>0x000C</addressOffset>
</register>
<register>
<name>TP_INT_FIFO_CTRL</name>
<description>TP Interrupt FIFO Control Register</description>
<addressOffset>0x0010</addressOffset>
</register>
<register>
<name>TP_INT_FIFO_STAT</name>
<description>TP Interrupt FIFO Status Register</description>
<addressOffset>0x0014</addressOffset>
</register>
<register>
<name>TP_CALI_DATA</name>
<description>TP Calibration Data Register</description>
<addressOffset>0x001C</addressOffset>
</register>
<register>
<name>TP_DATA</name>
<description>TP Data Register</description>
<addressOffset>0x0024</addressOffset>
</register>
</registers>
</peripheral>
<peripheral>
<name>LRADC</name>
<description>Low Rate ADC</description>
<groupName>Interfaces</groupName>
<baseAddress>0x02009800</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x400</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>LRADC</name>
<value>77</value>
</interrupt>
<registers>
<register>
<name>LRADC_CTRL</name>
<description>LRADC Control Register</description>
<addressOffset>0x0000</addressOffset>
</register>
<register>
<name>LRADC_INTC</name>
<description>LRADC Interrupt Control Register</description>
<addressOffset>0x0004</addressOffset>
</register>
<register>
<name>LRADC_INTS</name>
<description>LRADC Interrupt Status Register</description>
<addressOffset>0x0008</addressOffset>
</register>
<register>
<name>LRADC_DATA</name>
<description>LRADC Data Register</description>
<addressOffset>0x000C</addressOffset>
</register>
</registers>
</peripheral>
<peripheral>
<name>PWM</name>
<description>Pulse Width Modulation</description>
<groupName>Interfaces</groupName>
<baseAddress>0x02000C00</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x400</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>PWM</name>
<value>34</value>
</interrupt>
<registers>
<register>
<name>PIER</name>
<description>PWM IRQ Enable Register</description>
<addressOffset>0x0000</addressOffset>
</register>
<register>
<name>PISR</name>
<description>PWM IRQ Status Register</description>
<addressOffset>0x0004</addressOffset>
</register>
<register>
<name>CIER</name>
<description>Capture IRQ Enable Register</description>
<addressOffset>0x0010</addressOffset>
</register>
<register>
<name>CISR</name>
<description>Capture IRQ Status Register</description>
<addressOffset>0x0014</addressOffset>
</register>
<register>
<name>PCCR01</name>
<description>PWM01 Clock Configuration Register</description>
<addressOffset>0x0020</addressOffset>
</register>
<register>
<name>PCCR23</name>
<description>PWM23 Clock Configuration Register</description>
<addressOffset>0x0024</addressOffset>
</register>
<register>
<name>PCCR45</name>
<description>PWM45 Clock Configuration Register</description>
<addressOffset>0x0028</addressOffset>
</register>
<register>
<name>PCCR67</name>
<description>PWM67 Clock Configuration Register</description>
<addressOffset>0x002C</addressOffset>
</register>
<register>
<name>PCGR</name>
<description>PWM Clock Gating Register</description>
<addressOffset>0x0040</addressOffset>
</register>
<register>
<name>PDZCR01</name>
<description>PWM01 Dead Zone Control Register</description>
<addressOffset>0x0060</addressOffset>
</register>
<register>
<name>PDZCR23</name>
<description>PWM23 Dead Zone Control Register</description>
<addressOffset>0x0064</addressOffset>
</register>
<register>
<name>PDZCR45</name>
<description>PWM45 Dead Zone Control Register</description>
<addressOffset>0x0068</addressOffset>
</register>
<register>
<name>PDZCR67</name>
<description>PWM67 Dead Zone Control Register</description>
<addressOffset>0x006C</addressOffset>
</register>
<register>
<name>PER</name>
<description>PWM Enable Register</description>
<addressOffset>0x0080</addressOffset>
</register>
<register>
<name>PGR0</name>
<description>PWM Group0 Register</description>
<addressOffset>0x0090</addressOffset>
</register>
<register>
<name>PGR1</name>
<description>PWM Group1 Register</description>
<addressOffset>0x0094</addressOffset>
</register>
<register>
<name>PGR2</name>
<description>PWM Group2 Register</description>
<addressOffset>0x0098</addressOffset>
</register>
<register>
<name>PGR3</name>
<description>PWM Group3 Register</description>
<addressOffset>0x009C</addressOffset>
</register>
<register>
<name>CER</name>
<description>Capture Enable Register</description>
<addressOffset>0x00C0</addressOffset>
</register>
<register>
<dim>8</dim>
<dimIncrement>0x0020</dimIncrement>
<name>pcr%s</name>
<description>PWM Control Register</description>
<addressOffset>0x0100</addressOffset>
</register>
<register>
<dim>8</dim>
<dimIncrement>0x0020</dimIncrement>
<name>ppr%s</name>
<description>PWM Period Register</description>
<addressOffset>0x0104</addressOffset>
</register>
<register>
<dim>8</dim>
<dimIncrement>0x0020</dimIncrement>
<name>pcntr%s</name>
<description>PWM Count Register</description>
<addressOffset>0x0108</addressOffset>
</register>
<register>
<dim>8</dim>
<dimIncrement>0x0020</dimIncrement>
<name>ppcntr%s</name>
<description>PWM Pulse Count Register</description>
<addressOffset>0x010c</addressOffset>
</register>
<register>
<dim>8</dim>
<dimIncrement>0x0020</dimIncrement>
<name>ccr%s</name>
<description>Capture Control Register</description>
<addressOffset>0x0110</addressOffset>
</register>
<register>
<dim>8</dim>
<dimIncrement>0x0020</dimIncrement>
<name>crlr%s</name>
<description>Capture Rise Lock Register</description>
<addressOffset>0x0114</addressOffset>
</register>
<register>
<dim>8</dim>
<dimIncrement>0x0020</dimIncrement>
<name>cflr%s</name>
<description>Capture Fall Lock Register</description>
<addressOffset>0x0118</addressOffset>
</register>
</registers>
</peripheral>
<peripheral>
<name>LEDC</name>
<description>LEDC</description>
<groupName>Interfaces</groupName>
<baseAddress>0x02008000</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x400</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>LEDC</name>
<value>36</value>
</interrupt>
<registers>
<register>
<name>LEDC_CTRL</name>
<description>LEDC Control Register</description>
<addressOffset>0x0000</addressOffset>
<fields>
<field>
<name>TOTAL_DATA_LENGTH</name>
<bitRange>[28:16]</bitRange>
</field>
<field>
<name>RESET_LED_EN</name>
<bitRange>[10:10]</bitRange>
</field>
<field>
<name>LED_RGB_MODE</name>
<bitRange>[8:6]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>GRB</name>
<value>0b000</value>
</enumeratedValue>
<enumeratedValue>
<name>GBR</name>
<value>0b001</value>
</enumeratedValue>
<enumeratedValue>
<name>RGB</name>
<value>0b010</value>
</enumeratedValue>
<enumeratedValue>
<name>RBG</name>
<value>0b011</value>
</enumeratedValue>
<enumeratedValue>
<name>BGR</name>
<value>0b100</value>
</enumeratedValue>
<enumeratedValue>
<name>BRG</name>
<value>0b101</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<dim>4</dim>
<dimIncrement>1</dimIncrement>
<dimIndex>B,R,G,TOP</dimIndex>
<name>LED_MSB_%s</name>
<bitRange>[2:2]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>LSB</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>MSB</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LEDC_SOFT_RESET</name>
<bitRange>[1:1]</bitRange>
</field>
<field>
<name>LEDC_EN</name>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>LED_T01_TIMING_CTRL</name>
<description>LEDC T0 T1 Timing Control Register</description>
<addressOffset>0x0004</addressOffset>
<fields>
<field>
<name>T1H_TIME</name>
<bitRange>[26:21]</bitRange>
<writeConstraint>
<range>
<minimum>0</minimum>
<maximum>0x3f</maximum>
</range>
</writeConstraint>
</field>
<field>
<name>T1L_TIME</name>
<bitRange>[20:16]</bitRange>
<writeConstraint>
<range>
<minimum>0</minimum>
<maximum>0x1f</maximum>
</range>
</writeConstraint>
</field>
<field>
<name>T0H_TIME</name>
<bitRange>[10:6]</bitRange>
<writeConstraint>
<range>
<minimum>0</minimum>
<maximum>0x1f</maximum>
</range>
</writeConstraint>
</field>
<field>
<name>T0L_TIME</name>
<bitRange>[5:0]</bitRange>
<writeConstraint>
<range>
<minimum>0</minimum>
<maximum>0x1f</maximum>
</range>
</writeConstraint>
</field>
</fields>
</register>
<register>
<name>LEDC_DATA_FINISH_CNT</name>
<description>LEDC Data Finish Counter Register</description>
<addressOffset>0x0008</addressOffset>
<fields>
<field>
<name>LED_WAIT_DATA_TIME</name>
<bitRange>[29:16]</bitRange>
<writeConstraint>
<range>
<minimum>0</minimum>
<maximum>0x1FFF</maximum>
</range>
</writeConstraint>
</field>
<field>
<name>LED_DATA_FINISH_CNT</name>
<bitRange>[12:0]</bitRange>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>LED_RESET_TIMING_CTRL</name>
<description>LEDC Reset Timing Control Register</description>
<addressOffset>0x000C</addressOffset>
<fields>
<field>
<name>TR_TIME</name>
<bitRange>[28:16]</bitRange>
<writeConstraint>
<range>
<minimum>1</minimum>
<maximum>0x1FFF</maximum>
</range>
</writeConstraint>
</field>
<field>
<name>LED_NUM</name>
<bitRange>[9:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>LEDC_WAIT_TIME0_CTRL</name>
<description>LEDC Wait Time0 Control Register</description>
<addressOffset>0x0010</addressOffset>
<fields>
<field>
<name>WAIT_TIM0_EN</name>
<bitRange>[8:8]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>TOTAL_WAIT_TIME0</name>
<bitRange>[7:0]</bitRange>
<writeConstraint>
<range>
<minimum>1</minimum>
<maximum>0xFF</maximum>
</range>
</writeConstraint>
</field>
</fields>
</register>
<register>
<name>LEDC_DATA</name>
<description>LEDC Data Register</description>
<addressOffset>0x0014</addressOffset>
<access>write-only</access>
</register>
<register>
<name>LEDC_DMA_CTRL</name>
<description>LEDC DMA Control Register</description>
<addressOffset>0x0018</addressOffset>
<fields>
<field>
<name>LEDC_DMA_EN</name>
<bitRange>[5:5]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LEDC_FIFO_TRIG_LEVEL</name>
<bitRange>[4:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>LEDC_INT_CTRL</name>
<description>LEDC Interrupt Control Register</description>
<addressOffset>0x001C</addressOffset>
<fields>
<field>
<name>GLOBAL_INT_EN</name>
<bitRange>[5:5]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>FIFO_OVERFLOW_INT_EN</name>
<bitRange>[4:4]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>WAITDATA_TIMEOUT_INT_EN</name>
<bitRange>[3:3]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>FIFO_CPUREQ_INT_EN</name>
<bitRange>[1:1]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LED_TRANS_FINISH_INT_EN</name>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>LEDC_INT_STS</name>
<description>LEDC Interrupt Status Register</description>
<addressOffset>0x0020</addressOffset>
<fields>
<field>
<name>FIFO_EMPTY</name>
<bitRange>[17:17]</bitRange>
<access>read-only</access>
</field>
<field>
<name>FIFO_FULL</name>
<bitRange>[16:16]</bitRange>
<access>read-only</access>
</field>
<field>
<name>FIFO_WLW</name>
<bitRange>[15:10]</bitRange>
<access>read-only</access>
</field>
<field>
<name>FIFO_OVERFLOW_INT</name>
<bitRange>[4:4]</bitRange>
<modifiedWriteValues>oneToClear</modifiedWriteValues>
<enumeratedValues>
<enumeratedValue>
<name>not_overflow</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>overflow</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>WAITDATA_TIMEOUT_INT</name>
<bitRange>[3:3]</bitRange>
<modifiedWriteValues>oneToClear</modifiedWriteValues>
<enumeratedValues>
<enumeratedValue>
<name>not_timeout</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>timeout</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>FIFO_CPUREQ_INT</name>
<bitRange>[1:1]</bitRange>
<modifiedWriteValues>oneToClear</modifiedWriteValues>
<enumeratedValues>
<enumeratedValue>
<name>not_request</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>request</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LEC_TRANS_FINISH_INT</name>
<bitRange>[0:0]</bitRange>
<modifiedWriteValues>oneToClear</modifiedWriteValues>
<enumeratedValues>
<enumeratedValue>
<name>not_trans_complete</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>trans_complete</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>LEDC_WAIT_TIME1_CTRL</name>
<description>LEDC Wait Time1 Control Register</description>
<addressOffset>0x0028</addressOffset>
<fields>
<field>
<name>WAIT_TIM1_EN</name>
<bitRange>[31:31]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>TOTAL_WAIT_TIME1</name>
<bitRange>[30:0]</bitRange>
<writeConstraint>
<range>
<minimum>0x80</minimum>
<maximum>0x7FFFFFFF</maximum>
</range>
</writeConstraint>
</field>
</fields>
</register>
<register>
<dim>32</dim>
<dimIncrement>0x04</dimIncrement>
<name>LEDC_FIFO_DATA%s</name>
<description>LEDC FIFO Data Register</description>
<addressOffset>0x0030</addressOffset>
<access>read-only</access>
</register>
</registers>
</peripheral>
<peripheral>
<name>EMAC</name>
<description>Ethernet Medium Access Controller</description>
<groupName>Interfaces</groupName>
<baseAddress>0x04500000</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x10000</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>EMAC</name>
<value>62</value>
</interrupt>
<registers>
<register>
<name>EMAC_BASIC_CTL0</name>
<description>EMAC Basic Control Register0</description>
<addressOffset>0x0000</addressOffset>
<fields>
<field>
<name>SPEED</name>
<description>EMAC Working Speed</description>
<bitRange>[3:2]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>S1000</name>
<value>0b00</value>
</enumeratedValue>
<enumeratedValue>
<name>Reserved</name>
<value>0b01</value>
</enumeratedValue>
<enumeratedValue>
<name>S10</name>
<value>0b10</value>
</enumeratedValue>
<enumeratedValue>
<name>S100</name>
<value>0b11</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LOOPBACK</name>
<description>EMAC Loopback Mode For Test</description>
<bitRange>[1:1]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DUPLEX</name>
<description>EMAC Transfer Mode</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Half_Duplex</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Full_Duplex</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>EMAC_BASIC_CTL1</name>
<description>EMAC Basic Control Register1</description>
<addressOffset>0x0004</addressOffset>
<fields>
<field>
<name>BURST_LEN</name>
<description>The burst length of RX and TX DMA transfer</description>
<bitRange>[29:24]</bitRange>
</field>
<field>
<name>RX_TX_PRI</name>
<description>RX TX DMA Priority</description>
<bitRange>[1:1]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Same</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>RoT</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SOFT_RST</name>
<description>Soft Reset all Registers and Logic</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>no_valid</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>reset</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>EMAC_INT_STA</name>
<description>EMAC Interrupt Status Register</description>
<addressOffset>0x0008</addressOffset>
<modifiedWriteValues>oneToClear</modifiedWriteValues>
<fields>
<field>
<name>RGMII_LINK_STA_P</name>
<description>RMII Link Status Changed Interrupt Pending</description>
<bitRange>[16:16]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>No_Pending</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Pending</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>RX_EARLY_P</name>
<description>RX DMA Filled First Data Buffer of the Receive Frame Interrupt Pending</description>
<bitRange>[13:13]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>no_pending</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>pending</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>RX_OVERFLOW_P</name>
<description>RX FIFO Overflow Error Interrupt Pending</description>
<bitRange>[12:12]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>no_pending</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>pending</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>RX_TIMEOUT_P</name>
<description>RX Timeout Interrupt Pending</description>
<bitRange>[11:11]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>no_pending</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>pending</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>RX_DMA_STOPPED_P</name>
<description>When this bit asserted, the RX DMA FSM is stopped.</description>
<bitRange>[10:10]</bitRange>
</field>
<field>
<name>RX_BUF_UA_P</name>
<description>RX Buffer UA Interrupt Pending</description>
<bitRange>[9:9]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>no_pending</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>pending</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>RX_P</name>
<description>Frame RX Completed Interrupt Pending</description>
<bitRange>[8:8]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>no_pending</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>pending</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>TX_EARLY_P</name>
<description>Total interrupt pending which the frame is transmitted to FIFO</description>
<bitRange>[5:5]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>no_pending</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>pending</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>TX_UNDERFLOW_P</name>
<description>TX FIFO Underflow Interrupt Pending</description>
<bitRange>[4:4]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>no_pending</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>pending</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>TX_TIMEOUT_P</name>
<description>Transmitter Timeout Interrupt Pending</description>
<bitRange>[3:3]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>no_pending</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>pending</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>TX_BUF_UA_P</name>
<description>TX Buffer UA Interrupt Pending</description>
<bitRange>[2:2]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>no_pending</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>pending</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>TX_DMA_STOPPED_P</name>
<description>Transmission DMA Stopped Interrupt Pending</description>
<bitRange>[1:1]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>no_pending</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>pending</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>TX_P</name>
<description>Frame Transmission Interrupt Pending</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>no_pending</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>pending</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>EMAC_INT_EN</name>
<description>EMAC Interrupt Enable Register</description>
<addressOffset>0x000C</addressOffset>
<fields>
<field>
<name>RX_EARLY_INT_EN</name>
<description>Early Receive Interrupt</description>
<bitRange>[13:13]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>RX_OVERFLOW_INT_EN</name>
<description>Receive Overflow Interrupt</description>
<bitRange>[12:12]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>RX_TIMEOUT_INT_EN</name>
<description>Receive Timeout Interrupt</description>
<bitRange>[11:11]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>RX_DMA_STOPPED_INT_EN</name>
<description>Receive DMA FSM Stopped Interrupt</description>
<bitRange>[10:10]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>RX_BUF_UA_INT_EN</name>
<description>Receive Buffer Unavailable Interrupt</description>
<bitRange>[9:9]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>RX_INT_EN</name>
<description>Receive Interrupt</description>
<bitRange>[8:8]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>TX_EARLY_INT_EN</name>
<description>Early Transmit Interrupt</description>
<bitRange>[5:5]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>TX_UNDERFLOW_INT_EN</name>
<description>Transmit Underflow Interrupt</description>
<bitRange>[4:4]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>TX_TIMEOUT_INT_EN</name>
<description>Transmit Timeout Interrupt</description>
<bitRange>[3:3]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>TX_BUF_UA_INT_EN</name>
<description>Transmit Buffer Available Interrupt</description>
<bitRange>[2:2]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>TX_DMA_STOPPED_INT_EN</name>
<description>Transmit DMA FSM Stopped Interrupt</description>
<bitRange>[1:1]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>TX_INT_EN</name>
<description>Transmit Interrupt</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>EMAC_TX_CTL0</name>
<description>EMAC Transmit Control Register0</description>
<addressOffset>0x0010</addressOffset>
<fields>
<field>
<name>TX_EN</name>
<description>Enable Transmitter</description>
<bitRange>[31:31]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>TX_FRM_LEN_CTL</name>
<description>Frame Transmit Length Control</description>
<bitRange>[30:30]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>B2048</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>B16384</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>EMAC_TX_CTL1</name>
<description>EMAC Transmit Control Register1</description>
<addressOffset>0x0014</addressOffset>
<fields>
<field>
<name>TX_DMA_START</name>
<description>Transmit DMA FSM Start</description>
<bitRange>[31:31]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>no_valid</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>start</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>TX_DMA_EN</name>
<description>Transmit DMA Enable</description>
<bitRange>[30:30]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>stop</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>start</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>TX_TH</name>
<description>Threshold value of TX DMA FIFO</description>
<bitRange>[10:8]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>T64</name>
<value>0b000</value>
</enumeratedValue>
<enumeratedValue>
<name>T128</name>
<value>0b001</value>
</enumeratedValue>
<enumeratedValue>
<name>T192</name>
<value>0b010</value>
</enumeratedValue>
<enumeratedValue>
<name>T256</name>
<value>0b011</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>TX_MD</name>
<description>Transmission Mode</description>
<bitRange>[1:1]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>greater_than_th</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>locate_full_frame</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>FLUSH_TX_FIFO</name>
<description>Flush the data in the TX FIFO</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>enable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>disable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>EMAC_TX_FLOW_CTL</name>
<description>EMAC Transmit Flow Control Register</description>
<addressOffset>0x001C</addressOffset>
<fields>
<field>
<name>TX_FLOW_CTL_STA</name>
<bitRange>[31:31]</bitRange>
</field>
<field>
<name>TX_PAUSE_FRM_SLOT</name>
<bitRange>[21:20]</bitRange>
</field>
<field>
<name>PAUSE_TIME</name>
<bitRange>[19:4]</bitRange>
</field>
<field>
<name>ZQP_FRM_EN</name>
<bitRange>[1:1]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>TX_FLOW_CTL_EN</name>
<description>TX Flow Control Enable</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>EMAC_TX_DMA_DESC_LIST</name>
<description>EMAC Transmit Descriptor List Address Register</description>
<addressOffset>0x0020</addressOffset>
</register>
<register>
<name>EMAC_RX_CTL0</name>
<description>EMAC Receive Control Register0</description>
<addressOffset>0x0024</addressOffset>
<fields>
<field>
<name>RX_EN</name>
<description>Enable Receiver</description>
<bitRange>[31:31]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>RX_FRM_LEN_CTL</name>
<description>Frame Receive Length Control</description>
<bitRange>[30:30]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>B2048</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>B16384</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>JUMBO_FRM_EN</name>
<description>Jumbo Frame Enable</description>
<bitRange>[29:29]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>STRIP_FCS</name>
<bitRange>[28:28]</bitRange>
</field>
<field>
<name>CHECK_CRC</name>
<description>Check CRC Enable</description>
<bitRange>[27:27]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>check</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>RX_PAUSE_FRM_MD</name>
<bitRange>[17:17]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>only_multicast</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>also_unicast_mac0</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>RX_FLOW_CTL_EN</name>
<bitRange>[16:16]</bitRange>
</field>
</fields>
</register>
<register>
<name>EMAC_RX_CTL1</name>
<description>EMAC Receive Control Register1</description>
<addressOffset>0x0028</addressOffset>
<fields>
<field>
<name>RX_DMA_START</name>
<bitRange>[31:31]</bitRange>
</field>
<field>
<name>RX_EMA_EN</name>
<description>Receive DMA Enable</description>
<bitRange>[30:30]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>stop</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>start</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>RX_FIFO_FLOW_CTL</name>
<description>Receive FIFO Flow Control Enable</description>
<bitRange>[24:24]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>disable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>enable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>RX_FLOW_CTL_TH_DEACT</name>
<description>Threshold for Deactivating Flow Control</description>
<bitRange>[23:22]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>FM1K</name>
<value>0b00</value>
</enumeratedValue>
<enumeratedValue>
<name>FM2K</name>
<value>0b01</value>
</enumeratedValue>
<enumeratedValue>
<name>FM3K</name>
<value>0b10</value>
</enumeratedValue>
<enumeratedValue>
<name>FM4K</name>
<value>0b11</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>RX_FLOW_CTL_TH_ACT</name>
<description>Threshold for Activating Flow Control</description>
<bitRange>[21:20]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>FM1K</name>
<value>0b00</value>
</enumeratedValue>
<enumeratedValue>
<name>FM2K</name>
<value>0b01</value>
</enumeratedValue>
<enumeratedValue>
<name>FM3K</name>
<value>0b10</value>
</enumeratedValue>
<enumeratedValue>
<name>FM4K</name>
<value>0b11</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>RX_TH</name>
<description>Threshold for RX DMA FIFO Start</description>
<bitRange>[5:4]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>T64</name>
<value>0b00</value>
</enumeratedValue>
<enumeratedValue>
<name>T32</name>
<value>0b01</value>
</enumeratedValue>
<enumeratedValue>
<name>T96</name>
<value>0b10</value>
</enumeratedValue>
<enumeratedValue>
<name>T128</name>
<value>0b11</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>RX_ERR_FRM</name>
<bitRange>[3:3]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>drop</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>forward</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>RX_RUNT_FRM</name>
<bitRange>[2:2]</bitRange>
</field>
<field>
<name>RX_MD</name>
<description>Receive Mode</description>
<bitRange>[1:1]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>greater_than_th</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>locate_full_frame</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>FLUSH_RX_FRM</name>
<description>Flush Receive Frames</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>enable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>disable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>EMAC_RX_DMA_DESC_LIST</name>
<description>EMAC Receive Descriptor List Address Register</description>
<addressOffset>0x0034</addressOffset>
</register>
<register>
<name>EMAC_RX_FRM_FLT</name>
<description>EMAC Receive Frame Filter Register</description>
<addressOffset>0x0038</addressOffset>
<fields>
<field>
<name>DIS_ADDR_FILTER</name>
<description>Disable Address Filter</description>
<bitRange>[31:31]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Enable</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Disable</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DIS_BROADCAST</name>
<description>Disable Receive Broadcast Frames</description>
<bitRange>[17:17]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Receive</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Drop</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>RX_ALL_MULTICAST</name>
<description>Receive All Multicast Frames Filter</description>
<bitRange>[16:16]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Filter</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Receive_all</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CTL_FRM_FILTER</name>
<description>Receive Control Frames Filter</description>
<bitRange>[13:12]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>Drop_all</name>
<value>0b0x</value>
</enumeratedValue>
<enumeratedValue>
<name>Receive_all</name>
<value>0b10</value>
</enumeratedValue>
<enumeratedValue>
<name>Receive_all_when_filter</name>
<value>0b11</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>HASH_MULTICAST</name>
<description>Filter Multicast Frames Set</description>
<bitRange>[9:9]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>DA_field</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>hash_table</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>HASH_UNICAST</name>
<description>Filter Unicast Frames Set</description>
<bitRange>[8:8]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>DA_field</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>hash_table</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SA_FILTER_EN</name>
<description>Receive SA Filter Enable</description>
<bitRange>[6:6]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>receive_update</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>update_drop_unmatched</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SA_INV_FILTER</name>
<description>Receive SA Invert Filter Set</description>
<bitRange>[5:5]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>matched</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>unmatched</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DA_INV_FILTER</name>
<bitRange>[4:4]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>normal</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>inverse_cmp_da</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>FLT_MD</name>
<bitRange>[1:1]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>passed_when_matched</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>receive_when_passed</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>RX_ALL</name>
<description>Receive All Frame</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>receive_when_passed</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>receive_all_update</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>EMAC_RX_HASH0</name>
<description>EMAC Hash Table Register0</description>
<addressOffset>0x0040</addressOffset>
</register>
<register>
<name>EMAC_RX_HASH1</name>
<description>EMAC Hash Table Register1</description>
<addressOffset>0x0044</addressOffset>
</register>
<register>
<name>EMAC_MII_CMD</name>
<description>EMAC Management Interface Command Register</description>
<addressOffset>0x0048</addressOffset>
<fields>
<field>
<name>MDC_DIV_RATIO_M</name>
<description>MDC Clock DIvider Ratio</description>
<bitRange>[22:20]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>R16</name>
<value>0b000</value>
</enumeratedValue>
<enumeratedValue>
<name>R32</name>
<value>0b001</value>
</enumeratedValue>
<enumeratedValue>
<name>R64</name>
<value>0b010</value>
</enumeratedValue>
<enumeratedValue>
<name>R128</name>
<value>0b011</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PHY_ADDR</name>
<description>PHY Address</description>
<bitRange>[16:12]</bitRange>
</field>
<field>
<name>PHY_REG_ADDR</name>
<description>PHY Register Address</description>
<bitRange>[8:4]</bitRange>
</field>
<field>
<name>MII_WR</name>
<description>MII Write and Read</description>
<bitRange>[1:1]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>R</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>W</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>MII_BUSY</name>
<description>MII Status</description>
<bitRange>[0:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>EMAC_MII_DATA</name>
<description>EMAC Management Interface Data Register</description>
<addressOffset>0x004C</addressOffset>
<fields>
<field>
<name>MII_DATA</name>
<bitRange>[15:0]</bitRange>
</field>
</fields>
</register>
<register>
<name>EMAC_ADDR_HIGH0</name>
<description>EMAC MAC Address High Register</description>
<addressOffset>0x0050</addressOffset>
<fields>
<field>
<name>MAC_ADDR_HIGH0</name>
<bitRange>[15:0]</bitRange>
</field>
</fields>
</register>
<register>
<dim>7</dim>
<dimIncrement>0x08</dimIncrement>
<dimIndex>1-7</dimIndex>
<name>EMAC_ADDR_HIGH%s</name>
<description>EMAC MAC Address High Register</description>
<addressOffset>0x0058</addressOffset>
<fields>
<field>
<name>MAC_ADDR_CTL</name>
<description>MAC Address Valid</description>
<bitRange>[31:31]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>invalid</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>valid</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>MAC_ADDR_TYPE</name>
<description>MAC Address Type</description>
<bitRange>[30:30]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>dst</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>src</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>MAC_ADDR_BYTE_CTL</name>
<description>MAC Address Byte Control Mask</description>
<bitRange>[29:24]</bitRange>
</field>
<field>
<name>MAC_ADDR_HIGH</name>
<bitRange>[15:0]</bitRange>
</field>
</fields>
</register>
<register>
<dim>8</dim>
<dimIncrement>0x08</dimIncrement>
<name>EMAC_ADDR_LOW%s</name>
<description>EMAC MAC Address Low Register</description>
<addressOffset>0x0054</addressOffset>
</register>
<register>
<name>EMAC_TX_DMA_STA</name>
<description>EMAC Transmit DMA Status Register</description>
<addressOffset>0x00B0</addressOffset>
<access>read-only</access>
<fields>
<field>
<name>TX_DMA_STA</name>
<description>The State of Transmit DMA FSM</description>
<bitRange>[2:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>stop</name>
<value>0b000</value>
</enumeratedValue>
<enumeratedValue>
<name>run_fetch_desc</name>
<value>0b001</value>
</enumeratedValue>
<enumeratedValue>
<name>run_wait_sta</name>
<value>0b010</value>
</enumeratedValue>
<enumeratedValue>
<name>run_trans_data</name>
<value>0b011</value>
</enumeratedValue>
<enumeratedValue>
<name>suspend</name>
<value>0b110</value>
</enumeratedValue>
<enumeratedValue>
<name>run_close_desc</name>
<value>0b111</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>EMAC_TX_CUR_DESC</name>
<description>EMAC Current Transmit Descriptor Register</description>
<addressOffset>0x00B4</addressOffset>
<access>read-only</access>
</register>
<register>
<name>EMAC_TX_CUR_BUF</name>
<description>EMAC Current Transmit Buffer Address Register</description>
<addressOffset>0x00B8</addressOffset>
<access>read-only</access>
</register>
<register>
<name>EMAC_RX_DMA_STA</name>
<description>EMAC Receive DMA Status Register</description>
<addressOffset>0x00C0</addressOffset>
<access>read-only</access>
<fields>
<field>
<name>RX_DMA_STA</name>
<description>The State of RX DMA FSM</description>
<bitRange>[2:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>stop</name>
<value>0b000</value>
</enumeratedValue>
<enumeratedValue>
<name>run_fetch_desc</name>
<value>0b001</value>
</enumeratedValue>
<enumeratedValue>
<name>run_wait_frm</name>
<value>0b011</value>
</enumeratedValue>
<enumeratedValue>
<name>suspend</name>
<value>0b100</value>
</enumeratedValue>
<enumeratedValue>
<name>run_close_desc</name>
<value>0b101</value>
</enumeratedValue>
<enumeratedValue>
<name>run_trans_data</name>
<value>0b111</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>EMAC_RX_CUR_DESC</name>
<description>EMAC Current Receive Descriptor Register</description>
<addressOffset>0x00C4</addressOffset>
<access>read-only</access>
</register>
<register>
<name>EMAC_RX_CUR_BUF</name>
<description>EMAC Current Receive Buffer Address Register</description>
<addressOffset>0x00C8</addressOffset>
<access>read-only</access>
</register>
<register>
<name>EMAC_RGMII_STA</name>
<description>EMAC RGMII Status Register</description>
<addressOffset>0x00D0</addressOffset>
<fields>
<field>
<name>RGMII_LINK</name>
<description>The link status of the RGMII interface</description>
<bitRange>[3:3]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>down</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>up</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>RGMII_LINK_SPD</name>
<description>The link speed of the RGMII interface</description>
<bitRange>[2:1]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>S2_5</name>
<value>0b00</value>
</enumeratedValue>
<enumeratedValue>
<name>S25</name>
<value>0b01</value>
</enumeratedValue>
<enumeratedValue>
<name>S125</name>
<value>0b10</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>RGMII_LINK_MD</name>
<description>The link mode of the RGMII interface</description>
<bitRange>[0:0]</bitRange>
<enumeratedValues>
<enumeratedValue>
<name>half_duplex</name>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>full_duplex</name>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>CIR_RX</name>
<description>Counsumer Infrared Receiver</description>
<groupName>Interfaces</groupName>
<baseAddress>0x07040000</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x400</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>IR_RX</name>
<value>167</value>
</interrupt>
<registers>
<register>
<name>CIR_CTL</name>
<description>CIR Control Register</description>
<addressOffset>0x0000</addressOffset>
</register>
<register>
<name>CIR_RXPCFG</name>
<description>CIR Receiver Pulse Configure Register</description>
<addressOffset>0x0010</addressOffset>
</register>
<register>
<name>CIR_RXFIFO</name>
<description>CIR Receiver FIFO Register</description>
<addressOffset>0x0020</addressOffset>
</register>
<register>
<name>CIR_RXINT</name>
<description>CIR Receiver Interrupt Control Register</description>
<addressOffset>0x002C</addressOffset>
</register>
<register>
<name>CIR_RXSTA</name>
<description>CIR Receiver Status Register</description>
<addressOffset>0x0030</addressOffset>
</register>
<register>
<name>CIR_RXCFG</name>
<description>CIR Receiver Configure Register</description>
<addressOffset>0x0034</addressOffset>
</register>
</registers>
</peripheral>
<peripheral>
<name>CIR_TX</name>
<description>Counsumer Infrared Transmitter</description>
<groupName>Interfaces</groupName>
<baseAddress>0x02003000</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x400</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>IR_TX</name>
<value>35</value>
</interrupt>
<registers>
<register>
<name>CIR_TGLR</name>
<description>CIR Transmit Global Register</description>
<addressOffset>0x0000</addressOffset>
</register>
<register>
<name>CIR_TMCR</name>
<description>CIR Transmit Modulation Control Register</description>
<addressOffset>0x0004</addressOffset>
</register>
<register>
<name>CIR_TCR</name>
<description>CIR Transmit Control Register</description>
<addressOffset>0x0008</addressOffset>
</register>
<register>
<name>CIR_IDC_H</name>
<description>CIR Transmit Idle Duration Threshold High Bit Register</description>
<addressOffset>0x000C</addressOffset>
</register>
<register>
<name>CIR_IDC_L</name>
<description>CIR Transmit Idle Duration Threshold Low Bit Register</description>
<addressOffset>0x0010</addressOffset>
</register>
<register>
<name>CIR_TICR_H</name>
<description>CIR Transmit Idle Counter High Bit Register</description>
<addressOffset>0x0014</addressOffset>
</register>
<register>
<name>CIR_TICR_L</name>
<description>CIR Transmit Idle Counter Low Bit Register</description>
<addressOffset>0x0018</addressOffset>
</register>
<register>
<name>CIR_TEL</name>
<description>CIR TX FIFO Empty Level Register</description>
<addressOffset>0x0020</addressOffset>
</register>
<register>
<name>CIR_TXINT</name>
<description>CIR Transmit Interrupt Control Register</description>
<addressOffset>0x0024</addressOffset>
</register>
<register>
<name>CIR_TAC</name>
<description>CIR Transmit FIFO Available Counter Register</description>
<addressOffset>0x0028</addressOffset>
</register>
<register>
<name>CIR_TXSTA</name>
<description>CIR Transmit Status Register</description>
<addressOffset>0x002C</addressOffset>
</register>
<register>
<name>CIR_TXT</name>
<description>CIR Transmit Threshold Register</description>
<addressOffset>0x0030</addressOffset>
</register>
<register>
<name>CIR_DMA</name>
<description>CIR DMA Control Register</description>
<addressOffset>0x0034</addressOffset>
</register>
<register>
<name>CIR_TXFIFO</name>
<description>CIR Transmit FIFO Data Register</description>
<addressOffset>0x0080</addressOffset>
</register>
</registers>
</peripheral>
<peripheral>
<name>CE_NS</name>
<description>Crypoto Engine</description>
<groupName>SecuritySystem</groupName>
<baseAddress>0x03040000</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x800</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>CE_NS</name>
<value>68</value>
</interrupt>
<registers>
<register>
<name>CE_TDA</name>
<description>Task Descriptor Address</description>
<addressOffset>0x0000</addressOffset>
</register>
<register>
<name>CE_ICR</name>
<description>Interrupt Control Register</description>
<addressOffset>0x0008</addressOffset>
</register>
<register>
<name>CE_ISR</name>
<description>Interrupt Status Register</description>
<addressOffset>0x000C</addressOffset>
</register>
<register>
<name>CE_TLR</name>
<description>Task Load Register</description>
<addressOffset>0x0010</addressOffset>
</register>
<register>
<name>CE_TSR</name>
<description>Task Status Register</description>
<addressOffset>0x0014</addressOffset>
</register>
<register>
<name>CE_ESR</name>
<description>Error Status Register</description>
<addressOffset>0x0018</addressOffset>
</register>
<register>
<name>CE_CSA</name>
<description>DMA Current Source Address</description>
<addressOffset>0x0024</addressOffset>
</register>
<register>
<name>CE_CDA</name>
<description>DMA Current Destination Address</description>
<addressOffset>0x0028</addressOffset>
</register>
<register>
<name>CE_TPR</name>
<description>Throughput Register</description>
<addressOffset>0x002C</addressOffset>
</register>
</registers>
</peripheral>
</peripherals>
</device>
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