26703 lines
1.0 MiB
26703 lines
1.0 MiB
<?xml version="1.0" encoding="UTF-8"?>
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<device xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" schemaVersion="1.1" xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_0.xsd">
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<name>CC13x0</name>
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<version>2.0</version>
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<description>SimpleLink CC13xx Ultra-low power wireless MCU</description>
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<cpu>
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<name>CM3</name>
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<revision>r2p1</revision>
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<endian>little</endian>
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<mpuPresent>false</mpuPresent>
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<fpuPresent>false</fpuPresent>
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<nvicPrioBits>3</nvicPrioBits>
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<vendorSystickConfig>false</vendorSystickConfig>
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</cpu>
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<addressUnitBits>8</addressUnitBits>
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<width>32</width>
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<size>32</size>
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<access>read-write</access>
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<resetMask>0xFFFFFFFF</resetMask>
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<peripherals>
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<peripheral>
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<name>AON_BATMON</name>
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<description>Always On (AON) Battery And Temperature MONitor (BATMON) residing in the AON domain Note: This module only supports 32 bit Read/Write access from MCU. </description>
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<baseAddress>0x40095000</baseAddress>
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<addressBlock>
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<offset>0</offset>
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<size>0x400</size>
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<usage>registers</usage>
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</addressBlock>
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<registers>
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<register>
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<name>CTL</name>
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<description>Internal. Only to be used through TI provided API.</description>
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<addressOffset>0</addressOffset>
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<access>read-write</access>
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<resetValue>0x00000000</resetValue>
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<fields>
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<field>
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<name>CALC_EN</name>
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<description>CALC_EN</description>
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<bitRange>[1:1]</bitRange>
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</field>
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<field>
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<name>MEAS_EN</name>
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<description>MEAS_EN</description>
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<bitRange>[0:0]</bitRange>
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</field>
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</fields>
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</register>
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<register>
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<name>MEASCFG</name>
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<description>Internal. Only to be used through TI provided API.</description>
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<addressOffset>4</addressOffset>
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<access>read-write</access>
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<resetValue>0x00000000</resetValue>
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<fields>
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<field>
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<name>PER</name>
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<description>PER</description>
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<bitRange>[1:0]</bitRange>
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</field>
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</fields>
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</register>
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<register>
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<name>TEMPP0</name>
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<description>Internal. Only to be used through TI provided API.</description>
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<addressOffset>12</addressOffset>
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<access>read-write</access>
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<resetValue>0x00000000</resetValue>
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<fields>
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<field>
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<name>CFG</name>
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<description>CFG</description>
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<bitRange>[7:0]</bitRange>
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</field>
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</fields>
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</register>
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<register>
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<name>TEMPP1</name>
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<description>Internal. Only to be used through TI provided API.</description>
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<addressOffset>16</addressOffset>
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<access>read-write</access>
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<resetValue>0x00000000</resetValue>
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<fields>
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<field>
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<name>CFG</name>
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<description>CFG</description>
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<bitRange>[5:0]</bitRange>
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</field>
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</fields>
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</register>
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<register>
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<name>TEMPP2</name>
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<description>Internal. Only to be used through TI provided API.</description>
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<addressOffset>20</addressOffset>
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<access>read-write</access>
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<resetValue>0x00000000</resetValue>
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<fields>
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<field>
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<name>CFG</name>
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<description>CFG</description>
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<bitRange>[4:0]</bitRange>
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</field>
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</fields>
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</register>
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<register>
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<name>BATMONP0</name>
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<description>Internal. Only to be used through TI provided API.</description>
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<addressOffset>24</addressOffset>
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<access>read-write</access>
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<resetValue>0x00000000</resetValue>
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<fields>
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<field>
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<name>CFG</name>
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<description>CFG</description>
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<bitRange>[5:0]</bitRange>
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</field>
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</fields>
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</register>
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<register>
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<name>BATMONP1</name>
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<description>Internal. Only to be used through TI provided API.</description>
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<addressOffset>28</addressOffset>
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<access>read-write</access>
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<resetValue>0x00000000</resetValue>
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<fields>
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<field>
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<name>CFG</name>
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<description>CFG</description>
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<bitRange>[5:0]</bitRange>
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</field>
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</fields>
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</register>
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<register>
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<name>IOSTRP0</name>
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<description>Internal. Only to be used through TI provided API.</description>
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<addressOffset>32</addressOffset>
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<access>read-write</access>
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<resetValue>0x00000028</resetValue>
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<fields>
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<field>
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<name>CFG2</name>
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<description>CFG2</description>
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<bitRange>[5:4]</bitRange>
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</field>
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<field>
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<name>CFG1</name>
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<description>CFG1</description>
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<bitRange>[3:0]</bitRange>
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</field>
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</fields>
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</register>
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<register>
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<name>FLASHPUMPP0</name>
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<description>Internal. Only to be used through TI provided API.</description>
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<addressOffset>36</addressOffset>
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<access>read-write</access>
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<resetValue>0x00000000</resetValue>
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<fields>
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<field>
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<name>FALLB</name>
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<description>FALLB</description>
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<bitRange>[8:8]</bitRange>
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</field>
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<field>
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<name>HIGHLIM</name>
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<description>HIGHLIM</description>
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<bitRange>[7:6]</bitRange>
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</field>
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<field>
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<name>LOWLIM</name>
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<description>LOWLIM</description>
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<bitRange>[5:5]</bitRange>
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</field>
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<field>
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<name>OVR</name>
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<description>OVR</description>
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<bitRange>[4:4]</bitRange>
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</field>
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<field>
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<name>CFG</name>
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<description>CFG</description>
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<bitRange>[3:0]</bitRange>
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</field>
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</fields>
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</register>
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<register>
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<name>BAT</name>
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<description>Last Measured Battery Voltage
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This register may be read while BATUPD.STAT = 1
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</description>
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<addressOffset>40</addressOffset>
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<access>read-only</access>
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<resetValue>0x00000000</resetValue>
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<fields>
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<field>
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<name>INT</name>
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<description>INT</description>
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<bitRange>[10:8]</bitRange>
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</field>
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<field>
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<name>FRAC</name>
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<description>FRAC</description>
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<bitRange>[7:0]</bitRange>
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</field>
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</fields>
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</register>
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<register>
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<name>BATUPD</name>
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<description>Battery Update
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Indicates BAT Updates
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</description>
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<addressOffset>44</addressOffset>
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<access>read-write</access>
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<resetValue>0x00000000</resetValue>
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<fields>
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<field>
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<name>STAT</name>
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<description>STAT</description>
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<bitRange>[0:0]</bitRange>
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<modifiedWriteValues>oneToClear</modifiedWriteValues>
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</field>
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</fields>
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</register>
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<register>
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<name>TEMP</name>
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<description>Temperature
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Last Measured Temperature in Degrees Celsius
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This register may be read while TEMPUPD.STAT = 1.
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</description>
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<addressOffset>48</addressOffset>
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<access>read-only</access>
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<resetValue>0x00000000</resetValue>
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<fields>
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<field>
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<name>INT</name>
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<description>INT</description>
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<bitRange>[16:8]</bitRange>
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</field>
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</fields>
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</register>
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<register>
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<name>TEMPUPD</name>
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<description>Temperature Update
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Indicates TEMP Updates
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</description>
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<addressOffset>52</addressOffset>
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<access>read-write</access>
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<resetValue>0x00000000</resetValue>
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<fields>
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<field>
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<name>STAT</name>
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<description>STAT</description>
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<bitRange>[0:0]</bitRange>
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<modifiedWriteValues>oneToClear</modifiedWriteValues>
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</field>
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</fields>
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</register>
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</registers>
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</peripheral><peripheral>
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<name>AON_EVENT</name>
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<description>This module configures the event fabric located in the AON domain.
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Note: This module is only supporting 32 bit ReadWrite access from MCU
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</description>
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<baseAddress>0x40093000</baseAddress>
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<addressBlock>
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<offset>0</offset>
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<size>0x400</size>
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<usage>registers</usage>
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</addressBlock>
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<registers>
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<register>
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<name>MCUWUSEL</name>
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<description>Wake-up Selector For MCU
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This register contains pointers to 4 events which are routed to AON_WUC as wakeup sources for MCU. AON_WUC will start a wakeup sequence for the MCU domain when either of the 4 selected events are asserted. A wakeup sequence will guarantee that the MCU power switches are turned on, LDO resources are available and SCLK_HF is available and selected as clock source for MCU.
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Note: It is recommended ( or required when AON_WUC:MCUCLK.PWR_DWN_SRC=NONE) to also setup a wakeup event here before MCU is requesting powerdown. ( PRCM requests uLDO, see conditions in PRCM:VDCTL.ULDO ) as it will speed up the wakeup procedure.
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</description>
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<addressOffset>0</addressOffset>
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<access>read-write</access>
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<resetValue>0x3f3f3f3f</resetValue>
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<fields>
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<field>
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<name>WU3_EV</name>
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<description>WU3_EV</description>
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<bitRange>[29:24]</bitRange>
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</field>
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<field>
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<name>WU2_EV</name>
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<description>WU2_EV</description>
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<bitRange>[21:16]</bitRange>
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</field>
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<field>
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<name>WU1_EV</name>
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<description>WU1_EV</description>
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<bitRange>[13:8]</bitRange>
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</field>
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<field>
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<name>WU0_EV</name>
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<description>WU0_EV</description>
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<bitRange>[5:0]</bitRange>
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</field>
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</fields>
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</register>
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<register>
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<name>AUXWUSEL</name>
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<description>Wake-up Selector For AUX
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This register contains pointers to 3 events which are routed to AON_WUC as wakeup sources for AUX. AON_WUC will start a wakeup sequence for the AUX domain when either of the 3 selected events are asserted. A wakeup sequence will guarantee that the AUX power switches are turned on, LDO resources are available and SCLK_HF is available and selected as clock source for AUX.
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Note: It is recommended ( or required when AON_WUC:AUXCLK.PWR_DWN_SRC=NONE) to also setup a wakeup event here before AUX is requesting powerdown. ( AUX_WUC:PWRDWNREQ.REQ is asserted] ) as it will speed up the wakeup procedure.
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</description>
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<addressOffset>4</addressOffset>
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<access>read-write</access>
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<resetValue>0x003f3f3f</resetValue>
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<fields>
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<field>
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<name>WU2_EV</name>
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<description>WU2_EV</description>
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<bitRange>[21:16]</bitRange>
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</field>
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<field>
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<name>WU1_EV</name>
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<description>WU1_EV</description>
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<bitRange>[13:8]</bitRange>
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</field>
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<field>
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<name>WU0_EV</name>
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<description>WU0_EV</description>
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<bitRange>[5:0]</bitRange>
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</field>
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</fields>
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</register>
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<register>
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<name>EVTOMCUSEL</name>
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<description>Event Selector For MCU Event Fabric
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This register contains pointers for 3 AON events that are routed to the MCU Event Fabric EVENT
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</description>
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<addressOffset>8</addressOffset>
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<access>read-write</access>
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<resetValue>0x002b2b2b</resetValue>
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<fields>
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<field>
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<name>AON_PROG2_EV</name>
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<description>AON_PROG2_EV</description>
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<bitRange>[21:16]</bitRange>
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</field>
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<field>
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<name>AON_PROG1_EV</name>
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<description>AON_PROG1_EV</description>
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<bitRange>[13:8]</bitRange>
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</field>
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<field>
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<name>AON_PROG0_EV</name>
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<description>AON_PROG0_EV</description>
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<bitRange>[5:0]</bitRange>
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</field>
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</fields>
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</register>
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<register>
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<name>RTCSEL</name>
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<description>RTC Capture Event Selector For AON_RTC
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This register contains a pointer to select an AON event for RTC capture. Please refer to AON_RTC:CH1CAPT
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</description>
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<addressOffset>12</addressOffset>
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<access>read-write</access>
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<resetValue>0x0000003f</resetValue>
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<fields>
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<field>
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<name>RTC_CH1_CAPT_EV</name>
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<description>RTC_CH1_CAPT_EV</description>
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<bitRange>[5:0]</bitRange>
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</field>
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</fields>
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</register>
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</registers>
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</peripheral><peripheral>
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<name>AON_IOC</name>
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<description>Always On (AON) IO Controller - controls IO operation when the MCU IO Controller (IOC) is powered off and resides in the AON domain. Note: This module only supports 32 bit Read/Write access from MCU. </description>
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<baseAddress>0x40094000</baseAddress>
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<addressBlock>
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<offset>0</offset>
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<size>0x400</size>
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<usage>registers</usage>
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</addressBlock>
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<registers>
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<register>
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<name>IOSTRMIN</name>
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<description>Internal. Only to be used through TI provided API.</description>
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<addressOffset>0</addressOffset>
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<access>read-write</access>
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<resetValue>0x00000003</resetValue>
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<fields>
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<field>
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<name>GRAY_CODE</name>
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<description>GRAY_CODE</description>
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<bitRange>[2:0]</bitRange>
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</field>
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</fields>
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</register>
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<register>
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<name>IOSTRMED</name>
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<description>Internal. Only to be used through TI provided API.</description>
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<addressOffset>4</addressOffset>
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<access>read-write</access>
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<resetValue>0x00000006</resetValue>
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<fields>
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<field>
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<name>GRAY_CODE</name>
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<description>GRAY_CODE</description>
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<bitRange>[2:0]</bitRange>
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</field>
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</fields>
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</register>
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<register>
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<name>IOSTRMAX</name>
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<description>Internal. Only to be used through TI provided API.</description>
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<addressOffset>8</addressOffset>
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<access>read-write</access>
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<resetValue>0x00000005</resetValue>
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<fields>
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<field>
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<name>GRAY_CODE</name>
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<description>GRAY_CODE</description>
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<bitRange>[2:0]</bitRange>
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</field>
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</fields>
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</register>
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<register>
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<name>IOCLATCH</name>
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<description>IO Latch Control
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Controls transparency of all latches holding I/O or configuration state from the MCU IOC</description>
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<addressOffset>12</addressOffset>
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<access>read-write</access>
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<resetValue>0x00000001</resetValue>
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<fields>
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<field>
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<name>EN</name>
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<description>EN</description>
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<bitRange>[0:0]</bitRange>
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</field>
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</fields>
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</register>
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<register>
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<name>CLK32KCTL</name>
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<description>SCLK_LF External Output Control
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</description>
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<addressOffset>16</addressOffset>
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<access>read-write</access>
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<resetValue>0x00000001</resetValue>
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<fields>
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<field>
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<name>OE_N</name>
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<description>OE_N</description>
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<bitRange>[0:0]</bitRange>
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</field>
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</fields>
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</register>
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</registers>
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</peripheral><peripheral>
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<name>AON_RTC</name>
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<description>This component control the Real Time Clock residing in AON
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Note: This module is only supporting 32 bit ReadWrite access.
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</description>
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<baseAddress>0x40092000</baseAddress>
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<addressBlock>
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<offset>0</offset>
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<size>0x400</size>
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<usage>registers</usage>
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</addressBlock>
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<registers>
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<register>
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<name>CTL</name>
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<description>Control
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This register contains various bitfields for configuration of RTC</description>
|
|
<addressOffset>0</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>COMB_EV_MASK</name>
|
|
<description>COMB_EV_MASK</description>
|
|
<bitRange>[18:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EV_DELAY</name>
|
|
<description>EV_DELAY</description>
|
|
<bitRange>[11:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RESET</name>
|
|
<description>RESET</description>
|
|
<bitRange>[7:7]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>RTC_4KHZ_EN</name>
|
|
<description>RTC_4KHZ_EN</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RTC_UPD_EN</name>
|
|
<description>RTC_UPD_EN</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EN</name>
|
|
<description>EN</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>EVFLAGS</name>
|
|
<description>Event Flags, RTC Status
|
|
|
|
This register contains event flags from the 3 RTC channels. Each flag will be cleared when writing a '1' to the corresponding bitfield.
|
|
|
|
</description>
|
|
<addressOffset>4</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CH2</name>
|
|
<description>CH2</description>
|
|
<bitRange>[16:16]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>CH1</name>
|
|
<description>CH1</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>CH0</name>
|
|
<description>CH0</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SEC</name>
|
|
<description>Second Counter Value, Integer Part</description>
|
|
<addressOffset>8</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>VALUE</name>
|
|
<description>VALUE</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SUBSEC</name>
|
|
<description>Second Counter Value, Fractional Part</description>
|
|
<addressOffset>12</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>VALUE</name>
|
|
<description>VALUE</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SUBSECINC</name>
|
|
<description>Subseconds Increment
|
|
Value added to SUBSEC.VALUE on every SCLK_LFclock cycle.</description>
|
|
<addressOffset>16</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00800000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>VALUEINC</name>
|
|
<description>VALUEINC</description>
|
|
<bitRange>[23:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CHCTL</name>
|
|
<description>Channel Configuration
|
|
</description>
|
|
<addressOffset>20</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CH2_CONT_EN</name>
|
|
<description>CH2_CONT_EN</description>
|
|
<bitRange>[18:18]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CH2_EN</name>
|
|
<description>CH2_EN</description>
|
|
<bitRange>[16:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CH1_CAPT_EN</name>
|
|
<description>CH1_CAPT_EN</description>
|
|
<bitRange>[9:9]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CH1_EN</name>
|
|
<description>CH1_EN</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CH0_EN</name>
|
|
<description>CH0_EN</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CH0CMP</name>
|
|
<description>Channel 0 Compare Value
|
|
</description>
|
|
<addressOffset>24</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>VALUE</name>
|
|
<description>VALUE</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CH1CMP</name>
|
|
<description>Channel 1 Compare Value
|
|
</description>
|
|
<addressOffset>28</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>VALUE</name>
|
|
<description>VALUE</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CH2CMP</name>
|
|
<description>Channel 2 Compare Value
|
|
</description>
|
|
<addressOffset>32</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>VALUE</name>
|
|
<description>VALUE</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CH2CMPINC</name>
|
|
<description>Channel 2 Compare Value Auto-increment
|
|
|
|
This register is primarily used to generate periodical wake-up for the AUX_SCE module, through the [AUX_EVCTL.EVSTAT0.AON_RTC] event.
|
|
</description>
|
|
<addressOffset>36</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>VALUE</name>
|
|
<description>VALUE</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CH1CAPT</name>
|
|
<description>Channel 1 Capture Value
|
|
|
|
If CHCTL.CH1_EN = 1and CHCTL.CH1_CAPT_EN = 1, capture occurs on each rising edge of the event selected in AON_EVENT:RTCSEL.
|
|
</description>
|
|
<addressOffset>40</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SEC</name>
|
|
<description>SEC</description>
|
|
<bitRange>[31:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SUBSEC</name>
|
|
<description>SUBSEC</description>
|
|
<bitRange>[15:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SYNC</name>
|
|
<description>AON Synchronization
|
|
|
|
This register is used for synchronizing between MCU and entire AON domain. </description>
|
|
<addressOffset>44</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>WBUSY</name>
|
|
<description>WBUSY</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral><peripheral>
|
|
<name>AON_SYSCTL</name>
|
|
<description>This component controls AON_SYSCTL, which is the device's system controller.
|
|
|
|
Note: This module is only supporting 32 bit ReadWrite access from MCU
|
|
</description>
|
|
<baseAddress>0x40090000</baseAddress>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x400</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<registers>
|
|
<register>
|
|
<name>PWRCTL</name>
|
|
<description>Power Management
|
|
|
|
This register controls bitfields for setting low level power management features such as selection of regulator for VDDR supply and control of IO ring where certain segments can be enabled / disabled.
|
|
</description>
|
|
<addressOffset>0</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DCDC_ACTIVE</name>
|
|
<description>DCDC_ACTIVE</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EXT_REG_MODE</name>
|
|
<description>EXT_REG_MODE</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DCDC_EN</name>
|
|
<description>DCDC_EN</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RESETCTL</name>
|
|
<description>Reset Management
|
|
|
|
This register contains bitfields releated to system reset such as reset source and reset request and control of brown out resets.
|
|
</description>
|
|
<addressOffset>4</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x000000e0</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SYSRESET</name>
|
|
<description>SYSRESET</description>
|
|
<bitRange>[31:31]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>BOOT_DET_1_CLR</name>
|
|
<description>BOOT_DET_1_CLR</description>
|
|
<bitRange>[25:25]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>BOOT_DET_0_CLR</name>
|
|
<description>BOOT_DET_0_CLR</description>
|
|
<bitRange>[24:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>BOOT_DET_1_SET</name>
|
|
<description>BOOT_DET_1_SET</description>
|
|
<bitRange>[17:17]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>BOOT_DET_0_SET</name>
|
|
<description>BOOT_DET_0_SET</description>
|
|
<bitRange>[16:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WU_FROM_SD</name>
|
|
<description>WU_FROM_SD</description>
|
|
<bitRange>[15:15]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>GPIO_WU_FROM_SD</name>
|
|
<description>GPIO_WU_FROM_SD</description>
|
|
<bitRange>[14:14]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>BOOT_DET_1</name>
|
|
<description>BOOT_DET_1</description>
|
|
<bitRange>[13:13]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>BOOT_DET_0</name>
|
|
<description>BOOT_DET_0</description>
|
|
<bitRange>[12:12]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>VDDS_LOSS_EN_OVR</name>
|
|
<description>VDDS_LOSS_EN_OVR</description>
|
|
<bitRange>[11:11]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>VDDR_LOSS_EN_OVR</name>
|
|
<description>VDDR_LOSS_EN_OVR</description>
|
|
<bitRange>[10:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>VDD_LOSS_EN_OVR</name>
|
|
<description>VDD_LOSS_EN_OVR</description>
|
|
<bitRange>[9:9]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>VDDS_LOSS_EN</name>
|
|
<description>VDDS_LOSS_EN</description>
|
|
<bitRange>[7:7]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>VDDR_LOSS_EN</name>
|
|
<description>VDDR_LOSS_EN</description>
|
|
<bitRange>[6:6]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>VDD_LOSS_EN</name>
|
|
<description>VDD_LOSS_EN</description>
|
|
<bitRange>[5:5]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CLK_LOSS_EN</name>
|
|
<description>CLK_LOSS_EN</description>
|
|
<bitRange>[4:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RESET_SRC</name>
|
|
<description>RESET_SRC</description>
|
|
<bitRange>[3:1]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SLEEPCTL</name>
|
|
<description>Sleep Mode
|
|
|
|
This register is used to unfreeze the IO pad ring after waking up from SHUTDOWN
|
|
</description>
|
|
<addressOffset>8</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IO_PAD_SLEEP_DIS</name>
|
|
<description>IO_PAD_SLEEP_DIS</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral><peripheral>
|
|
<name>AON_WUC</name>
|
|
<description>This component control the Wakeup controller residing in the AON domain.
|
|
|
|
Note: This module is only supporting 32 bit ReadWrite access from MCU
|
|
|
|
</description>
|
|
<baseAddress>0x40091000</baseAddress>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x1000</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<registers>
|
|
<register>
|
|
<name>MCUCLK</name>
|
|
<description>MCU Clock Management
|
|
|
|
This register contains bitfields related to the MCU clock.</description>
|
|
<addressOffset>0</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>RCOSC_HF_CAL_DONE</name>
|
|
<description>RCOSC_HF_CAL_DONE</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PWR_DWN_SRC</name>
|
|
<description>PWR_DWN_SRC</description>
|
|
<bitRange>[1:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>AUXCLK</name>
|
|
<description>AUX Clock Management
|
|
|
|
This register contains bitfields that are relevant for setting up the clock to the AUX domain.</description>
|
|
<addressOffset>4</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>PWR_DWN_SRC</name>
|
|
<description>PWR_DWN_SRC</description>
|
|
<bitRange>[12:11]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SCLK_HF_DIV</name>
|
|
<description>SCLK_HF_DIV</description>
|
|
<bitRange>[10:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SRC</name>
|
|
<description>SRC</description>
|
|
<bitRange>[2:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>MCUCFG</name>
|
|
<description>MCU Configuration
|
|
|
|
This register contains power management related bitfields for the MCU domain.</description>
|
|
<addressOffset>8</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000000f</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>VIRT_OFF</name>
|
|
<description>VIRT_OFF</description>
|
|
<bitRange>[17:17]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>FIXED_WU_EN</name>
|
|
<description>FIXED_WU_EN</description>
|
|
<bitRange>[16:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SRAM_RET_EN</name>
|
|
<description>SRAM_RET_EN</description>
|
|
<bitRange>[3:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>AUXCFG</name>
|
|
<description>AUX Configuration
|
|
|
|
This register contains power management related signals for the AUX domain.</description>
|
|
<addressOffset>12</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>RAM_RET_EN</name>
|
|
<description>RAM_RET_EN</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>AUXCTL</name>
|
|
<description>AUX Control
|
|
|
|
This register contains events and control signals for the AUX domain.
|
|
</description>
|
|
<addressOffset>16</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>RESET_REQ</name>
|
|
<description>RESET_REQ</description>
|
|
<bitRange>[31:31]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SCE_RUN_EN</name>
|
|
<description>SCE_RUN_EN</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SWEV</name>
|
|
<description>SWEV</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>AUX_FORCE_ON</name>
|
|
<description>AUX_FORCE_ON</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PWRSTAT</name>
|
|
<description>Power Status
|
|
|
|
This register is used to monitor various power management related signals in AON. Most signals are for test, calibration and debug purpose only, and others can be used to detect that AUX or JTAG domains are powered up.
|
|
</description>
|
|
<addressOffset>20</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0xe00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>AUX_PWR_DWN</name>
|
|
<description>AUX_PWR_DWN</description>
|
|
<bitRange>[9:9]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>JTAG_PD_ON</name>
|
|
<description>JTAG_PD_ON</description>
|
|
<bitRange>[6:6]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>AUX_PD_ON</name>
|
|
<description>AUX_PD_ON</description>
|
|
<bitRange>[5:5]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>MCU_PD_ON</name>
|
|
<description>MCU_PD_ON</description>
|
|
<bitRange>[4:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>AUX_BUS_CONNECTED</name>
|
|
<description>AUX_BUS_CONNECTED</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>AUX_RESET_DONE</name>
|
|
<description>AUX_RESET_DONE</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SHUTDOWN</name>
|
|
<description>Shutdown Control
|
|
|
|
This register contains bitfields required for entering shutdown mode</description>
|
|
<addressOffset>24</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EN</name>
|
|
<description>EN</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CTL0</name>
|
|
<description>Control 0
|
|
|
|
This register contains various chip level control and debug bitfields.
|
|
</description>
|
|
<addressOffset>32</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>PWR_DWN_DIS</name>
|
|
<description>PWR_DWN_DIS</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>AUX_SRAM_ERASE</name>
|
|
<description>AUX_SRAM_ERASE</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>MCU_SRAM_ERASE</name>
|
|
<description>MCU_SRAM_ERASE</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CTL1</name>
|
|
<description>Control 1
|
|
|
|
This register contains various chip level control and debug bitfields.
|
|
</description>
|
|
<addressOffset>36</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>MCU_RESET_SRC</name>
|
|
<description>MCU_RESET_SRC</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>MCU_WARM_RESET</name>
|
|
<description>MCU_WARM_RESET</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RECHARGECFG</name>
|
|
<description>Recharge Controller Configuration
|
|
|
|
This register sets all relevant patameters for controlling the recharge algorithm.
|
|
</description>
|
|
<addressOffset>48</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>ADAPTIVE_EN</name>
|
|
<description>ADAPTIVE_EN</description>
|
|
<bitRange>[31:31]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>C2</name>
|
|
<description>C2</description>
|
|
<bitRange>[23:20]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>C1</name>
|
|
<description>C1</description>
|
|
<bitRange>[19:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>MAX_PER_M</name>
|
|
<description>MAX_PER_M</description>
|
|
<bitRange>[15:11]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>MAX_PER_E</name>
|
|
<description>MAX_PER_E</description>
|
|
<bitRange>[10:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PER_M</name>
|
|
<description>PER_M</description>
|
|
<bitRange>[7:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PER_E</name>
|
|
<description>PER_E</description>
|
|
<bitRange>[2:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RECHARGESTAT</name>
|
|
<description>Recharge Controller Status
|
|
|
|
This register controls various status registers which are updated during recharge. The register is mostly intended for test and debug.
|
|
</description>
|
|
<addressOffset>52</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>VDDR_SMPLS</name>
|
|
<description>VDDR_SMPLS</description>
|
|
<bitRange>[19:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>MAX_USED_PER</name>
|
|
<description>MAX_USED_PER</description>
|
|
<bitRange>[15:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>OSCCFG</name>
|
|
<description>Oscillator Configuration
|
|
|
|
This register sets the period for Amplitude compensation requests sent to the oscillator control system. The amplitude compensations is only applicable when XOSC_HF is running in low power mode. </description>
|
|
<addressOffset>56</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>PER_M</name>
|
|
<description>PER_M</description>
|
|
<bitRange>[7:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PER_E</name>
|
|
<description>PER_E</description>
|
|
<bitRange>[2:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>JTAGCFG</name>
|
|
<description>JTAG Configuration
|
|
|
|
This register contains control for configuration of the JTAG domain,- hereunder access permissions for each TAP. </description>
|
|
<addressOffset>64</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000100</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>JTAG_PD_FORCE_ON</name>
|
|
<description>JTAG_PD_FORCE_ON</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>JTAGUSERCODE</name>
|
|
<description>JTAG USERCODE
|
|
|
|
Boot code copies the JTAG USERCODE to this register from where it is forwarded to the debug subsystem.</description>
|
|
<addressOffset>68</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x0b99a02f</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>USER_CODE</name>
|
|
<description>USER_CODE</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral><peripheral>
|
|
<name>AUX_ADI4</name>
|
|
<description>Configuration registers controlling analog peripherals of AUX. Registers Fields should be considered static unless otherwise noted (as dynamic)</description>
|
|
<baseAddress>0x400cb000</baseAddress>
|
|
<size>8</size><addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x10</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<registers>
|
|
<register>
|
|
<name>MUX0</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>0</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>COMPA_IN</name>
|
|
<description>COMPA_IN</description>
|
|
<bitRange>[7:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>COMPA_REF</name>
|
|
<description>COMPA_REF</description>
|
|
<bitRange>[3:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>MUX1</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>1</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>COMPA_IN</name>
|
|
<description>COMPA_IN</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>MUX2</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>2</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>ADCCOMPB_IN</name>
|
|
<description>ADCCOMPB_IN</description>
|
|
<bitRange>[7:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>COMPB_REF</name>
|
|
<description>COMPB_REF</description>
|
|
<bitRange>[2:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>MUX3</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>3</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>ADCCOMPB_IN</name>
|
|
<description>ADCCOMPB_IN</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>ISRC</name>
|
|
<description>Current Source
|
|
|
|
Strength and trim control for current source</description>
|
|
<addressOffset>4</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TRIM</name>
|
|
<description>TRIM</description>
|
|
<bitRange>[7:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EN</name>
|
|
<description>EN</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>COMP</name>
|
|
<description>Comparator
|
|
|
|
Control COMPA and COMPB comparators</description>
|
|
<addressOffset>5</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>COMPA_REF_RES_EN</name>
|
|
<description>COMPA_REF_RES_EN</description>
|
|
<bitRange>[7:7]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>COMPA_REF_CURR_EN</name>
|
|
<description>COMPA_REF_CURR_EN</description>
|
|
<bitRange>[6:6]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>COMPB_TRIM</name>
|
|
<description>COMPB_TRIM</description>
|
|
<bitRange>[5:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>COMPB_EN</name>
|
|
<description>COMPB_EN</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>COMPA_EN</name>
|
|
<description>COMPA_EN</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>MUX4</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>7</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>COMPA_REF</name>
|
|
<description>COMPA_REF</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>ADC0</name>
|
|
<description>ADC Control 0</description>
|
|
<addressOffset>8</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SMPL_MODE</name>
|
|
<description>SMPL_MODE</description>
|
|
<bitRange>[7:7]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SMPL_CYCLE_EXP</name>
|
|
<description>SMPL_CYCLE_EXP</description>
|
|
<bitRange>[6:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RESET_N</name>
|
|
<description>RESET_N</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EN</name>
|
|
<description>EN</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>ADC1</name>
|
|
<description>ADC Control 1</description>
|
|
<addressOffset>9</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SCALE_DIS</name>
|
|
<description>SCALE_DIS</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>ADCREF0</name>
|
|
<description>ADC Reference 0
|
|
|
|
Control reference used by the ADC</description>
|
|
<addressOffset>10</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>REF_ON_IDLE</name>
|
|
<description>REF_ON_IDLE</description>
|
|
<bitRange>[6:6]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOMUX</name>
|
|
<description>IOMUX</description>
|
|
<bitRange>[5:5]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EXT</name>
|
|
<description>EXT</description>
|
|
<bitRange>[4:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SRC</name>
|
|
<description>SRC</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EN</name>
|
|
<description>EN</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>ADCREF1</name>
|
|
<description>ADC Reference 1
|
|
|
|
Control reference used by the ADC</description>
|
|
<addressOffset>11</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>VTRIM</name>
|
|
<description>VTRIM</description>
|
|
<bitRange>[5:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral><peripheral>
|
|
<name>AUX_AIODIO0</name>
|
|
<description>AUX Analog/Digital Input Output Controller </description>
|
|
<baseAddress>0x400c1000</baseAddress>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>4096</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<registers>
|
|
<register>
|
|
<name>GPIODOUT</name>
|
|
<description>General Purpose Input/Output Data Out
|
|
|
|
This register is used to set data on the pads assigned to AUX</description>
|
|
<addressOffset>0</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IO7_0</name>
|
|
<description>IO7_0</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IOMODE</name>
|
|
<description>Input Output Mode
|
|
|
|
Controls pull-up pull-down and output mode for the IO pins assigned to AUX</description>
|
|
<addressOffset>4</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IO7</name>
|
|
<description>IO7</description>
|
|
<bitRange>[15:14]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IO6</name>
|
|
<description>IO6</description>
|
|
<bitRange>[13:12]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IO5</name>
|
|
<description>IO5</description>
|
|
<bitRange>[11:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IO4</name>
|
|
<description>IO4</description>
|
|
<bitRange>[9:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IO3</name>
|
|
<description>IO3</description>
|
|
<bitRange>[7:6]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IO2</name>
|
|
<description>IO2</description>
|
|
<bitRange>[5:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IO1</name>
|
|
<description>IO1</description>
|
|
<bitRange>[3:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IO0</name>
|
|
<description>IO0</description>
|
|
<bitRange>[1:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>GPIODIN</name>
|
|
<description>General Purpose Input Output Data In</description>
|
|
<addressOffset>8</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IO7_0</name>
|
|
<description>IO7_0</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>GPIODOUTSET</name>
|
|
<description>General Purpose Input Output Data Out Set
|
|
|
|
Strobes for setting output data register bits</description>
|
|
<addressOffset>12</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IO7_0</name>
|
|
<description>IO7_0</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>GPIODOUTCLR</name>
|
|
<description>General Purpose Input Output Data Out Clear
|
|
|
|
Strobes for clearing output data register bits</description>
|
|
<addressOffset>16</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IO7_0</name>
|
|
<description>IO7_0</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>GPIODOUTTGL</name>
|
|
<description>General Purpose Input Output Data Out Toggle
|
|
|
|
Strobes for toggling output data register bits</description>
|
|
<addressOffset>20</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IO7_0</name>
|
|
<description>IO7_0</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>GPIODIE</name>
|
|
<description>General Purpose Input Output Input Enable</description>
|
|
<addressOffset>24</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IO7_0</name>
|
|
<description>IO7_0</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral><peripheral>
|
|
<name>AUX_AIODIO1</name>
|
|
<description>AUX Analog/Digital Input Output Controller </description>
|
|
<baseAddress>0x400c2000</baseAddress>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>4096</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<registers>
|
|
<register>
|
|
<name>GPIODOUT</name>
|
|
<description>General Purpose Input/Output Data Out
|
|
|
|
This register is used to set data on the pads assigned to AUX</description>
|
|
<addressOffset>0</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IO7_0</name>
|
|
<description>IO7_0</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IOMODE</name>
|
|
<description>Input Output Mode
|
|
|
|
Controls pull-up pull-down and output mode for the IO pins assigned to AUX</description>
|
|
<addressOffset>4</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IO7</name>
|
|
<description>IO7</description>
|
|
<bitRange>[15:14]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IO6</name>
|
|
<description>IO6</description>
|
|
<bitRange>[13:12]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IO5</name>
|
|
<description>IO5</description>
|
|
<bitRange>[11:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IO4</name>
|
|
<description>IO4</description>
|
|
<bitRange>[9:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IO3</name>
|
|
<description>IO3</description>
|
|
<bitRange>[7:6]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IO2</name>
|
|
<description>IO2</description>
|
|
<bitRange>[5:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IO1</name>
|
|
<description>IO1</description>
|
|
<bitRange>[3:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IO0</name>
|
|
<description>IO0</description>
|
|
<bitRange>[1:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>GPIODIN</name>
|
|
<description>General Purpose Input Output Data In</description>
|
|
<addressOffset>8</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IO7_0</name>
|
|
<description>IO7_0</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>GPIODOUTSET</name>
|
|
<description>General Purpose Input Output Data Out Set
|
|
|
|
Strobes for setting output data register bits</description>
|
|
<addressOffset>12</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IO7_0</name>
|
|
<description>IO7_0</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>GPIODOUTCLR</name>
|
|
<description>General Purpose Input Output Data Out Clear
|
|
|
|
Strobes for clearing output data register bits</description>
|
|
<addressOffset>16</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IO7_0</name>
|
|
<description>IO7_0</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>GPIODOUTTGL</name>
|
|
<description>General Purpose Input Output Data Out Toggle
|
|
|
|
Strobes for toggling output data register bits</description>
|
|
<addressOffset>20</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IO7_0</name>
|
|
<description>IO7_0</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>GPIODIE</name>
|
|
<description>General Purpose Input Output Input Enable</description>
|
|
<addressOffset>24</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IO7_0</name>
|
|
<description>IO7_0</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral><peripheral>
|
|
<name>AUX_ANAIF</name>
|
|
<description>AUX Analog Peripheral Control Module
|
|
|
|
</description>
|
|
<baseAddress>0x400c9000</baseAddress>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>4096</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<registers>
|
|
<register>
|
|
<name>ADCCTL</name>
|
|
<description>ADC Control</description>
|
|
<addressOffset>16</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>START_POL</name>
|
|
<description>START_POL</description>
|
|
<bitRange>[13:13]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>START_SRC</name>
|
|
<description>START_SRC</description>
|
|
<bitRange>[12:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CMD</name>
|
|
<description>CMD</description>
|
|
<bitRange>[1:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>ADCFIFOSTAT</name>
|
|
<description>ADC FIFO Status
|
|
|
|
FIFO can hold up to four ADC samples</description>
|
|
<addressOffset>20</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>OVERFLOW</name>
|
|
<description>OVERFLOW</description>
|
|
<bitRange>[4:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>UNDERFLOW</name>
|
|
<description>UNDERFLOW</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>FULL</name>
|
|
<description>FULL</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>ALMOST_FULL</name>
|
|
<description>ALMOST_FULL</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EMPTY</name>
|
|
<description>EMPTY</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>ADCFIFO</name>
|
|
<description>ADC FIFO</description>
|
|
<addressOffset>24</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DATA</name>
|
|
<description>DATA</description>
|
|
<bitRange>[11:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>ADCTRIG</name>
|
|
<description>ADC Trigger</description>
|
|
<addressOffset>28</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>START</name>
|
|
<description>START</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>ISRCCTL</name>
|
|
<description>Current Source Control</description>
|
|
<addressOffset>32</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>RESET_N</name>
|
|
<description>RESET_N</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral><peripheral>
|
|
<name>AUX_DDI0_OSC</name>
|
|
<description>This is the DDI for the digital block that controls all the analog clock oscillators (OSC_DIG) and performs qualification of the clocks generated.</description>
|
|
<baseAddress>0x400ca000</baseAddress>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x40</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<registers>
|
|
<register>
|
|
<name>CTL0</name>
|
|
<description>Control 0
|
|
Controls various clock source selects</description>
|
|
<addressOffset>0</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>XTAL_IS_24M</name>
|
|
<description>XTAL_IS_24M</description>
|
|
<bitRange>[31:31]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>BYPASS_XOSC_LF_CLK_QUAL</name>
|
|
<description>BYPASS_XOSC_LF_CLK_QUAL</description>
|
|
<bitRange>[29:29]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>BYPASS_RCOSC_LF_CLK_QUAL</name>
|
|
<description>BYPASS_RCOSC_LF_CLK_QUAL</description>
|
|
<bitRange>[28:28]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DOUBLER_START_DURATION</name>
|
|
<description>DOUBLER_START_DURATION</description>
|
|
<bitRange>[27:26]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DOUBLER_RESET_DURATION</name>
|
|
<description>DOUBLER_RESET_DURATION</description>
|
|
<bitRange>[25:25]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>FORCE_KICKSTART_EN</name>
|
|
<description>FORCE_KICKSTART_EN</description>
|
|
<bitRange>[22:22]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>ALLOW_SCLK_HF_SWITCHING</name>
|
|
<description>ALLOW_SCLK_HF_SWITCHING</description>
|
|
<bitRange>[16:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RCOSC_LF_TRIMMED</name>
|
|
<description>RCOSC_LF_TRIMMED</description>
|
|
<bitRange>[12:12]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>XOSC_HF_POWER_MODE</name>
|
|
<description>XOSC_HF_POWER_MODE</description>
|
|
<bitRange>[11:11]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>XOSC_LF_DIG_BYPASS</name>
|
|
<description>XOSC_LF_DIG_BYPASS</description>
|
|
<bitRange>[10:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CLK_LOSS_EN</name>
|
|
<description>CLK_LOSS_EN</description>
|
|
<bitRange>[9:9]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>ACLK_TDC_SRC_SEL</name>
|
|
<description>ACLK_TDC_SRC_SEL</description>
|
|
<bitRange>[8:7]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>ACLK_REF_SRC_SEL</name>
|
|
<description>ACLK_REF_SRC_SEL</description>
|
|
<bitRange>[6:5]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SCLK_LF_SRC_SEL</name>
|
|
<description>SCLK_LF_SRC_SEL</description>
|
|
<bitRange>[3:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SCLK_MF_SRC_SEL</name>
|
|
<description>SCLK_MF_SRC_SEL</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SCLK_HF_SRC_SEL</name>
|
|
<description>SCLK_HF_SRC_SEL</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CTL1</name>
|
|
<description>Control 1
|
|
This register contains various OSC_DIG configuration</description>
|
|
<addressOffset>4</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>RCOSCHFCTRIMFRACT</name>
|
|
<description>RCOSCHFCTRIMFRACT</description>
|
|
<bitRange>[22:18]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RCOSCHFCTRIMFRACT_EN</name>
|
|
<description>RCOSCHFCTRIMFRACT_EN</description>
|
|
<bitRange>[17:17]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>XOSC_HF_FAST_START</name>
|
|
<description>XOSC_HF_FAST_START</description>
|
|
<bitRange>[1:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RADCEXTCFG</name>
|
|
<description>RADC External Configuration
|
|
|
|
</description>
|
|
<addressOffset>8</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>HPM_IBIAS_WAIT_CNT</name>
|
|
<description>HPM_IBIAS_WAIT_CNT</description>
|
|
<bitRange>[31:22]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>LPM_IBIAS_WAIT_CNT</name>
|
|
<description>LPM_IBIAS_WAIT_CNT</description>
|
|
<bitRange>[21:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IDAC_STEP</name>
|
|
<description>IDAC_STEP</description>
|
|
<bitRange>[15:12]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RADC_DAC_TH</name>
|
|
<description>RADC_DAC_TH</description>
|
|
<bitRange>[11:6]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RADC_MODE_IS_SAR</name>
|
|
<description>RADC_MODE_IS_SAR</description>
|
|
<bitRange>[5:5]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>AMPCOMPCTL</name>
|
|
<description>Amplitude Compensation Control
|
|
|
|
</description>
|
|
<addressOffset>12</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>AMPCOMP_REQ_MODE</name>
|
|
<description>AMPCOMP_REQ_MODE</description>
|
|
<bitRange>[30:30]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>AMPCOMP_FSM_UPDATE_RATE</name>
|
|
<description>AMPCOMP_FSM_UPDATE_RATE</description>
|
|
<bitRange>[29:28]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>AMPCOMP_SW_CTRL</name>
|
|
<description>AMPCOMP_SW_CTRL</description>
|
|
<bitRange>[27:27]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>AMPCOMP_SW_EN</name>
|
|
<description>AMPCOMP_SW_EN</description>
|
|
<bitRange>[26:26]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IBIAS_OFFSET</name>
|
|
<description>IBIAS_OFFSET</description>
|
|
<bitRange>[23:20]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IBIAS_INIT</name>
|
|
<description>IBIAS_INIT</description>
|
|
<bitRange>[19:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>LPM_IBIAS_WAIT_CNT_FINAL</name>
|
|
<description>LPM_IBIAS_WAIT_CNT_FINAL</description>
|
|
<bitRange>[15:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CAP_STEP</name>
|
|
<description>CAP_STEP</description>
|
|
<bitRange>[7:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IBIASCAP_HPTOLP_OL_CNT</name>
|
|
<description>IBIASCAP_HPTOLP_OL_CNT</description>
|
|
<bitRange>[3:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>AMPCOMPTH1</name>
|
|
<description>Amplitude Compensation Threashold 1
|
|
This register contains various threshhold values for amplitude compensation algorithm
|
|
|
|
</description>
|
|
<addressOffset>16</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>HPMRAMP3_LTH</name>
|
|
<description>HPMRAMP3_LTH</description>
|
|
<bitRange>[23:18]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>HPMRAMP3_HTH</name>
|
|
<description>HPMRAMP3_HTH</description>
|
|
<bitRange>[15:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IBIASCAP_LPTOHP_OL_CNT</name>
|
|
<description>IBIASCAP_LPTOHP_OL_CNT</description>
|
|
<bitRange>[9:6]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>HPMRAMP1_TH</name>
|
|
<description>HPMRAMP1_TH</description>
|
|
<bitRange>[5:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>AMPCOMPTH2</name>
|
|
<description>Amplitude Compensation Threashold 2
|
|
This register contains various threshhold values for amplitude compensation algorithm.
|
|
|
|
</description>
|
|
<addressOffset>20</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LPMUPDATE_LTH</name>
|
|
<description>LPMUPDATE_LTH</description>
|
|
<bitRange>[31:26]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>LPMUPDATE_HTH</name>
|
|
<description>LPMUPDATE_HTH</description>
|
|
<bitRange>[23:18]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>ADC_COMP_AMPTH_LPM</name>
|
|
<description>ADC_COMP_AMPTH_LPM</description>
|
|
<bitRange>[15:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>ADC_COMP_AMPTH_HPM</name>
|
|
<description>ADC_COMP_AMPTH_HPM</description>
|
|
<bitRange>[7:2]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>ANABYPASSVAL1</name>
|
|
<description>Analog Bypass Values 1
|
|
</description>
|
|
<addressOffset>24</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>XOSC_HF_ROW_Q12</name>
|
|
<description>XOSC_HF_ROW_Q12</description>
|
|
<bitRange>[19:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>XOSC_HF_COLUMN_Q12</name>
|
|
<description>XOSC_HF_COLUMN_Q12</description>
|
|
<bitRange>[15:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>ANABYPASSVAL2</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>28</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>XOSC_HF_IBIASTHERM</name>
|
|
<description>XOSC_HF_IBIASTHERM</description>
|
|
<bitRange>[13:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>ATESTCTL</name>
|
|
<description>Analog Test Control
|
|
|
|
</description>
|
|
<addressOffset>32</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SCLK_LF_AUX_EN</name>
|
|
<description>SCLK_LF_AUX_EN</description>
|
|
<bitRange>[29:29]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>ADCDOUBLERNANOAMPCTL</name>
|
|
<description>ADC Doubler Nanoamp Control
|
|
|
|
</description>
|
|
<addressOffset>36</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>NANOAMP_BIAS_ENABLE</name>
|
|
<description>NANOAMP_BIAS_ENABLE</description>
|
|
<bitRange>[24:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SPARE23</name>
|
|
<description>SPARE23</description>
|
|
<bitRange>[23:23]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>ADC_SH_MODE_EN</name>
|
|
<description>ADC_SH_MODE_EN</description>
|
|
<bitRange>[5:5]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>ADC_SH_VBUF_EN</name>
|
|
<description>ADC_SH_VBUF_EN</description>
|
|
<bitRange>[4:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>ADC_IREF_CTRL</name>
|
|
<description>ADC_IREF_CTRL</description>
|
|
<bitRange>[1:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>XOSCHFCTL</name>
|
|
<description>XOSCHF Control
|
|
|
|
</description>
|
|
<addressOffset>40</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>PEAK_DET_ITRIM</name>
|
|
<description>PEAK_DET_ITRIM</description>
|
|
<bitRange>[9:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>BYPASS</name>
|
|
<description>BYPASS</description>
|
|
<bitRange>[6:6]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>HP_BUF_ITRIM</name>
|
|
<description>HP_BUF_ITRIM</description>
|
|
<bitRange>[4:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>LP_BUF_ITRIM</name>
|
|
<description>LP_BUF_ITRIM</description>
|
|
<bitRange>[1:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>LFOSCCTL</name>
|
|
<description>Low Frequency Oscillator Control
|
|
|
|
</description>
|
|
<addressOffset>44</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>XOSCLF_REGULATOR_TRIM</name>
|
|
<description>XOSCLF_REGULATOR_TRIM</description>
|
|
<bitRange>[23:22]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>XOSCLF_CMIRRWR_RATIO</name>
|
|
<description>XOSCLF_CMIRRWR_RATIO</description>
|
|
<bitRange>[21:18]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RCOSCLF_RTUNE_TRIM</name>
|
|
<description>RCOSCLF_RTUNE_TRIM</description>
|
|
<bitRange>[9:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RCOSCLF_CTUNE_TRIM</name>
|
|
<description>RCOSCLF_CTUNE_TRIM</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RCOSCHFCTL</name>
|
|
<description>RCOSCHF Control
|
|
|
|
</description>
|
|
<addressOffset>48</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>RCOSCHF_CTRIM</name>
|
|
<description>RCOSCHF_CTRIM</description>
|
|
<bitRange>[15:8]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>STAT0</name>
|
|
<description>Status 0
|
|
This register contains status signals from OSC_DIG
|
|
|
|
</description>
|
|
<addressOffset>52</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SCLK_LF_SRC</name>
|
|
<description>SCLK_LF_SRC</description>
|
|
<bitRange>[30:29]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SCLK_HF_SRC</name>
|
|
<description>SCLK_HF_SRC</description>
|
|
<bitRange>[28:28]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RCOSC_HF_EN</name>
|
|
<description>RCOSC_HF_EN</description>
|
|
<bitRange>[22:22]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RCOSC_LF_EN</name>
|
|
<description>RCOSC_LF_EN</description>
|
|
<bitRange>[21:21]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>XOSC_LF_EN</name>
|
|
<description>XOSC_LF_EN</description>
|
|
<bitRange>[20:20]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CLK_DCDC_RDY</name>
|
|
<description>CLK_DCDC_RDY</description>
|
|
<bitRange>[19:19]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CLK_DCDC_RDY_ACK</name>
|
|
<description>CLK_DCDC_RDY_ACK</description>
|
|
<bitRange>[18:18]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SCLK_HF_LOSS</name>
|
|
<description>SCLK_HF_LOSS</description>
|
|
<bitRange>[17:17]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SCLK_LF_LOSS</name>
|
|
<description>SCLK_LF_LOSS</description>
|
|
<bitRange>[16:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>XOSC_HF_EN</name>
|
|
<description>XOSC_HF_EN</description>
|
|
<bitRange>[15:15]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>XB_48M_CLK_EN</name>
|
|
<description>XB_48M_CLK_EN</description>
|
|
<bitRange>[13:13]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>XOSC_HF_LP_BUF_EN</name>
|
|
<description>XOSC_HF_LP_BUF_EN</description>
|
|
<bitRange>[11:11]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>XOSC_HF_HP_BUF_EN</name>
|
|
<description>XOSC_HF_HP_BUF_EN</description>
|
|
<bitRange>[10:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>ADC_THMET</name>
|
|
<description>ADC_THMET</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>ADC_DATA_READY</name>
|
|
<description>ADC_DATA_READY</description>
|
|
<bitRange>[7:7]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>ADC_DATA</name>
|
|
<description>ADC_DATA</description>
|
|
<bitRange>[6:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PENDINGSCLKHFSWITCHING</name>
|
|
<description>PENDINGSCLKHFSWITCHING</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>STAT1</name>
|
|
<description>Status 1
|
|
This register contains status signals from OSC_DIG
|
|
|
|
</description>
|
|
<addressOffset>56</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>RAMPSTATE</name>
|
|
<description>RAMPSTATE</description>
|
|
<bitRange>[31:28]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>HMP_UPDATE_AMP</name>
|
|
<description>HMP_UPDATE_AMP</description>
|
|
<bitRange>[27:22]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>LPM_UPDATE_AMP</name>
|
|
<description>LPM_UPDATE_AMP</description>
|
|
<bitRange>[21:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>FORCE_RCOSC_HF</name>
|
|
<description>FORCE_RCOSC_HF</description>
|
|
<bitRange>[15:15]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SCLK_HF_EN</name>
|
|
<description>SCLK_HF_EN</description>
|
|
<bitRange>[14:14]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SCLK_MF_EN</name>
|
|
<description>SCLK_MF_EN</description>
|
|
<bitRange>[13:13]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>ACLK_ADC_EN</name>
|
|
<description>ACLK_ADC_EN</description>
|
|
<bitRange>[12:12]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>ACLK_TDC_EN</name>
|
|
<description>ACLK_TDC_EN</description>
|
|
<bitRange>[11:11]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>ACLK_REF_EN</name>
|
|
<description>ACLK_REF_EN</description>
|
|
<bitRange>[10:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CLK_CHP_EN</name>
|
|
<description>CLK_CHP_EN</description>
|
|
<bitRange>[9:9]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CLK_DCDC_EN</name>
|
|
<description>CLK_DCDC_EN</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SCLK_HF_GOOD</name>
|
|
<description>SCLK_HF_GOOD</description>
|
|
<bitRange>[7:7]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SCLK_MF_GOOD</name>
|
|
<description>SCLK_MF_GOOD</description>
|
|
<bitRange>[6:6]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SCLK_LF_GOOD</name>
|
|
<description>SCLK_LF_GOOD</description>
|
|
<bitRange>[5:5]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>ACLK_ADC_GOOD</name>
|
|
<description>ACLK_ADC_GOOD</description>
|
|
<bitRange>[4:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>ACLK_TDC_GOOD</name>
|
|
<description>ACLK_TDC_GOOD</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>ACLK_REF_GOOD</name>
|
|
<description>ACLK_REF_GOOD</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CLK_CHP_GOOD</name>
|
|
<description>CLK_CHP_GOOD</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CLK_DCDC_GOOD</name>
|
|
<description>CLK_DCDC_GOOD</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>STAT2</name>
|
|
<description>Status 2
|
|
This register contains status signals from AMPCOMP FSM
|
|
|
|
</description>
|
|
<addressOffset>60</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>ADC_DCBIAS</name>
|
|
<description>ADC_DCBIAS</description>
|
|
<bitRange>[31:26]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>HPM_RAMP1_THMET</name>
|
|
<description>HPM_RAMP1_THMET</description>
|
|
<bitRange>[25:25]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>HPM_RAMP2_THMET</name>
|
|
<description>HPM_RAMP2_THMET</description>
|
|
<bitRange>[24:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>HPM_RAMP3_THMET</name>
|
|
<description>HPM_RAMP3_THMET</description>
|
|
<bitRange>[23:23]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RAMPSTATE</name>
|
|
<description>RAMPSTATE</description>
|
|
<bitRange>[15:12]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>AMPCOMP_REQ</name>
|
|
<description>AMPCOMP_REQ</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>XOSC_HF_AMPGOOD</name>
|
|
<description>XOSC_HF_AMPGOOD</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>XOSC_HF_FREQGOOD</name>
|
|
<description>XOSC_HF_FREQGOOD</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>XOSC_HF_RF_FREQGOOD</name>
|
|
<description>XOSC_HF_RF_FREQGOOD</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral><peripheral>
|
|
<name>AUX_EVCTL</name>
|
|
<description>AUX Event Controller </description>
|
|
<baseAddress>0x400c5000</baseAddress>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>4096</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<registers>
|
|
<register>
|
|
<name>VECCFG0</name>
|
|
<description>Vector Configuration 0
|
|
|
|
AUX_SCE event vectors 0 and 1 configuration</description>
|
|
<addressOffset>0</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>VEC1_POL</name>
|
|
<description>VEC1_POL</description>
|
|
<bitRange>[14:14]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>VEC1_EN</name>
|
|
<description>VEC1_EN</description>
|
|
<bitRange>[13:13]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>VEC1_EV</name>
|
|
<description>VEC1_EV</description>
|
|
<bitRange>[12:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>VEC0_POL</name>
|
|
<description>VEC0_POL</description>
|
|
<bitRange>[6:6]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>VEC0_EN</name>
|
|
<description>VEC0_EN</description>
|
|
<bitRange>[5:5]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>VEC0_EV</name>
|
|
<description>VEC0_EV</description>
|
|
<bitRange>[4:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>VECCFG1</name>
|
|
<description>Vector Configuration 1
|
|
|
|
AUX_SCE event vectors 2 and 3 configuration</description>
|
|
<addressOffset>4</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>VEC3_POL</name>
|
|
<description>VEC3_POL</description>
|
|
<bitRange>[14:14]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>VEC3_EN</name>
|
|
<description>VEC3_EN</description>
|
|
<bitRange>[13:13]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>VEC3_EV</name>
|
|
<description>VEC3_EV</description>
|
|
<bitRange>[12:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>VEC2_POL</name>
|
|
<description>VEC2_POL</description>
|
|
<bitRange>[6:6]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>VEC2_EN</name>
|
|
<description>VEC2_EN</description>
|
|
<bitRange>[5:5]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>VEC2_EV</name>
|
|
<description>VEC2_EV</description>
|
|
<bitRange>[4:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SCEWEVSEL</name>
|
|
<description>Sensor Controller Engine Wait Event Selection
|
|
|
|
Event selection for the AUX_SCE WEV0, WEV1, BEV0 and BEV1 instructions</description>
|
|
<addressOffset>8</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>WEV7_EV</name>
|
|
<description>WEV7_EV</description>
|
|
<bitRange>[4:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>EVTOAONFLAGS</name>
|
|
<description>Events To AON Domain Flags
|
|
|
|
AUX event flags going to/through the AON domain
|
|
|
|
These events may be used to wake up the MCU domain.
|
|
|
|
The flags may be cleared by writing 0 to these bits or writing 1 to the corresponding bits in EVTOAONFLAGSCLR.</description>
|
|
<addressOffset>12</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TIMER1_EV</name>
|
|
<description>TIMER1_EV</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
<modifiedWriteValues>zeroToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>TIMER0_EV</name>
|
|
<description>TIMER0_EV</description>
|
|
<bitRange>[7:7]</bitRange>
|
|
<modifiedWriteValues>zeroToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>TDC_DONE</name>
|
|
<description>TDC_DONE</description>
|
|
<bitRange>[6:6]</bitRange>
|
|
<modifiedWriteValues>zeroToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>ADC_DONE</name>
|
|
<description>ADC_DONE</description>
|
|
<bitRange>[5:5]</bitRange>
|
|
<modifiedWriteValues>zeroToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>AUX_COMPB</name>
|
|
<description>AUX_COMPB</description>
|
|
<bitRange>[4:4]</bitRange>
|
|
<modifiedWriteValues>zeroToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>AUX_COMPA</name>
|
|
<description>AUX_COMPA</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
<modifiedWriteValues>zeroToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>SWEV2</name>
|
|
<description>SWEV2</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
<modifiedWriteValues>zeroToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>SWEV1</name>
|
|
<description>SWEV1</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
<modifiedWriteValues>zeroToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>SWEV0</name>
|
|
<description>SWEV0</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
<modifiedWriteValues>zeroToClear</modifiedWriteValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>EVTOAONPOL</name>
|
|
<description>Events To AON Domain Polarity
|
|
|
|
AUX event source polarity for the event flags going to/through the AON domain
|
|
|
|
Note the inverse polarity (0 = high, 1 = low).</description>
|
|
<addressOffset>16</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TIMER1_EV</name>
|
|
<description>TIMER1_EV</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TIMER0_EV</name>
|
|
<description>TIMER0_EV</description>
|
|
<bitRange>[7:7]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TDC_DONE</name>
|
|
<description>TDC_DONE</description>
|
|
<bitRange>[6:6]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>ADC_DONE</name>
|
|
<description>ADC_DONE</description>
|
|
<bitRange>[5:5]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>AUX_COMPB</name>
|
|
<description>AUX_COMPB</description>
|
|
<bitRange>[4:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>AUX_COMPA</name>
|
|
<description>AUX_COMPA</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DMACTL</name>
|
|
<description>Direct Memory Access Control</description>
|
|
<addressOffset>20</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>REQ_MODE</name>
|
|
<description>REQ_MODE</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EN</name>
|
|
<description>EN</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SEL</name>
|
|
<description>SEL</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SWEVSET</name>
|
|
<description>Software Event Set
|
|
|
|
Strobes for setting software events from the AUX domain to the AON/MCU Domains
|
|
|
|
The use of these events is software-defined.</description>
|
|
<addressOffset>24</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SWEV2</name>
|
|
<description>SWEV2</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SWEV1</name>
|
|
<description>SWEV1</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SWEV0</name>
|
|
<description>SWEV0</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>EVSTAT0</name>
|
|
<description>Event Status 0
|
|
|
|
Current event source levels, 15:0</description>
|
|
<addressOffset>28</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>AUXIO2</name>
|
|
<description>AUXIO2</description>
|
|
<bitRange>[15:15]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>AUXIO1</name>
|
|
<description>AUXIO1</description>
|
|
<bitRange>[14:14]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>AUXIO0</name>
|
|
<description>AUXIO0</description>
|
|
<bitRange>[13:13]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>AON_PROG_WU</name>
|
|
<description>AON_PROG_WU</description>
|
|
<bitRange>[12:12]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>AON_SW</name>
|
|
<description>AON_SW</description>
|
|
<bitRange>[11:11]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>OBSMUX1</name>
|
|
<description>OBSMUX1</description>
|
|
<bitRange>[10:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>OBSMUX0</name>
|
|
<description>OBSMUX0</description>
|
|
<bitRange>[9:9]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>ADC_FIFO_ALMOST_FULL</name>
|
|
<description>ADC_FIFO_ALMOST_FULL</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>ADC_DONE</name>
|
|
<description>ADC_DONE</description>
|
|
<bitRange>[7:7]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SMPH_AUTOTAKE_DONE</name>
|
|
<description>SMPH_AUTOTAKE_DONE</description>
|
|
<bitRange>[6:6]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TIMER1_EV</name>
|
|
<description>TIMER1_EV</description>
|
|
<bitRange>[5:5]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TIMER0_EV</name>
|
|
<description>TIMER0_EV</description>
|
|
<bitRange>[4:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TDC_DONE</name>
|
|
<description>TDC_DONE</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>AUX_COMPB</name>
|
|
<description>AUX_COMPB</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>AUX_COMPA</name>
|
|
<description>AUX_COMPA</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>AON_RTC_CH2</name>
|
|
<description>AON_RTC_CH2</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>EVSTAT1</name>
|
|
<description>Event Status 1
|
|
|
|
Current event source levels, 31:16</description>
|
|
<addressOffset>32</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>ADC_IRQ</name>
|
|
<description>ADC_IRQ</description>
|
|
<bitRange>[15:15]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>MCU_EV</name>
|
|
<description>MCU_EV</description>
|
|
<bitRange>[14:14]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>ACLK_REF</name>
|
|
<description>ACLK_REF</description>
|
|
<bitRange>[13:13]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>AUXIO15</name>
|
|
<description>AUXIO15</description>
|
|
<bitRange>[12:12]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>AUXIO14</name>
|
|
<description>AUXIO14</description>
|
|
<bitRange>[11:11]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>AUXIO13</name>
|
|
<description>AUXIO13</description>
|
|
<bitRange>[10:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>AUXIO12</name>
|
|
<description>AUXIO12</description>
|
|
<bitRange>[9:9]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>AUXIO11</name>
|
|
<description>AUXIO11</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>AUXIO10</name>
|
|
<description>AUXIO10</description>
|
|
<bitRange>[7:7]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>AUXIO9</name>
|
|
<description>AUXIO9</description>
|
|
<bitRange>[6:6]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>AUXIO8</name>
|
|
<description>AUXIO8</description>
|
|
<bitRange>[5:5]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>AUXIO7</name>
|
|
<description>AUXIO7</description>
|
|
<bitRange>[4:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>AUXIO6</name>
|
|
<description>AUXIO6</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>AUXIO5</name>
|
|
<description>AUXIO5</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>AUXIO4</name>
|
|
<description>AUXIO4</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>AUXIO3</name>
|
|
<description>AUXIO3</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>EVTOMCUPOL</name>
|
|
<description>Event To MCU Domain Polarity
|
|
|
|
AUX event source polarity for the event flags to the MCU domain
|
|
|
|
Note the inverse polarity (0 = high, 1 = low).</description>
|
|
<addressOffset>36</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>ADC_IRQ</name>
|
|
<description>ADC_IRQ</description>
|
|
<bitRange>[10:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>OBSMUX0</name>
|
|
<description>OBSMUX0</description>
|
|
<bitRange>[9:9]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>ADC_FIFO_ALMOST_FULL</name>
|
|
<description>ADC_FIFO_ALMOST_FULL</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>ADC_DONE</name>
|
|
<description>ADC_DONE</description>
|
|
<bitRange>[7:7]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SMPH_AUTOTAKE_DONE</name>
|
|
<description>SMPH_AUTOTAKE_DONE</description>
|
|
<bitRange>[6:6]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TIMER1_EV</name>
|
|
<description>TIMER1_EV</description>
|
|
<bitRange>[5:5]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TIMER0_EV</name>
|
|
<description>TIMER0_EV</description>
|
|
<bitRange>[4:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TDC_DONE</name>
|
|
<description>TDC_DONE</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>AUX_COMPB</name>
|
|
<description>AUX_COMPB</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>AUX_COMPA</name>
|
|
<description>AUX_COMPA</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>AON_WU_EV</name>
|
|
<description>AON_WU_EV</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>EVTOMCUFLAGS</name>
|
|
<description>Events to MCU Domain Flags
|
|
|
|
AUX event flags going to the MCU domain
|
|
|
|
The flags may be cleared by writing 0 to these bits or writing 1 to the corresponding bits in EVTOMCUFLAGSCLR.</description>
|
|
<addressOffset>40</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>ADC_IRQ</name>
|
|
<description>ADC_IRQ</description>
|
|
<bitRange>[10:10]</bitRange>
|
|
<modifiedWriteValues>zeroToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>OBSMUX0</name>
|
|
<description>OBSMUX0</description>
|
|
<bitRange>[9:9]</bitRange>
|
|
<modifiedWriteValues>zeroToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>ADC_FIFO_ALMOST_FULL</name>
|
|
<description>ADC_FIFO_ALMOST_FULL</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
<modifiedWriteValues>zeroToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>ADC_DONE</name>
|
|
<description>ADC_DONE</description>
|
|
<bitRange>[7:7]</bitRange>
|
|
<modifiedWriteValues>zeroToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>SMPH_AUTOTAKE_DONE</name>
|
|
<description>SMPH_AUTOTAKE_DONE</description>
|
|
<bitRange>[6:6]</bitRange>
|
|
<modifiedWriteValues>zeroToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>TIMER1_EV</name>
|
|
<description>TIMER1_EV</description>
|
|
<bitRange>[5:5]</bitRange>
|
|
<modifiedWriteValues>zeroToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>TIMER0_EV</name>
|
|
<description>TIMER0_EV</description>
|
|
<bitRange>[4:4]</bitRange>
|
|
<modifiedWriteValues>zeroToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>TDC_DONE</name>
|
|
<description>TDC_DONE</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
<modifiedWriteValues>zeroToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>AUX_COMPB</name>
|
|
<description>AUX_COMPB</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
<modifiedWriteValues>zeroToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>AUX_COMPA</name>
|
|
<description>AUX_COMPA</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
<modifiedWriteValues>zeroToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>AON_WU_EV</name>
|
|
<description>AON_WU_EV</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
<modifiedWriteValues>zeroToClear</modifiedWriteValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>COMBEVTOMCUMASK</name>
|
|
<description>Combined Event To MCU Domain Mask
|
|
|
|
Selects which of the flags In EVTOMCUFLAGS that contribute to the AUX_COMB event to the MCU domain
|
|
|
|
The AUX_COMB event is asserted as long as one or more of the included event flags are set.</description>
|
|
<addressOffset>44</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>ADC_IRQ</name>
|
|
<description>ADC_IRQ</description>
|
|
<bitRange>[10:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>OBSMUX0</name>
|
|
<description>OBSMUX0</description>
|
|
<bitRange>[9:9]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>ADC_FIFO_ALMOST_FULL</name>
|
|
<description>ADC_FIFO_ALMOST_FULL</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>ADC_DONE</name>
|
|
<description>ADC_DONE</description>
|
|
<bitRange>[7:7]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SMPH_AUTOTAKE_DONE</name>
|
|
<description>SMPH_AUTOTAKE_DONE</description>
|
|
<bitRange>[6:6]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TIMER1_EV</name>
|
|
<description>TIMER1_EV</description>
|
|
<bitRange>[5:5]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TIMER0_EV</name>
|
|
<description>TIMER0_EV</description>
|
|
<bitRange>[4:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TDC_DONE</name>
|
|
<description>TDC_DONE</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>AUX_COMPB</name>
|
|
<description>AUX_COMPB</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>AUX_COMPA</name>
|
|
<description>AUX_COMPA</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>AON_WU_EV</name>
|
|
<description>AON_WU_EV</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>VECFLAGS</name>
|
|
<description>Vector Flags
|
|
|
|
If a vector flag has been set and AUX_SCE is sleeping, it will wake up and execute the vector. If multiple vectors have been set, the one with the lowest index will execute first, and the next after returning to sleep.
|
|
|
|
During execution of a vector, the flag must be cleared, by writing a 1 to the corresponding bit in VECFLAGSCLR. </description>
|
|
<addressOffset>52</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>VEC3</name>
|
|
<description>VEC3</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
<modifiedWriteValues>zeroToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>VEC2</name>
|
|
<description>VEC2</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
<modifiedWriteValues>zeroToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>VEC1</name>
|
|
<description>VEC1</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
<modifiedWriteValues>zeroToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>VEC0</name>
|
|
<description>VEC0</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
<modifiedWriteValues>zeroToClear</modifiedWriteValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>EVTOMCUFLAGSCLR</name>
|
|
<description>Events To MCU Domain Flags Clear
|
|
|
|
Strobes for clearing flags in EVTOMCUFLAGS.</description>
|
|
<addressOffset>56</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>ADC_IRQ</name>
|
|
<description>ADC_IRQ</description>
|
|
<bitRange>[10:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>OBSMUX0</name>
|
|
<description>OBSMUX0</description>
|
|
<bitRange>[9:9]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>ADC_FIFO_ALMOST_FULL</name>
|
|
<description>ADC_FIFO_ALMOST_FULL</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>ADC_DONE</name>
|
|
<description>ADC_DONE</description>
|
|
<bitRange>[7:7]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SMPH_AUTOTAKE_DONE</name>
|
|
<description>SMPH_AUTOTAKE_DONE</description>
|
|
<bitRange>[6:6]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TIMER1_EV</name>
|
|
<description>TIMER1_EV</description>
|
|
<bitRange>[5:5]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TIMER0_EV</name>
|
|
<description>TIMER0_EV</description>
|
|
<bitRange>[4:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TDC_DONE</name>
|
|
<description>TDC_DONE</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>AUX_COMPB</name>
|
|
<description>AUX_COMPB</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>AUX_COMPA</name>
|
|
<description>AUX_COMPA</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>AON_WU_EV</name>
|
|
<description>AON_WU_EV</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>EVTOAONFLAGSCLR</name>
|
|
<description>Events To AON Domain Clear
|
|
|
|
Strobes for clearing flags in EVTOAONFLAGS.</description>
|
|
<addressOffset>60</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TIMER1_EV</name>
|
|
<description>TIMER1_EV</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TIMER0_EV</name>
|
|
<description>TIMER0_EV</description>
|
|
<bitRange>[7:7]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TDC_DONE</name>
|
|
<description>TDC_DONE</description>
|
|
<bitRange>[6:6]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>ADC_DONE</name>
|
|
<description>ADC_DONE</description>
|
|
<bitRange>[5:5]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>AUX_COMPB</name>
|
|
<description>AUX_COMPB</description>
|
|
<bitRange>[4:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>AUX_COMPA</name>
|
|
<description>AUX_COMPA</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SWEV2</name>
|
|
<description>SWEV2</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SWEV1</name>
|
|
<description>SWEV1</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SWEV0</name>
|
|
<description>SWEV0</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>VECFLAGSCLR</name>
|
|
<description>Vector Flags Clear
|
|
|
|
Strobes for clearing flags in VECFLAGS.</description>
|
|
<addressOffset>64</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>VEC3</name>
|
|
<description>VEC3</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>VEC2</name>
|
|
<description>VEC2</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>VEC1</name>
|
|
<description>VEC1</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>VEC0</name>
|
|
<description>VEC0</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral><peripheral>
|
|
<name>AUX_SCE</name>
|
|
<description>AUX Sensor Control Engine Control Module
|
|
|
|
</description>
|
|
<baseAddress>0x400e1000</baseAddress>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>4096</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<registers>
|
|
<register>
|
|
<name>CTL</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>0</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FORCE_EV_LOW</name>
|
|
<description>FORCE_EV_LOW</description>
|
|
<bitRange>[31:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>FORCE_EV_HIGH</name>
|
|
<description>FORCE_EV_HIGH</description>
|
|
<bitRange>[23:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RESET_VECTOR</name>
|
|
<description>RESET_VECTOR</description>
|
|
<bitRange>[11:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DBG_FREEZE_EN</name>
|
|
<description>DBG_FREEZE_EN</description>
|
|
<bitRange>[6:6]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>FORCE_WU_LOW</name>
|
|
<description>FORCE_WU_LOW</description>
|
|
<bitRange>[5:5]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>FORCE_WU_HIGH</name>
|
|
<description>FORCE_WU_HIGH</description>
|
|
<bitRange>[4:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RESTART</name>
|
|
<description>RESTART</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SINGLE_STEP</name>
|
|
<description>SINGLE_STEP</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SUSPEND</name>
|
|
<description>SUSPEND</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CLK_EN</name>
|
|
<description>CLK_EN</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FETCHSTAT</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>4</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>OPCODE</name>
|
|
<description>OPCODE</description>
|
|
<bitRange>[31:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PC</name>
|
|
<description>PC</description>
|
|
<bitRange>[15:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CPUSTAT</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>8</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>BUS_ERROR</name>
|
|
<description>BUS_ERROR</description>
|
|
<bitRange>[11:11]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SLEEP</name>
|
|
<description>SLEEP</description>
|
|
<bitRange>[10:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WEV</name>
|
|
<description>WEV</description>
|
|
<bitRange>[9:9]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SELF_STOP</name>
|
|
<description>SELF_STOP</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>V_FLAG</name>
|
|
<description>V_FLAG</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>C_FLAG</name>
|
|
<description>C_FLAG</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>N_FLAG</name>
|
|
<description>N_FLAG</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>Z_FLAG</name>
|
|
<description>Z_FLAG</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>WUSTAT</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>12</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EXC_VECTOR</name>
|
|
<description>EXC_VECTOR</description>
|
|
<bitRange>[17:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WU_SIGNAL</name>
|
|
<description>WU_SIGNAL</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EV_SIGNALS</name>
|
|
<description>EV_SIGNALS</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG1_0</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>16</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>REG1</name>
|
|
<description>REG1</description>
|
|
<bitRange>[31:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>REG0</name>
|
|
<description>REG0</description>
|
|
<bitRange>[15:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG3_2</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>20</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>REG3</name>
|
|
<description>REG3</description>
|
|
<bitRange>[31:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>REG2</name>
|
|
<description>REG2</description>
|
|
<bitRange>[15:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG5_4</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>24</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>REG5</name>
|
|
<description>REG5</description>
|
|
<bitRange>[31:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>REG4</name>
|
|
<description>REG4</description>
|
|
<bitRange>[15:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REG7_6</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>28</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>REG7</name>
|
|
<description>REG7</description>
|
|
<bitRange>[31:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>REG6</name>
|
|
<description>REG6</description>
|
|
<bitRange>[15:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>LOOPADDR</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>32</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>STOP</name>
|
|
<description>STOP</description>
|
|
<bitRange>[31:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>START</name>
|
|
<description>START</description>
|
|
<bitRange>[15:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>LOOPCNT</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>36</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>ITER_LEFT</name>
|
|
<description>ITER_LEFT</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral><peripheral>
|
|
<name>AUX_SMPH</name>
|
|
<description>AUX Semaphore Controller
|
|
|
|
</description>
|
|
<baseAddress>0x400c8000</baseAddress>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>4096</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<registers>
|
|
<register>
|
|
<name>SMPH0</name>
|
|
<description>Semaphore 0</description>
|
|
<addressOffset>0</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>STAT</name>
|
|
<description>STAT</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SMPH1</name>
|
|
<description>Semaphore 1</description>
|
|
<addressOffset>4</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>STAT</name>
|
|
<description>STAT</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SMPH2</name>
|
|
<description>Semaphore 2</description>
|
|
<addressOffset>8</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>STAT</name>
|
|
<description>STAT</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SMPH3</name>
|
|
<description>Semaphore 3</description>
|
|
<addressOffset>12</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>STAT</name>
|
|
<description>STAT</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SMPH4</name>
|
|
<description>Semaphore 4</description>
|
|
<addressOffset>16</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>STAT</name>
|
|
<description>STAT</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SMPH5</name>
|
|
<description>Semaphore 5</description>
|
|
<addressOffset>20</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>STAT</name>
|
|
<description>STAT</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SMPH6</name>
|
|
<description>Semaphore 6</description>
|
|
<addressOffset>24</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>STAT</name>
|
|
<description>STAT</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SMPH7</name>
|
|
<description>Semaphore 7</description>
|
|
<addressOffset>28</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>STAT</name>
|
|
<description>STAT</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>AUTOTAKE</name>
|
|
<description>Sticky Request For Single Semaphore</description>
|
|
<addressOffset>32</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SMPH_ID</name>
|
|
<description>SMPH_ID</description>
|
|
<bitRange>[2:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral><peripheral>
|
|
<name>AUX_TDCIF</name>
|
|
<description>AUX Time To Digital Converter
|
|
|
|
</description>
|
|
<baseAddress>0x400c4000</baseAddress>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>4096</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<registers>
|
|
<register>
|
|
<name>CTL</name>
|
|
<description>Control</description>
|
|
<addressOffset>0</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CMD</name>
|
|
<description>CMD</description>
|
|
<bitRange>[1:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>STAT</name>
|
|
<description>Status</description>
|
|
<addressOffset>4</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000006</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SAT</name>
|
|
<description>SAT</description>
|
|
<bitRange>[7:7]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DONE</name>
|
|
<description>DONE</description>
|
|
<bitRange>[6:6]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>STATE</name>
|
|
<description>STATE</description>
|
|
<bitRange>[5:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RESULT</name>
|
|
<description>Result
|
|
|
|
Result of last TDC conversion</description>
|
|
<addressOffset>8</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000002</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>VALUE</name>
|
|
<description>VALUE</description>
|
|
<bitRange>[24:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SATCFG</name>
|
|
<description>Saturation Configuration</description>
|
|
<addressOffset>12</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000000f</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LIMIT</name>
|
|
<description>LIMIT</description>
|
|
<bitRange>[3:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TRIGSRC</name>
|
|
<description>Trigger Source
|
|
|
|
TDC start/stop trigger source selection</description>
|
|
<addressOffset>16</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>STOP_POL</name>
|
|
<description>STOP_POL</description>
|
|
<bitRange>[13:13]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>STOP_SRC</name>
|
|
<description>STOP_SRC</description>
|
|
<bitRange>[12:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>START_POL</name>
|
|
<description>START_POL</description>
|
|
<bitRange>[5:5]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>START_SRC</name>
|
|
<description>START_SRC</description>
|
|
<bitRange>[4:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TRIGCNT</name>
|
|
<description>Trigger Counter
|
|
|
|
Stop counter status/control of TDC</description>
|
|
<addressOffset>20</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CNT</name>
|
|
<description>CNT</description>
|
|
<bitRange>[15:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TRIGCNTLOAD</name>
|
|
<description>Trigger Counter Load
|
|
|
|
Stop counter control of TDC</description>
|
|
<addressOffset>24</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CNT</name>
|
|
<description>CNT</description>
|
|
<bitRange>[15:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TRIGCNTCFG</name>
|
|
<description>Trigger Counter Configuration</description>
|
|
<addressOffset>28</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EN</name>
|
|
<description>EN</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PRECTL</name>
|
|
<description>Prescaler Control
|
|
|
|
The prescaler can be used to count events that are faster than the AUX clock speed. It can be used standalone or as a start/stop source for the TDC by configuring TRIGSRC.START_SRC and TRIGSRC.STOP_SRC to TDC_PRE. When counting fast signals with the TDC that are faster than 1/10th of the clock frequency of AUX it is recommended to use the prescaler.
|
|
|
|
</description>
|
|
<addressOffset>32</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000001f</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>RESET_N</name>
|
|
<description>RESET_N</description>
|
|
<bitRange>[7:7]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RATIO</name>
|
|
<description>RATIO</description>
|
|
<bitRange>[6:6]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SRC</name>
|
|
<description>SRC</description>
|
|
<bitRange>[4:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PRECNT</name>
|
|
<description>Prescaler Counter
|
|
|
|
Value of prescaler counter</description>
|
|
<addressOffset>36</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CNT</name>
|
|
<description>CNT</description>
|
|
<bitRange>[15:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral><peripheral>
|
|
<name>AUX_TIMER</name>
|
|
<description>AUX Timer
|
|
|
|
</description>
|
|
<baseAddress>0x400c7000</baseAddress>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>4096</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<registers>
|
|
<register>
|
|
<name>T0CFG</name>
|
|
<description>Timer 0 Configuration
|
|
</description>
|
|
<addressOffset>0</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TICK_SRC_POL</name>
|
|
<description>TICK_SRC_POL</description>
|
|
<bitRange>[13:13]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TICK_SRC</name>
|
|
<description>TICK_SRC</description>
|
|
<bitRange>[12:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PRE</name>
|
|
<description>PRE</description>
|
|
<bitRange>[7:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>MODE</name>
|
|
<description>MODE</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RELOAD</name>
|
|
<description>RELOAD</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>T1CFG</name>
|
|
<description>Timer 1 Configuration
|
|
</description>
|
|
<addressOffset>4</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TICK_SRC_POL</name>
|
|
<description>TICK_SRC_POL</description>
|
|
<bitRange>[13:13]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TICK_SRC</name>
|
|
<description>TICK_SRC</description>
|
|
<bitRange>[12:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PRE</name>
|
|
<description>PRE</description>
|
|
<bitRange>[7:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>MODE</name>
|
|
<description>MODE</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RELOAD</name>
|
|
<description>RELOAD</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>T0CTL</name>
|
|
<description>Timer 0 Control
|
|
|
|
Run control/status for timer 0
|
|
</description>
|
|
<addressOffset>8</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EN</name>
|
|
<description>EN</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>T0TARGET</name>
|
|
<description>Timer 0 Target
|
|
|
|
Target counter value for timer 0
|
|
</description>
|
|
<addressOffset>12</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>VALUE</name>
|
|
<description>VALUE</description>
|
|
<bitRange>[15:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>T1TARGET</name>
|
|
<description>Timer 1 Target
|
|
|
|
Target Counter Value Timer 1
|
|
</description>
|
|
<addressOffset>16</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>VALUE</name>
|
|
<description>VALUE</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>T1CTL</name>
|
|
<description>Timer 1 Control
|
|
|
|
Run Control/Status For Timer 1
|
|
</description>
|
|
<addressOffset>20</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EN</name>
|
|
<description>EN</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral><peripheral>
|
|
<name>AUX_WUC</name>
|
|
<description>AUX Wake-up controller </description>
|
|
<baseAddress>0x400c6000</baseAddress>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>4096</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<registers>
|
|
<register>
|
|
<name>MODCLKEN0</name>
|
|
<description>Module Clock Enable
|
|
|
|
Clock enable for each module in the AUX domain
|
|
|
|
For use by the system CPU
|
|
|
|
The settings in this register are OR'ed with the corresponding settings in MODCLKEN1. This allows the system CPU and AUX_SCE to request clocks independently. Settings take effect immediately.</description>
|
|
<addressOffset>0</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>AUX_ADI4</name>
|
|
<description>AUX_ADI4</description>
|
|
<bitRange>[7:7]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>AUX_DDI0_OSC</name>
|
|
<description>AUX_DDI0_OSC</description>
|
|
<bitRange>[6:6]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TDC</name>
|
|
<description>TDC</description>
|
|
<bitRange>[5:5]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>ANAIF</name>
|
|
<description>ANAIF</description>
|
|
<bitRange>[4:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TIMER</name>
|
|
<description>TIMER</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>AIODIO1</name>
|
|
<description>AIODIO1</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>AIODIO0</name>
|
|
<description>AIODIO0</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SMPH</name>
|
|
<description>SMPH</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PWROFFREQ</name>
|
|
<description>Power Off Request
|
|
|
|
Requests power off request for the AUX domain. When powered of the power supply and clock is disabled. This may only be used when taking the entire device into shutdown mode (i.e. with full device reset when resuming operation).
|
|
|
|
Power off is prevented if AON_WUC:AUXCTL.AUX_FORCE_ON has been set, or if MCUBUSCTL.DISCONNECT_REQ has been cleared.</description>
|
|
<addressOffset>4</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>REQ</name>
|
|
<description>REQ</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PWRDWNREQ</name>
|
|
<description>Power Down Request
|
|
|
|
Request from AUX for system to enter power down. When system is in power down there is limited current supply available and the clock source is set by AON_WUC:AUXCLK.PWR_DWN_SRC</description>
|
|
<addressOffset>8</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>REQ</name>
|
|
<description>REQ</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PWRDWNACK</name>
|
|
<description>Power Down Acknowledgment</description>
|
|
<addressOffset>12</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>ACK</name>
|
|
<description>ACK</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLKLFREQ</name>
|
|
<description>Low Frequency Clock Request</description>
|
|
<addressOffset>16</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>REQ</name>
|
|
<description>REQ</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLKLFACK</name>
|
|
<description>Low Frequency Clock Acknowledgment</description>
|
|
<addressOffset>20</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>ACK</name>
|
|
<description>ACK</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>WUEVFLAGS</name>
|
|
<description>Wake-up Event Flags
|
|
|
|
Status of wake-up events from the AON domain
|
|
|
|
The event flags are cleared by setting the corresponding bits in WUEVCLR
|
|
</description>
|
|
<addressOffset>40</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>AON_RTC_CH2</name>
|
|
<description>AON_RTC_CH2</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>AON_SW</name>
|
|
<description>AON_SW</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>AON_PROG_WU</name>
|
|
<description>AON_PROG_WU</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>WUEVCLR</name>
|
|
<description>Wake-up Event Clear
|
|
|
|
Clears wake-up events from the AON domain
|
|
</description>
|
|
<addressOffset>44</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>AON_RTC_CH2</name>
|
|
<description>AON_RTC_CH2</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>AON_SW</name>
|
|
<description>AON_SW</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>AON_PROG_WU</name>
|
|
<description>AON_PROG_WU</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>ADCCLKCTL</name>
|
|
<description>ADC Clock Control
|
|
|
|
Controls the ADC internal clock
|
|
|
|
Note that the ADC command and data interface requires MODCLKEN0.ANAIF or MODCLKEN1.ANAIF also to be set
|
|
</description>
|
|
<addressOffset>48</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>ACK</name>
|
|
<description>ACK</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>REQ</name>
|
|
<description>REQ</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TDCCLKCTL</name>
|
|
<description>TDC Clock Control
|
|
|
|
Controls the TDC counter clock source, which steps the TDC counter value
|
|
|
|
The source of this clock is controlled by OSC_DIG:CTL0.ACLK_TDC_SRC_SEL.
|
|
</description>
|
|
<addressOffset>52</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>ACK</name>
|
|
<description>ACK</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>REQ</name>
|
|
<description>REQ</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REFCLKCTL</name>
|
|
<description>Reference Clock Control
|
|
|
|
Controls the TDC reference clock source, which is to be compared against the TDC counter clock.
|
|
|
|
The source of this clock is controlled by OSC_DIG:CTL0.ACLK_REF_SRC_SEL.</description>
|
|
<addressOffset>56</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>ACK</name>
|
|
<description>ACK</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>REQ</name>
|
|
<description>REQ</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RTCSUBSECINC0</name>
|
|
<description>Real Time Counter Sub Second Increment 0
|
|
|
|
New value for the real-time counter (AON_RTC) sub-second increment value, part corresponding to AON_RTC:SUBSECINC bits 15:0.
|
|
|
|
After setting INC15_0 and RTCSUBSECINC1.INC23_16, the value is loaded into AON_RTC:SUBSECINC.VALUEINC by setting RTCSUBSECINCCTL.UPD_REQ.
|
|
</description>
|
|
<addressOffset>60</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>INC15_0</name>
|
|
<description>INC15_0</description>
|
|
<bitRange>[15:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RTCSUBSECINC1</name>
|
|
<description>Real Time Counter Sub Second Increment 1
|
|
|
|
New value for the real-time counter (AON_RTC) sub-second increment value, part corresponding to AON_RTC:SUBSECINC bits 23:16.
|
|
|
|
After setting RTCSUBSECINC0.INC15_0 and INC23_16, the value is loaded into AON_RTC:SUBSECINC.VALUEINC by setting RTCSUBSECINCCTL.UPD_REQ.</description>
|
|
<addressOffset>64</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>INC23_16</name>
|
|
<description>INC23_16</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RTCSUBSECINCCTL</name>
|
|
<description>Real Time Counter Sub Second Increment Control</description>
|
|
<addressOffset>68</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>UPD_ACK</name>
|
|
<description>UPD_ACK</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>UPD_REQ</name>
|
|
<description>UPD_REQ</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>MCUBUSCTL</name>
|
|
<description>MCU Bus Control
|
|
|
|
Controls the connection between the AUX domain bus and the MCU domain bus.
|
|
|
|
The buses must be disconnected to allow power-down or power-off of the AUX domain.
|
|
</description>
|
|
<addressOffset>72</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DISCONNECT_REQ</name>
|
|
<description>DISCONNECT_REQ</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>MCUBUSSTAT</name>
|
|
<description>MCU Bus Status
|
|
|
|
Indicates the connection state of the AUX domain and MCU domain buses.
|
|
|
|
Note that this register cannot be read from the MCU domain while disconnected, and is therefore only useful for the AUX_SCE.</description>
|
|
<addressOffset>76</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DISCONNECTED</name>
|
|
<description>DISCONNECTED</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DISCONNECT_ACK</name>
|
|
<description>DISCONNECT_ACK</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>AONCTLSTAT</name>
|
|
<description>AON Domain Control Status
|
|
|
|
Status of AUX domain control from AON_WUC.</description>
|
|
<addressOffset>80</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>AUX_FORCE_ON</name>
|
|
<description>AUX_FORCE_ON</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SCE_RUN_EN</name>
|
|
<description>SCE_RUN_EN</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>AUXIOLATCH</name>
|
|
<description>AUX Input Output Latch
|
|
|
|
Controls latching of signals between AUX_AIODIO0/AUX_AIODIO1 and AON_IOC.</description>
|
|
<addressOffset>84</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EN</name>
|
|
<description>EN</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>MODCLKEN1</name>
|
|
<description>Module Clock Enable 1
|
|
|
|
Clock enable for each module in the AUX domain, for use by the AUX_SCE. Settings take effect immediately.
|
|
|
|
The settings in this register are OR'ed with the corresponding settings in MODCLKEN0. This allows system CPU and AUX_SCE to request clocks independently.</description>
|
|
<addressOffset>92</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>AUX_ADI4</name>
|
|
<description>AUX_ADI4</description>
|
|
<bitRange>[7:7]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>AUX_DDI0_OSC</name>
|
|
<description>AUX_DDI0_OSC</description>
|
|
<bitRange>[6:6]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>ANAIF</name>
|
|
<description>ANAIF</description>
|
|
<bitRange>[4:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TIMER</name>
|
|
<description>TIMER</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>AIODIO1</name>
|
|
<description>AIODIO1</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>AIODIO0</name>
|
|
<description>AIODIO0</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SMPH</name>
|
|
<description>SMPH</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral><peripheral>
|
|
<name>CCFG</name>
|
|
<description>Customer configuration area (CCFG)</description>
|
|
<baseAddress>0x50003000</baseAddress>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x1000</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<registers>
|
|
<register>
|
|
<name>EXT_LF_CLK</name>
|
|
<description>Extern LF clock configuration</description>
|
|
<addressOffset>4008</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0xffffffff</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DIO</name>
|
|
<description>DIO</description>
|
|
<bitRange>[31:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RTC_INCREMENT</name>
|
|
<description>RTC_INCREMENT</description>
|
|
<bitRange>[23:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>MODE_CONF_1</name>
|
|
<description>Mode Configuration 1</description>
|
|
<addressOffset>4012</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0xfffbffff</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>ALT_DCDC_VMIN</name>
|
|
<description>ALT_DCDC_VMIN</description>
|
|
<bitRange>[23:20]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>ALT_DCDC_DITHER_EN</name>
|
|
<description>ALT_DCDC_DITHER_EN</description>
|
|
<bitRange>[19:19]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>ALT_DCDC_IPEAK</name>
|
|
<description>ALT_DCDC_IPEAK</description>
|
|
<bitRange>[18:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DELTA_IBIAS_INIT</name>
|
|
<description>DELTA_IBIAS_INIT</description>
|
|
<bitRange>[15:12]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DELTA_IBIAS_OFFSET</name>
|
|
<description>DELTA_IBIAS_OFFSET</description>
|
|
<bitRange>[11:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>XOSC_MAX_START</name>
|
|
<description>XOSC_MAX_START</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SIZE_AND_DIS_FLAGS</name>
|
|
<description>CCFG Size and Disable Flags</description>
|
|
<addressOffset>4016</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x10000ffff</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SIZE_OF_CCFG</name>
|
|
<description>SIZE_OF_CCFG</description>
|
|
<bitRange>[31:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DISABLE_FLAGS</name>
|
|
<description>DISABLE_FLAGS</description>
|
|
<bitRange>[15:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIS_GPRAM</name>
|
|
<description>DIS_GPRAM</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIS_ALT_DCDC_SETTING</name>
|
|
<description>DIS_ALT_DCDC_SETTING</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIS_XOSC_OVR</name>
|
|
<description>DIS_XOSC_OVR</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>MODE_CONF</name>
|
|
<description>Mode Configuration 0</description>
|
|
<addressOffset>4020</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0xffffffff</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>VDDR_TRIM_SLEEP_DELTA</name>
|
|
<description>VDDR_TRIM_SLEEP_DELTA</description>
|
|
<bitRange>[31:28]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DCDC_RECHARGE</name>
|
|
<description>DCDC_RECHARGE</description>
|
|
<bitRange>[27:27]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DCDC_ACTIVE</name>
|
|
<description>DCDC_ACTIVE</description>
|
|
<bitRange>[26:26]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>VDDR_EXT_LOAD</name>
|
|
<description>VDDR_EXT_LOAD</description>
|
|
<bitRange>[25:25]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>VDDS_BOD_LEVEL</name>
|
|
<description>VDDS_BOD_LEVEL</description>
|
|
<bitRange>[24:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SCLK_LF_OPTION</name>
|
|
<description>SCLK_LF_OPTION</description>
|
|
<bitRange>[23:22]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>VDDR_TRIM_SLEEP_TC</name>
|
|
<description>VDDR_TRIM_SLEEP_TC</description>
|
|
<bitRange>[21:21]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RTC_COMP</name>
|
|
<description>RTC_COMP</description>
|
|
<bitRange>[20:20]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>XOSC_FREQ</name>
|
|
<description>XOSC_FREQ</description>
|
|
<bitRange>[19:18]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>XOSC_CAP_MOD</name>
|
|
<description>XOSC_CAP_MOD</description>
|
|
<bitRange>[17:17]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>HF_COMP</name>
|
|
<description>HF_COMP</description>
|
|
<bitRange>[16:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>XOSC_CAPARRAY_DELTA</name>
|
|
<description>XOSC_CAPARRAY_DELTA</description>
|
|
<bitRange>[15:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>VDDR_CAP</name>
|
|
<description>VDDR_CAP</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>VOLT_LOAD_0</name>
|
|
<description>Voltage Load 0
|
|
Enabled by MODE_CONF.VDDR_EXT_LOAD.</description>
|
|
<addressOffset>4024</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0xffffffff</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>VDDR_EXT_TP45</name>
|
|
<description>VDDR_EXT_TP45</description>
|
|
<bitRange>[31:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>VDDR_EXT_TP25</name>
|
|
<description>VDDR_EXT_TP25</description>
|
|
<bitRange>[23:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>VDDR_EXT_TP5</name>
|
|
<description>VDDR_EXT_TP5</description>
|
|
<bitRange>[15:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>VDDR_EXT_TM15</name>
|
|
<description>VDDR_EXT_TM15</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>VOLT_LOAD_1</name>
|
|
<description>Voltage Load 1
|
|
Enabled by MODE_CONF.VDDR_EXT_LOAD.</description>
|
|
<addressOffset>4028</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0xffffffff</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>VDDR_EXT_TP125</name>
|
|
<description>VDDR_EXT_TP125</description>
|
|
<bitRange>[31:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>VDDR_EXT_TP105</name>
|
|
<description>VDDR_EXT_TP105</description>
|
|
<bitRange>[23:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>VDDR_EXT_TP85</name>
|
|
<description>VDDR_EXT_TP85</description>
|
|
<bitRange>[15:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>VDDR_EXT_TP65</name>
|
|
<description>VDDR_EXT_TP65</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RTC_OFFSET</name>
|
|
<description>Real Time Clock Offset
|
|
Enabled by MODE_CONF.RTC_COMP.</description>
|
|
<addressOffset>4032</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0xffffffff</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>RTC_COMP_P0</name>
|
|
<description>RTC_COMP_P0</description>
|
|
<bitRange>[31:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RTC_COMP_P1</name>
|
|
<description>RTC_COMP_P1</description>
|
|
<bitRange>[15:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RTC_COMP_P2</name>
|
|
<description>RTC_COMP_P2</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FREQ_OFFSET</name>
|
|
<description>Frequency Offset</description>
|
|
<addressOffset>4036</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0xffffffff</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>HF_COMP_P0</name>
|
|
<description>HF_COMP_P0</description>
|
|
<bitRange>[31:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>HF_COMP_P1</name>
|
|
<description>HF_COMP_P1</description>
|
|
<bitRange>[15:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>HF_COMP_P2</name>
|
|
<description>HF_COMP_P2</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IEEE_MAC_0</name>
|
|
<description>IEEE MAC Address 0</description>
|
|
<addressOffset>4040</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0xffffffff</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>ADDR</name>
|
|
<description>ADDR</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IEEE_MAC_1</name>
|
|
<description>IEEE MAC Address 1</description>
|
|
<addressOffset>4044</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0xffffffff</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>ADDR</name>
|
|
<description>ADDR</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IEEE_BLE_0</name>
|
|
<description>IEEE BLE Address 0</description>
|
|
<addressOffset>4048</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0xffffffff</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>ADDR</name>
|
|
<description>ADDR</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IEEE_BLE_1</name>
|
|
<description>IEEE BLE Address 1</description>
|
|
<addressOffset>4052</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0xffffffff</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>ADDR</name>
|
|
<description>ADDR</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>BL_CONFIG</name>
|
|
<description>Bootloader Configuration
|
|
Configures the functionality of the ROM boot loader.
|
|
If both the boot loader is enabled by the BOOTLOADER_ENABLE field and the boot loader backdoor is enabled by the BL_ENABLE field it is possible to force entry of the ROM boot loader even if a valid image is present in flash.</description>
|
|
<addressOffset>4056</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0xc5ffffff</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>BOOTLOADER_ENABLE</name>
|
|
<description>BOOTLOADER_ENABLE</description>
|
|
<bitRange>[31:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>BL_LEVEL</name>
|
|
<description>BL_LEVEL</description>
|
|
<bitRange>[16:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>BL_PIN_NUMBER</name>
|
|
<description>BL_PIN_NUMBER</description>
|
|
<bitRange>[15:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>BL_ENABLE</name>
|
|
<description>BL_ENABLE</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>ERASE_CONF</name>
|
|
<description>Erase Configuration</description>
|
|
<addressOffset>4060</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0xffffffff</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CHIP_ERASE_DIS_N</name>
|
|
<description>CHIP_ERASE_DIS_N</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>BANK_ERASE_DIS_N</name>
|
|
<description>BANK_ERASE_DIS_N</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CCFG_TI_OPTIONS</name>
|
|
<description>TI Options</description>
|
|
<addressOffset>4064</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0xffffffc5</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TI_FA_ENABLE</name>
|
|
<description>TI_FA_ENABLE</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CCFG_TAP_DAP_0</name>
|
|
<description>Test Access Points Enable 0</description>
|
|
<addressOffset>4068</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0xffc5c5c5</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CPU_DAP_ENABLE</name>
|
|
<description>CPU_DAP_ENABLE</description>
|
|
<bitRange>[23:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PRCM_TAP_ENABLE</name>
|
|
<description>PRCM_TAP_ENABLE</description>
|
|
<bitRange>[15:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TEST_TAP_ENABLE</name>
|
|
<description>TEST_TAP_ENABLE</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CCFG_TAP_DAP_1</name>
|
|
<description>Test Access Points Enable 1</description>
|
|
<addressOffset>4072</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0xffc5c5c5</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>PBIST2_TAP_ENABLE</name>
|
|
<description>PBIST2_TAP_ENABLE</description>
|
|
<bitRange>[23:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PBIST1_TAP_ENABLE</name>
|
|
<description>PBIST1_TAP_ENABLE</description>
|
|
<bitRange>[15:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WUC_TAP_ENABLE</name>
|
|
<description>WUC_TAP_ENABLE</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IMAGE_VALID_CONF</name>
|
|
<description>Image Valid </description>
|
|
<addressOffset>4076</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0xffffffff</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IMAGE_VALID</name>
|
|
<description>IMAGE_VALID</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CCFG_PROT_31_0</name>
|
|
<description>Protect Sectors 0-31
|
|
Each bit write protects one 4KB flash sector from being both programmed and erased. Bit must be set to 0 in order to enable sector write protect.</description>
|
|
<addressOffset>4080</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0xffffffff</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>WRT_PROT_SEC_31</name>
|
|
<description>WRT_PROT_SEC_31</description>
|
|
<bitRange>[31:31]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_30</name>
|
|
<description>WRT_PROT_SEC_30</description>
|
|
<bitRange>[30:30]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_29</name>
|
|
<description>WRT_PROT_SEC_29</description>
|
|
<bitRange>[29:29]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_28</name>
|
|
<description>WRT_PROT_SEC_28</description>
|
|
<bitRange>[28:28]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_27</name>
|
|
<description>WRT_PROT_SEC_27</description>
|
|
<bitRange>[27:27]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_26</name>
|
|
<description>WRT_PROT_SEC_26</description>
|
|
<bitRange>[26:26]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_25</name>
|
|
<description>WRT_PROT_SEC_25</description>
|
|
<bitRange>[25:25]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_24</name>
|
|
<description>WRT_PROT_SEC_24</description>
|
|
<bitRange>[24:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_23</name>
|
|
<description>WRT_PROT_SEC_23</description>
|
|
<bitRange>[23:23]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_22</name>
|
|
<description>WRT_PROT_SEC_22</description>
|
|
<bitRange>[22:22]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_21</name>
|
|
<description>WRT_PROT_SEC_21</description>
|
|
<bitRange>[21:21]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_20</name>
|
|
<description>WRT_PROT_SEC_20</description>
|
|
<bitRange>[20:20]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_19</name>
|
|
<description>WRT_PROT_SEC_19</description>
|
|
<bitRange>[19:19]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_18</name>
|
|
<description>WRT_PROT_SEC_18</description>
|
|
<bitRange>[18:18]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_17</name>
|
|
<description>WRT_PROT_SEC_17</description>
|
|
<bitRange>[17:17]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_16</name>
|
|
<description>WRT_PROT_SEC_16</description>
|
|
<bitRange>[16:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_15</name>
|
|
<description>WRT_PROT_SEC_15</description>
|
|
<bitRange>[15:15]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_14</name>
|
|
<description>WRT_PROT_SEC_14</description>
|
|
<bitRange>[14:14]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_13</name>
|
|
<description>WRT_PROT_SEC_13</description>
|
|
<bitRange>[13:13]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_12</name>
|
|
<description>WRT_PROT_SEC_12</description>
|
|
<bitRange>[12:12]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_11</name>
|
|
<description>WRT_PROT_SEC_11</description>
|
|
<bitRange>[11:11]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_10</name>
|
|
<description>WRT_PROT_SEC_10</description>
|
|
<bitRange>[10:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_9</name>
|
|
<description>WRT_PROT_SEC_9</description>
|
|
<bitRange>[9:9]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_8</name>
|
|
<description>WRT_PROT_SEC_8</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_7</name>
|
|
<description>WRT_PROT_SEC_7</description>
|
|
<bitRange>[7:7]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_6</name>
|
|
<description>WRT_PROT_SEC_6</description>
|
|
<bitRange>[6:6]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_5</name>
|
|
<description>WRT_PROT_SEC_5</description>
|
|
<bitRange>[5:5]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_4</name>
|
|
<description>WRT_PROT_SEC_4</description>
|
|
<bitRange>[4:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_3</name>
|
|
<description>WRT_PROT_SEC_3</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_2</name>
|
|
<description>WRT_PROT_SEC_2</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_1</name>
|
|
<description>WRT_PROT_SEC_1</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_0</name>
|
|
<description>WRT_PROT_SEC_0</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CCFG_PROT_63_32</name>
|
|
<description>Protect Sectors 32-63
|
|
Each bit write protects one 4KB flash sector from being both programmed and erased. Bit must be set to 0 in order to enable sector write protect. Not in use by CC26xx and CC13xx.</description>
|
|
<addressOffset>4084</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0xffffffff</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>WRT_PROT_SEC_63</name>
|
|
<description>WRT_PROT_SEC_63</description>
|
|
<bitRange>[31:31]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_62</name>
|
|
<description>WRT_PROT_SEC_62</description>
|
|
<bitRange>[30:30]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_61</name>
|
|
<description>WRT_PROT_SEC_61</description>
|
|
<bitRange>[29:29]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_60</name>
|
|
<description>WRT_PROT_SEC_60</description>
|
|
<bitRange>[28:28]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_59</name>
|
|
<description>WRT_PROT_SEC_59</description>
|
|
<bitRange>[27:27]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_58</name>
|
|
<description>WRT_PROT_SEC_58</description>
|
|
<bitRange>[26:26]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_57</name>
|
|
<description>WRT_PROT_SEC_57</description>
|
|
<bitRange>[25:25]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_56</name>
|
|
<description>WRT_PROT_SEC_56</description>
|
|
<bitRange>[24:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_55</name>
|
|
<description>WRT_PROT_SEC_55</description>
|
|
<bitRange>[23:23]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_54</name>
|
|
<description>WRT_PROT_SEC_54</description>
|
|
<bitRange>[22:22]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_53</name>
|
|
<description>WRT_PROT_SEC_53</description>
|
|
<bitRange>[21:21]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_52</name>
|
|
<description>WRT_PROT_SEC_52</description>
|
|
<bitRange>[20:20]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_51</name>
|
|
<description>WRT_PROT_SEC_51</description>
|
|
<bitRange>[19:19]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_50</name>
|
|
<description>WRT_PROT_SEC_50</description>
|
|
<bitRange>[18:18]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_49</name>
|
|
<description>WRT_PROT_SEC_49</description>
|
|
<bitRange>[17:17]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_48</name>
|
|
<description>WRT_PROT_SEC_48</description>
|
|
<bitRange>[16:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_47</name>
|
|
<description>WRT_PROT_SEC_47</description>
|
|
<bitRange>[15:15]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_46</name>
|
|
<description>WRT_PROT_SEC_46</description>
|
|
<bitRange>[14:14]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_45</name>
|
|
<description>WRT_PROT_SEC_45</description>
|
|
<bitRange>[13:13]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_44</name>
|
|
<description>WRT_PROT_SEC_44</description>
|
|
<bitRange>[12:12]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_43</name>
|
|
<description>WRT_PROT_SEC_43</description>
|
|
<bitRange>[11:11]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_42</name>
|
|
<description>WRT_PROT_SEC_42</description>
|
|
<bitRange>[10:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_41</name>
|
|
<description>WRT_PROT_SEC_41</description>
|
|
<bitRange>[9:9]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_40</name>
|
|
<description>WRT_PROT_SEC_40</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_39</name>
|
|
<description>WRT_PROT_SEC_39</description>
|
|
<bitRange>[7:7]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_38</name>
|
|
<description>WRT_PROT_SEC_38</description>
|
|
<bitRange>[6:6]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_37</name>
|
|
<description>WRT_PROT_SEC_37</description>
|
|
<bitRange>[5:5]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_36</name>
|
|
<description>WRT_PROT_SEC_36</description>
|
|
<bitRange>[4:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_35</name>
|
|
<description>WRT_PROT_SEC_35</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_34</name>
|
|
<description>WRT_PROT_SEC_34</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_33</name>
|
|
<description>WRT_PROT_SEC_33</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_32</name>
|
|
<description>WRT_PROT_SEC_32</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CCFG_PROT_95_64</name>
|
|
<description>Protect Sectors 64-95
|
|
Each bit write protects one flash sector from being both programmed and erased. Bit must be set to 0 in order to enable sector write protect. Not in use by CC26xx and CC13xx.</description>
|
|
<addressOffset>4088</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0xffffffff</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>WRT_PROT_SEC_95</name>
|
|
<description>WRT_PROT_SEC_95</description>
|
|
<bitRange>[31:31]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_94</name>
|
|
<description>WRT_PROT_SEC_94</description>
|
|
<bitRange>[30:30]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_93</name>
|
|
<description>WRT_PROT_SEC_93</description>
|
|
<bitRange>[29:29]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_92</name>
|
|
<description>WRT_PROT_SEC_92</description>
|
|
<bitRange>[28:28]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_91</name>
|
|
<description>WRT_PROT_SEC_91</description>
|
|
<bitRange>[27:27]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_90</name>
|
|
<description>WRT_PROT_SEC_90</description>
|
|
<bitRange>[26:26]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_89</name>
|
|
<description>WRT_PROT_SEC_89</description>
|
|
<bitRange>[25:25]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_88</name>
|
|
<description>WRT_PROT_SEC_88</description>
|
|
<bitRange>[24:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_87</name>
|
|
<description>WRT_PROT_SEC_87</description>
|
|
<bitRange>[23:23]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_86</name>
|
|
<description>WRT_PROT_SEC_86</description>
|
|
<bitRange>[22:22]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_85</name>
|
|
<description>WRT_PROT_SEC_85</description>
|
|
<bitRange>[21:21]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_84</name>
|
|
<description>WRT_PROT_SEC_84</description>
|
|
<bitRange>[20:20]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_83</name>
|
|
<description>WRT_PROT_SEC_83</description>
|
|
<bitRange>[19:19]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_82</name>
|
|
<description>WRT_PROT_SEC_82</description>
|
|
<bitRange>[18:18]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_81</name>
|
|
<description>WRT_PROT_SEC_81</description>
|
|
<bitRange>[17:17]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_80</name>
|
|
<description>WRT_PROT_SEC_80</description>
|
|
<bitRange>[16:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_79</name>
|
|
<description>WRT_PROT_SEC_79</description>
|
|
<bitRange>[15:15]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_78</name>
|
|
<description>WRT_PROT_SEC_78</description>
|
|
<bitRange>[14:14]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_77</name>
|
|
<description>WRT_PROT_SEC_77</description>
|
|
<bitRange>[13:13]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_76</name>
|
|
<description>WRT_PROT_SEC_76</description>
|
|
<bitRange>[12:12]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_75</name>
|
|
<description>WRT_PROT_SEC_75</description>
|
|
<bitRange>[11:11]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_74</name>
|
|
<description>WRT_PROT_SEC_74</description>
|
|
<bitRange>[10:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_73</name>
|
|
<description>WRT_PROT_SEC_73</description>
|
|
<bitRange>[9:9]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_72</name>
|
|
<description>WRT_PROT_SEC_72</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_71</name>
|
|
<description>WRT_PROT_SEC_71</description>
|
|
<bitRange>[7:7]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_70</name>
|
|
<description>WRT_PROT_SEC_70</description>
|
|
<bitRange>[6:6]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_69</name>
|
|
<description>WRT_PROT_SEC_69</description>
|
|
<bitRange>[5:5]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_68</name>
|
|
<description>WRT_PROT_SEC_68</description>
|
|
<bitRange>[4:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_67</name>
|
|
<description>WRT_PROT_SEC_67</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_66</name>
|
|
<description>WRT_PROT_SEC_66</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_65</name>
|
|
<description>WRT_PROT_SEC_65</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_64</name>
|
|
<description>WRT_PROT_SEC_64</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CCFG_PROT_127_96</name>
|
|
<description>Protect Sectors 96-127
|
|
Each bit write protects one flash sector from being both programmed and erased. Bit must be set to 0 in order to enable sector write protect. Not in use by CC26xx and CC13xx.</description>
|
|
<addressOffset>4092</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0xffffffff</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>WRT_PROT_SEC_127</name>
|
|
<description>WRT_PROT_SEC_127</description>
|
|
<bitRange>[31:31]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_126</name>
|
|
<description>WRT_PROT_SEC_126</description>
|
|
<bitRange>[30:30]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_125</name>
|
|
<description>WRT_PROT_SEC_125</description>
|
|
<bitRange>[29:29]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_124</name>
|
|
<description>WRT_PROT_SEC_124</description>
|
|
<bitRange>[28:28]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_123</name>
|
|
<description>WRT_PROT_SEC_123</description>
|
|
<bitRange>[27:27]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_122</name>
|
|
<description>WRT_PROT_SEC_122</description>
|
|
<bitRange>[26:26]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_121</name>
|
|
<description>WRT_PROT_SEC_121</description>
|
|
<bitRange>[25:25]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_120</name>
|
|
<description>WRT_PROT_SEC_120</description>
|
|
<bitRange>[24:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_119</name>
|
|
<description>WRT_PROT_SEC_119</description>
|
|
<bitRange>[23:23]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_118</name>
|
|
<description>WRT_PROT_SEC_118</description>
|
|
<bitRange>[22:22]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_117</name>
|
|
<description>WRT_PROT_SEC_117</description>
|
|
<bitRange>[21:21]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_116</name>
|
|
<description>WRT_PROT_SEC_116</description>
|
|
<bitRange>[20:20]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_115</name>
|
|
<description>WRT_PROT_SEC_115</description>
|
|
<bitRange>[19:19]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_114</name>
|
|
<description>WRT_PROT_SEC_114</description>
|
|
<bitRange>[18:18]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_113</name>
|
|
<description>WRT_PROT_SEC_113</description>
|
|
<bitRange>[17:17]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_112</name>
|
|
<description>WRT_PROT_SEC_112</description>
|
|
<bitRange>[16:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_111</name>
|
|
<description>WRT_PROT_SEC_111</description>
|
|
<bitRange>[15:15]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_110</name>
|
|
<description>WRT_PROT_SEC_110</description>
|
|
<bitRange>[14:14]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_109</name>
|
|
<description>WRT_PROT_SEC_109</description>
|
|
<bitRange>[13:13]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_108</name>
|
|
<description>WRT_PROT_SEC_108</description>
|
|
<bitRange>[12:12]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_107</name>
|
|
<description>WRT_PROT_SEC_107</description>
|
|
<bitRange>[11:11]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_106</name>
|
|
<description>WRT_PROT_SEC_106</description>
|
|
<bitRange>[10:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_105</name>
|
|
<description>WRT_PROT_SEC_105</description>
|
|
<bitRange>[9:9]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_104</name>
|
|
<description>WRT_PROT_SEC_104</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_103</name>
|
|
<description>WRT_PROT_SEC_103</description>
|
|
<bitRange>[7:7]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_102</name>
|
|
<description>WRT_PROT_SEC_102</description>
|
|
<bitRange>[6:6]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_101</name>
|
|
<description>WRT_PROT_SEC_101</description>
|
|
<bitRange>[5:5]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_100</name>
|
|
<description>WRT_PROT_SEC_100</description>
|
|
<bitRange>[4:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_99</name>
|
|
<description>WRT_PROT_SEC_99</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_98</name>
|
|
<description>WRT_PROT_SEC_98</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_97</name>
|
|
<description>WRT_PROT_SEC_97</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRT_PROT_SEC_96</name>
|
|
<description>WRT_PROT_SEC_96</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral><peripheral>
|
|
<name>CPU_TIPROP</name>
|
|
<description>Cortex-M's TI proprietary registers
|
|
</description>
|
|
<baseAddress>0xe00fe000</baseAddress>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x1000</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<registers>
|
|
<register>
|
|
<name>TRACECLKMUX</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>4088</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TRACECLK_N_SWV</name>
|
|
<description>TRACECLK_N_SWV</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DYN_CG</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>4092</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DYN_CG</name>
|
|
<description>DYN_CG</description>
|
|
<bitRange>[1:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral><peripheral>
|
|
<name>CRYPTO</name>
|
|
<description>Crypto core with DMA capability and local key storage
|
|
|
|
</description>
|
|
<baseAddress>0x40024000</baseAddress>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x800</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<registers>
|
|
<register>
|
|
<name>DMACH0CTL</name>
|
|
<description>DMA Channel 0 Control</description>
|
|
<addressOffset>0</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>PRIO</name>
|
|
<description>PRIO</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EN</name>
|
|
<description>EN</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DMACH0EXTADDR</name>
|
|
<description>DMA Channel 0 External Address</description>
|
|
<addressOffset>4</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>ADDR</name>
|
|
<description>ADDR</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DMACH0LEN</name>
|
|
<description>DMA Channel 0 Length</description>
|
|
<addressOffset>12</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LEN</name>
|
|
<description>LEN</description>
|
|
<bitRange>[15:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DMASTAT</name>
|
|
<description>DMA Controller Status</description>
|
|
<addressOffset>24</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>PORT_ERR</name>
|
|
<description>PORT_ERR</description>
|
|
<bitRange>[17:17]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CH1_ACTIVE</name>
|
|
<description>CH1_ACTIVE</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CH0_ACTIVE</name>
|
|
<description>CH0_ACTIVE</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DMASWRESET</name>
|
|
<description>DMA Controller Software Reset</description>
|
|
<addressOffset>28</addressOffset>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>RESET</name>
|
|
<description>RESET</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
<modifiedWriteValues>zeroToClear</modifiedWriteValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DMACH1CTL</name>
|
|
<description>DMA Channel 1 Control</description>
|
|
<addressOffset>32</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>PRIO</name>
|
|
<description>PRIO</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EN</name>
|
|
<description>EN</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DMACH1EXTADDR</name>
|
|
<description>DMA Channel 1 External Address</description>
|
|
<addressOffset>36</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>ADDR</name>
|
|
<description>ADDR</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DMACH1LEN</name>
|
|
<description>DMA Channel 1 Length</description>
|
|
<addressOffset>44</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LEN</name>
|
|
<description>LEN</description>
|
|
<bitRange>[15:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DMABUSCFG</name>
|
|
<description>DMA Controller Master Configuration</description>
|
|
<addressOffset>120</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00002400</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>AHB_MST1_BURST_SIZE</name>
|
|
<description>AHB_MST1_BURST_SIZE</description>
|
|
<bitRange>[15:12]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>AHB_MST1_IDLE_EN</name>
|
|
<description>AHB_MST1_IDLE_EN</description>
|
|
<bitRange>[11:11]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>AHB_MST1_INCR_EN</name>
|
|
<description>AHB_MST1_INCR_EN</description>
|
|
<bitRange>[10:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>AHB_MST1_LOCK_EN</name>
|
|
<description>AHB_MST1_LOCK_EN</description>
|
|
<bitRange>[9:9]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>AHB_MST1_BIGEND</name>
|
|
<description>AHB_MST1_BIGEND</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DMAPORTERR</name>
|
|
<description>DMA Controller Port Error</description>
|
|
<addressOffset>124</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>AHB_ERR</name>
|
|
<description>AHB_ERR</description>
|
|
<bitRange>[12:12]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>LAST_CH</name>
|
|
<description>LAST_CH</description>
|
|
<bitRange>[9:9]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DMAHWVER</name>
|
|
<description>DMA Controller Version</description>
|
|
<addressOffset>252</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x01012ed1</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>HW_MAJOR_VER</name>
|
|
<description>HW_MAJOR_VER</description>
|
|
<bitRange>[27:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>HW_MINOR_VER</name>
|
|
<description>HW_MINOR_VER</description>
|
|
<bitRange>[23:20]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>HW_PATCH_LVL</name>
|
|
<description>HW_PATCH_LVL</description>
|
|
<bitRange>[19:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>VER_NUM_COMPL</name>
|
|
<description>VER_NUM_COMPL</description>
|
|
<bitRange>[15:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>VER_NUM</name>
|
|
<description>VER_NUM</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>KEYWRITEAREA</name>
|
|
<description>Key Write Area</description>
|
|
<addressOffset>1024</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>RAM_AREA7</name>
|
|
<description>RAM_AREA7</description>
|
|
<bitRange>[7:7]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RAM_AREA6</name>
|
|
<description>RAM_AREA6</description>
|
|
<bitRange>[6:6]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RAM_AREA5</name>
|
|
<description>RAM_AREA5</description>
|
|
<bitRange>[5:5]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RAM_AREA4</name>
|
|
<description>RAM_AREA4</description>
|
|
<bitRange>[4:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RAM_AREA3</name>
|
|
<description>RAM_AREA3</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RAM_AREA2</name>
|
|
<description>RAM_AREA2</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RAM_AREA1</name>
|
|
<description>RAM_AREA1</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RAM_AREA0</name>
|
|
<description>RAM_AREA0</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>KEYWRITTENAREA</name>
|
|
<description>Key Written Area Status
|
|
This register shows which areas of the key store RAM contain valid written keys.
|
|
When a new key needs to be written to the key store, on a location that is already occupied by a valid key, this key area must be cleared first. This can be done by writing this register before the new key is written to the key store memory.
|
|
Attempting to write to a key area that already contains a valid key is not allowed and will result in an error.</description>
|
|
<addressOffset>1028</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>RAM_AREA_WRITTEN7</name>
|
|
<description>RAM_AREA_WRITTEN7</description>
|
|
<bitRange>[7:7]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>RAM_AREA_WRITTEN6</name>
|
|
<description>RAM_AREA_WRITTEN6</description>
|
|
<bitRange>[6:6]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>RAM_AREA_WRITTEN5</name>
|
|
<description>RAM_AREA_WRITTEN5</description>
|
|
<bitRange>[5:5]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>RAM_AREA_WRITTEN4</name>
|
|
<description>RAM_AREA_WRITTEN4</description>
|
|
<bitRange>[4:4]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>RAM_AREA_WRITTEN3</name>
|
|
<description>RAM_AREA_WRITTEN3</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>RAM_AREA_WRITTEN2</name>
|
|
<description>RAM_AREA_WRITTEN2</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>RAM_AREA_WRITTEN1</name>
|
|
<description>RAM_AREA_WRITTEN1</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>RAM_AREA_WRITTEN0</name>
|
|
<description>RAM_AREA_WRITTEN0</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>KEYSIZE</name>
|
|
<description>Key Size
|
|
This register defines the size of the keys that are written with DMA.</description>
|
|
<addressOffset>1032</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SIZE</name>
|
|
<description>SIZE</description>
|
|
<bitRange>[1:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>KEYREADAREA</name>
|
|
<description>Key Read Area</description>
|
|
<addressOffset>1036</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000008</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>BUSY</name>
|
|
<description>BUSY</description>
|
|
<bitRange>[31:31]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RAM_AREA</name>
|
|
<description>RAM_AREA</description>
|
|
<bitRange>[3:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<dim>4</dim>
|
|
<dimIncrement>4</dimIncrement>
|
|
<dimIndex>0-3</dimIndex>
|
|
<name>AESKEY2%s</name>
|
|
<description>Clear AES_KEY2/GHASH Key</description>
|
|
<addressOffset>1280</addressOffset>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>KEY2</name>
|
|
<description>KEY2</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<dim>4</dim>
|
|
<dimIncrement>4</dimIncrement>
|
|
<dimIndex>0-3</dimIndex>
|
|
<name>AESKEY3%s</name>
|
|
<description>Clear AES_KEY3</description>
|
|
<addressOffset>1296</addressOffset>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>KEY3</name>
|
|
<description>KEY3</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<dim>4</dim>
|
|
<dimIncrement>4</dimIncrement>
|
|
<dimIndex>0-3</dimIndex>
|
|
<name>AESIV%s</name>
|
|
<description>AES Initialization Vector</description>
|
|
<addressOffset>1344</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IV</name>
|
|
<description>IV</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>AESCTL</name>
|
|
<description>AES Input/Output Buffer Control</description>
|
|
<addressOffset>1360</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x80000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CONTEXT_RDY</name>
|
|
<description>CONTEXT_RDY</description>
|
|
<bitRange>[31:31]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SAVED_CONTEXT_RDY</name>
|
|
<description>SAVED_CONTEXT_RDY</description>
|
|
<bitRange>[30:30]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SAVE_CONTEXT</name>
|
|
<description>SAVE_CONTEXT</description>
|
|
<bitRange>[29:29]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CCM_M</name>
|
|
<description>CCM_M</description>
|
|
<bitRange>[24:22]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CCM_L</name>
|
|
<description>CCM_L</description>
|
|
<bitRange>[21:19]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CCM</name>
|
|
<description>CCM</description>
|
|
<bitRange>[18:18]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CBC_MAC</name>
|
|
<description>CBC_MAC</description>
|
|
<bitRange>[15:15]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CTR_WIDTH</name>
|
|
<description>CTR_WIDTH</description>
|
|
<bitRange>[8:7]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CTR</name>
|
|
<description>CTR</description>
|
|
<bitRange>[6:6]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CBC</name>
|
|
<description>CBC</description>
|
|
<bitRange>[5:5]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>KEY_SIZE</name>
|
|
<description>KEY_SIZE</description>
|
|
<bitRange>[4:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIR</name>
|
|
<description>DIR</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>INPUT_RDY</name>
|
|
<description>INPUT_RDY</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>OUTPUT_RDY</name>
|
|
<description>OUTPUT_RDY</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>AESDATALEN0</name>
|
|
<description>Crypto Data Length LSW</description>
|
|
<addressOffset>1364</addressOffset>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LEN_LSW</name>
|
|
<description>LEN_LSW</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>AESDATALEN1</name>
|
|
<description>Crypto Data Length MSW</description>
|
|
<addressOffset>1368</addressOffset>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LEN_MSW</name>
|
|
<description>LEN_MSW</description>
|
|
<bitRange>[28:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>AESAUTHLEN</name>
|
|
<description>AES Authentication Length</description>
|
|
<addressOffset>1372</addressOffset>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LEN</name>
|
|
<description>LEN</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>AESDATAOUT0</name>
|
|
<description>Data Input/Output</description>
|
|
<addressOffset>1376</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DATA</name>
|
|
<description>DATA</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
<alternateRegister>AESDATAIN0</alternateRegister></register>
|
|
<register>
|
|
<name>AESDATAIN0</name>
|
|
<description>AES Data Input/Output 0</description>
|
|
<addressOffset>1376</addressOffset>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DATA</name>
|
|
<description>DATA</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>AESDATAOUT1</name>
|
|
<description>AES Data Input/Output 3</description>
|
|
<addressOffset>1380</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DATA</name>
|
|
<description>DATA</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
<alternateRegister>AESDATAIN1</alternateRegister></register>
|
|
<register>
|
|
<name>AESDATAIN1</name>
|
|
<description>AES Data Input/Output 1</description>
|
|
<addressOffset>1380</addressOffset>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DATA</name>
|
|
<description>DATA</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>AESDATAOUT2</name>
|
|
<description>AES Data Input/Output 2</description>
|
|
<addressOffset>1384</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DATA</name>
|
|
<description>DATA</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
<alternateRegister>AESDATAIN2</alternateRegister></register>
|
|
<register>
|
|
<name>AESDATAIN2</name>
|
|
<description>AES Data Input/Output 2</description>
|
|
<addressOffset>1384</addressOffset>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DATA</name>
|
|
<description>DATA</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>AESDATAOUT3</name>
|
|
<description>AES Data Input/Output 3</description>
|
|
<addressOffset>1388</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DATA</name>
|
|
<description>DATA</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
<alternateRegister>AESDATAIN3</alternateRegister></register>
|
|
<register>
|
|
<name>AESDATAIN3</name>
|
|
<description>Data Input/Output</description>
|
|
<addressOffset>1388</addressOffset>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DATA</name>
|
|
<description>DATA</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<dim>4</dim>
|
|
<dimIncrement>4</dimIncrement>
|
|
<dimIndex>0-3</dimIndex>
|
|
<name>AESTAGOUT%s</name>
|
|
<description>AES Tag Output</description>
|
|
<addressOffset>1392</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TAG</name>
|
|
<description>TAG</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>ALGSEL</name>
|
|
<description>Master Algorithm Select
|
|
This register configures the internal destination of the DMA controller.</description>
|
|
<addressOffset>1792</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TAG</name>
|
|
<description>TAG</description>
|
|
<bitRange>[31:31]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>AES</name>
|
|
<description>AES</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>KEY_STORE</name>
|
|
<description>KEY_STORE</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DMAPROTCTL</name>
|
|
<description>Master Protection Control</description>
|
|
<addressOffset>1796</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EN</name>
|
|
<description>EN</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SWRESET</name>
|
|
<description>Software Reset</description>
|
|
<addressOffset>1856</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>RESET</name>
|
|
<description>RESET</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IRQTYPE</name>
|
|
<description>Interrupt Configuration</description>
|
|
<addressOffset>1920</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IEN</name>
|
|
<description>IEN</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IRQEN</name>
|
|
<description>Interrupt Enable</description>
|
|
<addressOffset>1924</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DMA_IN_DONE</name>
|
|
<description>DMA_IN_DONE</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RESULT_AVAIL</name>
|
|
<description>RESULT_AVAIL</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IRQCLR</name>
|
|
<description>Interrupt Clear</description>
|
|
<addressOffset>1928</addressOffset>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DMA_BUS_ERR</name>
|
|
<description>DMA_BUS_ERR</description>
|
|
<bitRange>[31:31]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>KEY_ST_WR_ERR</name>
|
|
<description>KEY_ST_WR_ERR</description>
|
|
<bitRange>[30:30]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>KEY_ST_RD_ERR</name>
|
|
<description>KEY_ST_RD_ERR</description>
|
|
<bitRange>[29:29]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DMA_IN_DONE</name>
|
|
<description>DMA_IN_DONE</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RESULT_AVAIL</name>
|
|
<description>RESULT_AVAIL</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IRQSET</name>
|
|
<description>Interrupt Set</description>
|
|
<addressOffset>1932</addressOffset>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DMA_IN_DONE</name>
|
|
<description>DMA_IN_DONE</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RESULT_AVAIL</name>
|
|
<description>RESULT_AVAIL</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IRQSTAT</name>
|
|
<description>Interrupt Status</description>
|
|
<addressOffset>1936</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DMA_BUS_ERR</name>
|
|
<description>DMA_BUS_ERR</description>
|
|
<bitRange>[31:31]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>KEY_ST_WR_ERR</name>
|
|
<description>KEY_ST_WR_ERR</description>
|
|
<bitRange>[30:30]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>KEY_ST_RD_ERR</name>
|
|
<description>KEY_ST_RD_ERR</description>
|
|
<bitRange>[29:29]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DMA_IN_DONE</name>
|
|
<description>DMA_IN_DONE</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RESULT_AVAIL</name>
|
|
<description>RESULT_AVAIL</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>HWVER</name>
|
|
<description>CTRL Module Version</description>
|
|
<addressOffset>2044</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x91118778</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>HW_MAJOR_VER</name>
|
|
<description>HW_MAJOR_VER</description>
|
|
<bitRange>[27:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>HW_MINOR_VER</name>
|
|
<description>HW_MINOR_VER</description>
|
|
<bitRange>[23:20]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>HW_PATCH_LVL</name>
|
|
<description>HW_PATCH_LVL</description>
|
|
<bitRange>[19:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>VER_NUM_COMPL</name>
|
|
<description>VER_NUM_COMPL</description>
|
|
<bitRange>[15:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>VER_NUM</name>
|
|
<description>VER_NUM</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral><peripheral>
|
|
<name>EVENT</name>
|
|
<description>Event Fabric Component Definition</description>
|
|
<baseAddress>0x40083000</baseAddress>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x1000</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<interrupt>
|
|
<name>AON_GPIO_EDGE</name>
|
|
<value>0x0</value>
|
|
</interrupt>
|
|
<interrupt>
|
|
<name>I2C_IRQ</name>
|
|
<value>0x4</value>
|
|
</interrupt>
|
|
<interrupt>
|
|
<name>RFC_CPE_1</name>
|
|
<value>0x8</value>
|
|
</interrupt>
|
|
<interrupt>
|
|
<name>AON_RTC_COMB</name>
|
|
<value>0x10</value>
|
|
</interrupt>
|
|
<interrupt>
|
|
<name>UART0_COMB</name>
|
|
<value>0x14</value>
|
|
</interrupt>
|
|
<interrupt>
|
|
<name>AUX_SWEV0</name>
|
|
<value>0x18</value>
|
|
</interrupt>
|
|
<interrupt>
|
|
<name>SSI0_COMB</name>
|
|
<value>0x1C</value>
|
|
</interrupt>
|
|
<interrupt>
|
|
<name>SSI1_COMB</name>
|
|
<value>0x20</value>
|
|
</interrupt>
|
|
<interrupt>
|
|
<name>RFC_CPE_0</name>
|
|
<value>0x24</value>
|
|
</interrupt>
|
|
<interrupt>
|
|
<name>RFC_HW_COMB</name>
|
|
<value>0x28</value>
|
|
</interrupt>
|
|
<interrupt>
|
|
<name>RFC_CMD_ACK</name>
|
|
<value>0x2C</value>
|
|
</interrupt>
|
|
<interrupt>
|
|
<name>I2S_IRQ</name>
|
|
<value>0x30</value>
|
|
</interrupt>
|
|
<interrupt>
|
|
<name>AUX_SWEV1</name>
|
|
<value>0x34</value>
|
|
</interrupt>
|
|
<interrupt>
|
|
<name>WDT_IRQ</name>
|
|
<value>0x38</value>
|
|
</interrupt>
|
|
<interrupt>
|
|
<name>GPT0A</name>
|
|
<value>0x3C</value>
|
|
</interrupt>
|
|
<interrupt>
|
|
<name>GPT0B</name>
|
|
<value>0x40</value>
|
|
</interrupt>
|
|
<interrupt>
|
|
<name>GPT1A</name>
|
|
<value>0x44</value>
|
|
</interrupt>
|
|
<interrupt>
|
|
<name>GPT1B</name>
|
|
<value>0x48</value>
|
|
</interrupt>
|
|
<interrupt>
|
|
<name>GPT2A</name>
|
|
<value>0x4C</value>
|
|
</interrupt>
|
|
<interrupt>
|
|
<name>GPT2B</name>
|
|
<value>0x50</value>
|
|
</interrupt>
|
|
<interrupt>
|
|
<name>GPT3A</name>
|
|
<value>0x54</value>
|
|
</interrupt>
|
|
<interrupt>
|
|
<name>GPT3B</name>
|
|
<value>0x58</value>
|
|
</interrupt>
|
|
<interrupt>
|
|
<name>CRYPTO_RESULT_AVAIL_IRQ</name>
|
|
<value>0x5C</value>
|
|
</interrupt>
|
|
<interrupt>
|
|
<name>DMA_DONE_COMB</name>
|
|
<value>0x60</value>
|
|
</interrupt>
|
|
<interrupt>
|
|
<name>DMA_ERR</name>
|
|
<value>0x64</value>
|
|
</interrupt>
|
|
<interrupt>
|
|
<name>FLASH</name>
|
|
<value>0x68</value>
|
|
</interrupt>
|
|
<interrupt>
|
|
<name>SWEV0</name>
|
|
<value>0x6C</value>
|
|
</interrupt>
|
|
<interrupt>
|
|
<name>AUX_COMB</name>
|
|
<value>0x70</value>
|
|
</interrupt>
|
|
<interrupt>
|
|
<name>AON_PROG0</name>
|
|
<value>0x74</value>
|
|
</interrupt>
|
|
<interrupt>
|
|
<name>PROG0</name>
|
|
<value>0x78</value>
|
|
</interrupt>
|
|
<interrupt>
|
|
<name>AUX_COMPA</name>
|
|
<value>0x7C</value>
|
|
</interrupt>
|
|
<interrupt>
|
|
<name>AUX_ADC_IRQ</name>
|
|
<value>0x80</value>
|
|
</interrupt>
|
|
<interrupt>
|
|
<name>TRNG_IRQ</name>
|
|
<value>0x84</value>
|
|
</interrupt>
|
|
<registers>
|
|
<register>
|
|
<name>CPUIRQSEL0</name>
|
|
<description>Output Selection for CPU Interrupt 0</description>
|
|
<addressOffset>0</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000004</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EV</name>
|
|
<description>EV</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CPUIRQSEL1</name>
|
|
<description>Output Selection for CPU Interrupt 1</description>
|
|
<addressOffset>4</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000009</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EV</name>
|
|
<description>EV</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CPUIRQSEL2</name>
|
|
<description>Output Selection for CPU Interrupt 2</description>
|
|
<addressOffset>8</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x0000001e</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EV</name>
|
|
<description>EV</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CPUIRQSEL3</name>
|
|
<description>Output Selection for CPU Interrupt 3</description>
|
|
<addressOffset>12</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000038</resetValue>
|
|
<fields>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CPUIRQSEL4</name>
|
|
<description>Output Selection for CPU Interrupt 4</description>
|
|
<addressOffset>16</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000007</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EV</name>
|
|
<description>EV</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CPUIRQSEL5</name>
|
|
<description>Output Selection for CPU Interrupt 5</description>
|
|
<addressOffset>20</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000024</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EV</name>
|
|
<description>EV</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CPUIRQSEL6</name>
|
|
<description>Output Selection for CPU Interrupt 6</description>
|
|
<addressOffset>24</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x0000001c</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EV</name>
|
|
<description>EV</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CPUIRQSEL7</name>
|
|
<description>Output Selection for CPU Interrupt 7</description>
|
|
<addressOffset>28</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000022</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EV</name>
|
|
<description>EV</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CPUIRQSEL8</name>
|
|
<description>Output Selection for CPU Interrupt 8</description>
|
|
<addressOffset>32</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000023</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EV</name>
|
|
<description>EV</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CPUIRQSEL9</name>
|
|
<description>Output Selection for CPU Interrupt 9</description>
|
|
<addressOffset>36</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x0000001b</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EV</name>
|
|
<description>EV</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CPUIRQSEL10</name>
|
|
<description>Output Selection for CPU Interrupt 10</description>
|
|
<addressOffset>40</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x0000001a</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EV</name>
|
|
<description>EV</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CPUIRQSEL11</name>
|
|
<description>Output Selection for CPU Interrupt 11</description>
|
|
<addressOffset>44</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000019</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EV</name>
|
|
<description>EV</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CPUIRQSEL12</name>
|
|
<description>Output Selection for CPU Interrupt 12</description>
|
|
<addressOffset>48</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000008</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EV</name>
|
|
<description>EV</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CPUIRQSEL13</name>
|
|
<description>Output Selection for CPU Interrupt 13</description>
|
|
<addressOffset>52</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x0000001d</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EV</name>
|
|
<description>EV</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CPUIRQSEL14</name>
|
|
<description>Output Selection for CPU Interrupt 14</description>
|
|
<addressOffset>56</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000018</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EV</name>
|
|
<description>EV</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CPUIRQSEL15</name>
|
|
<description>Output Selection for CPU Interrupt 15</description>
|
|
<addressOffset>60</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000010</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EV</name>
|
|
<description>EV</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CPUIRQSEL16</name>
|
|
<description>Output Selection for CPU Interrupt 16</description>
|
|
<addressOffset>64</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000011</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EV</name>
|
|
<description>EV</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CPUIRQSEL17</name>
|
|
<description>Output Selection for CPU Interrupt 17</description>
|
|
<addressOffset>68</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000012</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EV</name>
|
|
<description>EV</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CPUIRQSEL18</name>
|
|
<description>Output Selection for CPU Interrupt 18</description>
|
|
<addressOffset>72</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000013</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EV</name>
|
|
<description>EV</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CPUIRQSEL19</name>
|
|
<description>Output Selection for CPU Interrupt 19</description>
|
|
<addressOffset>76</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x0000000c</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EV</name>
|
|
<description>EV</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CPUIRQSEL20</name>
|
|
<description>Output Selection for CPU Interrupt 20</description>
|
|
<addressOffset>80</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x0000000d</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EV</name>
|
|
<description>EV</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CPUIRQSEL21</name>
|
|
<description>Output Selection for CPU Interrupt 21</description>
|
|
<addressOffset>84</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x0000000e</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EV</name>
|
|
<description>EV</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CPUIRQSEL22</name>
|
|
<description>Output Selection for CPU Interrupt 22</description>
|
|
<addressOffset>88</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x0000000f</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EV</name>
|
|
<description>EV</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CPUIRQSEL23</name>
|
|
<description>Output Selection for CPU Interrupt 23</description>
|
|
<addressOffset>92</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x0000005d</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EV</name>
|
|
<description>EV</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CPUIRQSEL24</name>
|
|
<description>Output Selection for CPU Interrupt 24</description>
|
|
<addressOffset>96</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000027</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EV</name>
|
|
<description>EV</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CPUIRQSEL25</name>
|
|
<description>Output Selection for CPU Interrupt 25</description>
|
|
<addressOffset>100</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000026</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EV</name>
|
|
<description>EV</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CPUIRQSEL26</name>
|
|
<description>Output Selection for CPU Interrupt 26</description>
|
|
<addressOffset>104</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000015</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EV</name>
|
|
<description>EV</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CPUIRQSEL27</name>
|
|
<description>Output Selection for CPU Interrupt 27</description>
|
|
<addressOffset>108</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000064</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EV</name>
|
|
<description>EV</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CPUIRQSEL28</name>
|
|
<description>Output Selection for CPU Interrupt 28</description>
|
|
<addressOffset>112</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x0000000b</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EV</name>
|
|
<description>EV</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CPUIRQSEL29</name>
|
|
<description>Output Selection for CPU Interrupt 29</description>
|
|
<addressOffset>116</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EV</name>
|
|
<description>EV</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CPUIRQSEL30</name>
|
|
<description>Output Selection for CPU Interrupt 30</description>
|
|
<addressOffset>120</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EV</name>
|
|
<description>EV</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CPUIRQSEL31</name>
|
|
<description>Output Selection for CPU Interrupt 31</description>
|
|
<addressOffset>124</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x0000006a</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EV</name>
|
|
<description>EV</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CPUIRQSEL32</name>
|
|
<description>Output Selection for CPU Interrupt 32</description>
|
|
<addressOffset>128</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000073</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EV</name>
|
|
<description>EV</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CPUIRQSEL33</name>
|
|
<description>Output Selection for CPU Interrupt 33</description>
|
|
<addressOffset>132</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000068</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EV</name>
|
|
<description>EV</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RFCSEL0</name>
|
|
<description>Output Selection for RFC Event 0</description>
|
|
<addressOffset>256</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x0000003d</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EV</name>
|
|
<description>EV</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RFCSEL1</name>
|
|
<description>Output Selection for RFC Event 1</description>
|
|
<addressOffset>260</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x0000003e</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EV</name>
|
|
<description>EV</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RFCSEL2</name>
|
|
<description>Output Selection for RFC Event 2</description>
|
|
<addressOffset>264</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x0000003f</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EV</name>
|
|
<description>EV</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RFCSEL3</name>
|
|
<description>Output Selection for RFC Event 3</description>
|
|
<addressOffset>268</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000040</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EV</name>
|
|
<description>EV</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RFCSEL4</name>
|
|
<description>Output Selection for RFC Event 4</description>
|
|
<addressOffset>272</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000041</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EV</name>
|
|
<description>EV</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RFCSEL5</name>
|
|
<description>Output Selection for RFC Event 5</description>
|
|
<addressOffset>276</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000042</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EV</name>
|
|
<description>EV</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RFCSEL6</name>
|
|
<description>Output Selection for RFC Event 6</description>
|
|
<addressOffset>280</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000043</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EV</name>
|
|
<description>EV</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RFCSEL7</name>
|
|
<description>Output Selection for RFC Event 7</description>
|
|
<addressOffset>284</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000044</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EV</name>
|
|
<description>EV</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RFCSEL8</name>
|
|
<description>Output Selection for RFC Event 8</description>
|
|
<addressOffset>288</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000077</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EV</name>
|
|
<description>EV</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RFCSEL9</name>
|
|
<description>Output Selection for RFC Event 9</description>
|
|
<addressOffset>292</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000002</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EV</name>
|
|
<description>EV</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>GPT0ACAPTSEL</name>
|
|
<description>Output Selection for GPT0 0</description>
|
|
<addressOffset>512</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000055</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EV</name>
|
|
<description>EV</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>GPT0BCAPTSEL</name>
|
|
<description>Output Selection for GPT0 1</description>
|
|
<addressOffset>516</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000056</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EV</name>
|
|
<description>EV</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>GPT1ACAPTSEL</name>
|
|
<description>Output Selection for GPT1 0</description>
|
|
<addressOffset>768</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000057</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EV</name>
|
|
<description>EV</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>GPT1BCAPTSEL</name>
|
|
<description>Output Selection for GPT1 1</description>
|
|
<addressOffset>772</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000058</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EV</name>
|
|
<description>EV</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>GPT2ACAPTSEL</name>
|
|
<description>Output Selection for GPT2 0</description>
|
|
<addressOffset>1024</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000059</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EV</name>
|
|
<description>EV</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>GPT2BCAPTSEL</name>
|
|
<description>Output Selection for GPT2 1</description>
|
|
<addressOffset>1028</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000005a</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EV</name>
|
|
<description>EV</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>UDMACH1SSEL</name>
|
|
<description>Output Selection for DMA Channel 1 SREQ</description>
|
|
<addressOffset>1288</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000031</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EV</name>
|
|
<description>EV</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>UDMACH1BSEL</name>
|
|
<description>Output Selection for DMA Channel 1 REQ</description>
|
|
<addressOffset>1292</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000030</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EV</name>
|
|
<description>EV</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>UDMACH2SSEL</name>
|
|
<description>Output Selection for DMA Channel 2 SREQ</description>
|
|
<addressOffset>1296</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000033</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EV</name>
|
|
<description>EV</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>UDMACH2BSEL</name>
|
|
<description>Output Selection for DMA Channel 2 REQ</description>
|
|
<addressOffset>1300</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000032</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EV</name>
|
|
<description>EV</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>UDMACH3SSEL</name>
|
|
<description>Output Selection for DMA Channel 3 SREQ
|
|
|
|
</description>
|
|
<addressOffset>1304</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000029</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EV</name>
|
|
<description>EV</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>UDMACH3BSEL</name>
|
|
<description>Output Selection for DMA Channel 3 REQ
|
|
|
|
</description>
|
|
<addressOffset>1308</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000028</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EV</name>
|
|
<description>EV</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>UDMACH4SSEL</name>
|
|
<description>Output Selection for DMA Channel 4 SREQ
|
|
|
|
</description>
|
|
<addressOffset>1312</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x0000002b</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EV</name>
|
|
<description>EV</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>UDMACH4BSEL</name>
|
|
<description>Output Selection for DMA Channel 4 REQ
|
|
|
|
</description>
|
|
<addressOffset>1316</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x0000002a</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EV</name>
|
|
<description>EV</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>UDMACH5SSEL</name>
|
|
<description>Output Selection for DMA Channel 5 SREQ</description>
|
|
<addressOffset>1320</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x0000003a</resetValue>
|
|
<fields>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>UDMACH5BSEL</name>
|
|
<description>Output Selection for DMA Channel 5 REQ</description>
|
|
<addressOffset>1324</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000039</resetValue>
|
|
<fields>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>UDMACH6SSEL</name>
|
|
<description>Output Selection for DMA Channel 6 SREQ</description>
|
|
<addressOffset>1328</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x0000003c</resetValue>
|
|
<fields>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>UDMACH6BSEL</name>
|
|
<description>Output Selection for DMA Channel 6 REQ</description>
|
|
<addressOffset>1332</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x0000003b</resetValue>
|
|
<fields>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>UDMACH7SSEL</name>
|
|
<description>Output Selection for DMA Channel 7 SREQ
|
|
|
|
</description>
|
|
<addressOffset>1336</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000075</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EV</name>
|
|
<description>EV</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>UDMACH7BSEL</name>
|
|
<description>Output Selection for DMA Channel 7 REQ
|
|
|
|
</description>
|
|
<addressOffset>1340</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000076</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EV</name>
|
|
<description>EV</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>UDMACH8SSEL</name>
|
|
<description>Output Selection for DMA Channel 8 SREQ
|
|
|
|
Single request is ignored for this channel</description>
|
|
<addressOffset>1344</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000074</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EV</name>
|
|
<description>EV</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>UDMACH8BSEL</name>
|
|
<description>Output Selection for DMA Channel 8 REQ
|
|
|
|
</description>
|
|
<addressOffset>1348</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000074</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EV</name>
|
|
<description>EV</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>UDMACH9SSEL</name>
|
|
<description>Output Selection for DMA Channel 9 SREQ
|
|
|
|
DMA_DONE for the corresponding DMA channel is available as interrupt on GPT0 as GPT0:RIS.DMAARIS
|
|
|
|
</description>
|
|
<addressOffset>1352</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000045</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EV</name>
|
|
<description>EV</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>UDMACH9BSEL</name>
|
|
<description>Output Selection for DMA Channel 9 REQ
|
|
|
|
DMA_DONE for the corresponding DMA channel is available as interrupt on GPT0 as GPT0:RIS.DMAARIS
|
|
|
|
</description>
|
|
<addressOffset>1356</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000004d</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EV</name>
|
|
<description>EV</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>UDMACH10SSEL</name>
|
|
<description>Output Selection for DMA Channel 10 SREQ
|
|
|
|
DMA_DONE for the corresponding DMA channel is available as interrupt on GPT0 as GPT0:RIS.DMABRIS
|
|
|
|
</description>
|
|
<addressOffset>1360</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000046</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EV</name>
|
|
<description>EV</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>UDMACH10BSEL</name>
|
|
<description>Output Selection for DMA Channel 10 REQ
|
|
|
|
DMA_DONE for the corresponding DMA channel is available as interrupt on GPT0 as GPT0:RIS.DMABRIS
|
|
|
|
</description>
|
|
<addressOffset>1364</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000004e</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EV</name>
|
|
<description>EV</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>UDMACH11SSEL</name>
|
|
<description>Output Selection for DMA Channel 11 SREQ
|
|
|
|
DMA_DONE for the corresponding DMA channel is available as interrupt on GPT1 as GPT1:RIS.DMAARIS
|
|
|
|
</description>
|
|
<addressOffset>1368</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000047</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EV</name>
|
|
<description>EV</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>UDMACH11BSEL</name>
|
|
<description>Output Selection for DMA Channel 11 REQ
|
|
|
|
DMA_DONE for the corresponding DMA channel is available as interrupt on GPT1 as GPT1:RIS.DMAARIS
|
|
|
|
</description>
|
|
<addressOffset>1372</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000004f</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EV</name>
|
|
<description>EV</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>UDMACH12SSEL</name>
|
|
<description>Output Selection for DMA Channel 12 SREQ
|
|
|
|
DMA_DONE for the corresponding DMA channel is available as interrupt on GPT1 as GPT1:RIS.DMABRIS
|
|
|
|
</description>
|
|
<addressOffset>1376</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000048</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EV</name>
|
|
<description>EV</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>UDMACH12BSEL</name>
|
|
<description>Output Selection for DMA Channel 12 REQ
|
|
|
|
DMA_DONE for the corresponding DMA channel is available as interrupt on GPT1 as GPT1:RIS.DMABRIS
|
|
|
|
</description>
|
|
<addressOffset>1380</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000050</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EV</name>
|
|
<description>EV</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>UDMACH13BSEL</name>
|
|
<description>Output Selection for DMA Channel 13 REQ</description>
|
|
<addressOffset>1388</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000003</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EV</name>
|
|
<description>EV</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>UDMACH14BSEL</name>
|
|
<description>Output Selection for DMA Channel 14 REQ</description>
|
|
<addressOffset>1396</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EV</name>
|
|
<description>EV</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>UDMACH15BSEL</name>
|
|
<description>Output Selection for DMA Channel 15 REQ</description>
|
|
<addressOffset>1404</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000007</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EV</name>
|
|
<description>EV</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>UDMACH16SSEL</name>
|
|
<description>Output Selection for DMA Channel 16 SREQ
|
|
|
|
</description>
|
|
<addressOffset>1408</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x0000002d</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EV</name>
|
|
<description>EV</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>UDMACH16BSEL</name>
|
|
<description>Output Selection for DMA Channel 16 REQ
|
|
|
|
</description>
|
|
<addressOffset>1412</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x0000002c</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EV</name>
|
|
<description>EV</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>UDMACH17SSEL</name>
|
|
<description>Output Selection for DMA Channel 17 SREQ
|
|
|
|
</description>
|
|
<addressOffset>1416</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x0000002f</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EV</name>
|
|
<description>EV</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>UDMACH17BSEL</name>
|
|
<description>Output Selection for DMA Channel 17 REQ
|
|
|
|
</description>
|
|
<addressOffset>1420</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x0000002e</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EV</name>
|
|
<description>EV</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>UDMACH21SSEL</name>
|
|
<description>Output Selection for DMA Channel 21 SREQ</description>
|
|
<addressOffset>1448</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000064</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EV</name>
|
|
<description>EV</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>UDMACH21BSEL</name>
|
|
<description>Output Selection for DMA Channel 21 REQ</description>
|
|
<addressOffset>1452</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000064</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EV</name>
|
|
<description>EV</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>UDMACH22SSEL</name>
|
|
<description>Output Selection for DMA Channel 22 SREQ</description>
|
|
<addressOffset>1456</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000065</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EV</name>
|
|
<description>EV</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>UDMACH22BSEL</name>
|
|
<description>Output Selection for DMA Channel 22 REQ</description>
|
|
<addressOffset>1460</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000065</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EV</name>
|
|
<description>EV</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>UDMACH23SSEL</name>
|
|
<description>Output Selection for DMA Channel 23 SREQ</description>
|
|
<addressOffset>1464</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000066</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EV</name>
|
|
<description>EV</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>UDMACH23BSEL</name>
|
|
<description>Output Selection for DMA Channel 23 REQ</description>
|
|
<addressOffset>1468</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000066</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EV</name>
|
|
<description>EV</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>UDMACH24SSEL</name>
|
|
<description>Output Selection for DMA Channel 24 SREQ</description>
|
|
<addressOffset>1472</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000067</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EV</name>
|
|
<description>EV</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>UDMACH24BSEL</name>
|
|
<description>Output Selection for DMA Channel 24 REQ</description>
|
|
<addressOffset>1476</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000067</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EV</name>
|
|
<description>EV</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>GPT3ACAPTSEL</name>
|
|
<description>Output Selection for GPT3 0</description>
|
|
<addressOffset>1536</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000005b</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EV</name>
|
|
<description>EV</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>GPT3BCAPTSEL</name>
|
|
<description>Output Selection for GPT3 1</description>
|
|
<addressOffset>1540</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000005c</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EV</name>
|
|
<description>EV</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>AUXSEL0</name>
|
|
<description>Output Selection for AUX Subscriber 0</description>
|
|
<addressOffset>1792</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000010</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EV</name>
|
|
<description>EV</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CM3NMISEL0</name>
|
|
<description>Output Selection for NMI Subscriber 0</description>
|
|
<addressOffset>2048</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000063</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EV</name>
|
|
<description>EV</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>I2SSTMPSEL0</name>
|
|
<description>Output Selection for I2S Subscriber 0</description>
|
|
<addressOffset>2304</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000005f</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EV</name>
|
|
<description>EV</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FRZSEL0</name>
|
|
<description>Output Selection for FRZ Subscriber 0</description>
|
|
<addressOffset>2560</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000078</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EV</name>
|
|
<description>EV</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SWEV</name>
|
|
<description>Set or Clear Software Events</description>
|
|
<addressOffset>3840</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SWEV3</name>
|
|
<description>SWEV3</description>
|
|
<bitRange>[24:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SWEV2</name>
|
|
<description>SWEV2</description>
|
|
<bitRange>[16:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SWEV1</name>
|
|
<description>SWEV1</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SWEV0</name>
|
|
<description>SWEV0</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral><peripheral>
|
|
<name>FCFG1</name>
|
|
<description>Factory configuration area (FCFG1)</description>
|
|
<baseAddress>0x50001000</baseAddress>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x400</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<registers>
|
|
<register>
|
|
<name>MISC_CONF_1</name>
|
|
<description>Misc configurations</description>
|
|
<addressOffset>160</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0xffffff00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DEVICE_MINOR_REV</name>
|
|
<description>DEVICE_MINOR_REV</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>BAW_MEAS_5</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>176</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>BAW_D5</name>
|
|
<description>BAW_D5</description>
|
|
<bitRange>[31:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>BAW_T5</name>
|
|
<description>BAW_T5</description>
|
|
<bitRange>[15:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>BAW_DT5</name>
|
|
<description>BAW_DT5</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>BAW_MEAS_4</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>180</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>BAW_D4</name>
|
|
<description>BAW_D4</description>
|
|
<bitRange>[31:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>BAW_T4</name>
|
|
<description>BAW_T4</description>
|
|
<bitRange>[15:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>BAW_DT4</name>
|
|
<description>BAW_DT4</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>BAW_MEAS_3</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>184</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>BAW_D3</name>
|
|
<description>BAW_D3</description>
|
|
<bitRange>[31:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>BAW_T3</name>
|
|
<description>BAW_T3</description>
|
|
<bitRange>[15:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>BAW_DT3</name>
|
|
<description>BAW_DT3</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>BAW_MEAS_2</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>188</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>BAW_D2</name>
|
|
<description>BAW_D2</description>
|
|
<bitRange>[31:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>BAW_T2</name>
|
|
<description>BAW_T2</description>
|
|
<bitRange>[15:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>BAW_DT2</name>
|
|
<description>BAW_DT2</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>BAW_MEAS_1</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>192</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>BAW_D1</name>
|
|
<description>BAW_D1</description>
|
|
<bitRange>[31:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>BAW_T1</name>
|
|
<description>BAW_T1</description>
|
|
<bitRange>[15:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>BAW_DT1</name>
|
|
<description>BAW_DT1</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CONFIG_RF_FRONTEND_DIV5</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>196</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x70003f80</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IFAMP_IB</name>
|
|
<description>IFAMP_IB</description>
|
|
<bitRange>[31:28]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>LNA_IB</name>
|
|
<description>LNA_IB</description>
|
|
<bitRange>[27:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IFAMP_TRIM</name>
|
|
<description>IFAMP_TRIM</description>
|
|
<bitRange>[23:19]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CTL_PA0_TRIM</name>
|
|
<description>CTL_PA0_TRIM</description>
|
|
<bitRange>[18:14]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RFLDO_TRIM_OUTPUT</name>
|
|
<description>RFLDO_TRIM_OUTPUT</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CONFIG_RF_FRONTEND_DIV6</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>200</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x70003f80</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IFAMP_IB</name>
|
|
<description>IFAMP_IB</description>
|
|
<bitRange>[31:28]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>LNA_IB</name>
|
|
<description>LNA_IB</description>
|
|
<bitRange>[27:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IFAMP_TRIM</name>
|
|
<description>IFAMP_TRIM</description>
|
|
<bitRange>[23:19]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CTL_PA0_TRIM</name>
|
|
<description>CTL_PA0_TRIM</description>
|
|
<bitRange>[18:14]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RFLDO_TRIM_OUTPUT</name>
|
|
<description>RFLDO_TRIM_OUTPUT</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CONFIG_RF_FRONTEND_DIV10</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>204</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x70003f80</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IFAMP_IB</name>
|
|
<description>IFAMP_IB</description>
|
|
<bitRange>[31:28]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>LNA_IB</name>
|
|
<description>LNA_IB</description>
|
|
<bitRange>[27:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IFAMP_TRIM</name>
|
|
<description>IFAMP_TRIM</description>
|
|
<bitRange>[23:19]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CTL_PA0_TRIM</name>
|
|
<description>CTL_PA0_TRIM</description>
|
|
<bitRange>[18:14]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RFLDO_TRIM_OUTPUT</name>
|
|
<description>RFLDO_TRIM_OUTPUT</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CONFIG_RF_FRONTEND_DIV12</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>208</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x70003f80</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IFAMP_IB</name>
|
|
<description>IFAMP_IB</description>
|
|
<bitRange>[31:28]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>LNA_IB</name>
|
|
<description>LNA_IB</description>
|
|
<bitRange>[27:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IFAMP_TRIM</name>
|
|
<description>IFAMP_TRIM</description>
|
|
<bitRange>[23:19]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CTL_PA0_TRIM</name>
|
|
<description>CTL_PA0_TRIM</description>
|
|
<bitRange>[18:14]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RFLDO_TRIM_OUTPUT</name>
|
|
<description>RFLDO_TRIM_OUTPUT</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CONFIG_RF_FRONTEND_DIV15</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>212</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x70003f80</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IFAMP_IB</name>
|
|
<description>IFAMP_IB</description>
|
|
<bitRange>[31:28]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>LNA_IB</name>
|
|
<description>LNA_IB</description>
|
|
<bitRange>[27:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IFAMP_TRIM</name>
|
|
<description>IFAMP_TRIM</description>
|
|
<bitRange>[23:19]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CTL_PA0_TRIM</name>
|
|
<description>CTL_PA0_TRIM</description>
|
|
<bitRange>[18:14]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RFLDO_TRIM_OUTPUT</name>
|
|
<description>RFLDO_TRIM_OUTPUT</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CONFIG_RF_FRONTEND_DIV30</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>216</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x70003f80</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IFAMP_IB</name>
|
|
<description>IFAMP_IB</description>
|
|
<bitRange>[31:28]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>LNA_IB</name>
|
|
<description>LNA_IB</description>
|
|
<bitRange>[27:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IFAMP_TRIM</name>
|
|
<description>IFAMP_TRIM</description>
|
|
<bitRange>[23:19]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CTL_PA0_TRIM</name>
|
|
<description>CTL_PA0_TRIM</description>
|
|
<bitRange>[18:14]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RFLDO_TRIM_OUTPUT</name>
|
|
<description>RFLDO_TRIM_OUTPUT</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CONFIG_SYNTH_DIV5</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>220</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0xf0000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>RFC_MDM_DEMIQMC0</name>
|
|
<description>RFC_MDM_DEMIQMC0</description>
|
|
<bitRange>[27:12]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>LDOVCO_TRIM_OUTPUT</name>
|
|
<description>LDOVCO_TRIM_OUTPUT</description>
|
|
<bitRange>[11:6]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SLDO_TRIM_OUTPUT</name>
|
|
<description>SLDO_TRIM_OUTPUT</description>
|
|
<bitRange>[5:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CONFIG_SYNTH_DIV6</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>224</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0xf0000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>RFC_MDM_DEMIQMC0</name>
|
|
<description>RFC_MDM_DEMIQMC0</description>
|
|
<bitRange>[27:12]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>LDOVCO_TRIM_OUTPUT</name>
|
|
<description>LDOVCO_TRIM_OUTPUT</description>
|
|
<bitRange>[11:6]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SLDO_TRIM_OUTPUT</name>
|
|
<description>SLDO_TRIM_OUTPUT</description>
|
|
<bitRange>[5:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CONFIG_SYNTH_DIV10</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>228</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0xf0000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>RFC_MDM_DEMIQMC0</name>
|
|
<description>RFC_MDM_DEMIQMC0</description>
|
|
<bitRange>[27:12]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>LDOVCO_TRIM_OUTPUT</name>
|
|
<description>LDOVCO_TRIM_OUTPUT</description>
|
|
<bitRange>[11:6]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SLDO_TRIM_OUTPUT</name>
|
|
<description>SLDO_TRIM_OUTPUT</description>
|
|
<bitRange>[5:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CONFIG_SYNTH_DIV12</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>232</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0xf0000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>RFC_MDM_DEMIQMC0</name>
|
|
<description>RFC_MDM_DEMIQMC0</description>
|
|
<bitRange>[27:12]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>LDOVCO_TRIM_OUTPUT</name>
|
|
<description>LDOVCO_TRIM_OUTPUT</description>
|
|
<bitRange>[11:6]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SLDO_TRIM_OUTPUT</name>
|
|
<description>SLDO_TRIM_OUTPUT</description>
|
|
<bitRange>[5:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CONFIG_SYNTH_DIV15</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>236</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0xf0000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>RFC_MDM_DEMIQMC0</name>
|
|
<description>RFC_MDM_DEMIQMC0</description>
|
|
<bitRange>[27:12]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>LDOVCO_TRIM_OUTPUT</name>
|
|
<description>LDOVCO_TRIM_OUTPUT</description>
|
|
<bitRange>[11:6]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SLDO_TRIM_OUTPUT</name>
|
|
<description>SLDO_TRIM_OUTPUT</description>
|
|
<bitRange>[5:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CONFIG_SYNTH_DIV30</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>240</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0xf0000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>RFC_MDM_DEMIQMC0</name>
|
|
<description>RFC_MDM_DEMIQMC0</description>
|
|
<bitRange>[27:12]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>LDOVCO_TRIM_OUTPUT</name>
|
|
<description>LDOVCO_TRIM_OUTPUT</description>
|
|
<bitRange>[11:6]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SLDO_TRIM_OUTPUT</name>
|
|
<description>SLDO_TRIM_OUTPUT</description>
|
|
<bitRange>[5:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CONFIG_MISC_ADC_DIV5</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>244</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0xfffe014d</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>RSSI_OFFSET</name>
|
|
<description>RSSI_OFFSET</description>
|
|
<bitRange>[16:9]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>QUANTCTLTHRES</name>
|
|
<description>QUANTCTLTHRES</description>
|
|
<bitRange>[8:6]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DACTRIM</name>
|
|
<description>DACTRIM</description>
|
|
<bitRange>[5:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CONFIG_MISC_ADC_DIV6</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>248</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0xfffe014d</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>RSSI_OFFSET</name>
|
|
<description>RSSI_OFFSET</description>
|
|
<bitRange>[16:9]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>QUANTCTLTHRES</name>
|
|
<description>QUANTCTLTHRES</description>
|
|
<bitRange>[8:6]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DACTRIM</name>
|
|
<description>DACTRIM</description>
|
|
<bitRange>[5:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CONFIG_MISC_ADC_DIV10</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>252</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0xfffe014d</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>RSSI_OFFSET</name>
|
|
<description>RSSI_OFFSET</description>
|
|
<bitRange>[16:9]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>QUANTCTLTHRES</name>
|
|
<description>QUANTCTLTHRES</description>
|
|
<bitRange>[8:6]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DACTRIM</name>
|
|
<description>DACTRIM</description>
|
|
<bitRange>[5:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CONFIG_MISC_ADC_DIV12</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>256</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0xfffe014d</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>RSSI_OFFSET</name>
|
|
<description>RSSI_OFFSET</description>
|
|
<bitRange>[16:9]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>QUANTCTLTHRES</name>
|
|
<description>QUANTCTLTHRES</description>
|
|
<bitRange>[8:6]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DACTRIM</name>
|
|
<description>DACTRIM</description>
|
|
<bitRange>[5:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CONFIG_MISC_ADC_DIV15</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>260</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0xfffe014d</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>RSSI_OFFSET</name>
|
|
<description>RSSI_OFFSET</description>
|
|
<bitRange>[16:9]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>QUANTCTLTHRES</name>
|
|
<description>QUANTCTLTHRES</description>
|
|
<bitRange>[8:6]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DACTRIM</name>
|
|
<description>DACTRIM</description>
|
|
<bitRange>[5:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CONFIG_MISC_ADC_DIV30</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>264</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0xfffe014d</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>RSSI_OFFSET</name>
|
|
<description>RSSI_OFFSET</description>
|
|
<bitRange>[16:9]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>QUANTCTLTHRES</name>
|
|
<description>QUANTCTLTHRES</description>
|
|
<bitRange>[8:6]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DACTRIM</name>
|
|
<description>DACTRIM</description>
|
|
<bitRange>[5:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SHDW_DIE_ID_0</name>
|
|
<description>Shadow of the DIE_ID_0 register in eFuse</description>
|
|
<addressOffset>280</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>ID_31_0</name>
|
|
<description>ID_31_0</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SHDW_DIE_ID_1</name>
|
|
<description>Shadow of the DIE_ID_1 register in eFuse</description>
|
|
<addressOffset>284</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>ID_63_32</name>
|
|
<description>ID_63_32</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SHDW_DIE_ID_2</name>
|
|
<description>Shadow of the DIE_ID_2 register in eFuse</description>
|
|
<addressOffset>288</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>ID_95_64</name>
|
|
<description>ID_95_64</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SHDW_DIE_ID_3</name>
|
|
<description>Shadow of the DIE_ID_3 register in eFuse</description>
|
|
<addressOffset>292</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>ID_127_96</name>
|
|
<description>ID_127_96</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SHDW_OSC_BIAS_LDO_TRIM</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>312</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SET_RCOSC_HF_COARSE_RESISTOR</name>
|
|
<description>SET_RCOSC_HF_COARSE_RESISTOR</description>
|
|
<bitRange>[28:27]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TRIMMAG</name>
|
|
<description>TRIMMAG</description>
|
|
<bitRange>[26:23]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TRIMIREF</name>
|
|
<description>TRIMIREF</description>
|
|
<bitRange>[22:18]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>ITRIM_DIG_LDO</name>
|
|
<description>ITRIM_DIG_LDO</description>
|
|
<bitRange>[17:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>VTRIM_DIG</name>
|
|
<description>VTRIM_DIG</description>
|
|
<bitRange>[15:12]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>VTRIM_COARSE</name>
|
|
<description>VTRIM_COARSE</description>
|
|
<bitRange>[11:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RCOSCHF_CTRIM</name>
|
|
<description>RCOSCHF_CTRIM</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SHDW_ANA_TRIM</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>316</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>BOD_BANDGAP_TRIM_CNF</name>
|
|
<description>BOD_BANDGAP_TRIM_CNF</description>
|
|
<bitRange>[26:25]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>VDDR_ENABLE_PG1</name>
|
|
<description>VDDR_ENABLE_PG1</description>
|
|
<bitRange>[24:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>VDDR_OK_HYS</name>
|
|
<description>VDDR_OK_HYS</description>
|
|
<bitRange>[23:23]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IPTAT_TRIM</name>
|
|
<description>IPTAT_TRIM</description>
|
|
<bitRange>[22:21]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>VDDR_TRIM</name>
|
|
<description>VDDR_TRIM</description>
|
|
<bitRange>[20:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TRIMBOD_INTMODE</name>
|
|
<description>TRIMBOD_INTMODE</description>
|
|
<bitRange>[15:11]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TRIMBOD_EXTMODE</name>
|
|
<description>TRIMBOD_EXTMODE</description>
|
|
<bitRange>[10:6]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TRIMTEMP</name>
|
|
<description>TRIMTEMP</description>
|
|
<bitRange>[5:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FLASH_NUMBER</name>
|
|
<description></description>
|
|
<addressOffset>356</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LOT_NUMBER</name>
|
|
<description>LOT_NUMBER</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FLASH_COORDINATE</name>
|
|
<description></description>
|
|
<addressOffset>364</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>XCOORDINATE</name>
|
|
<description>XCOORDINATE</description>
|
|
<bitRange>[31:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>YCOORDINATE</name>
|
|
<description>YCOORDINATE</description>
|
|
<bitRange>[15:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FLASH_E_P</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>368</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x17331a33</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>PSU</name>
|
|
<description>PSU</description>
|
|
<bitRange>[31:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>ESU</name>
|
|
<description>ESU</description>
|
|
<bitRange>[23:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PVSU</name>
|
|
<description>PVSU</description>
|
|
<bitRange>[15:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EVSU</name>
|
|
<description>EVSU</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FLASH_C_E_P_R</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>372</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x0a0a2000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>RVSU</name>
|
|
<description>RVSU</description>
|
|
<bitRange>[31:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PV_ACCESS</name>
|
|
<description>PV_ACCESS</description>
|
|
<bitRange>[23:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>A_EXEZ_SETUP</name>
|
|
<description>A_EXEZ_SETUP</description>
|
|
<bitRange>[15:12]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CVSU</name>
|
|
<description>CVSU</description>
|
|
<bitRange>[11:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FLASH_P_R_PV</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>376</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x026e0200</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>PH</name>
|
|
<description>PH</description>
|
|
<bitRange>[31:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RH</name>
|
|
<description>RH</description>
|
|
<bitRange>[23:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PVH</name>
|
|
<description>PVH</description>
|
|
<bitRange>[15:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PVH2</name>
|
|
<description>PVH2</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FLASH_EH_SEQ</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>380</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x0200f000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EH</name>
|
|
<description>EH</description>
|
|
<bitRange>[31:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SEQ</name>
|
|
<description>SEQ</description>
|
|
<bitRange>[23:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>VSTAT</name>
|
|
<description>VSTAT</description>
|
|
<bitRange>[15:12]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SM_FREQUENCY</name>
|
|
<description>SM_FREQUENCY</description>
|
|
<bitRange>[11:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FLASH_VHV_E</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>384</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>VHV_E_START</name>
|
|
<description>VHV_E_START</description>
|
|
<bitRange>[31:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>VHV_E_STEP_HIGHT</name>
|
|
<description>VHV_E_STEP_HIGHT</description>
|
|
<bitRange>[15:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FLASH_PP</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>388</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000014</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>PUMP_SU</name>
|
|
<description>PUMP_SU</description>
|
|
<bitRange>[31:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>MAX_PP</name>
|
|
<description>MAX_PP</description>
|
|
<bitRange>[15:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FLASH_PROG_EP</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>392</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x0fa00010</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>MAX_EP</name>
|
|
<description>MAX_EP</description>
|
|
<bitRange>[31:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PROGRAM_PW</name>
|
|
<description>PROGRAM_PW</description>
|
|
<bitRange>[15:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FLASH_ERA_PW</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>396</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000fa0</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>ERASE_PW</name>
|
|
<description>ERASE_PW</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FLASH_VHV</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>400</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000004</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TRIM13_P</name>
|
|
<description>TRIM13_P</description>
|
|
<bitRange>[27:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>VHV_P</name>
|
|
<description>VHV_P</description>
|
|
<bitRange>[19:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TRIM13_E</name>
|
|
<description>TRIM13_E</description>
|
|
<bitRange>[11:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>VHV_E</name>
|
|
<description>VHV_E</description>
|
|
<bitRange>[3:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FLASH_VHV_PV</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>404</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00080001</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TRIM13_PV</name>
|
|
<description>TRIM13_PV</description>
|
|
<bitRange>[27:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>VHV_PV</name>
|
|
<description>VHV_PV</description>
|
|
<bitRange>[19:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>VCG2P5</name>
|
|
<description>VCG2P5</description>
|
|
<bitRange>[15:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>VINH</name>
|
|
<description>VINH</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FLASH_V</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>408</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>VSL_P</name>
|
|
<description>VSL_P</description>
|
|
<bitRange>[31:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>VWL_P</name>
|
|
<description>VWL_P</description>
|
|
<bitRange>[23:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>V_READ</name>
|
|
<description>V_READ</description>
|
|
<bitRange>[15:8]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>USER_ID</name>
|
|
<description>User Identification.
|
|
Reading this register or the ICEPICK_DEVICE_ID register is the only support way of identifying a device.
|
|
The value of this register will be written to AON_WUC:JTAGUSERCODE by boot FW while in safezone.</description>
|
|
<addressOffset>660</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>PG_REV</name>
|
|
<description>PG_REV</description>
|
|
<bitRange>[31:28]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>VER</name>
|
|
<description>VER</description>
|
|
<bitRange>[27:26]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SEQUENCE</name>
|
|
<description>SEQUENCE</description>
|
|
<bitRange>[22:19]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PKG</name>
|
|
<description>PKG</description>
|
|
<bitRange>[18:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PROTOCOL</name>
|
|
<description>PROTOCOL</description>
|
|
<bitRange>[15:12]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FLASH_OTP_DATA3</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>688</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00110003</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EC_STEP_SIZE</name>
|
|
<description>EC_STEP_SIZE</description>
|
|
<bitRange>[31:23]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DO_PRECOND</name>
|
|
<description>DO_PRECOND</description>
|
|
<bitRange>[22:22]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>MAX_EC_LEVEL</name>
|
|
<description>MAX_EC_LEVEL</description>
|
|
<bitRange>[21:18]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TRIM_1P7</name>
|
|
<description>TRIM_1P7</description>
|
|
<bitRange>[17:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>FLASH_SIZE</name>
|
|
<description>FLASH_SIZE</description>
|
|
<bitRange>[15:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WAIT_SYSCODE</name>
|
|
<description>WAIT_SYSCODE</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>ANA2_TRIM</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>692</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x8240f87f</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>RCOSCHFCTRIMFRACT_EN</name>
|
|
<description>RCOSCHFCTRIMFRACT_EN</description>
|
|
<bitRange>[31:31]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RCOSCHFCTRIMFRACT</name>
|
|
<description>RCOSCHFCTRIMFRACT</description>
|
|
<bitRange>[30:26]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SET_RCOSC_HF_FINE_RESISTOR</name>
|
|
<description>SET_RCOSC_HF_FINE_RESISTOR</description>
|
|
<bitRange>[24:23]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>ATESTLF_UDIGLDO_IBIAS_TRIM</name>
|
|
<description>ATESTLF_UDIGLDO_IBIAS_TRIM</description>
|
|
<bitRange>[22:22]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>NANOAMP_RES_TRIM</name>
|
|
<description>NANOAMP_RES_TRIM</description>
|
|
<bitRange>[21:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DITHER_EN</name>
|
|
<description>DITHER_EN</description>
|
|
<bitRange>[11:11]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DCDC_IPEAK</name>
|
|
<description>DCDC_IPEAK</description>
|
|
<bitRange>[10:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DEAD_TIME_TRIM</name>
|
|
<description>DEAD_TIME_TRIM</description>
|
|
<bitRange>[7:6]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DCDC_LOW_EN_SEL</name>
|
|
<description>DCDC_LOW_EN_SEL</description>
|
|
<bitRange>[5:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DCDC_HIGH_EN_SEL</name>
|
|
<description>DCDC_HIGH_EN_SEL</description>
|
|
<bitRange>[2:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>LDO_TRIM</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>696</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0xe0f8e0fb</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>VDDR_TRIM_SLEEP</name>
|
|
<description>VDDR_TRIM_SLEEP</description>
|
|
<bitRange>[28:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>GLDO_CURSRC</name>
|
|
<description>GLDO_CURSRC</description>
|
|
<bitRange>[18:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>ITRIM_DIGLDO_LOAD</name>
|
|
<description>ITRIM_DIGLDO_LOAD</description>
|
|
<bitRange>[12:11]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>ITRIM_UDIGLDO</name>
|
|
<description>ITRIM_UDIGLDO</description>
|
|
<bitRange>[10:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>VTRIM_DELTA</name>
|
|
<description>VTRIM_DELTA</description>
|
|
<bitRange>[2:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>MAC_BLE_0</name>
|
|
<description>MAC BLE Address 0</description>
|
|
<addressOffset>744</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>ADDR_0_31</name>
|
|
<description>ADDR_0_31</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>MAC_BLE_1</name>
|
|
<description>MAC BLE Address 1</description>
|
|
<addressOffset>748</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>ADDR_32_63</name>
|
|
<description>ADDR_32_63</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>MAC_15_4_0</name>
|
|
<description>MAC IEEE 802.15.4 Address 0</description>
|
|
<addressOffset>752</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>ADDR_0_31</name>
|
|
<description>ADDR_0_31</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>MAC_15_4_1</name>
|
|
<description>MAC IEEE 802.15.4 Address 1</description>
|
|
<addressOffset>756</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>ADDR_32_63</name>
|
|
<description>ADDR_32_63</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FLASH_OTP_DATA4</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>776</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x98989f9f</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>STANDBY_MODE_SEL_INT_WRT</name>
|
|
<description>STANDBY_MODE_SEL_INT_WRT</description>
|
|
<bitRange>[31:31]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>STANDBY_PW_SEL_INT_WRT</name>
|
|
<description>STANDBY_PW_SEL_INT_WRT</description>
|
|
<bitRange>[30:29]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIS_STANDBY_INT_WRT</name>
|
|
<description>DIS_STANDBY_INT_WRT</description>
|
|
<bitRange>[28:28]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIS_IDLE_INT_WRT</name>
|
|
<description>DIS_IDLE_INT_WRT</description>
|
|
<bitRange>[27:27]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>VIN_AT_X_INT_WRT</name>
|
|
<description>VIN_AT_X_INT_WRT</description>
|
|
<bitRange>[26:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>STANDBY_MODE_SEL_EXT_WRT</name>
|
|
<description>STANDBY_MODE_SEL_EXT_WRT</description>
|
|
<bitRange>[23:23]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>STANDBY_PW_SEL_EXT_WRT</name>
|
|
<description>STANDBY_PW_SEL_EXT_WRT</description>
|
|
<bitRange>[22:21]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIS_STANDBY_EXT_WRT</name>
|
|
<description>DIS_STANDBY_EXT_WRT</description>
|
|
<bitRange>[20:20]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIS_IDLE_EXT_WRT</name>
|
|
<description>DIS_IDLE_EXT_WRT</description>
|
|
<bitRange>[19:19]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>VIN_AT_X_EXT_WRT</name>
|
|
<description>VIN_AT_X_EXT_WRT</description>
|
|
<bitRange>[18:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>STANDBY_MODE_SEL_INT_RD</name>
|
|
<description>STANDBY_MODE_SEL_INT_RD</description>
|
|
<bitRange>[15:15]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>STANDBY_PW_SEL_INT_RD</name>
|
|
<description>STANDBY_PW_SEL_INT_RD</description>
|
|
<bitRange>[14:13]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIS_STANDBY_INT_RD</name>
|
|
<description>DIS_STANDBY_INT_RD</description>
|
|
<bitRange>[12:12]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIS_IDLE_INT_RD</name>
|
|
<description>DIS_IDLE_INT_RD</description>
|
|
<bitRange>[11:11]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>VIN_AT_X_INT_RD</name>
|
|
<description>VIN_AT_X_INT_RD</description>
|
|
<bitRange>[10:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>STANDBY_MODE_SEL_EXT_RD</name>
|
|
<description>STANDBY_MODE_SEL_EXT_RD</description>
|
|
<bitRange>[7:7]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>STANDBY_PW_SEL_EXT_RD</name>
|
|
<description>STANDBY_PW_SEL_EXT_RD</description>
|
|
<bitRange>[6:5]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIS_STANDBY_EXT_RD</name>
|
|
<description>DIS_STANDBY_EXT_RD</description>
|
|
<bitRange>[4:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIS_IDLE_EXT_RD</name>
|
|
<description>DIS_IDLE_EXT_RD</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>VIN_AT_X_EXT_RD</name>
|
|
<description>VIN_AT_X_EXT_RD</description>
|
|
<bitRange>[2:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>MISC_TRIM</name>
|
|
<description>Miscellaneous Trim Parameters</description>
|
|
<addressOffset>780</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0xffffff33</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TEMPVSLOPE</name>
|
|
<description>TEMPVSLOPE</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RCOSC_HF_TEMPCOMP</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>784</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000003</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FINE_RESISTOR</name>
|
|
<description>FINE_RESISTOR</description>
|
|
<bitRange>[31:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CTRIM</name>
|
|
<description>CTRIM</description>
|
|
<bitRange>[23:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CTRIMFRACT_QUAD</name>
|
|
<description>CTRIMFRACT_QUAD</description>
|
|
<bitRange>[15:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CTRIMFRACT_SLOPE</name>
|
|
<description>CTRIMFRACT_SLOPE</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>ICEPICK_DEVICE_ID</name>
|
|
<description>IcePick Device Identification
|
|
Reading this register or the USER_ID register is the only support way of identifying a device.</description>
|
|
<addressOffset>792</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x2b9be02f</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>PG_REV</name>
|
|
<description>PG_REV</description>
|
|
<bitRange>[31:28]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WAFER_ID</name>
|
|
<description>WAFER_ID</description>
|
|
<bitRange>[27:12]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>MANUFACTURER_ID</name>
|
|
<description>MANUFACTURER_ID</description>
|
|
<bitRange>[11:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FCFG1_REVISION</name>
|
|
<description>Factory Configuration (FCFG1) Revision</description>
|
|
<addressOffset>796</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000024</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>REV</name>
|
|
<description>REV</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>MISC_OTP_DATA</name>
|
|
<description>Misc OTP Data</description>
|
|
<addressOffset>800</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x0000ca00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>RCOSC_HF_ITUNE</name>
|
|
<description>RCOSC_HF_ITUNE</description>
|
|
<bitRange>[31:28]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RCOSC_HF_CRIM</name>
|
|
<description>RCOSC_HF_CRIM</description>
|
|
<bitRange>[27:20]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PER_M</name>
|
|
<description>PER_M</description>
|
|
<bitRange>[19:15]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PER_E</name>
|
|
<description>PER_E</description>
|
|
<bitRange>[14:12]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PO_TAIL_RES_TRIM</name>
|
|
<description>PO_TAIL_RES_TRIM</description>
|
|
<bitRange>[11:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TEST_PROGRAM_REV</name>
|
|
<description>TEST_PROGRAM_REV</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IOCONF</name>
|
|
<description>IO Configuration</description>
|
|
<addressOffset>836</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x7fffff8000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>GPIO_CNT</name>
|
|
<description>GPIO_CNT</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CONFIG_IF_ADC</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>844</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x3460f400</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FF2ADJ</name>
|
|
<description>FF2ADJ</description>
|
|
<bitRange>[31:28]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>FF3ADJ</name>
|
|
<description>FF3ADJ</description>
|
|
<bitRange>[27:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>INT3ADJ</name>
|
|
<description>INT3ADJ</description>
|
|
<bitRange>[23:20]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>FF1ADJ</name>
|
|
<description>FF1ADJ</description>
|
|
<bitRange>[19:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>AAFCAP</name>
|
|
<description>AAFCAP</description>
|
|
<bitRange>[15:14]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>INT2ADJ</name>
|
|
<description>INT2ADJ</description>
|
|
<bitRange>[13:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IFDIGLDO_TRIM_OUTPUT</name>
|
|
<description>IFDIGLDO_TRIM_OUTPUT</description>
|
|
<bitRange>[9:5]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IFANALDO_TRIM_OUTPUT</name>
|
|
<description>IFANALDO_TRIM_OUTPUT</description>
|
|
<bitRange>[4:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CONFIG_OSC_TOP</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>848</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0xfc003c00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>XOSC_HF_ROW_Q12</name>
|
|
<description>XOSC_HF_ROW_Q12</description>
|
|
<bitRange>[29:26]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>XOSC_HF_COLUMN_Q12</name>
|
|
<description>XOSC_HF_COLUMN_Q12</description>
|
|
<bitRange>[25:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RCOSCLF_CTUNE_TRIM</name>
|
|
<description>RCOSCLF_CTUNE_TRIM</description>
|
|
<bitRange>[9:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RCOSCLF_RTUNE_TRIM</name>
|
|
<description>RCOSCLF_RTUNE_TRIM</description>
|
|
<bitRange>[1:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CONFIG_RF_FRONTEND</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>852</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x70001f80</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IFAMP_IB</name>
|
|
<description>IFAMP_IB</description>
|
|
<bitRange>[31:28]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>LNA_IB</name>
|
|
<description>LNA_IB</description>
|
|
<bitRange>[27:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IFAMP_TRIM</name>
|
|
<description>IFAMP_TRIM</description>
|
|
<bitRange>[23:19]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CTL_PA0_TRIM</name>
|
|
<description>CTL_PA0_TRIM</description>
|
|
<bitRange>[18:14]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PATRIMCOMPLETE_N</name>
|
|
<description>PATRIMCOMPLETE_N</description>
|
|
<bitRange>[13:13]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RFLDO_TRIM_OUTPUT</name>
|
|
<description>RFLDO_TRIM_OUTPUT</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CONFIG_SYNTH</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>856</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0xf0000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>RFC_MDM_DEMIQMC0</name>
|
|
<description>RFC_MDM_DEMIQMC0</description>
|
|
<bitRange>[27:12]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>LDOVCO_TRIM_OUTPUT</name>
|
|
<description>LDOVCO_TRIM_OUTPUT</description>
|
|
<bitRange>[11:6]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SLDO_TRIM_OUTPUT</name>
|
|
<description>SLDO_TRIM_OUTPUT</description>
|
|
<bitRange>[5:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SOC_ADC_ABS_GAIN</name>
|
|
<description>AUX_ADC Gain in Absolute Reference Mode</description>
|
|
<addressOffset>860</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0xffff0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SOC_ADC_ABS_GAIN_TEMP1</name>
|
|
<description>SOC_ADC_ABS_GAIN_TEMP1</description>
|
|
<bitRange>[15:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SOC_ADC_REL_GAIN</name>
|
|
<description>AUX_ADC Gain in Relative Reference Mode</description>
|
|
<addressOffset>864</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0xffff0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SOC_ADC_REL_GAIN_TEMP1</name>
|
|
<description>SOC_ADC_REL_GAIN_TEMP1</description>
|
|
<bitRange>[15:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SOC_ADC_OFFSET_INT</name>
|
|
<description>AUX_ADC Temperature Offsets in Absolute Reference Mode</description>
|
|
<addressOffset>872</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0xff00ff00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SOC_ADC_REL_OFFSET_TEMP1</name>
|
|
<description>SOC_ADC_REL_OFFSET_TEMP1</description>
|
|
<bitRange>[23:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SOC_ADC_ABS_OFFSET_TEMP1</name>
|
|
<description>SOC_ADC_ABS_OFFSET_TEMP1</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SOC_ADC_REF_TRIM_AND_OFFSET_EXT</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>876</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x3fffffc080</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SOC_ADC_REF_VOLTAGE_TRIM_TEMP1</name>
|
|
<description>SOC_ADC_REF_VOLTAGE_TRIM_TEMP1</description>
|
|
<bitRange>[5:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>AMPCOMP_TH1</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>880</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0xff7b828e</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>HPMRAMP3_LTH</name>
|
|
<description>HPMRAMP3_LTH</description>
|
|
<bitRange>[23:18]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>HPMRAMP3_HTH</name>
|
|
<description>HPMRAMP3_HTH</description>
|
|
<bitRange>[15:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IBIASCAP_LPTOHP_OL_CNT</name>
|
|
<description>IBIASCAP_LPTOHP_OL_CNT</description>
|
|
<bitRange>[9:6]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>HPMRAMP1_TH</name>
|
|
<description>HPMRAMP1_TH</description>
|
|
<bitRange>[5:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>AMPCOMP_TH2</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>884</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x6b8b0303</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LPMUPDATE_LTH</name>
|
|
<description>LPMUPDATE_LTH</description>
|
|
<bitRange>[31:26]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>LPMUPDATE_HTM</name>
|
|
<description>LPMUPDATE_HTM</description>
|
|
<bitRange>[23:18]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>ADC_COMP_AMPTH_LPM</name>
|
|
<description>ADC_COMP_AMPTH_LPM</description>
|
|
<bitRange>[15:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>ADC_COMP_AMPTH_HPM</name>
|
|
<description>ADC_COMP_AMPTH_HPM</description>
|
|
<bitRange>[7:2]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>AMPCOMP_CTRL1</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>888</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0xff183f47</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>AMPCOMP_REQ_MODE</name>
|
|
<description>AMPCOMP_REQ_MODE</description>
|
|
<bitRange>[30:30]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IBIAS_OFFSET</name>
|
|
<description>IBIAS_OFFSET</description>
|
|
<bitRange>[23:20]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IBIAS_INIT</name>
|
|
<description>IBIAS_INIT</description>
|
|
<bitRange>[19:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>LPM_IBIAS_WAIT_CNT_FINAL</name>
|
|
<description>LPM_IBIAS_WAIT_CNT_FINAL</description>
|
|
<bitRange>[15:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CAP_STEP</name>
|
|
<description>CAP_STEP</description>
|
|
<bitRange>[7:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IBIASCAP_HPTOLP_OL_CNT</name>
|
|
<description>IBIASCAP_HPTOLP_OL_CNT</description>
|
|
<bitRange>[3:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>ANABYPASS_VALUE2</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>892</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0xffffc3ff</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>XOSC_HF_IBIASTHERM</name>
|
|
<description>XOSC_HF_IBIASTHERM</description>
|
|
<bitRange>[13:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CONFIG_MISC_ADC</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>896</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0xfffc014d</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>RSSITRIMCOMPLETE_N</name>
|
|
<description>RSSITRIMCOMPLETE_N</description>
|
|
<bitRange>[17:17]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RSSI_OFFSET</name>
|
|
<description>RSSI_OFFSET</description>
|
|
<bitRange>[16:9]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>QUANTCTLTHRES</name>
|
|
<description>QUANTCTLTHRES</description>
|
|
<bitRange>[8:6]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DACTRIM</name>
|
|
<description>DACTRIM</description>
|
|
<bitRange>[5:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>VOLT_TRIM</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>904</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0xe0e0e0e0</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>VDDR_TRIM_HH</name>
|
|
<description>VDDR_TRIM_HH</description>
|
|
<bitRange>[28:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>VDDR_TRIM_H</name>
|
|
<description>VDDR_TRIM_H</description>
|
|
<bitRange>[20:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>VDDR_TRIM_SLEEP_H</name>
|
|
<description>VDDR_TRIM_SLEEP_H</description>
|
|
<bitRange>[12:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TRIMBOD_H</name>
|
|
<description>TRIMBOD_H</description>
|
|
<bitRange>[4:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>OSC_CONF</name>
|
|
<description>OSC Configuration</description>
|
|
<addressOffset>908</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0xf0080000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>ADC_SH_VBUF_EN</name>
|
|
<description>ADC_SH_VBUF_EN</description>
|
|
<bitRange>[29:29]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>ADC_SH_MODE_EN</name>
|
|
<description>ADC_SH_MODE_EN</description>
|
|
<bitRange>[28:28]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>ATESTLF_RCOSCLF_IBIAS_TRIM</name>
|
|
<description>ATESTLF_RCOSCLF_IBIAS_TRIM</description>
|
|
<bitRange>[27:27]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>XOSCLF_REGULATOR_TRIM</name>
|
|
<description>XOSCLF_REGULATOR_TRIM</description>
|
|
<bitRange>[26:25]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>XOSCLF_CMIRRWR_RATIO</name>
|
|
<description>XOSCLF_CMIRRWR_RATIO</description>
|
|
<bitRange>[24:21]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>XOSC_HF_FAST_START</name>
|
|
<description>XOSC_HF_FAST_START</description>
|
|
<bitRange>[20:19]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>XOSC_OPTION</name>
|
|
<description>XOSC_OPTION</description>
|
|
<bitRange>[18:18]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>BAW_OPTION</name>
|
|
<description>BAW_OPTION</description>
|
|
<bitRange>[17:17]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>BAW_BIAS_HOLD_MODE_EN</name>
|
|
<description>BAW_BIAS_HOLD_MODE_EN</description>
|
|
<bitRange>[16:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>BAW_CURRMIRR_RATIO</name>
|
|
<description>BAW_CURRMIRR_RATIO</description>
|
|
<bitRange>[15:12]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>BAW_BIAS_RES_SET</name>
|
|
<description>BAW_BIAS_RES_SET</description>
|
|
<bitRange>[11:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>BAW_FILTER_EN</name>
|
|
<description>BAW_FILTER_EN</description>
|
|
<bitRange>[7:7]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>BAW_BIAS_RECHARGE_DELAY</name>
|
|
<description>BAW_BIAS_RECHARGE_DELAY</description>
|
|
<bitRange>[6:5]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>BAW_SERIES_CAP</name>
|
|
<description>BAW_SERIES_CAP</description>
|
|
<bitRange>[2:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>BAW_DIV3_BYPASS</name>
|
|
<description>BAW_DIV3_BYPASS</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CAP_TRIM</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>916</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0xffffffff</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FLUX_CAP_0P28_TRIM</name>
|
|
<description>FLUX_CAP_0P28_TRIM</description>
|
|
<bitRange>[31:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>FLUX_CAP_0P4_TRIM</name>
|
|
<description>FLUX_CAP_0P4_TRIM</description>
|
|
<bitRange>[15:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>MISC_OTP_DATA_1</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>920</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0xe00403f8</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>PEAK_DET_ITRIM</name>
|
|
<description>PEAK_DET_ITRIM</description>
|
|
<bitRange>[28:27]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>HP_BUF_ITRIM</name>
|
|
<description>HP_BUF_ITRIM</description>
|
|
<bitRange>[26:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>LP_BUF_ITRIM</name>
|
|
<description>LP_BUF_ITRIM</description>
|
|
<bitRange>[23:22]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DBLR_LOOP_FILTER_RESET_VOLTAGE</name>
|
|
<description>DBLR_LOOP_FILTER_RESET_VOLTAGE</description>
|
|
<bitRange>[21:20]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>HPM_IBIAS_WAIT_CNT</name>
|
|
<description>HPM_IBIAS_WAIT_CNT</description>
|
|
<bitRange>[19:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>LPM_IBIAS_WAIT_CNT</name>
|
|
<description>LPM_IBIAS_WAIT_CNT</description>
|
|
<bitRange>[9:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IDAC_STEP</name>
|
|
<description>IDAC_STEP</description>
|
|
<bitRange>[3:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PWD_CURR_20C</name>
|
|
<description>Power Down Current Control 20C</description>
|
|
<addressOffset>924</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x080ba608</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DELTA_CACHE_REF</name>
|
|
<description>DELTA_CACHE_REF</description>
|
|
<bitRange>[31:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DELTA_RFMEM_RET</name>
|
|
<description>DELTA_RFMEM_RET</description>
|
|
<bitRange>[23:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DELTA_XOSC_LPM</name>
|
|
<description>DELTA_XOSC_LPM</description>
|
|
<bitRange>[15:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>BASELINE</name>
|
|
<description>BASELINE</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PWD_CURR_35C</name>
|
|
<description>Power Down Current Control 35C</description>
|
|
<addressOffset>928</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x0c10a50a</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DELTA_CACHE_REF</name>
|
|
<description>DELTA_CACHE_REF</description>
|
|
<bitRange>[31:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DELTA_RFMEM_RET</name>
|
|
<description>DELTA_RFMEM_RET</description>
|
|
<bitRange>[23:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DELTA_XOSC_LPM</name>
|
|
<description>DELTA_XOSC_LPM</description>
|
|
<bitRange>[15:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>BASELINE</name>
|
|
<description>BASELINE</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PWD_CURR_50C</name>
|
|
<description>Power Down Current Control 50C</description>
|
|
<addressOffset>932</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x1218a20d</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DELTA_CACHE_REF</name>
|
|
<description>DELTA_CACHE_REF</description>
|
|
<bitRange>[31:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DELTA_RFMEM_RET</name>
|
|
<description>DELTA_RFMEM_RET</description>
|
|
<bitRange>[23:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DELTA_XOSC_LPM</name>
|
|
<description>DELTA_XOSC_LPM</description>
|
|
<bitRange>[15:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>BASELINE</name>
|
|
<description>BASELINE</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PWD_CURR_65C</name>
|
|
<description>Power Down Current Control 65C</description>
|
|
<addressOffset>936</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x1c259c14</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DELTA_CACHE_REF</name>
|
|
<description>DELTA_CACHE_REF</description>
|
|
<bitRange>[31:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DELTA_RFMEM_RET</name>
|
|
<description>DELTA_RFMEM_RET</description>
|
|
<bitRange>[23:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DELTA_XOSC_LPM</name>
|
|
<description>DELTA_XOSC_LPM</description>
|
|
<bitRange>[15:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>BASELINE</name>
|
|
<description>BASELINE</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PWD_CURR_80C</name>
|
|
<description>Power Down Current Control 80C</description>
|
|
<addressOffset>940</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x2e3b9021</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DELTA_CACHE_REF</name>
|
|
<description>DELTA_CACHE_REF</description>
|
|
<bitRange>[31:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DELTA_RFMEM_RET</name>
|
|
<description>DELTA_RFMEM_RET</description>
|
|
<bitRange>[23:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DELTA_XOSC_LPM</name>
|
|
<description>DELTA_XOSC_LPM</description>
|
|
<bitRange>[15:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>BASELINE</name>
|
|
<description>BASELINE</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PWD_CURR_95C</name>
|
|
<description>Power Down Current Control 95C</description>
|
|
<addressOffset>944</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x4c627a3b</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DELTA_CACHE_REF</name>
|
|
<description>DELTA_CACHE_REF</description>
|
|
<bitRange>[31:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DELTA_RFMEM_RET</name>
|
|
<description>DELTA_RFMEM_RET</description>
|
|
<bitRange>[23:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DELTA_XOSC_LPM</name>
|
|
<description>DELTA_XOSC_LPM</description>
|
|
<bitRange>[15:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>BASELINE</name>
|
|
<description>BASELINE</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PWD_CURR_110C</name>
|
|
<description>Power Down Current Control 110C</description>
|
|
<addressOffset>948</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x789e706b</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DELTA_CACHE_REF</name>
|
|
<description>DELTA_CACHE_REF</description>
|
|
<bitRange>[31:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DELTA_RFMEM_RET</name>
|
|
<description>DELTA_RFMEM_RET</description>
|
|
<bitRange>[23:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DELTA_XOSC_LPM</name>
|
|
<description>DELTA_XOSC_LPM</description>
|
|
<bitRange>[15:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>BASELINE</name>
|
|
<description>BASELINE</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PWD_CURR_125C</name>
|
|
<description>Power Down Current Control 125C</description>
|
|
<addressOffset>952</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0xade1809a</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DELTA_CACHE_REF</name>
|
|
<description>DELTA_CACHE_REF</description>
|
|
<bitRange>[31:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DELTA_RFMEM_RET</name>
|
|
<description>DELTA_RFMEM_RET</description>
|
|
<bitRange>[23:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DELTA_XOSC_LPM</name>
|
|
<description>DELTA_XOSC_LPM</description>
|
|
<bitRange>[15:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>BASELINE</name>
|
|
<description>BASELINE</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral><peripheral>
|
|
<name>FLASH</name>
|
|
<description>Flash sub-system registers, includes the Flash Memory Controller (FMC), flash read path, and an integrated Efuse controller and EFUSEROM.
|
|
|
|
</description>
|
|
<baseAddress>0x40030000</baseAddress>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x00004000</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<registers>
|
|
<register>
|
|
<name>STAT</name>
|
|
<description>FMC and Efuse Status</description>
|
|
<addressOffset>28</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EFUSE_BLANK</name>
|
|
<description>EFUSE_BLANK</description>
|
|
<bitRange>[15:15]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EFUSE_TIMEOUT</name>
|
|
<description>EFUSE_TIMEOUT</description>
|
|
<bitRange>[14:14]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EFUSE_CRC_ERROR</name>
|
|
<description>EFUSE_CRC_ERROR</description>
|
|
<bitRange>[13:13]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EFUSE_ERRCODE</name>
|
|
<description>EFUSE_ERRCODE</description>
|
|
<bitRange>[12:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SAMHOLD_DIS</name>
|
|
<description>SAMHOLD_DIS</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>BUSY</name>
|
|
<description>BUSY</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>POWER_MODE</name>
|
|
<description>POWER_MODE</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CFG</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>36</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>STANDBY_MODE_SEL</name>
|
|
<description>STANDBY_MODE_SEL</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>STANDBY_PW_SEL</name>
|
|
<description>STANDBY_PW_SEL</description>
|
|
<bitRange>[7:6]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIS_EFUSECLK</name>
|
|
<description>DIS_EFUSECLK</description>
|
|
<bitRange>[5:5]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIS_READACCESS</name>
|
|
<description>DIS_READACCESS</description>
|
|
<bitRange>[4:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>ENABLE_SWINTF</name>
|
|
<description>ENABLE_SWINTF</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIS_STANDBY</name>
|
|
<description>DIS_STANDBY</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIS_IDLE</name>
|
|
<description>DIS_IDLE</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SYSCODE_START</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>40</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SYSCODE_START</name>
|
|
<description>SYSCODE_START</description>
|
|
<bitRange>[4:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FLASH_SIZE</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>44</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SECTORS</name>
|
|
<description>SECTORS</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FWLOCK</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>60</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FWLOCK</name>
|
|
<description>FWLOCK</description>
|
|
<bitRange>[2:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FWFLAG</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>64</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FWFLAG</name>
|
|
<description>FWFLAG</description>
|
|
<bitRange>[2:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>EFUSE</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>4096</addressOffset>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>INSTRUCTION</name>
|
|
<description>INSTRUCTION</description>
|
|
<bitRange>[28:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DUMPWORD</name>
|
|
<description>DUMPWORD</description>
|
|
<bitRange>[15:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>EFUSEADDR</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>4100</addressOffset>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>BLOCK</name>
|
|
<description>BLOCK</description>
|
|
<bitRange>[15:11]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>ROW</name>
|
|
<description>ROW</description>
|
|
<bitRange>[10:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DATAUPPER</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>4104</addressOffset>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SPARE</name>
|
|
<description>SPARE</description>
|
|
<bitRange>[7:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>P</name>
|
|
<description>P</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>R</name>
|
|
<description>R</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EEN</name>
|
|
<description>EEN</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DATALOWER</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>4108</addressOffset>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DATA</name>
|
|
<description>DATA</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>EFUSECFG</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>4112</addressOffset>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IDLEGATING</name>
|
|
<description>IDLEGATING</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SLAVEPOWER</name>
|
|
<description>SLAVEPOWER</description>
|
|
<bitRange>[4:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>GATING</name>
|
|
<description>GATING</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>EFUSESTAT</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>4116</addressOffset>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>RESETDONE</name>
|
|
<description>RESETDONE</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>ACC</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>4120</addressOffset>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>ACCUMULATOR</name>
|
|
<description>ACCUMULATOR</description>
|
|
<bitRange>[23:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>BOUNDARY</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>4124</addressOffset>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DISROW0</name>
|
|
<description>DISROW0</description>
|
|
<bitRange>[23:23]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SPARE</name>
|
|
<description>SPARE</description>
|
|
<bitRange>[22:22]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EFC_SELF_TEST_ERROR</name>
|
|
<description>EFC_SELF_TEST_ERROR</description>
|
|
<bitRange>[21:21]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EFC_INSTRUCTION_INFO</name>
|
|
<description>EFC_INSTRUCTION_INFO</description>
|
|
<bitRange>[20:20]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EFC_INSTRUCTION_ERROR</name>
|
|
<description>EFC_INSTRUCTION_ERROR</description>
|
|
<bitRange>[19:19]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EFC_AUTOLOAD_ERROR</name>
|
|
<description>EFC_AUTOLOAD_ERROR</description>
|
|
<bitRange>[18:18]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>OUTPUTENABLE</name>
|
|
<description>OUTPUTENABLE</description>
|
|
<bitRange>[17:14]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SYS_ECC_SELF_TEST_EN</name>
|
|
<description>SYS_ECC_SELF_TEST_EN</description>
|
|
<bitRange>[13:13]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SYS_ECC_OVERRIDE_EN</name>
|
|
<description>SYS_ECC_OVERRIDE_EN</description>
|
|
<bitRange>[12:12]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EFC_FDI</name>
|
|
<description>EFC_FDI</description>
|
|
<bitRange>[11:11]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SYS_DIEID_AUTOLOAD_EN</name>
|
|
<description>SYS_DIEID_AUTOLOAD_EN</description>
|
|
<bitRange>[10:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SYS_REPAIR_EN</name>
|
|
<description>SYS_REPAIR_EN</description>
|
|
<bitRange>[9:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SYS_WS_READ_STATES</name>
|
|
<description>SYS_WS_READ_STATES</description>
|
|
<bitRange>[7:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>INPUTENABLE</name>
|
|
<description>INPUTENABLE</description>
|
|
<bitRange>[3:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>EFUSEFLAG</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>4128</addressOffset>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>KEY</name>
|
|
<description>KEY</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>EFUSEKEY</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>4132</addressOffset>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CODE</name>
|
|
<description>CODE</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>EFUSERELEASE</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>4136</addressOffset>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>ODPYEAR</name>
|
|
<description>ODPYEAR</description>
|
|
<bitRange>[31:25]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>ODPMONTH</name>
|
|
<description>ODPMONTH</description>
|
|
<bitRange>[24:21]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>ODPDAY</name>
|
|
<description>ODPDAY</description>
|
|
<bitRange>[20:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EFUSEYEAR</name>
|
|
<description>EFUSEYEAR</description>
|
|
<bitRange>[15:9]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EFUSEMONTH</name>
|
|
<description>EFUSEMONTH</description>
|
|
<bitRange>[8:5]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EFUSEDAY</name>
|
|
<description>EFUSEDAY</description>
|
|
<bitRange>[4:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>EFUSEPINS</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>4140</addressOffset>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EFC_SELF_TEST_DONE</name>
|
|
<description>EFC_SELF_TEST_DONE</description>
|
|
<bitRange>[15:15]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EFC_SELF_TEST_ERROR</name>
|
|
<description>EFC_SELF_TEST_ERROR</description>
|
|
<bitRange>[14:14]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SYS_ECC_SELF_TEST_EN</name>
|
|
<description>SYS_ECC_SELF_TEST_EN</description>
|
|
<bitRange>[13:13]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EFC_INSTRUCTION_INFO</name>
|
|
<description>EFC_INSTRUCTION_INFO</description>
|
|
<bitRange>[12:12]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EFC_INSTRUCTION_ERROR</name>
|
|
<description>EFC_INSTRUCTION_ERROR</description>
|
|
<bitRange>[11:11]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EFC_AUTOLOAD_ERROR</name>
|
|
<description>EFC_AUTOLOAD_ERROR</description>
|
|
<bitRange>[10:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SYS_ECC_OVERRIDE_EN</name>
|
|
<description>SYS_ECC_OVERRIDE_EN</description>
|
|
<bitRange>[9:9]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EFC_READY</name>
|
|
<description>EFC_READY</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EFC_FCLRZ</name>
|
|
<description>EFC_FCLRZ</description>
|
|
<bitRange>[7:7]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SYS_DIEID_AUTOLOAD_EN</name>
|
|
<description>SYS_DIEID_AUTOLOAD_EN</description>
|
|
<bitRange>[6:6]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SYS_REPAIR_EN</name>
|
|
<description>SYS_REPAIR_EN</description>
|
|
<bitRange>[5:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SYS_WS_READ_STATES</name>
|
|
<description>SYS_WS_READ_STATES</description>
|
|
<bitRange>[3:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>EFUSECRA</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>4144</addressOffset>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DATA</name>
|
|
<description>DATA</description>
|
|
<bitRange>[5:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>EFUSEREAD</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>4148</addressOffset>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DATABIT</name>
|
|
<description>DATABIT</description>
|
|
<bitRange>[9:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>READCLOCK</name>
|
|
<description>READCLOCK</description>
|
|
<bitRange>[7:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DEBUG</name>
|
|
<description>DEBUG</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SPARE</name>
|
|
<description>SPARE</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>MARGIN</name>
|
|
<description>MARGIN</description>
|
|
<bitRange>[1:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>EFUSEPROGRAM</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>4152</addressOffset>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>COMPAREDISABLE</name>
|
|
<description>COMPAREDISABLE</description>
|
|
<bitRange>[30:30]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CLOCKSTALL</name>
|
|
<description>CLOCKSTALL</description>
|
|
<bitRange>[29:14]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>VPPTOVDD</name>
|
|
<description>VPPTOVDD</description>
|
|
<bitRange>[13:13]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>ITERATIONS</name>
|
|
<description>ITERATIONS</description>
|
|
<bitRange>[12:9]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRITECLOCK</name>
|
|
<description>WRITECLOCK</description>
|
|
<bitRange>[8:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>EFUSEERROR</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>4156</addressOffset>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DONE</name>
|
|
<description>DONE</description>
|
|
<bitRange>[5:5]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CODE</name>
|
|
<description>CODE</description>
|
|
<bitRange>[4:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SINGLEBIT</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>4160</addressOffset>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FROMN</name>
|
|
<description>FROMN</description>
|
|
<bitRange>[31:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>FROM0</name>
|
|
<description>FROM0</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TWOBIT</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>4164</addressOffset>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FROMN</name>
|
|
<description>FROMN</description>
|
|
<bitRange>[31:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>FROM0</name>
|
|
<description>FROM0</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SELFTESTCYC</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>4168</addressOffset>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CYCLES</name>
|
|
<description>CYCLES</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SELFTESTSIGN</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>4172</addressOffset>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SIGNATURE</name>
|
|
<description>SIGNATURE</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FRDCTL</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>8192</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000200</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>RWAIT</name>
|
|
<description>RWAIT</description>
|
|
<bitRange>[11:8]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FSPRD</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>8196</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>RMBSEM</name>
|
|
<description>RMBSEM</description>
|
|
<bitRange>[15:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RM1</name>
|
|
<description>RM1</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RM0</name>
|
|
<description>RM0</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FEDACCTL1</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>8200</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SUSP_IGNR</name>
|
|
<description>SUSP_IGNR</description>
|
|
<bitRange>[24:24]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FEDACSTAT</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>8220</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>RVF_INT</name>
|
|
<description>RVF_INT</description>
|
|
<bitRange>[25:25]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>FSM_DONE</name>
|
|
<description>FSM_DONE</description>
|
|
<bitRange>[24:24]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FBPROT</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>8240</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>PROTL1DIS</name>
|
|
<description>PROTL1DIS</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FBSE</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>8244</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>BSE</name>
|
|
<description>BSE</description>
|
|
<bitRange>[15:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FBBUSY</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>8248</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x000000fe</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>BUSY</name>
|
|
<description>BUSY</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FBAC</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>8252</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000000f</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>OTPPROTDIS</name>
|
|
<description>OTPPROTDIS</description>
|
|
<bitRange>[16:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>BAGP</name>
|
|
<description>BAGP</description>
|
|
<bitRange>[15:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>VREADS</name>
|
|
<description>VREADS</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FBFALLBACK</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>8256</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x0505ffff</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FSM_PWRSAV</name>
|
|
<description>FSM_PWRSAV</description>
|
|
<bitRange>[27:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>REG_PWRSAV</name>
|
|
<description>REG_PWRSAV</description>
|
|
<bitRange>[19:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>BANKPWR7</name>
|
|
<description>BANKPWR7</description>
|
|
<bitRange>[15:14]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>BANKPWR6</name>
|
|
<description>BANKPWR6</description>
|
|
<bitRange>[13:12]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>BANKPWR5</name>
|
|
<description>BANKPWR5</description>
|
|
<bitRange>[11:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>BANKPWR4</name>
|
|
<description>BANKPWR4</description>
|
|
<bitRange>[9:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>BANKPWR3</name>
|
|
<description>BANKPWR3</description>
|
|
<bitRange>[7:6]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>BANKPWR2</name>
|
|
<description>BANKPWR2</description>
|
|
<bitRange>[5:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>BANKPWR1</name>
|
|
<description>BANKPWR1</description>
|
|
<bitRange>[3:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>BANKPWR0</name>
|
|
<description>BANKPWR0</description>
|
|
<bitRange>[1:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FBPRDY</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>8260</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00ff00fe</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>BANKBUSY</name>
|
|
<description>BANKBUSY</description>
|
|
<bitRange>[16:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PUMPRDY</name>
|
|
<description>PUMPRDY</description>
|
|
<bitRange>[15:15]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>BANKRDY</name>
|
|
<description>BANKRDY</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FPAC1</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>8264</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x02082081</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>PSLEEPTDIS</name>
|
|
<description>PSLEEPTDIS</description>
|
|
<bitRange>[27:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PUMPRESET_PW</name>
|
|
<description>PUMPRESET_PW</description>
|
|
<bitRange>[15:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PUMPPWR</name>
|
|
<description>PUMPPWR</description>
|
|
<bitRange>[1:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FPAC2</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>8268</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>PAGP</name>
|
|
<description>PAGP</description>
|
|
<bitRange>[15:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FMAC</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>8272</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>BANK</name>
|
|
<description>BANK</description>
|
|
<bitRange>[2:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FMSTAT</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>8276</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>RVSUSP</name>
|
|
<description>RVSUSP</description>
|
|
<bitRange>[17:17]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RDVER</name>
|
|
<description>RDVER</description>
|
|
<bitRange>[16:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RVF</name>
|
|
<description>RVF</description>
|
|
<bitRange>[15:15]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>ILA</name>
|
|
<description>ILA</description>
|
|
<bitRange>[14:14]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DBF</name>
|
|
<description>DBF</description>
|
|
<bitRange>[13:13]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PGV</name>
|
|
<description>PGV</description>
|
|
<bitRange>[12:12]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PCV</name>
|
|
<description>PCV</description>
|
|
<bitRange>[11:11]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EV</name>
|
|
<description>EV</description>
|
|
<bitRange>[10:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CV</name>
|
|
<description>CV</description>
|
|
<bitRange>[9:9]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>BUSY</name>
|
|
<description>BUSY</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>ERS</name>
|
|
<description>ERS</description>
|
|
<bitRange>[7:7]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PGM</name>
|
|
<description>PGM</description>
|
|
<bitRange>[6:6]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>INVDAT</name>
|
|
<description>INVDAT</description>
|
|
<bitRange>[5:5]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CSTAT</name>
|
|
<description>CSTAT</description>
|
|
<bitRange>[4:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>VOLSTAT</name>
|
|
<description>VOLSTAT</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>ESUSP</name>
|
|
<description>ESUSP</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PSUSP</name>
|
|
<description>PSUSP</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SLOCK</name>
|
|
<description>SLOCK</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FLOCK</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>8292</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x000055aa</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>ENCOM</name>
|
|
<description>ENCOM</description>
|
|
<bitRange>[15:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FVREADCT</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>8320</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000008</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>VREADCT</name>
|
|
<description>VREADCT</description>
|
|
<bitRange>[3:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FVHVCT1</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>8324</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00840088</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TRIM13_E</name>
|
|
<description>TRIM13_E</description>
|
|
<bitRange>[23:20]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>VHVCT_E</name>
|
|
<description>VHVCT_E</description>
|
|
<bitRange>[19:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TRIM13_PV</name>
|
|
<description>TRIM13_PV</description>
|
|
<bitRange>[7:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>VHVCT_PV</name>
|
|
<description>VHVCT_PV</description>
|
|
<bitRange>[3:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FVHVCT2</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>8328</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00a20000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TRIM13_P</name>
|
|
<description>TRIM13_P</description>
|
|
<bitRange>[23:20]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>VHVCT_P</name>
|
|
<description>VHVCT_P</description>
|
|
<bitRange>[19:16]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FVHVCT3</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>8332</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x000f0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>WCT</name>
|
|
<description>WCT</description>
|
|
<bitRange>[19:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>VHVCT_READ</name>
|
|
<description>VHVCT_READ</description>
|
|
<bitRange>[3:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FVNVCT</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>8336</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000800</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>VCG2P5CT</name>
|
|
<description>VCG2P5CT</description>
|
|
<bitRange>[12:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>VIN_CT</name>
|
|
<description>VIN_CT</description>
|
|
<bitRange>[4:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FVSLP</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>8340</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00008000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>VSL_P</name>
|
|
<description>VSL_P</description>
|
|
<bitRange>[15:12]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FVWLCT</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>8344</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000008</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>VWLCT_P</name>
|
|
<description>VWLCT_P</description>
|
|
<bitRange>[4:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FEFUSECTL</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>8348</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x0701010a</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CHAIN_SEL</name>
|
|
<description>CHAIN_SEL</description>
|
|
<bitRange>[26:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WRITE_EN</name>
|
|
<description>WRITE_EN</description>
|
|
<bitRange>[17:17]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>BP_SEL</name>
|
|
<description>BP_SEL</description>
|
|
<bitRange>[16:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EF_CLRZ</name>
|
|
<description>EF_CLRZ</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EF_TEST</name>
|
|
<description>EF_TEST</description>
|
|
<bitRange>[4:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EFUSE_EN</name>
|
|
<description>EFUSE_EN</description>
|
|
<bitRange>[3:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FEFUSESTAT</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>8352</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SHIFT_DONE</name>
|
|
<description>SHIFT_DONE</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FEFUSEDATA</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>8356</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FEFUSEDATA</name>
|
|
<description>FEFUSEDATA</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FSEQPMP</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>8360</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x85080000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TRIM_3P4</name>
|
|
<description>TRIM_3P4</description>
|
|
<bitRange>[27:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TRIM_1P7</name>
|
|
<description>TRIM_1P7</description>
|
|
<bitRange>[21:20]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TRIM_0P8</name>
|
|
<description>TRIM_0P8</description>
|
|
<bitRange>[19:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>VIN_AT_X</name>
|
|
<description>VIN_AT_X</description>
|
|
<bitRange>[14:12]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>VIN_BY_PASS</name>
|
|
<description>VIN_BY_PASS</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FBSTROBES</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>8448</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000104</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>ECBIT</name>
|
|
<description>ECBIT</description>
|
|
<bitRange>[24:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RWAIT2_FLCLK</name>
|
|
<description>RWAIT2_FLCLK</description>
|
|
<bitRange>[18:18]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RWAIT_FLCLK</name>
|
|
<description>RWAIT_FLCLK</description>
|
|
<bitRange>[17:17]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>FLCLKEN</name>
|
|
<description>FLCLKEN</description>
|
|
<bitRange>[16:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CTRLENZ</name>
|
|
<description>CTRLENZ</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>NOCOLRED</name>
|
|
<description>NOCOLRED</description>
|
|
<bitRange>[6:6]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PRECOL</name>
|
|
<description>PRECOL</description>
|
|
<bitRange>[5:5]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TI_OTP</name>
|
|
<description>TI_OTP</description>
|
|
<bitRange>[4:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>OTP</name>
|
|
<description>OTP</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TEZ</name>
|
|
<description>TEZ</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FPSTROBES</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>8452</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000103</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EXECUTEZ</name>
|
|
<description>EXECUTEZ</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>V3PWRDNZ</name>
|
|
<description>V3PWRDNZ</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>V5PWRDNZ</name>
|
|
<description>V5PWRDNZ</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FBMODE</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>8456</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>MODE</name>
|
|
<description>MODE</description>
|
|
<bitRange>[2:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FTCR</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>8460</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TCR</name>
|
|
<description>TCR</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FADDR</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>8464</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FADDR</name>
|
|
<description>FADDR</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FTCTL</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>8476</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>WDATA_BLK_CLR</name>
|
|
<description>WDATA_BLK_CLR</description>
|
|
<bitRange>[16:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TEST_EN</name>
|
|
<description>TEST_EN</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FWPWRITE0</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>8480</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0xffffffff</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FWPWRITE0</name>
|
|
<description>FWPWRITE0</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FWPWRITE1</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>8484</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0xffffffff</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FWPWRITE1</name>
|
|
<description>FWPWRITE1</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FWPWRITE2</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>8488</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0xffffffff</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FWPWRITE2</name>
|
|
<description>FWPWRITE2</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FWPWRITE3</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>8492</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0xffffffff</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FWPWRITE3</name>
|
|
<description>FWPWRITE3</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FWPWRITE4</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>8496</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0xffffffff</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FWPWRITE4</name>
|
|
<description>FWPWRITE4</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FWPWRITE5</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>8500</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0xffffffff</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FWPWRITE5</name>
|
|
<description>FWPWRITE5</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FWPWRITE6</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>8504</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0xffffffff</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FWPWRITE6</name>
|
|
<description>FWPWRITE6</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FWPWRITE7</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>8508</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0xffffffff</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FWPWRITE7</name>
|
|
<description>FWPWRITE7</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FWPWRITE_ECC</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>8512</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0xffffffff</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>ECCBYTES07_00</name>
|
|
<description>ECCBYTES07_00</description>
|
|
<bitRange>[31:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>ECCBYTES15_08</name>
|
|
<description>ECCBYTES15_08</description>
|
|
<bitRange>[23:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>ECCBYTES23_16</name>
|
|
<description>ECCBYTES23_16</description>
|
|
<bitRange>[15:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>ECCBYTES31_24</name>
|
|
<description>ECCBYTES31_24</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FSWSTAT</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>8516</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SAFELV</name>
|
|
<description>SAFELV</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FSM_GLBCTL</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>8704</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CLKSEL</name>
|
|
<description>CLKSEL</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FSM_STATE</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>8708</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000c00</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CTRLENZ</name>
|
|
<description>CTRLENZ</description>
|
|
<bitRange>[11:11]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EXECUTEZ</name>
|
|
<description>EXECUTEZ</description>
|
|
<bitRange>[10:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>FSM_ACT</name>
|
|
<description>FSM_ACT</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TIOTP_ACT</name>
|
|
<description>TIOTP_ACT</description>
|
|
<bitRange>[7:7]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>OTP_ACT</name>
|
|
<description>OTP_ACT</description>
|
|
<bitRange>[6:6]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FSM_STAT</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>8712</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000004</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>NON_OP</name>
|
|
<description>NON_OP</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>OVR_PUL_CNT</name>
|
|
<description>OVR_PUL_CNT</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>INV_DAT</name>
|
|
<description>INV_DAT</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FSM_CMD</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>8716</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FSMCMD</name>
|
|
<description>FSMCMD</description>
|
|
<bitRange>[5:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FSM_PE_OSU</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>8720</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>PGM_OSU</name>
|
|
<description>PGM_OSU</description>
|
|
<bitRange>[15:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>ERA_OSU</name>
|
|
<description>ERA_OSU</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FSM_VSTAT</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>8724</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00003000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>VSTAT_CNT</name>
|
|
<description>VSTAT_CNT</description>
|
|
<bitRange>[15:12]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FSM_PE_VSU</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>8728</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>PGM_VSU</name>
|
|
<description>PGM_VSU</description>
|
|
<bitRange>[15:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>ERA_VSU</name>
|
|
<description>ERA_VSU</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FSM_CMP_VSU</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>8732</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>ADD_EXZ</name>
|
|
<description>ADD_EXZ</description>
|
|
<bitRange>[15:12]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FSM_EX_VAL</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>8736</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000301</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>REP_VSU</name>
|
|
<description>REP_VSU</description>
|
|
<bitRange>[15:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EXE_VALD</name>
|
|
<description>EXE_VALD</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FSM_RD_H</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>8740</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000005a</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>RD_H</name>
|
|
<description>RD_H</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FSM_P_OH</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>8744</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000100</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>PGM_OH</name>
|
|
<description>PGM_OH</description>
|
|
<bitRange>[15:8]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FSM_ERA_OH</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>8748</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>ERA_OH</name>
|
|
<description>ERA_OH</description>
|
|
<bitRange>[15:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FSM_SAV_PPUL</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>8752</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SAV_P_PUL</name>
|
|
<description>SAV_P_PUL</description>
|
|
<bitRange>[11:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FSM_PE_VH</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>8756</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000100</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>PGM_VH</name>
|
|
<description>PGM_VH</description>
|
|
<bitRange>[15:8]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FSM_PRG_PW</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>8768</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>PROG_PUL_WIDTH</name>
|
|
<description>PROG_PUL_WIDTH</description>
|
|
<bitRange>[15:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FSM_ERA_PW</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>8772</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FSM_ERA_PW</name>
|
|
<description>FSM_ERA_PW</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FSM_SAV_ERA_PUL</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>8788</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SAV_ERA_PUL</name>
|
|
<description>SAV_ERA_PUL</description>
|
|
<bitRange>[11:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FSM_TIMER</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>8792</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FSM_TIMER</name>
|
|
<description>FSM_TIMER</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FSM_MODE</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>8796</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>RDV_SUBMODE</name>
|
|
<description>RDV_SUBMODE</description>
|
|
<bitRange>[19:18]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PGM_SUBMODE</name>
|
|
<description>PGM_SUBMODE</description>
|
|
<bitRange>[17:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>ERA_SUBMODE</name>
|
|
<description>ERA_SUBMODE</description>
|
|
<bitRange>[15:14]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SUBMODE</name>
|
|
<description>SUBMODE</description>
|
|
<bitRange>[13:12]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SAV_PGM_CMD</name>
|
|
<description>SAV_PGM_CMD</description>
|
|
<bitRange>[11:9]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SAV_ERA_MODE</name>
|
|
<description>SAV_ERA_MODE</description>
|
|
<bitRange>[8:6]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>MODE</name>
|
|
<description>MODE</description>
|
|
<bitRange>[5:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CMD</name>
|
|
<description>CMD</description>
|
|
<bitRange>[2:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FSM_PGM</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>8800</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>PGM_BANK</name>
|
|
<description>PGM_BANK</description>
|
|
<bitRange>[25:23]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PGM_ADDR</name>
|
|
<description>PGM_ADDR</description>
|
|
<bitRange>[22:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FSM_ERA</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>8804</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>ERA_BANK</name>
|
|
<description>ERA_BANK</description>
|
|
<bitRange>[25:23]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>ERA_ADDR</name>
|
|
<description>ERA_ADDR</description>
|
|
<bitRange>[22:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FSM_PRG_PUL</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>8808</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00040032</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>BEG_EC_LEVEL</name>
|
|
<description>BEG_EC_LEVEL</description>
|
|
<bitRange>[19:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>MAX_PRG_PUL</name>
|
|
<description>MAX_PRG_PUL</description>
|
|
<bitRange>[11:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FSM_ERA_PUL</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>8812</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00040bb8</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>MAX_EC_LEVEL</name>
|
|
<description>MAX_EC_LEVEL</description>
|
|
<bitRange>[19:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>MAX_ERA_PUL</name>
|
|
<description>MAX_ERA_PUL</description>
|
|
<bitRange>[11:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FSM_STEP_SIZE</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>8816</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EC_STEP_SIZE</name>
|
|
<description>EC_STEP_SIZE</description>
|
|
<bitRange>[24:16]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FSM_PUL_CNTR</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>8820</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CUR_EC_LEVEL</name>
|
|
<description>CUR_EC_LEVEL</description>
|
|
<bitRange>[24:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PUL_CNTR</name>
|
|
<description>PUL_CNTR</description>
|
|
<bitRange>[11:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FSM_EC_STEP_HEIGHT</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>8824</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EC_STEP_HEIGHT</name>
|
|
<description>EC_STEP_HEIGHT</description>
|
|
<bitRange>[3:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FSM_ST_MACHINE</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>8828</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00800500</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DO_PRECOND</name>
|
|
<description>DO_PRECOND</description>
|
|
<bitRange>[23:23]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>FSM_INT_EN</name>
|
|
<description>FSM_INT_EN</description>
|
|
<bitRange>[22:22]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>ALL_BANKS</name>
|
|
<description>ALL_BANKS</description>
|
|
<bitRange>[21:21]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CMPV_ALLOWED</name>
|
|
<description>CMPV_ALLOWED</description>
|
|
<bitRange>[20:20]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RANDOM</name>
|
|
<description>RANDOM</description>
|
|
<bitRange>[19:19]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RV_SEC_EN</name>
|
|
<description>RV_SEC_EN</description>
|
|
<bitRange>[18:18]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RV_RES</name>
|
|
<description>RV_RES</description>
|
|
<bitRange>[17:17]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RV_INT_EN</name>
|
|
<description>RV_INT_EN</description>
|
|
<bitRange>[16:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>ONE_TIME_GOOD</name>
|
|
<description>ONE_TIME_GOOD</description>
|
|
<bitRange>[14:14]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DO_REDU_COL</name>
|
|
<description>DO_REDU_COL</description>
|
|
<bitRange>[11:11]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DBG_SHORT_ROW</name>
|
|
<description>DBG_SHORT_ROW</description>
|
|
<bitRange>[10:7]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PGM_SEC_COF_EN</name>
|
|
<description>PGM_SEC_COF_EN</description>
|
|
<bitRange>[5:5]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PREC_STOP_EN</name>
|
|
<description>PREC_STOP_EN</description>
|
|
<bitRange>[4:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIS_TST_EN</name>
|
|
<description>DIS_TST_EN</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CMD_EN</name>
|
|
<description>CMD_EN</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>INV_DATA</name>
|
|
<description>INV_DATA</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>OVERRIDE</name>
|
|
<description>OVERRIDE</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FSM_FLES</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>8832</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>BLK_TIOTP</name>
|
|
<description>BLK_TIOTP</description>
|
|
<bitRange>[11:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>BLK_OTP</name>
|
|
<description>BLK_OTP</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FSM_WR_ENA</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>8840</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000002</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>WR_ENA</name>
|
|
<description>WR_ENA</description>
|
|
<bitRange>[2:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FSM_ACC_PP</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>8844</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FSM_ACC_PP</name>
|
|
<description>FSM_ACC_PP</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FSM_ACC_EP</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>8848</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>ACC_EP</name>
|
|
<description>ACC_EP</description>
|
|
<bitRange>[15:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FSM_ADDR</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>8864</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>BANK</name>
|
|
<description>BANK</description>
|
|
<bitRange>[30:28]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CUR_ADDR</name>
|
|
<description>CUR_ADDR</description>
|
|
<bitRange>[27:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FSM_SECTOR</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>8868</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0xffff0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SECT_ERASED</name>
|
|
<description>SECT_ERASED</description>
|
|
<bitRange>[31:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>FSM_SECTOR_EXTENSION</name>
|
|
<description>FSM_SECTOR_EXTENSION</description>
|
|
<bitRange>[15:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SECTOR</name>
|
|
<description>SECTOR</description>
|
|
<bitRange>[7:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SEC_OUT</name>
|
|
<description>SEC_OUT</description>
|
|
<bitRange>[3:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FMC_REV_ID</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>8872</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>MOD_VERSION</name>
|
|
<description>MOD_VERSION</description>
|
|
<bitRange>[31:12]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CONFIG_CRC</name>
|
|
<description>CONFIG_CRC</description>
|
|
<bitRange>[11:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FSM_ERR_ADDR</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>8876</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FSM_ERR_ADDR</name>
|
|
<description>FSM_ERR_ADDR</description>
|
|
<bitRange>[31:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>FSM_ERR_BANK</name>
|
|
<description>FSM_ERR_BANK</description>
|
|
<bitRange>[3:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FSM_PGM_MAXPUL</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>8880</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FSM_PGM_MAXPUL</name>
|
|
<description>FSM_PGM_MAXPUL</description>
|
|
<bitRange>[11:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FSM_EXECUTE</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>8884</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x000a000a</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SUSPEND_NOW</name>
|
|
<description>SUSPEND_NOW</description>
|
|
<bitRange>[19:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>FSMEXECUTE</name>
|
|
<description>FSMEXECUTE</description>
|
|
<bitRange>[4:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FSM_SECTOR1</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>8896</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0xffffffff</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FSM_SECTOR1</name>
|
|
<description>FSM_SECTOR1</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FSM_SECTOR2</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>8900</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FSM_SECTOR2</name>
|
|
<description>FSM_SECTOR2</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FSM_BSLE0</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>8928</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FSM_BSLE0</name>
|
|
<description>FSM_BSLE0</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FSM_BSLE1</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>8932</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FSM_BSL1</name>
|
|
<description>FSM_BSL1</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FSM_BSLP0</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>8944</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FSM_BSLP0</name>
|
|
<description>FSM_BSLP0</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FSM_BSLP1</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>8948</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FSM_BSL1</name>
|
|
<description>FSM_BSL1</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FCFG_BANK</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>9216</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000401</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>EE_BANK_WIDTH</name>
|
|
<description>EE_BANK_WIDTH</description>
|
|
<bitRange>[31:20]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EE_NUM_BANK</name>
|
|
<description>EE_NUM_BANK</description>
|
|
<bitRange>[19:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>MAIN_BANK_WIDTH</name>
|
|
<description>MAIN_BANK_WIDTH</description>
|
|
<bitRange>[15:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>MAIN_NUM_BANK</name>
|
|
<description>MAIN_NUM_BANK</description>
|
|
<bitRange>[3:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FCFG_WRAPPER</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>9220</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x50009007</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FAMILY_TYPE</name>
|
|
<description>FAMILY_TYPE</description>
|
|
<bitRange>[31:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>MEM_MAP</name>
|
|
<description>MEM_MAP</description>
|
|
<bitRange>[20:20]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CPU2</name>
|
|
<description>CPU2</description>
|
|
<bitRange>[19:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EE_IN_MAIN</name>
|
|
<description>EE_IN_MAIN</description>
|
|
<bitRange>[15:12]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>ROM</name>
|
|
<description>ROM</description>
|
|
<bitRange>[11:11]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IFLUSH</name>
|
|
<description>IFLUSH</description>
|
|
<bitRange>[10:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SIL3</name>
|
|
<description>SIL3</description>
|
|
<bitRange>[9:9]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>ECCA</name>
|
|
<description>ECCA</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>AUTO_SUSP</name>
|
|
<description>AUTO_SUSP</description>
|
|
<bitRange>[7:6]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>UERR</name>
|
|
<description>UERR</description>
|
|
<bitRange>[5:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CPU_TYPE1</name>
|
|
<description>CPU_TYPE1</description>
|
|
<bitRange>[3:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FCFG_BNK_TYPE</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>9224</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000003</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>B7_TYPE</name>
|
|
<description>B7_TYPE</description>
|
|
<bitRange>[31:28]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>B6_TYPE</name>
|
|
<description>B6_TYPE</description>
|
|
<bitRange>[27:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>B5_TYPE</name>
|
|
<description>B5_TYPE</description>
|
|
<bitRange>[23:20]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>B4_TYPE</name>
|
|
<description>B4_TYPE</description>
|
|
<bitRange>[19:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>B3_TYPE</name>
|
|
<description>B3_TYPE</description>
|
|
<bitRange>[15:12]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>B2_TYPE</name>
|
|
<description>B2_TYPE</description>
|
|
<bitRange>[11:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>B1_TYPE</name>
|
|
<description>B1_TYPE</description>
|
|
<bitRange>[7:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>B0_TYPE</name>
|
|
<description>B0_TYPE</description>
|
|
<bitRange>[3:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FCFG_B0_START</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>9232</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x02000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>B0_MAX_SECTOR</name>
|
|
<description>B0_MAX_SECTOR</description>
|
|
<bitRange>[31:28]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>B0_MUX_FACTOR</name>
|
|
<description>B0_MUX_FACTOR</description>
|
|
<bitRange>[27:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>B0_START_ADDR</name>
|
|
<description>B0_START_ADDR</description>
|
|
<bitRange>[23:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FCFG_B1_START</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>9236</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>B1_MAX_SECTOR</name>
|
|
<description>B1_MAX_SECTOR</description>
|
|
<bitRange>[31:28]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>B1_MUX_FACTOR</name>
|
|
<description>B1_MUX_FACTOR</description>
|
|
<bitRange>[27:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>B1_START_ADDR</name>
|
|
<description>B1_START_ADDR</description>
|
|
<bitRange>[23:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FCFG_B2_START</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>9240</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>B2_MAX_SECTOR</name>
|
|
<description>B2_MAX_SECTOR</description>
|
|
<bitRange>[31:28]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>B2_MUX_FACTOR</name>
|
|
<description>B2_MUX_FACTOR</description>
|
|
<bitRange>[27:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>B2_START_ADDR</name>
|
|
<description>B2_START_ADDR</description>
|
|
<bitRange>[23:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FCFG_B3_START</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>9244</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>B3_MAX_SECTOR</name>
|
|
<description>B3_MAX_SECTOR</description>
|
|
<bitRange>[31:28]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>B3_MUX_FACTOR</name>
|
|
<description>B3_MUX_FACTOR</description>
|
|
<bitRange>[27:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>B3_START_ADDR</name>
|
|
<description>B3_START_ADDR</description>
|
|
<bitRange>[23:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FCFG_B4_START</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>9248</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>B4_MAX_SECTOR</name>
|
|
<description>B4_MAX_SECTOR</description>
|
|
<bitRange>[31:28]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>B4_MUX_FACTOR</name>
|
|
<description>B4_MUX_FACTOR</description>
|
|
<bitRange>[27:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>B4_START_ADDR</name>
|
|
<description>B4_START_ADDR</description>
|
|
<bitRange>[23:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FCFG_B5_START</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>9252</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>B5_MAX_SECTOR</name>
|
|
<description>B5_MAX_SECTOR</description>
|
|
<bitRange>[31:28]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>B5_MUX_FACTOR</name>
|
|
<description>B5_MUX_FACTOR</description>
|
|
<bitRange>[27:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>B5_START_ADDR</name>
|
|
<description>B5_START_ADDR</description>
|
|
<bitRange>[23:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FCFG_B6_START</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>9256</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>B6_MAX_SECTOR</name>
|
|
<description>B6_MAX_SECTOR</description>
|
|
<bitRange>[31:28]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>B6_MUX_FACTOR</name>
|
|
<description>B6_MUX_FACTOR</description>
|
|
<bitRange>[27:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>B6_START_ADDR</name>
|
|
<description>B6_START_ADDR</description>
|
|
<bitRange>[23:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FCFG_B7_START</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>9260</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>B7_MAX_SECTOR</name>
|
|
<description>B7_MAX_SECTOR</description>
|
|
<bitRange>[31:28]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>B7_MUX_FACTOR</name>
|
|
<description>B7_MUX_FACTOR</description>
|
|
<bitRange>[27:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>B7_START_ADDR</name>
|
|
<description>B7_START_ADDR</description>
|
|
<bitRange>[23:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FCFG_B0_SSIZE0</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>9264</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00200004</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>B0_NUM_SECTORS</name>
|
|
<description>B0_NUM_SECTORS</description>
|
|
<bitRange>[27:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>B0_SECT_SIZE</name>
|
|
<description>B0_SECT_SIZE</description>
|
|
<bitRange>[3:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral><peripheral>
|
|
<name>GPIO</name>
|
|
<description>MCU GPIO - I/F for controlling and reading IO status and IO event status
|
|
|
|
</description>
|
|
<baseAddress>0x40022000</baseAddress>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x400</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<registers>
|
|
<register>
|
|
<name>DOUT3_0</name>
|
|
<description>Data Out 0 to 3
|
|
|
|
Alias register for byte access to each bit in DOUT31_0</description>
|
|
<addressOffset>0</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DIO3</name>
|
|
<description>DIO3</description>
|
|
<bitRange>[24:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO2</name>
|
|
<description>DIO2</description>
|
|
<bitRange>[16:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO1</name>
|
|
<description>DIO1</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO0</name>
|
|
<description>DIO0</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DOUT7_4</name>
|
|
<description>Data Out 4 to 7
|
|
|
|
Alias register for byte access to each bit in DOUT31_0</description>
|
|
<addressOffset>4</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DIO7</name>
|
|
<description>DIO7</description>
|
|
<bitRange>[24:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO6</name>
|
|
<description>DIO6</description>
|
|
<bitRange>[16:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO5</name>
|
|
<description>DIO5</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO4</name>
|
|
<description>DIO4</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DOUT11_8</name>
|
|
<description>Data Out 8 to 11
|
|
|
|
Alias register for byte access to each bit in DOUT31_0</description>
|
|
<addressOffset>8</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DIO11</name>
|
|
<description>DIO11</description>
|
|
<bitRange>[24:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO10</name>
|
|
<description>DIO10</description>
|
|
<bitRange>[16:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO9</name>
|
|
<description>DIO9</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO8</name>
|
|
<description>DIO8</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DOUT15_12</name>
|
|
<description>Data Out 12 to 15
|
|
|
|
Alias register for byte access to each bit in DOUT31_0</description>
|
|
<addressOffset>12</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DIO15</name>
|
|
<description>DIO15</description>
|
|
<bitRange>[24:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO14</name>
|
|
<description>DIO14</description>
|
|
<bitRange>[16:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO13</name>
|
|
<description>DIO13</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO12</name>
|
|
<description>DIO12</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DOUT19_16</name>
|
|
<description>Data Out 16 to 19
|
|
|
|
Alias register for byte access to each bit in DOUT31_0</description>
|
|
<addressOffset>16</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DIO19</name>
|
|
<description>DIO19</description>
|
|
<bitRange>[24:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO18</name>
|
|
<description>DIO18</description>
|
|
<bitRange>[16:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO17</name>
|
|
<description>DIO17</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO16</name>
|
|
<description>DIO16</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DOUT23_20</name>
|
|
<description>Data Out 20 to 23
|
|
|
|
Alias register for byte access to each bit in DOUT31_0</description>
|
|
<addressOffset>20</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DIO23</name>
|
|
<description>DIO23</description>
|
|
<bitRange>[24:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO22</name>
|
|
<description>DIO22</description>
|
|
<bitRange>[16:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO21</name>
|
|
<description>DIO21</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO20</name>
|
|
<description>DIO20</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DOUT27_24</name>
|
|
<description>Data Out 24 to 27
|
|
|
|
Alias register for byte access to each bit in DOUT31_0</description>
|
|
<addressOffset>24</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DIO27</name>
|
|
<description>DIO27</description>
|
|
<bitRange>[24:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO26</name>
|
|
<description>DIO26</description>
|
|
<bitRange>[16:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO25</name>
|
|
<description>DIO25</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO24</name>
|
|
<description>DIO24</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DOUT31_28</name>
|
|
<description>Data Out 28 to 31
|
|
|
|
Alias register for byte access to each bit in DOUT31_0</description>
|
|
<addressOffset>28</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DIO31</name>
|
|
<description>DIO31</description>
|
|
<bitRange>[24:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO30</name>
|
|
<description>DIO30</description>
|
|
<bitRange>[16:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO29</name>
|
|
<description>DIO29</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO28</name>
|
|
<description>DIO28</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DOUT31_0</name>
|
|
<description>Data Output for DIO 0 to 31</description>
|
|
<addressOffset>128</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DIO31</name>
|
|
<description>DIO31</description>
|
|
<bitRange>[31:31]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO30</name>
|
|
<description>DIO30</description>
|
|
<bitRange>[30:30]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO29</name>
|
|
<description>DIO29</description>
|
|
<bitRange>[29:29]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO28</name>
|
|
<description>DIO28</description>
|
|
<bitRange>[28:28]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO27</name>
|
|
<description>DIO27</description>
|
|
<bitRange>[27:27]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO26</name>
|
|
<description>DIO26</description>
|
|
<bitRange>[26:26]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO25</name>
|
|
<description>DIO25</description>
|
|
<bitRange>[25:25]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO24</name>
|
|
<description>DIO24</description>
|
|
<bitRange>[24:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO23</name>
|
|
<description>DIO23</description>
|
|
<bitRange>[23:23]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO22</name>
|
|
<description>DIO22</description>
|
|
<bitRange>[22:22]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO21</name>
|
|
<description>DIO21</description>
|
|
<bitRange>[21:21]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO20</name>
|
|
<description>DIO20</description>
|
|
<bitRange>[20:20]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO19</name>
|
|
<description>DIO19</description>
|
|
<bitRange>[19:19]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO18</name>
|
|
<description>DIO18</description>
|
|
<bitRange>[18:18]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO17</name>
|
|
<description>DIO17</description>
|
|
<bitRange>[17:17]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO16</name>
|
|
<description>DIO16</description>
|
|
<bitRange>[16:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO15</name>
|
|
<description>DIO15</description>
|
|
<bitRange>[15:15]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO14</name>
|
|
<description>DIO14</description>
|
|
<bitRange>[14:14]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO13</name>
|
|
<description>DIO13</description>
|
|
<bitRange>[13:13]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO12</name>
|
|
<description>DIO12</description>
|
|
<bitRange>[12:12]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO11</name>
|
|
<description>DIO11</description>
|
|
<bitRange>[11:11]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO10</name>
|
|
<description>DIO10</description>
|
|
<bitRange>[10:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO9</name>
|
|
<description>DIO9</description>
|
|
<bitRange>[9:9]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO8</name>
|
|
<description>DIO8</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO7</name>
|
|
<description>DIO7</description>
|
|
<bitRange>[7:7]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO6</name>
|
|
<description>DIO6</description>
|
|
<bitRange>[6:6]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO5</name>
|
|
<description>DIO5</description>
|
|
<bitRange>[5:5]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO4</name>
|
|
<description>DIO4</description>
|
|
<bitRange>[4:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO3</name>
|
|
<description>DIO3</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO2</name>
|
|
<description>DIO2</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO1</name>
|
|
<description>DIO1</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO0</name>
|
|
<description>DIO0</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DOUTSET31_0</name>
|
|
<description>Data Out Set
|
|
|
|
Writing 1 to a bit position sets the corresponding bit in the DOUT31_0 register</description>
|
|
<addressOffset>144</addressOffset>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DIO31</name>
|
|
<description>DIO31</description>
|
|
<bitRange>[31:31]</bitRange>
|
|
<modifiedWriteValues>oneToSet</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DIO30</name>
|
|
<description>DIO30</description>
|
|
<bitRange>[30:30]</bitRange>
|
|
<modifiedWriteValues>oneToSet</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DIO29</name>
|
|
<description>DIO29</description>
|
|
<bitRange>[29:29]</bitRange>
|
|
<modifiedWriteValues>oneToSet</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DIO28</name>
|
|
<description>DIO28</description>
|
|
<bitRange>[28:28]</bitRange>
|
|
<modifiedWriteValues>oneToSet</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DIO27</name>
|
|
<description>DIO27</description>
|
|
<bitRange>[27:27]</bitRange>
|
|
<modifiedWriteValues>oneToSet</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DIO26</name>
|
|
<description>DIO26</description>
|
|
<bitRange>[26:26]</bitRange>
|
|
<modifiedWriteValues>oneToSet</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DIO25</name>
|
|
<description>DIO25</description>
|
|
<bitRange>[25:25]</bitRange>
|
|
<modifiedWriteValues>oneToSet</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DIO24</name>
|
|
<description>DIO24</description>
|
|
<bitRange>[24:24]</bitRange>
|
|
<modifiedWriteValues>oneToSet</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DIO23</name>
|
|
<description>DIO23</description>
|
|
<bitRange>[23:23]</bitRange>
|
|
<modifiedWriteValues>oneToSet</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DIO22</name>
|
|
<description>DIO22</description>
|
|
<bitRange>[22:22]</bitRange>
|
|
<modifiedWriteValues>oneToSet</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DIO21</name>
|
|
<description>DIO21</description>
|
|
<bitRange>[21:21]</bitRange>
|
|
<modifiedWriteValues>oneToSet</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DIO20</name>
|
|
<description>DIO20</description>
|
|
<bitRange>[20:20]</bitRange>
|
|
<modifiedWriteValues>oneToSet</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DIO19</name>
|
|
<description>DIO19</description>
|
|
<bitRange>[19:19]</bitRange>
|
|
<modifiedWriteValues>oneToSet</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DIO18</name>
|
|
<description>DIO18</description>
|
|
<bitRange>[18:18]</bitRange>
|
|
<modifiedWriteValues>oneToSet</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DIO17</name>
|
|
<description>DIO17</description>
|
|
<bitRange>[17:17]</bitRange>
|
|
<modifiedWriteValues>oneToSet</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DIO16</name>
|
|
<description>DIO16</description>
|
|
<bitRange>[16:16]</bitRange>
|
|
<modifiedWriteValues>oneToSet</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DIO15</name>
|
|
<description>DIO15</description>
|
|
<bitRange>[15:15]</bitRange>
|
|
<modifiedWriteValues>oneToSet</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DIO14</name>
|
|
<description>DIO14</description>
|
|
<bitRange>[14:14]</bitRange>
|
|
<modifiedWriteValues>oneToSet</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DIO13</name>
|
|
<description>DIO13</description>
|
|
<bitRange>[13:13]</bitRange>
|
|
<modifiedWriteValues>oneToSet</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DIO12</name>
|
|
<description>DIO12</description>
|
|
<bitRange>[12:12]</bitRange>
|
|
<modifiedWriteValues>oneToSet</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DIO11</name>
|
|
<description>DIO11</description>
|
|
<bitRange>[11:11]</bitRange>
|
|
<modifiedWriteValues>oneToSet</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DIO10</name>
|
|
<description>DIO10</description>
|
|
<bitRange>[10:10]</bitRange>
|
|
<modifiedWriteValues>oneToSet</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DIO9</name>
|
|
<description>DIO9</description>
|
|
<bitRange>[9:9]</bitRange>
|
|
<modifiedWriteValues>oneToSet</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DIO8</name>
|
|
<description>DIO8</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
<modifiedWriteValues>oneToSet</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DIO7</name>
|
|
<description>DIO7</description>
|
|
<bitRange>[7:7]</bitRange>
|
|
<modifiedWriteValues>oneToSet</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DIO6</name>
|
|
<description>DIO6</description>
|
|
<bitRange>[6:6]</bitRange>
|
|
<modifiedWriteValues>oneToSet</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DIO5</name>
|
|
<description>DIO5</description>
|
|
<bitRange>[5:5]</bitRange>
|
|
<modifiedWriteValues>oneToSet</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DIO4</name>
|
|
<description>DIO4</description>
|
|
<bitRange>[4:4]</bitRange>
|
|
<modifiedWriteValues>oneToSet</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DIO3</name>
|
|
<description>DIO3</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
<modifiedWriteValues>oneToSet</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DIO2</name>
|
|
<description>DIO2</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
<modifiedWriteValues>oneToSet</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DIO1</name>
|
|
<description>DIO1</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
<modifiedWriteValues>oneToSet</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DIO0</name>
|
|
<description>DIO0</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
<modifiedWriteValues>oneToSet</modifiedWriteValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DOUTCLR31_0</name>
|
|
<description>Data Out Clear
|
|
|
|
Writing 1 to a bit position clears the corresponding bit in the DOUT31_0 register</description>
|
|
<addressOffset>160</addressOffset>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DIO31</name>
|
|
<description>DIO31</description>
|
|
<bitRange>[31:31]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DIO30</name>
|
|
<description>DIO30</description>
|
|
<bitRange>[30:30]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DIO29</name>
|
|
<description>DIO29</description>
|
|
<bitRange>[29:29]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DIO28</name>
|
|
<description>DIO28</description>
|
|
<bitRange>[28:28]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DIO27</name>
|
|
<description>DIO27</description>
|
|
<bitRange>[27:27]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DIO26</name>
|
|
<description>DIO26</description>
|
|
<bitRange>[26:26]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DIO25</name>
|
|
<description>DIO25</description>
|
|
<bitRange>[25:25]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DIO24</name>
|
|
<description>DIO24</description>
|
|
<bitRange>[24:24]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DIO23</name>
|
|
<description>DIO23</description>
|
|
<bitRange>[23:23]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DIO22</name>
|
|
<description>DIO22</description>
|
|
<bitRange>[22:22]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DIO21</name>
|
|
<description>DIO21</description>
|
|
<bitRange>[21:21]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DIO20</name>
|
|
<description>DIO20</description>
|
|
<bitRange>[20:20]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DIO19</name>
|
|
<description>DIO19</description>
|
|
<bitRange>[19:19]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DIO18</name>
|
|
<description>DIO18</description>
|
|
<bitRange>[18:18]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DIO17</name>
|
|
<description>DIO17</description>
|
|
<bitRange>[17:17]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DIO16</name>
|
|
<description>DIO16</description>
|
|
<bitRange>[16:16]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DIO15</name>
|
|
<description>DIO15</description>
|
|
<bitRange>[15:15]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DIO14</name>
|
|
<description>DIO14</description>
|
|
<bitRange>[14:14]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DIO13</name>
|
|
<description>DIO13</description>
|
|
<bitRange>[13:13]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DIO12</name>
|
|
<description>DIO12</description>
|
|
<bitRange>[12:12]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DIO11</name>
|
|
<description>DIO11</description>
|
|
<bitRange>[11:11]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DIO10</name>
|
|
<description>DIO10</description>
|
|
<bitRange>[10:10]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DIO9</name>
|
|
<description>DIO9</description>
|
|
<bitRange>[9:9]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DIO8</name>
|
|
<description>DIO8</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DIO7</name>
|
|
<description>DIO7</description>
|
|
<bitRange>[7:7]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DIO6</name>
|
|
<description>DIO6</description>
|
|
<bitRange>[6:6]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DIO5</name>
|
|
<description>DIO5</description>
|
|
<bitRange>[5:5]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DIO4</name>
|
|
<description>DIO4</description>
|
|
<bitRange>[4:4]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DIO3</name>
|
|
<description>DIO3</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DIO2</name>
|
|
<description>DIO2</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DIO1</name>
|
|
<description>DIO1</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DIO0</name>
|
|
<description>DIO0</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DOUTTGL31_0</name>
|
|
<description>Data Out Toggle
|
|
|
|
Writing 1 to a bit position will invert the corresponding DIO output.</description>
|
|
<addressOffset>176</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DIO31</name>
|
|
<description>DIO31</description>
|
|
<bitRange>[31:31]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO30</name>
|
|
<description>DIO30</description>
|
|
<bitRange>[30:30]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO29</name>
|
|
<description>DIO29</description>
|
|
<bitRange>[29:29]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO28</name>
|
|
<description>DIO28</description>
|
|
<bitRange>[28:28]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO27</name>
|
|
<description>DIO27</description>
|
|
<bitRange>[27:27]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO26</name>
|
|
<description>DIO26</description>
|
|
<bitRange>[26:26]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO25</name>
|
|
<description>DIO25</description>
|
|
<bitRange>[25:25]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO24</name>
|
|
<description>DIO24</description>
|
|
<bitRange>[24:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO23</name>
|
|
<description>DIO23</description>
|
|
<bitRange>[23:23]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO22</name>
|
|
<description>DIO22</description>
|
|
<bitRange>[22:22]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO21</name>
|
|
<description>DIO21</description>
|
|
<bitRange>[21:21]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO20</name>
|
|
<description>DIO20</description>
|
|
<bitRange>[20:20]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO19</name>
|
|
<description>DIO19</description>
|
|
<bitRange>[19:19]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO18</name>
|
|
<description>DIO18</description>
|
|
<bitRange>[18:18]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO17</name>
|
|
<description>DIO17</description>
|
|
<bitRange>[17:17]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO16</name>
|
|
<description>DIO16</description>
|
|
<bitRange>[16:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO15</name>
|
|
<description>DIO15</description>
|
|
<bitRange>[15:15]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO14</name>
|
|
<description>DIO14</description>
|
|
<bitRange>[14:14]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO13</name>
|
|
<description>DIO13</description>
|
|
<bitRange>[13:13]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO12</name>
|
|
<description>DIO12</description>
|
|
<bitRange>[12:12]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO11</name>
|
|
<description>DIO11</description>
|
|
<bitRange>[11:11]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO10</name>
|
|
<description>DIO10</description>
|
|
<bitRange>[10:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO9</name>
|
|
<description>DIO9</description>
|
|
<bitRange>[9:9]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO8</name>
|
|
<description>DIO8</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO7</name>
|
|
<description>DIO7</description>
|
|
<bitRange>[7:7]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO6</name>
|
|
<description>DIO6</description>
|
|
<bitRange>[6:6]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO5</name>
|
|
<description>DIO5</description>
|
|
<bitRange>[5:5]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO4</name>
|
|
<description>DIO4</description>
|
|
<bitRange>[4:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO3</name>
|
|
<description>DIO3</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO2</name>
|
|
<description>DIO2</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO1</name>
|
|
<description>DIO1</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO0</name>
|
|
<description>DIO0</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DIN31_0</name>
|
|
<description>Data Input from DIO 0 to 31</description>
|
|
<addressOffset>192</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DIO31</name>
|
|
<description>DIO31</description>
|
|
<bitRange>[31:31]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO30</name>
|
|
<description>DIO30</description>
|
|
<bitRange>[30:30]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO29</name>
|
|
<description>DIO29</description>
|
|
<bitRange>[29:29]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO28</name>
|
|
<description>DIO28</description>
|
|
<bitRange>[28:28]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO27</name>
|
|
<description>DIO27</description>
|
|
<bitRange>[27:27]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO26</name>
|
|
<description>DIO26</description>
|
|
<bitRange>[26:26]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO25</name>
|
|
<description>DIO25</description>
|
|
<bitRange>[25:25]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO24</name>
|
|
<description>DIO24</description>
|
|
<bitRange>[24:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO23</name>
|
|
<description>DIO23</description>
|
|
<bitRange>[23:23]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO22</name>
|
|
<description>DIO22</description>
|
|
<bitRange>[22:22]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO21</name>
|
|
<description>DIO21</description>
|
|
<bitRange>[21:21]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO20</name>
|
|
<description>DIO20</description>
|
|
<bitRange>[20:20]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO19</name>
|
|
<description>DIO19</description>
|
|
<bitRange>[19:19]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO18</name>
|
|
<description>DIO18</description>
|
|
<bitRange>[18:18]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO17</name>
|
|
<description>DIO17</description>
|
|
<bitRange>[17:17]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO16</name>
|
|
<description>DIO16</description>
|
|
<bitRange>[16:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO15</name>
|
|
<description>DIO15</description>
|
|
<bitRange>[15:15]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO14</name>
|
|
<description>DIO14</description>
|
|
<bitRange>[14:14]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO13</name>
|
|
<description>DIO13</description>
|
|
<bitRange>[13:13]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO12</name>
|
|
<description>DIO12</description>
|
|
<bitRange>[12:12]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO11</name>
|
|
<description>DIO11</description>
|
|
<bitRange>[11:11]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO10</name>
|
|
<description>DIO10</description>
|
|
<bitRange>[10:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO9</name>
|
|
<description>DIO9</description>
|
|
<bitRange>[9:9]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO8</name>
|
|
<description>DIO8</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO7</name>
|
|
<description>DIO7</description>
|
|
<bitRange>[7:7]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO6</name>
|
|
<description>DIO6</description>
|
|
<bitRange>[6:6]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO5</name>
|
|
<description>DIO5</description>
|
|
<bitRange>[5:5]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO4</name>
|
|
<description>DIO4</description>
|
|
<bitRange>[4:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO3</name>
|
|
<description>DIO3</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO2</name>
|
|
<description>DIO2</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO1</name>
|
|
<description>DIO1</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO0</name>
|
|
<description>DIO0</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DOE31_0</name>
|
|
<description>Data Output Enable for DIO 0 to 31</description>
|
|
<addressOffset>208</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DIO31</name>
|
|
<description>DIO31</description>
|
|
<bitRange>[31:31]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO30</name>
|
|
<description>DIO30</description>
|
|
<bitRange>[30:30]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO29</name>
|
|
<description>DIO29</description>
|
|
<bitRange>[29:29]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO28</name>
|
|
<description>DIO28</description>
|
|
<bitRange>[28:28]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO27</name>
|
|
<description>DIO27</description>
|
|
<bitRange>[27:27]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO26</name>
|
|
<description>DIO26</description>
|
|
<bitRange>[26:26]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO25</name>
|
|
<description>DIO25</description>
|
|
<bitRange>[25:25]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO24</name>
|
|
<description>DIO24</description>
|
|
<bitRange>[24:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO23</name>
|
|
<description>DIO23</description>
|
|
<bitRange>[23:23]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO22</name>
|
|
<description>DIO22</description>
|
|
<bitRange>[22:22]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO21</name>
|
|
<description>DIO21</description>
|
|
<bitRange>[21:21]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO20</name>
|
|
<description>DIO20</description>
|
|
<bitRange>[20:20]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO19</name>
|
|
<description>DIO19</description>
|
|
<bitRange>[19:19]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO18</name>
|
|
<description>DIO18</description>
|
|
<bitRange>[18:18]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO17</name>
|
|
<description>DIO17</description>
|
|
<bitRange>[17:17]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO16</name>
|
|
<description>DIO16</description>
|
|
<bitRange>[16:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO15</name>
|
|
<description>DIO15</description>
|
|
<bitRange>[15:15]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO14</name>
|
|
<description>DIO14</description>
|
|
<bitRange>[14:14]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO13</name>
|
|
<description>DIO13</description>
|
|
<bitRange>[13:13]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO12</name>
|
|
<description>DIO12</description>
|
|
<bitRange>[12:12]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO11</name>
|
|
<description>DIO11</description>
|
|
<bitRange>[11:11]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO10</name>
|
|
<description>DIO10</description>
|
|
<bitRange>[10:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO9</name>
|
|
<description>DIO9</description>
|
|
<bitRange>[9:9]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO8</name>
|
|
<description>DIO8</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO7</name>
|
|
<description>DIO7</description>
|
|
<bitRange>[7:7]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO6</name>
|
|
<description>DIO6</description>
|
|
<bitRange>[6:6]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO5</name>
|
|
<description>DIO5</description>
|
|
<bitRange>[5:5]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO4</name>
|
|
<description>DIO4</description>
|
|
<bitRange>[4:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO3</name>
|
|
<description>DIO3</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO2</name>
|
|
<description>DIO2</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO1</name>
|
|
<description>DIO1</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DIO0</name>
|
|
<description>DIO0</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>EVFLAGS31_0</name>
|
|
<description>Event Register for DIO 0 to 31
|
|
|
|
Reading this registers will return 1 for triggered event and 0 for non-triggered events.
|
|
Writing a 1 to a bit field will clear the event.
|
|
|
|
The configuration of events is done inside MCU IOC, e.g. events for DIO #0 is configured in IOC:IOCFG0.EDGE_DET and IOC:IOCFG0.EDGE_IRQ_EN.
|
|
|
|
</description>
|
|
<addressOffset>224</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DIO31</name>
|
|
<description>DIO31</description>
|
|
<bitRange>[31:31]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DIO30</name>
|
|
<description>DIO30</description>
|
|
<bitRange>[30:30]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DIO29</name>
|
|
<description>DIO29</description>
|
|
<bitRange>[29:29]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DIO28</name>
|
|
<description>DIO28</description>
|
|
<bitRange>[28:28]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DIO27</name>
|
|
<description>DIO27</description>
|
|
<bitRange>[27:27]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DIO26</name>
|
|
<description>DIO26</description>
|
|
<bitRange>[26:26]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DIO25</name>
|
|
<description>DIO25</description>
|
|
<bitRange>[25:25]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DIO24</name>
|
|
<description>DIO24</description>
|
|
<bitRange>[24:24]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DIO23</name>
|
|
<description>DIO23</description>
|
|
<bitRange>[23:23]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DIO22</name>
|
|
<description>DIO22</description>
|
|
<bitRange>[22:22]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DIO21</name>
|
|
<description>DIO21</description>
|
|
<bitRange>[21:21]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DIO20</name>
|
|
<description>DIO20</description>
|
|
<bitRange>[20:20]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DIO19</name>
|
|
<description>DIO19</description>
|
|
<bitRange>[19:19]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DIO18</name>
|
|
<description>DIO18</description>
|
|
<bitRange>[18:18]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DIO17</name>
|
|
<description>DIO17</description>
|
|
<bitRange>[17:17]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DIO16</name>
|
|
<description>DIO16</description>
|
|
<bitRange>[16:16]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DIO15</name>
|
|
<description>DIO15</description>
|
|
<bitRange>[15:15]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DIO14</name>
|
|
<description>DIO14</description>
|
|
<bitRange>[14:14]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DIO13</name>
|
|
<description>DIO13</description>
|
|
<bitRange>[13:13]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DIO12</name>
|
|
<description>DIO12</description>
|
|
<bitRange>[12:12]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DIO11</name>
|
|
<description>DIO11</description>
|
|
<bitRange>[11:11]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DIO10</name>
|
|
<description>DIO10</description>
|
|
<bitRange>[10:10]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DIO9</name>
|
|
<description>DIO9</description>
|
|
<bitRange>[9:9]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DIO8</name>
|
|
<description>DIO8</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DIO7</name>
|
|
<description>DIO7</description>
|
|
<bitRange>[7:7]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DIO6</name>
|
|
<description>DIO6</description>
|
|
<bitRange>[6:6]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DIO5</name>
|
|
<description>DIO5</description>
|
|
<bitRange>[5:5]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DIO4</name>
|
|
<description>DIO4</description>
|
|
<bitRange>[4:4]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DIO3</name>
|
|
<description>DIO3</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DIO2</name>
|
|
<description>DIO2</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DIO1</name>
|
|
<description>DIO1</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DIO0</name>
|
|
<description>DIO0</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral><peripheral>
|
|
<name>GPT0</name>
|
|
<description>General Purpose Timer.
|
|
|
|
</description>
|
|
<baseAddress>0x40010000</baseAddress>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x1000</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<registers>
|
|
<register>
|
|
<name>CFG</name>
|
|
<description>Configuration</description>
|
|
<addressOffset>0</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CFG</name>
|
|
<description>CFG</description>
|
|
<bitRange>[2:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TAMR</name>
|
|
<description>Timer A Mode
|
|
|
|
</description>
|
|
<addressOffset>4</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TCACT</name>
|
|
<description>TCACT</description>
|
|
<bitRange>[15:13]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TACINTD</name>
|
|
<description>TACINTD</description>
|
|
<bitRange>[12:12]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TAPLO</name>
|
|
<description>TAPLO</description>
|
|
<bitRange>[11:11]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TAMRSU</name>
|
|
<description>TAMRSU</description>
|
|
<bitRange>[10:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TAPWMIE</name>
|
|
<description>TAPWMIE</description>
|
|
<bitRange>[9:9]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TAILD</name>
|
|
<description>TAILD</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TASNAPS</name>
|
|
<description>TASNAPS</description>
|
|
<bitRange>[7:7]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TAWOT</name>
|
|
<description>TAWOT</description>
|
|
<bitRange>[6:6]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TAMIE</name>
|
|
<description>TAMIE</description>
|
|
<bitRange>[5:5]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TACDIR</name>
|
|
<description>TACDIR</description>
|
|
<bitRange>[4:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TAAMS</name>
|
|
<description>TAAMS</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TACM</name>
|
|
<description>TACM</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TAMR</name>
|
|
<description>TAMR</description>
|
|
<bitRange>[1:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TBMR</name>
|
|
<description>Timer B Mode
|
|
|
|
</description>
|
|
<addressOffset>8</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TCACT</name>
|
|
<description>TCACT</description>
|
|
<bitRange>[15:13]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TBCINTD</name>
|
|
<description>TBCINTD</description>
|
|
<bitRange>[12:12]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TBPLO</name>
|
|
<description>TBPLO</description>
|
|
<bitRange>[11:11]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TBMRSU</name>
|
|
<description>TBMRSU</description>
|
|
<bitRange>[10:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TBPWMIE</name>
|
|
<description>TBPWMIE</description>
|
|
<bitRange>[9:9]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TBILD</name>
|
|
<description>TBILD</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TBSNAPS</name>
|
|
<description>TBSNAPS</description>
|
|
<bitRange>[7:7]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TBWOT</name>
|
|
<description>TBWOT</description>
|
|
<bitRange>[6:6]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TBMIE</name>
|
|
<description>TBMIE</description>
|
|
<bitRange>[5:5]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TBCDIR</name>
|
|
<description>TBCDIR</description>
|
|
<bitRange>[4:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TBAMS</name>
|
|
<description>TBAMS</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TBCM</name>
|
|
<description>TBCM</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TBMR</name>
|
|
<description>TBMR</description>
|
|
<bitRange>[1:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CTL</name>
|
|
<description>Control</description>
|
|
<addressOffset>12</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TBPWML</name>
|
|
<description>TBPWML</description>
|
|
<bitRange>[14:14]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TBEVENT</name>
|
|
<description>TBEVENT</description>
|
|
<bitRange>[11:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TBSTALL</name>
|
|
<description>TBSTALL</description>
|
|
<bitRange>[9:9]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TBEN</name>
|
|
<description>TBEN</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TAPWML</name>
|
|
<description>TAPWML</description>
|
|
<bitRange>[6:6]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RTCEN</name>
|
|
<description>RTCEN</description>
|
|
<bitRange>[4:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TAEVENT</name>
|
|
<description>TAEVENT</description>
|
|
<bitRange>[3:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TASTALL</name>
|
|
<description>TASTALL</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TAEN</name>
|
|
<description>TAEN</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SYNC</name>
|
|
<description>Synch Register
|
|
|
|
</description>
|
|
<addressOffset>16</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SYNC3</name>
|
|
<description>SYNC3</description>
|
|
<bitRange>[7:6]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SYNC2</name>
|
|
<description>SYNC2</description>
|
|
<bitRange>[5:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SYNC1</name>
|
|
<description>SYNC1</description>
|
|
<bitRange>[3:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SYNC0</name>
|
|
<description>SYNC0</description>
|
|
<bitRange>[1:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IMR</name>
|
|
<description>Interrupt Mask
|
|
This register is used to enable the interrupts.
|
|
Associated registers:
|
|
RIS, MIS, ICLR
|
|
|
|
</description>
|
|
<addressOffset>24</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>WUMIS</name>
|
|
<description>WUMIS</description>
|
|
<bitRange>[16:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DMABIM</name>
|
|
<description>DMABIM</description>
|
|
<bitRange>[13:13]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TBMIM</name>
|
|
<description>TBMIM</description>
|
|
<bitRange>[11:11]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CBEIM</name>
|
|
<description>CBEIM</description>
|
|
<bitRange>[10:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CBMIM</name>
|
|
<description>CBMIM</description>
|
|
<bitRange>[9:9]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TBTOIM</name>
|
|
<description>TBTOIM</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DMAAIM</name>
|
|
<description>DMAAIM</description>
|
|
<bitRange>[5:5]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TAMIM</name>
|
|
<description>TAMIM</description>
|
|
<bitRange>[4:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RTCIM</name>
|
|
<description>RTCIM</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CAEIM</name>
|
|
<description>CAEIM</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CAMIM</name>
|
|
<description>CAMIM</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TATOIM</name>
|
|
<description>TATOIM</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RIS</name>
|
|
<description>Raw Interrupt Status
|
|
Associated registers:
|
|
IMR, MIS, ICLR
|
|
|
|
</description>
|
|
<addressOffset>28</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>WURIS</name>
|
|
<description>WURIS</description>
|
|
<bitRange>[16:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DMABRIS</name>
|
|
<description>DMABRIS</description>
|
|
<bitRange>[13:13]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TBMRIS</name>
|
|
<description>TBMRIS</description>
|
|
<bitRange>[11:11]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CBERIS</name>
|
|
<description>CBERIS</description>
|
|
<bitRange>[10:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CBMRIS</name>
|
|
<description>CBMRIS</description>
|
|
<bitRange>[9:9]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TBTORIS</name>
|
|
<description>TBTORIS</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DMAARIS</name>
|
|
<description>DMAARIS</description>
|
|
<bitRange>[5:5]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TAMRIS</name>
|
|
<description>TAMRIS</description>
|
|
<bitRange>[4:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RTCRIS</name>
|
|
<description>RTCRIS</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CAERIS</name>
|
|
<description>CAERIS</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CAMRIS</name>
|
|
<description>CAMRIS</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TATORIS</name>
|
|
<description>TATORIS</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>MIS</name>
|
|
<description>Masked Interrupt Status
|
|
Values are result of bitwise AND operation between RIS and IMR
|
|
Assosciated clear register: ICLR
|
|
|
|
</description>
|
|
<addressOffset>32</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>WUMIS</name>
|
|
<description>WUMIS</description>
|
|
<bitRange>[16:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DMABMIS</name>
|
|
<description>DMABMIS</description>
|
|
<bitRange>[13:13]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TBMMIS</name>
|
|
<description>TBMMIS</description>
|
|
<bitRange>[11:11]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CBEMIS</name>
|
|
<description>CBEMIS</description>
|
|
<bitRange>[10:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CBMMIS</name>
|
|
<description>CBMMIS</description>
|
|
<bitRange>[9:9]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TBTOMIS</name>
|
|
<description>TBTOMIS</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DMAAMIS</name>
|
|
<description>DMAAMIS</description>
|
|
<bitRange>[5:5]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TAMMIS</name>
|
|
<description>TAMMIS</description>
|
|
<bitRange>[4:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RTCMIS</name>
|
|
<description>RTCMIS</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CAEMIS</name>
|
|
<description>CAEMIS</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CAMMIS</name>
|
|
<description>CAMMIS</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TATOMIS</name>
|
|
<description>TATOMIS</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>ICLR</name>
|
|
<description>Interrupt Clear
|
|
This register is used to clear status bits in the RIS and MIS registers</description>
|
|
<addressOffset>36</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>WUECINT</name>
|
|
<description>WUECINT</description>
|
|
<bitRange>[16:16]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DMABINT</name>
|
|
<description>DMABINT</description>
|
|
<bitRange>[13:13]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>TBMCINT</name>
|
|
<description>TBMCINT</description>
|
|
<bitRange>[11:11]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>CBECINT</name>
|
|
<description>CBECINT</description>
|
|
<bitRange>[10:10]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>CBMCINT</name>
|
|
<description>CBMCINT</description>
|
|
<bitRange>[9:9]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>TBTOCINT</name>
|
|
<description>TBTOCINT</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DMAAINT</name>
|
|
<description>DMAAINT</description>
|
|
<bitRange>[5:5]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>TAMCINT</name>
|
|
<description>TAMCINT</description>
|
|
<bitRange>[4:4]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>RTCCINT</name>
|
|
<description>RTCCINT</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>CAECINT</name>
|
|
<description>CAECINT</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>CAMCINT</name>
|
|
<description>CAMCINT</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>TATOCINT</name>
|
|
<description>TATOCINT</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TAILR</name>
|
|
<description>Timer A Interval Load Register</description>
|
|
<addressOffset>40</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0xffffffff</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TAILR</name>
|
|
<description>TAILR</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TBILR</name>
|
|
<description>Timer B Interval Load Register</description>
|
|
<addressOffset>44</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000ffff</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TBILR</name>
|
|
<description>TBILR</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TAMATCHR</name>
|
|
<description>Timer A Match Register
|
|
|
|
Interrupts can be generated when the timer value is equal to the value in this register in one-shot or periodic mode.
|
|
|
|
In Edge-Count mode, this register along with TAILR, determines how many edge events are counted.
|
|
The total number of edge events counted is equal to the value in TAILR minus this value.
|
|
|
|
Note that in edge-count mode, when executing an up-count, the value of TAPR and TAILR must be greater than the value of TAPMR and TAMATCHR.
|
|
|
|
In PWM mode, this value along with TAILR, determines the duty cycle of the output PWM signal.
|
|
|
|
When a 16/32-bit GPT is configured to one of the 32-bit modes, TAMATCHR appears as a 32-bit register. (The upper 16-bits correspond to the contents TBMATCHR).
|
|
|
|
In a 16-bit mode, the upper 16 bits of this register read as 0s and have no effect on the state of TBMATCHR.
|
|
|
|
Note : This register is updated internally (takes effect) based on TAMR.TAMRSU
|
|
</description>
|
|
<addressOffset>48</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0xffffffff</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TAMATCHR</name>
|
|
<description>TAMATCHR</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TBMATCHR</name>
|
|
<description>Timer B Match Register
|
|
|
|
When a GPT is configured to one of the 32-bit modes, the contents of bits 15:0 in this register are loaded into the upper 16 bits of TAMATCHR.
|
|
Reads from this register return the current match value of Timer B and writes are ignored.
|
|
In a 16-bit mode, bits 15:0 are used for the match value. Bits 31:16 are reserved in both cases.
|
|
|
|
Note : This register is updated internally (takes effect) based on TBMR.TBMRSU</description>
|
|
<addressOffset>52</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000ffff</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TBMATCHR</name>
|
|
<description>TBMATCHR</description>
|
|
<bitRange>[15:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TAPR</name>
|
|
<description>Timer A Pre-scale
|
|
This register allows software to extend the range of the timers when they are used individually.
|
|
When in one-shot or periodic down count modes, this register acts as a true prescaler for the timer counter.
|
|
When acting as a true prescaler, the prescaler counts down to 0 before the value in TAR and TAV registers are incremented.
|
|
In all other individual/split modes, this register is a linear extension of the upper range of the timer counter, holding bits 23:16 in the 16-bit modes of the 16/32-bit GPT.
|
|
|
|
</description>
|
|
<addressOffset>56</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TAPSR</name>
|
|
<description>TAPSR</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TBPR</name>
|
|
<description>Timer B Pre-scale
|
|
This register allows software to extend the range of the timers when they are used individually.
|
|
When in one-shot or periodic down count modes, this register acts as a true prescaler for the timer counter.
|
|
When acting as a true prescaler, the prescaler counts down to 0 before the value in TBR and TBV registers are incremented.
|
|
In all other individual/split modes, this register is a linear extension of the upper range of the timer counter, holding bits 23:16 in the 16-bit modes of the 16/32-bit GPT.
|
|
|
|
</description>
|
|
<addressOffset>60</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TBPSR</name>
|
|
<description>TBPSR</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TAPMR</name>
|
|
<description>Timer A Pre-scale Match
|
|
This register allows software to extend the range of the TAMATCHR when used individually.
|
|
|
|
</description>
|
|
<addressOffset>64</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TAPSMR</name>
|
|
<description>TAPSMR</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TBPMR</name>
|
|
<description>Timer B Pre-scale Match
|
|
This register allows software to extend the range of the TBMATCHR when used individually.
|
|
|
|
</description>
|
|
<addressOffset>68</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TBPSMR</name>
|
|
<description>TBPSMR</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TAR</name>
|
|
<description>Timer A Register
|
|
|
|
</description>
|
|
<addressOffset>72</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0xffffffff</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TAR</name>
|
|
<description>TAR</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TBR</name>
|
|
<description>Timer B Register</description>
|
|
<addressOffset>76</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x0000ffff</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TBR</name>
|
|
<description>TBR</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TAV</name>
|
|
<description>Timer A Value
|
|
This register shows the current value of the free running 16-bit Timer A. In the 32-bit mode</description>
|
|
<addressOffset>80</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0xffffffff</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TAV</name>
|
|
<description>TAV</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TBV</name>
|
|
<description>Timer B Value
|
|
This register shows the current value of the free running 16-bit Timer B. Note: When the alternate timer clock (TIMCLK) is enabled, a read of a timer value will return the current count 1. </description>
|
|
<addressOffset>84</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000ffff</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TBV</name>
|
|
<description>TBV</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RTCPD</name>
|
|
<description>RTC Pre-divide Value
|
|
This register shows the current value of the RTC pre-divider in RTC mode. Note: When the alternate timer clock (TIMCLK) is enabled, a read of a timer value will return the current count -1. </description>
|
|
<addressOffset>88</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00007fff</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>RTCPD</name>
|
|
<description>RTCPD</description>
|
|
<bitRange>[15:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TAPS</name>
|
|
<description>Timer A Pre-scale Snap-shot
|
|
|
|
Based on the value in the register field TAMR.TAILD, this register is updated with the value from TAPR register either on the next cycle or on the next timeout.
|
|
|
|
|
|
This register shows the current value of the Timer A pre-scaler in the 16-bit mode. Note: When the alternate timer clock (TIMCLK) is enabled a read of a timer value will return the current count -1. </description>
|
|
<addressOffset>92</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>PSS</name>
|
|
<description>PSS</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TBPS</name>
|
|
<description>Timer B Pre-scale Snap-shot
|
|
|
|
Based on the value in the register field TBMR.TBILD, this register is updated with the value from TBPR register either on the next cycle or on the next timeout.
|
|
|
|
This register shows the current value of the Timer B pre-scaler in the 16-bit mode. Note: When the alternate timer clock (TIMCLK) is enabled a read of a timer value will return the current count -1. </description>
|
|
<addressOffset>96</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>PSS</name>
|
|
<description>PSS</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TAPV</name>
|
|
<description>Timer A Pre-scale Value
|
|
This register shows the current value of the Timer A free running pre-scaler in the 16-bit mode. Note: When the alternate timer clock (TIMCLK) is enabled, a read of a timer value will return the current count 1. </description>
|
|
<addressOffset>100</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>PSV</name>
|
|
<description>PSV</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TBPV</name>
|
|
<description>Timer B Pre-scale Value
|
|
This register shows the current value of the Timer B free running pre-scaler in the 16-bit mode. Note: When the alternate timer clock (TIMCLK) is enabled, a read of a timer value will return the current count-1. </description>
|
|
<addressOffset>104</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>PSV</name>
|
|
<description>PSV</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DMAEV</name>
|
|
<description>DMA Event
|
|
This register allows software to enable/disable GPT DMA trigger events. </description>
|
|
<addressOffset>108</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TBMDMAEN</name>
|
|
<description>TBMDMAEN</description>
|
|
<bitRange>[11:11]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CBEDMAEN</name>
|
|
<description>CBEDMAEN</description>
|
|
<bitRange>[10:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CBMDMAEN</name>
|
|
<description>CBMDMAEN</description>
|
|
<bitRange>[9:9]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TBTODMAEN</name>
|
|
<description>TBTODMAEN</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TAMDMAEN</name>
|
|
<description>TAMDMAEN</description>
|
|
<bitRange>[4:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RTCDMAEN</name>
|
|
<description>RTCDMAEN</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CAEDMAEN</name>
|
|
<description>CAEDMAEN</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CAMDMAEN</name>
|
|
<description>CAMDMAEN</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TATODMAEN</name>
|
|
<description>TATODMAEN</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>VERSION</name>
|
|
<description>Peripheral Version
|
|
This register provides information regarding the GPT version</description>
|
|
<addressOffset>4016</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000400</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>VERSION</name>
|
|
<description>VERSION</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>ANDCCP</name>
|
|
<description>Combined CCP Output
|
|
This register is used to logically AND CCP output pairs for each timer</description>
|
|
<addressOffset>4020</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CCP_AND_EN</name>
|
|
<description>CCP_AND_EN</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral><peripheral>
|
|
<name>GPT1</name>
|
|
<description>General Purpose Timer.
|
|
|
|
</description>
|
|
<baseAddress>0x40011000</baseAddress>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x1000</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<registers>
|
|
<register>
|
|
<name>CFG</name>
|
|
<description>Configuration</description>
|
|
<addressOffset>0</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CFG</name>
|
|
<description>CFG</description>
|
|
<bitRange>[2:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TAMR</name>
|
|
<description>Timer A Mode
|
|
|
|
</description>
|
|
<addressOffset>4</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TCACT</name>
|
|
<description>TCACT</description>
|
|
<bitRange>[15:13]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TACINTD</name>
|
|
<description>TACINTD</description>
|
|
<bitRange>[12:12]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TAPLO</name>
|
|
<description>TAPLO</description>
|
|
<bitRange>[11:11]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TAMRSU</name>
|
|
<description>TAMRSU</description>
|
|
<bitRange>[10:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TAPWMIE</name>
|
|
<description>TAPWMIE</description>
|
|
<bitRange>[9:9]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TAILD</name>
|
|
<description>TAILD</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TASNAPS</name>
|
|
<description>TASNAPS</description>
|
|
<bitRange>[7:7]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TAWOT</name>
|
|
<description>TAWOT</description>
|
|
<bitRange>[6:6]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TAMIE</name>
|
|
<description>TAMIE</description>
|
|
<bitRange>[5:5]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TACDIR</name>
|
|
<description>TACDIR</description>
|
|
<bitRange>[4:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TAAMS</name>
|
|
<description>TAAMS</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TACM</name>
|
|
<description>TACM</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TAMR</name>
|
|
<description>TAMR</description>
|
|
<bitRange>[1:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TBMR</name>
|
|
<description>Timer B Mode
|
|
|
|
</description>
|
|
<addressOffset>8</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TCACT</name>
|
|
<description>TCACT</description>
|
|
<bitRange>[15:13]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TBCINTD</name>
|
|
<description>TBCINTD</description>
|
|
<bitRange>[12:12]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TBPLO</name>
|
|
<description>TBPLO</description>
|
|
<bitRange>[11:11]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TBMRSU</name>
|
|
<description>TBMRSU</description>
|
|
<bitRange>[10:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TBPWMIE</name>
|
|
<description>TBPWMIE</description>
|
|
<bitRange>[9:9]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TBILD</name>
|
|
<description>TBILD</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TBSNAPS</name>
|
|
<description>TBSNAPS</description>
|
|
<bitRange>[7:7]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TBWOT</name>
|
|
<description>TBWOT</description>
|
|
<bitRange>[6:6]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TBMIE</name>
|
|
<description>TBMIE</description>
|
|
<bitRange>[5:5]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TBCDIR</name>
|
|
<description>TBCDIR</description>
|
|
<bitRange>[4:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TBAMS</name>
|
|
<description>TBAMS</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TBCM</name>
|
|
<description>TBCM</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TBMR</name>
|
|
<description>TBMR</description>
|
|
<bitRange>[1:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CTL</name>
|
|
<description>Control</description>
|
|
<addressOffset>12</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TBPWML</name>
|
|
<description>TBPWML</description>
|
|
<bitRange>[14:14]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TBEVENT</name>
|
|
<description>TBEVENT</description>
|
|
<bitRange>[11:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TBSTALL</name>
|
|
<description>TBSTALL</description>
|
|
<bitRange>[9:9]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TBEN</name>
|
|
<description>TBEN</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TAPWML</name>
|
|
<description>TAPWML</description>
|
|
<bitRange>[6:6]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RTCEN</name>
|
|
<description>RTCEN</description>
|
|
<bitRange>[4:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TAEVENT</name>
|
|
<description>TAEVENT</description>
|
|
<bitRange>[3:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TASTALL</name>
|
|
<description>TASTALL</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TAEN</name>
|
|
<description>TAEN</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SYNC</name>
|
|
<description>Synch Register
|
|
|
|
</description>
|
|
<addressOffset>16</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SYNC3</name>
|
|
<description>SYNC3</description>
|
|
<bitRange>[7:6]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SYNC2</name>
|
|
<description>SYNC2</description>
|
|
<bitRange>[5:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SYNC1</name>
|
|
<description>SYNC1</description>
|
|
<bitRange>[3:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SYNC0</name>
|
|
<description>SYNC0</description>
|
|
<bitRange>[1:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IMR</name>
|
|
<description>Interrupt Mask
|
|
This register is used to enable the interrupts.
|
|
Associated registers:
|
|
RIS, MIS, ICLR
|
|
|
|
</description>
|
|
<addressOffset>24</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>WUMIS</name>
|
|
<description>WUMIS</description>
|
|
<bitRange>[16:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DMABIM</name>
|
|
<description>DMABIM</description>
|
|
<bitRange>[13:13]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TBMIM</name>
|
|
<description>TBMIM</description>
|
|
<bitRange>[11:11]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CBEIM</name>
|
|
<description>CBEIM</description>
|
|
<bitRange>[10:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CBMIM</name>
|
|
<description>CBMIM</description>
|
|
<bitRange>[9:9]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TBTOIM</name>
|
|
<description>TBTOIM</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DMAAIM</name>
|
|
<description>DMAAIM</description>
|
|
<bitRange>[5:5]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TAMIM</name>
|
|
<description>TAMIM</description>
|
|
<bitRange>[4:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RTCIM</name>
|
|
<description>RTCIM</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CAEIM</name>
|
|
<description>CAEIM</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CAMIM</name>
|
|
<description>CAMIM</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TATOIM</name>
|
|
<description>TATOIM</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RIS</name>
|
|
<description>Raw Interrupt Status
|
|
Associated registers:
|
|
IMR, MIS, ICLR
|
|
|
|
</description>
|
|
<addressOffset>28</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>WURIS</name>
|
|
<description>WURIS</description>
|
|
<bitRange>[16:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DMABRIS</name>
|
|
<description>DMABRIS</description>
|
|
<bitRange>[13:13]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TBMRIS</name>
|
|
<description>TBMRIS</description>
|
|
<bitRange>[11:11]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CBERIS</name>
|
|
<description>CBERIS</description>
|
|
<bitRange>[10:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CBMRIS</name>
|
|
<description>CBMRIS</description>
|
|
<bitRange>[9:9]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TBTORIS</name>
|
|
<description>TBTORIS</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DMAARIS</name>
|
|
<description>DMAARIS</description>
|
|
<bitRange>[5:5]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TAMRIS</name>
|
|
<description>TAMRIS</description>
|
|
<bitRange>[4:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RTCRIS</name>
|
|
<description>RTCRIS</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CAERIS</name>
|
|
<description>CAERIS</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CAMRIS</name>
|
|
<description>CAMRIS</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TATORIS</name>
|
|
<description>TATORIS</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>MIS</name>
|
|
<description>Masked Interrupt Status
|
|
Values are result of bitwise AND operation between RIS and IMR
|
|
Assosciated clear register: ICLR
|
|
|
|
</description>
|
|
<addressOffset>32</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>WUMIS</name>
|
|
<description>WUMIS</description>
|
|
<bitRange>[16:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DMABMIS</name>
|
|
<description>DMABMIS</description>
|
|
<bitRange>[13:13]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TBMMIS</name>
|
|
<description>TBMMIS</description>
|
|
<bitRange>[11:11]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CBEMIS</name>
|
|
<description>CBEMIS</description>
|
|
<bitRange>[10:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CBMMIS</name>
|
|
<description>CBMMIS</description>
|
|
<bitRange>[9:9]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TBTOMIS</name>
|
|
<description>TBTOMIS</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DMAAMIS</name>
|
|
<description>DMAAMIS</description>
|
|
<bitRange>[5:5]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TAMMIS</name>
|
|
<description>TAMMIS</description>
|
|
<bitRange>[4:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RTCMIS</name>
|
|
<description>RTCMIS</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CAEMIS</name>
|
|
<description>CAEMIS</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CAMMIS</name>
|
|
<description>CAMMIS</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TATOMIS</name>
|
|
<description>TATOMIS</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>ICLR</name>
|
|
<description>Interrupt Clear
|
|
This register is used to clear status bits in the RIS and MIS registers</description>
|
|
<addressOffset>36</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>WUECINT</name>
|
|
<description>WUECINT</description>
|
|
<bitRange>[16:16]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DMABINT</name>
|
|
<description>DMABINT</description>
|
|
<bitRange>[13:13]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>TBMCINT</name>
|
|
<description>TBMCINT</description>
|
|
<bitRange>[11:11]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>CBECINT</name>
|
|
<description>CBECINT</description>
|
|
<bitRange>[10:10]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>CBMCINT</name>
|
|
<description>CBMCINT</description>
|
|
<bitRange>[9:9]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>TBTOCINT</name>
|
|
<description>TBTOCINT</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DMAAINT</name>
|
|
<description>DMAAINT</description>
|
|
<bitRange>[5:5]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>TAMCINT</name>
|
|
<description>TAMCINT</description>
|
|
<bitRange>[4:4]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>RTCCINT</name>
|
|
<description>RTCCINT</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>CAECINT</name>
|
|
<description>CAECINT</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>CAMCINT</name>
|
|
<description>CAMCINT</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>TATOCINT</name>
|
|
<description>TATOCINT</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TAILR</name>
|
|
<description>Timer A Interval Load Register</description>
|
|
<addressOffset>40</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0xffffffff</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TAILR</name>
|
|
<description>TAILR</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TBILR</name>
|
|
<description>Timer B Interval Load Register</description>
|
|
<addressOffset>44</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000ffff</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TBILR</name>
|
|
<description>TBILR</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TAMATCHR</name>
|
|
<description>Timer A Match Register
|
|
|
|
Interrupts can be generated when the timer value is equal to the value in this register in one-shot or periodic mode.
|
|
|
|
In Edge-Count mode, this register along with TAILR, determines how many edge events are counted.
|
|
The total number of edge events counted is equal to the value in TAILR minus this value.
|
|
|
|
Note that in edge-count mode, when executing an up-count, the value of TAPR and TAILR must be greater than the value of TAPMR and TAMATCHR.
|
|
|
|
In PWM mode, this value along with TAILR, determines the duty cycle of the output PWM signal.
|
|
|
|
When a 16/32-bit GPT is configured to one of the 32-bit modes, TAMATCHR appears as a 32-bit register. (The upper 16-bits correspond to the contents TBMATCHR).
|
|
|
|
In a 16-bit mode, the upper 16 bits of this register read as 0s and have no effect on the state of TBMATCHR.
|
|
|
|
Note : This register is updated internally (takes effect) based on TAMR.TAMRSU
|
|
</description>
|
|
<addressOffset>48</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0xffffffff</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TAMATCHR</name>
|
|
<description>TAMATCHR</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TBMATCHR</name>
|
|
<description>Timer B Match Register
|
|
|
|
When a GPT is configured to one of the 32-bit modes, the contents of bits 15:0 in this register are loaded into the upper 16 bits of TAMATCHR.
|
|
Reads from this register return the current match value of Timer B and writes are ignored.
|
|
In a 16-bit mode, bits 15:0 are used for the match value. Bits 31:16 are reserved in both cases.
|
|
|
|
Note : This register is updated internally (takes effect) based on TBMR.TBMRSU</description>
|
|
<addressOffset>52</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000ffff</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TBMATCHR</name>
|
|
<description>TBMATCHR</description>
|
|
<bitRange>[15:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TAPR</name>
|
|
<description>Timer A Pre-scale
|
|
This register allows software to extend the range of the timers when they are used individually.
|
|
When in one-shot or periodic down count modes, this register acts as a true prescaler for the timer counter.
|
|
When acting as a true prescaler, the prescaler counts down to 0 before the value in TAR and TAV registers are incremented.
|
|
In all other individual/split modes, this register is a linear extension of the upper range of the timer counter, holding bits 23:16 in the 16-bit modes of the 16/32-bit GPT.
|
|
|
|
</description>
|
|
<addressOffset>56</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TAPSR</name>
|
|
<description>TAPSR</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TBPR</name>
|
|
<description>Timer B Pre-scale
|
|
This register allows software to extend the range of the timers when they are used individually.
|
|
When in one-shot or periodic down count modes, this register acts as a true prescaler for the timer counter.
|
|
When acting as a true prescaler, the prescaler counts down to 0 before the value in TBR and TBV registers are incremented.
|
|
In all other individual/split modes, this register is a linear extension of the upper range of the timer counter, holding bits 23:16 in the 16-bit modes of the 16/32-bit GPT.
|
|
|
|
</description>
|
|
<addressOffset>60</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TBPSR</name>
|
|
<description>TBPSR</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TAPMR</name>
|
|
<description>Timer A Pre-scale Match
|
|
This register allows software to extend the range of the TAMATCHR when used individually.
|
|
|
|
</description>
|
|
<addressOffset>64</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TAPSMR</name>
|
|
<description>TAPSMR</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TBPMR</name>
|
|
<description>Timer B Pre-scale Match
|
|
This register allows software to extend the range of the TBMATCHR when used individually.
|
|
|
|
</description>
|
|
<addressOffset>68</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TBPSMR</name>
|
|
<description>TBPSMR</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TAR</name>
|
|
<description>Timer A Register
|
|
|
|
</description>
|
|
<addressOffset>72</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0xffffffff</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TAR</name>
|
|
<description>TAR</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TBR</name>
|
|
<description>Timer B Register</description>
|
|
<addressOffset>76</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x0000ffff</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TBR</name>
|
|
<description>TBR</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TAV</name>
|
|
<description>Timer A Value
|
|
This register shows the current value of the free running 16-bit Timer A. In the 32-bit mode</description>
|
|
<addressOffset>80</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0xffffffff</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TAV</name>
|
|
<description>TAV</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TBV</name>
|
|
<description>Timer B Value
|
|
This register shows the current value of the free running 16-bit Timer B. Note: When the alternate timer clock (TIMCLK) is enabled, a read of a timer value will return the current count 1. </description>
|
|
<addressOffset>84</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000ffff</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TBV</name>
|
|
<description>TBV</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RTCPD</name>
|
|
<description>RTC Pre-divide Value
|
|
This register shows the current value of the RTC pre-divider in RTC mode. Note: When the alternate timer clock (TIMCLK) is enabled, a read of a timer value will return the current count -1. </description>
|
|
<addressOffset>88</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00007fff</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>RTCPD</name>
|
|
<description>RTCPD</description>
|
|
<bitRange>[15:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TAPS</name>
|
|
<description>Timer A Pre-scale Snap-shot
|
|
|
|
Based on the value in the register field TAMR.TAILD, this register is updated with the value from TAPR register either on the next cycle or on the next timeout.
|
|
|
|
|
|
This register shows the current value of the Timer A pre-scaler in the 16-bit mode. Note: When the alternate timer clock (TIMCLK) is enabled a read of a timer value will return the current count -1. </description>
|
|
<addressOffset>92</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>PSS</name>
|
|
<description>PSS</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TBPS</name>
|
|
<description>Timer B Pre-scale Snap-shot
|
|
|
|
Based on the value in the register field TBMR.TBILD, this register is updated with the value from TBPR register either on the next cycle or on the next timeout.
|
|
|
|
This register shows the current value of the Timer B pre-scaler in the 16-bit mode. Note: When the alternate timer clock (TIMCLK) is enabled a read of a timer value will return the current count -1. </description>
|
|
<addressOffset>96</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>PSS</name>
|
|
<description>PSS</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TAPV</name>
|
|
<description>Timer A Pre-scale Value
|
|
This register shows the current value of the Timer A free running pre-scaler in the 16-bit mode. Note: When the alternate timer clock (TIMCLK) is enabled, a read of a timer value will return the current count 1. </description>
|
|
<addressOffset>100</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>PSV</name>
|
|
<description>PSV</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TBPV</name>
|
|
<description>Timer B Pre-scale Value
|
|
This register shows the current value of the Timer B free running pre-scaler in the 16-bit mode. Note: When the alternate timer clock (TIMCLK) is enabled, a read of a timer value will return the current count-1. </description>
|
|
<addressOffset>104</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>PSV</name>
|
|
<description>PSV</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DMAEV</name>
|
|
<description>DMA Event
|
|
This register allows software to enable/disable GPT DMA trigger events. </description>
|
|
<addressOffset>108</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TBMDMAEN</name>
|
|
<description>TBMDMAEN</description>
|
|
<bitRange>[11:11]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CBEDMAEN</name>
|
|
<description>CBEDMAEN</description>
|
|
<bitRange>[10:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CBMDMAEN</name>
|
|
<description>CBMDMAEN</description>
|
|
<bitRange>[9:9]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TBTODMAEN</name>
|
|
<description>TBTODMAEN</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TAMDMAEN</name>
|
|
<description>TAMDMAEN</description>
|
|
<bitRange>[4:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RTCDMAEN</name>
|
|
<description>RTCDMAEN</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CAEDMAEN</name>
|
|
<description>CAEDMAEN</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CAMDMAEN</name>
|
|
<description>CAMDMAEN</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TATODMAEN</name>
|
|
<description>TATODMAEN</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>VERSION</name>
|
|
<description>Peripheral Version
|
|
This register provides information regarding the GPT version</description>
|
|
<addressOffset>4016</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000400</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>VERSION</name>
|
|
<description>VERSION</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>ANDCCP</name>
|
|
<description>Combined CCP Output
|
|
This register is used to logically AND CCP output pairs for each timer</description>
|
|
<addressOffset>4020</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CCP_AND_EN</name>
|
|
<description>CCP_AND_EN</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral><peripheral>
|
|
<name>GPT2</name>
|
|
<description>General Purpose Timer.
|
|
|
|
</description>
|
|
<baseAddress>0x40012000</baseAddress>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x1000</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<registers>
|
|
<register>
|
|
<name>CFG</name>
|
|
<description>Configuration</description>
|
|
<addressOffset>0</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CFG</name>
|
|
<description>CFG</description>
|
|
<bitRange>[2:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TAMR</name>
|
|
<description>Timer A Mode
|
|
|
|
</description>
|
|
<addressOffset>4</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TCACT</name>
|
|
<description>TCACT</description>
|
|
<bitRange>[15:13]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TACINTD</name>
|
|
<description>TACINTD</description>
|
|
<bitRange>[12:12]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TAPLO</name>
|
|
<description>TAPLO</description>
|
|
<bitRange>[11:11]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TAMRSU</name>
|
|
<description>TAMRSU</description>
|
|
<bitRange>[10:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TAPWMIE</name>
|
|
<description>TAPWMIE</description>
|
|
<bitRange>[9:9]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TAILD</name>
|
|
<description>TAILD</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TASNAPS</name>
|
|
<description>TASNAPS</description>
|
|
<bitRange>[7:7]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TAWOT</name>
|
|
<description>TAWOT</description>
|
|
<bitRange>[6:6]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TAMIE</name>
|
|
<description>TAMIE</description>
|
|
<bitRange>[5:5]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TACDIR</name>
|
|
<description>TACDIR</description>
|
|
<bitRange>[4:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TAAMS</name>
|
|
<description>TAAMS</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TACM</name>
|
|
<description>TACM</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TAMR</name>
|
|
<description>TAMR</description>
|
|
<bitRange>[1:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TBMR</name>
|
|
<description>Timer B Mode
|
|
|
|
</description>
|
|
<addressOffset>8</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TCACT</name>
|
|
<description>TCACT</description>
|
|
<bitRange>[15:13]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TBCINTD</name>
|
|
<description>TBCINTD</description>
|
|
<bitRange>[12:12]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TBPLO</name>
|
|
<description>TBPLO</description>
|
|
<bitRange>[11:11]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TBMRSU</name>
|
|
<description>TBMRSU</description>
|
|
<bitRange>[10:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TBPWMIE</name>
|
|
<description>TBPWMIE</description>
|
|
<bitRange>[9:9]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TBILD</name>
|
|
<description>TBILD</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TBSNAPS</name>
|
|
<description>TBSNAPS</description>
|
|
<bitRange>[7:7]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TBWOT</name>
|
|
<description>TBWOT</description>
|
|
<bitRange>[6:6]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TBMIE</name>
|
|
<description>TBMIE</description>
|
|
<bitRange>[5:5]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TBCDIR</name>
|
|
<description>TBCDIR</description>
|
|
<bitRange>[4:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TBAMS</name>
|
|
<description>TBAMS</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TBCM</name>
|
|
<description>TBCM</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TBMR</name>
|
|
<description>TBMR</description>
|
|
<bitRange>[1:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CTL</name>
|
|
<description>Control</description>
|
|
<addressOffset>12</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TBPWML</name>
|
|
<description>TBPWML</description>
|
|
<bitRange>[14:14]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TBEVENT</name>
|
|
<description>TBEVENT</description>
|
|
<bitRange>[11:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TBSTALL</name>
|
|
<description>TBSTALL</description>
|
|
<bitRange>[9:9]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TBEN</name>
|
|
<description>TBEN</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TAPWML</name>
|
|
<description>TAPWML</description>
|
|
<bitRange>[6:6]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RTCEN</name>
|
|
<description>RTCEN</description>
|
|
<bitRange>[4:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TAEVENT</name>
|
|
<description>TAEVENT</description>
|
|
<bitRange>[3:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TASTALL</name>
|
|
<description>TASTALL</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TAEN</name>
|
|
<description>TAEN</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SYNC</name>
|
|
<description>Synch Register
|
|
|
|
</description>
|
|
<addressOffset>16</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SYNC3</name>
|
|
<description>SYNC3</description>
|
|
<bitRange>[7:6]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SYNC2</name>
|
|
<description>SYNC2</description>
|
|
<bitRange>[5:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SYNC1</name>
|
|
<description>SYNC1</description>
|
|
<bitRange>[3:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SYNC0</name>
|
|
<description>SYNC0</description>
|
|
<bitRange>[1:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IMR</name>
|
|
<description>Interrupt Mask
|
|
This register is used to enable the interrupts.
|
|
Associated registers:
|
|
RIS, MIS, ICLR
|
|
|
|
</description>
|
|
<addressOffset>24</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>WUMIS</name>
|
|
<description>WUMIS</description>
|
|
<bitRange>[16:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DMABIM</name>
|
|
<description>DMABIM</description>
|
|
<bitRange>[13:13]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TBMIM</name>
|
|
<description>TBMIM</description>
|
|
<bitRange>[11:11]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CBEIM</name>
|
|
<description>CBEIM</description>
|
|
<bitRange>[10:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CBMIM</name>
|
|
<description>CBMIM</description>
|
|
<bitRange>[9:9]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TBTOIM</name>
|
|
<description>TBTOIM</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DMAAIM</name>
|
|
<description>DMAAIM</description>
|
|
<bitRange>[5:5]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TAMIM</name>
|
|
<description>TAMIM</description>
|
|
<bitRange>[4:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RTCIM</name>
|
|
<description>RTCIM</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CAEIM</name>
|
|
<description>CAEIM</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CAMIM</name>
|
|
<description>CAMIM</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TATOIM</name>
|
|
<description>TATOIM</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RIS</name>
|
|
<description>Raw Interrupt Status
|
|
Associated registers:
|
|
IMR, MIS, ICLR
|
|
|
|
</description>
|
|
<addressOffset>28</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>WURIS</name>
|
|
<description>WURIS</description>
|
|
<bitRange>[16:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DMABRIS</name>
|
|
<description>DMABRIS</description>
|
|
<bitRange>[13:13]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TBMRIS</name>
|
|
<description>TBMRIS</description>
|
|
<bitRange>[11:11]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CBERIS</name>
|
|
<description>CBERIS</description>
|
|
<bitRange>[10:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CBMRIS</name>
|
|
<description>CBMRIS</description>
|
|
<bitRange>[9:9]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TBTORIS</name>
|
|
<description>TBTORIS</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DMAARIS</name>
|
|
<description>DMAARIS</description>
|
|
<bitRange>[5:5]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TAMRIS</name>
|
|
<description>TAMRIS</description>
|
|
<bitRange>[4:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RTCRIS</name>
|
|
<description>RTCRIS</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CAERIS</name>
|
|
<description>CAERIS</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CAMRIS</name>
|
|
<description>CAMRIS</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TATORIS</name>
|
|
<description>TATORIS</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>MIS</name>
|
|
<description>Masked Interrupt Status
|
|
Values are result of bitwise AND operation between RIS and IMR
|
|
Assosciated clear register: ICLR
|
|
|
|
</description>
|
|
<addressOffset>32</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>WUMIS</name>
|
|
<description>WUMIS</description>
|
|
<bitRange>[16:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DMABMIS</name>
|
|
<description>DMABMIS</description>
|
|
<bitRange>[13:13]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TBMMIS</name>
|
|
<description>TBMMIS</description>
|
|
<bitRange>[11:11]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CBEMIS</name>
|
|
<description>CBEMIS</description>
|
|
<bitRange>[10:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CBMMIS</name>
|
|
<description>CBMMIS</description>
|
|
<bitRange>[9:9]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TBTOMIS</name>
|
|
<description>TBTOMIS</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DMAAMIS</name>
|
|
<description>DMAAMIS</description>
|
|
<bitRange>[5:5]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TAMMIS</name>
|
|
<description>TAMMIS</description>
|
|
<bitRange>[4:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RTCMIS</name>
|
|
<description>RTCMIS</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CAEMIS</name>
|
|
<description>CAEMIS</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CAMMIS</name>
|
|
<description>CAMMIS</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TATOMIS</name>
|
|
<description>TATOMIS</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>ICLR</name>
|
|
<description>Interrupt Clear
|
|
This register is used to clear status bits in the RIS and MIS registers</description>
|
|
<addressOffset>36</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>WUECINT</name>
|
|
<description>WUECINT</description>
|
|
<bitRange>[16:16]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DMABINT</name>
|
|
<description>DMABINT</description>
|
|
<bitRange>[13:13]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>TBMCINT</name>
|
|
<description>TBMCINT</description>
|
|
<bitRange>[11:11]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>CBECINT</name>
|
|
<description>CBECINT</description>
|
|
<bitRange>[10:10]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>CBMCINT</name>
|
|
<description>CBMCINT</description>
|
|
<bitRange>[9:9]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>TBTOCINT</name>
|
|
<description>TBTOCINT</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DMAAINT</name>
|
|
<description>DMAAINT</description>
|
|
<bitRange>[5:5]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>TAMCINT</name>
|
|
<description>TAMCINT</description>
|
|
<bitRange>[4:4]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>RTCCINT</name>
|
|
<description>RTCCINT</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>CAECINT</name>
|
|
<description>CAECINT</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>CAMCINT</name>
|
|
<description>CAMCINT</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>TATOCINT</name>
|
|
<description>TATOCINT</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TAILR</name>
|
|
<description>Timer A Interval Load Register</description>
|
|
<addressOffset>40</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0xffffffff</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TAILR</name>
|
|
<description>TAILR</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TBILR</name>
|
|
<description>Timer B Interval Load Register</description>
|
|
<addressOffset>44</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000ffff</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TBILR</name>
|
|
<description>TBILR</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TAMATCHR</name>
|
|
<description>Timer A Match Register
|
|
|
|
Interrupts can be generated when the timer value is equal to the value in this register in one-shot or periodic mode.
|
|
|
|
In Edge-Count mode, this register along with TAILR, determines how many edge events are counted.
|
|
The total number of edge events counted is equal to the value in TAILR minus this value.
|
|
|
|
Note that in edge-count mode, when executing an up-count, the value of TAPR and TAILR must be greater than the value of TAPMR and TAMATCHR.
|
|
|
|
In PWM mode, this value along with TAILR, determines the duty cycle of the output PWM signal.
|
|
|
|
When a 16/32-bit GPT is configured to one of the 32-bit modes, TAMATCHR appears as a 32-bit register. (The upper 16-bits correspond to the contents TBMATCHR).
|
|
|
|
In a 16-bit mode, the upper 16 bits of this register read as 0s and have no effect on the state of TBMATCHR.
|
|
|
|
Note : This register is updated internally (takes effect) based on TAMR.TAMRSU
|
|
</description>
|
|
<addressOffset>48</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0xffffffff</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TAMATCHR</name>
|
|
<description>TAMATCHR</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TBMATCHR</name>
|
|
<description>Timer B Match Register
|
|
|
|
When a GPT is configured to one of the 32-bit modes, the contents of bits 15:0 in this register are loaded into the upper 16 bits of TAMATCHR.
|
|
Reads from this register return the current match value of Timer B and writes are ignored.
|
|
In a 16-bit mode, bits 15:0 are used for the match value. Bits 31:16 are reserved in both cases.
|
|
|
|
Note : This register is updated internally (takes effect) based on TBMR.TBMRSU</description>
|
|
<addressOffset>52</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000ffff</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TBMATCHR</name>
|
|
<description>TBMATCHR</description>
|
|
<bitRange>[15:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TAPR</name>
|
|
<description>Timer A Pre-scale
|
|
This register allows software to extend the range of the timers when they are used individually.
|
|
When in one-shot or periodic down count modes, this register acts as a true prescaler for the timer counter.
|
|
When acting as a true prescaler, the prescaler counts down to 0 before the value in TAR and TAV registers are incremented.
|
|
In all other individual/split modes, this register is a linear extension of the upper range of the timer counter, holding bits 23:16 in the 16-bit modes of the 16/32-bit GPT.
|
|
|
|
</description>
|
|
<addressOffset>56</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TAPSR</name>
|
|
<description>TAPSR</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TBPR</name>
|
|
<description>Timer B Pre-scale
|
|
This register allows software to extend the range of the timers when they are used individually.
|
|
When in one-shot or periodic down count modes, this register acts as a true prescaler for the timer counter.
|
|
When acting as a true prescaler, the prescaler counts down to 0 before the value in TBR and TBV registers are incremented.
|
|
In all other individual/split modes, this register is a linear extension of the upper range of the timer counter, holding bits 23:16 in the 16-bit modes of the 16/32-bit GPT.
|
|
|
|
</description>
|
|
<addressOffset>60</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TBPSR</name>
|
|
<description>TBPSR</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TAPMR</name>
|
|
<description>Timer A Pre-scale Match
|
|
This register allows software to extend the range of the TAMATCHR when used individually.
|
|
|
|
</description>
|
|
<addressOffset>64</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TAPSMR</name>
|
|
<description>TAPSMR</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TBPMR</name>
|
|
<description>Timer B Pre-scale Match
|
|
This register allows software to extend the range of the TBMATCHR when used individually.
|
|
|
|
</description>
|
|
<addressOffset>68</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TBPSMR</name>
|
|
<description>TBPSMR</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TAR</name>
|
|
<description>Timer A Register
|
|
|
|
</description>
|
|
<addressOffset>72</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0xffffffff</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TAR</name>
|
|
<description>TAR</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TBR</name>
|
|
<description>Timer B Register</description>
|
|
<addressOffset>76</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x0000ffff</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TBR</name>
|
|
<description>TBR</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TAV</name>
|
|
<description>Timer A Value
|
|
This register shows the current value of the free running 16-bit Timer A. In the 32-bit mode</description>
|
|
<addressOffset>80</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0xffffffff</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TAV</name>
|
|
<description>TAV</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TBV</name>
|
|
<description>Timer B Value
|
|
This register shows the current value of the free running 16-bit Timer B. Note: When the alternate timer clock (TIMCLK) is enabled, a read of a timer value will return the current count 1. </description>
|
|
<addressOffset>84</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000ffff</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TBV</name>
|
|
<description>TBV</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RTCPD</name>
|
|
<description>RTC Pre-divide Value
|
|
This register shows the current value of the RTC pre-divider in RTC mode. Note: When the alternate timer clock (TIMCLK) is enabled, a read of a timer value will return the current count -1. </description>
|
|
<addressOffset>88</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00007fff</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>RTCPD</name>
|
|
<description>RTCPD</description>
|
|
<bitRange>[15:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TAPS</name>
|
|
<description>Timer A Pre-scale Snap-shot
|
|
|
|
Based on the value in the register field TAMR.TAILD, this register is updated with the value from TAPR register either on the next cycle or on the next timeout.
|
|
|
|
|
|
This register shows the current value of the Timer A pre-scaler in the 16-bit mode. Note: When the alternate timer clock (TIMCLK) is enabled a read of a timer value will return the current count -1. </description>
|
|
<addressOffset>92</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>PSS</name>
|
|
<description>PSS</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TBPS</name>
|
|
<description>Timer B Pre-scale Snap-shot
|
|
|
|
Based on the value in the register field TBMR.TBILD, this register is updated with the value from TBPR register either on the next cycle or on the next timeout.
|
|
|
|
This register shows the current value of the Timer B pre-scaler in the 16-bit mode. Note: When the alternate timer clock (TIMCLK) is enabled a read of a timer value will return the current count -1. </description>
|
|
<addressOffset>96</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>PSS</name>
|
|
<description>PSS</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TAPV</name>
|
|
<description>Timer A Pre-scale Value
|
|
This register shows the current value of the Timer A free running pre-scaler in the 16-bit mode. Note: When the alternate timer clock (TIMCLK) is enabled, a read of a timer value will return the current count 1. </description>
|
|
<addressOffset>100</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>PSV</name>
|
|
<description>PSV</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TBPV</name>
|
|
<description>Timer B Pre-scale Value
|
|
This register shows the current value of the Timer B free running pre-scaler in the 16-bit mode. Note: When the alternate timer clock (TIMCLK) is enabled, a read of a timer value will return the current count-1. </description>
|
|
<addressOffset>104</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>PSV</name>
|
|
<description>PSV</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DMAEV</name>
|
|
<description>DMA Event
|
|
This register allows software to enable/disable GPT DMA trigger events. </description>
|
|
<addressOffset>108</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TBMDMAEN</name>
|
|
<description>TBMDMAEN</description>
|
|
<bitRange>[11:11]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CBEDMAEN</name>
|
|
<description>CBEDMAEN</description>
|
|
<bitRange>[10:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CBMDMAEN</name>
|
|
<description>CBMDMAEN</description>
|
|
<bitRange>[9:9]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TBTODMAEN</name>
|
|
<description>TBTODMAEN</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TAMDMAEN</name>
|
|
<description>TAMDMAEN</description>
|
|
<bitRange>[4:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RTCDMAEN</name>
|
|
<description>RTCDMAEN</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CAEDMAEN</name>
|
|
<description>CAEDMAEN</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CAMDMAEN</name>
|
|
<description>CAMDMAEN</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TATODMAEN</name>
|
|
<description>TATODMAEN</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>VERSION</name>
|
|
<description>Peripheral Version
|
|
This register provides information regarding the GPT version</description>
|
|
<addressOffset>4016</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000400</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>VERSION</name>
|
|
<description>VERSION</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>ANDCCP</name>
|
|
<description>Combined CCP Output
|
|
This register is used to logically AND CCP output pairs for each timer</description>
|
|
<addressOffset>4020</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CCP_AND_EN</name>
|
|
<description>CCP_AND_EN</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral><peripheral>
|
|
<name>GPT3</name>
|
|
<description>General Purpose Timer.
|
|
|
|
</description>
|
|
<baseAddress>0x40013000</baseAddress>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x1000</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<registers>
|
|
<register>
|
|
<name>CFG</name>
|
|
<description>Configuration</description>
|
|
<addressOffset>0</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CFG</name>
|
|
<description>CFG</description>
|
|
<bitRange>[2:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TAMR</name>
|
|
<description>Timer A Mode
|
|
|
|
</description>
|
|
<addressOffset>4</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TCACT</name>
|
|
<description>TCACT</description>
|
|
<bitRange>[15:13]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TACINTD</name>
|
|
<description>TACINTD</description>
|
|
<bitRange>[12:12]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TAPLO</name>
|
|
<description>TAPLO</description>
|
|
<bitRange>[11:11]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TAMRSU</name>
|
|
<description>TAMRSU</description>
|
|
<bitRange>[10:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TAPWMIE</name>
|
|
<description>TAPWMIE</description>
|
|
<bitRange>[9:9]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TAILD</name>
|
|
<description>TAILD</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TASNAPS</name>
|
|
<description>TASNAPS</description>
|
|
<bitRange>[7:7]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TAWOT</name>
|
|
<description>TAWOT</description>
|
|
<bitRange>[6:6]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TAMIE</name>
|
|
<description>TAMIE</description>
|
|
<bitRange>[5:5]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TACDIR</name>
|
|
<description>TACDIR</description>
|
|
<bitRange>[4:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TAAMS</name>
|
|
<description>TAAMS</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TACM</name>
|
|
<description>TACM</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TAMR</name>
|
|
<description>TAMR</description>
|
|
<bitRange>[1:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TBMR</name>
|
|
<description>Timer B Mode
|
|
|
|
</description>
|
|
<addressOffset>8</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TCACT</name>
|
|
<description>TCACT</description>
|
|
<bitRange>[15:13]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TBCINTD</name>
|
|
<description>TBCINTD</description>
|
|
<bitRange>[12:12]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TBPLO</name>
|
|
<description>TBPLO</description>
|
|
<bitRange>[11:11]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TBMRSU</name>
|
|
<description>TBMRSU</description>
|
|
<bitRange>[10:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TBPWMIE</name>
|
|
<description>TBPWMIE</description>
|
|
<bitRange>[9:9]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TBILD</name>
|
|
<description>TBILD</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TBSNAPS</name>
|
|
<description>TBSNAPS</description>
|
|
<bitRange>[7:7]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TBWOT</name>
|
|
<description>TBWOT</description>
|
|
<bitRange>[6:6]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TBMIE</name>
|
|
<description>TBMIE</description>
|
|
<bitRange>[5:5]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TBCDIR</name>
|
|
<description>TBCDIR</description>
|
|
<bitRange>[4:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TBAMS</name>
|
|
<description>TBAMS</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TBCM</name>
|
|
<description>TBCM</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TBMR</name>
|
|
<description>TBMR</description>
|
|
<bitRange>[1:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CTL</name>
|
|
<description>Control</description>
|
|
<addressOffset>12</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TBPWML</name>
|
|
<description>TBPWML</description>
|
|
<bitRange>[14:14]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TBEVENT</name>
|
|
<description>TBEVENT</description>
|
|
<bitRange>[11:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TBSTALL</name>
|
|
<description>TBSTALL</description>
|
|
<bitRange>[9:9]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TBEN</name>
|
|
<description>TBEN</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TAPWML</name>
|
|
<description>TAPWML</description>
|
|
<bitRange>[6:6]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RTCEN</name>
|
|
<description>RTCEN</description>
|
|
<bitRange>[4:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TAEVENT</name>
|
|
<description>TAEVENT</description>
|
|
<bitRange>[3:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TASTALL</name>
|
|
<description>TASTALL</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TAEN</name>
|
|
<description>TAEN</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SYNC</name>
|
|
<description>Synch Register
|
|
|
|
</description>
|
|
<addressOffset>16</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SYNC3</name>
|
|
<description>SYNC3</description>
|
|
<bitRange>[7:6]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SYNC2</name>
|
|
<description>SYNC2</description>
|
|
<bitRange>[5:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SYNC1</name>
|
|
<description>SYNC1</description>
|
|
<bitRange>[3:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SYNC0</name>
|
|
<description>SYNC0</description>
|
|
<bitRange>[1:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IMR</name>
|
|
<description>Interrupt Mask
|
|
This register is used to enable the interrupts.
|
|
Associated registers:
|
|
RIS, MIS, ICLR
|
|
|
|
</description>
|
|
<addressOffset>24</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>WUMIS</name>
|
|
<description>WUMIS</description>
|
|
<bitRange>[16:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DMABIM</name>
|
|
<description>DMABIM</description>
|
|
<bitRange>[13:13]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TBMIM</name>
|
|
<description>TBMIM</description>
|
|
<bitRange>[11:11]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CBEIM</name>
|
|
<description>CBEIM</description>
|
|
<bitRange>[10:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CBMIM</name>
|
|
<description>CBMIM</description>
|
|
<bitRange>[9:9]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TBTOIM</name>
|
|
<description>TBTOIM</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DMAAIM</name>
|
|
<description>DMAAIM</description>
|
|
<bitRange>[5:5]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TAMIM</name>
|
|
<description>TAMIM</description>
|
|
<bitRange>[4:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RTCIM</name>
|
|
<description>RTCIM</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CAEIM</name>
|
|
<description>CAEIM</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CAMIM</name>
|
|
<description>CAMIM</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TATOIM</name>
|
|
<description>TATOIM</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RIS</name>
|
|
<description>Raw Interrupt Status
|
|
Associated registers:
|
|
IMR, MIS, ICLR
|
|
|
|
</description>
|
|
<addressOffset>28</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>WURIS</name>
|
|
<description>WURIS</description>
|
|
<bitRange>[16:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DMABRIS</name>
|
|
<description>DMABRIS</description>
|
|
<bitRange>[13:13]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TBMRIS</name>
|
|
<description>TBMRIS</description>
|
|
<bitRange>[11:11]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CBERIS</name>
|
|
<description>CBERIS</description>
|
|
<bitRange>[10:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CBMRIS</name>
|
|
<description>CBMRIS</description>
|
|
<bitRange>[9:9]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TBTORIS</name>
|
|
<description>TBTORIS</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DMAARIS</name>
|
|
<description>DMAARIS</description>
|
|
<bitRange>[5:5]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TAMRIS</name>
|
|
<description>TAMRIS</description>
|
|
<bitRange>[4:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RTCRIS</name>
|
|
<description>RTCRIS</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CAERIS</name>
|
|
<description>CAERIS</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CAMRIS</name>
|
|
<description>CAMRIS</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TATORIS</name>
|
|
<description>TATORIS</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>MIS</name>
|
|
<description>Masked Interrupt Status
|
|
Values are result of bitwise AND operation between RIS and IMR
|
|
Assosciated clear register: ICLR
|
|
|
|
</description>
|
|
<addressOffset>32</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>WUMIS</name>
|
|
<description>WUMIS</description>
|
|
<bitRange>[16:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DMABMIS</name>
|
|
<description>DMABMIS</description>
|
|
<bitRange>[13:13]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TBMMIS</name>
|
|
<description>TBMMIS</description>
|
|
<bitRange>[11:11]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CBEMIS</name>
|
|
<description>CBEMIS</description>
|
|
<bitRange>[10:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CBMMIS</name>
|
|
<description>CBMMIS</description>
|
|
<bitRange>[9:9]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TBTOMIS</name>
|
|
<description>TBTOMIS</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DMAAMIS</name>
|
|
<description>DMAAMIS</description>
|
|
<bitRange>[5:5]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TAMMIS</name>
|
|
<description>TAMMIS</description>
|
|
<bitRange>[4:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RTCMIS</name>
|
|
<description>RTCMIS</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CAEMIS</name>
|
|
<description>CAEMIS</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CAMMIS</name>
|
|
<description>CAMMIS</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TATOMIS</name>
|
|
<description>TATOMIS</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>ICLR</name>
|
|
<description>Interrupt Clear
|
|
This register is used to clear status bits in the RIS and MIS registers</description>
|
|
<addressOffset>36</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>WUECINT</name>
|
|
<description>WUECINT</description>
|
|
<bitRange>[16:16]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DMABINT</name>
|
|
<description>DMABINT</description>
|
|
<bitRange>[13:13]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>TBMCINT</name>
|
|
<description>TBMCINT</description>
|
|
<bitRange>[11:11]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>CBECINT</name>
|
|
<description>CBECINT</description>
|
|
<bitRange>[10:10]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>CBMCINT</name>
|
|
<description>CBMCINT</description>
|
|
<bitRange>[9:9]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>TBTOCINT</name>
|
|
<description>TBTOCINT</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>DMAAINT</name>
|
|
<description>DMAAINT</description>
|
|
<bitRange>[5:5]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>TAMCINT</name>
|
|
<description>TAMCINT</description>
|
|
<bitRange>[4:4]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>RTCCINT</name>
|
|
<description>RTCCINT</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>CAECINT</name>
|
|
<description>CAECINT</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>CAMCINT</name>
|
|
<description>CAMCINT</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
<field>
|
|
<name>TATOCINT</name>
|
|
<description>TATOCINT</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
<modifiedWriteValues>oneToClear</modifiedWriteValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TAILR</name>
|
|
<description>Timer A Interval Load Register</description>
|
|
<addressOffset>40</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0xffffffff</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TAILR</name>
|
|
<description>TAILR</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TBILR</name>
|
|
<description>Timer B Interval Load Register</description>
|
|
<addressOffset>44</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000ffff</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TBILR</name>
|
|
<description>TBILR</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TAMATCHR</name>
|
|
<description>Timer A Match Register
|
|
|
|
Interrupts can be generated when the timer value is equal to the value in this register in one-shot or periodic mode.
|
|
|
|
In Edge-Count mode, this register along with TAILR, determines how many edge events are counted.
|
|
The total number of edge events counted is equal to the value in TAILR minus this value.
|
|
|
|
Note that in edge-count mode, when executing an up-count, the value of TAPR and TAILR must be greater than the value of TAPMR and TAMATCHR.
|
|
|
|
In PWM mode, this value along with TAILR, determines the duty cycle of the output PWM signal.
|
|
|
|
When a 16/32-bit GPT is configured to one of the 32-bit modes, TAMATCHR appears as a 32-bit register. (The upper 16-bits correspond to the contents TBMATCHR).
|
|
|
|
In a 16-bit mode, the upper 16 bits of this register read as 0s and have no effect on the state of TBMATCHR.
|
|
|
|
Note : This register is updated internally (takes effect) based on TAMR.TAMRSU
|
|
</description>
|
|
<addressOffset>48</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0xffffffff</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TAMATCHR</name>
|
|
<description>TAMATCHR</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TBMATCHR</name>
|
|
<description>Timer B Match Register
|
|
|
|
When a GPT is configured to one of the 32-bit modes, the contents of bits 15:0 in this register are loaded into the upper 16 bits of TAMATCHR.
|
|
Reads from this register return the current match value of Timer B and writes are ignored.
|
|
In a 16-bit mode, bits 15:0 are used for the match value. Bits 31:16 are reserved in both cases.
|
|
|
|
Note : This register is updated internally (takes effect) based on TBMR.TBMRSU</description>
|
|
<addressOffset>52</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000ffff</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TBMATCHR</name>
|
|
<description>TBMATCHR</description>
|
|
<bitRange>[15:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TAPR</name>
|
|
<description>Timer A Pre-scale
|
|
This register allows software to extend the range of the timers when they are used individually.
|
|
When in one-shot or periodic down count modes, this register acts as a true prescaler for the timer counter.
|
|
When acting as a true prescaler, the prescaler counts down to 0 before the value in TAR and TAV registers are incremented.
|
|
In all other individual/split modes, this register is a linear extension of the upper range of the timer counter, holding bits 23:16 in the 16-bit modes of the 16/32-bit GPT.
|
|
|
|
</description>
|
|
<addressOffset>56</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TAPSR</name>
|
|
<description>TAPSR</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TBPR</name>
|
|
<description>Timer B Pre-scale
|
|
This register allows software to extend the range of the timers when they are used individually.
|
|
When in one-shot or periodic down count modes, this register acts as a true prescaler for the timer counter.
|
|
When acting as a true prescaler, the prescaler counts down to 0 before the value in TBR and TBV registers are incremented.
|
|
In all other individual/split modes, this register is a linear extension of the upper range of the timer counter, holding bits 23:16 in the 16-bit modes of the 16/32-bit GPT.
|
|
|
|
</description>
|
|
<addressOffset>60</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TBPSR</name>
|
|
<description>TBPSR</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TAPMR</name>
|
|
<description>Timer A Pre-scale Match
|
|
This register allows software to extend the range of the TAMATCHR when used individually.
|
|
|
|
</description>
|
|
<addressOffset>64</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TAPSMR</name>
|
|
<description>TAPSMR</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TBPMR</name>
|
|
<description>Timer B Pre-scale Match
|
|
This register allows software to extend the range of the TBMATCHR when used individually.
|
|
|
|
</description>
|
|
<addressOffset>68</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TBPSMR</name>
|
|
<description>TBPSMR</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TAR</name>
|
|
<description>Timer A Register
|
|
|
|
</description>
|
|
<addressOffset>72</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0xffffffff</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TAR</name>
|
|
<description>TAR</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TBR</name>
|
|
<description>Timer B Register</description>
|
|
<addressOffset>76</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x0000ffff</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TBR</name>
|
|
<description>TBR</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TAV</name>
|
|
<description>Timer A Value
|
|
This register shows the current value of the free running 16-bit Timer A. In the 32-bit mode</description>
|
|
<addressOffset>80</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0xffffffff</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TAV</name>
|
|
<description>TAV</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TBV</name>
|
|
<description>Timer B Value
|
|
This register shows the current value of the free running 16-bit Timer B. Note: When the alternate timer clock (TIMCLK) is enabled, a read of a timer value will return the current count 1. </description>
|
|
<addressOffset>84</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000ffff</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TBV</name>
|
|
<description>TBV</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RTCPD</name>
|
|
<description>RTC Pre-divide Value
|
|
This register shows the current value of the RTC pre-divider in RTC mode. Note: When the alternate timer clock (TIMCLK) is enabled, a read of a timer value will return the current count -1. </description>
|
|
<addressOffset>88</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00007fff</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>RTCPD</name>
|
|
<description>RTCPD</description>
|
|
<bitRange>[15:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TAPS</name>
|
|
<description>Timer A Pre-scale Snap-shot
|
|
|
|
Based on the value in the register field TAMR.TAILD, this register is updated with the value from TAPR register either on the next cycle or on the next timeout.
|
|
|
|
|
|
This register shows the current value of the Timer A pre-scaler in the 16-bit mode. Note: When the alternate timer clock (TIMCLK) is enabled a read of a timer value will return the current count -1. </description>
|
|
<addressOffset>92</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>PSS</name>
|
|
<description>PSS</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TBPS</name>
|
|
<description>Timer B Pre-scale Snap-shot
|
|
|
|
Based on the value in the register field TBMR.TBILD, this register is updated with the value from TBPR register either on the next cycle or on the next timeout.
|
|
|
|
This register shows the current value of the Timer B pre-scaler in the 16-bit mode. Note: When the alternate timer clock (TIMCLK) is enabled a read of a timer value will return the current count -1. </description>
|
|
<addressOffset>96</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>PSS</name>
|
|
<description>PSS</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TAPV</name>
|
|
<description>Timer A Pre-scale Value
|
|
This register shows the current value of the Timer A free running pre-scaler in the 16-bit mode. Note: When the alternate timer clock (TIMCLK) is enabled, a read of a timer value will return the current count 1. </description>
|
|
<addressOffset>100</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>PSV</name>
|
|
<description>PSV</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TBPV</name>
|
|
<description>Timer B Pre-scale Value
|
|
This register shows the current value of the Timer B free running pre-scaler in the 16-bit mode. Note: When the alternate timer clock (TIMCLK) is enabled, a read of a timer value will return the current count-1. </description>
|
|
<addressOffset>104</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>PSV</name>
|
|
<description>PSV</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DMAEV</name>
|
|
<description>DMA Event
|
|
This register allows software to enable/disable GPT DMA trigger events. </description>
|
|
<addressOffset>108</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TBMDMAEN</name>
|
|
<description>TBMDMAEN</description>
|
|
<bitRange>[11:11]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CBEDMAEN</name>
|
|
<description>CBEDMAEN</description>
|
|
<bitRange>[10:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CBMDMAEN</name>
|
|
<description>CBMDMAEN</description>
|
|
<bitRange>[9:9]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TBTODMAEN</name>
|
|
<description>TBTODMAEN</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TAMDMAEN</name>
|
|
<description>TAMDMAEN</description>
|
|
<bitRange>[4:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RTCDMAEN</name>
|
|
<description>RTCDMAEN</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CAEDMAEN</name>
|
|
<description>CAEDMAEN</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CAMDMAEN</name>
|
|
<description>CAMDMAEN</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TATODMAEN</name>
|
|
<description>TATODMAEN</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>VERSION</name>
|
|
<description>Peripheral Version
|
|
This register provides information regarding the GPT version</description>
|
|
<addressOffset>4016</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000400</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>VERSION</name>
|
|
<description>VERSION</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>ANDCCP</name>
|
|
<description>Combined CCP Output
|
|
This register is used to logically AND CCP output pairs for each timer</description>
|
|
<addressOffset>4020</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CCP_AND_EN</name>
|
|
<description>CCP_AND_EN</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral><peripheral>
|
|
<name>I2C0</name>
|
|
<description>I2CMaster/Slave Serial Controler
|
|
|
|
</description>
|
|
<baseAddress>0x40002000</baseAddress>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x1000</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<registers>
|
|
<register>
|
|
<name>SOAR</name>
|
|
<description>Slave Own Address
|
|
This register consists of seven address bits that identify this I2C device on the I2C bus.</description>
|
|
<addressOffset>0</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>OAR</name>
|
|
<description>OAR</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SSTAT</name>
|
|
<description>Slave Status
|
|
Note: This register shares address with SCTL, meaning that this register functions as a control register when written, and a status register when read.</description>
|
|
<addressOffset>4</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FBR</name>
|
|
<description>FBR</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TREQ</name>
|
|
<description>TREQ</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RREQ</name>
|
|
<description>RREQ</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SCTL</name>
|
|
<description>Slave Control
|
|
Note: This register shares address with SSTAT, meaning that this register functions as a control register when written, and a status register when read.</description>
|
|
<addressOffset>4</addressOffset>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DA</name>
|
|
<description>DA</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
<alternateRegister>SSTAT</alternateRegister></register>
|
|
<register>
|
|
<name>SDR</name>
|
|
<description>Slave Data
|
|
This register contains the data to be transmitted when in the Slave Transmit state, and the data received when in the Slave Receive state.</description>
|
|
<addressOffset>8</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DATA</name>
|
|
<description>DATA</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SIMR</name>
|
|
<description>Slave Interrupt Mask
|
|
This register controls whether a raw interrupt is promoted to a controller interrupt.</description>
|
|
<addressOffset>12</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>STOPIM</name>
|
|
<description>STOPIM</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>STARTIM</name>
|
|
<description>STARTIM</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DATAIM</name>
|
|
<description>DATAIM</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SRIS</name>
|
|
<description>Slave Raw Interrupt Status
|
|
This register shows the unmasked interrupt status.</description>
|
|
<addressOffset>16</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>STOPRIS</name>
|
|
<description>STOPRIS</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>STARTRIS</name>
|
|
<description>STARTRIS</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DATARIS</name>
|
|
<description>DATARIS</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SMIS</name>
|
|
<description>Slave Masked Interrupt Status
|
|
This register show which interrupt is active (based on result from SRIS and SIMR).</description>
|
|
<addressOffset>20</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>STOPMIS</name>
|
|
<description>STOPMIS</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>STARTMIS</name>
|
|
<description>STARTMIS</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DATAMIS</name>
|
|
<description>DATAMIS</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SICR</name>
|
|
<description>Slave Interrupt Clear
|
|
This register clears the raw interrupt SRIS.</description>
|
|
<addressOffset>24</addressOffset>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>STOPIC</name>
|
|
<description>STOPIC</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>STARTIC</name>
|
|
<description>STARTIC</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DATAIC</name>
|
|
<description>DATAIC</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>MSA</name>
|
|
<description>Master Salve Address
|
|
This register contains seven address bits of the slave to be accessed by the master (a6-a0), and an RS bit determining if the next operation is a receive or transmit.</description>
|
|
<addressOffset>2048</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SA</name>
|
|
<description>SA</description>
|
|
<bitRange>[7:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RS</name>
|
|
<description>RS</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>MSTAT</name>
|
|
<description>Master Status
|
|
|
|
</description>
|
|
<addressOffset>2052</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000020</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>BUSBSY</name>
|
|
<description>BUSBSY</description>
|
|
<bitRange>[6:6]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IDLE</name>
|
|
<description>IDLE</description>
|
|
<bitRange>[5:5]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>ARBLST</name>
|
|
<description>ARBLST</description>
|
|
<bitRange>[4:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DATACK_N</name>
|
|
<description>DATACK_N</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>ADRACK_N</name>
|
|
<description>ADRACK_N</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>ERR</name>
|
|
<description>ERR</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>BUSY</name>
|
|
<description>BUSY</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>MCTRL</name>
|
|
<description>Master Control
|
|
|
|
This register accesses status bits when read and control bits when written. When read, the status register indicates the state of the I2C bus controller as stated in MSTAT. When written, the control register configures the I2C controller operation.
|
|
|
|
To generate a single transmit cycle, the I2C Master Slave Address (MSA) register is written with the desired address, the MSA.RS bit is cleared, and this register is written with
|
|
* ACK=X (0 or 1),
|
|
* STOP=1,
|
|
* START=1,
|
|
* RUN=1
|
|
to perform the operation and stop.
|
|
When the operation is completed (or aborted due an error), an interrupt becomes active and the data may be read from the MDR register. </description>
|
|
<addressOffset>2052</addressOffset>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>ACK</name>
|
|
<description>ACK</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>STOP</name>
|
|
<description>STOP</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>START</name>
|
|
<description>START</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RUN</name>
|
|
<description>RUN</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
<alternateRegister>MSTAT</alternateRegister></register>
|
|
<register>
|
|
<name>MDR</name>
|
|
<description>Master Data
|
|
This register contains the data to be transmitted when in the Master Transmit state and the data received when in the Master Receive state.</description>
|
|
<addressOffset>2056</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DATA</name>
|
|
<description>DATA</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>MTPR</name>
|
|
<description>I2C Master Timer Period
|
|
This register specifies the period of the SCL clock.</description>
|
|
<addressOffset>2060</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TPR_7</name>
|
|
<description>TPR_7</description>
|
|
<bitRange>[7:7]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TPR</name>
|
|
<description>TPR</description>
|
|
<bitRange>[6:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>MIMR</name>
|
|
<description>Master Interrupt Mask
|
|
This register controls whether a raw interrupt is promoted to a controller interrupt.</description>
|
|
<addressOffset>2064</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IM</name>
|
|
<description>IM</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>MRIS</name>
|
|
<description>Master Raw Interrupt Status
|
|
This register show the unmasked interrupt status.</description>
|
|
<addressOffset>2068</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>RIS</name>
|
|
<description>RIS</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>MMIS</name>
|
|
<description>Master Masked Interrupt Status
|
|
This register show which interrupt is active (based on result from MRIS and MIMR).</description>
|
|
<addressOffset>2072</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>MIS</name>
|
|
<description>MIS</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>MICR</name>
|
|
<description>Master Interrupt Clear
|
|
This register clears the raw and masked interrupt.</description>
|
|
<addressOffset>2076</addressOffset>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IC</name>
|
|
<description>IC</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>MCR</name>
|
|
<description>Master Configuration
|
|
This register configures the mode (Master or Slave) and sets the interface for test mode loopback.</description>
|
|
<addressOffset>2080</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SFE</name>
|
|
<description>SFE</description>
|
|
<bitRange>[5:5]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>MFE</name>
|
|
<description>MFE</description>
|
|
<bitRange>[4:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>LPBK</name>
|
|
<description>LPBK</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral><peripheral>
|
|
<name>I2S0</name>
|
|
<description>I2S Audio DMA module supporting formats I2S, LJF, RJF and DSP
|
|
|
|
</description>
|
|
<baseAddress>0x40021000</baseAddress>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x1000</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<registers>
|
|
<register>
|
|
<name>AIFWCLKSRC</name>
|
|
<description>WCLK Source Selection</description>
|
|
<addressOffset>0</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>WCLK_INV</name>
|
|
<description>WCLK_INV</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WCLK_SRC</name>
|
|
<description>WCLK_SRC</description>
|
|
<bitRange>[1:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>AIFDMACFG</name>
|
|
<description>DMA Buffer Size Configuration</description>
|
|
<addressOffset>4</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>END_FRAME_IDX</name>
|
|
<description>END_FRAME_IDX</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>AIFDIRCFG</name>
|
|
<description>Pin Direction</description>
|
|
<addressOffset>8</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>AD2</name>
|
|
<description>AD2</description>
|
|
<bitRange>[9:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>AD1</name>
|
|
<description>AD1</description>
|
|
<bitRange>[5:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>AD0</name>
|
|
<description>AD0</description>
|
|
<bitRange>[1:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>AIFFMTCFG</name>
|
|
<description>Serial Interface Format Configuration</description>
|
|
<addressOffset>12</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000170</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DATA_DELAY</name>
|
|
<description>DATA_DELAY</description>
|
|
<bitRange>[15:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>MEM_LEN_24</name>
|
|
<description>MEM_LEN_24</description>
|
|
<bitRange>[7:7]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SMPL_EDGE</name>
|
|
<description>SMPL_EDGE</description>
|
|
<bitRange>[6:6]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DUAL_PHASE</name>
|
|
<description>DUAL_PHASE</description>
|
|
<bitRange>[5:5]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WORD_LEN</name>
|
|
<description>WORD_LEN</description>
|
|
<bitRange>[4:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>AIFWMASK0</name>
|
|
<description>Word Selection Bit Mask for Pin 0</description>
|
|
<addressOffset>16</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000003</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>MASK</name>
|
|
<description>MASK</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>AIFWMASK1</name>
|
|
<description>Word Selection Bit Mask for Pin 1</description>
|
|
<addressOffset>20</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000003</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>MASK</name>
|
|
<description>MASK</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>AIFWMASK2</name>
|
|
<description>Word Selection Bit Mask for Pin 2
|
|
|
|
</description>
|
|
<addressOffset>24</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000003</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>MASK</name>
|
|
<description>MASK</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>AIFPWMVALUE</name>
|
|
<description>Audio Interface PWM Debug Value</description>
|
|
<addressOffset>28</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>PULSE_WIDTH</name>
|
|
<description>PULSE_WIDTH</description>
|
|
<bitRange>[15:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>AIFINPTRNEXT</name>
|
|
<description>DMA Input Buffer Next Pointer</description>
|
|
<addressOffset>32</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>PTR</name>
|
|
<description>PTR</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>AIFINPTR</name>
|
|
<description>DMA Input Buffer Current Pointer</description>
|
|
<addressOffset>36</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>PTR</name>
|
|
<description>PTR</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>AIFOUTPTRNEXT</name>
|
|
<description>DMA Output Buffer Next Pointer</description>
|
|
<addressOffset>40</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>PTR</name>
|
|
<description>PTR</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>AIFOUTPTR</name>
|
|
<description>DMA Output Buffer Current Pointer</description>
|
|
<addressOffset>44</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>PTR</name>
|
|
<description>PTR</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>STMPCTL</name>
|
|
<description>SampleStaMP Generator Control Register</description>
|
|
<addressOffset>52</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>OUT_RDY</name>
|
|
<description>OUT_RDY</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IN_RDY</name>
|
|
<description>IN_RDY</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>STMP_EN</name>
|
|
<description>STMP_EN</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>STMPXCNTCAPT0</name>
|
|
<description>Captured XOSC Counter Value, Capture Channel 0</description>
|
|
<addressOffset>56</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CAPT_VALUE</name>
|
|
<description>CAPT_VALUE</description>
|
|
<bitRange>[15:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>STMPXPER</name>
|
|
<description>XOSC Period Value</description>
|
|
<addressOffset>60</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>VALUE</name>
|
|
<description>VALUE</description>
|
|
<bitRange>[15:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>STMPWCNTCAPT0</name>
|
|
<description>Captured WCLK Counter Value, Capture Channel 0</description>
|
|
<addressOffset>64</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CAPT_VALUE</name>
|
|
<description>CAPT_VALUE</description>
|
|
<bitRange>[15:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>STMPWPER</name>
|
|
<description>WCLK Counter Period Value</description>
|
|
<addressOffset>68</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>VALUE</name>
|
|
<description>VALUE</description>
|
|
<bitRange>[15:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>STMPINTRIG</name>
|
|
<description>WCLK Counter Trigger Value for Input Pins</description>
|
|
<addressOffset>72</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IN_START_WCNT</name>
|
|
<description>IN_START_WCNT</description>
|
|
<bitRange>[15:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>STMPOUTTRIG</name>
|
|
<description>WCLK Counter Trigger Value for Output Pins</description>
|
|
<addressOffset>76</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>OUT_START_WCNT</name>
|
|
<description>OUT_START_WCNT</description>
|
|
<bitRange>[15:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>STMPWSET</name>
|
|
<description>WCLK Counter Set Operation</description>
|
|
<addressOffset>80</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>VALUE</name>
|
|
<description>VALUE</description>
|
|
<bitRange>[15:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>STMPWADD</name>
|
|
<description>WCLK Counter Add Operation</description>
|
|
<addressOffset>84</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>VALUE_INC</name>
|
|
<description>VALUE_INC</description>
|
|
<bitRange>[15:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>STMPXPERMIN</name>
|
|
<description>XOSC Minimum Period Value
|
|
Minimum Value of STMPXPER</description>
|
|
<addressOffset>88</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000ffff</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>VALUE</name>
|
|
<description>VALUE</description>
|
|
<bitRange>[15:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>STMPWCNT</name>
|
|
<description>Current Value of WCNT</description>
|
|
<addressOffset>92</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CURR_VALUE</name>
|
|
<description>CURR_VALUE</description>
|
|
<bitRange>[15:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>STMPXCNT</name>
|
|
<description>Current Value of XCNT</description>
|
|
<addressOffset>96</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CURR_VALUE</name>
|
|
<description>CURR_VALUE</description>
|
|
<bitRange>[15:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>STMPXCNTCAPT1</name>
|
|
<description>Captured XOSC Counter Value, Capture Channel 1</description>
|
|
<addressOffset>100</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CAPT_VALUE</name>
|
|
<description>CAPT_VALUE</description>
|
|
<bitRange>[15:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>STMPWCNTCAPT1</name>
|
|
<description>Captured WCLK Counter Value, Capture Channel 1</description>
|
|
<addressOffset>104</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CAPT_VALUE</name>
|
|
<description>CAPT_VALUE</description>
|
|
<bitRange>[15:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IRQMASK</name>
|
|
<description>Masked Interrupt Status Register</description>
|
|
<addressOffset>112</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>AIF_DMA_IN</name>
|
|
<description>AIF_DMA_IN</description>
|
|
<bitRange>[5:5]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>AIF_DMA_OUT</name>
|
|
<description>AIF_DMA_OUT</description>
|
|
<bitRange>[4:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WCLK_TIMEOUT</name>
|
|
<description>WCLK_TIMEOUT</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>BUS_ERR</name>
|
|
<description>BUS_ERR</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WCLK_ERR</name>
|
|
<description>WCLK_ERR</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PTR_ERR</name>
|
|
<description>PTR_ERR</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IRQFLAGS</name>
|
|
<description>Raw Interrupt Status Register</description>
|
|
<addressOffset>116</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>AIF_DMA_IN</name>
|
|
<description>AIF_DMA_IN</description>
|
|
<bitRange>[5:5]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>AIF_DMA_OUT</name>
|
|
<description>AIF_DMA_OUT</description>
|
|
<bitRange>[4:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WCLK_TIMEOUT</name>
|
|
<description>WCLK_TIMEOUT</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>BUS_ERR</name>
|
|
<description>BUS_ERR</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WCLK_ERR</name>
|
|
<description>WCLK_ERR</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PTR_ERR</name>
|
|
<description>PTR_ERR</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IRQSET</name>
|
|
<description>Interrupt Set Register</description>
|
|
<addressOffset>120</addressOffset>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>AIF_DMA_IN</name>
|
|
<description>AIF_DMA_IN</description>
|
|
<bitRange>[5:5]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>AIF_DMA_OUT</name>
|
|
<description>AIF_DMA_OUT</description>
|
|
<bitRange>[4:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WCLK_TIMEOUT</name>
|
|
<description>WCLK_TIMEOUT</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>BUS_ERR</name>
|
|
<description>BUS_ERR</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WCLK_ERR</name>
|
|
<description>WCLK_ERR</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PTR_ERR</name>
|
|
<description>PTR_ERR</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IRQCLR</name>
|
|
<description>Interrupt Clear Register</description>
|
|
<addressOffset>124</addressOffset>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>AIF_DMA_IN</name>
|
|
<description>AIF_DMA_IN</description>
|
|
<bitRange>[5:5]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>AIF_DMA_OUT</name>
|
|
<description>AIF_DMA_OUT</description>
|
|
<bitRange>[4:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WCLK_TIMEOUT</name>
|
|
<description>WCLK_TIMEOUT</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>BUS_ERR</name>
|
|
<description>BUS_ERR</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WCLK_ERR</name>
|
|
<description>WCLK_ERR</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PTR_ERR</name>
|
|
<description>PTR_ERR</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral><peripheral>
|
|
<name>IOC</name>
|
|
<description>IO Controller (IOC) - configures all the DIOs and resides in the MCU domain.
|
|
|
|
</description>
|
|
<baseAddress>0x40081000</baseAddress>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x1000</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<registers>
|
|
<register>
|
|
<name>IOCFG0</name>
|
|
<description>Configuration of DIO0</description>
|
|
<addressOffset>0</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00006000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>HYST_EN</name>
|
|
<description>HYST_EN</description>
|
|
<bitRange>[30:30]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitRange>[29:29]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WU_CFG</name>
|
|
<description>WU_CFG</description>
|
|
<bitRange>[28:27]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOMODE</name>
|
|
<description>IOMODE</description>
|
|
<bitRange>[26:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EDGE_IRQ_EN</name>
|
|
<description>EDGE_IRQ_EN</description>
|
|
<bitRange>[18:18]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EDGE_DET</name>
|
|
<description>EDGE_DET</description>
|
|
<bitRange>[17:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PULL_CTL</name>
|
|
<description>PULL_CTL</description>
|
|
<bitRange>[14:13]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SLEW_RED</name>
|
|
<description>SLEW_RED</description>
|
|
<bitRange>[12:12]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOCURR</name>
|
|
<description>IOCURR</description>
|
|
<bitRange>[11:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOSTR</name>
|
|
<description>IOSTR</description>
|
|
<bitRange>[9:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PORT_ID</name>
|
|
<description>PORT_ID</description>
|
|
<bitRange>[5:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IOCFG1</name>
|
|
<description>Configuration of DIO1</description>
|
|
<addressOffset>4</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00006000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>HYST_EN</name>
|
|
<description>HYST_EN</description>
|
|
<bitRange>[30:30]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitRange>[29:29]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WU_CFG</name>
|
|
<description>WU_CFG</description>
|
|
<bitRange>[28:27]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOMODE</name>
|
|
<description>IOMODE</description>
|
|
<bitRange>[26:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EDGE_IRQ_EN</name>
|
|
<description>EDGE_IRQ_EN</description>
|
|
<bitRange>[18:18]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EDGE_DET</name>
|
|
<description>EDGE_DET</description>
|
|
<bitRange>[17:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PULL_CTL</name>
|
|
<description>PULL_CTL</description>
|
|
<bitRange>[14:13]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SLEW_RED</name>
|
|
<description>SLEW_RED</description>
|
|
<bitRange>[12:12]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOCURR</name>
|
|
<description>IOCURR</description>
|
|
<bitRange>[11:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOSTR</name>
|
|
<description>IOSTR</description>
|
|
<bitRange>[9:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PORT_ID</name>
|
|
<description>PORT_ID</description>
|
|
<bitRange>[5:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IOCFG2</name>
|
|
<description>Configuration of DIO2</description>
|
|
<addressOffset>8</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00006000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>HYST_EN</name>
|
|
<description>HYST_EN</description>
|
|
<bitRange>[30:30]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitRange>[29:29]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WU_CFG</name>
|
|
<description>WU_CFG</description>
|
|
<bitRange>[28:27]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOMODE</name>
|
|
<description>IOMODE</description>
|
|
<bitRange>[26:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EDGE_IRQ_EN</name>
|
|
<description>EDGE_IRQ_EN</description>
|
|
<bitRange>[18:18]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EDGE_DET</name>
|
|
<description>EDGE_DET</description>
|
|
<bitRange>[17:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PULL_CTL</name>
|
|
<description>PULL_CTL</description>
|
|
<bitRange>[14:13]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SLEW_RED</name>
|
|
<description>SLEW_RED</description>
|
|
<bitRange>[12:12]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOCURR</name>
|
|
<description>IOCURR</description>
|
|
<bitRange>[11:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOSTR</name>
|
|
<description>IOSTR</description>
|
|
<bitRange>[9:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PORT_ID</name>
|
|
<description>PORT_ID</description>
|
|
<bitRange>[5:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IOCFG3</name>
|
|
<description>Configuration of DIO3</description>
|
|
<addressOffset>12</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00006000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>HYST_EN</name>
|
|
<description>HYST_EN</description>
|
|
<bitRange>[30:30]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitRange>[29:29]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WU_CFG</name>
|
|
<description>WU_CFG</description>
|
|
<bitRange>[28:27]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOMODE</name>
|
|
<description>IOMODE</description>
|
|
<bitRange>[26:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EDGE_IRQ_EN</name>
|
|
<description>EDGE_IRQ_EN</description>
|
|
<bitRange>[18:18]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EDGE_DET</name>
|
|
<description>EDGE_DET</description>
|
|
<bitRange>[17:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PULL_CTL</name>
|
|
<description>PULL_CTL</description>
|
|
<bitRange>[14:13]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SLEW_RED</name>
|
|
<description>SLEW_RED</description>
|
|
<bitRange>[12:12]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOCURR</name>
|
|
<description>IOCURR</description>
|
|
<bitRange>[11:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOSTR</name>
|
|
<description>IOSTR</description>
|
|
<bitRange>[9:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PORT_ID</name>
|
|
<description>PORT_ID</description>
|
|
<bitRange>[5:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IOCFG4</name>
|
|
<description>Configuration of DIO4</description>
|
|
<addressOffset>16</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00006000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>HYST_EN</name>
|
|
<description>HYST_EN</description>
|
|
<bitRange>[30:30]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitRange>[29:29]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WU_CFG</name>
|
|
<description>WU_CFG</description>
|
|
<bitRange>[28:27]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOMODE</name>
|
|
<description>IOMODE</description>
|
|
<bitRange>[26:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EDGE_IRQ_EN</name>
|
|
<description>EDGE_IRQ_EN</description>
|
|
<bitRange>[18:18]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EDGE_DET</name>
|
|
<description>EDGE_DET</description>
|
|
<bitRange>[17:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PULL_CTL</name>
|
|
<description>PULL_CTL</description>
|
|
<bitRange>[14:13]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SLEW_RED</name>
|
|
<description>SLEW_RED</description>
|
|
<bitRange>[12:12]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOCURR</name>
|
|
<description>IOCURR</description>
|
|
<bitRange>[11:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOSTR</name>
|
|
<description>IOSTR</description>
|
|
<bitRange>[9:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PORT_ID</name>
|
|
<description>PORT_ID</description>
|
|
<bitRange>[5:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IOCFG5</name>
|
|
<description>Configuration of DIO5</description>
|
|
<addressOffset>20</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00006000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>HYST_EN</name>
|
|
<description>HYST_EN</description>
|
|
<bitRange>[30:30]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitRange>[29:29]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WU_CFG</name>
|
|
<description>WU_CFG</description>
|
|
<bitRange>[28:27]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOMODE</name>
|
|
<description>IOMODE</description>
|
|
<bitRange>[26:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EDGE_IRQ_EN</name>
|
|
<description>EDGE_IRQ_EN</description>
|
|
<bitRange>[18:18]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EDGE_DET</name>
|
|
<description>EDGE_DET</description>
|
|
<bitRange>[17:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PULL_CTL</name>
|
|
<description>PULL_CTL</description>
|
|
<bitRange>[14:13]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SLEW_RED</name>
|
|
<description>SLEW_RED</description>
|
|
<bitRange>[12:12]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOCURR</name>
|
|
<description>IOCURR</description>
|
|
<bitRange>[11:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOSTR</name>
|
|
<description>IOSTR</description>
|
|
<bitRange>[9:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PORT_ID</name>
|
|
<description>PORT_ID</description>
|
|
<bitRange>[5:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IOCFG6</name>
|
|
<description>Configuration of DIO6</description>
|
|
<addressOffset>24</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00006000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>HYST_EN</name>
|
|
<description>HYST_EN</description>
|
|
<bitRange>[30:30]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitRange>[29:29]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WU_CFG</name>
|
|
<description>WU_CFG</description>
|
|
<bitRange>[28:27]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOMODE</name>
|
|
<description>IOMODE</description>
|
|
<bitRange>[26:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EDGE_IRQ_EN</name>
|
|
<description>EDGE_IRQ_EN</description>
|
|
<bitRange>[18:18]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EDGE_DET</name>
|
|
<description>EDGE_DET</description>
|
|
<bitRange>[17:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PULL_CTL</name>
|
|
<description>PULL_CTL</description>
|
|
<bitRange>[14:13]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SLEW_RED</name>
|
|
<description>SLEW_RED</description>
|
|
<bitRange>[12:12]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOCURR</name>
|
|
<description>IOCURR</description>
|
|
<bitRange>[11:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOSTR</name>
|
|
<description>IOSTR</description>
|
|
<bitRange>[9:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PORT_ID</name>
|
|
<description>PORT_ID</description>
|
|
<bitRange>[5:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IOCFG7</name>
|
|
<description>Configuration of DIO7</description>
|
|
<addressOffset>28</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00006000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>HYST_EN</name>
|
|
<description>HYST_EN</description>
|
|
<bitRange>[30:30]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitRange>[29:29]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WU_CFG</name>
|
|
<description>WU_CFG</description>
|
|
<bitRange>[28:27]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOMODE</name>
|
|
<description>IOMODE</description>
|
|
<bitRange>[26:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EDGE_IRQ_EN</name>
|
|
<description>EDGE_IRQ_EN</description>
|
|
<bitRange>[18:18]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EDGE_DET</name>
|
|
<description>EDGE_DET</description>
|
|
<bitRange>[17:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PULL_CTL</name>
|
|
<description>PULL_CTL</description>
|
|
<bitRange>[14:13]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SLEW_RED</name>
|
|
<description>SLEW_RED</description>
|
|
<bitRange>[12:12]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOCURR</name>
|
|
<description>IOCURR</description>
|
|
<bitRange>[11:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOSTR</name>
|
|
<description>IOSTR</description>
|
|
<bitRange>[9:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PORT_ID</name>
|
|
<description>PORT_ID</description>
|
|
<bitRange>[5:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IOCFG8</name>
|
|
<description>Configuration of DIO8</description>
|
|
<addressOffset>32</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00006000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>HYST_EN</name>
|
|
<description>HYST_EN</description>
|
|
<bitRange>[30:30]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitRange>[29:29]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WU_CFG</name>
|
|
<description>WU_CFG</description>
|
|
<bitRange>[28:27]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOMODE</name>
|
|
<description>IOMODE</description>
|
|
<bitRange>[26:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EDGE_IRQ_EN</name>
|
|
<description>EDGE_IRQ_EN</description>
|
|
<bitRange>[18:18]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EDGE_DET</name>
|
|
<description>EDGE_DET</description>
|
|
<bitRange>[17:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PULL_CTL</name>
|
|
<description>PULL_CTL</description>
|
|
<bitRange>[14:13]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SLEW_RED</name>
|
|
<description>SLEW_RED</description>
|
|
<bitRange>[12:12]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOCURR</name>
|
|
<description>IOCURR</description>
|
|
<bitRange>[11:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOSTR</name>
|
|
<description>IOSTR</description>
|
|
<bitRange>[9:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PORT_ID</name>
|
|
<description>PORT_ID</description>
|
|
<bitRange>[5:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IOCFG9</name>
|
|
<description>Configuration of DIO9</description>
|
|
<addressOffset>36</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00006000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>HYST_EN</name>
|
|
<description>HYST_EN</description>
|
|
<bitRange>[30:30]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitRange>[29:29]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WU_CFG</name>
|
|
<description>WU_CFG</description>
|
|
<bitRange>[28:27]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOMODE</name>
|
|
<description>IOMODE</description>
|
|
<bitRange>[26:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EDGE_IRQ_EN</name>
|
|
<description>EDGE_IRQ_EN</description>
|
|
<bitRange>[18:18]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EDGE_DET</name>
|
|
<description>EDGE_DET</description>
|
|
<bitRange>[17:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PULL_CTL</name>
|
|
<description>PULL_CTL</description>
|
|
<bitRange>[14:13]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SLEW_RED</name>
|
|
<description>SLEW_RED</description>
|
|
<bitRange>[12:12]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOCURR</name>
|
|
<description>IOCURR</description>
|
|
<bitRange>[11:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOSTR</name>
|
|
<description>IOSTR</description>
|
|
<bitRange>[9:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PORT_ID</name>
|
|
<description>PORT_ID</description>
|
|
<bitRange>[5:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IOCFG10</name>
|
|
<description>Configuration of DIO10</description>
|
|
<addressOffset>40</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00006000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>HYST_EN</name>
|
|
<description>HYST_EN</description>
|
|
<bitRange>[30:30]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitRange>[29:29]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WU_CFG</name>
|
|
<description>WU_CFG</description>
|
|
<bitRange>[28:27]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOMODE</name>
|
|
<description>IOMODE</description>
|
|
<bitRange>[26:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EDGE_IRQ_EN</name>
|
|
<description>EDGE_IRQ_EN</description>
|
|
<bitRange>[18:18]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EDGE_DET</name>
|
|
<description>EDGE_DET</description>
|
|
<bitRange>[17:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PULL_CTL</name>
|
|
<description>PULL_CTL</description>
|
|
<bitRange>[14:13]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SLEW_RED</name>
|
|
<description>SLEW_RED</description>
|
|
<bitRange>[12:12]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOCURR</name>
|
|
<description>IOCURR</description>
|
|
<bitRange>[11:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOSTR</name>
|
|
<description>IOSTR</description>
|
|
<bitRange>[9:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PORT_ID</name>
|
|
<description>PORT_ID</description>
|
|
<bitRange>[5:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IOCFG11</name>
|
|
<description>Configuration of DIO11</description>
|
|
<addressOffset>44</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00006000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>HYST_EN</name>
|
|
<description>HYST_EN</description>
|
|
<bitRange>[30:30]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitRange>[29:29]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WU_CFG</name>
|
|
<description>WU_CFG</description>
|
|
<bitRange>[28:27]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOMODE</name>
|
|
<description>IOMODE</description>
|
|
<bitRange>[26:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EDGE_IRQ_EN</name>
|
|
<description>EDGE_IRQ_EN</description>
|
|
<bitRange>[18:18]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EDGE_DET</name>
|
|
<description>EDGE_DET</description>
|
|
<bitRange>[17:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PULL_CTL</name>
|
|
<description>PULL_CTL</description>
|
|
<bitRange>[14:13]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SLEW_RED</name>
|
|
<description>SLEW_RED</description>
|
|
<bitRange>[12:12]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOCURR</name>
|
|
<description>IOCURR</description>
|
|
<bitRange>[11:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOSTR</name>
|
|
<description>IOSTR</description>
|
|
<bitRange>[9:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PORT_ID</name>
|
|
<description>PORT_ID</description>
|
|
<bitRange>[5:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IOCFG12</name>
|
|
<description>Configuration of DIO12</description>
|
|
<addressOffset>48</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00006000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>HYST_EN</name>
|
|
<description>HYST_EN</description>
|
|
<bitRange>[30:30]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitRange>[29:29]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WU_CFG</name>
|
|
<description>WU_CFG</description>
|
|
<bitRange>[28:27]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOMODE</name>
|
|
<description>IOMODE</description>
|
|
<bitRange>[26:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EDGE_IRQ_EN</name>
|
|
<description>EDGE_IRQ_EN</description>
|
|
<bitRange>[18:18]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EDGE_DET</name>
|
|
<description>EDGE_DET</description>
|
|
<bitRange>[17:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PULL_CTL</name>
|
|
<description>PULL_CTL</description>
|
|
<bitRange>[14:13]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SLEW_RED</name>
|
|
<description>SLEW_RED</description>
|
|
<bitRange>[12:12]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOCURR</name>
|
|
<description>IOCURR</description>
|
|
<bitRange>[11:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOSTR</name>
|
|
<description>IOSTR</description>
|
|
<bitRange>[9:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PORT_ID</name>
|
|
<description>PORT_ID</description>
|
|
<bitRange>[5:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IOCFG13</name>
|
|
<description>Configuration of DIO13</description>
|
|
<addressOffset>52</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00006000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>HYST_EN</name>
|
|
<description>HYST_EN</description>
|
|
<bitRange>[30:30]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitRange>[29:29]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WU_CFG</name>
|
|
<description>WU_CFG</description>
|
|
<bitRange>[28:27]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOMODE</name>
|
|
<description>IOMODE</description>
|
|
<bitRange>[26:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EDGE_IRQ_EN</name>
|
|
<description>EDGE_IRQ_EN</description>
|
|
<bitRange>[18:18]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EDGE_DET</name>
|
|
<description>EDGE_DET</description>
|
|
<bitRange>[17:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PULL_CTL</name>
|
|
<description>PULL_CTL</description>
|
|
<bitRange>[14:13]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SLEW_RED</name>
|
|
<description>SLEW_RED</description>
|
|
<bitRange>[12:12]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOCURR</name>
|
|
<description>IOCURR</description>
|
|
<bitRange>[11:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOSTR</name>
|
|
<description>IOSTR</description>
|
|
<bitRange>[9:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PORT_ID</name>
|
|
<description>PORT_ID</description>
|
|
<bitRange>[5:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IOCFG14</name>
|
|
<description>Configuration of DIO14</description>
|
|
<addressOffset>56</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00006000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>HYST_EN</name>
|
|
<description>HYST_EN</description>
|
|
<bitRange>[30:30]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitRange>[29:29]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WU_CFG</name>
|
|
<description>WU_CFG</description>
|
|
<bitRange>[28:27]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOMODE</name>
|
|
<description>IOMODE</description>
|
|
<bitRange>[26:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EDGE_IRQ_EN</name>
|
|
<description>EDGE_IRQ_EN</description>
|
|
<bitRange>[18:18]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EDGE_DET</name>
|
|
<description>EDGE_DET</description>
|
|
<bitRange>[17:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PULL_CTL</name>
|
|
<description>PULL_CTL</description>
|
|
<bitRange>[14:13]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SLEW_RED</name>
|
|
<description>SLEW_RED</description>
|
|
<bitRange>[12:12]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOCURR</name>
|
|
<description>IOCURR</description>
|
|
<bitRange>[11:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOSTR</name>
|
|
<description>IOSTR</description>
|
|
<bitRange>[9:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PORT_ID</name>
|
|
<description>PORT_ID</description>
|
|
<bitRange>[5:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IOCFG15</name>
|
|
<description>Configuration of DIO15</description>
|
|
<addressOffset>60</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00006000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>HYST_EN</name>
|
|
<description>HYST_EN</description>
|
|
<bitRange>[30:30]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitRange>[29:29]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WU_CFG</name>
|
|
<description>WU_CFG</description>
|
|
<bitRange>[28:27]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOMODE</name>
|
|
<description>IOMODE</description>
|
|
<bitRange>[26:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EDGE_IRQ_EN</name>
|
|
<description>EDGE_IRQ_EN</description>
|
|
<bitRange>[18:18]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EDGE_DET</name>
|
|
<description>EDGE_DET</description>
|
|
<bitRange>[17:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PULL_CTL</name>
|
|
<description>PULL_CTL</description>
|
|
<bitRange>[14:13]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SLEW_RED</name>
|
|
<description>SLEW_RED</description>
|
|
<bitRange>[12:12]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOCURR</name>
|
|
<description>IOCURR</description>
|
|
<bitRange>[11:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOSTR</name>
|
|
<description>IOSTR</description>
|
|
<bitRange>[9:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PORT_ID</name>
|
|
<description>PORT_ID</description>
|
|
<bitRange>[5:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IOCFG16</name>
|
|
<description>Configuration of DIO16</description>
|
|
<addressOffset>64</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00086000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>HYST_EN</name>
|
|
<description>HYST_EN</description>
|
|
<bitRange>[30:30]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitRange>[29:29]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WU_CFG</name>
|
|
<description>WU_CFG</description>
|
|
<bitRange>[28:27]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOMODE</name>
|
|
<description>IOMODE</description>
|
|
<bitRange>[26:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EDGE_IRQ_EN</name>
|
|
<description>EDGE_IRQ_EN</description>
|
|
<bitRange>[18:18]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EDGE_DET</name>
|
|
<description>EDGE_DET</description>
|
|
<bitRange>[17:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PULL_CTL</name>
|
|
<description>PULL_CTL</description>
|
|
<bitRange>[14:13]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SLEW_RED</name>
|
|
<description>SLEW_RED</description>
|
|
<bitRange>[12:12]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOCURR</name>
|
|
<description>IOCURR</description>
|
|
<bitRange>[11:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOSTR</name>
|
|
<description>IOSTR</description>
|
|
<bitRange>[9:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PORT_ID</name>
|
|
<description>PORT_ID</description>
|
|
<bitRange>[5:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IOCFG17</name>
|
|
<description>Configuration of DIO17</description>
|
|
<addressOffset>68</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x8000006000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>HYST_EN</name>
|
|
<description>HYST_EN</description>
|
|
<bitRange>[30:30]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitRange>[29:29]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WU_CFG</name>
|
|
<description>WU_CFG</description>
|
|
<bitRange>[28:27]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOMODE</name>
|
|
<description>IOMODE</description>
|
|
<bitRange>[26:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EDGE_IRQ_EN</name>
|
|
<description>EDGE_IRQ_EN</description>
|
|
<bitRange>[18:18]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EDGE_DET</name>
|
|
<description>EDGE_DET</description>
|
|
<bitRange>[17:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PULL_CTL</name>
|
|
<description>PULL_CTL</description>
|
|
<bitRange>[14:13]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SLEW_RED</name>
|
|
<description>SLEW_RED</description>
|
|
<bitRange>[12:12]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOCURR</name>
|
|
<description>IOCURR</description>
|
|
<bitRange>[11:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOSTR</name>
|
|
<description>IOSTR</description>
|
|
<bitRange>[9:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PORT_ID</name>
|
|
<description>PORT_ID</description>
|
|
<bitRange>[5:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IOCFG18</name>
|
|
<description>Configuration of DIO18</description>
|
|
<addressOffset>72</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00006000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>HYST_EN</name>
|
|
<description>HYST_EN</description>
|
|
<bitRange>[30:30]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitRange>[29:29]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WU_CFG</name>
|
|
<description>WU_CFG</description>
|
|
<bitRange>[28:27]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOMODE</name>
|
|
<description>IOMODE</description>
|
|
<bitRange>[26:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EDGE_IRQ_EN</name>
|
|
<description>EDGE_IRQ_EN</description>
|
|
<bitRange>[18:18]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EDGE_DET</name>
|
|
<description>EDGE_DET</description>
|
|
<bitRange>[17:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PULL_CTL</name>
|
|
<description>PULL_CTL</description>
|
|
<bitRange>[14:13]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SLEW_RED</name>
|
|
<description>SLEW_RED</description>
|
|
<bitRange>[12:12]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOCURR</name>
|
|
<description>IOCURR</description>
|
|
<bitRange>[11:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOSTR</name>
|
|
<description>IOSTR</description>
|
|
<bitRange>[9:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PORT_ID</name>
|
|
<description>PORT_ID</description>
|
|
<bitRange>[5:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IOCFG19</name>
|
|
<description>Configuration of DIO19</description>
|
|
<addressOffset>76</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00006000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>HYST_EN</name>
|
|
<description>HYST_EN</description>
|
|
<bitRange>[30:30]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitRange>[29:29]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WU_CFG</name>
|
|
<description>WU_CFG</description>
|
|
<bitRange>[28:27]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOMODE</name>
|
|
<description>IOMODE</description>
|
|
<bitRange>[26:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EDGE_IRQ_EN</name>
|
|
<description>EDGE_IRQ_EN</description>
|
|
<bitRange>[18:18]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EDGE_DET</name>
|
|
<description>EDGE_DET</description>
|
|
<bitRange>[17:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PULL_CTL</name>
|
|
<description>PULL_CTL</description>
|
|
<bitRange>[14:13]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SLEW_RED</name>
|
|
<description>SLEW_RED</description>
|
|
<bitRange>[12:12]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOCURR</name>
|
|
<description>IOCURR</description>
|
|
<bitRange>[11:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOSTR</name>
|
|
<description>IOSTR</description>
|
|
<bitRange>[9:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PORT_ID</name>
|
|
<description>PORT_ID</description>
|
|
<bitRange>[5:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IOCFG20</name>
|
|
<description>Configuration of DIO20</description>
|
|
<addressOffset>80</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00006000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>HYST_EN</name>
|
|
<description>HYST_EN</description>
|
|
<bitRange>[30:30]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitRange>[29:29]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WU_CFG</name>
|
|
<description>WU_CFG</description>
|
|
<bitRange>[28:27]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOMODE</name>
|
|
<description>IOMODE</description>
|
|
<bitRange>[26:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EDGE_IRQ_EN</name>
|
|
<description>EDGE_IRQ_EN</description>
|
|
<bitRange>[18:18]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EDGE_DET</name>
|
|
<description>EDGE_DET</description>
|
|
<bitRange>[17:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PULL_CTL</name>
|
|
<description>PULL_CTL</description>
|
|
<bitRange>[14:13]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SLEW_RED</name>
|
|
<description>SLEW_RED</description>
|
|
<bitRange>[12:12]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOCURR</name>
|
|
<description>IOCURR</description>
|
|
<bitRange>[11:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOSTR</name>
|
|
<description>IOSTR</description>
|
|
<bitRange>[9:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PORT_ID</name>
|
|
<description>PORT_ID</description>
|
|
<bitRange>[5:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IOCFG21</name>
|
|
<description>Configuration of DIO21</description>
|
|
<addressOffset>84</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00006000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>HYST_EN</name>
|
|
<description>HYST_EN</description>
|
|
<bitRange>[30:30]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitRange>[29:29]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WU_CFG</name>
|
|
<description>WU_CFG</description>
|
|
<bitRange>[28:27]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOMODE</name>
|
|
<description>IOMODE</description>
|
|
<bitRange>[26:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EDGE_IRQ_EN</name>
|
|
<description>EDGE_IRQ_EN</description>
|
|
<bitRange>[18:18]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EDGE_DET</name>
|
|
<description>EDGE_DET</description>
|
|
<bitRange>[17:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PULL_CTL</name>
|
|
<description>PULL_CTL</description>
|
|
<bitRange>[14:13]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SLEW_RED</name>
|
|
<description>SLEW_RED</description>
|
|
<bitRange>[12:12]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOCURR</name>
|
|
<description>IOCURR</description>
|
|
<bitRange>[11:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOSTR</name>
|
|
<description>IOSTR</description>
|
|
<bitRange>[9:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PORT_ID</name>
|
|
<description>PORT_ID</description>
|
|
<bitRange>[5:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IOCFG22</name>
|
|
<description>Configuration of DIO22</description>
|
|
<addressOffset>88</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00006000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>HYST_EN</name>
|
|
<description>HYST_EN</description>
|
|
<bitRange>[30:30]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitRange>[29:29]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WU_CFG</name>
|
|
<description>WU_CFG</description>
|
|
<bitRange>[28:27]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOMODE</name>
|
|
<description>IOMODE</description>
|
|
<bitRange>[26:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EDGE_IRQ_EN</name>
|
|
<description>EDGE_IRQ_EN</description>
|
|
<bitRange>[18:18]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EDGE_DET</name>
|
|
<description>EDGE_DET</description>
|
|
<bitRange>[17:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PULL_CTL</name>
|
|
<description>PULL_CTL</description>
|
|
<bitRange>[14:13]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SLEW_RED</name>
|
|
<description>SLEW_RED</description>
|
|
<bitRange>[12:12]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOCURR</name>
|
|
<description>IOCURR</description>
|
|
<bitRange>[11:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOSTR</name>
|
|
<description>IOSTR</description>
|
|
<bitRange>[9:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PORT_ID</name>
|
|
<description>PORT_ID</description>
|
|
<bitRange>[5:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IOCFG23</name>
|
|
<description>Configuration of DIO23</description>
|
|
<addressOffset>92</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00006000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>HYST_EN</name>
|
|
<description>HYST_EN</description>
|
|
<bitRange>[30:30]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitRange>[29:29]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WU_CFG</name>
|
|
<description>WU_CFG</description>
|
|
<bitRange>[28:27]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOMODE</name>
|
|
<description>IOMODE</description>
|
|
<bitRange>[26:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EDGE_IRQ_EN</name>
|
|
<description>EDGE_IRQ_EN</description>
|
|
<bitRange>[18:18]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EDGE_DET</name>
|
|
<description>EDGE_DET</description>
|
|
<bitRange>[17:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PULL_CTL</name>
|
|
<description>PULL_CTL</description>
|
|
<bitRange>[14:13]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SLEW_RED</name>
|
|
<description>SLEW_RED</description>
|
|
<bitRange>[12:12]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOCURR</name>
|
|
<description>IOCURR</description>
|
|
<bitRange>[11:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOSTR</name>
|
|
<description>IOSTR</description>
|
|
<bitRange>[9:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PORT_ID</name>
|
|
<description>PORT_ID</description>
|
|
<bitRange>[5:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IOCFG24</name>
|
|
<description>Configuration of DIO24</description>
|
|
<addressOffset>96</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00006000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>HYST_EN</name>
|
|
<description>HYST_EN</description>
|
|
<bitRange>[30:30]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitRange>[29:29]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WU_CFG</name>
|
|
<description>WU_CFG</description>
|
|
<bitRange>[28:27]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOMODE</name>
|
|
<description>IOMODE</description>
|
|
<bitRange>[26:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EDGE_IRQ_EN</name>
|
|
<description>EDGE_IRQ_EN</description>
|
|
<bitRange>[18:18]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EDGE_DET</name>
|
|
<description>EDGE_DET</description>
|
|
<bitRange>[17:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PULL_CTL</name>
|
|
<description>PULL_CTL</description>
|
|
<bitRange>[14:13]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SLEW_RED</name>
|
|
<description>SLEW_RED</description>
|
|
<bitRange>[12:12]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOCURR</name>
|
|
<description>IOCURR</description>
|
|
<bitRange>[11:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOSTR</name>
|
|
<description>IOSTR</description>
|
|
<bitRange>[9:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PORT_ID</name>
|
|
<description>PORT_ID</description>
|
|
<bitRange>[5:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IOCFG25</name>
|
|
<description>Configuration of DIO25</description>
|
|
<addressOffset>100</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00006000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>HYST_EN</name>
|
|
<description>HYST_EN</description>
|
|
<bitRange>[30:30]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitRange>[29:29]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WU_CFG</name>
|
|
<description>WU_CFG</description>
|
|
<bitRange>[28:27]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOMODE</name>
|
|
<description>IOMODE</description>
|
|
<bitRange>[26:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EDGE_IRQ_EN</name>
|
|
<description>EDGE_IRQ_EN</description>
|
|
<bitRange>[18:18]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EDGE_DET</name>
|
|
<description>EDGE_DET</description>
|
|
<bitRange>[17:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PULL_CTL</name>
|
|
<description>PULL_CTL</description>
|
|
<bitRange>[14:13]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SLEW_RED</name>
|
|
<description>SLEW_RED</description>
|
|
<bitRange>[12:12]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOCURR</name>
|
|
<description>IOCURR</description>
|
|
<bitRange>[11:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOSTR</name>
|
|
<description>IOSTR</description>
|
|
<bitRange>[9:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PORT_ID</name>
|
|
<description>PORT_ID</description>
|
|
<bitRange>[5:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IOCFG26</name>
|
|
<description>Configuration of DIO26</description>
|
|
<addressOffset>104</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00006000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>HYST_EN</name>
|
|
<description>HYST_EN</description>
|
|
<bitRange>[30:30]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitRange>[29:29]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WU_CFG</name>
|
|
<description>WU_CFG</description>
|
|
<bitRange>[28:27]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOMODE</name>
|
|
<description>IOMODE</description>
|
|
<bitRange>[26:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EDGE_IRQ_EN</name>
|
|
<description>EDGE_IRQ_EN</description>
|
|
<bitRange>[18:18]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EDGE_DET</name>
|
|
<description>EDGE_DET</description>
|
|
<bitRange>[17:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PULL_CTL</name>
|
|
<description>PULL_CTL</description>
|
|
<bitRange>[14:13]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SLEW_RED</name>
|
|
<description>SLEW_RED</description>
|
|
<bitRange>[12:12]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOCURR</name>
|
|
<description>IOCURR</description>
|
|
<bitRange>[11:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOSTR</name>
|
|
<description>IOSTR</description>
|
|
<bitRange>[9:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PORT_ID</name>
|
|
<description>PORT_ID</description>
|
|
<bitRange>[5:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IOCFG27</name>
|
|
<description>Configuration of DIO27</description>
|
|
<addressOffset>108</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00006000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>HYST_EN</name>
|
|
<description>HYST_EN</description>
|
|
<bitRange>[30:30]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitRange>[29:29]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WU_CFG</name>
|
|
<description>WU_CFG</description>
|
|
<bitRange>[28:27]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOMODE</name>
|
|
<description>IOMODE</description>
|
|
<bitRange>[26:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EDGE_IRQ_EN</name>
|
|
<description>EDGE_IRQ_EN</description>
|
|
<bitRange>[18:18]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EDGE_DET</name>
|
|
<description>EDGE_DET</description>
|
|
<bitRange>[17:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PULL_CTL</name>
|
|
<description>PULL_CTL</description>
|
|
<bitRange>[14:13]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SLEW_RED</name>
|
|
<description>SLEW_RED</description>
|
|
<bitRange>[12:12]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOCURR</name>
|
|
<description>IOCURR</description>
|
|
<bitRange>[11:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOSTR</name>
|
|
<description>IOSTR</description>
|
|
<bitRange>[9:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PORT_ID</name>
|
|
<description>PORT_ID</description>
|
|
<bitRange>[5:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IOCFG28</name>
|
|
<description>Configuration of DIO28</description>
|
|
<addressOffset>112</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00006000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>HYST_EN</name>
|
|
<description>HYST_EN</description>
|
|
<bitRange>[30:30]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitRange>[29:29]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WU_CFG</name>
|
|
<description>WU_CFG</description>
|
|
<bitRange>[28:27]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOMODE</name>
|
|
<description>IOMODE</description>
|
|
<bitRange>[26:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EDGE_IRQ_EN</name>
|
|
<description>EDGE_IRQ_EN</description>
|
|
<bitRange>[18:18]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EDGE_DET</name>
|
|
<description>EDGE_DET</description>
|
|
<bitRange>[17:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PULL_CTL</name>
|
|
<description>PULL_CTL</description>
|
|
<bitRange>[14:13]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SLEW_RED</name>
|
|
<description>SLEW_RED</description>
|
|
<bitRange>[12:12]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOCURR</name>
|
|
<description>IOCURR</description>
|
|
<bitRange>[11:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOSTR</name>
|
|
<description>IOSTR</description>
|
|
<bitRange>[9:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PORT_ID</name>
|
|
<description>PORT_ID</description>
|
|
<bitRange>[5:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IOCFG29</name>
|
|
<description>Configuration of DIO29</description>
|
|
<addressOffset>116</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00006000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>HYST_EN</name>
|
|
<description>HYST_EN</description>
|
|
<bitRange>[30:30]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitRange>[29:29]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WU_CFG</name>
|
|
<description>WU_CFG</description>
|
|
<bitRange>[28:27]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOMODE</name>
|
|
<description>IOMODE</description>
|
|
<bitRange>[26:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EDGE_IRQ_EN</name>
|
|
<description>EDGE_IRQ_EN</description>
|
|
<bitRange>[18:18]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EDGE_DET</name>
|
|
<description>EDGE_DET</description>
|
|
<bitRange>[17:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PULL_CTL</name>
|
|
<description>PULL_CTL</description>
|
|
<bitRange>[14:13]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SLEW_RED</name>
|
|
<description>SLEW_RED</description>
|
|
<bitRange>[12:12]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOCURR</name>
|
|
<description>IOCURR</description>
|
|
<bitRange>[11:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOSTR</name>
|
|
<description>IOSTR</description>
|
|
<bitRange>[9:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PORT_ID</name>
|
|
<description>PORT_ID</description>
|
|
<bitRange>[5:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IOCFG30</name>
|
|
<description>Configuration of DIO30</description>
|
|
<addressOffset>120</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00006000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>HYST_EN</name>
|
|
<description>HYST_EN</description>
|
|
<bitRange>[30:30]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitRange>[29:29]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WU_CFG</name>
|
|
<description>WU_CFG</description>
|
|
<bitRange>[28:27]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOMODE</name>
|
|
<description>IOMODE</description>
|
|
<bitRange>[26:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EDGE_IRQ_EN</name>
|
|
<description>EDGE_IRQ_EN</description>
|
|
<bitRange>[18:18]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EDGE_DET</name>
|
|
<description>EDGE_DET</description>
|
|
<bitRange>[17:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PULL_CTL</name>
|
|
<description>PULL_CTL</description>
|
|
<bitRange>[14:13]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SLEW_RED</name>
|
|
<description>SLEW_RED</description>
|
|
<bitRange>[12:12]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOCURR</name>
|
|
<description>IOCURR</description>
|
|
<bitRange>[11:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOSTR</name>
|
|
<description>IOSTR</description>
|
|
<bitRange>[9:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PORT_ID</name>
|
|
<description>PORT_ID</description>
|
|
<bitRange>[5:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IOCFG31</name>
|
|
<description>Configuration of DIO31</description>
|
|
<addressOffset>124</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00006000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>HYST_EN</name>
|
|
<description>HYST_EN</description>
|
|
<bitRange>[30:30]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IE</name>
|
|
<description>IE</description>
|
|
<bitRange>[29:29]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WU_CFG</name>
|
|
<description>WU_CFG</description>
|
|
<bitRange>[28:27]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOMODE</name>
|
|
<description>IOMODE</description>
|
|
<bitRange>[26:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EDGE_IRQ_EN</name>
|
|
<description>EDGE_IRQ_EN</description>
|
|
<bitRange>[18:18]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EDGE_DET</name>
|
|
<description>EDGE_DET</description>
|
|
<bitRange>[17:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PULL_CTL</name>
|
|
<description>PULL_CTL</description>
|
|
<bitRange>[14:13]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SLEW_RED</name>
|
|
<description>SLEW_RED</description>
|
|
<bitRange>[12:12]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOCURR</name>
|
|
<description>IOCURR</description>
|
|
<bitRange>[11:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IOSTR</name>
|
|
<description>IOSTR</description>
|
|
<bitRange>[9:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PORT_ID</name>
|
|
<description>PORT_ID</description>
|
|
<bitRange>[5:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral><peripheral>
|
|
<name>PRCM</name>
|
|
<description>Power, Reset and Clock Management
|
|
|
|
</description>
|
|
<baseAddress>0x40082000</baseAddress>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x00001000</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<registers>
|
|
<register>
|
|
<name>INFRCLKDIVR</name>
|
|
<description>Infrastructure Clock Division Factor For Run Mode</description>
|
|
<addressOffset>0</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>RATIO</name>
|
|
<description>RATIO</description>
|
|
<bitRange>[1:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>INFRCLKDIVS</name>
|
|
<description>Infrastructure Clock Division Factor For Sleep Mode</description>
|
|
<addressOffset>4</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>RATIO</name>
|
|
<description>RATIO</description>
|
|
<bitRange>[1:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>INFRCLKDIVDS</name>
|
|
<description>Infrastructure Clock Division Factor For DeepSleep Mode</description>
|
|
<addressOffset>8</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>RATIO</name>
|
|
<description>RATIO</description>
|
|
<bitRange>[1:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>VDCTL</name>
|
|
<description>MCU Voltage Domain Control</description>
|
|
<addressOffset>12</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>MCU_VD</name>
|
|
<description>MCU_VD</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>ULDO</name>
|
|
<description>ULDO</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLKLOADCTL</name>
|
|
<description>Clock Load Control</description>
|
|
<addressOffset>40</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000002</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LOAD_DONE</name>
|
|
<description>LOAD_DONE</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>LOAD</name>
|
|
<description>LOAD</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RFCCLKG</name>
|
|
<description>RFC Clock Gate</description>
|
|
<addressOffset>44</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CLK_EN</name>
|
|
<description>CLK_EN</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>VIMSCLKG</name>
|
|
<description>VIMS Clock Gate</description>
|
|
<addressOffset>48</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000003</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CLK_EN</name>
|
|
<description>CLK_EN</description>
|
|
<bitRange>[1:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SECDMACLKGR</name>
|
|
<description>TRNG, CRYPTO And UDMA Clock Gate For Run Mode</description>
|
|
<addressOffset>60</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DMA_CLK_EN</name>
|
|
<description>DMA_CLK_EN</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TRNG_CLK_EN</name>
|
|
<description>TRNG_CLK_EN</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CRYPTO_CLK_EN</name>
|
|
<description>CRYPTO_CLK_EN</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SECDMACLKGS</name>
|
|
<description>TRNG, CRYPTO And UDMA Clock Gate For Sleep Mode</description>
|
|
<addressOffset>64</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DMA_CLK_EN</name>
|
|
<description>DMA_CLK_EN</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TRNG_CLK_EN</name>
|
|
<description>TRNG_CLK_EN</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CRYPTO_CLK_EN</name>
|
|
<description>CRYPTO_CLK_EN</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SECDMACLKGDS</name>
|
|
<description>TRNG, CRYPTO And UDMA Clock Gate For Deep Sleep Mode</description>
|
|
<addressOffset>68</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DMA_CLK_EN</name>
|
|
<description>DMA_CLK_EN</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TRNG_CLK_EN</name>
|
|
<description>TRNG_CLK_EN</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CRYPTO_CLK_EN</name>
|
|
<description>CRYPTO_CLK_EN</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>GPIOCLKGR</name>
|
|
<description>GPIO Clock Gate For Run Mode</description>
|
|
<addressOffset>72</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CLK_EN</name>
|
|
<description>CLK_EN</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>GPIOCLKGS</name>
|
|
<description>GPIO Clock Gate For Sleep Mode</description>
|
|
<addressOffset>76</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CLK_EN</name>
|
|
<description>CLK_EN</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>GPIOCLKGDS</name>
|
|
<description>GPIO Clock Gate For Deep Sleep Mode</description>
|
|
<addressOffset>80</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CLK_EN</name>
|
|
<description>CLK_EN</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>GPTCLKGR</name>
|
|
<description>GPT Clock Gate For Run Mode</description>
|
|
<addressOffset>84</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CLK_EN</name>
|
|
<description>CLK_EN</description>
|
|
<bitRange>[3:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>GPTCLKGS</name>
|
|
<description>GPT Clock Gate For Sleep Mode</description>
|
|
<addressOffset>88</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CLK_EN</name>
|
|
<description>CLK_EN</description>
|
|
<bitRange>[3:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>GPTCLKGDS</name>
|
|
<description>GPT Clock Gate For Deep Sleep Mode</description>
|
|
<addressOffset>92</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CLK_EN</name>
|
|
<description>CLK_EN</description>
|
|
<bitRange>[3:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>I2CCLKGR</name>
|
|
<description>I2C Clock Gate For Run Mode</description>
|
|
<addressOffset>96</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CLK_EN</name>
|
|
<description>CLK_EN</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>I2CCLKGS</name>
|
|
<description>I2C Clock Gate For Sleep Mode</description>
|
|
<addressOffset>100</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CLK_EN</name>
|
|
<description>CLK_EN</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>I2CCLKGDS</name>
|
|
<description>I2C Clock Gate For Deep Sleep Mode</description>
|
|
<addressOffset>104</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CLK_EN</name>
|
|
<description>CLK_EN</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>UARTCLKGR</name>
|
|
<description>UART Clock Gate For Run Mode</description>
|
|
<addressOffset>108</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CLK_EN</name>
|
|
<description>CLK_EN</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>UARTCLKGS</name>
|
|
<description>UART Clock Gate For Sleep Mode</description>
|
|
<addressOffset>112</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CLK_EN</name>
|
|
<description>CLK_EN</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>UARTCLKGDS</name>
|
|
<description>UART Clock Gate For Deep Sleep Mode</description>
|
|
<addressOffset>116</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CLK_EN</name>
|
|
<description>CLK_EN</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SSICLKGR</name>
|
|
<description>SSI Clock Gate For Run Mode</description>
|
|
<addressOffset>120</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CLK_EN</name>
|
|
<description>CLK_EN</description>
|
|
<bitRange>[1:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SSICLKGS</name>
|
|
<description>SSI Clock Gate For Sleep Mode</description>
|
|
<addressOffset>124</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CLK_EN</name>
|
|
<description>CLK_EN</description>
|
|
<bitRange>[1:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SSICLKGDS</name>
|
|
<description>SSI Clock Gate For Deep Sleep Mode</description>
|
|
<addressOffset>128</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CLK_EN</name>
|
|
<description>CLK_EN</description>
|
|
<bitRange>[1:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>I2SCLKGR</name>
|
|
<description>I2S Clock Gate For Run Mode</description>
|
|
<addressOffset>132</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CLK_EN</name>
|
|
<description>CLK_EN</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>I2SCLKGS</name>
|
|
<description>I2S Clock Gate For Sleep Mode</description>
|
|
<addressOffset>136</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CLK_EN</name>
|
|
<description>CLK_EN</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>I2SCLKGDS</name>
|
|
<description>I2S Clock Gate For Deep Sleep Mode</description>
|
|
<addressOffset>140</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CLK_EN</name>
|
|
<description>CLK_EN</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CPUCLKDIV</name>
|
|
<description>Internal. Only to be used through TI provided API.</description>
|
|
<addressOffset>184</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>RATIO</name>
|
|
<description>RATIO</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>I2SBCLKSEL</name>
|
|
<description>I2S Clock Control</description>
|
|
<addressOffset>200</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SRC</name>
|
|
<description>SRC</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>GPTCLKDIV</name>
|
|
<description>GPT Scalar</description>
|
|
<addressOffset>204</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>RATIO</name>
|
|
<description>RATIO</description>
|
|
<bitRange>[3:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>I2SCLKCTL</name>
|
|
<description>I2S Clock Control</description>
|
|
<addressOffset>208</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SMPL_ON_POSEDGE</name>
|
|
<description>SMPL_ON_POSEDGE</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WCLK_PHASE</name>
|
|
<description>WCLK_PHASE</description>
|
|
<bitRange>[2:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EN</name>
|
|
<description>EN</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>I2SMCLKDIV</name>
|
|
<description>MCLK Division Ratio</description>
|
|
<addressOffset>212</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>MDIV</name>
|
|
<description>MDIV</description>
|
|
<bitRange>[9:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>I2SBCLKDIV</name>
|
|
<description>BCLK Division Ratio</description>
|
|
<addressOffset>216</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>BDIV</name>
|
|
<description>BDIV</description>
|
|
<bitRange>[9:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>I2SWCLKDIV</name>
|
|
<description>WCLK Division Ratio</description>
|
|
<addressOffset>220</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>WDIV</name>
|
|
<description>WDIV</description>
|
|
<bitRange>[15:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SWRESET</name>
|
|
<description>SW Initiated Resets</description>
|
|
<addressOffset>268</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>MCU</name>
|
|
<description>MCU</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>WARMRESET</name>
|
|
<description>WARM Reset Control And Status</description>
|
|
<addressOffset>272</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>WR_TO_PINRESET</name>
|
|
<description>WR_TO_PINRESET</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>LOCKUP_STAT</name>
|
|
<description>LOCKUP_STAT</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WDT_STAT</name>
|
|
<description>WDT_STAT</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PDCTL0</name>
|
|
<description>Power Domain Control</description>
|
|
<addressOffset>300</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>PERIPH_ON</name>
|
|
<description>PERIPH_ON</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SERIAL_ON</name>
|
|
<description>SERIAL_ON</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RFC_ON</name>
|
|
<description>RFC_ON</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PDCTL0RFC</name>
|
|
<description>RFC Power Domain Control</description>
|
|
<addressOffset>304</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>ON</name>
|
|
<description>ON</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PDCTL0SERIAL</name>
|
|
<description>SERIAL Power Domain Control</description>
|
|
<addressOffset>308</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>ON</name>
|
|
<description>ON</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PDCTL0PERIPH</name>
|
|
<description>PERIPH Power Domain Control</description>
|
|
<addressOffset>312</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>ON</name>
|
|
<description>ON</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PDSTAT0</name>
|
|
<description>Power Domain Status</description>
|
|
<addressOffset>320</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>PERIPH_ON</name>
|
|
<description>PERIPH_ON</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SERIAL_ON</name>
|
|
<description>SERIAL_ON</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RFC_ON</name>
|
|
<description>RFC_ON</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PDSTAT0RFC</name>
|
|
<description>RFC Power Domain Status</description>
|
|
<addressOffset>324</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>ON</name>
|
|
<description>ON</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PDSTAT0SERIAL</name>
|
|
<description>SERIAL Power Domain Status</description>
|
|
<addressOffset>328</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>ON</name>
|
|
<description>ON</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PDSTAT0PERIPH</name>
|
|
<description>PERIPH Power Domain Status</description>
|
|
<addressOffset>332</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>ON</name>
|
|
<description>ON</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PDCTL1</name>
|
|
<description>Power Domain Control</description>
|
|
<addressOffset>380</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000000a</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>VIMS_MODE</name>
|
|
<description>VIMS_MODE</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RFC_ON</name>
|
|
<description>RFC_ON</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CPU_ON</name>
|
|
<description>CPU_ON</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PDCTL1CPU</name>
|
|
<description>CPU Power Domain Control</description>
|
|
<addressOffset>388</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>ON</name>
|
|
<description>ON</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PDCTL1RFC</name>
|
|
<description>RFC Power Domain Control</description>
|
|
<addressOffset>392</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>ON</name>
|
|
<description>ON</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PDCTL1VIMS</name>
|
|
<description>VIMS Power Domain Control</description>
|
|
<addressOffset>396</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>ON</name>
|
|
<description>ON</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PDSTAT1</name>
|
|
<description>Power Domain Status</description>
|
|
<addressOffset>404</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x0000001a</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>BUS_ON</name>
|
|
<description>BUS_ON</description>
|
|
<bitRange>[4:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>VIMS_MODE</name>
|
|
<description>VIMS_MODE</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RFC_ON</name>
|
|
<description>RFC_ON</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CPU_ON</name>
|
|
<description>CPU_ON</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PDSTAT1BUS</name>
|
|
<description>BUS Power Domain Status</description>
|
|
<addressOffset>408</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>ON</name>
|
|
<description>ON</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PDSTAT1RFC</name>
|
|
<description>RFC Power Domain Status</description>
|
|
<addressOffset>412</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>ON</name>
|
|
<description>ON</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PDSTAT1CPU</name>
|
|
<description>CPU Power Domain Status</description>
|
|
<addressOffset>416</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>ON</name>
|
|
<description>ON</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PDSTAT1VIMS</name>
|
|
<description>VIMS Power Domain Status</description>
|
|
<addressOffset>420</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>ON</name>
|
|
<description>ON</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RFCMODESEL</name>
|
|
<description>Selected RFC Mode</description>
|
|
<addressOffset>464</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CURR</name>
|
|
<description>CURR</description>
|
|
<bitRange>[2:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RAMRETEN</name>
|
|
<description>Memory Retention Control</description>
|
|
<addressOffset>548</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000003</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>RFC</name>
|
|
<description>RFC</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>VIMS</name>
|
|
<description>VIMS</description>
|
|
<bitRange>[1:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral><peripheral>
|
|
<name>RFC_DBELL</name>
|
|
<description>RF Core Doorbell</description>
|
|
<baseAddress>0x40041000</baseAddress>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x40</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<registers>
|
|
<register>
|
|
<name>CMDR</name>
|
|
<description>Doorbell Command Register</description>
|
|
<addressOffset>0</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CMD</name>
|
|
<description>CMD</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CMDSTA</name>
|
|
<description>Doorbell Command Status Register</description>
|
|
<addressOffset>4</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>STAT</name>
|
|
<description>STAT</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RFHWIFG</name>
|
|
<description>Interrupt Flags From RF Hardware Modules</description>
|
|
<addressOffset>8</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>RATCH7</name>
|
|
<description>RATCH7</description>
|
|
<bitRange>[19:19]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RATCH6</name>
|
|
<description>RATCH6</description>
|
|
<bitRange>[18:18]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RATCH5</name>
|
|
<description>RATCH5</description>
|
|
<bitRange>[17:17]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RATCH4</name>
|
|
<description>RATCH4</description>
|
|
<bitRange>[16:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RATCH3</name>
|
|
<description>RATCH3</description>
|
|
<bitRange>[15:15]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RATCH2</name>
|
|
<description>RATCH2</description>
|
|
<bitRange>[14:14]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RATCH1</name>
|
|
<description>RATCH1</description>
|
|
<bitRange>[13:13]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RATCH0</name>
|
|
<description>RATCH0</description>
|
|
<bitRange>[12:12]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RFESOFT2</name>
|
|
<description>RFESOFT2</description>
|
|
<bitRange>[11:11]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RFESOFT1</name>
|
|
<description>RFESOFT1</description>
|
|
<bitRange>[10:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RFESOFT0</name>
|
|
<description>RFESOFT0</description>
|
|
<bitRange>[9:9]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RFEDONE</name>
|
|
<description>RFEDONE</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TRCTK</name>
|
|
<description>TRCTK</description>
|
|
<bitRange>[6:6]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>MDMSOFT</name>
|
|
<description>MDMSOFT</description>
|
|
<bitRange>[5:5]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>MDMOUT</name>
|
|
<description>MDMOUT</description>
|
|
<bitRange>[4:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>MDMIN</name>
|
|
<description>MDMIN</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>MDMDONE</name>
|
|
<description>MDMDONE</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>FSCA</name>
|
|
<description>FSCA</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RFHWIEN</name>
|
|
<description>Interrupt Enable For RF Hardware Modules</description>
|
|
<addressOffset>12</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>RATCH7</name>
|
|
<description>RATCH7</description>
|
|
<bitRange>[19:19]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RATCH6</name>
|
|
<description>RATCH6</description>
|
|
<bitRange>[18:18]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RATCH5</name>
|
|
<description>RATCH5</description>
|
|
<bitRange>[17:17]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RATCH4</name>
|
|
<description>RATCH4</description>
|
|
<bitRange>[16:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RATCH3</name>
|
|
<description>RATCH3</description>
|
|
<bitRange>[15:15]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RATCH2</name>
|
|
<description>RATCH2</description>
|
|
<bitRange>[14:14]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RATCH1</name>
|
|
<description>RATCH1</description>
|
|
<bitRange>[13:13]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RATCH0</name>
|
|
<description>RATCH0</description>
|
|
<bitRange>[12:12]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RFESOFT2</name>
|
|
<description>RFESOFT2</description>
|
|
<bitRange>[11:11]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RFESOFT1</name>
|
|
<description>RFESOFT1</description>
|
|
<bitRange>[10:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RFESOFT0</name>
|
|
<description>RFESOFT0</description>
|
|
<bitRange>[9:9]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RFEDONE</name>
|
|
<description>RFEDONE</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TRCTK</name>
|
|
<description>TRCTK</description>
|
|
<bitRange>[6:6]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>MDMSOFT</name>
|
|
<description>MDMSOFT</description>
|
|
<bitRange>[5:5]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>MDMOUT</name>
|
|
<description>MDMOUT</description>
|
|
<bitRange>[4:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>MDMIN</name>
|
|
<description>MDMIN</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>MDMDONE</name>
|
|
<description>MDMDONE</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>FSCA</name>
|
|
<description>FSCA</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RFCPEIFG</name>
|
|
<description>Interrupt Flags For Command and Packet Engine Generated Interrupts</description>
|
|
<addressOffset>16</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>INTERNAL_ERROR</name>
|
|
<description>INTERNAL_ERROR</description>
|
|
<bitRange>[31:31]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>BOOT_DONE</name>
|
|
<description>BOOT_DONE</description>
|
|
<bitRange>[30:30]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>MODULES_UNLOCKED</name>
|
|
<description>MODULES_UNLOCKED</description>
|
|
<bitRange>[29:29]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SYNTH_NO_LOCK</name>
|
|
<description>SYNTH_NO_LOCK</description>
|
|
<bitRange>[28:28]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IRQ27</name>
|
|
<description>IRQ27</description>
|
|
<bitRange>[27:27]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RX_ABORTED</name>
|
|
<description>RX_ABORTED</description>
|
|
<bitRange>[26:26]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RX_N_DATA_WRITTEN</name>
|
|
<description>RX_N_DATA_WRITTEN</description>
|
|
<bitRange>[25:25]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RX_DATA_WRITTEN</name>
|
|
<description>RX_DATA_WRITTEN</description>
|
|
<bitRange>[24:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RX_ENTRY_DONE</name>
|
|
<description>RX_ENTRY_DONE</description>
|
|
<bitRange>[23:23]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RX_BUF_FULL</name>
|
|
<description>RX_BUF_FULL</description>
|
|
<bitRange>[22:22]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RX_CTRL_ACK</name>
|
|
<description>RX_CTRL_ACK</description>
|
|
<bitRange>[21:21]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RX_CTRL</name>
|
|
<description>RX_CTRL</description>
|
|
<bitRange>[20:20]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RX_EMPTY</name>
|
|
<description>RX_EMPTY</description>
|
|
<bitRange>[19:19]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RX_IGNORED</name>
|
|
<description>RX_IGNORED</description>
|
|
<bitRange>[18:18]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RX_NOK</name>
|
|
<description>RX_NOK</description>
|
|
<bitRange>[17:17]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RX_OK</name>
|
|
<description>RX_OK</description>
|
|
<bitRange>[16:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IRQ15</name>
|
|
<description>IRQ15</description>
|
|
<bitRange>[15:15]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IRQ14</name>
|
|
<description>IRQ14</description>
|
|
<bitRange>[14:14]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IRQ13</name>
|
|
<description>IRQ13</description>
|
|
<bitRange>[13:13]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IRQ12</name>
|
|
<description>IRQ12</description>
|
|
<bitRange>[12:12]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TX_BUFFER_CHANGED</name>
|
|
<description>TX_BUFFER_CHANGED</description>
|
|
<bitRange>[11:11]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TX_ENTRY_DONE</name>
|
|
<description>TX_ENTRY_DONE</description>
|
|
<bitRange>[10:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TX_RETRANS</name>
|
|
<description>TX_RETRANS</description>
|
|
<bitRange>[9:9]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TX_CTRL_ACK_ACK</name>
|
|
<description>TX_CTRL_ACK_ACK</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TX_CTRL_ACK</name>
|
|
<description>TX_CTRL_ACK</description>
|
|
<bitRange>[7:7]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TX_CTRL</name>
|
|
<description>TX_CTRL</description>
|
|
<bitRange>[6:6]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TX_ACK</name>
|
|
<description>TX_ACK</description>
|
|
<bitRange>[5:5]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TX_DONE</name>
|
|
<description>TX_DONE</description>
|
|
<bitRange>[4:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>LAST_FG_COMMAND_DONE</name>
|
|
<description>LAST_FG_COMMAND_DONE</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>FG_COMMAND_DONE</name>
|
|
<description>FG_COMMAND_DONE</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>LAST_COMMAND_DONE</name>
|
|
<description>LAST_COMMAND_DONE</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>COMMAND_DONE</name>
|
|
<description>COMMAND_DONE</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RFCPEIEN</name>
|
|
<description>Interrupt Enable For Command and Packet Engine Generated Interrupts</description>
|
|
<addressOffset>20</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0xffffffff</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>INTERNAL_ERROR</name>
|
|
<description>INTERNAL_ERROR</description>
|
|
<bitRange>[31:31]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>BOOT_DONE</name>
|
|
<description>BOOT_DONE</description>
|
|
<bitRange>[30:30]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>MODULES_UNLOCKED</name>
|
|
<description>MODULES_UNLOCKED</description>
|
|
<bitRange>[29:29]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SYNTH_NO_LOCK</name>
|
|
<description>SYNTH_NO_LOCK</description>
|
|
<bitRange>[28:28]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IRQ27</name>
|
|
<description>IRQ27</description>
|
|
<bitRange>[27:27]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RX_ABORTED</name>
|
|
<description>RX_ABORTED</description>
|
|
<bitRange>[26:26]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RX_N_DATA_WRITTEN</name>
|
|
<description>RX_N_DATA_WRITTEN</description>
|
|
<bitRange>[25:25]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RX_DATA_WRITTEN</name>
|
|
<description>RX_DATA_WRITTEN</description>
|
|
<bitRange>[24:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RX_ENTRY_DONE</name>
|
|
<description>RX_ENTRY_DONE</description>
|
|
<bitRange>[23:23]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RX_BUF_FULL</name>
|
|
<description>RX_BUF_FULL</description>
|
|
<bitRange>[22:22]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RX_CTRL_ACK</name>
|
|
<description>RX_CTRL_ACK</description>
|
|
<bitRange>[21:21]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RX_CTRL</name>
|
|
<description>RX_CTRL</description>
|
|
<bitRange>[20:20]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RX_EMPTY</name>
|
|
<description>RX_EMPTY</description>
|
|
<bitRange>[19:19]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RX_IGNORED</name>
|
|
<description>RX_IGNORED</description>
|
|
<bitRange>[18:18]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RX_NOK</name>
|
|
<description>RX_NOK</description>
|
|
<bitRange>[17:17]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RX_OK</name>
|
|
<description>RX_OK</description>
|
|
<bitRange>[16:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IRQ15</name>
|
|
<description>IRQ15</description>
|
|
<bitRange>[15:15]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IRQ14</name>
|
|
<description>IRQ14</description>
|
|
<bitRange>[14:14]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IRQ13</name>
|
|
<description>IRQ13</description>
|
|
<bitRange>[13:13]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IRQ12</name>
|
|
<description>IRQ12</description>
|
|
<bitRange>[12:12]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TX_BUFFER_CHANGED</name>
|
|
<description>TX_BUFFER_CHANGED</description>
|
|
<bitRange>[11:11]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TX_ENTRY_DONE</name>
|
|
<description>TX_ENTRY_DONE</description>
|
|
<bitRange>[10:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TX_RETRANS</name>
|
|
<description>TX_RETRANS</description>
|
|
<bitRange>[9:9]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TX_CTRL_ACK_ACK</name>
|
|
<description>TX_CTRL_ACK_ACK</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TX_CTRL_ACK</name>
|
|
<description>TX_CTRL_ACK</description>
|
|
<bitRange>[7:7]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TX_CTRL</name>
|
|
<description>TX_CTRL</description>
|
|
<bitRange>[6:6]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TX_ACK</name>
|
|
<description>TX_ACK</description>
|
|
<bitRange>[5:5]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TX_DONE</name>
|
|
<description>TX_DONE</description>
|
|
<bitRange>[4:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>LAST_FG_COMMAND_DONE</name>
|
|
<description>LAST_FG_COMMAND_DONE</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>FG_COMMAND_DONE</name>
|
|
<description>FG_COMMAND_DONE</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>LAST_COMMAND_DONE</name>
|
|
<description>LAST_COMMAND_DONE</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>COMMAND_DONE</name>
|
|
<description>COMMAND_DONE</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RFCPEISL</name>
|
|
<description>Interrupt Vector Selection For Command and Packet Engine Generated Interrupts</description>
|
|
<addressOffset>24</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0xffff0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>INTERNAL_ERROR</name>
|
|
<description>INTERNAL_ERROR</description>
|
|
<bitRange>[31:31]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>BOOT_DONE</name>
|
|
<description>BOOT_DONE</description>
|
|
<bitRange>[30:30]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>MODULES_UNLOCKED</name>
|
|
<description>MODULES_UNLOCKED</description>
|
|
<bitRange>[29:29]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SYNTH_NO_LOCK</name>
|
|
<description>SYNTH_NO_LOCK</description>
|
|
<bitRange>[28:28]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IRQ27</name>
|
|
<description>IRQ27</description>
|
|
<bitRange>[27:27]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RX_ABORTED</name>
|
|
<description>RX_ABORTED</description>
|
|
<bitRange>[26:26]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RX_N_DATA_WRITTEN</name>
|
|
<description>RX_N_DATA_WRITTEN</description>
|
|
<bitRange>[25:25]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RX_DATA_WRITTEN</name>
|
|
<description>RX_DATA_WRITTEN</description>
|
|
<bitRange>[24:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RX_ENTRY_DONE</name>
|
|
<description>RX_ENTRY_DONE</description>
|
|
<bitRange>[23:23]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RX_BUF_FULL</name>
|
|
<description>RX_BUF_FULL</description>
|
|
<bitRange>[22:22]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RX_CTRL_ACK</name>
|
|
<description>RX_CTRL_ACK</description>
|
|
<bitRange>[21:21]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RX_CTRL</name>
|
|
<description>RX_CTRL</description>
|
|
<bitRange>[20:20]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RX_EMPTY</name>
|
|
<description>RX_EMPTY</description>
|
|
<bitRange>[19:19]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RX_IGNORED</name>
|
|
<description>RX_IGNORED</description>
|
|
<bitRange>[18:18]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RX_NOK</name>
|
|
<description>RX_NOK</description>
|
|
<bitRange>[17:17]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RX_OK</name>
|
|
<description>RX_OK</description>
|
|
<bitRange>[16:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IRQ15</name>
|
|
<description>IRQ15</description>
|
|
<bitRange>[15:15]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IRQ14</name>
|
|
<description>IRQ14</description>
|
|
<bitRange>[14:14]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IRQ13</name>
|
|
<description>IRQ13</description>
|
|
<bitRange>[13:13]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IRQ12</name>
|
|
<description>IRQ12</description>
|
|
<bitRange>[12:12]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TX_BUFFER_CHANGED</name>
|
|
<description>TX_BUFFER_CHANGED</description>
|
|
<bitRange>[11:11]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TX_ENTRY_DONE</name>
|
|
<description>TX_ENTRY_DONE</description>
|
|
<bitRange>[10:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TX_RETRANS</name>
|
|
<description>TX_RETRANS</description>
|
|
<bitRange>[9:9]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TX_CTRL_ACK_ACK</name>
|
|
<description>TX_CTRL_ACK_ACK</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TX_CTRL_ACK</name>
|
|
<description>TX_CTRL_ACK</description>
|
|
<bitRange>[7:7]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TX_CTRL</name>
|
|
<description>TX_CTRL</description>
|
|
<bitRange>[6:6]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TX_ACK</name>
|
|
<description>TX_ACK</description>
|
|
<bitRange>[5:5]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TX_DONE</name>
|
|
<description>TX_DONE</description>
|
|
<bitRange>[4:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>LAST_FG_COMMAND_DONE</name>
|
|
<description>LAST_FG_COMMAND_DONE</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>FG_COMMAND_DONE</name>
|
|
<description>FG_COMMAND_DONE</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>LAST_COMMAND_DONE</name>
|
|
<description>LAST_COMMAND_DONE</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>COMMAND_DONE</name>
|
|
<description>COMMAND_DONE</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RFACKIFG</name>
|
|
<description>Doorbell Command Acknowledgement Interrupt Flag</description>
|
|
<addressOffset>28</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>ACKFLAG</name>
|
|
<description>ACKFLAG</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SYSGPOCTL</name>
|
|
<description>RF Core General Purpose Output Control</description>
|
|
<addressOffset>32</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>GPOCTL3</name>
|
|
<description>GPOCTL3</description>
|
|
<bitRange>[15:12]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>GPOCTL2</name>
|
|
<description>GPOCTL2</description>
|
|
<bitRange>[11:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>GPOCTL1</name>
|
|
<description>GPOCTL1</description>
|
|
<bitRange>[7:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>GPOCTL0</name>
|
|
<description>GPOCTL0</description>
|
|
<bitRange>[3:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral><peripheral>
|
|
<name>RFC_PWR</name>
|
|
<description>RF Core Power Management</description>
|
|
<baseAddress>0x40040000</baseAddress>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x4</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<registers>
|
|
<register>
|
|
<name>PWMCLKEN</name>
|
|
<description>RF Core Power Management and Clock Enable</description>
|
|
<addressOffset>0</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>RFCTRC</name>
|
|
<description>RFCTRC</description>
|
|
<bitRange>[10:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>FSCA</name>
|
|
<description>FSCA</description>
|
|
<bitRange>[9:9]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PHA</name>
|
|
<description>PHA</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RAT</name>
|
|
<description>RAT</description>
|
|
<bitRange>[7:7]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RFERAM</name>
|
|
<description>RFERAM</description>
|
|
<bitRange>[6:6]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RFE</name>
|
|
<description>RFE</description>
|
|
<bitRange>[5:5]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>MDMRAM</name>
|
|
<description>MDMRAM</description>
|
|
<bitRange>[4:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>MDM</name>
|
|
<description>MDM</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CPERAM</name>
|
|
<description>CPERAM</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CPE</name>
|
|
<description>CPE</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RFC</name>
|
|
<description>RFC</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral><peripheral>
|
|
<name>RFC_RAT</name>
|
|
<description>RF Core Radio Timer</description>
|
|
<baseAddress>0x40043000</baseAddress>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x100</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<registers>
|
|
<register>
|
|
<name>RATCNT</name>
|
|
<description>Radio Timer Counter Value</description>
|
|
<addressOffset>4</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CNT</name>
|
|
<description>CNT</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RATCH0VAL</name>
|
|
<description>Timer Channel 0 Capture/Compare Register</description>
|
|
<addressOffset>128</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>VAL</name>
|
|
<description>VAL</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RATCH1VAL</name>
|
|
<description>Timer Channel 1 Capture/Compare Register</description>
|
|
<addressOffset>132</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>VAL</name>
|
|
<description>VAL</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RATCH2VAL</name>
|
|
<description>Timer Channel 2 Capture/Compare Register</description>
|
|
<addressOffset>136</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>VAL</name>
|
|
<description>VAL</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RATCH3VAL</name>
|
|
<description>Timer Channel 3 Capture/Compare Register</description>
|
|
<addressOffset>140</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>VAL</name>
|
|
<description>VAL</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RATCH4VAL</name>
|
|
<description>Timer Channel 4 Capture/Compare Register</description>
|
|
<addressOffset>144</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>VAL</name>
|
|
<description>VAL</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RATCH5VAL</name>
|
|
<description>Timer Channel 5 Capture/Compare Register</description>
|
|
<addressOffset>148</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>VAL</name>
|
|
<description>VAL</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RATCH6VAL</name>
|
|
<description>Timer Channel 6 Capture/Compare Register</description>
|
|
<addressOffset>152</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>VAL</name>
|
|
<description>VAL</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RATCH7VAL</name>
|
|
<description>Timer Channel 7 Capture/Compare Register</description>
|
|
<addressOffset>156</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>VAL</name>
|
|
<description>VAL</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral><peripheral>
|
|
<name>SMPH</name>
|
|
<description>MCU Semaphore Module
|
|
|
|
This module provides 32 binary semaphores. The state of a binary semaphore is either taken or available.
|
|
|
|
A semaphore does not implement any ownership attribute. Still, a semaphore can be used to handle mutual exclusion scenarios.
|
|
|
|
</description>
|
|
<baseAddress>0x40084000</baseAddress>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x1000</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<registers>
|
|
<register>
|
|
<name>SMPH0</name>
|
|
<description>MCU SEMAPHORE 0</description>
|
|
<addressOffset>0</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>STAT</name>
|
|
<description>STAT</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
<readAction>clear</readAction>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SMPH1</name>
|
|
<description>MCU SEMAPHORE 1</description>
|
|
<addressOffset>4</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>STAT</name>
|
|
<description>STAT</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
<readAction>clear</readAction>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SMPH2</name>
|
|
<description>MCU SEMAPHORE 2</description>
|
|
<addressOffset>8</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>STAT</name>
|
|
<description>STAT</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
<readAction>clear</readAction>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SMPH3</name>
|
|
<description>MCU SEMAPHORE 3</description>
|
|
<addressOffset>12</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>STAT</name>
|
|
<description>STAT</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
<readAction>clear</readAction>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SMPH4</name>
|
|
<description>MCU SEMAPHORE 4</description>
|
|
<addressOffset>16</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>STAT</name>
|
|
<description>STAT</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
<readAction>clear</readAction>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SMPH5</name>
|
|
<description>MCU SEMAPHORE 5</description>
|
|
<addressOffset>20</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>STAT</name>
|
|
<description>STAT</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
<readAction>clear</readAction>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SMPH6</name>
|
|
<description>MCU SEMAPHORE 6</description>
|
|
<addressOffset>24</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>STAT</name>
|
|
<description>STAT</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
<readAction>clear</readAction>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SMPH7</name>
|
|
<description>MCU SEMAPHORE 7</description>
|
|
<addressOffset>28</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>STAT</name>
|
|
<description>STAT</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
<readAction>clear</readAction>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SMPH8</name>
|
|
<description>MCU SEMAPHORE 8</description>
|
|
<addressOffset>32</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>STAT</name>
|
|
<description>STAT</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
<readAction>clear</readAction>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SMPH9</name>
|
|
<description>MCU SEMAPHORE 9</description>
|
|
<addressOffset>36</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>STAT</name>
|
|
<description>STAT</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
<readAction>clear</readAction>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SMPH10</name>
|
|
<description>MCU SEMAPHORE 10</description>
|
|
<addressOffset>40</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>STAT</name>
|
|
<description>STAT</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
<readAction>clear</readAction>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SMPH11</name>
|
|
<description>MCU SEMAPHORE 11</description>
|
|
<addressOffset>44</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>STAT</name>
|
|
<description>STAT</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
<readAction>clear</readAction>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SMPH12</name>
|
|
<description>MCU SEMAPHORE 12</description>
|
|
<addressOffset>48</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>STAT</name>
|
|
<description>STAT</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
<readAction>clear</readAction>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SMPH13</name>
|
|
<description>MCU SEMAPHORE 13</description>
|
|
<addressOffset>52</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>STAT</name>
|
|
<description>STAT</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
<readAction>clear</readAction>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SMPH14</name>
|
|
<description>MCU SEMAPHORE 14</description>
|
|
<addressOffset>56</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>STAT</name>
|
|
<description>STAT</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
<readAction>clear</readAction>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SMPH15</name>
|
|
<description>MCU SEMAPHORE 15</description>
|
|
<addressOffset>60</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>STAT</name>
|
|
<description>STAT</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
<readAction>clear</readAction>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SMPH16</name>
|
|
<description>MCU SEMAPHORE 16</description>
|
|
<addressOffset>64</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>STAT</name>
|
|
<description>STAT</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
<readAction>clear</readAction>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SMPH17</name>
|
|
<description>MCU SEMAPHORE 17</description>
|
|
<addressOffset>68</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>STAT</name>
|
|
<description>STAT</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
<readAction>clear</readAction>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SMPH18</name>
|
|
<description>MCU SEMAPHORE 18</description>
|
|
<addressOffset>72</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>STAT</name>
|
|
<description>STAT</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
<readAction>clear</readAction>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SMPH19</name>
|
|
<description>MCU SEMAPHORE 19</description>
|
|
<addressOffset>76</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>STAT</name>
|
|
<description>STAT</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
<readAction>clear</readAction>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SMPH20</name>
|
|
<description>MCU SEMAPHORE 20</description>
|
|
<addressOffset>80</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>STAT</name>
|
|
<description>STAT</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
<readAction>clear</readAction>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SMPH21</name>
|
|
<description>MCU SEMAPHORE 21</description>
|
|
<addressOffset>84</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>STAT</name>
|
|
<description>STAT</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
<readAction>clear</readAction>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SMPH22</name>
|
|
<description>MCU SEMAPHORE 22</description>
|
|
<addressOffset>88</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>STAT</name>
|
|
<description>STAT</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
<readAction>clear</readAction>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SMPH23</name>
|
|
<description>MCU SEMAPHORE 23</description>
|
|
<addressOffset>92</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>STAT</name>
|
|
<description>STAT</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
<readAction>clear</readAction>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SMPH24</name>
|
|
<description>MCU SEMAPHORE 24</description>
|
|
<addressOffset>96</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>STAT</name>
|
|
<description>STAT</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
<readAction>clear</readAction>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SMPH25</name>
|
|
<description>MCU SEMAPHORE 25</description>
|
|
<addressOffset>100</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>STAT</name>
|
|
<description>STAT</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
<readAction>clear</readAction>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SMPH26</name>
|
|
<description>MCU SEMAPHORE 26</description>
|
|
<addressOffset>104</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>STAT</name>
|
|
<description>STAT</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
<readAction>clear</readAction>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SMPH27</name>
|
|
<description>MCU SEMAPHORE 27</description>
|
|
<addressOffset>108</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>STAT</name>
|
|
<description>STAT</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
<readAction>clear</readAction>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SMPH28</name>
|
|
<description>MCU SEMAPHORE 28</description>
|
|
<addressOffset>112</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>STAT</name>
|
|
<description>STAT</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
<readAction>clear</readAction>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SMPH29</name>
|
|
<description>MCU SEMAPHORE 29</description>
|
|
<addressOffset>116</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>STAT</name>
|
|
<description>STAT</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
<readAction>clear</readAction>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SMPH30</name>
|
|
<description>MCU SEMAPHORE 30</description>
|
|
<addressOffset>120</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>STAT</name>
|
|
<description>STAT</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
<readAction>clear</readAction>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SMPH31</name>
|
|
<description>MCU SEMAPHORE 31</description>
|
|
<addressOffset>124</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>STAT</name>
|
|
<description>STAT</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
<readAction>clear</readAction>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PEEK0</name>
|
|
<description>MCU SEMAPHORE 0 ALIAS</description>
|
|
<addressOffset>2048</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>STAT</name>
|
|
<description>STAT</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PEEK1</name>
|
|
<description>MCU SEMAPHORE 1 ALIAS</description>
|
|
<addressOffset>2052</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>STAT</name>
|
|
<description>STAT</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PEEK2</name>
|
|
<description>MCU SEMAPHORE 2 ALIAS</description>
|
|
<addressOffset>2056</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>STAT</name>
|
|
<description>STAT</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PEEK3</name>
|
|
<description>MCU SEMAPHORE 3 ALIAS</description>
|
|
<addressOffset>2060</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>STAT</name>
|
|
<description>STAT</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PEEK4</name>
|
|
<description>MCU SEMAPHORE 4 ALIAS</description>
|
|
<addressOffset>2064</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>STAT</name>
|
|
<description>STAT</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PEEK5</name>
|
|
<description>MCU SEMAPHORE 5 ALIAS</description>
|
|
<addressOffset>2068</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>STAT</name>
|
|
<description>STAT</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PEEK6</name>
|
|
<description>MCU SEMAPHORE 6 ALIAS</description>
|
|
<addressOffset>2072</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>STAT</name>
|
|
<description>STAT</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PEEK7</name>
|
|
<description>MCU SEMAPHORE 7 ALIAS</description>
|
|
<addressOffset>2076</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>STAT</name>
|
|
<description>STAT</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PEEK8</name>
|
|
<description>MCU SEMAPHORE 8 ALIAS</description>
|
|
<addressOffset>2080</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>STAT</name>
|
|
<description>STAT</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PEEK9</name>
|
|
<description>MCU SEMAPHORE 9 ALIAS</description>
|
|
<addressOffset>2084</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>STAT</name>
|
|
<description>STAT</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PEEK10</name>
|
|
<description>MCU SEMAPHORE 10 ALIAS</description>
|
|
<addressOffset>2088</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>STAT</name>
|
|
<description>STAT</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PEEK11</name>
|
|
<description>MCU SEMAPHORE 11 ALIAS</description>
|
|
<addressOffset>2092</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>STAT</name>
|
|
<description>STAT</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PEEK12</name>
|
|
<description>MCU SEMAPHORE 12 ALIAS</description>
|
|
<addressOffset>2096</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>STAT</name>
|
|
<description>STAT</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PEEK13</name>
|
|
<description>MCU SEMAPHORE 13 ALIAS</description>
|
|
<addressOffset>2100</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>STAT</name>
|
|
<description>STAT</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PEEK14</name>
|
|
<description>MCU SEMAPHORE 14 ALIAS</description>
|
|
<addressOffset>2104</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>STAT</name>
|
|
<description>STAT</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PEEK15</name>
|
|
<description>MCU SEMAPHORE 15 ALIAS</description>
|
|
<addressOffset>2108</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>STAT</name>
|
|
<description>STAT</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PEEK16</name>
|
|
<description>MCU SEMAPHORE 16 ALIAS</description>
|
|
<addressOffset>2112</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>STAT</name>
|
|
<description>STAT</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PEEK17</name>
|
|
<description>MCU SEMAPHORE 17 ALIAS</description>
|
|
<addressOffset>2116</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>STAT</name>
|
|
<description>STAT</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PEEK18</name>
|
|
<description>MCU SEMAPHORE 18 ALIAS</description>
|
|
<addressOffset>2120</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>STAT</name>
|
|
<description>STAT</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PEEK19</name>
|
|
<description>MCU SEMAPHORE 19 ALIAS</description>
|
|
<addressOffset>2124</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>STAT</name>
|
|
<description>STAT</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PEEK20</name>
|
|
<description>MCU SEMAPHORE 20 ALIAS</description>
|
|
<addressOffset>2128</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>STAT</name>
|
|
<description>STAT</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PEEK21</name>
|
|
<description>MCU SEMAPHORE 21 ALIAS</description>
|
|
<addressOffset>2132</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>STAT</name>
|
|
<description>STAT</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PEEK22</name>
|
|
<description>MCU SEMAPHORE 22 ALIAS</description>
|
|
<addressOffset>2136</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>STAT</name>
|
|
<description>STAT</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PEEK23</name>
|
|
<description>MCU SEMAPHORE 23 ALIAS</description>
|
|
<addressOffset>2140</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>STAT</name>
|
|
<description>STAT</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PEEK24</name>
|
|
<description>MCU SEMAPHORE 24 ALIAS</description>
|
|
<addressOffset>2144</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>STAT</name>
|
|
<description>STAT</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PEEK25</name>
|
|
<description>MCU SEMAPHORE 25 ALIAS</description>
|
|
<addressOffset>2148</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>STAT</name>
|
|
<description>STAT</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PEEK26</name>
|
|
<description>MCU SEMAPHORE 26 ALIAS</description>
|
|
<addressOffset>2152</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>STAT</name>
|
|
<description>STAT</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PEEK27</name>
|
|
<description>MCU SEMAPHORE 27 ALIAS</description>
|
|
<addressOffset>2156</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>STAT</name>
|
|
<description>STAT</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PEEK28</name>
|
|
<description>MCU SEMAPHORE 28 ALIAS</description>
|
|
<addressOffset>2160</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>STAT</name>
|
|
<description>STAT</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PEEK29</name>
|
|
<description>MCU SEMAPHORE 29 ALIAS</description>
|
|
<addressOffset>2164</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>STAT</name>
|
|
<description>STAT</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PEEK30</name>
|
|
<description>MCU SEMAPHORE 30 ALIAS</description>
|
|
<addressOffset>2168</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>STAT</name>
|
|
<description>STAT</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PEEK31</name>
|
|
<description>MCU SEMAPHORE 31 ALIAS</description>
|
|
<addressOffset>2172</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>STAT</name>
|
|
<description>STAT</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral><peripheral>
|
|
<name>SSI0</name>
|
|
<description>Synchronous Serial Interface with master and slave capabilities
|
|
|
|
</description>
|
|
<baseAddress>0x40000000</baseAddress>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x1000</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<registers>
|
|
<register>
|
|
<name>CR0</name>
|
|
<description>Control 0</description>
|
|
<addressOffset>0</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SCR</name>
|
|
<description>SCR</description>
|
|
<bitRange>[15:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SPH</name>
|
|
<description>SPH</description>
|
|
<bitRange>[7:7]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SPO</name>
|
|
<description>SPO</description>
|
|
<bitRange>[6:6]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>FRF</name>
|
|
<description>FRF</description>
|
|
<bitRange>[5:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DSS</name>
|
|
<description>DSS</description>
|
|
<bitRange>[3:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CR1</name>
|
|
<description>Control 1</description>
|
|
<addressOffset>4</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SOD</name>
|
|
<description>SOD</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>MS</name>
|
|
<description>MS</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SSE</name>
|
|
<description>SSE</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>LBM</name>
|
|
<description>LBM</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DR</name>
|
|
<description>Data
|
|
16-bits wide data register:
|
|
When read, the entry in the receive FIFO, pointed to by the current FIFO read pointer, is accessed. As data values are removed by the receive logic from the incoming data frame, they are placed into the entry in the receive FIFO, pointed to by the current FIFO write pointer.
|
|
When written, the entry in the transmit FIFO, pointed to by the write pointer, is written to. Data values are removed from the transmit FIFO one value at a time by the transmit logic. It is loaded into the transmit serial shifter, then serially shifted out onto the TXD output pin at the programmed bit rate.
|
|
When a data size of less than 16 bits is selected, the user must right-justify data written to the transmit FIFO. The transmit logic ignores the unused bits. Received data less than 16 bits is automatically right-justified in the receive buffer.</description>
|
|
<addressOffset>8</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DATA</name>
|
|
<description>DATA</description>
|
|
<bitRange>[15:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SR</name>
|
|
<description>Status</description>
|
|
<addressOffset>12</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000003</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>BSY</name>
|
|
<description>BSY</description>
|
|
<bitRange>[4:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RFF</name>
|
|
<description>RFF</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RNE</name>
|
|
<description>RNE</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TNF</name>
|
|
<description>TNF</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TFE</name>
|
|
<description>TFE</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CPSR</name>
|
|
<description>Clock Prescale</description>
|
|
<addressOffset>16</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CPSDVSR</name>
|
|
<description>CPSDVSR</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IMSC</name>
|
|
<description>Interrupt Mask Set and Clear</description>
|
|
<addressOffset>20</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TXIM</name>
|
|
<description>TXIM</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RXIM</name>
|
|
<description>RXIM</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RTIM</name>
|
|
<description>RTIM</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RORIM</name>
|
|
<description>RORIM</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RIS</name>
|
|
<description>Raw Interrupt Status</description>
|
|
<addressOffset>24</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000008</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TXRIS</name>
|
|
<description>TXRIS</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RXRIS</name>
|
|
<description>RXRIS</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RTRIS</name>
|
|
<description>RTRIS</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RORRIS</name>
|
|
<description>RORRIS</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>MIS</name>
|
|
<description>Masked Interrupt Status</description>
|
|
<addressOffset>28</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TXMIS</name>
|
|
<description>TXMIS</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RXMIS</name>
|
|
<description>RXMIS</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RTMIS</name>
|
|
<description>RTMIS</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RORMIS</name>
|
|
<description>RORMIS</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>ICR</name>
|
|
<description>Interrupt Clear
|
|
On a write of 1, the corresponding interrupt is cleared. A write of 0 has no effect.</description>
|
|
<addressOffset>32</addressOffset>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>RTIC</name>
|
|
<description>RTIC</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RORIC</name>
|
|
<description>RORIC</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DMACR</name>
|
|
<description>DMA Control</description>
|
|
<addressOffset>36</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TXDMAE</name>
|
|
<description>TXDMAE</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RXDMAE</name>
|
|
<description>RXDMAE</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral><peripheral>
|
|
<name>SSI1</name>
|
|
<description>Synchronous Serial Interface with master and slave capabilities
|
|
|
|
</description>
|
|
<baseAddress>0x40008000</baseAddress>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x1000</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<registers>
|
|
<register>
|
|
<name>CR0</name>
|
|
<description>Control 0</description>
|
|
<addressOffset>0</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SCR</name>
|
|
<description>SCR</description>
|
|
<bitRange>[15:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SPH</name>
|
|
<description>SPH</description>
|
|
<bitRange>[7:7]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SPO</name>
|
|
<description>SPO</description>
|
|
<bitRange>[6:6]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>FRF</name>
|
|
<description>FRF</description>
|
|
<bitRange>[5:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DSS</name>
|
|
<description>DSS</description>
|
|
<bitRange>[3:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CR1</name>
|
|
<description>Control 1</description>
|
|
<addressOffset>4</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SOD</name>
|
|
<description>SOD</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>MS</name>
|
|
<description>MS</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SSE</name>
|
|
<description>SSE</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>LBM</name>
|
|
<description>LBM</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DR</name>
|
|
<description>Data
|
|
16-bits wide data register:
|
|
When read, the entry in the receive FIFO, pointed to by the current FIFO read pointer, is accessed. As data values are removed by the receive logic from the incoming data frame, they are placed into the entry in the receive FIFO, pointed to by the current FIFO write pointer.
|
|
When written, the entry in the transmit FIFO, pointed to by the write pointer, is written to. Data values are removed from the transmit FIFO one value at a time by the transmit logic. It is loaded into the transmit serial shifter, then serially shifted out onto the TXD output pin at the programmed bit rate.
|
|
When a data size of less than 16 bits is selected, the user must right-justify data written to the transmit FIFO. The transmit logic ignores the unused bits. Received data less than 16 bits is automatically right-justified in the receive buffer.</description>
|
|
<addressOffset>8</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DATA</name>
|
|
<description>DATA</description>
|
|
<bitRange>[15:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SR</name>
|
|
<description>Status</description>
|
|
<addressOffset>12</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000003</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>BSY</name>
|
|
<description>BSY</description>
|
|
<bitRange>[4:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RFF</name>
|
|
<description>RFF</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RNE</name>
|
|
<description>RNE</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TNF</name>
|
|
<description>TNF</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TFE</name>
|
|
<description>TFE</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CPSR</name>
|
|
<description>Clock Prescale</description>
|
|
<addressOffset>16</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CPSDVSR</name>
|
|
<description>CPSDVSR</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IMSC</name>
|
|
<description>Interrupt Mask Set and Clear</description>
|
|
<addressOffset>20</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TXIM</name>
|
|
<description>TXIM</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RXIM</name>
|
|
<description>RXIM</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RTIM</name>
|
|
<description>RTIM</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RORIM</name>
|
|
<description>RORIM</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RIS</name>
|
|
<description>Raw Interrupt Status</description>
|
|
<addressOffset>24</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000008</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TXRIS</name>
|
|
<description>TXRIS</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RXRIS</name>
|
|
<description>RXRIS</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RTRIS</name>
|
|
<description>RTRIS</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RORRIS</name>
|
|
<description>RORRIS</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>MIS</name>
|
|
<description>Masked Interrupt Status</description>
|
|
<addressOffset>28</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TXMIS</name>
|
|
<description>TXMIS</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RXMIS</name>
|
|
<description>RXMIS</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RTMIS</name>
|
|
<description>RTMIS</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RORMIS</name>
|
|
<description>RORMIS</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>ICR</name>
|
|
<description>Interrupt Clear
|
|
On a write of 1, the corresponding interrupt is cleared. A write of 0 has no effect.</description>
|
|
<addressOffset>32</addressOffset>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>RTIC</name>
|
|
<description>RTIC</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RORIC</name>
|
|
<description>RORIC</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DMACR</name>
|
|
<description>DMA Control</description>
|
|
<addressOffset>36</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TXDMAE</name>
|
|
<description>TXDMAE</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RXDMAE</name>
|
|
<description>RXDMAE</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral><peripheral>
|
|
<name>TRNG</name>
|
|
<description>True Random Number Generator
|
|
</description>
|
|
<baseAddress>0x40028000</baseAddress>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x2000</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<registers>
|
|
<register>
|
|
<name>OUT0</name>
|
|
<description>Random Number Lower Word Readout Value</description>
|
|
<addressOffset>0</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>VALUE_31_0</name>
|
|
<description>VALUE_31_0</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>OUT1</name>
|
|
<description>Random Number Upper Word Readout Value</description>
|
|
<addressOffset>4</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>VALUE_63_32</name>
|
|
<description>VALUE_63_32</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IRQFLAGSTAT</name>
|
|
<description>Interrupt Status
|
|
|
|
</description>
|
|
<addressOffset>8</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>NEED_CLOCK</name>
|
|
<description>NEED_CLOCK</description>
|
|
<bitRange>[31:31]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SHUTDOWN_OVF</name>
|
|
<description>SHUTDOWN_OVF</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RDY</name>
|
|
<description>RDY</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IRQFLAGMASK</name>
|
|
<description>Interrupt Mask</description>
|
|
<addressOffset>12</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SHUTDOWN_OVF</name>
|
|
<description>SHUTDOWN_OVF</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RDY</name>
|
|
<description>RDY</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IRQFLAGCLR</name>
|
|
<description>Interrupt Flag Clear</description>
|
|
<addressOffset>16</addressOffset>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SHUTDOWN_OVF</name>
|
|
<description>SHUTDOWN_OVF</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RDY</name>
|
|
<description>RDY</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CTL</name>
|
|
<description>Control</description>
|
|
<addressOffset>20</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>STARTUP_CYCLES</name>
|
|
<description>STARTUP_CYCLES</description>
|
|
<bitRange>[31:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TRNG_EN</name>
|
|
<description>TRNG_EN</description>
|
|
<bitRange>[10:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>NO_LFSR_FB</name>
|
|
<description>NO_LFSR_FB</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TEST_MODE</name>
|
|
<description>TEST_MODE</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CFG0</name>
|
|
<description>Configuration 0</description>
|
|
<addressOffset>24</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>MAX_REFILL_CYCLES</name>
|
|
<description>MAX_REFILL_CYCLES</description>
|
|
<bitRange>[31:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SMPL_DIV</name>
|
|
<description>SMPL_DIV</description>
|
|
<bitRange>[11:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>MIN_REFILL_CYCLES</name>
|
|
<description>MIN_REFILL_CYCLES</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>ALARMCNT</name>
|
|
<description>Alarm Control
|
|
|
|
</description>
|
|
<addressOffset>28</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x000000ff</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SHUTDOWN_CNT</name>
|
|
<description>SHUTDOWN_CNT</description>
|
|
<bitRange>[29:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SHUTDOWN_THR</name>
|
|
<description>SHUTDOWN_THR</description>
|
|
<bitRange>[20:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>ALARM_THR</name>
|
|
<description>ALARM_THR</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FROEN</name>
|
|
<description>FRO Enable</description>
|
|
<addressOffset>32</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00ffffff</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FRO_MASK</name>
|
|
<description>FRO_MASK</description>
|
|
<bitRange>[23:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FRODETUNE</name>
|
|
<description>FRO De-tune Bit</description>
|
|
<addressOffset>36</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FRO_MASK</name>
|
|
<description>FRO_MASK</description>
|
|
<bitRange>[23:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>ALARMMASK</name>
|
|
<description>Alarm Event</description>
|
|
<addressOffset>40</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FRO_MASK</name>
|
|
<description>FRO_MASK</description>
|
|
<bitRange>[23:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>ALARMSTOP</name>
|
|
<description>Alarm Shutdown</description>
|
|
<addressOffset>44</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>FRO_FLAGS</name>
|
|
<description>FRO_FLAGS</description>
|
|
<bitRange>[23:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>LFSR0</name>
|
|
<description>LFSR Readout Value</description>
|
|
<addressOffset>48</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LFSR_31_0</name>
|
|
<description>LFSR_31_0</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>LFSR1</name>
|
|
<description>LFSR Readout Value</description>
|
|
<addressOffset>52</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LFSR_63_32</name>
|
|
<description>LFSR_63_32</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>LFSR2</name>
|
|
<description>LFSR Readout Value</description>
|
|
<addressOffset>56</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>LFSR_80_64</name>
|
|
<description>LFSR_80_64</description>
|
|
<bitRange>[16:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>HWOPT</name>
|
|
<description>TRNG Engine Options Information</description>
|
|
<addressOffset>120</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000600</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>NR_OF_FROS</name>
|
|
<description>NR_OF_FROS</description>
|
|
<bitRange>[11:6]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>HWVER0</name>
|
|
<description>HW Version 0
|
|
EIP Number And Core Revision</description>
|
|
<addressOffset>124</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x0200b44b</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>HW_MAJOR_VER</name>
|
|
<description>HW_MAJOR_VER</description>
|
|
<bitRange>[27:24]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>HW_MINOR_VER</name>
|
|
<description>HW_MINOR_VER</description>
|
|
<bitRange>[23:20]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>HW_PATCH_LVL</name>
|
|
<description>HW_PATCH_LVL</description>
|
|
<bitRange>[19:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EIP_NUM_COMPL</name>
|
|
<description>EIP_NUM_COMPL</description>
|
|
<bitRange>[15:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EIP_NUM</name>
|
|
<description>EIP_NUM</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IRQSTATMASK</name>
|
|
<description>Interrupt Status After Masking</description>
|
|
<addressOffset>8152</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SHUTDOWN_OVF</name>
|
|
<description>SHUTDOWN_OVF</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RDY</name>
|
|
<description>RDY</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>HWVER1</name>
|
|
<description>HW Version 1
|
|
TRNG Revision Number</description>
|
|
<addressOffset>8160</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000020</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>REV</name>
|
|
<description>REV</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IRQSET</name>
|
|
<description>Interrupt Set</description>
|
|
<addressOffset>8172</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SWRESET</name>
|
|
<description>SW Reset Control
|
|
|
|
</description>
|
|
<addressOffset>8176</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>RESET</name>
|
|
<description>RESET</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IRQSTAT</name>
|
|
<description>Interrupt Status</description>
|
|
<addressOffset>8184</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>STAT</name>
|
|
<description>STAT</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral><peripheral>
|
|
<name>UART0</name>
|
|
<description>Universal Asynchronous Receiver/Transmitter (UART) interface
|
|
|
|
</description>
|
|
<baseAddress>0x40001000</baseAddress>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x1000</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<registers>
|
|
<register>
|
|
<name>DR</name>
|
|
<description>Data
|
|
For words to be transmitted:
|
|
- if the FIFOs are enabled (LCRH.FEN = 1), data written to this location is pushed onto the transmit FIFO
|
|
- if the FIFOs are not enabled (LCRH.FEN = 0), data is stored in the transmitter holding register (the bottom word of the transmit FIFO).
|
|
The write operation initiates transmission from the UART. The data is prefixed with a start bit, appended with the appropriate parity bit (if parity is enabled), and a stop bit.
|
|
The resultant word is then transmitted.
|
|
For received words:
|
|
- if the FIFOs are enabled (LCRH.FEN = 1), the data byte and the 4-bit status (break, frame, parity, and overrun) is pushed onto the 12-bit wide receive FIFO
|
|
- if the FIFOs are not enabled (LCRH.FEN = 0), the data byte and status are stored in the receiving holding register (the bottom word of the receive FIFO).
|
|
The received data byte is read by performing reads from this register along with the corresponding status information. The status information can also be read by a read of the RSR register.</description>
|
|
<addressOffset>0</addressOffset>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>OE</name>
|
|
<description>OE</description>
|
|
<bitRange>[11:11]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>BE</name>
|
|
<description>BE</description>
|
|
<bitRange>[10:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PE</name>
|
|
<description>PE</description>
|
|
<bitRange>[9:9]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>FE</name>
|
|
<description>FE</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DATA</name>
|
|
<description>DATA</description>
|
|
<bitRange>[7:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RSR</name>
|
|
<description>Status
|
|
This register is mapped to the same address as ECR register. Reads from this address are associated with RSR register and return the receive status. Writes to this address are associated with ECR register and clear the receive status flags (framing, parity, break, and overrun errors).
|
|
If the status is read from this register, then the status information for break, framing and parity corresponds to the data character read from the Data Register, DR prior to reading the RSR. The status information for overrun is set immediately when an overrun condition occurs.</description>
|
|
<addressOffset>4</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>OE</name>
|
|
<description>OE</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>BE</name>
|
|
<description>BE</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PE</name>
|
|
<description>PE</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>FE</name>
|
|
<description>FE</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>ECR</name>
|
|
<description>Error Clear
|
|
This register is mapped to the same address as RSR register. Reads from this address are associated with RSR register and return the receive status. Writes to this address are associated with ECR register and clear the receive status flags (framing, parity, break, and overrun errors).</description>
|
|
<addressOffset>4</addressOffset>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>OE</name>
|
|
<description>OE</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>BE</name>
|
|
<description>BE</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PE</name>
|
|
<description>PE</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>FE</name>
|
|
<description>FE</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
<alternateRegister>RSR</alternateRegister></register>
|
|
<register>
|
|
<name>FR</name>
|
|
<description>Flag
|
|
Reads from this register return the UART flags.</description>
|
|
<addressOffset>24</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000090</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TXFE</name>
|
|
<description>TXFE</description>
|
|
<bitRange>[7:7]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RXFF</name>
|
|
<description>RXFF</description>
|
|
<bitRange>[6:6]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TXFF</name>
|
|
<description>TXFF</description>
|
|
<bitRange>[5:5]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RXFE</name>
|
|
<description>RXFE</description>
|
|
<bitRange>[4:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>BUSY</name>
|
|
<description>BUSY</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CTS</name>
|
|
<description>CTS</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IBRD</name>
|
|
<description>Integer Baud-Rate Divisor
|
|
If this register is modified while trasmission or reception is on-going, the baudrate will not be updated until transmission or reception of the current character is complete.</description>
|
|
<addressOffset>36</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DIVINT</name>
|
|
<description>DIVINT</description>
|
|
<bitRange>[15:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FBRD</name>
|
|
<description>Fractional Baud-Rate Divisor
|
|
If this register is modified while trasmission or reception is on-going, the baudrate will not be updated until transmission or reception of the current character is complete.</description>
|
|
<addressOffset>40</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DIVFRAC</name>
|
|
<description>DIVFRAC</description>
|
|
<bitRange>[5:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>LCRH</name>
|
|
<description>Line Control</description>
|
|
<addressOffset>44</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>SPS</name>
|
|
<description>SPS</description>
|
|
<bitRange>[7:7]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>WLEN</name>
|
|
<description>WLEN</description>
|
|
<bitRange>[6:5]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>FEN</name>
|
|
<description>FEN</description>
|
|
<bitRange>[4:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>STP2</name>
|
|
<description>STP2</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>EPS</name>
|
|
<description>EPS</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PEN</name>
|
|
<description>PEN</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>BRK</name>
|
|
<description>BRK</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CTL</name>
|
|
<description>Control</description>
|
|
<addressOffset>48</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000300</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CTSEN</name>
|
|
<description>CTSEN</description>
|
|
<bitRange>[15:15]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RTSEN</name>
|
|
<description>RTSEN</description>
|
|
<bitRange>[14:14]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RTS</name>
|
|
<description>RTS</description>
|
|
<bitRange>[11:11]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RXE</name>
|
|
<description>RXE</description>
|
|
<bitRange>[9:9]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TXE</name>
|
|
<description>TXE</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>LBE</name>
|
|
<description>LBE</description>
|
|
<bitRange>[7:7]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>UARTEN</name>
|
|
<description>UARTEN</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IFLS</name>
|
|
<description>Interrupt FIFO Level Select</description>
|
|
<addressOffset>52</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000012</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>RXSEL</name>
|
|
<description>RXSEL</description>
|
|
<bitRange>[5:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TXSEL</name>
|
|
<description>TXSEL</description>
|
|
<bitRange>[2:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IMSC</name>
|
|
<description>Interrupt Mask Set/Clear</description>
|
|
<addressOffset>56</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>OEIM</name>
|
|
<description>OEIM</description>
|
|
<bitRange>[10:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>BEIM</name>
|
|
<description>BEIM</description>
|
|
<bitRange>[9:9]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PEIM</name>
|
|
<description>PEIM</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>FEIM</name>
|
|
<description>FEIM</description>
|
|
<bitRange>[7:7]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RTIM</name>
|
|
<description>RTIM</description>
|
|
<bitRange>[6:6]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TXIM</name>
|
|
<description>TXIM</description>
|
|
<bitRange>[5:5]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RXIM</name>
|
|
<description>RXIM</description>
|
|
<bitRange>[4:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CTSMIM</name>
|
|
<description>CTSMIM</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RIS</name>
|
|
<description>Raw Interrupt Status</description>
|
|
<addressOffset>60</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x0000000d</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>OERIS</name>
|
|
<description>OERIS</description>
|
|
<bitRange>[10:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>BERIS</name>
|
|
<description>BERIS</description>
|
|
<bitRange>[9:9]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PERIS</name>
|
|
<description>PERIS</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>FERIS</name>
|
|
<description>FERIS</description>
|
|
<bitRange>[7:7]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RTRIS</name>
|
|
<description>RTRIS</description>
|
|
<bitRange>[6:6]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TXRIS</name>
|
|
<description>TXRIS</description>
|
|
<bitRange>[5:5]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RXRIS</name>
|
|
<description>RXRIS</description>
|
|
<bitRange>[4:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CTSRMIS</name>
|
|
<description>CTSRMIS</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>MIS</name>
|
|
<description>Masked Interrupt Status</description>
|
|
<addressOffset>64</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>OEMIS</name>
|
|
<description>OEMIS</description>
|
|
<bitRange>[10:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>BEMIS</name>
|
|
<description>BEMIS</description>
|
|
<bitRange>[9:9]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PEMIS</name>
|
|
<description>PEMIS</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>FEMIS</name>
|
|
<description>FEMIS</description>
|
|
<bitRange>[7:7]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RTMIS</name>
|
|
<description>RTMIS</description>
|
|
<bitRange>[6:6]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TXMIS</name>
|
|
<description>TXMIS</description>
|
|
<bitRange>[5:5]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RXMIS</name>
|
|
<description>RXMIS</description>
|
|
<bitRange>[4:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CTSMMIS</name>
|
|
<description>CTSMMIS</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>ICR</name>
|
|
<description>Interrupt Clear
|
|
On a write of 1, the corresponding interrupt is cleared. A write of 0 has no effect.</description>
|
|
<addressOffset>68</addressOffset>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>OEIC</name>
|
|
<description>OEIC</description>
|
|
<bitRange>[10:10]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>BEIC</name>
|
|
<description>BEIC</description>
|
|
<bitRange>[9:9]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PEIC</name>
|
|
<description>PEIC</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>FEIC</name>
|
|
<description>FEIC</description>
|
|
<bitRange>[7:7]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RTIC</name>
|
|
<description>RTIC</description>
|
|
<bitRange>[6:6]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TXIC</name>
|
|
<description>TXIC</description>
|
|
<bitRange>[5:5]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RXIC</name>
|
|
<description>RXIC</description>
|
|
<bitRange>[4:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CTSMIC</name>
|
|
<description>CTSMIC</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DMACTL</name>
|
|
<description>DMA Control</description>
|
|
<addressOffset>72</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>DMAONERR</name>
|
|
<description>DMAONERR</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TXDMAE</name>
|
|
<description>TXDMAE</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RXDMAE</name>
|
|
<description>RXDMAE</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral><peripheral>
|
|
<name>UDMA0</name>
|
|
<description>ARM Micro Direct Memory Access Controller
|
|
|
|
</description>
|
|
<baseAddress>0x40020000</baseAddress>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x1000</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<registers>
|
|
<register>
|
|
<name>STATUS</name>
|
|
<description>Status</description>
|
|
<addressOffset>0</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x001f0000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>TEST</name>
|
|
<description>TEST</description>
|
|
<bitRange>[31:28]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TOTALCHANNELS</name>
|
|
<description>TOTALCHANNELS</description>
|
|
<bitRange>[20:16]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>STATE</name>
|
|
<description>STATE</description>
|
|
<bitRange>[7:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>MASTERENABLE</name>
|
|
<description>MASTERENABLE</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CFG</name>
|
|
<description>Configuration</description>
|
|
<addressOffset>4</addressOffset>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>PRTOCTRL</name>
|
|
<description>PRTOCTRL</description>
|
|
<bitRange>[7:5]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>MASTERENABLE</name>
|
|
<description>MASTERENABLE</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CTRL</name>
|
|
<description>Channel Control Data Base Pointer</description>
|
|
<addressOffset>8</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>BASEPTR</name>
|
|
<description>BASEPTR</description>
|
|
<bitRange>[31:10]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>ALTCTRL</name>
|
|
<description>Channel Alternate Control Data Base Pointer</description>
|
|
<addressOffset>12</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000200</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>BASEPTR</name>
|
|
<description>BASEPTR</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>WAITONREQ</name>
|
|
<description>Channel Wait On Request Status
|
|
|
|
</description>
|
|
<addressOffset>16</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0xffff1eff</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CHNLSTATUS</name>
|
|
<description>CHNLSTATUS</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SOFTREQ</name>
|
|
<description>Channel Software Request</description>
|
|
<addressOffset>20</addressOffset>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CHNLS</name>
|
|
<description>CHNLS</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SETBURST</name>
|
|
<description>Channel Set UseBurst</description>
|
|
<addressOffset>24</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CHNLS</name>
|
|
<description>CHNLS</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLEARBURST</name>
|
|
<description>Channel Clear UseBurst</description>
|
|
<addressOffset>28</addressOffset>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CHNLS</name>
|
|
<description>CHNLS</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SETREQMASK</name>
|
|
<description>Channel Set Request Mask</description>
|
|
<addressOffset>32</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CHNLS</name>
|
|
<description>CHNLS</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLEARREQMASK</name>
|
|
<description>Clear Channel Request Mask</description>
|
|
<addressOffset>36</addressOffset>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CHNLS</name>
|
|
<description>CHNLS</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SETCHANNELEN</name>
|
|
<description>Set Channel Enable</description>
|
|
<addressOffset>40</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CHNLS</name>
|
|
<description>CHNLS</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLEARCHANNELEN</name>
|
|
<description>Clear Channel Enable</description>
|
|
<addressOffset>44</addressOffset>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CHNLS</name>
|
|
<description>CHNLS</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SETCHNLPRIALT</name>
|
|
<description>Channel Set Primary-Alternate</description>
|
|
<addressOffset>48</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CHNLS</name>
|
|
<description>CHNLS</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLEARCHNLPRIALT</name>
|
|
<description>Channel Clear Primary-Alternate</description>
|
|
<addressOffset>52</addressOffset>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CHNLS</name>
|
|
<description>CHNLS</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SETCHNLPRIORITY</name>
|
|
<description>Set Channel Priority</description>
|
|
<addressOffset>56</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CHNLS</name>
|
|
<description>CHNLS</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLEARCHNLPRIORITY</name>
|
|
<description>Clear Channel Priority</description>
|
|
<addressOffset>60</addressOffset>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CHNLS</name>
|
|
<description>CHNLS</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>ERROR</name>
|
|
<description>Error Status and Clear</description>
|
|
<addressOffset>76</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>STATUS</name>
|
|
<description>STATUS</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REQDONE</name>
|
|
<description>Channel Request Done</description>
|
|
<addressOffset>1284</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CHNLS</name>
|
|
<description>CHNLS</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DONEMASK</name>
|
|
<description>Channel Request Done Mask</description>
|
|
<addressOffset>1312</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CHNLS</name>
|
|
<description>CHNLS</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral><peripheral>
|
|
<name>VIMS</name>
|
|
<description>Versatile Instruction Memory System
|
|
Controls memory access to the Flash and encapsulates the following instruction memories:
|
|
- Boot ROM
|
|
- Cache / GPRAM
|
|
</description>
|
|
<baseAddress>0x40034000</baseAddress>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x400</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<registers>
|
|
<register>
|
|
<name>STAT</name>
|
|
<description>Status
|
|
Displays current VIMS mode and line buffer status</description>
|
|
<addressOffset>0</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>IDCODE_LB_DIS</name>
|
|
<description>IDCODE_LB_DIS</description>
|
|
<bitRange>[5:5]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SYSBUS_LB_DIS</name>
|
|
<description>SYSBUS_LB_DIS</description>
|
|
<bitRange>[4:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>MODE_CHANGING</name>
|
|
<description>MODE_CHANGING</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>INV</name>
|
|
<description>INV</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>MODE</name>
|
|
<description>MODE</description>
|
|
<bitRange>[1:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CTL</name>
|
|
<description>Control
|
|
Configure VIMS mode and line buffer settings</description>
|
|
<addressOffset>4</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>STATS_CLR</name>
|
|
<description>STATS_CLR</description>
|
|
<bitRange>[31:31]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>STATS_EN</name>
|
|
<description>STATS_EN</description>
|
|
<bitRange>[30:30]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>DYN_CG_EN</name>
|
|
<description>DYN_CG_EN</description>
|
|
<bitRange>[29:29]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>IDCODE_LB_DIS</name>
|
|
<description>IDCODE_LB_DIS</description>
|
|
<bitRange>[5:5]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>SYSBUS_LB_DIS</name>
|
|
<description>SYSBUS_LB_DIS</description>
|
|
<bitRange>[4:4]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>ARB_CFG</name>
|
|
<description>ARB_CFG</description>
|
|
<bitRange>[3:3]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>PREF_EN</name>
|
|
<description>PREF_EN</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>MODE</name>
|
|
<description>MODE</description>
|
|
<bitRange>[1:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral><peripheral>
|
|
<name>WDT</name>
|
|
<description>Watchdog Timer
|
|
|
|
</description>
|
|
<baseAddress>0x40080000</baseAddress>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x1000</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<registers>
|
|
<register>
|
|
<name>LOAD</name>
|
|
<description>Configuration</description>
|
|
<addressOffset>0</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0xffffffff</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>WDTLOAD</name>
|
|
<description>WDTLOAD</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>VALUE</name>
|
|
<description>Current Count Value</description>
|
|
<addressOffset>4</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0xffffffff</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>WDTVALUE</name>
|
|
<description>WDTVALUE</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CTL</name>
|
|
<description>Control</description>
|
|
<addressOffset>8</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>INTTYPE</name>
|
|
<description>INTTYPE</description>
|
|
<bitRange>[2:2]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>RESEN</name>
|
|
<description>RESEN</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>INTEN</name>
|
|
<description>INTEN</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>ICR</name>
|
|
<description>Interrupt Clear</description>
|
|
<addressOffset>12</addressOffset>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>WDTICR</name>
|
|
<description>WDTICR</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RIS</name>
|
|
<description>Raw Interrupt Status</description>
|
|
<addressOffset>16</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>WDTRIS</name>
|
|
<description>WDTRIS</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>MIS</name>
|
|
<description>Masked Interrupt Status</description>
|
|
<addressOffset>20</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>WDTMIS</name>
|
|
<description>WDTMIS</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TEST</name>
|
|
<description>Test Mode
|
|
|
|
</description>
|
|
<addressOffset>1048</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>STALL</name>
|
|
<description>STALL</description>
|
|
<bitRange>[8:8]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>TEST_EN</name>
|
|
<description>TEST_EN</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>INT_CAUS</name>
|
|
<description>Interrupt Cause Test Mode
|
|
|
|
</description>
|
|
<addressOffset>1052</addressOffset>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>CAUSE_RESET</name>
|
|
<description>CAUSE_RESET</description>
|
|
<bitRange>[1:1]</bitRange>
|
|
</field>
|
|
<field>
|
|
<name>CAUSE_INTR</name>
|
|
<description>CAUSE_INTR</description>
|
|
<bitRange>[0:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>LOCK</name>
|
|
<description>Lock
|
|
|
|
</description>
|
|
<addressOffset>3072</addressOffset>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<fields>
|
|
<field>
|
|
<name>WDTLOCK</name>
|
|
<description>WDTLOCK</description>
|
|
<bitRange>[31:0]</bitRange>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral></peripherals>
|
|
</device>
|