37159 lines
1.5 MiB
37159 lines
1.5 MiB
<?xml version="1.0" encoding="utf-8"?>
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<device xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" schemaVersion="1.3" xs:noNamespaceSchemaLocation="CMSIS-SVD.xsd">
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<name>EFM32G842F32</name>
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<version>4.0.0</version>
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<description>Silicon Labs EFM32G842F32 Cortex-M MCU</description>
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<licenseText>
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*******************************************************************************\n
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* # License \n
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* Copyright 2021 Silicon Laboratories Inc. www.silabs.com \n
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*******************************************************************************\n
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* \n
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* SPDX-License-Identifier: Zlib \n
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* \n
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* The licensor of this software is Silicon Laboratories Inc. \n
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* \n
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* This software is provided 'as-is', without any express or implied \n
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* warranty. In no event will the authors be held liable for any damages \n
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* arising from the use of this software. \n
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* \n
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* Permission is granted to anyone to use this software for any purpose, \n
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* including commercial applications, and to alter it and redistribute it \n
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* freely, subject to the following restrictions: \n
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* \n
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* 1. The origin of this software must not be misrepresented; you must not \n
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* claim that you wrote the original software. If you use this software \n
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* in a product, an acknowledgment in the product documentation would be \n
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* appreciated but is not required. \n
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* 2. Altered source versions must be plainly marked as such, and must not be \n
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* misrepresented as being the original software. \n
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* 3. This notice may not be removed or altered from any source distribution. \n
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* \n
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*******************************************************************************
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</licenseText>
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<cpu>
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<name>CM3</name>
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<revision>r2p0</revision>
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<endian>little</endian>
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<mpuPresent>true</mpuPresent>
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<fpuPresent>false</fpuPresent>
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<nvicPrioBits>3</nvicPrioBits>
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<vendorSystickConfig>false</vendorSystickConfig>
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</cpu>
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<addressUnitBits>8</addressUnitBits>
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<width>32</width>
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<peripherals>
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<peripheral>
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<name>AES</name>
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<description>AES</description>
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<baseAddress>0x400E0000</baseAddress>
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<addressBlock>
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<offset>0</offset>
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<size>0x00000400</size>
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<usage>registers</usage>
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</addressBlock>
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<interrupt>
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<name>AES</name>
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<value>29</value>
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</interrupt>
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<registers>
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<register>
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<name>CTRL</name>
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<description>Control Register</description>
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<addressOffset>0x000</addressOffset>
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<size>32</size>
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<access>read-write</access>
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<resetValue>0x00000000</resetValue>
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<resetMask>0x00000037</resetMask>
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<fields>
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<field>
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<name>DECRYPT</name>
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<description>Decryption/Encryption Mode</description>
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<bitOffset>0</bitOffset>
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<bitWidth>1</bitWidth>
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<access>read-write</access>
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</field>
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<field>
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<name>AES256</name>
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<description>AES-256 Mode</description>
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<bitOffset>1</bitOffset>
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<bitWidth>1</bitWidth>
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<access>read-write</access>
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</field>
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<field>
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<name>KEYBUFEN</name>
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<description>Key Buffer Enable</description>
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<bitOffset>2</bitOffset>
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<bitWidth>1</bitWidth>
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<access>read-write</access>
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</field>
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<field>
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<name>DATASTART</name>
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<description>AES_DATA Write Start</description>
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<bitOffset>4</bitOffset>
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<bitWidth>1</bitWidth>
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<access>read-write</access>
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</field>
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<field>
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<name>XORSTART</name>
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<description>AES_XORDATA Write Start</description>
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<bitOffset>5</bitOffset>
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<bitWidth>1</bitWidth>
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<access>read-write</access>
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</field>
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</fields>
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</register>
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<register>
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<name>CMD</name>
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<description>Command Register</description>
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<addressOffset>0x004</addressOffset>
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<size>32</size>
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<access>write-only</access>
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<resetValue>0x00000000</resetValue>
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<resetMask>0x00000003</resetMask>
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<fields>
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<field>
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<name>START</name>
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<description>Encryption/Decryption Start</description>
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<bitOffset>0</bitOffset>
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<bitWidth>1</bitWidth>
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<access>write-only</access>
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</field>
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<field>
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<name>STOP</name>
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<description>Encryption/Decryption Stop</description>
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<bitOffset>1</bitOffset>
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<bitWidth>1</bitWidth>
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<access>write-only</access>
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</field>
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</fields>
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</register>
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<register>
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<name>STATUS</name>
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<description>Status Register</description>
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<addressOffset>0x008</addressOffset>
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<size>32</size>
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<access>read-only</access>
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<resetValue>0x00000000</resetValue>
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<resetMask>0x00000001</resetMask>
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<fields>
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<field>
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<name>RUNNING</name>
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<description>AES Running</description>
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<bitOffset>0</bitOffset>
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<bitWidth>1</bitWidth>
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<access>read-only</access>
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</field>
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</fields>
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</register>
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<register>
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<name>IEN</name>
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<description>Interrupt Enable Register</description>
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<addressOffset>0x00C</addressOffset>
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<size>32</size>
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<access>read-write</access>
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<resetValue>0x00000000</resetValue>
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<resetMask>0x00000001</resetMask>
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<fields>
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<field>
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<name>DONE</name>
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<description>Encryption/Decryption Done Interrupt Enable</description>
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<bitOffset>0</bitOffset>
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<bitWidth>1</bitWidth>
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<access>read-write</access>
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</field>
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</fields>
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</register>
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<register>
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<name>IF</name>
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<description>Interrupt Flag Register</description>
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<addressOffset>0x010</addressOffset>
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<size>32</size>
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<access>read-only</access>
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<resetValue>0x00000000</resetValue>
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<resetMask>0x00000001</resetMask>
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<fields>
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<field>
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<name>DONE</name>
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<description>Encryption/Decryption Done Interrupt Flag</description>
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<bitOffset>0</bitOffset>
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<bitWidth>1</bitWidth>
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<access>read-only</access>
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</field>
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</fields>
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</register>
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<register>
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<name>IFS</name>
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<description>Interrupt Flag Set Register</description>
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<addressOffset>0x014</addressOffset>
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<size>32</size>
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<access>write-only</access>
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<resetValue>0x00000000</resetValue>
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<resetMask>0x00000001</resetMask>
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<fields>
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<field>
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<name>DONE</name>
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<description>Encryption/Decryption Done Interrupt Flag Set</description>
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<bitOffset>0</bitOffset>
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<bitWidth>1</bitWidth>
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<access>write-only</access>
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</field>
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</fields>
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</register>
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<register>
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<name>IFC</name>
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<description>Interrupt Flag Clear Register</description>
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<addressOffset>0x018</addressOffset>
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<size>32</size>
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<access>write-only</access>
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<resetValue>0x00000000</resetValue>
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<resetMask>0x00000001</resetMask>
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<fields>
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<field>
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<name>DONE</name>
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<description>Encryption/Decryption Done Interrupt Flag Clear</description>
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<bitOffset>0</bitOffset>
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<bitWidth>1</bitWidth>
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<access>write-only</access>
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</field>
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</fields>
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</register>
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<register>
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<name>DATA</name>
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<description>DATA Register</description>
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<addressOffset>0x01C</addressOffset>
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<size>32</size>
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<access>read-write</access>
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<resetValue>0x00000000</resetValue>
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<resetMask>0xFFFFFFFF</resetMask>
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<readAction>modifyExternal</readAction>
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<fields>
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<field>
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<name>DATA</name>
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<description>Data Access</description>
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<bitOffset>0</bitOffset>
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<bitWidth>32</bitWidth>
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<access>read-write</access>
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</field>
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</fields>
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</register>
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<register>
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<name>XORDATA</name>
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<description>XORDATA Register</description>
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<addressOffset>0x020</addressOffset>
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<size>32</size>
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<access>read-write</access>
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<resetValue>0x00000000</resetValue>
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<resetMask>0xFFFFFFFF</resetMask>
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<readAction>modifyExternal</readAction>
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<fields>
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<field>
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<name>XORDATA</name>
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<description>XOR Data Access</description>
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<bitOffset>0</bitOffset>
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<bitWidth>32</bitWidth>
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<access>read-write</access>
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</field>
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</fields>
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</register>
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<register>
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<name>KEYLA</name>
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<description>KEY Low Register</description>
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<addressOffset>0x030</addressOffset>
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<size>32</size>
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<access>read-write</access>
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<resetValue>0x00000000</resetValue>
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<resetMask>0xFFFFFFFF</resetMask>
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<readAction>modifyExternal</readAction>
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<fields>
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<field>
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<name>KEYLA</name>
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<description>Key Low Access A</description>
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<bitOffset>0</bitOffset>
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<bitWidth>32</bitWidth>
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<access>read-write</access>
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</field>
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</fields>
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</register>
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<register>
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<name>KEYLB</name>
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<description>KEY Low Register</description>
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<addressOffset>0x034</addressOffset>
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<size>32</size>
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<access>read-write</access>
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<resetValue>0x00000000</resetValue>
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<resetMask>0xFFFFFFFF</resetMask>
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<readAction>modifyExternal</readAction>
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<fields>
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<field>
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<name>KEYLB</name>
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<description>Key Low Access B</description>
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<bitOffset>0</bitOffset>
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<bitWidth>32</bitWidth>
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<access>read-write</access>
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</field>
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</fields>
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</register>
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<register>
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<name>KEYLC</name>
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<description>KEY Low Register</description>
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<addressOffset>0x038</addressOffset>
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<size>32</size>
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<access>read-write</access>
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<resetValue>0x00000000</resetValue>
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<resetMask>0xFFFFFFFF</resetMask>
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<readAction>modifyExternal</readAction>
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<fields>
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<field>
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<name>KEYLC</name>
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<description>Key Low Access C</description>
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<bitOffset>0</bitOffset>
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<bitWidth>32</bitWidth>
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<access>read-write</access>
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</field>
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</fields>
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</register>
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<register>
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<name>KEYLD</name>
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<description>KEY Low Register</description>
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<addressOffset>0x03C</addressOffset>
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<size>32</size>
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<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0xFFFFFFFF</resetMask>
|
|
<readAction>modifyExternal</readAction>
|
|
<fields>
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|
<field>
|
|
<name>KEYLD</name>
|
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<description>Key Low Access D</description>
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<bitOffset>0</bitOffset>
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<bitWidth>32</bitWidth>
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<access>read-write</access>
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</field>
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</fields>
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</register>
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<register>
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<name>KEYHA</name>
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<description>KEY High Register</description>
|
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<addressOffset>0x040</addressOffset>
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|
<size>32</size>
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<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
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<resetMask>0xFFFFFFFF</resetMask>
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<readAction>modifyExternal</readAction>
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|
<fields>
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|
<field>
|
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<name>KEYHA</name>
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<description>Key High Access A</description>
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<bitOffset>0</bitOffset>
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<bitWidth>32</bitWidth>
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<access>read-write</access>
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</field>
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</fields>
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</register>
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<register>
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<name>KEYHB</name>
|
|
<description>KEY High Register</description>
|
|
<addressOffset>0x044</addressOffset>
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|
<size>32</size>
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<access>read-write</access>
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|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0xFFFFFFFF</resetMask>
|
|
<readAction>modifyExternal</readAction>
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|
<fields>
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<field>
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<name>KEYHB</name>
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<description>Key High Access B</description>
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<bitOffset>0</bitOffset>
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<bitWidth>32</bitWidth>
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<access>read-write</access>
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</field>
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|
</fields>
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|
</register>
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|
<register>
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|
<name>KEYHC</name>
|
|
<description>KEY High Register</description>
|
|
<addressOffset>0x048</addressOffset>
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|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0xFFFFFFFF</resetMask>
|
|
<readAction>modifyExternal</readAction>
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|
<fields>
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|
<field>
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|
<name>KEYHC</name>
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<description>Key High Access C</description>
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<bitOffset>0</bitOffset>
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<bitWidth>32</bitWidth>
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<access>read-write</access>
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</field>
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</fields>
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</register>
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<register>
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<name>KEYHD</name>
|
|
<description>KEY High Register</description>
|
|
<addressOffset>0x04C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0xFFFFFFFF</resetMask>
|
|
<readAction>modifyExternal</readAction>
|
|
<fields>
|
|
<field>
|
|
<name>KEYHD</name>
|
|
<description>Key High Access D</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>32</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
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</register>
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</registers>
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</peripheral>
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<peripheral>
|
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<name>DMA</name>
|
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<description>DMA</description>
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<baseAddress>0x400C2000</baseAddress>
|
|
<addressBlock>
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<offset>0</offset>
|
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<size>0x00002000</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<interrupt>
|
|
<name>DMA</name>
|
|
<value>0</value>
|
|
</interrupt>
|
|
<registers>
|
|
<register>
|
|
<name>STATUS</name>
|
|
<description>DMA Status Registers</description>
|
|
<addressOffset>0x000</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x10070000</resetValue>
|
|
<resetMask>0x001F00F1</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>EN</name>
|
|
<description>DMA Enable Status</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>STATE</name>
|
|
<description>Control Current State</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-only</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>IDLE</name>
|
|
<description>Idle</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>RDCHCTRLDATA</name>
|
|
<description>Reading channel controller data</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>RDSRCENDPTR</name>
|
|
<description>Reading source data end pointer</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>RDDSTENDPTR</name>
|
|
<description>Reading destination data end pointer</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>RDSRCDATA</name>
|
|
<description>Reading source data</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WRDSTDATA</name>
|
|
<description>Writing destination data</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WAITREQCLR</name>
|
|
<description>Waiting for DMA request to clear</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WRCHCTRLDATA</name>
|
|
<description>Writing channel controller data</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>STALLED</name>
|
|
<description>Stalled</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DONE</name>
|
|
<description>Done</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PERSCATTRANS</name>
|
|
<description>Peripheral scatter-gather transition</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>CHNUM</name>
|
|
<description>Channel Number</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>5</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CONFIG</name>
|
|
<description>DMA Configuration Register</description>
|
|
<addressOffset>0x004</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000021</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>EN</name>
|
|
<description>Enable DMA</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CHPROT</name>
|
|
<description>Channel Protection Control</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CTRLBASE</name>
|
|
<description>Channel Control Data Base Pointer Register</description>
|
|
<addressOffset>0x008</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0xFFFFFFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>CTRLBASE</name>
|
|
<description>Channel Control Data Base Pointer</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>32</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>ALTCTRLBASE</name>
|
|
<description>Channel Alternate Control Data Base Pointer Register</description>
|
|
<addressOffset>0x00C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000080</resetValue>
|
|
<resetMask>0xFFFFFFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>ALTCTRLBASE</name>
|
|
<description>Channel Alternate Control Data Base Pointer</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>32</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CHWAITSTATUS</name>
|
|
<description>Channel Wait on Request Status Register</description>
|
|
<addressOffset>0x010</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x000000FF</resetValue>
|
|
<resetMask>0x000000FF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>CH0WAITSTATUS</name>
|
|
<description>Channel 0 Wait on Request Status</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH1WAITSTATUS</name>
|
|
<description>Channel 1 Wait on Request Status</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH2WAITSTATUS</name>
|
|
<description>Channel 2 Wait on Request Status</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH3WAITSTATUS</name>
|
|
<description>Channel 3 Wait on Request Status</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH4WAITSTATUS</name>
|
|
<description>Channel 4 Wait on Request Status</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH5WAITSTATUS</name>
|
|
<description>Channel 5 Wait on Request Status</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH6WAITSTATUS</name>
|
|
<description>Channel 6 Wait on Request Status</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH7WAITSTATUS</name>
|
|
<description>Channel 7 Wait on Request Status</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CHSWREQ</name>
|
|
<description>Channel Software Request Register</description>
|
|
<addressOffset>0x014</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x000000FF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>CH0SWREQ</name>
|
|
<description>Channel 0 Software Request</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH1SWREQ</name>
|
|
<description>Channel 1 Software Request</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH2SWREQ</name>
|
|
<description>Channel 2 Software Request</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH3SWREQ</name>
|
|
<description>Channel 3 Software Request</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH4SWREQ</name>
|
|
<description>Channel 4 Software Request</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH5SWREQ</name>
|
|
<description>Channel 5 Software Request</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH6SWREQ</name>
|
|
<description>Channel 6 Software Request</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH7SWREQ</name>
|
|
<description>Channel 7 Software Request</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CHUSEBURSTS</name>
|
|
<description>Channel Useburst Set Register</description>
|
|
<addressOffset>0x018</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x000000FF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>CH0USEBURSTS</name>
|
|
<description>Channel 0 Useburst Set</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CH1USEBURSTS</name>
|
|
<description>Channel 1 Useburst Set</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CH2USEBURSTS</name>
|
|
<description>Channel 2 Useburst Set</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CH3USEBURSTS</name>
|
|
<description>Channel 3 Useburst Set</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CH4USEBURSTS</name>
|
|
<description>Channel 4 Useburst Set</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CH5USEBURSTS</name>
|
|
<description>Channel 5 Useburst Set</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CH6USEBURSTS</name>
|
|
<description>Channel 6 Useburst Set</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CH7USEBURSTS</name>
|
|
<description>Channel 7 Useburst Set</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CHUSEBURSTC</name>
|
|
<description>Channel Useburst Clear Register</description>
|
|
<addressOffset>0x01C</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x000000FF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>CH0USEBURSTC</name>
|
|
<description>Channel 0 Useburst Clear</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH1USEBURSTC</name>
|
|
<description>Channel 1 Useburst Clear</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH2USEBURSTC</name>
|
|
<description>Channel 2 Useburst Clear</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH3USEBURSTC</name>
|
|
<description>Channel 3 Useburst Clear</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH4USEBURSTC</name>
|
|
<description>Channel 4 Useburst Clear</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH5USEBURSTC</name>
|
|
<description>Channel 5 Useburst Clear</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH6USEBURSTC</name>
|
|
<description>Channel 6 Useburst Clear</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH7USEBURSTC</name>
|
|
<description>Channel 7 Useburst Clear</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CHREQMASKS</name>
|
|
<description>Channel Request Mask Set Register</description>
|
|
<addressOffset>0x020</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x000000FF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>CH0REQMASKS</name>
|
|
<description>Channel 0 Request Mask Set</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH1REQMASKS</name>
|
|
<description>Channel 1 Request Mask Set</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH2REQMASKS</name>
|
|
<description>Channel 2 Request Mask Set</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH3REQMASKS</name>
|
|
<description>Channel 3 Request Mask Set</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH4REQMASKS</name>
|
|
<description>Channel 4 Request Mask Set</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH5REQMASKS</name>
|
|
<description>Channel 5 Request Mask Set</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH6REQMASKS</name>
|
|
<description>Channel 6 Request Mask Set</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH7REQMASKS</name>
|
|
<description>Channel 7 Request Mask Set</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CHREQMASKC</name>
|
|
<description>Channel Request Mask Clear Register</description>
|
|
<addressOffset>0x024</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x000000FF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>CH0REQMASKC</name>
|
|
<description>Channel 0 Request Mask Clear</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH1REQMASKC</name>
|
|
<description>Channel 1 Request Mask Clear</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH2REQMASKC</name>
|
|
<description>Channel 2 Request Mask Clear</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH3REQMASKC</name>
|
|
<description>Channel 3 Request Mask Clear</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH4REQMASKC</name>
|
|
<description>Channel 4 Request Mask Clear</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH5REQMASKC</name>
|
|
<description>Channel 5 Request Mask Clear</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH6REQMASKC</name>
|
|
<description>Channel 6 Request Mask Clear</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH7REQMASKC</name>
|
|
<description>Channel 7 Request Mask Clear</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CHENS</name>
|
|
<description>Channel Enable Set Register</description>
|
|
<addressOffset>0x028</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x000000FF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>CH0ENS</name>
|
|
<description>Channel 0 Enable Set</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH1ENS</name>
|
|
<description>Channel 1 Enable Set</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH2ENS</name>
|
|
<description>Channel 2 Enable Set</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH3ENS</name>
|
|
<description>Channel 3 Enable Set</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH4ENS</name>
|
|
<description>Channel 4 Enable Set</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH5ENS</name>
|
|
<description>Channel 5 Enable Set</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH6ENS</name>
|
|
<description>Channel 6 Enable Set</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH7ENS</name>
|
|
<description>Channel 7 Enable Set</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CHENC</name>
|
|
<description>Channel Enable Clear Register</description>
|
|
<addressOffset>0x02C</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x000000FF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>CH0ENC</name>
|
|
<description>Channel 0 Enable Clear</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH1ENC</name>
|
|
<description>Channel 1 Enable Clear</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH2ENC</name>
|
|
<description>Channel 2 Enable Clear</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH3ENC</name>
|
|
<description>Channel 3 Enable Clear</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH4ENC</name>
|
|
<description>Channel 4 Enable Clear</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH5ENC</name>
|
|
<description>Channel 5 Enable Clear</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH6ENC</name>
|
|
<description>Channel 6 Enable Clear</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH7ENC</name>
|
|
<description>Channel 7 Enable Clear</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CHALTS</name>
|
|
<description>Channel Alternate Set Register</description>
|
|
<addressOffset>0x030</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x000000FF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>CH0ALTS</name>
|
|
<description>Channel 0 Alternate Structure Set</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH1ALTS</name>
|
|
<description>Channel 1 Alternate Structure Set</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH2ALTS</name>
|
|
<description>Channel 2 Alternate Structure Set</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH3ALTS</name>
|
|
<description>Channel 3 Alternate Structure Set</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH4ALTS</name>
|
|
<description>Channel 4 Alternate Structure Set</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH5ALTS</name>
|
|
<description>Channel 5 Alternate Structure Set</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH6ALTS</name>
|
|
<description>Channel 6 Alternate Structure Set</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH7ALTS</name>
|
|
<description>Channel 7 Alternate Structure Set</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CHALTC</name>
|
|
<description>Channel Alternate Clear Register</description>
|
|
<addressOffset>0x034</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x000000FF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>CH0ALTC</name>
|
|
<description>Channel 0 Alternate Clear</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH1ALTC</name>
|
|
<description>Channel 1 Alternate Clear</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH2ALTC</name>
|
|
<description>Channel 2 Alternate Clear</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH3ALTC</name>
|
|
<description>Channel 3 Alternate Clear</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH4ALTC</name>
|
|
<description>Channel 4 Alternate Clear</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH5ALTC</name>
|
|
<description>Channel 5 Alternate Clear</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH6ALTC</name>
|
|
<description>Channel 6 Alternate Clear</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH7ALTC</name>
|
|
<description>Channel 7 Alternate Clear</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CHPRIS</name>
|
|
<description>Channel Priority Set Register</description>
|
|
<addressOffset>0x038</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x000000FF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>CH0PRIS</name>
|
|
<description>Channel 0 High Priority Set</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH1PRIS</name>
|
|
<description>Channel 1 High Priority Set</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH2PRIS</name>
|
|
<description>Channel 2 High Priority Set</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH3PRIS</name>
|
|
<description>Channel 3 High Priority Set</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH4PRIS</name>
|
|
<description>Channel 4 High Priority Set</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH5PRIS</name>
|
|
<description>Channel 5 High Priority Set</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH6PRIS</name>
|
|
<description>Channel 6 High Priority Set</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH7PRIS</name>
|
|
<description>Channel 7 High Priority Set</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CHPRIC</name>
|
|
<description>Channel Priority Clear Register</description>
|
|
<addressOffset>0x03C</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x000000FF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>CH0PRIC</name>
|
|
<description>Channel 0 High Priority Clear</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH1PRIC</name>
|
|
<description>Channel 1 High Priority Clear</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH2PRIC</name>
|
|
<description>Channel 2 High Priority Clear</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH3PRIC</name>
|
|
<description>Channel 3 High Priority Clear</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH4PRIC</name>
|
|
<description>Channel 4 High Priority Clear</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH5PRIC</name>
|
|
<description>Channel 5 High Priority Clear</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH6PRIC</name>
|
|
<description>Channel 6 High Priority Clear</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH7PRIC</name>
|
|
<description>Channel 7 High Priority Clear</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>ERRORC</name>
|
|
<description>Bus Error Clear Register</description>
|
|
<addressOffset>0x04C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000001</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>ERRORC</name>
|
|
<description>Bus Error Clear</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CHREQSTATUS</name>
|
|
<description>Channel Request Status</description>
|
|
<addressOffset>0xE10</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x000000FF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>CH0REQSTATUS</name>
|
|
<description>Channel 0 Request Status</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH1REQSTATUS</name>
|
|
<description>Channel 1 Request Status</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH2REQSTATUS</name>
|
|
<description>Channel 2 Request Status</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH3REQSTATUS</name>
|
|
<description>Channel 3 Request Status</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH4REQSTATUS</name>
|
|
<description>Channel 4 Request Status</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH5REQSTATUS</name>
|
|
<description>Channel 5 Request Status</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH6REQSTATUS</name>
|
|
<description>Channel 6 Request Status</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH7REQSTATUS</name>
|
|
<description>Channel 7 Request Status</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CHSREQSTATUS</name>
|
|
<description>Channel Single Request Status</description>
|
|
<addressOffset>0xE18</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x000000FF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>CH0SREQSTATUS</name>
|
|
<description>Channel 0 Single Request Status</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH1SREQSTATUS</name>
|
|
<description>Channel 1 Single Request Status</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH2SREQSTATUS</name>
|
|
<description>Channel 2 Single Request Status</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH3SREQSTATUS</name>
|
|
<description>Channel 3 Single Request Status</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH4SREQSTATUS</name>
|
|
<description>Channel 4 Single Request Status</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH5SREQSTATUS</name>
|
|
<description>Channel 5 Single Request Status</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH6SREQSTATUS</name>
|
|
<description>Channel 6 Single Request Status</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH7SREQSTATUS</name>
|
|
<description>Channel 7 Single Request Status</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IF</name>
|
|
<description>Interrupt Flag Register</description>
|
|
<addressOffset>0x1000</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x800000FF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>CH0DONE</name>
|
|
<description>DMA Channel 0 Complete Interrupt Flag</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH1DONE</name>
|
|
<description>DMA Channel 1 Complete Interrupt Flag</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH2DONE</name>
|
|
<description>DMA Channel 2 Complete Interrupt Flag</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH3DONE</name>
|
|
<description>DMA Channel 3 Complete Interrupt Flag</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH4DONE</name>
|
|
<description>DMA Channel 4 Complete Interrupt Flag</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH5DONE</name>
|
|
<description>DMA Channel 5 Complete Interrupt Flag</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH6DONE</name>
|
|
<description>DMA Channel 6 Complete Interrupt Flag</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH7DONE</name>
|
|
<description>DMA Channel 7 Complete Interrupt Flag</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>ERR</name>
|
|
<description>DMA Error Interrupt Flag</description>
|
|
<bitOffset>31</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IFS</name>
|
|
<description>Interrupt Flag Set Register</description>
|
|
<addressOffset>0x1004</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x800000FF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>CH0DONE</name>
|
|
<description>DMA Channel 0 Complete Interrupt Flag Set</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH1DONE</name>
|
|
<description>DMA Channel 1 Complete Interrupt Flag Set</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH2DONE</name>
|
|
<description>DMA Channel 2 Complete Interrupt Flag Set</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH3DONE</name>
|
|
<description>DMA Channel 3 Complete Interrupt Flag Set</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH4DONE</name>
|
|
<description>DMA Channel 4 Complete Interrupt Flag Set</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH5DONE</name>
|
|
<description>DMA Channel 5 Complete Interrupt Flag Set</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH6DONE</name>
|
|
<description>DMA Channel 6 Complete Interrupt Flag Set</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH7DONE</name>
|
|
<description>DMA Channel 7 Complete Interrupt Flag Set</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>ERR</name>
|
|
<description>DMA Error Interrupt Flag Set</description>
|
|
<bitOffset>31</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IFC</name>
|
|
<description>Interrupt Flag Clear Register</description>
|
|
<addressOffset>0x1008</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x800000FF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>CH0DONE</name>
|
|
<description>DMA Channel 0 Complete Interrupt Flag Clear</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH1DONE</name>
|
|
<description>DMA Channel 1 Complete Interrupt Flag Clear</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH2DONE</name>
|
|
<description>DMA Channel 2 Complete Interrupt Flag Clear</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH3DONE</name>
|
|
<description>DMA Channel 3 Complete Interrupt Flag Clear</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH4DONE</name>
|
|
<description>DMA Channel 4 Complete Interrupt Flag Clear</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH5DONE</name>
|
|
<description>DMA Channel 5 Complete Interrupt Flag Clear</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH6DONE</name>
|
|
<description>DMA Channel 6 Complete Interrupt Flag Clear</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH7DONE</name>
|
|
<description>DMA Channel 7 Complete Interrupt Flag Clear</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>ERR</name>
|
|
<description>DMA Error Interrupt Flag Clear</description>
|
|
<bitOffset>31</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IEN</name>
|
|
<description>Interrupt Enable register</description>
|
|
<addressOffset>0x100C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x800000FF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>CH0DONE</name>
|
|
<description>DMA Channel 0 Complete Interrupt Enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CH1DONE</name>
|
|
<description>DMA Channel 1 Complete Interrupt Enable</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CH2DONE</name>
|
|
<description>DMA Channel 2 Complete Interrupt Enable</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CH3DONE</name>
|
|
<description>DMA Channel 3 Complete Interrupt Enable</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CH4DONE</name>
|
|
<description>DMA Channel 4 Complete Interrupt Enable</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CH5DONE</name>
|
|
<description>DMA Channel 5 Complete Interrupt Enable</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CH6DONE</name>
|
|
<description>DMA Channel 6 Complete Interrupt Enable</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CH7DONE</name>
|
|
<description>DMA Channel 7 Complete Interrupt Enable</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>ERR</name>
|
|
<description>DMA Error Interrupt Flag Enable</description>
|
|
<bitOffset>31</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CH0_CTRL</name>
|
|
<description>Channel Control Register</description>
|
|
<addressOffset>0x1100</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x003F000F</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>SIGSEL</name>
|
|
<description>Signal Select</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>SOURCESEL</name>
|
|
<description>Source Select</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>6</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>NONE</name>
|
|
<description>No source selected</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>ADC0</name>
|
|
<description>Analog to Digital Converter 0</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DAC0</name>
|
|
<description>Digital to Analog Converter 0</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>USART0</name>
|
|
<description>Universal Synchronous/Asynchronous Receiver/Transmitter 0</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>USART1</name>
|
|
<description>Universal Synchronous/Asynchronous Receiver/Transmitter 1</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>USART2</name>
|
|
<description>Universal Synchronous/Asynchronous Receiver/Transmitter 2</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>LEUART0</name>
|
|
<description>Low Energy UART 0</description>
|
|
<value>0x00000010</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>LEUART1</name>
|
|
<description>Low Energy UART 1</description>
|
|
<value>0x00000011</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>I2C0</name>
|
|
<description>I2C 0</description>
|
|
<value>0x00000014</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TIMER0</name>
|
|
<description>Timer 0</description>
|
|
<value>0x00000018</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TIMER1</name>
|
|
<description>Timer 1</description>
|
|
<value>0x00000019</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TIMER2</name>
|
|
<description>Timer 2</description>
|
|
<value>0x0000001A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>MSC</name>
|
|
<value>0x00000030</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>AES</name>
|
|
<description>Advanced Encryption Standard Accelerator</description>
|
|
<value>0x00000031</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CH1_CTRL</name>
|
|
<description>Channel Control Register</description>
|
|
<addressOffset>0x1104</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x003F000F</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>SIGSEL</name>
|
|
<description>Signal Select</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>SOURCESEL</name>
|
|
<description>Source Select</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>6</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>NONE</name>
|
|
<description>No source selected</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>ADC0</name>
|
|
<description>Analog to Digital Converter 0</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DAC0</name>
|
|
<description>Digital to Analog Converter 0</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>USART0</name>
|
|
<description>Universal Synchronous/Asynchronous Receiver/Transmitter 0</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>USART1</name>
|
|
<description>Universal Synchronous/Asynchronous Receiver/Transmitter 1</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>USART2</name>
|
|
<description>Universal Synchronous/Asynchronous Receiver/Transmitter 2</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>LEUART0</name>
|
|
<description>Low Energy UART 0</description>
|
|
<value>0x00000010</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>LEUART1</name>
|
|
<description>Low Energy UART 1</description>
|
|
<value>0x00000011</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>I2C0</name>
|
|
<description>I2C 0</description>
|
|
<value>0x00000014</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TIMER0</name>
|
|
<description>Timer 0</description>
|
|
<value>0x00000018</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TIMER1</name>
|
|
<description>Timer 1</description>
|
|
<value>0x00000019</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TIMER2</name>
|
|
<description>Timer 2</description>
|
|
<value>0x0000001A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>MSC</name>
|
|
<value>0x00000030</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>AES</name>
|
|
<description>Advanced Encryption Standard Accelerator</description>
|
|
<value>0x00000031</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CH2_CTRL</name>
|
|
<description>Channel Control Register</description>
|
|
<addressOffset>0x1108</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x003F000F</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>SIGSEL</name>
|
|
<description>Signal Select</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>SOURCESEL</name>
|
|
<description>Source Select</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>6</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>NONE</name>
|
|
<description>No source selected</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>ADC0</name>
|
|
<description>Analog to Digital Converter 0</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DAC0</name>
|
|
<description>Digital to Analog Converter 0</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>USART0</name>
|
|
<description>Universal Synchronous/Asynchronous Receiver/Transmitter 0</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>USART1</name>
|
|
<description>Universal Synchronous/Asynchronous Receiver/Transmitter 1</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>USART2</name>
|
|
<description>Universal Synchronous/Asynchronous Receiver/Transmitter 2</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>LEUART0</name>
|
|
<description>Low Energy UART 0</description>
|
|
<value>0x00000010</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>LEUART1</name>
|
|
<description>Low Energy UART 1</description>
|
|
<value>0x00000011</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>I2C0</name>
|
|
<description>I2C 0</description>
|
|
<value>0x00000014</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TIMER0</name>
|
|
<description>Timer 0</description>
|
|
<value>0x00000018</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TIMER1</name>
|
|
<description>Timer 1</description>
|
|
<value>0x00000019</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TIMER2</name>
|
|
<description>Timer 2</description>
|
|
<value>0x0000001A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>MSC</name>
|
|
<value>0x00000030</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>AES</name>
|
|
<description>Advanced Encryption Standard Accelerator</description>
|
|
<value>0x00000031</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CH3_CTRL</name>
|
|
<description>Channel Control Register</description>
|
|
<addressOffset>0x110C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x003F000F</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>SIGSEL</name>
|
|
<description>Signal Select</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>SOURCESEL</name>
|
|
<description>Source Select</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>6</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>NONE</name>
|
|
<description>No source selected</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>ADC0</name>
|
|
<description>Analog to Digital Converter 0</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DAC0</name>
|
|
<description>Digital to Analog Converter 0</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>USART0</name>
|
|
<description>Universal Synchronous/Asynchronous Receiver/Transmitter 0</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>USART1</name>
|
|
<description>Universal Synchronous/Asynchronous Receiver/Transmitter 1</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>USART2</name>
|
|
<description>Universal Synchronous/Asynchronous Receiver/Transmitter 2</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>LEUART0</name>
|
|
<description>Low Energy UART 0</description>
|
|
<value>0x00000010</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>LEUART1</name>
|
|
<description>Low Energy UART 1</description>
|
|
<value>0x00000011</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>I2C0</name>
|
|
<description>I2C 0</description>
|
|
<value>0x00000014</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TIMER0</name>
|
|
<description>Timer 0</description>
|
|
<value>0x00000018</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TIMER1</name>
|
|
<description>Timer 1</description>
|
|
<value>0x00000019</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TIMER2</name>
|
|
<description>Timer 2</description>
|
|
<value>0x0000001A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>MSC</name>
|
|
<value>0x00000030</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>AES</name>
|
|
<description>Advanced Encryption Standard Accelerator</description>
|
|
<value>0x00000031</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CH4_CTRL</name>
|
|
<description>Channel Control Register</description>
|
|
<addressOffset>0x1110</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x003F000F</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>SIGSEL</name>
|
|
<description>Signal Select</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>SOURCESEL</name>
|
|
<description>Source Select</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>6</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>NONE</name>
|
|
<description>No source selected</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>ADC0</name>
|
|
<description>Analog to Digital Converter 0</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DAC0</name>
|
|
<description>Digital to Analog Converter 0</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>USART0</name>
|
|
<description>Universal Synchronous/Asynchronous Receiver/Transmitter 0</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>USART1</name>
|
|
<description>Universal Synchronous/Asynchronous Receiver/Transmitter 1</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>USART2</name>
|
|
<description>Universal Synchronous/Asynchronous Receiver/Transmitter 2</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>LEUART0</name>
|
|
<description>Low Energy UART 0</description>
|
|
<value>0x00000010</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>LEUART1</name>
|
|
<description>Low Energy UART 1</description>
|
|
<value>0x00000011</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>I2C0</name>
|
|
<description>I2C 0</description>
|
|
<value>0x00000014</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TIMER0</name>
|
|
<description>Timer 0</description>
|
|
<value>0x00000018</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TIMER1</name>
|
|
<description>Timer 1</description>
|
|
<value>0x00000019</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TIMER2</name>
|
|
<description>Timer 2</description>
|
|
<value>0x0000001A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>MSC</name>
|
|
<value>0x00000030</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>AES</name>
|
|
<description>Advanced Encryption Standard Accelerator</description>
|
|
<value>0x00000031</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CH5_CTRL</name>
|
|
<description>Channel Control Register</description>
|
|
<addressOffset>0x1114</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x003F000F</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>SIGSEL</name>
|
|
<description>Signal Select</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>SOURCESEL</name>
|
|
<description>Source Select</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>6</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>NONE</name>
|
|
<description>No source selected</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>ADC0</name>
|
|
<description>Analog to Digital Converter 0</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DAC0</name>
|
|
<description>Digital to Analog Converter 0</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>USART0</name>
|
|
<description>Universal Synchronous/Asynchronous Receiver/Transmitter 0</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>USART1</name>
|
|
<description>Universal Synchronous/Asynchronous Receiver/Transmitter 1</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>USART2</name>
|
|
<description>Universal Synchronous/Asynchronous Receiver/Transmitter 2</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>LEUART0</name>
|
|
<description>Low Energy UART 0</description>
|
|
<value>0x00000010</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>LEUART1</name>
|
|
<description>Low Energy UART 1</description>
|
|
<value>0x00000011</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>I2C0</name>
|
|
<description>I2C 0</description>
|
|
<value>0x00000014</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TIMER0</name>
|
|
<description>Timer 0</description>
|
|
<value>0x00000018</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TIMER1</name>
|
|
<description>Timer 1</description>
|
|
<value>0x00000019</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TIMER2</name>
|
|
<description>Timer 2</description>
|
|
<value>0x0000001A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>MSC</name>
|
|
<value>0x00000030</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>AES</name>
|
|
<description>Advanced Encryption Standard Accelerator</description>
|
|
<value>0x00000031</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CH6_CTRL</name>
|
|
<description>Channel Control Register</description>
|
|
<addressOffset>0x1118</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x003F000F</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>SIGSEL</name>
|
|
<description>Signal Select</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>SOURCESEL</name>
|
|
<description>Source Select</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>6</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>NONE</name>
|
|
<description>No source selected</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>ADC0</name>
|
|
<description>Analog to Digital Converter 0</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DAC0</name>
|
|
<description>Digital to Analog Converter 0</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>USART0</name>
|
|
<description>Universal Synchronous/Asynchronous Receiver/Transmitter 0</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>USART1</name>
|
|
<description>Universal Synchronous/Asynchronous Receiver/Transmitter 1</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>USART2</name>
|
|
<description>Universal Synchronous/Asynchronous Receiver/Transmitter 2</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>LEUART0</name>
|
|
<description>Low Energy UART 0</description>
|
|
<value>0x00000010</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>LEUART1</name>
|
|
<description>Low Energy UART 1</description>
|
|
<value>0x00000011</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>I2C0</name>
|
|
<description>I2C 0</description>
|
|
<value>0x00000014</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TIMER0</name>
|
|
<description>Timer 0</description>
|
|
<value>0x00000018</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TIMER1</name>
|
|
<description>Timer 1</description>
|
|
<value>0x00000019</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TIMER2</name>
|
|
<description>Timer 2</description>
|
|
<value>0x0000001A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>MSC</name>
|
|
<value>0x00000030</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>AES</name>
|
|
<description>Advanced Encryption Standard Accelerator</description>
|
|
<value>0x00000031</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CH7_CTRL</name>
|
|
<description>Channel Control Register</description>
|
|
<addressOffset>0x111C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x003F000F</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>SIGSEL</name>
|
|
<description>Signal Select</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>SOURCESEL</name>
|
|
<description>Source Select</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>6</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>NONE</name>
|
|
<description>No source selected</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>ADC0</name>
|
|
<description>Analog to Digital Converter 0</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DAC0</name>
|
|
<description>Digital to Analog Converter 0</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>USART0</name>
|
|
<description>Universal Synchronous/Asynchronous Receiver/Transmitter 0</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>USART1</name>
|
|
<description>Universal Synchronous/Asynchronous Receiver/Transmitter 1</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>USART2</name>
|
|
<description>Universal Synchronous/Asynchronous Receiver/Transmitter 2</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>LEUART0</name>
|
|
<description>Low Energy UART 0</description>
|
|
<value>0x00000010</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>LEUART1</name>
|
|
<description>Low Energy UART 1</description>
|
|
<value>0x00000011</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>I2C0</name>
|
|
<description>I2C 0</description>
|
|
<value>0x00000014</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TIMER0</name>
|
|
<description>Timer 0</description>
|
|
<value>0x00000018</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TIMER1</name>
|
|
<description>Timer 1</description>
|
|
<value>0x00000019</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TIMER2</name>
|
|
<description>Timer 2</description>
|
|
<value>0x0000001A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>MSC</name>
|
|
<value>0x00000030</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>AES</name>
|
|
<description>Advanced Encryption Standard Accelerator</description>
|
|
<value>0x00000031</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>MSC</name>
|
|
<description>MSC</description>
|
|
<baseAddress>0x400C0000</baseAddress>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x00000400</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<interrupt>
|
|
<name>MSC</name>
|
|
<value>28</value>
|
|
</interrupt>
|
|
<registers>
|
|
<register>
|
|
<name>CTRL</name>
|
|
<description>Memory System Control Register</description>
|
|
<addressOffset>0x000</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<resetMask>0x00000001</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>BUSFAULT</name>
|
|
<description>Bus Fault Response Enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>READCTRL</name>
|
|
<description>Read Control Register</description>
|
|
<addressOffset>0x004</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<resetMask>0x00000007</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>MODE</name>
|
|
<description>Read Mode</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>WS0</name>
|
|
<description>Zero wait-states inserted in fetch or read transfers.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WS1</name>
|
|
<description>One wait-state inserted for each fetch or read transfer. This mode is required for a core frequency above 16 MHz.</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WS0SCBTP</name>
|
|
<description>Zero wait-states inserted with the Suppressed Conditional Branch Target Prefetch (SCBTP) function enabled. SCBTP saves energy by delaying the Cortex' conditional branch target prefetches until the conditional branch instruction is in the execute stage. When the instruction reaches this stage, the evaluation of the branch condition is completed and the core does not perform a speculative prefetch of both the branch target address and the next sequential address. With the SCBTP function enabled, one instruction fetch is saved for each branch not taken, with a negligible performance penalty.</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WS1SCBTP</name>
|
|
<description>One wait-state access with SCBTP enabled.</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>WRITECTRL</name>
|
|
<description>Write Control Register</description>
|
|
<addressOffset>0x008</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000003</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>WREN</name>
|
|
<description>Enable Write/Erase Controller </description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>IRQERASEABORT</name>
|
|
<description>Abort Page Erase on Interrupt</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>WRITECMD</name>
|
|
<description>Write Command Register</description>
|
|
<addressOffset>0x00C</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000001F</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>LADDRIM</name>
|
|
<description>Load MSC_ADDRB into ADDR</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>ERASEPAGE</name>
|
|
<description>Erase Page</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>WRITEEND</name>
|
|
<description>End Write Mode</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>WRITEONCE</name>
|
|
<description>Word Write-Once Trigger</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>WRITETRIG</name>
|
|
<description>Word Write Sequence Trigger</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>ADDRB</name>
|
|
<description>Page Erase/Write Address Buffer</description>
|
|
<addressOffset>0x010</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0xFFFFFFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>ADDRB</name>
|
|
<description>Page Erase or Write Address Buffer</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>32</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>WDATA</name>
|
|
<description>Write Data Register</description>
|
|
<addressOffset>0x018</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0xFFFFFFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>WDATA</name>
|
|
<description>Write Data</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>32</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>STATUS</name>
|
|
<description>Status Register</description>
|
|
<addressOffset>0x01C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000008</resetValue>
|
|
<resetMask>0x0000003F</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>BUSY</name>
|
|
<description>Erase/Write Busy</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>LOCKED</name>
|
|
<description>Access Locked</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>INVADDR</name>
|
|
<description>Invalid Write Address or Erase Page</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>WDATAREADY</name>
|
|
<description>WDATA Write Ready</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>WORDTIMEOUT</name>
|
|
<description>Flash Write Word Timeout</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>ERASEABORTED</name>
|
|
<description>The Current Flash Erase Operation Aborted</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IF</name>
|
|
<description>Interrupt Flag Register</description>
|
|
<addressOffset>0x02C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000003</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>ERASE</name>
|
|
<description>Erase Done Interrupt Read Flag</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>WRITE</name>
|
|
<description>Write Done Interrupt Read Flag</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IFS</name>
|
|
<description>Interrupt Flag Set Register</description>
|
|
<addressOffset>0x030</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000003</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>ERASE</name>
|
|
<description>Erase Done Interrupt Set</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>WRITE</name>
|
|
<description>Write Done Interrupt Set</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IFC</name>
|
|
<description>Interrupt Flag Clear Register</description>
|
|
<addressOffset>0x034</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000003</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>ERASE</name>
|
|
<description>Erase Done Interrupt Clear</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>WRITE</name>
|
|
<description>Write Done Interrupt Clear</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IEN</name>
|
|
<description>Interrupt Enable Register</description>
|
|
<addressOffset>0x038</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000003</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>ERASE</name>
|
|
<description>Erase Done Interrupt Enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>WRITE</name>
|
|
<description>Write Done Interrupt Enable</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>LOCK</name>
|
|
<description>Configuration Lock Register</description>
|
|
<addressOffset>0x03C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>LOCKKEY</name>
|
|
<description>Configuration Lock</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>UNLOCKED</name>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>LOCKED</name>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>EMU</name>
|
|
<description>EMU</description>
|
|
<baseAddress>0x400C6000</baseAddress>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x00000400</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<registers>
|
|
<register>
|
|
<name>CTRL</name>
|
|
<description>Control Register</description>
|
|
<addressOffset>0x000</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000000F</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>EMVREG</name>
|
|
<description>Energy Mode Voltage Regulator Control</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>EM2BLOCK</name>
|
|
<description>Energy Mode 2 Block</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>EM4CTRL</name>
|
|
<description>Energy Mode 4 Control</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>MEMCTRL</name>
|
|
<description>Memory Control Register</description>
|
|
<addressOffset>0x004</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000007</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>POWERDOWN</name>
|
|
<description>RAM block power-down</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>BLK3</name>
|
|
<description>Power down RAM block 3 (address range 0x20018000-0x2001FFFF).</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>BLK23</name>
|
|
<description>Power down RAM blocks 2-3 (address range 0x20010000-0x2001FFFF).</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>BLK123</name>
|
|
<description>Power down RAM blocks 1-3 (address range 0x20008000-0x2001FFFF).</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>LOCK</name>
|
|
<description>Configuration Lock Register</description>
|
|
<addressOffset>0x008</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>LOCKKEY</name>
|
|
<description>Configuration Lock Key</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>UNLOCKED</name>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>LOCKED</name>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>AUXCTRL</name>
|
|
<description>Auxiliary Control Register</description>
|
|
<addressOffset>0x024</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000001</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>HRCCLR</name>
|
|
<description>Hard Reset Cause Clear</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>RMU</name>
|
|
<description>RMU</description>
|
|
<baseAddress>0x400CA000</baseAddress>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x00000400</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<registers>
|
|
<register>
|
|
<name>CTRL</name>
|
|
<description>Control Register</description>
|
|
<addressOffset>0x000</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000001</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>LOCKUPRDIS</name>
|
|
<description>Lockup Reset Disable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RSTCAUSE</name>
|
|
<description>Reset Cause Register</description>
|
|
<addressOffset>0x004</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000007F</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>PORST</name>
|
|
<description>Power On Reset</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>BODUNREGRST</name>
|
|
<description>Brown Out Detector Unregulated Domain Reset</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>BODREGRST</name>
|
|
<description>Brown Out Detector Regulated Domain Reset</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>EXTRST</name>
|
|
<description>External Pin Reset</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>WDOGRST</name>
|
|
<description>Watchdog Reset</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>LOCKUPRST</name>
|
|
<description>LOCKUP Reset</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>SYSREQRST</name>
|
|
<description>System Request Reset</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CMD</name>
|
|
<description>Command Register</description>
|
|
<addressOffset>0x008</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000001</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>RCCLR</name>
|
|
<description>Reset Cause Clear</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>CMU</name>
|
|
<description>CMU</description>
|
|
<baseAddress>0x400C8000</baseAddress>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x00000400</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<interrupt>
|
|
<name>CMU</name>
|
|
<value>25</value>
|
|
</interrupt>
|
|
<registers>
|
|
<register>
|
|
<name>CTRL</name>
|
|
<description>CMU Control Register</description>
|
|
<addressOffset>0x000</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x000C262C</resetValue>
|
|
<resetMask>0x00FE3EEF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>HFXOMODE</name>
|
|
<description>HFXO Mode</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>XTAL</name>
|
|
<description>4-32 MHz crystal oscillator.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>BUFEXTCLK</name>
|
|
<description>An AC coupled buffer is coupled in series with HFXTAL_N, suitable for external sine wave (4-32 MHz). The sine wave should have a minimum of 200 mV peak to peak.</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIGEXTCLK</name>
|
|
<description>Digital external clock on HFXTAL_N pin. Oscillator is effectively bypassed.</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>HFXOBOOST</name>
|
|
<description>HFXO Start-up Boost Current</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>50PCENT</name>
|
|
<description>50 %.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>70PCENT</name>
|
|
<description>70 %.</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>80PCENT</name>
|
|
<description>80 %.</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>100PCENT</name>
|
|
<description>100 % (default).</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>HFXOBUFCUR</name>
|
|
<description>HFXO Boost Buffer Current</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>HFXOGLITCHDETEN</name>
|
|
<description>HFXO Glitch Detector Enable</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>HFXOTIMEOUT</name>
|
|
<description>HFXO Timeout</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>8CYCLES</name>
|
|
<description>Timeout period of 8 cycles.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>256CYCLES</name>
|
|
<description>Timeout period of 256 cycles.</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>1KCYCLES</name>
|
|
<description>Timeout period of 1024 cycles.</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>16KCYCLES</name>
|
|
<description>Timeout period of 16384 cycles.</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>LFXOMODE</name>
|
|
<description>LFXO Mode</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>XTAL</name>
|
|
<description>32.768 kHz crystal oscillator.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>BUFEXTCLK</name>
|
|
<description>An AC coupled buffer is coupled in series with LFXTAL_N pin, suitable for external sinus wave (32.768 kHz).</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIGEXTCLK</name>
|
|
<description>Digital external clock on LFXTAL_N pin. Oscillator is effectively bypassed.</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>LFXOBOOST</name>
|
|
<description>LFXO Start-up Boost Current</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>LFXOBUFCUR</name>
|
|
<description>LFXO Boost Buffer Current</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>LFXOTIMEOUT</name>
|
|
<description>LFXO Timeout</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>8CYCLES</name>
|
|
<description>Timeout period of 8 cycles.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>1KCYCLES</name>
|
|
<description>Timeout period of 1024 cycles.</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>16KCYCLES</name>
|
|
<description>Timeout period of 16384 cycles.</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>32KCYCLES</name>
|
|
<description>Timeout period of 32768 cycles.</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>CLKOUTSEL0</name>
|
|
<description>Clock Output Select 0</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>HFRCO</name>
|
|
<description>HFRCO (directly from oscillator).</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>HFXO</name>
|
|
<description>HFXO (directly from oscillator).</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>HFCLK2</name>
|
|
<description>HFCLK/2.</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>HFCLK4</name>
|
|
<description>HFCLK/4.</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>HFCLK8</name>
|
|
<description>HFCLK/8.</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>HFCLK16</name>
|
|
<description>HFCLK/16.</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>ULFRCO</name>
|
|
<description>ULFRCO (directly from oscillator).</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>CLKOUTSEL1</name>
|
|
<description>Clock Output Select 1</description>
|
|
<bitOffset>23</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>HFCORECLKDIV</name>
|
|
<description>High Frequency Core Clock Division Register</description>
|
|
<addressOffset>0x004</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000000F</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>HFCORECLKDIV</name>
|
|
<description>HFCORECLK Divider</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>HFCLK</name>
|
|
<description>HFCORECLK = HFCLK.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>HFCLK2</name>
|
|
<description>HFCORECLK = HFCLK/2.</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>HFCLK4</name>
|
|
<description>HFCORECLK = HFCLK/4.</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>HFCLK8</name>
|
|
<description>HFCORECLK = HFCLK/8.</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>HFCLK16</name>
|
|
<description>HFCORECLK = HFCLK/16.</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>HFCLK32</name>
|
|
<description>HFCORECLK = HFCLK/32.</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>HFCLK64</name>
|
|
<description>HFCORECLK = HFCLK/64.</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>HFCLK128</name>
|
|
<description>HFCORECLK = HFCLK/128.</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>HFCLK256</name>
|
|
<description>HFCORECLK = HFCLK/256.</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>HFCLK512</name>
|
|
<description>HFCORECLK = HFCLK/512.</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>HFPERCLKDIV</name>
|
|
<description>High Frequency Peripheral Clock Division Register</description>
|
|
<addressOffset>0x008</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000100</resetValue>
|
|
<resetMask>0x0000010F</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>HFPERCLKDIV</name>
|
|
<description>HFPERCLK Divider</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>HFCLK</name>
|
|
<description>HFPERCLK = HFCLK.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>HFCLK2</name>
|
|
<description>HFPERCLK = HFCLK/2.</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>HFCLK4</name>
|
|
<description>HFPERCLK = HFCLK/4.</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>HFCLK8</name>
|
|
<description>HFPERCLK = HFCLK/8.</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>HFCLK16</name>
|
|
<description>HFPERCLK = HFCLK/16.</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>HFCLK32</name>
|
|
<description>HFPERCLK = HFCLK/32.</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>HFCLK64</name>
|
|
<description>HFPERCLK = HFCLK/64.</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>HFCLK128</name>
|
|
<description>HFPERCLK = HFCLK/128.</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>HFCLK256</name>
|
|
<description>HFPERCLK = HFCLK/256.</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>HFCLK512</name>
|
|
<description>HFPERCLK = HFCLK/512.</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>HFPERCLKEN</name>
|
|
<description>HFPERCLK Enable</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>HFRCOCTRL</name>
|
|
<description>HFRCO Control Register</description>
|
|
<addressOffset>0x00C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000380</resetValue>
|
|
<resetMask>0x0001F7FF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>TUNING</name>
|
|
<description>HFRCO Tuning Value</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>BAND</name>
|
|
<description>HFRCO Band Select</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>1MHZ</name>
|
|
<description>1 MHz band. NOTE: Also set the TUNING value (bits 7:0) when changing band.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>7MHZ</name>
|
|
<description>7 MHz band. NOTE: Also set the TUNING value (bits 7:0) when changing band.</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>11MHZ</name>
|
|
<description>11 MHz band. NOTE: Also set the TUNING value (bits 7:0) when changing band.</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>14MHZ</name>
|
|
<description>14 MHz band. NOTE: Also set the TUNING value (bits 7:0) when changing band.</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>21MHZ</name>
|
|
<description>21 MHz band. NOTE: Also set the TUNING value (bits 7:0) when changing band.</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>28MHZ</name>
|
|
<description>28 MHz band. NOTE: Also set the TUNING value (bits 7:0) when changing band.</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>SUDELAY</name>
|
|
<description>HFRCO Start-up Delay</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>5</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>LFRCOCTRL</name>
|
|
<description>LFRCO Control Register</description>
|
|
<addressOffset>0x010</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000040</resetValue>
|
|
<resetMask>0x0000007F</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>TUNING</name>
|
|
<description>LFRCO Tuning Value</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>7</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>AUXHFRCOCTRL</name>
|
|
<description>AUXHFRCO Control Register</description>
|
|
<addressOffset>0x014</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000080</resetValue>
|
|
<resetMask>0x000000FF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>TUNING</name>
|
|
<description>AUXHFRCO Tuning Value</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CALCTRL</name>
|
|
<description>Calibration Control Register</description>
|
|
<addressOffset>0x018</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000007</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>UPSEL</name>
|
|
<description>Calibration Up-counter Select</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>HFXO</name>
|
|
<description>Select HFXO as up-counter.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>LFXO</name>
|
|
<description>Select LFXO as up-counter.</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>HFRCO</name>
|
|
<description>Select HFRCO as up-counter.</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>LFRCO</name>
|
|
<description>Select LFRCO as up-counter.</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>AUXHFRCO</name>
|
|
<description>Select AUXHFRCO as up-counter.</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CALCNT</name>
|
|
<description>Calibration Counter Register</description>
|
|
<addressOffset>0x01C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x000FFFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>CALCNT</name>
|
|
<description>Calibration Counter</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>20</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>OSCENCMD</name>
|
|
<description>Oscillator Enable/Disable Command Register</description>
|
|
<addressOffset>0x020</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x000003FF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>HFRCOEN</name>
|
|
<description>HFRCO Enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>HFRCODIS</name>
|
|
<description>HFRCO Disable</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>HFXOEN</name>
|
|
<description>HFXO Enable</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>HFXODIS</name>
|
|
<description>HFXO Disable</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>AUXHFRCOEN</name>
|
|
<description>AUXHFRCO Enable</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>AUXHFRCODIS</name>
|
|
<description>AUXHFRCO Disable</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>LFRCOEN</name>
|
|
<description>LFRCO Enable</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>LFRCODIS</name>
|
|
<description>LFRCO Disable</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>LFXOEN</name>
|
|
<description>LFXO Enable</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>LFXODIS</name>
|
|
<description>LFXO Disable</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CMD</name>
|
|
<description>Command Register</description>
|
|
<addressOffset>0x024</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000000F</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>HFCLKSEL</name>
|
|
<description>HFCLK Select</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
<access>write-only</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>HFRCO</name>
|
|
<description>Select HFRCO as HFCLK.</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>HFXO</name>
|
|
<description>Select HFXO as HFCLK.</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>LFRCO</name>
|
|
<description>Select LFRCO as HFCLK.</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>LFXO</name>
|
|
<description>Select LFXO as HFCLK.</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>CALSTART</name>
|
|
<description>Calibration Start</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>LFCLKSEL</name>
|
|
<description>Low Frequency Clock Select Register</description>
|
|
<addressOffset>0x028</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000005</resetValue>
|
|
<resetMask>0x0000000F</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>LFA</name>
|
|
<description>Clock Select for LFA</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>LFACLK is disabled</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>LFRCO</name>
|
|
<description>LFRCO selected as LFACLK</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>LFXO</name>
|
|
<description>LFXO selected as LFACLK</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>HFCORECLKLEDIV2</name>
|
|
<description>HFCORECLKLE divided by two or four is selected as LFACLK. The division factor is determined by CMU_CTRL_HFLE and CMU_HFCORECLKDIV_HFCORECLKLEDIV.</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>LFB</name>
|
|
<description>Clock Select for LFB</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>LFBCLK is disabled</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>LFRCO</name>
|
|
<description>LFRCO selected as LFBCLK</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>LFXO</name>
|
|
<description>LFXO selected as LFBCLK</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>HFCORECLKLEDIV2</name>
|
|
<description>HFCORECLKLE divided by two or four is selected as LFACLK. The division factor is determined by CMU_CTRL_HFLE and CMU_HFCORECLKDIV_HFCORECLKLEDIV.</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>STATUS</name>
|
|
<description>Status Register</description>
|
|
<addressOffset>0x02C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000403</resetValue>
|
|
<resetMask>0x00007FFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>HFRCOENS</name>
|
|
<description>HFRCO Enable Status</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>HFRCORDY</name>
|
|
<description>HFRCO Ready</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>HFXOENS</name>
|
|
<description>HFXO Enable Status</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>HFXORDY</name>
|
|
<description>HFXO Ready</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>AUXHFRCOENS</name>
|
|
<description>AUXHFRCO Enable Status</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>AUXHFRCORDY</name>
|
|
<description>AUXHFRCO Ready</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>LFRCOENS</name>
|
|
<description>LFRCO Enable Status</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>LFRCORDY</name>
|
|
<description>LFRCO Ready</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>LFXOENS</name>
|
|
<description>LFXO Enable Status</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>LFXORDY</name>
|
|
<description>LFXO Ready</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>HFRCOSEL</name>
|
|
<description>HFRCO Selected</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>HFXOSEL</name>
|
|
<description>HFXO Selected</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>LFRCOSEL</name>
|
|
<description>LFRCO Selected</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>LFXOSEL</name>
|
|
<description>LFXO Selected</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CALBSY</name>
|
|
<description>Calibration Busy</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IF</name>
|
|
<description>Interrupt Flag Register</description>
|
|
<addressOffset>0x030</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<resetMask>0x0000003F</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>HFRCORDY</name>
|
|
<description>HFRCO Ready Interrupt Flag</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>HFXORDY</name>
|
|
<description>HFXO Ready Interrupt Flag</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>LFRCORDY</name>
|
|
<description>LFRCO Ready Interrupt Flag</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>LFXORDY</name>
|
|
<description>LFXO Ready Interrupt Flag</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>AUXHFRCORDY</name>
|
|
<description>AUXHFRCO Ready Interrupt Flag</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CALRDY</name>
|
|
<description>Calibration Ready Interrupt Flag</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IFS</name>
|
|
<description>Interrupt Flag Set Register</description>
|
|
<addressOffset>0x034</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000003F</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>HFRCORDY</name>
|
|
<description>HFRCO Ready Interrupt Flag Set</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>HFXORDY</name>
|
|
<description>HFXO Ready Interrupt Flag Set</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>LFRCORDY</name>
|
|
<description>LFRCO Ready Interrupt Flag Set</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>LFXORDY</name>
|
|
<description>LFXO Ready Interrupt Flag Set</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>AUXHFRCORDY</name>
|
|
<description>AUXHFRCO Ready Interrupt Flag Set</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CALRDY</name>
|
|
<description>Calibration Ready Interrupt Flag Set</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IFC</name>
|
|
<description>Interrupt Flag Clear Register</description>
|
|
<addressOffset>0x038</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000003F</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>HFRCORDY</name>
|
|
<description>HFRCO Ready Interrupt Flag Clear</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>HFXORDY</name>
|
|
<description>HFXO Ready Interrupt Flag Clear</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>LFRCORDY</name>
|
|
<description>LFRCO Ready Interrupt Flag Clear</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>LFXORDY</name>
|
|
<description>LFXO Ready Interrupt Flag Clear</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>AUXHFRCORDY</name>
|
|
<description>AUXHFRCO Ready Interrupt Flag Clear</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CALRDY</name>
|
|
<description>Calibration Ready Interrupt Flag Clear</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IEN</name>
|
|
<description>Interrupt Enable Register</description>
|
|
<addressOffset>0x03C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000003F</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>HFRCORDY</name>
|
|
<description>HFRCO Ready Interrupt Enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>HFXORDY</name>
|
|
<description>HFXO Ready Interrupt Enable</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>LFRCORDY</name>
|
|
<description>LFRCO Ready Interrupt Enable</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>LFXORDY</name>
|
|
<description>LFXO Ready Interrupt Enable</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>AUXHFRCORDY</name>
|
|
<description>AUXHFRCO Ready Interrupt Enable</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CALRDY</name>
|
|
<description>Calibration Ready Interrupt Enable</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>HFCORECLKEN0</name>
|
|
<description>High Frequency Core Clock Enable Register 0</description>
|
|
<addressOffset>0x040</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000007</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>AES</name>
|
|
<description>Advanced Encryption Standard Accelerator Clock Enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>DMA</name>
|
|
<description>Direct Memory Access Controller Clock Enable</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>LE</name>
|
|
<description>Low Energy Peripheral Interface Clock Enable</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>HFPERCLKEN0</name>
|
|
<description>High Frequency Peripheral Clock Enable Register 0</description>
|
|
<addressOffset>0x044</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FDF7</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>USART0</name>
|
|
<description>Universal Synchronous/Asynchronous Receiver/Transmitter 0 Clock Enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>USART1</name>
|
|
<description>Universal Synchronous/Asynchronous Receiver/Transmitter 1 Clock Enable</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>USART2</name>
|
|
<description>Universal Synchronous/Asynchronous Receiver/Transmitter 2 Clock Enable</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>TIMER0</name>
|
|
<description>Timer 0 Clock Enable</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>TIMER1</name>
|
|
<description>Timer 1 Clock Enable</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>TIMER2</name>
|
|
<description>Timer 2 Clock Enable</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>ACMP0</name>
|
|
<description>Analog Comparator 0 Clock Enable</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>ACMP1</name>
|
|
<description>Analog Comparator 1 Clock Enable</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>PRS</name>
|
|
<description>Peripheral Reflex System Clock Enable</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>DAC0</name>
|
|
<description>Digital to Analog Converter 0 Clock Enable</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>GPIO</name>
|
|
<description>General purpose Input/Output Clock Enable</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>VCMP</name>
|
|
<description>Voltage Comparator Clock Enable</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>ADC0</name>
|
|
<description>Analog to Digital Converter 0 Clock Enable</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>I2C0</name>
|
|
<description>I2C 0 Clock Enable</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SYNCBUSY</name>
|
|
<description>Synchronization Busy Register</description>
|
|
<addressOffset>0x050</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000055</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>LFACLKEN0</name>
|
|
<description>Low Frequency A Clock Enable 0 Busy</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>LFAPRESC0</name>
|
|
<description>Low Frequency A Prescaler 0 Busy</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>LFBCLKEN0</name>
|
|
<description>Low Frequency B Clock Enable 0 Busy</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>LFBPRESC0</name>
|
|
<description>Low Frequency B Prescaler 0 Busy</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FREEZE</name>
|
|
<description>Freeze Register</description>
|
|
<addressOffset>0x054</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000001</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>REGFREEZE</name>
|
|
<description>Register Update Freeze</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>LFACLKEN0</name>
|
|
<description>Low Frequency A Clock Enable Register 0 (Async Reg)</description>
|
|
<addressOffset>0x058</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000007</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>RTC</name>
|
|
<description>Real-Time Counter Clock Enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>LETIMER0</name>
|
|
<description>Low Energy Timer 0 Clock Enable</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>LCD</name>
|
|
<description>Liquid Crystal Display Controller Clock Enable</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>LFBCLKEN0</name>
|
|
<description>Low Frequency B Clock Enable Register 0 (Async Reg)</description>
|
|
<addressOffset>0x060</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000003</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>LEUART0</name>
|
|
<description>Low Energy UART 0 Clock Enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>LEUART1</name>
|
|
<description>Low Energy UART 1 Clock Enable</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>LFAPRESC0</name>
|
|
<description>Low Frequency A Prescaler Register 0 (Async Reg)</description>
|
|
<addressOffset>0x068</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x000003FF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>RTC</name>
|
|
<description>Real-Time Counter Prescaler</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DIV1</name>
|
|
<description>LFACLKRTC = LFACLK</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV2</name>
|
|
<description>LFACLKRTC = LFACLK/2</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV4</name>
|
|
<description>LFACLKRTC = LFACLK/4</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV8</name>
|
|
<description>LFACLKRTC = LFACLK/8</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV16</name>
|
|
<description>LFACLKRTC = LFACLK/16</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV32</name>
|
|
<description>LFACLKRTC = LFACLK/32</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV64</name>
|
|
<description>LFACLKRTC = LFACLK/64</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV128</name>
|
|
<description>LFACLKRTC = LFACLK/128</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV256</name>
|
|
<description>LFACLKRTC = LFACLK/256</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV512</name>
|
|
<description>LFACLKRTC = LFACLK/512</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV1024</name>
|
|
<description>LFACLKRTC = LFACLK/1024</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV2048</name>
|
|
<description>LFACLKRTC = LFACLK/2048</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV4096</name>
|
|
<description>LFACLKRTC = LFACLK/4096</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV8192</name>
|
|
<description>LFACLKRTC = LFACLK/8192</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV16384</name>
|
|
<description>LFACLKRTC = LFACLK/16384</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV32768</name>
|
|
<description>LFACLKRTC = LFACLK/32768</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>LETIMER0</name>
|
|
<description>Low Energy Timer 0 Prescaler</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DIV1</name>
|
|
<description>LFACLKLETIMER0 = LFACLK</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV2</name>
|
|
<description>LFACLKLETIMER0 = LFACLK/2</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV4</name>
|
|
<description>LFACLKLETIMER0 = LFACLK/4</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV8</name>
|
|
<description>LFACLKLETIMER0 = LFACLK/8</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV16</name>
|
|
<description>LFACLKLETIMER0 = LFACLK/16</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV32</name>
|
|
<description>LFACLKLETIMER0 = LFACLK/32</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV64</name>
|
|
<description>LFACLKLETIMER0 = LFACLK/64</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV128</name>
|
|
<description>LFACLKLETIMER0 = LFACLK/128</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV256</name>
|
|
<description>LFACLKLETIMER0 = LFACLK/256</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV512</name>
|
|
<description>LFACLKLETIMER0 = LFACLK/512</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV1024</name>
|
|
<description>LFACLKLETIMER0 = LFACLK/1024</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV2048</name>
|
|
<description>LFACLKLETIMER0 = LFACLK/2048</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV4096</name>
|
|
<description>LFACLKLETIMER0 = LFACLK/4096</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV8192</name>
|
|
<description>LFACLKLETIMER0 = LFACLK/8192</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV16384</name>
|
|
<description>LFACLKLETIMER0 = LFACLK/16384</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV32768</name>
|
|
<description>LFACLKLETIMER0 = LFACLK/32768</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>LCD</name>
|
|
<description>Liquid Crystal Display Controller Prescaler</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DIV16</name>
|
|
<description>LFACLKLCD = LFACLK/16</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV32</name>
|
|
<description>LFACLKLCD = LFACLK/32</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV64</name>
|
|
<description>LFACLKLCD = LFACLK/64</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV128</name>
|
|
<description>LFACLKLCD = LFACLK/128</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>LFBPRESC0</name>
|
|
<description>Low Frequency B Prescaler Register 0 (Async Reg)</description>
|
|
<addressOffset>0x070</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000033</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>LEUART0</name>
|
|
<description>Low Energy UART 0 Prescaler</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DIV1</name>
|
|
<description>LFBCLKLEUART0 = LFBCLK</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV2</name>
|
|
<description>LFBCLKLEUART0 = LFBCLK/2</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV4</name>
|
|
<description>LFBCLKLEUART0 = LFBCLK/4</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV8</name>
|
|
<description>LFBCLKLEUART0 = LFBCLK/8</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>LEUART1</name>
|
|
<description>Low Energy UART 1 Prescaler</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DIV1</name>
|
|
<description>LFBCLKLEUART1 = LFBCLK</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV2</name>
|
|
<description>LFBCLKLEUART1 = LFBCLK/2</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV4</name>
|
|
<description>LFBCLKLEUART1 = LFBCLK/4</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV8</name>
|
|
<description>LFBCLKLEUART1 = LFBCLK/8</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PCNTCTRL</name>
|
|
<description>PCNT Control Register</description>
|
|
<addressOffset>0x078</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000003F</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>PCNT0CLKEN</name>
|
|
<description>PCNT0 Clock Enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>PCNT0CLKSEL</name>
|
|
<description>PCNT0 Clock Select</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>PCNT1CLKEN</name>
|
|
<description>PCNT1 Clock Enable</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>PCNT1CLKSEL</name>
|
|
<description>PCNT1 Clock Select</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>PCNT2CLKEN</name>
|
|
<description>PCNT2 Clock Enable</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>PCNT2CLKSEL</name>
|
|
<description>PCNT2 Clock Select</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>LCDCTRL</name>
|
|
<description>LCD Control Register</description>
|
|
<addressOffset>0x07C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000020</resetValue>
|
|
<resetMask>0x0000007F</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>FDIV</name>
|
|
<description>Frame Rate Control</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>VBOOSTEN</name>
|
|
<description>Voltage Boost Enable</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>VBFDIV</name>
|
|
<description>Voltage Boost Frequency Division</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DIV1</name>
|
|
<description>Voltage Boost update Frequency = LFACLK.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV2</name>
|
|
<description>Voltage Boost update Frequency = LFACLK/2.</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV4</name>
|
|
<description>Voltage Boost update Frequency = LFACLK/4.</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV8</name>
|
|
<description>Voltage Boost update Frequency = LFACLK/8.</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV16</name>
|
|
<description>Voltage Boost update Frequency = LFACLK/16.</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV32</name>
|
|
<description>Voltage Boost update Frequency = LFACLK/32.</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV64</name>
|
|
<description>Voltage Boost update Frequency = LFACLK/64.</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV128</name>
|
|
<description>Voltage Boost update Frequency = LFACLK/128.</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>ROUTE</name>
|
|
<description>I/O Routing Register</description>
|
|
<addressOffset>0x080</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000007</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>CLKOUT0PEN</name>
|
|
<description>CLKOUT0 Pin Enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CLKOUT1PEN</name>
|
|
<description>CLKOUT1 Pin Enable</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>LOCATION</name>
|
|
<description>I/O Location</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>LOCK</name>
|
|
<description>Configuration Lock Register</description>
|
|
<addressOffset>0x084</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>LOCKKEY</name>
|
|
<description>Configuration Lock Key</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>UNLOCKED</name>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>LOCKED</name>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>TIMER0</name>
|
|
<description>TIMER0</description>
|
|
<baseAddress>0x40010000</baseAddress>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x00000400</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<interrupt>
|
|
<name>TIMER0</name>
|
|
<value>2</value>
|
|
</interrupt>
|
|
<registers>
|
|
<register>
|
|
<name>CTRL</name>
|
|
<description>Control Register</description>
|
|
<addressOffset>0x000</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0F030FFB</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>MODE</name>
|
|
<description>Timer Mode</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>UP</name>
|
|
<description>Up-count mode</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DOWN</name>
|
|
<description>Down-count mode</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>UPDOWN</name>
|
|
<description>Up/down-count mode</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>QDEC</name>
|
|
<description>Quadrature decoder mode</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>SYNC</name>
|
|
<description>Timer Start/Stop/Reload Synchronization</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>OSMEN</name>
|
|
<description>One-shot Mode Enable</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>QDM</name>
|
|
<description>Quadrature Decoder Mode Selection</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>DEBUGRUN</name>
|
|
<description>Debug Mode Run Enable</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>DMACLRACT</name>
|
|
<description>DMA Request Clear on Active</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>RISEA</name>
|
|
<description>Timer Rising Input Edge Action</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>NONE</name>
|
|
<description>No action</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>START</name>
|
|
<description>Start counter without reload</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>STOP</name>
|
|
<description>Stop counter without reload</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>RELOADSTART</name>
|
|
<description>Reload and start counter</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>FALLA</name>
|
|
<description>Timer Falling Input Edge Action</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>NONE</name>
|
|
<description>No action</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>START</name>
|
|
<description>Start counter without reload</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>STOP</name>
|
|
<description>Stop counter without reload</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>RELOADSTART</name>
|
|
<description>Reload and start counter</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>CLKSEL</name>
|
|
<description>Clock Source Select</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>PRESCHFPERCLK</name>
|
|
<description>Prescaled HFPERCLK</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>CC1</name>
|
|
<description>Compare/Capture Channel 1 Input</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TIMEROUF</name>
|
|
<description>Timer is clocked by underflow(down-count) or overflow(up-count) in the lower numbered neighbor Timer</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>PRESC</name>
|
|
<description>Prescaler Setting</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DIV1</name>
|
|
<description>The HFPERCLK is undivided</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV2</name>
|
|
<description>The HFPERCLK is divided by 2</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV4</name>
|
|
<description>The HFPERCLK is divided by 4</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV8</name>
|
|
<description>The HFPERCLK is divided by 8</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV16</name>
|
|
<description>The HFPERCLK is divided by 16</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV32</name>
|
|
<description>The HFPERCLK is divided by 32</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV64</name>
|
|
<description>The HFPERCLK is divided by 64</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV128</name>
|
|
<description>The HFPERCLK is divided by 128</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV256</name>
|
|
<description>The HFPERCLK is divided by 256</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV512</name>
|
|
<description>The HFPERCLK is divided by 512</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV1024</name>
|
|
<description>The HFPERCLK is divided by 1024</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CMD</name>
|
|
<description>Command Register</description>
|
|
<addressOffset>0x004</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000003</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>START</name>
|
|
<description>Start Timer</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>STOP</name>
|
|
<description>Stop Timer</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>STATUS</name>
|
|
<description>Status Register</description>
|
|
<addressOffset>0x008</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x07070707</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>RUNNING</name>
|
|
<description>Running</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>DIR</name>
|
|
<description>Direction</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TOPBV</name>
|
|
<description>TOPB Valid</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CCVBV0</name>
|
|
<description>CC0 CCVB Valid</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CCVBV1</name>
|
|
<description>CC1 CCVB Valid</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CCVBV2</name>
|
|
<description>CC2 CCVB Valid</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>ICV0</name>
|
|
<description>CC0 Input Capture Valid</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>ICV1</name>
|
|
<description>CC1 Input Capture Valid</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>ICV2</name>
|
|
<description>CC2 Input Capture Valid</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CCPOL0</name>
|
|
<description>CC0 Polarity</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CCPOL1</name>
|
|
<description>CC1 Polarity</description>
|
|
<bitOffset>25</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CCPOL2</name>
|
|
<description>CC2 Polarity</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IEN</name>
|
|
<description>Interrupt Enable Register</description>
|
|
<addressOffset>0x00C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000773</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>OF</name>
|
|
<description>Overflow Interrupt Enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>UF</name>
|
|
<description>Underflow Interrupt Enable</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CC0</name>
|
|
<description>CC Channel 0 Interrupt Enable</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CC1</name>
|
|
<description>CC Channel 1 Interrupt Enable</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CC2</name>
|
|
<description>CC Channel 2 Interrupt Enable</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>ICBOF0</name>
|
|
<description>CC Channel 0 Input Capture Buffer Overflow Interrupt Enable</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>ICBOF1</name>
|
|
<description>CC Channel 1 Input Capture Buffer Overflow Interrupt Enable</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>ICBOF2</name>
|
|
<description>CC Channel 2 Input Capture Buffer Overflow Interrupt Enable</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IF</name>
|
|
<description>Interrupt Flag Register</description>
|
|
<addressOffset>0x010</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000773</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>OF</name>
|
|
<description>Overflow Interrupt Flag</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>UF</name>
|
|
<description>Underflow Interrupt Flag</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CC0</name>
|
|
<description>CC Channel 0 Interrupt Flag</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CC1</name>
|
|
<description>CC Channel 1 Interrupt Flag</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CC2</name>
|
|
<description>CC Channel 2 Interrupt Flag</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>ICBOF0</name>
|
|
<description>CC Channel 0 Input Capture Buffer Overflow Interrupt Flag</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>ICBOF1</name>
|
|
<description>CC Channel 1 Input Capture Buffer Overflow Interrupt Flag</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>ICBOF2</name>
|
|
<description>CC Channel 2 Input Capture Buffer Overflow Interrupt Flag</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IFS</name>
|
|
<description>Interrupt Flag Set Register</description>
|
|
<addressOffset>0x014</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000773</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>OF</name>
|
|
<description>Overflow Interrupt Flag Set</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>UF</name>
|
|
<description>Underflow Interrupt Flag Set</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CC0</name>
|
|
<description>CC Channel 0 Interrupt Flag Set</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CC1</name>
|
|
<description>CC Channel 1 Interrupt Flag Set</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CC2</name>
|
|
<description>CC Channel 2 Interrupt Flag Set</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>ICBOF0</name>
|
|
<description>CC Channel 0 Input Capture Buffer Overflow Interrupt Flag Set</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>ICBOF1</name>
|
|
<description>CC Channel 1 Input Capture Buffer Overflow Interrupt Flag Set</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>ICBOF2</name>
|
|
<description>CC Channel 2 Input Capture Buffer Overflow Interrupt Flag Set</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IFC</name>
|
|
<description>Interrupt Flag Clear Register</description>
|
|
<addressOffset>0x018</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000773</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>OF</name>
|
|
<description>Overflow Interrupt Flag Clear</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>UF</name>
|
|
<description>Underflow Interrupt Flag Clear</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CC0</name>
|
|
<description>CC Channel 0 Interrupt Flag Clear</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CC1</name>
|
|
<description>CC Channel 1 Interrupt Flag Clear</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CC2</name>
|
|
<description>CC Channel 2 Interrupt Flag Clear</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>ICBOF0</name>
|
|
<description>CC Channel 0 Input Capture Buffer Overflow Interrupt Flag Clear</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>ICBOF1</name>
|
|
<description>CC Channel 1 Input Capture Buffer Overflow Interrupt Flag Clear</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>ICBOF2</name>
|
|
<description>CC Channel 2 Input Capture Buffer Overflow Interrupt Flag Clear</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TOP</name>
|
|
<description>Counter Top Value Register</description>
|
|
<addressOffset>0x01C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000FFFF</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>TOP</name>
|
|
<description>Counter Top Value</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TOPB</name>
|
|
<description>Counter Top Value Buffer Register</description>
|
|
<addressOffset>0x020</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>TOPB</name>
|
|
<description>Counter Top Value Buffer</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CNT</name>
|
|
<description>Counter Value Register</description>
|
|
<addressOffset>0x024</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>CNT</name>
|
|
<description>Counter Value</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>ROUTE</name>
|
|
<description>I/O Routing Register</description>
|
|
<addressOffset>0x028</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00030707</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>CC0PEN</name>
|
|
<description>CC Channel 0 Pin Enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CC1PEN</name>
|
|
<description>CC Channel 1 Pin Enable</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CC2PEN</name>
|
|
<description>CC Channel 2 Pin Enable</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CDTI0PEN</name>
|
|
<description>CC Channel 0 Complementary Dead-Time Insertion Pin Enable</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CDTI1PEN</name>
|
|
<description>CC Channel 1 Complementary Dead-Time Insertion Pin Enable</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CDTI2PEN</name>
|
|
<description>CC Channel 2 Complementary Dead-Time Insertion Pin Enable</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>LOCATION</name>
|
|
<description>I/O Location</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>LOC0</name>
|
|
<description>Location 0</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>LOC1</name>
|
|
<description>Location 1</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>LOC2</name>
|
|
<description>Location 2</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>LOC3</name>
|
|
<description>Location 3</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CC0_CTRL</name>
|
|
<description>CC Channel Control Register</description>
|
|
<addressOffset>0x030</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0F373F17</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>MODE</name>
|
|
<description>CC Channel Mode</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>OFF</name>
|
|
<description>Compare/Capture channel turned off</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTCAPTURE</name>
|
|
<description>Input capture</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>OUTPUTCOMPARE</name>
|
|
<description>Output compare</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PWM</name>
|
|
<description>Pulse-Width Modulation</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>OUTINV</name>
|
|
<description>Output Invert</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>COIST</name>
|
|
<description>Compare Output Initial State</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CMOA</name>
|
|
<description>Compare Match Output Action</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>NONE</name>
|
|
<description>No action on compare match</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TOGGLE</name>
|
|
<description>Toggle output on compare match</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>CLEAR</name>
|
|
<description>Clear output on compare match</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>SET</name>
|
|
<description>Set output on compare match</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>COFOA</name>
|
|
<description>Counter Overflow Output Action</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>NONE</name>
|
|
<description>No action on counter overflow</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TOGGLE</name>
|
|
<description>Toggle output on counter overflow</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>CLEAR</name>
|
|
<description>Clear output on counter overflow</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>SET</name>
|
|
<description>Set output on counter overflow</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>CUFOA</name>
|
|
<description>Counter Underflow Output Action</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>NONE</name>
|
|
<description>No action on counter underflow</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TOGGLE</name>
|
|
<description>Toggle output on counter underflow</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>CLEAR</name>
|
|
<description>Clear output on counter underflow</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>SET</name>
|
|
<description>Set output on counter underflow</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>PRSSEL</name>
|
|
<description>Compare/Capture Channel PRS Input Channel Selection</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>PRSCH0</name>
|
|
<description>PRS Channel 0 selected as input</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH1</name>
|
|
<description>PRS Channel 1 selected as input</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH2</name>
|
|
<description>PRS Channel 2 selected as input</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH3</name>
|
|
<description>PRS Channel 3 selected as input</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH4</name>
|
|
<description>PRS Channel 4 selected as input</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH5</name>
|
|
<description>PRS Channel 5 selected as input</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH6</name>
|
|
<description>PRS Channel 6 selected as input</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH7</name>
|
|
<description>PRS Channel 7 selected as input</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>INSEL</name>
|
|
<description>Input Selection</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>FILT</name>
|
|
<description>Digital Filter</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>ICEDGE</name>
|
|
<description>Input Capture Edge Select</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>RISING</name>
|
|
<description>Rising edges detected</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>FALLING</name>
|
|
<description>Falling edges detected</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>BOTH</name>
|
|
<description>Both edges detected</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>NONE</name>
|
|
<description>No edge detection, signal is left as it is</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>ICEVCTRL</name>
|
|
<description>Input Capture Event Control</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>EVERYEDGE</name>
|
|
<description>PRS output pulse, interrupt flag and DMA request set on every capture</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>EVERYSECONDEDGE</name>
|
|
<description>PRS output pulse, interrupt flag and DMA request set on every second capture</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>RISING</name>
|
|
<description>PRS output pulse, interrupt flag and DMA request set on rising edge only (if ICEDGE = BOTH)</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>FALLING</name>
|
|
<description>PRS output pulse, interrupt flag and DMA request set on falling edge only (if ICEDGE = BOTH)</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CC0_CCV</name>
|
|
<description>CC Channel Value Register</description>
|
|
<addressOffset>0x034</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>CCV</name>
|
|
<description>CC Channel Value</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CC0_CCVP</name>
|
|
<description>CC Channel Value Peek Register</description>
|
|
<addressOffset>0x038</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>CCVP</name>
|
|
<description>CC Channel Value Peek</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CC0_CCVB</name>
|
|
<description>CC Channel Buffer Register</description>
|
|
<addressOffset>0x03C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>CCVB</name>
|
|
<description>CC Channel Value Buffer</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CC1_CTRL</name>
|
|
<description>CC Channel Control Register</description>
|
|
<addressOffset>0x040</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0F373F17</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>MODE</name>
|
|
<description>CC Channel Mode</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>OFF</name>
|
|
<description>Compare/Capture channel turned off</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTCAPTURE</name>
|
|
<description>Input capture</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>OUTPUTCOMPARE</name>
|
|
<description>Output compare</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PWM</name>
|
|
<description>Pulse-Width Modulation</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>OUTINV</name>
|
|
<description>Output Invert</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>COIST</name>
|
|
<description>Compare Output Initial State</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CMOA</name>
|
|
<description>Compare Match Output Action</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>NONE</name>
|
|
<description>No action on compare match</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TOGGLE</name>
|
|
<description>Toggle output on compare match</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>CLEAR</name>
|
|
<description>Clear output on compare match</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>SET</name>
|
|
<description>Set output on compare match</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>COFOA</name>
|
|
<description>Counter Overflow Output Action</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>NONE</name>
|
|
<description>No action on counter overflow</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TOGGLE</name>
|
|
<description>Toggle output on counter overflow</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>CLEAR</name>
|
|
<description>Clear output on counter overflow</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>SET</name>
|
|
<description>Set output on counter overflow</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>CUFOA</name>
|
|
<description>Counter Underflow Output Action</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>NONE</name>
|
|
<description>No action on counter underflow</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TOGGLE</name>
|
|
<description>Toggle output on counter underflow</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>CLEAR</name>
|
|
<description>Clear output on counter underflow</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>SET</name>
|
|
<description>Set output on counter underflow</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>PRSSEL</name>
|
|
<description>Compare/Capture Channel PRS Input Channel Selection</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>PRSCH0</name>
|
|
<description>PRS Channel 0 selected as input</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH1</name>
|
|
<description>PRS Channel 1 selected as input</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH2</name>
|
|
<description>PRS Channel 2 selected as input</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH3</name>
|
|
<description>PRS Channel 3 selected as input</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH4</name>
|
|
<description>PRS Channel 4 selected as input</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH5</name>
|
|
<description>PRS Channel 5 selected as input</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH6</name>
|
|
<description>PRS Channel 6 selected as input</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH7</name>
|
|
<description>PRS Channel 7 selected as input</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>INSEL</name>
|
|
<description>Input Selection</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>FILT</name>
|
|
<description>Digital Filter</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>ICEDGE</name>
|
|
<description>Input Capture Edge Select</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>RISING</name>
|
|
<description>Rising edges detected</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>FALLING</name>
|
|
<description>Falling edges detected</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>BOTH</name>
|
|
<description>Both edges detected</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>NONE</name>
|
|
<description>No edge detection, signal is left as it is</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>ICEVCTRL</name>
|
|
<description>Input Capture Event Control</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>EVERYEDGE</name>
|
|
<description>PRS output pulse, interrupt flag and DMA request set on every capture</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>EVERYSECONDEDGE</name>
|
|
<description>PRS output pulse, interrupt flag and DMA request set on every second capture</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>RISING</name>
|
|
<description>PRS output pulse, interrupt flag and DMA request set on rising edge only (if ICEDGE = BOTH)</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>FALLING</name>
|
|
<description>PRS output pulse, interrupt flag and DMA request set on falling edge only (if ICEDGE = BOTH)</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CC1_CCV</name>
|
|
<description>CC Channel Value Register</description>
|
|
<addressOffset>0x044</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>CCV</name>
|
|
<description>CC Channel Value</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CC1_CCVP</name>
|
|
<description>CC Channel Value Peek Register</description>
|
|
<addressOffset>0x048</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>CCVP</name>
|
|
<description>CC Channel Value Peek</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CC1_CCVB</name>
|
|
<description>CC Channel Buffer Register</description>
|
|
<addressOffset>0x04C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>CCVB</name>
|
|
<description>CC Channel Value Buffer</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CC2_CTRL</name>
|
|
<description>CC Channel Control Register</description>
|
|
<addressOffset>0x050</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0F373F17</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>MODE</name>
|
|
<description>CC Channel Mode</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>OFF</name>
|
|
<description>Compare/Capture channel turned off</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTCAPTURE</name>
|
|
<description>Input capture</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>OUTPUTCOMPARE</name>
|
|
<description>Output compare</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PWM</name>
|
|
<description>Pulse-Width Modulation</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>OUTINV</name>
|
|
<description>Output Invert</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>COIST</name>
|
|
<description>Compare Output Initial State</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CMOA</name>
|
|
<description>Compare Match Output Action</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>NONE</name>
|
|
<description>No action on compare match</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TOGGLE</name>
|
|
<description>Toggle output on compare match</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>CLEAR</name>
|
|
<description>Clear output on compare match</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>SET</name>
|
|
<description>Set output on compare match</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>COFOA</name>
|
|
<description>Counter Overflow Output Action</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>NONE</name>
|
|
<description>No action on counter overflow</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TOGGLE</name>
|
|
<description>Toggle output on counter overflow</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>CLEAR</name>
|
|
<description>Clear output on counter overflow</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>SET</name>
|
|
<description>Set output on counter overflow</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>CUFOA</name>
|
|
<description>Counter Underflow Output Action</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>NONE</name>
|
|
<description>No action on counter underflow</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TOGGLE</name>
|
|
<description>Toggle output on counter underflow</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>CLEAR</name>
|
|
<description>Clear output on counter underflow</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>SET</name>
|
|
<description>Set output on counter underflow</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>PRSSEL</name>
|
|
<description>Compare/Capture Channel PRS Input Channel Selection</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>PRSCH0</name>
|
|
<description>PRS Channel 0 selected as input</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH1</name>
|
|
<description>PRS Channel 1 selected as input</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH2</name>
|
|
<description>PRS Channel 2 selected as input</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH3</name>
|
|
<description>PRS Channel 3 selected as input</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH4</name>
|
|
<description>PRS Channel 4 selected as input</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH5</name>
|
|
<description>PRS Channel 5 selected as input</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH6</name>
|
|
<description>PRS Channel 6 selected as input</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH7</name>
|
|
<description>PRS Channel 7 selected as input</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>INSEL</name>
|
|
<description>Input Selection</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>FILT</name>
|
|
<description>Digital Filter</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>ICEDGE</name>
|
|
<description>Input Capture Edge Select</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>RISING</name>
|
|
<description>Rising edges detected</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>FALLING</name>
|
|
<description>Falling edges detected</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>BOTH</name>
|
|
<description>Both edges detected</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>NONE</name>
|
|
<description>No edge detection, signal is left as it is</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>ICEVCTRL</name>
|
|
<description>Input Capture Event Control</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>EVERYEDGE</name>
|
|
<description>PRS output pulse, interrupt flag and DMA request set on every capture</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>EVERYSECONDEDGE</name>
|
|
<description>PRS output pulse, interrupt flag and DMA request set on every second capture</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>RISING</name>
|
|
<description>PRS output pulse, interrupt flag and DMA request set on rising edge only (if ICEDGE = BOTH)</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>FALLING</name>
|
|
<description>PRS output pulse, interrupt flag and DMA request set on falling edge only (if ICEDGE = BOTH)</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CC2_CCV</name>
|
|
<description>CC Channel Value Register</description>
|
|
<addressOffset>0x054</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>CCV</name>
|
|
<description>CC Channel Value</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CC2_CCVP</name>
|
|
<description>CC Channel Value Peek Register</description>
|
|
<addressOffset>0x058</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>CCVP</name>
|
|
<description>CC Channel Value Peek</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CC2_CCVB</name>
|
|
<description>CC Channel Buffer Register</description>
|
|
<addressOffset>0x05C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>CCVB</name>
|
|
<description>CC Channel Value Buffer</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DTCTRL</name>
|
|
<description>DTI Control Register</description>
|
|
<addressOffset>0x070</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0100007F</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>DTEN</name>
|
|
<description>DTI Enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>DTDAS</name>
|
|
<description>DTI Automatic Start-up Functionality</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>DTIPOL</name>
|
|
<description>DTI Inactive Polarity</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>DTCINV</name>
|
|
<description>DTI Complementary Output Invert.</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>DTPRSSEL</name>
|
|
<description>DTI PRS Source Channel Select</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>PRSCH0</name>
|
|
<description>PRS Channel 0 selected as input</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH1</name>
|
|
<description>PRS Channel 1 selected as input</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH2</name>
|
|
<description>PRS Channel 2 selected as input</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH3</name>
|
|
<description>PRS Channel 3 selected as input</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH4</name>
|
|
<description>PRS Channel 4 selected as input</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH5</name>
|
|
<description>PRS Channel 5 selected as input</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH6</name>
|
|
<description>PRS Channel 6 selected as input</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH7</name>
|
|
<description>PRS Channel 7 selected as input</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>DTPRSEN</name>
|
|
<description>DTI PRS Source Enable</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DTTIME</name>
|
|
<description>DTI Time Control Register</description>
|
|
<addressOffset>0x074</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x003F3F0F</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>DTPRESC</name>
|
|
<description>DTI Prescaler Setting</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DIV1</name>
|
|
<description>The HFPERCLK is undivided</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV2</name>
|
|
<description>The HFPERCLK is divided by 2</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV4</name>
|
|
<description>The HFPERCLK is divided by 4</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV8</name>
|
|
<description>The HFPERCLK is divided by 8</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV16</name>
|
|
<description>The HFPERCLK is divided by 16</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV32</name>
|
|
<description>The HFPERCLK is divided by 32</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV64</name>
|
|
<description>The HFPERCLK is divided by 64</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV128</name>
|
|
<description>The HFPERCLK is divided by 128</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV256</name>
|
|
<description>The HFPERCLK is divided by 256</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV512</name>
|
|
<description>The HFPERCLK is divided by 512</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV1024</name>
|
|
<description>The HFPERCLK is divided by 1024</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>DTRISET</name>
|
|
<description>DTI Rise-time</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>6</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>DTFALLT</name>
|
|
<description>DTI Fall-time</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>6</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DTFC</name>
|
|
<description>DTI Fault Configuration Register</description>
|
|
<addressOffset>0x078</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0F030707</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>DTPRS0FSEL</name>
|
|
<description>DTI PRS Fault Source 0 Select</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>PRSCH0</name>
|
|
<description>PRS Channel 0 selected as fault source 0</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH1</name>
|
|
<description>PRS Channel 1 selected as fault source 0</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH2</name>
|
|
<description>PRS Channel 2 selected as fault source 0</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH3</name>
|
|
<description>PRS Channel 3 selected as fault source 0</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH4</name>
|
|
<description>PRS Channel 4 selected as fault source 0</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH5</name>
|
|
<description>PRS Channel 5 selected as fault source 0</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH6</name>
|
|
<description>PRS Channel 6 selected as fault source 0</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH7</name>
|
|
<description>PRS Channel 7 selected as fault source 0</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>DTPRS1FSEL</name>
|
|
<description>DTI PRS Fault Source 1 Select</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>PRSCH0</name>
|
|
<description>PRS Channel 0 selected as fault source 1</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH1</name>
|
|
<description>PRS Channel 1 selected as fault source 1</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH2</name>
|
|
<description>PRS Channel 2 selected as fault source 1</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH3</name>
|
|
<description>PRS Channel 3 selected as fault source 1</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH4</name>
|
|
<description>PRS Channel 4 selected as fault source 1</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH5</name>
|
|
<description>PRS Channel 5 selected as fault source 1</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH6</name>
|
|
<description>PRS Channel 6 selected as fault source 1</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH7</name>
|
|
<description>PRS Channel 7 selected as fault source 1</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>DTFA</name>
|
|
<description>DTI Fault Action</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>NONE</name>
|
|
<description>No action on fault</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INACTIVE</name>
|
|
<description>Set outputs inactive</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>CLEAR</name>
|
|
<description>Clear outputs</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TRISTATE</name>
|
|
<description>Tristate outputs</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>DTPRS0FEN</name>
|
|
<description>DTI PRS 0 Fault Enable</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>DTPRS1FEN</name>
|
|
<description>DTI PRS 1 Fault Enable</description>
|
|
<bitOffset>25</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>DTDBGFEN</name>
|
|
<description>DTI Debugger Fault Enable</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>DTLOCKUPFEN</name>
|
|
<description>DTI Lockup Fault Enable</description>
|
|
<bitOffset>27</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DTOGEN</name>
|
|
<description>DTI Output Generation Enable Register</description>
|
|
<addressOffset>0x07C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000003F</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>DTOGCC0EN</name>
|
|
<description>DTI CC0 Output Generation Enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>DTOGCC1EN</name>
|
|
<description>DTI CC1 Output Generation Enable</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>DTOGCC2EN</name>
|
|
<description>DTI CC2 Output Generation Enable</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>DTOGCDTI0EN</name>
|
|
<description>DTI CDTI0 Output Generation Enable</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>DTOGCDTI1EN</name>
|
|
<description>DTI CDTI1 Output Generation Enable</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>DTOGCDTI2EN</name>
|
|
<description>DTI CDTI2 Output Generation Enable</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DTFAULT</name>
|
|
<description>DTI Fault Register</description>
|
|
<addressOffset>0x080</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000000F</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>DTPRS0F</name>
|
|
<description>DTI PRS 0 Fault</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>DTPRS1F</name>
|
|
<description>DTI PRS 1 Fault</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>DTDBGF</name>
|
|
<description>DTI Debugger Fault</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>DTLOCKUPF</name>
|
|
<description>DTI Lockup Fault</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DTFAULTC</name>
|
|
<description>DTI Fault Clear Register</description>
|
|
<addressOffset>0x084</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000000F</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>DTPRS0FC</name>
|
|
<description>DTI PRS0 Fault Clear</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>DTPRS1FC</name>
|
|
<description>DTI PRS1 Fault Clear</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>DTDBGFC</name>
|
|
<description>DTI Debugger Fault Clear</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TLOCKUPFC</name>
|
|
<description>DTI Lockup Fault Clear</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DTLOCK</name>
|
|
<description>DTI Configuration Lock Register</description>
|
|
<addressOffset>0x088</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>LOCKKEY</name>
|
|
<description>DTI Lock Key</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>UNLOCKED</name>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>LOCKED</name>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>TIMER1</name>
|
|
<description>TIMER1</description>
|
|
<baseAddress>0x40010400</baseAddress>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x00000400</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<interrupt>
|
|
<name>TIMER1</name>
|
|
<value>10</value>
|
|
</interrupt>
|
|
<registers>
|
|
<register>
|
|
<name>CTRL</name>
|
|
<description>Control Register</description>
|
|
<addressOffset>0x000</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0F030FFB</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>MODE</name>
|
|
<description>Timer Mode</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>UP</name>
|
|
<description>Up-count mode</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DOWN</name>
|
|
<description>Down-count mode</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>UPDOWN</name>
|
|
<description>Up/down-count mode</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>QDEC</name>
|
|
<description>Quadrature decoder mode</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>SYNC</name>
|
|
<description>Timer Start/Stop/Reload Synchronization</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>OSMEN</name>
|
|
<description>One-shot Mode Enable</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>QDM</name>
|
|
<description>Quadrature Decoder Mode Selection</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>DEBUGRUN</name>
|
|
<description>Debug Mode Run Enable</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>DMACLRACT</name>
|
|
<description>DMA Request Clear on Active</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>RISEA</name>
|
|
<description>Timer Rising Input Edge Action</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>NONE</name>
|
|
<description>No action</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>START</name>
|
|
<description>Start counter without reload</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>STOP</name>
|
|
<description>Stop counter without reload</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>RELOADSTART</name>
|
|
<description>Reload and start counter</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>FALLA</name>
|
|
<description>Timer Falling Input Edge Action</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>NONE</name>
|
|
<description>No action</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>START</name>
|
|
<description>Start counter without reload</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>STOP</name>
|
|
<description>Stop counter without reload</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>RELOADSTART</name>
|
|
<description>Reload and start counter</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>CLKSEL</name>
|
|
<description>Clock Source Select</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>PRESCHFPERCLK</name>
|
|
<description>Prescaled HFPERCLK</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>CC1</name>
|
|
<description>Compare/Capture Channel 1 Input</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TIMEROUF</name>
|
|
<description>Timer is clocked by underflow(down-count) or overflow(up-count) in the lower numbered neighbor Timer</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>PRESC</name>
|
|
<description>Prescaler Setting</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DIV1</name>
|
|
<description>The HFPERCLK is undivided</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV2</name>
|
|
<description>The HFPERCLK is divided by 2</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV4</name>
|
|
<description>The HFPERCLK is divided by 4</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV8</name>
|
|
<description>The HFPERCLK is divided by 8</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV16</name>
|
|
<description>The HFPERCLK is divided by 16</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV32</name>
|
|
<description>The HFPERCLK is divided by 32</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV64</name>
|
|
<description>The HFPERCLK is divided by 64</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV128</name>
|
|
<description>The HFPERCLK is divided by 128</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV256</name>
|
|
<description>The HFPERCLK is divided by 256</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV512</name>
|
|
<description>The HFPERCLK is divided by 512</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV1024</name>
|
|
<description>The HFPERCLK is divided by 1024</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CMD</name>
|
|
<description>Command Register</description>
|
|
<addressOffset>0x004</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000003</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>START</name>
|
|
<description>Start Timer</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>STOP</name>
|
|
<description>Stop Timer</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>STATUS</name>
|
|
<description>Status Register</description>
|
|
<addressOffset>0x008</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x07070707</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>RUNNING</name>
|
|
<description>Running</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>DIR</name>
|
|
<description>Direction</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TOPBV</name>
|
|
<description>TOPB Valid</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CCVBV0</name>
|
|
<description>CC0 CCVB Valid</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CCVBV1</name>
|
|
<description>CC1 CCVB Valid</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CCVBV2</name>
|
|
<description>CC2 CCVB Valid</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>ICV0</name>
|
|
<description>CC0 Input Capture Valid</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>ICV1</name>
|
|
<description>CC1 Input Capture Valid</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>ICV2</name>
|
|
<description>CC2 Input Capture Valid</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CCPOL0</name>
|
|
<description>CC0 Polarity</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CCPOL1</name>
|
|
<description>CC1 Polarity</description>
|
|
<bitOffset>25</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CCPOL2</name>
|
|
<description>CC2 Polarity</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IEN</name>
|
|
<description>Interrupt Enable Register</description>
|
|
<addressOffset>0x00C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000773</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>OF</name>
|
|
<description>Overflow Interrupt Enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>UF</name>
|
|
<description>Underflow Interrupt Enable</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CC0</name>
|
|
<description>CC Channel 0 Interrupt Enable</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CC1</name>
|
|
<description>CC Channel 1 Interrupt Enable</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CC2</name>
|
|
<description>CC Channel 2 Interrupt Enable</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>ICBOF0</name>
|
|
<description>CC Channel 0 Input Capture Buffer Overflow Interrupt Enable</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>ICBOF1</name>
|
|
<description>CC Channel 1 Input Capture Buffer Overflow Interrupt Enable</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>ICBOF2</name>
|
|
<description>CC Channel 2 Input Capture Buffer Overflow Interrupt Enable</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IF</name>
|
|
<description>Interrupt Flag Register</description>
|
|
<addressOffset>0x010</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000773</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>OF</name>
|
|
<description>Overflow Interrupt Flag</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>UF</name>
|
|
<description>Underflow Interrupt Flag</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CC0</name>
|
|
<description>CC Channel 0 Interrupt Flag</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CC1</name>
|
|
<description>CC Channel 1 Interrupt Flag</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CC2</name>
|
|
<description>CC Channel 2 Interrupt Flag</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>ICBOF0</name>
|
|
<description>CC Channel 0 Input Capture Buffer Overflow Interrupt Flag</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>ICBOF1</name>
|
|
<description>CC Channel 1 Input Capture Buffer Overflow Interrupt Flag</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>ICBOF2</name>
|
|
<description>CC Channel 2 Input Capture Buffer Overflow Interrupt Flag</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IFS</name>
|
|
<description>Interrupt Flag Set Register</description>
|
|
<addressOffset>0x014</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000773</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>OF</name>
|
|
<description>Overflow Interrupt Flag Set</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>UF</name>
|
|
<description>Underflow Interrupt Flag Set</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CC0</name>
|
|
<description>CC Channel 0 Interrupt Flag Set</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CC1</name>
|
|
<description>CC Channel 1 Interrupt Flag Set</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CC2</name>
|
|
<description>CC Channel 2 Interrupt Flag Set</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>ICBOF0</name>
|
|
<description>CC Channel 0 Input Capture Buffer Overflow Interrupt Flag Set</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>ICBOF1</name>
|
|
<description>CC Channel 1 Input Capture Buffer Overflow Interrupt Flag Set</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>ICBOF2</name>
|
|
<description>CC Channel 2 Input Capture Buffer Overflow Interrupt Flag Set</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IFC</name>
|
|
<description>Interrupt Flag Clear Register</description>
|
|
<addressOffset>0x018</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000773</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>OF</name>
|
|
<description>Overflow Interrupt Flag Clear</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>UF</name>
|
|
<description>Underflow Interrupt Flag Clear</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CC0</name>
|
|
<description>CC Channel 0 Interrupt Flag Clear</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CC1</name>
|
|
<description>CC Channel 1 Interrupt Flag Clear</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CC2</name>
|
|
<description>CC Channel 2 Interrupt Flag Clear</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>ICBOF0</name>
|
|
<description>CC Channel 0 Input Capture Buffer Overflow Interrupt Flag Clear</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>ICBOF1</name>
|
|
<description>CC Channel 1 Input Capture Buffer Overflow Interrupt Flag Clear</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>ICBOF2</name>
|
|
<description>CC Channel 2 Input Capture Buffer Overflow Interrupt Flag Clear</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TOP</name>
|
|
<description>Counter Top Value Register</description>
|
|
<addressOffset>0x01C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000FFFF</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>TOP</name>
|
|
<description>Counter Top Value</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TOPB</name>
|
|
<description>Counter Top Value Buffer Register</description>
|
|
<addressOffset>0x020</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>TOPB</name>
|
|
<description>Counter Top Value Buffer</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CNT</name>
|
|
<description>Counter Value Register</description>
|
|
<addressOffset>0x024</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>CNT</name>
|
|
<description>Counter Value</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>ROUTE</name>
|
|
<description>I/O Routing Register</description>
|
|
<addressOffset>0x028</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00030707</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>CC0PEN</name>
|
|
<description>CC Channel 0 Pin Enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CC1PEN</name>
|
|
<description>CC Channel 1 Pin Enable</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CC2PEN</name>
|
|
<description>CC Channel 2 Pin Enable</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CDTI0PEN</name>
|
|
<description>CC Channel 0 Complementary Dead-Time Insertion Pin Enable</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CDTI1PEN</name>
|
|
<description>CC Channel 1 Complementary Dead-Time Insertion Pin Enable</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CDTI2PEN</name>
|
|
<description>CC Channel 2 Complementary Dead-Time Insertion Pin Enable</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>LOCATION</name>
|
|
<description>I/O Location</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>LOC0</name>
|
|
<description>Location 0</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>LOC1</name>
|
|
<description>Location 1</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>LOC2</name>
|
|
<description>Location 2</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>LOC3</name>
|
|
<description>Location 3</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CC0_CTRL</name>
|
|
<description>CC Channel Control Register</description>
|
|
<addressOffset>0x030</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0F373F17</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>MODE</name>
|
|
<description>CC Channel Mode</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>OFF</name>
|
|
<description>Compare/Capture channel turned off</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTCAPTURE</name>
|
|
<description>Input capture</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>OUTPUTCOMPARE</name>
|
|
<description>Output compare</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PWM</name>
|
|
<description>Pulse-Width Modulation</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>OUTINV</name>
|
|
<description>Output Invert</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>COIST</name>
|
|
<description>Compare Output Initial State</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CMOA</name>
|
|
<description>Compare Match Output Action</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>NONE</name>
|
|
<description>No action on compare match</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TOGGLE</name>
|
|
<description>Toggle output on compare match</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>CLEAR</name>
|
|
<description>Clear output on compare match</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>SET</name>
|
|
<description>Set output on compare match</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>COFOA</name>
|
|
<description>Counter Overflow Output Action</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>NONE</name>
|
|
<description>No action on counter overflow</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TOGGLE</name>
|
|
<description>Toggle output on counter overflow</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>CLEAR</name>
|
|
<description>Clear output on counter overflow</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>SET</name>
|
|
<description>Set output on counter overflow</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>CUFOA</name>
|
|
<description>Counter Underflow Output Action</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>NONE</name>
|
|
<description>No action on counter underflow</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TOGGLE</name>
|
|
<description>Toggle output on counter underflow</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>CLEAR</name>
|
|
<description>Clear output on counter underflow</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>SET</name>
|
|
<description>Set output on counter underflow</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>PRSSEL</name>
|
|
<description>Compare/Capture Channel PRS Input Channel Selection</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>PRSCH0</name>
|
|
<description>PRS Channel 0 selected as input</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH1</name>
|
|
<description>PRS Channel 1 selected as input</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH2</name>
|
|
<description>PRS Channel 2 selected as input</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH3</name>
|
|
<description>PRS Channel 3 selected as input</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH4</name>
|
|
<description>PRS Channel 4 selected as input</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH5</name>
|
|
<description>PRS Channel 5 selected as input</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH6</name>
|
|
<description>PRS Channel 6 selected as input</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH7</name>
|
|
<description>PRS Channel 7 selected as input</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>INSEL</name>
|
|
<description>Input Selection</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>FILT</name>
|
|
<description>Digital Filter</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>ICEDGE</name>
|
|
<description>Input Capture Edge Select</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>RISING</name>
|
|
<description>Rising edges detected</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>FALLING</name>
|
|
<description>Falling edges detected</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>BOTH</name>
|
|
<description>Both edges detected</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>NONE</name>
|
|
<description>No edge detection, signal is left as it is</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>ICEVCTRL</name>
|
|
<description>Input Capture Event Control</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>EVERYEDGE</name>
|
|
<description>PRS output pulse, interrupt flag and DMA request set on every capture</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>EVERYSECONDEDGE</name>
|
|
<description>PRS output pulse, interrupt flag and DMA request set on every second capture</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>RISING</name>
|
|
<description>PRS output pulse, interrupt flag and DMA request set on rising edge only (if ICEDGE = BOTH)</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>FALLING</name>
|
|
<description>PRS output pulse, interrupt flag and DMA request set on falling edge only (if ICEDGE = BOTH)</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CC0_CCV</name>
|
|
<description>CC Channel Value Register</description>
|
|
<addressOffset>0x034</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>CCV</name>
|
|
<description>CC Channel Value</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CC0_CCVP</name>
|
|
<description>CC Channel Value Peek Register</description>
|
|
<addressOffset>0x038</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>CCVP</name>
|
|
<description>CC Channel Value Peek</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CC0_CCVB</name>
|
|
<description>CC Channel Buffer Register</description>
|
|
<addressOffset>0x03C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>CCVB</name>
|
|
<description>CC Channel Value Buffer</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CC1_CTRL</name>
|
|
<description>CC Channel Control Register</description>
|
|
<addressOffset>0x040</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0F373F17</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>MODE</name>
|
|
<description>CC Channel Mode</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>OFF</name>
|
|
<description>Compare/Capture channel turned off</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTCAPTURE</name>
|
|
<description>Input capture</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>OUTPUTCOMPARE</name>
|
|
<description>Output compare</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PWM</name>
|
|
<description>Pulse-Width Modulation</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>OUTINV</name>
|
|
<description>Output Invert</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>COIST</name>
|
|
<description>Compare Output Initial State</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CMOA</name>
|
|
<description>Compare Match Output Action</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>NONE</name>
|
|
<description>No action on compare match</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TOGGLE</name>
|
|
<description>Toggle output on compare match</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>CLEAR</name>
|
|
<description>Clear output on compare match</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>SET</name>
|
|
<description>Set output on compare match</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>COFOA</name>
|
|
<description>Counter Overflow Output Action</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>NONE</name>
|
|
<description>No action on counter overflow</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TOGGLE</name>
|
|
<description>Toggle output on counter overflow</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>CLEAR</name>
|
|
<description>Clear output on counter overflow</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>SET</name>
|
|
<description>Set output on counter overflow</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>CUFOA</name>
|
|
<description>Counter Underflow Output Action</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>NONE</name>
|
|
<description>No action on counter underflow</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TOGGLE</name>
|
|
<description>Toggle output on counter underflow</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>CLEAR</name>
|
|
<description>Clear output on counter underflow</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>SET</name>
|
|
<description>Set output on counter underflow</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>PRSSEL</name>
|
|
<description>Compare/Capture Channel PRS Input Channel Selection</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>PRSCH0</name>
|
|
<description>PRS Channel 0 selected as input</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH1</name>
|
|
<description>PRS Channel 1 selected as input</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH2</name>
|
|
<description>PRS Channel 2 selected as input</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH3</name>
|
|
<description>PRS Channel 3 selected as input</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH4</name>
|
|
<description>PRS Channel 4 selected as input</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH5</name>
|
|
<description>PRS Channel 5 selected as input</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH6</name>
|
|
<description>PRS Channel 6 selected as input</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH7</name>
|
|
<description>PRS Channel 7 selected as input</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>INSEL</name>
|
|
<description>Input Selection</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>FILT</name>
|
|
<description>Digital Filter</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>ICEDGE</name>
|
|
<description>Input Capture Edge Select</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>RISING</name>
|
|
<description>Rising edges detected</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>FALLING</name>
|
|
<description>Falling edges detected</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>BOTH</name>
|
|
<description>Both edges detected</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>NONE</name>
|
|
<description>No edge detection, signal is left as it is</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>ICEVCTRL</name>
|
|
<description>Input Capture Event Control</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>EVERYEDGE</name>
|
|
<description>PRS output pulse, interrupt flag and DMA request set on every capture</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>EVERYSECONDEDGE</name>
|
|
<description>PRS output pulse, interrupt flag and DMA request set on every second capture</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>RISING</name>
|
|
<description>PRS output pulse, interrupt flag and DMA request set on rising edge only (if ICEDGE = BOTH)</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>FALLING</name>
|
|
<description>PRS output pulse, interrupt flag and DMA request set on falling edge only (if ICEDGE = BOTH)</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CC1_CCV</name>
|
|
<description>CC Channel Value Register</description>
|
|
<addressOffset>0x044</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>CCV</name>
|
|
<description>CC Channel Value</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CC1_CCVP</name>
|
|
<description>CC Channel Value Peek Register</description>
|
|
<addressOffset>0x048</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>CCVP</name>
|
|
<description>CC Channel Value Peek</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CC1_CCVB</name>
|
|
<description>CC Channel Buffer Register</description>
|
|
<addressOffset>0x04C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>CCVB</name>
|
|
<description>CC Channel Value Buffer</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CC2_CTRL</name>
|
|
<description>CC Channel Control Register</description>
|
|
<addressOffset>0x050</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0F373F17</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>MODE</name>
|
|
<description>CC Channel Mode</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>OFF</name>
|
|
<description>Compare/Capture channel turned off</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTCAPTURE</name>
|
|
<description>Input capture</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>OUTPUTCOMPARE</name>
|
|
<description>Output compare</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PWM</name>
|
|
<description>Pulse-Width Modulation</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>OUTINV</name>
|
|
<description>Output Invert</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>COIST</name>
|
|
<description>Compare Output Initial State</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CMOA</name>
|
|
<description>Compare Match Output Action</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>NONE</name>
|
|
<description>No action on compare match</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TOGGLE</name>
|
|
<description>Toggle output on compare match</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>CLEAR</name>
|
|
<description>Clear output on compare match</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>SET</name>
|
|
<description>Set output on compare match</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>COFOA</name>
|
|
<description>Counter Overflow Output Action</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>NONE</name>
|
|
<description>No action on counter overflow</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TOGGLE</name>
|
|
<description>Toggle output on counter overflow</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>CLEAR</name>
|
|
<description>Clear output on counter overflow</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>SET</name>
|
|
<description>Set output on counter overflow</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>CUFOA</name>
|
|
<description>Counter Underflow Output Action</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>NONE</name>
|
|
<description>No action on counter underflow</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TOGGLE</name>
|
|
<description>Toggle output on counter underflow</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>CLEAR</name>
|
|
<description>Clear output on counter underflow</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>SET</name>
|
|
<description>Set output on counter underflow</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>PRSSEL</name>
|
|
<description>Compare/Capture Channel PRS Input Channel Selection</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>PRSCH0</name>
|
|
<description>PRS Channel 0 selected as input</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH1</name>
|
|
<description>PRS Channel 1 selected as input</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH2</name>
|
|
<description>PRS Channel 2 selected as input</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH3</name>
|
|
<description>PRS Channel 3 selected as input</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH4</name>
|
|
<description>PRS Channel 4 selected as input</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH5</name>
|
|
<description>PRS Channel 5 selected as input</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH6</name>
|
|
<description>PRS Channel 6 selected as input</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH7</name>
|
|
<description>PRS Channel 7 selected as input</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>INSEL</name>
|
|
<description>Input Selection</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>FILT</name>
|
|
<description>Digital Filter</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>ICEDGE</name>
|
|
<description>Input Capture Edge Select</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>RISING</name>
|
|
<description>Rising edges detected</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>FALLING</name>
|
|
<description>Falling edges detected</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>BOTH</name>
|
|
<description>Both edges detected</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>NONE</name>
|
|
<description>No edge detection, signal is left as it is</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>ICEVCTRL</name>
|
|
<description>Input Capture Event Control</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>EVERYEDGE</name>
|
|
<description>PRS output pulse, interrupt flag and DMA request set on every capture</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>EVERYSECONDEDGE</name>
|
|
<description>PRS output pulse, interrupt flag and DMA request set on every second capture</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>RISING</name>
|
|
<description>PRS output pulse, interrupt flag and DMA request set on rising edge only (if ICEDGE = BOTH)</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>FALLING</name>
|
|
<description>PRS output pulse, interrupt flag and DMA request set on falling edge only (if ICEDGE = BOTH)</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CC2_CCV</name>
|
|
<description>CC Channel Value Register</description>
|
|
<addressOffset>0x054</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>CCV</name>
|
|
<description>CC Channel Value</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CC2_CCVP</name>
|
|
<description>CC Channel Value Peek Register</description>
|
|
<addressOffset>0x058</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>CCVP</name>
|
|
<description>CC Channel Value Peek</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CC2_CCVB</name>
|
|
<description>CC Channel Buffer Register</description>
|
|
<addressOffset>0x05C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>CCVB</name>
|
|
<description>CC Channel Value Buffer</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DTCTRL</name>
|
|
<description>DTI Control Register</description>
|
|
<addressOffset>0x070</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0100007F</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>DTEN</name>
|
|
<description>DTI Enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>DTDAS</name>
|
|
<description>DTI Automatic Start-up Functionality</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>DTIPOL</name>
|
|
<description>DTI Inactive Polarity</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>DTCINV</name>
|
|
<description>DTI Complementary Output Invert.</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>DTPRSSEL</name>
|
|
<description>DTI PRS Source Channel Select</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>PRSCH0</name>
|
|
<description>PRS Channel 0 selected as input</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH1</name>
|
|
<description>PRS Channel 1 selected as input</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH2</name>
|
|
<description>PRS Channel 2 selected as input</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH3</name>
|
|
<description>PRS Channel 3 selected as input</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH4</name>
|
|
<description>PRS Channel 4 selected as input</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH5</name>
|
|
<description>PRS Channel 5 selected as input</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH6</name>
|
|
<description>PRS Channel 6 selected as input</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH7</name>
|
|
<description>PRS Channel 7 selected as input</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>DTPRSEN</name>
|
|
<description>DTI PRS Source Enable</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DTTIME</name>
|
|
<description>DTI Time Control Register</description>
|
|
<addressOffset>0x074</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x003F3F0F</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>DTPRESC</name>
|
|
<description>DTI Prescaler Setting</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DIV1</name>
|
|
<description>The HFPERCLK is undivided</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV2</name>
|
|
<description>The HFPERCLK is divided by 2</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV4</name>
|
|
<description>The HFPERCLK is divided by 4</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV8</name>
|
|
<description>The HFPERCLK is divided by 8</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV16</name>
|
|
<description>The HFPERCLK is divided by 16</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV32</name>
|
|
<description>The HFPERCLK is divided by 32</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV64</name>
|
|
<description>The HFPERCLK is divided by 64</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV128</name>
|
|
<description>The HFPERCLK is divided by 128</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV256</name>
|
|
<description>The HFPERCLK is divided by 256</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV512</name>
|
|
<description>The HFPERCLK is divided by 512</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV1024</name>
|
|
<description>The HFPERCLK is divided by 1024</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>DTRISET</name>
|
|
<description>DTI Rise-time</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>6</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>DTFALLT</name>
|
|
<description>DTI Fall-time</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>6</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DTFC</name>
|
|
<description>DTI Fault Configuration Register</description>
|
|
<addressOffset>0x078</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0F030707</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>DTPRS0FSEL</name>
|
|
<description>DTI PRS Fault Source 0 Select</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>PRSCH0</name>
|
|
<description>PRS Channel 0 selected as fault source 0</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH1</name>
|
|
<description>PRS Channel 1 selected as fault source 0</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH2</name>
|
|
<description>PRS Channel 2 selected as fault source 0</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH3</name>
|
|
<description>PRS Channel 3 selected as fault source 0</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH4</name>
|
|
<description>PRS Channel 4 selected as fault source 0</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH5</name>
|
|
<description>PRS Channel 5 selected as fault source 0</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH6</name>
|
|
<description>PRS Channel 6 selected as fault source 0</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH7</name>
|
|
<description>PRS Channel 7 selected as fault source 0</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>DTPRS1FSEL</name>
|
|
<description>DTI PRS Fault Source 1 Select</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>PRSCH0</name>
|
|
<description>PRS Channel 0 selected as fault source 1</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH1</name>
|
|
<description>PRS Channel 1 selected as fault source 1</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH2</name>
|
|
<description>PRS Channel 2 selected as fault source 1</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH3</name>
|
|
<description>PRS Channel 3 selected as fault source 1</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH4</name>
|
|
<description>PRS Channel 4 selected as fault source 1</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH5</name>
|
|
<description>PRS Channel 5 selected as fault source 1</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH6</name>
|
|
<description>PRS Channel 6 selected as fault source 1</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH7</name>
|
|
<description>PRS Channel 7 selected as fault source 1</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>DTFA</name>
|
|
<description>DTI Fault Action</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>NONE</name>
|
|
<description>No action on fault</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INACTIVE</name>
|
|
<description>Set outputs inactive</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>CLEAR</name>
|
|
<description>Clear outputs</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TRISTATE</name>
|
|
<description>Tristate outputs</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>DTPRS0FEN</name>
|
|
<description>DTI PRS 0 Fault Enable</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>DTPRS1FEN</name>
|
|
<description>DTI PRS 1 Fault Enable</description>
|
|
<bitOffset>25</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>DTDBGFEN</name>
|
|
<description>DTI Debugger Fault Enable</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>DTLOCKUPFEN</name>
|
|
<description>DTI Lockup Fault Enable</description>
|
|
<bitOffset>27</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DTOGEN</name>
|
|
<description>DTI Output Generation Enable Register</description>
|
|
<addressOffset>0x07C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000003F</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>DTOGCC0EN</name>
|
|
<description>DTI CC0 Output Generation Enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>DTOGCC1EN</name>
|
|
<description>DTI CC1 Output Generation Enable</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>DTOGCC2EN</name>
|
|
<description>DTI CC2 Output Generation Enable</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>DTOGCDTI0EN</name>
|
|
<description>DTI CDTI0 Output Generation Enable</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>DTOGCDTI1EN</name>
|
|
<description>DTI CDTI1 Output Generation Enable</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>DTOGCDTI2EN</name>
|
|
<description>DTI CDTI2 Output Generation Enable</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DTFAULT</name>
|
|
<description>DTI Fault Register</description>
|
|
<addressOffset>0x080</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000000F</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>DTPRS0F</name>
|
|
<description>DTI PRS 0 Fault</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>DTPRS1F</name>
|
|
<description>DTI PRS 1 Fault</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>DTDBGF</name>
|
|
<description>DTI Debugger Fault</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>DTLOCKUPF</name>
|
|
<description>DTI Lockup Fault</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DTFAULTC</name>
|
|
<description>DTI Fault Clear Register</description>
|
|
<addressOffset>0x084</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000000F</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>DTPRS0FC</name>
|
|
<description>DTI PRS0 Fault Clear</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>DTPRS1FC</name>
|
|
<description>DTI PRS1 Fault Clear</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>DTDBGFC</name>
|
|
<description>DTI Debugger Fault Clear</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TLOCKUPFC</name>
|
|
<description>DTI Lockup Fault Clear</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DTLOCK</name>
|
|
<description>DTI Configuration Lock Register</description>
|
|
<addressOffset>0x088</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>LOCKKEY</name>
|
|
<description>DTI Lock Key</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>UNLOCKED</name>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>LOCKED</name>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>TIMER2</name>
|
|
<description>TIMER2</description>
|
|
<baseAddress>0x40010800</baseAddress>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x00000400</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<interrupt>
|
|
<name>TIMER2</name>
|
|
<value>11</value>
|
|
</interrupt>
|
|
<registers>
|
|
<register>
|
|
<name>CTRL</name>
|
|
<description>Control Register</description>
|
|
<addressOffset>0x000</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0F030FFB</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>MODE</name>
|
|
<description>Timer Mode</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>UP</name>
|
|
<description>Up-count mode</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DOWN</name>
|
|
<description>Down-count mode</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>UPDOWN</name>
|
|
<description>Up/down-count mode</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>QDEC</name>
|
|
<description>Quadrature decoder mode</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>SYNC</name>
|
|
<description>Timer Start/Stop/Reload Synchronization</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>OSMEN</name>
|
|
<description>One-shot Mode Enable</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>QDM</name>
|
|
<description>Quadrature Decoder Mode Selection</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>DEBUGRUN</name>
|
|
<description>Debug Mode Run Enable</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>DMACLRACT</name>
|
|
<description>DMA Request Clear on Active</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>RISEA</name>
|
|
<description>Timer Rising Input Edge Action</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>NONE</name>
|
|
<description>No action</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>START</name>
|
|
<description>Start counter without reload</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>STOP</name>
|
|
<description>Stop counter without reload</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>RELOADSTART</name>
|
|
<description>Reload and start counter</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>FALLA</name>
|
|
<description>Timer Falling Input Edge Action</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>NONE</name>
|
|
<description>No action</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>START</name>
|
|
<description>Start counter without reload</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>STOP</name>
|
|
<description>Stop counter without reload</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>RELOADSTART</name>
|
|
<description>Reload and start counter</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>CLKSEL</name>
|
|
<description>Clock Source Select</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>PRESCHFPERCLK</name>
|
|
<description>Prescaled HFPERCLK</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>CC1</name>
|
|
<description>Compare/Capture Channel 1 Input</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TIMEROUF</name>
|
|
<description>Timer is clocked by underflow(down-count) or overflow(up-count) in the lower numbered neighbor Timer</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>PRESC</name>
|
|
<description>Prescaler Setting</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DIV1</name>
|
|
<description>The HFPERCLK is undivided</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV2</name>
|
|
<description>The HFPERCLK is divided by 2</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV4</name>
|
|
<description>The HFPERCLK is divided by 4</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV8</name>
|
|
<description>The HFPERCLK is divided by 8</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV16</name>
|
|
<description>The HFPERCLK is divided by 16</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV32</name>
|
|
<description>The HFPERCLK is divided by 32</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV64</name>
|
|
<description>The HFPERCLK is divided by 64</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV128</name>
|
|
<description>The HFPERCLK is divided by 128</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV256</name>
|
|
<description>The HFPERCLK is divided by 256</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV512</name>
|
|
<description>The HFPERCLK is divided by 512</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV1024</name>
|
|
<description>The HFPERCLK is divided by 1024</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CMD</name>
|
|
<description>Command Register</description>
|
|
<addressOffset>0x004</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000003</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>START</name>
|
|
<description>Start Timer</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>STOP</name>
|
|
<description>Stop Timer</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>STATUS</name>
|
|
<description>Status Register</description>
|
|
<addressOffset>0x008</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x07070707</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>RUNNING</name>
|
|
<description>Running</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>DIR</name>
|
|
<description>Direction</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TOPBV</name>
|
|
<description>TOPB Valid</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CCVBV0</name>
|
|
<description>CC0 CCVB Valid</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CCVBV1</name>
|
|
<description>CC1 CCVB Valid</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CCVBV2</name>
|
|
<description>CC2 CCVB Valid</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>ICV0</name>
|
|
<description>CC0 Input Capture Valid</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>ICV1</name>
|
|
<description>CC1 Input Capture Valid</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>ICV2</name>
|
|
<description>CC2 Input Capture Valid</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CCPOL0</name>
|
|
<description>CC0 Polarity</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CCPOL1</name>
|
|
<description>CC1 Polarity</description>
|
|
<bitOffset>25</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CCPOL2</name>
|
|
<description>CC2 Polarity</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IEN</name>
|
|
<description>Interrupt Enable Register</description>
|
|
<addressOffset>0x00C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000773</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>OF</name>
|
|
<description>Overflow Interrupt Enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>UF</name>
|
|
<description>Underflow Interrupt Enable</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CC0</name>
|
|
<description>CC Channel 0 Interrupt Enable</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CC1</name>
|
|
<description>CC Channel 1 Interrupt Enable</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CC2</name>
|
|
<description>CC Channel 2 Interrupt Enable</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>ICBOF0</name>
|
|
<description>CC Channel 0 Input Capture Buffer Overflow Interrupt Enable</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>ICBOF1</name>
|
|
<description>CC Channel 1 Input Capture Buffer Overflow Interrupt Enable</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>ICBOF2</name>
|
|
<description>CC Channel 2 Input Capture Buffer Overflow Interrupt Enable</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IF</name>
|
|
<description>Interrupt Flag Register</description>
|
|
<addressOffset>0x010</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000773</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>OF</name>
|
|
<description>Overflow Interrupt Flag</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>UF</name>
|
|
<description>Underflow Interrupt Flag</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CC0</name>
|
|
<description>CC Channel 0 Interrupt Flag</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CC1</name>
|
|
<description>CC Channel 1 Interrupt Flag</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CC2</name>
|
|
<description>CC Channel 2 Interrupt Flag</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>ICBOF0</name>
|
|
<description>CC Channel 0 Input Capture Buffer Overflow Interrupt Flag</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>ICBOF1</name>
|
|
<description>CC Channel 1 Input Capture Buffer Overflow Interrupt Flag</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>ICBOF2</name>
|
|
<description>CC Channel 2 Input Capture Buffer Overflow Interrupt Flag</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IFS</name>
|
|
<description>Interrupt Flag Set Register</description>
|
|
<addressOffset>0x014</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000773</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>OF</name>
|
|
<description>Overflow Interrupt Flag Set</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>UF</name>
|
|
<description>Underflow Interrupt Flag Set</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CC0</name>
|
|
<description>CC Channel 0 Interrupt Flag Set</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CC1</name>
|
|
<description>CC Channel 1 Interrupt Flag Set</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CC2</name>
|
|
<description>CC Channel 2 Interrupt Flag Set</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>ICBOF0</name>
|
|
<description>CC Channel 0 Input Capture Buffer Overflow Interrupt Flag Set</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>ICBOF1</name>
|
|
<description>CC Channel 1 Input Capture Buffer Overflow Interrupt Flag Set</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>ICBOF2</name>
|
|
<description>CC Channel 2 Input Capture Buffer Overflow Interrupt Flag Set</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IFC</name>
|
|
<description>Interrupt Flag Clear Register</description>
|
|
<addressOffset>0x018</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000773</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>OF</name>
|
|
<description>Overflow Interrupt Flag Clear</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>UF</name>
|
|
<description>Underflow Interrupt Flag Clear</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CC0</name>
|
|
<description>CC Channel 0 Interrupt Flag Clear</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CC1</name>
|
|
<description>CC Channel 1 Interrupt Flag Clear</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CC2</name>
|
|
<description>CC Channel 2 Interrupt Flag Clear</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>ICBOF0</name>
|
|
<description>CC Channel 0 Input Capture Buffer Overflow Interrupt Flag Clear</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>ICBOF1</name>
|
|
<description>CC Channel 1 Input Capture Buffer Overflow Interrupt Flag Clear</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>ICBOF2</name>
|
|
<description>CC Channel 2 Input Capture Buffer Overflow Interrupt Flag Clear</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TOP</name>
|
|
<description>Counter Top Value Register</description>
|
|
<addressOffset>0x01C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000FFFF</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>TOP</name>
|
|
<description>Counter Top Value</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TOPB</name>
|
|
<description>Counter Top Value Buffer Register</description>
|
|
<addressOffset>0x020</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>TOPB</name>
|
|
<description>Counter Top Value Buffer</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CNT</name>
|
|
<description>Counter Value Register</description>
|
|
<addressOffset>0x024</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>CNT</name>
|
|
<description>Counter Value</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>ROUTE</name>
|
|
<description>I/O Routing Register</description>
|
|
<addressOffset>0x028</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00030707</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>CC0PEN</name>
|
|
<description>CC Channel 0 Pin Enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CC1PEN</name>
|
|
<description>CC Channel 1 Pin Enable</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CC2PEN</name>
|
|
<description>CC Channel 2 Pin Enable</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CDTI0PEN</name>
|
|
<description>CC Channel 0 Complementary Dead-Time Insertion Pin Enable</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CDTI1PEN</name>
|
|
<description>CC Channel 1 Complementary Dead-Time Insertion Pin Enable</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CDTI2PEN</name>
|
|
<description>CC Channel 2 Complementary Dead-Time Insertion Pin Enable</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>LOCATION</name>
|
|
<description>I/O Location</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>LOC0</name>
|
|
<description>Location 0</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>LOC1</name>
|
|
<description>Location 1</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>LOC2</name>
|
|
<description>Location 2</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>LOC3</name>
|
|
<description>Location 3</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CC0_CTRL</name>
|
|
<description>CC Channel Control Register</description>
|
|
<addressOffset>0x030</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0F373F17</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>MODE</name>
|
|
<description>CC Channel Mode</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>OFF</name>
|
|
<description>Compare/Capture channel turned off</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTCAPTURE</name>
|
|
<description>Input capture</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>OUTPUTCOMPARE</name>
|
|
<description>Output compare</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PWM</name>
|
|
<description>Pulse-Width Modulation</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>OUTINV</name>
|
|
<description>Output Invert</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>COIST</name>
|
|
<description>Compare Output Initial State</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CMOA</name>
|
|
<description>Compare Match Output Action</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>NONE</name>
|
|
<description>No action on compare match</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TOGGLE</name>
|
|
<description>Toggle output on compare match</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>CLEAR</name>
|
|
<description>Clear output on compare match</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>SET</name>
|
|
<description>Set output on compare match</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>COFOA</name>
|
|
<description>Counter Overflow Output Action</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>NONE</name>
|
|
<description>No action on counter overflow</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TOGGLE</name>
|
|
<description>Toggle output on counter overflow</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>CLEAR</name>
|
|
<description>Clear output on counter overflow</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>SET</name>
|
|
<description>Set output on counter overflow</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>CUFOA</name>
|
|
<description>Counter Underflow Output Action</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>NONE</name>
|
|
<description>No action on counter underflow</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TOGGLE</name>
|
|
<description>Toggle output on counter underflow</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>CLEAR</name>
|
|
<description>Clear output on counter underflow</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>SET</name>
|
|
<description>Set output on counter underflow</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>PRSSEL</name>
|
|
<description>Compare/Capture Channel PRS Input Channel Selection</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>PRSCH0</name>
|
|
<description>PRS Channel 0 selected as input</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH1</name>
|
|
<description>PRS Channel 1 selected as input</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH2</name>
|
|
<description>PRS Channel 2 selected as input</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH3</name>
|
|
<description>PRS Channel 3 selected as input</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH4</name>
|
|
<description>PRS Channel 4 selected as input</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH5</name>
|
|
<description>PRS Channel 5 selected as input</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH6</name>
|
|
<description>PRS Channel 6 selected as input</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH7</name>
|
|
<description>PRS Channel 7 selected as input</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>INSEL</name>
|
|
<description>Input Selection</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>FILT</name>
|
|
<description>Digital Filter</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>ICEDGE</name>
|
|
<description>Input Capture Edge Select</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>RISING</name>
|
|
<description>Rising edges detected</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>FALLING</name>
|
|
<description>Falling edges detected</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>BOTH</name>
|
|
<description>Both edges detected</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>NONE</name>
|
|
<description>No edge detection, signal is left as it is</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>ICEVCTRL</name>
|
|
<description>Input Capture Event Control</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>EVERYEDGE</name>
|
|
<description>PRS output pulse, interrupt flag and DMA request set on every capture</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>EVERYSECONDEDGE</name>
|
|
<description>PRS output pulse, interrupt flag and DMA request set on every second capture</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>RISING</name>
|
|
<description>PRS output pulse, interrupt flag and DMA request set on rising edge only (if ICEDGE = BOTH)</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>FALLING</name>
|
|
<description>PRS output pulse, interrupt flag and DMA request set on falling edge only (if ICEDGE = BOTH)</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CC0_CCV</name>
|
|
<description>CC Channel Value Register</description>
|
|
<addressOffset>0x034</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>CCV</name>
|
|
<description>CC Channel Value</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CC0_CCVP</name>
|
|
<description>CC Channel Value Peek Register</description>
|
|
<addressOffset>0x038</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>CCVP</name>
|
|
<description>CC Channel Value Peek</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CC0_CCVB</name>
|
|
<description>CC Channel Buffer Register</description>
|
|
<addressOffset>0x03C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>CCVB</name>
|
|
<description>CC Channel Value Buffer</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CC1_CTRL</name>
|
|
<description>CC Channel Control Register</description>
|
|
<addressOffset>0x040</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0F373F17</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>MODE</name>
|
|
<description>CC Channel Mode</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>OFF</name>
|
|
<description>Compare/Capture channel turned off</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTCAPTURE</name>
|
|
<description>Input capture</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>OUTPUTCOMPARE</name>
|
|
<description>Output compare</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PWM</name>
|
|
<description>Pulse-Width Modulation</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>OUTINV</name>
|
|
<description>Output Invert</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>COIST</name>
|
|
<description>Compare Output Initial State</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CMOA</name>
|
|
<description>Compare Match Output Action</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>NONE</name>
|
|
<description>No action on compare match</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TOGGLE</name>
|
|
<description>Toggle output on compare match</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>CLEAR</name>
|
|
<description>Clear output on compare match</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>SET</name>
|
|
<description>Set output on compare match</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>COFOA</name>
|
|
<description>Counter Overflow Output Action</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>NONE</name>
|
|
<description>No action on counter overflow</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TOGGLE</name>
|
|
<description>Toggle output on counter overflow</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>CLEAR</name>
|
|
<description>Clear output on counter overflow</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>SET</name>
|
|
<description>Set output on counter overflow</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>CUFOA</name>
|
|
<description>Counter Underflow Output Action</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>NONE</name>
|
|
<description>No action on counter underflow</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TOGGLE</name>
|
|
<description>Toggle output on counter underflow</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>CLEAR</name>
|
|
<description>Clear output on counter underflow</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>SET</name>
|
|
<description>Set output on counter underflow</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>PRSSEL</name>
|
|
<description>Compare/Capture Channel PRS Input Channel Selection</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>PRSCH0</name>
|
|
<description>PRS Channel 0 selected as input</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH1</name>
|
|
<description>PRS Channel 1 selected as input</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH2</name>
|
|
<description>PRS Channel 2 selected as input</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH3</name>
|
|
<description>PRS Channel 3 selected as input</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH4</name>
|
|
<description>PRS Channel 4 selected as input</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH5</name>
|
|
<description>PRS Channel 5 selected as input</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH6</name>
|
|
<description>PRS Channel 6 selected as input</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH7</name>
|
|
<description>PRS Channel 7 selected as input</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>INSEL</name>
|
|
<description>Input Selection</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>FILT</name>
|
|
<description>Digital Filter</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>ICEDGE</name>
|
|
<description>Input Capture Edge Select</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>RISING</name>
|
|
<description>Rising edges detected</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>FALLING</name>
|
|
<description>Falling edges detected</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>BOTH</name>
|
|
<description>Both edges detected</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>NONE</name>
|
|
<description>No edge detection, signal is left as it is</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>ICEVCTRL</name>
|
|
<description>Input Capture Event Control</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>EVERYEDGE</name>
|
|
<description>PRS output pulse, interrupt flag and DMA request set on every capture</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>EVERYSECONDEDGE</name>
|
|
<description>PRS output pulse, interrupt flag and DMA request set on every second capture</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>RISING</name>
|
|
<description>PRS output pulse, interrupt flag and DMA request set on rising edge only (if ICEDGE = BOTH)</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>FALLING</name>
|
|
<description>PRS output pulse, interrupt flag and DMA request set on falling edge only (if ICEDGE = BOTH)</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CC1_CCV</name>
|
|
<description>CC Channel Value Register</description>
|
|
<addressOffset>0x044</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>CCV</name>
|
|
<description>CC Channel Value</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CC1_CCVP</name>
|
|
<description>CC Channel Value Peek Register</description>
|
|
<addressOffset>0x048</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>CCVP</name>
|
|
<description>CC Channel Value Peek</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CC1_CCVB</name>
|
|
<description>CC Channel Buffer Register</description>
|
|
<addressOffset>0x04C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>CCVB</name>
|
|
<description>CC Channel Value Buffer</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CC2_CTRL</name>
|
|
<description>CC Channel Control Register</description>
|
|
<addressOffset>0x050</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0F373F17</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>MODE</name>
|
|
<description>CC Channel Mode</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>OFF</name>
|
|
<description>Compare/Capture channel turned off</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTCAPTURE</name>
|
|
<description>Input capture</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>OUTPUTCOMPARE</name>
|
|
<description>Output compare</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PWM</name>
|
|
<description>Pulse-Width Modulation</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>OUTINV</name>
|
|
<description>Output Invert</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>COIST</name>
|
|
<description>Compare Output Initial State</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CMOA</name>
|
|
<description>Compare Match Output Action</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>NONE</name>
|
|
<description>No action on compare match</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TOGGLE</name>
|
|
<description>Toggle output on compare match</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>CLEAR</name>
|
|
<description>Clear output on compare match</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>SET</name>
|
|
<description>Set output on compare match</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>COFOA</name>
|
|
<description>Counter Overflow Output Action</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>NONE</name>
|
|
<description>No action on counter overflow</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TOGGLE</name>
|
|
<description>Toggle output on counter overflow</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>CLEAR</name>
|
|
<description>Clear output on counter overflow</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>SET</name>
|
|
<description>Set output on counter overflow</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>CUFOA</name>
|
|
<description>Counter Underflow Output Action</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>NONE</name>
|
|
<description>No action on counter underflow</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TOGGLE</name>
|
|
<description>Toggle output on counter underflow</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>CLEAR</name>
|
|
<description>Clear output on counter underflow</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>SET</name>
|
|
<description>Set output on counter underflow</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>PRSSEL</name>
|
|
<description>Compare/Capture Channel PRS Input Channel Selection</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>PRSCH0</name>
|
|
<description>PRS Channel 0 selected as input</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH1</name>
|
|
<description>PRS Channel 1 selected as input</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH2</name>
|
|
<description>PRS Channel 2 selected as input</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH3</name>
|
|
<description>PRS Channel 3 selected as input</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH4</name>
|
|
<description>PRS Channel 4 selected as input</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH5</name>
|
|
<description>PRS Channel 5 selected as input</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH6</name>
|
|
<description>PRS Channel 6 selected as input</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH7</name>
|
|
<description>PRS Channel 7 selected as input</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>INSEL</name>
|
|
<description>Input Selection</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>FILT</name>
|
|
<description>Digital Filter</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>ICEDGE</name>
|
|
<description>Input Capture Edge Select</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>RISING</name>
|
|
<description>Rising edges detected</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>FALLING</name>
|
|
<description>Falling edges detected</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>BOTH</name>
|
|
<description>Both edges detected</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>NONE</name>
|
|
<description>No edge detection, signal is left as it is</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>ICEVCTRL</name>
|
|
<description>Input Capture Event Control</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>EVERYEDGE</name>
|
|
<description>PRS output pulse, interrupt flag and DMA request set on every capture</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>EVERYSECONDEDGE</name>
|
|
<description>PRS output pulse, interrupt flag and DMA request set on every second capture</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>RISING</name>
|
|
<description>PRS output pulse, interrupt flag and DMA request set on rising edge only (if ICEDGE = BOTH)</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>FALLING</name>
|
|
<description>PRS output pulse, interrupt flag and DMA request set on falling edge only (if ICEDGE = BOTH)</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CC2_CCV</name>
|
|
<description>CC Channel Value Register</description>
|
|
<addressOffset>0x054</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>CCV</name>
|
|
<description>CC Channel Value</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CC2_CCVP</name>
|
|
<description>CC Channel Value Peek Register</description>
|
|
<addressOffset>0x058</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>CCVP</name>
|
|
<description>CC Channel Value Peek</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CC2_CCVB</name>
|
|
<description>CC Channel Buffer Register</description>
|
|
<addressOffset>0x05C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>CCVB</name>
|
|
<description>CC Channel Value Buffer</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DTCTRL</name>
|
|
<description>DTI Control Register</description>
|
|
<addressOffset>0x070</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0100007F</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>DTEN</name>
|
|
<description>DTI Enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>DTDAS</name>
|
|
<description>DTI Automatic Start-up Functionality</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>DTIPOL</name>
|
|
<description>DTI Inactive Polarity</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>DTCINV</name>
|
|
<description>DTI Complementary Output Invert.</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>DTPRSSEL</name>
|
|
<description>DTI PRS Source Channel Select</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>PRSCH0</name>
|
|
<description>PRS Channel 0 selected as input</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH1</name>
|
|
<description>PRS Channel 1 selected as input</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH2</name>
|
|
<description>PRS Channel 2 selected as input</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH3</name>
|
|
<description>PRS Channel 3 selected as input</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH4</name>
|
|
<description>PRS Channel 4 selected as input</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH5</name>
|
|
<description>PRS Channel 5 selected as input</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH6</name>
|
|
<description>PRS Channel 6 selected as input</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH7</name>
|
|
<description>PRS Channel 7 selected as input</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>DTPRSEN</name>
|
|
<description>DTI PRS Source Enable</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DTTIME</name>
|
|
<description>DTI Time Control Register</description>
|
|
<addressOffset>0x074</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x003F3F0F</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>DTPRESC</name>
|
|
<description>DTI Prescaler Setting</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DIV1</name>
|
|
<description>The HFPERCLK is undivided</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV2</name>
|
|
<description>The HFPERCLK is divided by 2</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV4</name>
|
|
<description>The HFPERCLK is divided by 4</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV8</name>
|
|
<description>The HFPERCLK is divided by 8</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV16</name>
|
|
<description>The HFPERCLK is divided by 16</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV32</name>
|
|
<description>The HFPERCLK is divided by 32</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV64</name>
|
|
<description>The HFPERCLK is divided by 64</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV128</name>
|
|
<description>The HFPERCLK is divided by 128</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV256</name>
|
|
<description>The HFPERCLK is divided by 256</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV512</name>
|
|
<description>The HFPERCLK is divided by 512</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV1024</name>
|
|
<description>The HFPERCLK is divided by 1024</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>DTRISET</name>
|
|
<description>DTI Rise-time</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>6</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>DTFALLT</name>
|
|
<description>DTI Fall-time</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>6</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DTFC</name>
|
|
<description>DTI Fault Configuration Register</description>
|
|
<addressOffset>0x078</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0F030707</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>DTPRS0FSEL</name>
|
|
<description>DTI PRS Fault Source 0 Select</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>PRSCH0</name>
|
|
<description>PRS Channel 0 selected as fault source 0</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH1</name>
|
|
<description>PRS Channel 1 selected as fault source 0</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH2</name>
|
|
<description>PRS Channel 2 selected as fault source 0</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH3</name>
|
|
<description>PRS Channel 3 selected as fault source 0</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH4</name>
|
|
<description>PRS Channel 4 selected as fault source 0</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH5</name>
|
|
<description>PRS Channel 5 selected as fault source 0</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH6</name>
|
|
<description>PRS Channel 6 selected as fault source 0</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH7</name>
|
|
<description>PRS Channel 7 selected as fault source 0</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>DTPRS1FSEL</name>
|
|
<description>DTI PRS Fault Source 1 Select</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>PRSCH0</name>
|
|
<description>PRS Channel 0 selected as fault source 1</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH1</name>
|
|
<description>PRS Channel 1 selected as fault source 1</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH2</name>
|
|
<description>PRS Channel 2 selected as fault source 1</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH3</name>
|
|
<description>PRS Channel 3 selected as fault source 1</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH4</name>
|
|
<description>PRS Channel 4 selected as fault source 1</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH5</name>
|
|
<description>PRS Channel 5 selected as fault source 1</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH6</name>
|
|
<description>PRS Channel 6 selected as fault source 1</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH7</name>
|
|
<description>PRS Channel 7 selected as fault source 1</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>DTFA</name>
|
|
<description>DTI Fault Action</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>NONE</name>
|
|
<description>No action on fault</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INACTIVE</name>
|
|
<description>Set outputs inactive</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>CLEAR</name>
|
|
<description>Clear outputs</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TRISTATE</name>
|
|
<description>Tristate outputs</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>DTPRS0FEN</name>
|
|
<description>DTI PRS 0 Fault Enable</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>DTPRS1FEN</name>
|
|
<description>DTI PRS 1 Fault Enable</description>
|
|
<bitOffset>25</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>DTDBGFEN</name>
|
|
<description>DTI Debugger Fault Enable</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>DTLOCKUPFEN</name>
|
|
<description>DTI Lockup Fault Enable</description>
|
|
<bitOffset>27</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DTOGEN</name>
|
|
<description>DTI Output Generation Enable Register</description>
|
|
<addressOffset>0x07C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000003F</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>DTOGCC0EN</name>
|
|
<description>DTI CC0 Output Generation Enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>DTOGCC1EN</name>
|
|
<description>DTI CC1 Output Generation Enable</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>DTOGCC2EN</name>
|
|
<description>DTI CC2 Output Generation Enable</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>DTOGCDTI0EN</name>
|
|
<description>DTI CDTI0 Output Generation Enable</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>DTOGCDTI1EN</name>
|
|
<description>DTI CDTI1 Output Generation Enable</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>DTOGCDTI2EN</name>
|
|
<description>DTI CDTI2 Output Generation Enable</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DTFAULT</name>
|
|
<description>DTI Fault Register</description>
|
|
<addressOffset>0x080</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000000F</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>DTPRS0F</name>
|
|
<description>DTI PRS 0 Fault</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>DTPRS1F</name>
|
|
<description>DTI PRS 1 Fault</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>DTDBGF</name>
|
|
<description>DTI Debugger Fault</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>DTLOCKUPF</name>
|
|
<description>DTI Lockup Fault</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DTFAULTC</name>
|
|
<description>DTI Fault Clear Register</description>
|
|
<addressOffset>0x084</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000000F</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>DTPRS0FC</name>
|
|
<description>DTI PRS0 Fault Clear</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>DTPRS1FC</name>
|
|
<description>DTI PRS1 Fault Clear</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>DTDBGFC</name>
|
|
<description>DTI Debugger Fault Clear</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TLOCKUPFC</name>
|
|
<description>DTI Lockup Fault Clear</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DTLOCK</name>
|
|
<description>DTI Configuration Lock Register</description>
|
|
<addressOffset>0x088</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>LOCKKEY</name>
|
|
<description>DTI Lock Key</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>UNLOCKED</name>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>LOCKED</name>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>USART0</name>
|
|
<description>USART0</description>
|
|
<baseAddress>0x4000C000</baseAddress>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x00000400</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<interrupt>
|
|
<name>USART0_RX</name>
|
|
<value>3</value>
|
|
</interrupt>
|
|
<interrupt>
|
|
<name>USART0_TX</name>
|
|
<value>4</value>
|
|
</interrupt>
|
|
<registers>
|
|
<register>
|
|
<name>CTRL</name>
|
|
<description>Control Register</description>
|
|
<addressOffset>0x000</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x1DFFFF7F</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>SYNC</name>
|
|
<description>USART Synchronous Mode</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>LOOPBK</name>
|
|
<description>Loopback Enable</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CCEN</name>
|
|
<description>Collision Check Enable</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>MPM</name>
|
|
<description>Multi-Processor Mode</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>MPAB</name>
|
|
<description>Multi-Processor Address-Bit</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>OVS</name>
|
|
<description>Oversampling</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>X16</name>
|
|
<description>Regular UART mode with 16X oversampling in asynchronous mode</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>X8</name>
|
|
<description>Double speed with 8X oversampling in asynchronous mode</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>X6</name>
|
|
<description>6X oversampling in asynchronous mode</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>X4</name>
|
|
<description>Quadruple speed with 4X oversampling in asynchronous mode</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>CLKPOL</name>
|
|
<description>Clock Polarity</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CLKPHA</name>
|
|
<description>Clock Edge For Setup/Sample</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>MSBF</name>
|
|
<description>Most Significant Bit First</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CSMA</name>
|
|
<description>Action On Slave-Select In Master Mode</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>TXBIL</name>
|
|
<description>TX Buffer Interrupt Level</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>RXINV</name>
|
|
<description>Receiver Input Invert</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>TXINV</name>
|
|
<description>Transmitter output Invert</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CSINV</name>
|
|
<description>Chip Select Invert</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>AUTOCS</name>
|
|
<description>Automatic Chip Select</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>AUTOTRI</name>
|
|
<description>Automatic TX Tristate</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>SCMODE</name>
|
|
<description>SmartCard Mode</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>SCRETRANS</name>
|
|
<description>SmartCard Retransmit</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>SKIPPERRF</name>
|
|
<description>Skip Parity Error Frames</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>BIT8DV</name>
|
|
<description>Bit 8 Default Value</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>ERRSDMA</name>
|
|
<description>Halt DMA On Error</description>
|
|
<bitOffset>22</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>ERRSRX</name>
|
|
<description>Disable RX On Error</description>
|
|
<bitOffset>23</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>ERRSTX</name>
|
|
<description>Disable TX On Error</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>TXDELAY</name>
|
|
<description>TX Delay Transmission</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>NONE</name>
|
|
<description>Frames are transmitted immediately</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>SINGLE</name>
|
|
<description>Transmission of new frames are delayed by a single baud period</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DOUBLE</name>
|
|
<description>Transmission of new frames are delayed by two baud periods</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TRIPLE</name>
|
|
<description>Transmission of new frames are delayed by three baud periods</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>BYTESWAP</name>
|
|
<description>Byteswap In Double Accesses</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FRAME</name>
|
|
<description>USART Frame Format Register</description>
|
|
<addressOffset>0x004</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00001005</resetValue>
|
|
<resetMask>0x0000330F</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>DATABITS</name>
|
|
<description>Data-Bit Mode</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>FOUR</name>
|
|
<description>Each frame contains 4 data bits</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>FIVE</name>
|
|
<description>Each frame contains 5 data bits</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>SIX</name>
|
|
<description>Each frame contains 6 data bits</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>SEVEN</name>
|
|
<description>Each frame contains 7 data bits</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>EIGHT</name>
|
|
<description>Each frame contains 8 data bits</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>NINE</name>
|
|
<description>Each frame contains 9 data bits</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TEN</name>
|
|
<description>Each frame contains 10 data bits</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>ELEVEN</name>
|
|
<description>Each frame contains 11 data bits</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TWELVE</name>
|
|
<description>Each frame contains 12 data bits</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>THIRTEEN</name>
|
|
<description>Each frame contains 13 data bits</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>FOURTEEN</name>
|
|
<description>Each frame contains 14 data bits</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>FIFTEEN</name>
|
|
<description>Each frame contains 15 data bits</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>SIXTEEN</name>
|
|
<description>Each frame contains 16 data bits</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>PARITY</name>
|
|
<description>Parity-Bit Mode</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>NONE</name>
|
|
<description>Parity bits are not used</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>EVEN</name>
|
|
<description>Even parity are used. Parity bits are automatically generated and checked by hardware.</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>ODD</name>
|
|
<description>Odd parity is used. Parity bits are automatically generated and checked by hardware.</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>STOPBITS</name>
|
|
<description>Stop-Bit Mode</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>HALF</name>
|
|
<description>The transmitter generates a half stop bit. Stop-bits are not verified by receiver</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>ONE</name>
|
|
<description>One stop bit is generated and verified</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>ONEANDAHALF</name>
|
|
<description>The transmitter generates one and a half stop bit. The receiver verifies the first stop bit</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TWO</name>
|
|
<description>The transmitter generates two stop bits. The receiver checks the first stop-bit only</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TRIGCTRL</name>
|
|
<description>USART Trigger Control register</description>
|
|
<addressOffset>0x008</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000037</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>TSEL</name>
|
|
<description>Trigger PRS Channel Select</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>PRSCH0</name>
|
|
<description>PRS Channel 0 selected</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH1</name>
|
|
<description>PRS Channel 1 selected</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH2</name>
|
|
<description>PRS Channel 2 selected</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH3</name>
|
|
<description>PRS Channel 3 selected</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH4</name>
|
|
<description>PRS Channel 4 selected</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH5</name>
|
|
<description>PRS Channel 5 selected</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH6</name>
|
|
<description>PRS Channel 6 selected</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH7</name>
|
|
<description>PRS Channel 7 selected</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>RXTEN</name>
|
|
<description>Receive Trigger Enable</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>TXTEN</name>
|
|
<description>Transmit Trigger Enable</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CMD</name>
|
|
<description>Command Register</description>
|
|
<addressOffset>0x00C</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000FFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>RXEN</name>
|
|
<description>Receiver Enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXDIS</name>
|
|
<description>Receiver Disable</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXEN</name>
|
|
<description>Transmitter Enable</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXDIS</name>
|
|
<description>Transmitter Disable</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>MASTEREN</name>
|
|
<description>Master Enable</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>MASTERDIS</name>
|
|
<description>Master Disable</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXBLOCKEN</name>
|
|
<description>Receiver Block Enable</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXBLOCKDIS</name>
|
|
<description>Receiver Block Disable</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXTRIEN</name>
|
|
<description>Transmitter Tristate Enable</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXTRIDIS</name>
|
|
<description>Transmitter Tristate Disable</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CLEARTX</name>
|
|
<description>Clear TX</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CLEARRX</name>
|
|
<description>Clear RX</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>STATUS</name>
|
|
<description>USART Status Register</description>
|
|
<addressOffset>0x010</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000040</resetValue>
|
|
<resetMask>0x000001FF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>RXENS</name>
|
|
<description>Receiver Enable Status</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXENS</name>
|
|
<description>Transmitter Enable Status</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>MASTER</name>
|
|
<description>SPI Master Mode</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXBLOCK</name>
|
|
<description>Block Incoming Data</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXTRI</name>
|
|
<description>Transmitter Tristated</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXC</name>
|
|
<description>TX Complete</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXBL</name>
|
|
<description>TX Buffer Level</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXDATAV</name>
|
|
<description>RX Data Valid</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXFULL</name>
|
|
<description>RX FIFO Full</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLKDIV</name>
|
|
<description>Clock Control Register</description>
|
|
<addressOffset>0x014</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x001FFFC0</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>DIV</name>
|
|
<description>Fractional Clock Divider</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>15</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RXDATAX</name>
|
|
<description>RX Buffer Data Extended Register</description>
|
|
<addressOffset>0x018</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000C1FF</resetMask>
|
|
<readAction>modifyExternal</readAction>
|
|
<fields>
|
|
<field>
|
|
<name>RXDATA</name>
|
|
<description>RX Data</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>9</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>PERR</name>
|
|
<description>Data Parity Error</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>FERR</name>
|
|
<description>Data Framing Error</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RXDATA</name>
|
|
<description>RX Buffer Data Register</description>
|
|
<addressOffset>0x01C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x000000FF</resetMask>
|
|
<readAction>modifyExternal</readAction>
|
|
<fields>
|
|
<field>
|
|
<name>RXDATA</name>
|
|
<description>RX Data</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RXDOUBLEX</name>
|
|
<description>RX Buffer Double Data Extended Register</description>
|
|
<addressOffset>0x020</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0xC1FFC1FF</resetMask>
|
|
<readAction>modifyExternal</readAction>
|
|
<fields>
|
|
<field>
|
|
<name>RXDATA0</name>
|
|
<description>RX Data 0</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>9</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>PERR0</name>
|
|
<description>Data Parity Error 0</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>FERR0</name>
|
|
<description>Data Framing Error 0</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXDATA1</name>
|
|
<description>RX Data 1</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>9</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>PERR1</name>
|
|
<description>Data Parity Error 1</description>
|
|
<bitOffset>30</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>FERR1</name>
|
|
<description>Data Framing Error 1</description>
|
|
<bitOffset>31</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RXDOUBLE</name>
|
|
<description>RX FIFO Double Data Register</description>
|
|
<addressOffset>0x024</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<readAction>modifyExternal</readAction>
|
|
<fields>
|
|
<field>
|
|
<name>RXDATA0</name>
|
|
<description>RX Data 0</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXDATA1</name>
|
|
<description>RX Data 1</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RXDATAXP</name>
|
|
<description>RX Buffer Data Extended Peek Register</description>
|
|
<addressOffset>0x028</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000C1FF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>RXDATAP</name>
|
|
<description>RX Data Peek</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>9</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>PERRP</name>
|
|
<description>Data Parity Error Peek</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>FERRP</name>
|
|
<description>Data Framing Error Peek</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RXDOUBLEXP</name>
|
|
<description>RX Buffer Double Data Extended Peek Register</description>
|
|
<addressOffset>0x02C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0xC1FFC1FF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>RXDATAP0</name>
|
|
<description>RX Data 0 Peek</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>9</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>PERRP0</name>
|
|
<description>Data Parity Error 0 Peek</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>FERRP0</name>
|
|
<description>Data Framing Error 0 Peek</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXDATAP1</name>
|
|
<description>RX Data 1 Peek</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>9</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>PERRP1</name>
|
|
<description>Data Parity Error 1 Peek</description>
|
|
<bitOffset>30</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>FERRP1</name>
|
|
<description>Data Framing Error 1 Peek</description>
|
|
<bitOffset>31</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TXDATAX</name>
|
|
<description>TX Buffer Data Extended Register</description>
|
|
<addressOffset>0x030</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000F9FF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>TXDATAX</name>
|
|
<description>TX Data</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>9</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>UBRXAT</name>
|
|
<description>Unblock RX After Transmission</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXTRIAT</name>
|
|
<description>Set TXTRI After Transmission</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXBREAK</name>
|
|
<description>Transmit Data As Break</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXDISAT</name>
|
|
<description>Clear TXEN After Transmission</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXENAT</name>
|
|
<description>Enable RX After Transmission</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TXDATA</name>
|
|
<description>TX Buffer Data Register</description>
|
|
<addressOffset>0x034</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x000000FF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>TXDATA</name>
|
|
<description>TX Data</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TXDOUBLEX</name>
|
|
<description>TX Buffer Double Data Extended Register</description>
|
|
<addressOffset>0x038</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0xF9FFF9FF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>TXDATA0</name>
|
|
<description>TX Data</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>9</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>UBRXAT0</name>
|
|
<description>Unblock RX After Transmission</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXTRIAT0</name>
|
|
<description>Set TXTRI After Transmission</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXBREAK0</name>
|
|
<description>Transmit Data As Break</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXDISAT0</name>
|
|
<description>Clear TXEN After Transmission</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXENAT0</name>
|
|
<description>Enable RX After Transmission</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXDATA1</name>
|
|
<description>TX Data</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>9</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>UBRXAT1</name>
|
|
<description>Unblock RX After Transmission</description>
|
|
<bitOffset>27</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXTRIAT1</name>
|
|
<description>Set TXTRI After Transmission</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXBREAK1</name>
|
|
<description>Transmit Data As Break</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXDISAT1</name>
|
|
<description>Clear TXEN After Transmission</description>
|
|
<bitOffset>30</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXENAT1</name>
|
|
<description>Enable RX After Transmission</description>
|
|
<bitOffset>31</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TXDOUBLE</name>
|
|
<description>TX Buffer Double Data Register</description>
|
|
<addressOffset>0x03C</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>TXDATA0</name>
|
|
<description>TX Data</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXDATA1</name>
|
|
<description>TX Data</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IF</name>
|
|
<description>Interrupt Flag Register</description>
|
|
<addressOffset>0x040</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000002</resetValue>
|
|
<resetMask>0x00001FFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>TXC</name>
|
|
<description>TX Complete Interrupt Flag</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXBL</name>
|
|
<description>TX Buffer Level Interrupt Flag</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXDATAV</name>
|
|
<description>RX Data Valid Interrupt Flag</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXFULL</name>
|
|
<description>RX Buffer Full Interrupt Flag</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXOF</name>
|
|
<description>RX Overflow Interrupt Flag</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXUF</name>
|
|
<description>RX Underflow Interrupt Flag</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXOF</name>
|
|
<description>TX Overflow Interrupt Flag</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXUF</name>
|
|
<description>TX Underflow Interrupt Flag</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>PERR</name>
|
|
<description>Parity Error Interrupt Flag</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>FERR</name>
|
|
<description>Framing Error Interrupt Flag</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>MPAF</name>
|
|
<description>Multi-Processor Address Frame Interrupt Flag</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>SSM</name>
|
|
<description>Slave-Select In Master Mode Interrupt Flag</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CCF</name>
|
|
<description>Collision Check Fail Interrupt Flag</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IFS</name>
|
|
<description>Interrupt Flag Set Register</description>
|
|
<addressOffset>0x044</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00001FF9</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>TXC</name>
|
|
<description>Set TX Complete Interrupt Flag</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXFULL</name>
|
|
<description>Set RX Buffer Full Interrupt Flag</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXOF</name>
|
|
<description>Set RX Overflow Interrupt Flag</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXUF</name>
|
|
<description>Set RX Underflow Interrupt Flag</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXOF</name>
|
|
<description>Set TX Overflow Interrupt Flag</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXUF</name>
|
|
<description>Set TX Underflow Interrupt Flag</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>PERR</name>
|
|
<description>Set Parity Error Interrupt Flag</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>FERR</name>
|
|
<description>Set Framing Error Interrupt Flag</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>MPAF</name>
|
|
<description>Set Multi-Processor Address Frame Interrupt Flag</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>SSM</name>
|
|
<description>Set Slave-Select in Master mode Interrupt Flag</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CCF</name>
|
|
<description>Set Collision Check Fail Interrupt Flag</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IFC</name>
|
|
<description>Interrupt Flag Clear Register</description>
|
|
<addressOffset>0x048</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00001FF9</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>TXC</name>
|
|
<description>Clear TX Complete Interrupt Flag</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXFULL</name>
|
|
<description>Clear RX Buffer Full Interrupt Flag</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXOF</name>
|
|
<description>Clear RX Overflow Interrupt Flag</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXUF</name>
|
|
<description>Clear RX Underflow Interrupt Flag</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXOF</name>
|
|
<description>Clear TX Overflow Interrupt Flag</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXUF</name>
|
|
<description>Clear TX Underflow Interrupt Flag</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>PERR</name>
|
|
<description>Clear Parity Error Interrupt Flag</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>FERR</name>
|
|
<description>Clear Framing Error Interrupt Flag</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>MPAF</name>
|
|
<description>Clear Multi-Processor Address Frame Interrupt Flag</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>SSM</name>
|
|
<description>Clear Slave-Select In Master Mode Interrupt Flag</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CCF</name>
|
|
<description>Clear Collision Check Fail Interrupt Flag</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IEN</name>
|
|
<description>Interrupt Enable Register</description>
|
|
<addressOffset>0x04C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00001FFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>TXC</name>
|
|
<description>TX Complete Interrupt Enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>TXBL</name>
|
|
<description>TX Buffer Level Interrupt Enable</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>RXDATAV</name>
|
|
<description>RX Data Valid Interrupt Enable</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>RXFULL</name>
|
|
<description>RX Buffer Full Interrupt Enable</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>RXOF</name>
|
|
<description>RX Overflow Interrupt Enable</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>RXUF</name>
|
|
<description>RX Underflow Interrupt Enable</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>TXOF</name>
|
|
<description>TX Overflow Interrupt Enable</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>TXUF</name>
|
|
<description>TX Underflow Interrupt Enable</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>PERR</name>
|
|
<description>Parity Error Interrupt Enable</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>FERR</name>
|
|
<description>Framing Error Interrupt Enable</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>MPAF</name>
|
|
<description>Multi-Processor Address Frame Interrupt Enable</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>SSM</name>
|
|
<description>Slave-Select In Master Mode Interrupt Enable</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CCF</name>
|
|
<description>Collision Check Fail Interrupt Enable</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IRCTRL</name>
|
|
<description>IrDA Control Register</description>
|
|
<addressOffset>0x050</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x000000FF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>IREN</name>
|
|
<description>Enable IrDA Module</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>IRPW</name>
|
|
<description>IrDA TX Pulse Width</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>ONE</name>
|
|
<description>IrDA pulse width is 1/16 for OVS=0 and 1/8 for OVS=1</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TWO</name>
|
|
<description>IrDA pulse width is 2/16 for OVS=0 and 2/8 for OVS=1</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>THREE</name>
|
|
<description>IrDA pulse width is 3/16 for OVS=0 and 3/8 for OVS=1</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>FOUR</name>
|
|
<description>IrDA pulse width is 4/16 for OVS=0 and 4/8 for OVS=1</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>IRFILT</name>
|
|
<description>IrDA RX Filter</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>IRPRSSEL</name>
|
|
<description>IrDA PRS Channel Select</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>PRSCH0</name>
|
|
<description>PRS Channel 0 selected</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH1</name>
|
|
<description>PRS Channel 1 selected</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH2</name>
|
|
<description>PRS Channel 2 selected</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH3</name>
|
|
<description>PRS Channel 3 selected</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH4</name>
|
|
<description>PRS Channel 4 selected</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH5</name>
|
|
<description>PRS Channel 5 selected</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH6</name>
|
|
<description>PRS Channel 6 selected</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH7</name>
|
|
<description>PRS Channel 7 selected</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>IRPRSEN</name>
|
|
<description>IrDA PRS Channel Enable</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>ROUTE</name>
|
|
<description>I/O Routing Register</description>
|
|
<addressOffset>0x054</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000030F</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>RXPEN</name>
|
|
<description>RX Pin Enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>TXPEN</name>
|
|
<description>TX Pin Enable</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CSPEN</name>
|
|
<description>CS Pin Enable</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CLKPEN</name>
|
|
<description>CLK Pin Enable</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>LOCATION</name>
|
|
<description>I/O Location</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>LOC0</name>
|
|
<description>Location 0</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>LOC1</name>
|
|
<description>Location 1</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>LOC2</name>
|
|
<description>Location 2</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>LOC3</name>
|
|
<description>Location 3</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>USART1</name>
|
|
<description>USART1</description>
|
|
<baseAddress>0x4000C400</baseAddress>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x00000400</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<interrupt>
|
|
<name>USART1_RX</name>
|
|
<value>12</value>
|
|
</interrupt>
|
|
<interrupt>
|
|
<name>USART1_TX</name>
|
|
<value>13</value>
|
|
</interrupt>
|
|
<registers>
|
|
<register>
|
|
<name>CTRL</name>
|
|
<description>Control Register</description>
|
|
<addressOffset>0x000</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x1DFFFF7F</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>SYNC</name>
|
|
<description>USART Synchronous Mode</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>LOOPBK</name>
|
|
<description>Loopback Enable</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CCEN</name>
|
|
<description>Collision Check Enable</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>MPM</name>
|
|
<description>Multi-Processor Mode</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>MPAB</name>
|
|
<description>Multi-Processor Address-Bit</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>OVS</name>
|
|
<description>Oversampling</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>X16</name>
|
|
<description>Regular UART mode with 16X oversampling in asynchronous mode</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>X8</name>
|
|
<description>Double speed with 8X oversampling in asynchronous mode</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>X6</name>
|
|
<description>6X oversampling in asynchronous mode</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>X4</name>
|
|
<description>Quadruple speed with 4X oversampling in asynchronous mode</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>CLKPOL</name>
|
|
<description>Clock Polarity</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CLKPHA</name>
|
|
<description>Clock Edge For Setup/Sample</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>MSBF</name>
|
|
<description>Most Significant Bit First</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CSMA</name>
|
|
<description>Action On Slave-Select In Master Mode</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>TXBIL</name>
|
|
<description>TX Buffer Interrupt Level</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>RXINV</name>
|
|
<description>Receiver Input Invert</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>TXINV</name>
|
|
<description>Transmitter output Invert</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CSINV</name>
|
|
<description>Chip Select Invert</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>AUTOCS</name>
|
|
<description>Automatic Chip Select</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>AUTOTRI</name>
|
|
<description>Automatic TX Tristate</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>SCMODE</name>
|
|
<description>SmartCard Mode</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>SCRETRANS</name>
|
|
<description>SmartCard Retransmit</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>SKIPPERRF</name>
|
|
<description>Skip Parity Error Frames</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>BIT8DV</name>
|
|
<description>Bit 8 Default Value</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>ERRSDMA</name>
|
|
<description>Halt DMA On Error</description>
|
|
<bitOffset>22</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>ERRSRX</name>
|
|
<description>Disable RX On Error</description>
|
|
<bitOffset>23</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>ERRSTX</name>
|
|
<description>Disable TX On Error</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>TXDELAY</name>
|
|
<description>TX Delay Transmission</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>NONE</name>
|
|
<description>Frames are transmitted immediately</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>SINGLE</name>
|
|
<description>Transmission of new frames are delayed by a single baud period</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DOUBLE</name>
|
|
<description>Transmission of new frames are delayed by two baud periods</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TRIPLE</name>
|
|
<description>Transmission of new frames are delayed by three baud periods</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>BYTESWAP</name>
|
|
<description>Byteswap In Double Accesses</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FRAME</name>
|
|
<description>USART Frame Format Register</description>
|
|
<addressOffset>0x004</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00001005</resetValue>
|
|
<resetMask>0x0000330F</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>DATABITS</name>
|
|
<description>Data-Bit Mode</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>FOUR</name>
|
|
<description>Each frame contains 4 data bits</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>FIVE</name>
|
|
<description>Each frame contains 5 data bits</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>SIX</name>
|
|
<description>Each frame contains 6 data bits</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>SEVEN</name>
|
|
<description>Each frame contains 7 data bits</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>EIGHT</name>
|
|
<description>Each frame contains 8 data bits</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>NINE</name>
|
|
<description>Each frame contains 9 data bits</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TEN</name>
|
|
<description>Each frame contains 10 data bits</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>ELEVEN</name>
|
|
<description>Each frame contains 11 data bits</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TWELVE</name>
|
|
<description>Each frame contains 12 data bits</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>THIRTEEN</name>
|
|
<description>Each frame contains 13 data bits</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>FOURTEEN</name>
|
|
<description>Each frame contains 14 data bits</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>FIFTEEN</name>
|
|
<description>Each frame contains 15 data bits</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>SIXTEEN</name>
|
|
<description>Each frame contains 16 data bits</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>PARITY</name>
|
|
<description>Parity-Bit Mode</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>NONE</name>
|
|
<description>Parity bits are not used</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>EVEN</name>
|
|
<description>Even parity are used. Parity bits are automatically generated and checked by hardware.</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>ODD</name>
|
|
<description>Odd parity is used. Parity bits are automatically generated and checked by hardware.</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>STOPBITS</name>
|
|
<description>Stop-Bit Mode</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>HALF</name>
|
|
<description>The transmitter generates a half stop bit. Stop-bits are not verified by receiver</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>ONE</name>
|
|
<description>One stop bit is generated and verified</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>ONEANDAHALF</name>
|
|
<description>The transmitter generates one and a half stop bit. The receiver verifies the first stop bit</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TWO</name>
|
|
<description>The transmitter generates two stop bits. The receiver checks the first stop-bit only</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TRIGCTRL</name>
|
|
<description>USART Trigger Control register</description>
|
|
<addressOffset>0x008</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000037</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>TSEL</name>
|
|
<description>Trigger PRS Channel Select</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>PRSCH0</name>
|
|
<description>PRS Channel 0 selected</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH1</name>
|
|
<description>PRS Channel 1 selected</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH2</name>
|
|
<description>PRS Channel 2 selected</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH3</name>
|
|
<description>PRS Channel 3 selected</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH4</name>
|
|
<description>PRS Channel 4 selected</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH5</name>
|
|
<description>PRS Channel 5 selected</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH6</name>
|
|
<description>PRS Channel 6 selected</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH7</name>
|
|
<description>PRS Channel 7 selected</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>RXTEN</name>
|
|
<description>Receive Trigger Enable</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>TXTEN</name>
|
|
<description>Transmit Trigger Enable</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CMD</name>
|
|
<description>Command Register</description>
|
|
<addressOffset>0x00C</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000FFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>RXEN</name>
|
|
<description>Receiver Enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXDIS</name>
|
|
<description>Receiver Disable</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXEN</name>
|
|
<description>Transmitter Enable</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXDIS</name>
|
|
<description>Transmitter Disable</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>MASTEREN</name>
|
|
<description>Master Enable</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>MASTERDIS</name>
|
|
<description>Master Disable</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXBLOCKEN</name>
|
|
<description>Receiver Block Enable</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXBLOCKDIS</name>
|
|
<description>Receiver Block Disable</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXTRIEN</name>
|
|
<description>Transmitter Tristate Enable</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXTRIDIS</name>
|
|
<description>Transmitter Tristate Disable</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CLEARTX</name>
|
|
<description>Clear TX</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CLEARRX</name>
|
|
<description>Clear RX</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>STATUS</name>
|
|
<description>USART Status Register</description>
|
|
<addressOffset>0x010</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000040</resetValue>
|
|
<resetMask>0x000001FF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>RXENS</name>
|
|
<description>Receiver Enable Status</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXENS</name>
|
|
<description>Transmitter Enable Status</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>MASTER</name>
|
|
<description>SPI Master Mode</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXBLOCK</name>
|
|
<description>Block Incoming Data</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXTRI</name>
|
|
<description>Transmitter Tristated</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXC</name>
|
|
<description>TX Complete</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXBL</name>
|
|
<description>TX Buffer Level</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXDATAV</name>
|
|
<description>RX Data Valid</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXFULL</name>
|
|
<description>RX FIFO Full</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLKDIV</name>
|
|
<description>Clock Control Register</description>
|
|
<addressOffset>0x014</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x001FFFC0</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>DIV</name>
|
|
<description>Fractional Clock Divider</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>15</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RXDATAX</name>
|
|
<description>RX Buffer Data Extended Register</description>
|
|
<addressOffset>0x018</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000C1FF</resetMask>
|
|
<readAction>modifyExternal</readAction>
|
|
<fields>
|
|
<field>
|
|
<name>RXDATA</name>
|
|
<description>RX Data</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>9</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>PERR</name>
|
|
<description>Data Parity Error</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>FERR</name>
|
|
<description>Data Framing Error</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RXDATA</name>
|
|
<description>RX Buffer Data Register</description>
|
|
<addressOffset>0x01C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x000000FF</resetMask>
|
|
<readAction>modifyExternal</readAction>
|
|
<fields>
|
|
<field>
|
|
<name>RXDATA</name>
|
|
<description>RX Data</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RXDOUBLEX</name>
|
|
<description>RX Buffer Double Data Extended Register</description>
|
|
<addressOffset>0x020</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0xC1FFC1FF</resetMask>
|
|
<readAction>modifyExternal</readAction>
|
|
<fields>
|
|
<field>
|
|
<name>RXDATA0</name>
|
|
<description>RX Data 0</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>9</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>PERR0</name>
|
|
<description>Data Parity Error 0</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>FERR0</name>
|
|
<description>Data Framing Error 0</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXDATA1</name>
|
|
<description>RX Data 1</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>9</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>PERR1</name>
|
|
<description>Data Parity Error 1</description>
|
|
<bitOffset>30</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>FERR1</name>
|
|
<description>Data Framing Error 1</description>
|
|
<bitOffset>31</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RXDOUBLE</name>
|
|
<description>RX FIFO Double Data Register</description>
|
|
<addressOffset>0x024</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<readAction>modifyExternal</readAction>
|
|
<fields>
|
|
<field>
|
|
<name>RXDATA0</name>
|
|
<description>RX Data 0</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXDATA1</name>
|
|
<description>RX Data 1</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RXDATAXP</name>
|
|
<description>RX Buffer Data Extended Peek Register</description>
|
|
<addressOffset>0x028</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000C1FF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>RXDATAP</name>
|
|
<description>RX Data Peek</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>9</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>PERRP</name>
|
|
<description>Data Parity Error Peek</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>FERRP</name>
|
|
<description>Data Framing Error Peek</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RXDOUBLEXP</name>
|
|
<description>RX Buffer Double Data Extended Peek Register</description>
|
|
<addressOffset>0x02C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0xC1FFC1FF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>RXDATAP0</name>
|
|
<description>RX Data 0 Peek</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>9</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>PERRP0</name>
|
|
<description>Data Parity Error 0 Peek</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>FERRP0</name>
|
|
<description>Data Framing Error 0 Peek</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXDATAP1</name>
|
|
<description>RX Data 1 Peek</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>9</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>PERRP1</name>
|
|
<description>Data Parity Error 1 Peek</description>
|
|
<bitOffset>30</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>FERRP1</name>
|
|
<description>Data Framing Error 1 Peek</description>
|
|
<bitOffset>31</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TXDATAX</name>
|
|
<description>TX Buffer Data Extended Register</description>
|
|
<addressOffset>0x030</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000F9FF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>TXDATAX</name>
|
|
<description>TX Data</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>9</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>UBRXAT</name>
|
|
<description>Unblock RX After Transmission</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXTRIAT</name>
|
|
<description>Set TXTRI After Transmission</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXBREAK</name>
|
|
<description>Transmit Data As Break</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXDISAT</name>
|
|
<description>Clear TXEN After Transmission</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXENAT</name>
|
|
<description>Enable RX After Transmission</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TXDATA</name>
|
|
<description>TX Buffer Data Register</description>
|
|
<addressOffset>0x034</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x000000FF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>TXDATA</name>
|
|
<description>TX Data</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TXDOUBLEX</name>
|
|
<description>TX Buffer Double Data Extended Register</description>
|
|
<addressOffset>0x038</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0xF9FFF9FF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>TXDATA0</name>
|
|
<description>TX Data</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>9</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>UBRXAT0</name>
|
|
<description>Unblock RX After Transmission</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXTRIAT0</name>
|
|
<description>Set TXTRI After Transmission</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXBREAK0</name>
|
|
<description>Transmit Data As Break</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXDISAT0</name>
|
|
<description>Clear TXEN After Transmission</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXENAT0</name>
|
|
<description>Enable RX After Transmission</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXDATA1</name>
|
|
<description>TX Data</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>9</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>UBRXAT1</name>
|
|
<description>Unblock RX After Transmission</description>
|
|
<bitOffset>27</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXTRIAT1</name>
|
|
<description>Set TXTRI After Transmission</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXBREAK1</name>
|
|
<description>Transmit Data As Break</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXDISAT1</name>
|
|
<description>Clear TXEN After Transmission</description>
|
|
<bitOffset>30</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXENAT1</name>
|
|
<description>Enable RX After Transmission</description>
|
|
<bitOffset>31</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TXDOUBLE</name>
|
|
<description>TX Buffer Double Data Register</description>
|
|
<addressOffset>0x03C</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>TXDATA0</name>
|
|
<description>TX Data</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXDATA1</name>
|
|
<description>TX Data</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IF</name>
|
|
<description>Interrupt Flag Register</description>
|
|
<addressOffset>0x040</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000002</resetValue>
|
|
<resetMask>0x00001FFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>TXC</name>
|
|
<description>TX Complete Interrupt Flag</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXBL</name>
|
|
<description>TX Buffer Level Interrupt Flag</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXDATAV</name>
|
|
<description>RX Data Valid Interrupt Flag</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXFULL</name>
|
|
<description>RX Buffer Full Interrupt Flag</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXOF</name>
|
|
<description>RX Overflow Interrupt Flag</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXUF</name>
|
|
<description>RX Underflow Interrupt Flag</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXOF</name>
|
|
<description>TX Overflow Interrupt Flag</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXUF</name>
|
|
<description>TX Underflow Interrupt Flag</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>PERR</name>
|
|
<description>Parity Error Interrupt Flag</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>FERR</name>
|
|
<description>Framing Error Interrupt Flag</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>MPAF</name>
|
|
<description>Multi-Processor Address Frame Interrupt Flag</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>SSM</name>
|
|
<description>Slave-Select In Master Mode Interrupt Flag</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CCF</name>
|
|
<description>Collision Check Fail Interrupt Flag</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IFS</name>
|
|
<description>Interrupt Flag Set Register</description>
|
|
<addressOffset>0x044</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00001FF9</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>TXC</name>
|
|
<description>Set TX Complete Interrupt Flag</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXFULL</name>
|
|
<description>Set RX Buffer Full Interrupt Flag</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXOF</name>
|
|
<description>Set RX Overflow Interrupt Flag</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXUF</name>
|
|
<description>Set RX Underflow Interrupt Flag</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXOF</name>
|
|
<description>Set TX Overflow Interrupt Flag</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXUF</name>
|
|
<description>Set TX Underflow Interrupt Flag</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>PERR</name>
|
|
<description>Set Parity Error Interrupt Flag</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>FERR</name>
|
|
<description>Set Framing Error Interrupt Flag</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>MPAF</name>
|
|
<description>Set Multi-Processor Address Frame Interrupt Flag</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>SSM</name>
|
|
<description>Set Slave-Select in Master mode Interrupt Flag</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CCF</name>
|
|
<description>Set Collision Check Fail Interrupt Flag</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IFC</name>
|
|
<description>Interrupt Flag Clear Register</description>
|
|
<addressOffset>0x048</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00001FF9</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>TXC</name>
|
|
<description>Clear TX Complete Interrupt Flag</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXFULL</name>
|
|
<description>Clear RX Buffer Full Interrupt Flag</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXOF</name>
|
|
<description>Clear RX Overflow Interrupt Flag</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXUF</name>
|
|
<description>Clear RX Underflow Interrupt Flag</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXOF</name>
|
|
<description>Clear TX Overflow Interrupt Flag</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXUF</name>
|
|
<description>Clear TX Underflow Interrupt Flag</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>PERR</name>
|
|
<description>Clear Parity Error Interrupt Flag</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>FERR</name>
|
|
<description>Clear Framing Error Interrupt Flag</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>MPAF</name>
|
|
<description>Clear Multi-Processor Address Frame Interrupt Flag</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>SSM</name>
|
|
<description>Clear Slave-Select In Master Mode Interrupt Flag</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CCF</name>
|
|
<description>Clear Collision Check Fail Interrupt Flag</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IEN</name>
|
|
<description>Interrupt Enable Register</description>
|
|
<addressOffset>0x04C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00001FFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>TXC</name>
|
|
<description>TX Complete Interrupt Enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>TXBL</name>
|
|
<description>TX Buffer Level Interrupt Enable</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>RXDATAV</name>
|
|
<description>RX Data Valid Interrupt Enable</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>RXFULL</name>
|
|
<description>RX Buffer Full Interrupt Enable</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>RXOF</name>
|
|
<description>RX Overflow Interrupt Enable</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>RXUF</name>
|
|
<description>RX Underflow Interrupt Enable</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>TXOF</name>
|
|
<description>TX Overflow Interrupt Enable</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>TXUF</name>
|
|
<description>TX Underflow Interrupt Enable</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>PERR</name>
|
|
<description>Parity Error Interrupt Enable</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>FERR</name>
|
|
<description>Framing Error Interrupt Enable</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>MPAF</name>
|
|
<description>Multi-Processor Address Frame Interrupt Enable</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>SSM</name>
|
|
<description>Slave-Select In Master Mode Interrupt Enable</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CCF</name>
|
|
<description>Collision Check Fail Interrupt Enable</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IRCTRL</name>
|
|
<description>IrDA Control Register</description>
|
|
<addressOffset>0x050</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x000000FF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>IREN</name>
|
|
<description>Enable IrDA Module</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>IRPW</name>
|
|
<description>IrDA TX Pulse Width</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>ONE</name>
|
|
<description>IrDA pulse width is 1/16 for OVS=0 and 1/8 for OVS=1</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TWO</name>
|
|
<description>IrDA pulse width is 2/16 for OVS=0 and 2/8 for OVS=1</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>THREE</name>
|
|
<description>IrDA pulse width is 3/16 for OVS=0 and 3/8 for OVS=1</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>FOUR</name>
|
|
<description>IrDA pulse width is 4/16 for OVS=0 and 4/8 for OVS=1</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>IRFILT</name>
|
|
<description>IrDA RX Filter</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>IRPRSSEL</name>
|
|
<description>IrDA PRS Channel Select</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>PRSCH0</name>
|
|
<description>PRS Channel 0 selected</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH1</name>
|
|
<description>PRS Channel 1 selected</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH2</name>
|
|
<description>PRS Channel 2 selected</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH3</name>
|
|
<description>PRS Channel 3 selected</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH4</name>
|
|
<description>PRS Channel 4 selected</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH5</name>
|
|
<description>PRS Channel 5 selected</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH6</name>
|
|
<description>PRS Channel 6 selected</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH7</name>
|
|
<description>PRS Channel 7 selected</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>IRPRSEN</name>
|
|
<description>IrDA PRS Channel Enable</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>ROUTE</name>
|
|
<description>I/O Routing Register</description>
|
|
<addressOffset>0x054</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000030F</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>RXPEN</name>
|
|
<description>RX Pin Enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>TXPEN</name>
|
|
<description>TX Pin Enable</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CSPEN</name>
|
|
<description>CS Pin Enable</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CLKPEN</name>
|
|
<description>CLK Pin Enable</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>LOCATION</name>
|
|
<description>I/O Location</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>LOC0</name>
|
|
<description>Location 0</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>LOC1</name>
|
|
<description>Location 1</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>LOC2</name>
|
|
<description>Location 2</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>LOC3</name>
|
|
<description>Location 3</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>USART2</name>
|
|
<description>USART2</description>
|
|
<baseAddress>0x4000C800</baseAddress>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x00000400</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<interrupt>
|
|
<name>USART2_RX</name>
|
|
<value>14</value>
|
|
</interrupt>
|
|
<interrupt>
|
|
<name>USART2_TX</name>
|
|
<value>15</value>
|
|
</interrupt>
|
|
<registers>
|
|
<register>
|
|
<name>CTRL</name>
|
|
<description>Control Register</description>
|
|
<addressOffset>0x000</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x1DFFFF7F</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>SYNC</name>
|
|
<description>USART Synchronous Mode</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>LOOPBK</name>
|
|
<description>Loopback Enable</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CCEN</name>
|
|
<description>Collision Check Enable</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>MPM</name>
|
|
<description>Multi-Processor Mode</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>MPAB</name>
|
|
<description>Multi-Processor Address-Bit</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>OVS</name>
|
|
<description>Oversampling</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>X16</name>
|
|
<description>Regular UART mode with 16X oversampling in asynchronous mode</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>X8</name>
|
|
<description>Double speed with 8X oversampling in asynchronous mode</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>X6</name>
|
|
<description>6X oversampling in asynchronous mode</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>X4</name>
|
|
<description>Quadruple speed with 4X oversampling in asynchronous mode</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>CLKPOL</name>
|
|
<description>Clock Polarity</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CLKPHA</name>
|
|
<description>Clock Edge For Setup/Sample</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>MSBF</name>
|
|
<description>Most Significant Bit First</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CSMA</name>
|
|
<description>Action On Slave-Select In Master Mode</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>TXBIL</name>
|
|
<description>TX Buffer Interrupt Level</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>RXINV</name>
|
|
<description>Receiver Input Invert</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>TXINV</name>
|
|
<description>Transmitter output Invert</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CSINV</name>
|
|
<description>Chip Select Invert</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>AUTOCS</name>
|
|
<description>Automatic Chip Select</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>AUTOTRI</name>
|
|
<description>Automatic TX Tristate</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>SCMODE</name>
|
|
<description>SmartCard Mode</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>SCRETRANS</name>
|
|
<description>SmartCard Retransmit</description>
|
|
<bitOffset>19</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>SKIPPERRF</name>
|
|
<description>Skip Parity Error Frames</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>BIT8DV</name>
|
|
<description>Bit 8 Default Value</description>
|
|
<bitOffset>21</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>ERRSDMA</name>
|
|
<description>Halt DMA On Error</description>
|
|
<bitOffset>22</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>ERRSRX</name>
|
|
<description>Disable RX On Error</description>
|
|
<bitOffset>23</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>ERRSTX</name>
|
|
<description>Disable TX On Error</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>TXDELAY</name>
|
|
<description>TX Delay Transmission</description>
|
|
<bitOffset>26</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>NONE</name>
|
|
<description>Frames are transmitted immediately</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>SINGLE</name>
|
|
<description>Transmission of new frames are delayed by a single baud period</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DOUBLE</name>
|
|
<description>Transmission of new frames are delayed by two baud periods</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TRIPLE</name>
|
|
<description>Transmission of new frames are delayed by three baud periods</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>BYTESWAP</name>
|
|
<description>Byteswap In Double Accesses</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FRAME</name>
|
|
<description>USART Frame Format Register</description>
|
|
<addressOffset>0x004</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00001005</resetValue>
|
|
<resetMask>0x0000330F</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>DATABITS</name>
|
|
<description>Data-Bit Mode</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>FOUR</name>
|
|
<description>Each frame contains 4 data bits</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>FIVE</name>
|
|
<description>Each frame contains 5 data bits</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>SIX</name>
|
|
<description>Each frame contains 6 data bits</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>SEVEN</name>
|
|
<description>Each frame contains 7 data bits</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>EIGHT</name>
|
|
<description>Each frame contains 8 data bits</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>NINE</name>
|
|
<description>Each frame contains 9 data bits</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TEN</name>
|
|
<description>Each frame contains 10 data bits</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>ELEVEN</name>
|
|
<description>Each frame contains 11 data bits</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TWELVE</name>
|
|
<description>Each frame contains 12 data bits</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>THIRTEEN</name>
|
|
<description>Each frame contains 13 data bits</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>FOURTEEN</name>
|
|
<description>Each frame contains 14 data bits</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>FIFTEEN</name>
|
|
<description>Each frame contains 15 data bits</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>SIXTEEN</name>
|
|
<description>Each frame contains 16 data bits</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>PARITY</name>
|
|
<description>Parity-Bit Mode</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>NONE</name>
|
|
<description>Parity bits are not used</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>EVEN</name>
|
|
<description>Even parity are used. Parity bits are automatically generated and checked by hardware.</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>ODD</name>
|
|
<description>Odd parity is used. Parity bits are automatically generated and checked by hardware.</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>STOPBITS</name>
|
|
<description>Stop-Bit Mode</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>HALF</name>
|
|
<description>The transmitter generates a half stop bit. Stop-bits are not verified by receiver</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>ONE</name>
|
|
<description>One stop bit is generated and verified</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>ONEANDAHALF</name>
|
|
<description>The transmitter generates one and a half stop bit. The receiver verifies the first stop bit</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TWO</name>
|
|
<description>The transmitter generates two stop bits. The receiver checks the first stop-bit only</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TRIGCTRL</name>
|
|
<description>USART Trigger Control register</description>
|
|
<addressOffset>0x008</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000037</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>TSEL</name>
|
|
<description>Trigger PRS Channel Select</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>PRSCH0</name>
|
|
<description>PRS Channel 0 selected</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH1</name>
|
|
<description>PRS Channel 1 selected</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH2</name>
|
|
<description>PRS Channel 2 selected</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH3</name>
|
|
<description>PRS Channel 3 selected</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH4</name>
|
|
<description>PRS Channel 4 selected</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH5</name>
|
|
<description>PRS Channel 5 selected</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH6</name>
|
|
<description>PRS Channel 6 selected</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH7</name>
|
|
<description>PRS Channel 7 selected</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>RXTEN</name>
|
|
<description>Receive Trigger Enable</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>TXTEN</name>
|
|
<description>Transmit Trigger Enable</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CMD</name>
|
|
<description>Command Register</description>
|
|
<addressOffset>0x00C</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000FFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>RXEN</name>
|
|
<description>Receiver Enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXDIS</name>
|
|
<description>Receiver Disable</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXEN</name>
|
|
<description>Transmitter Enable</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXDIS</name>
|
|
<description>Transmitter Disable</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>MASTEREN</name>
|
|
<description>Master Enable</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>MASTERDIS</name>
|
|
<description>Master Disable</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXBLOCKEN</name>
|
|
<description>Receiver Block Enable</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXBLOCKDIS</name>
|
|
<description>Receiver Block Disable</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXTRIEN</name>
|
|
<description>Transmitter Tristate Enable</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXTRIDIS</name>
|
|
<description>Transmitter Tristate Disable</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CLEARTX</name>
|
|
<description>Clear TX</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CLEARRX</name>
|
|
<description>Clear RX</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>STATUS</name>
|
|
<description>USART Status Register</description>
|
|
<addressOffset>0x010</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000040</resetValue>
|
|
<resetMask>0x000001FF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>RXENS</name>
|
|
<description>Receiver Enable Status</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXENS</name>
|
|
<description>Transmitter Enable Status</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>MASTER</name>
|
|
<description>SPI Master Mode</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXBLOCK</name>
|
|
<description>Block Incoming Data</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXTRI</name>
|
|
<description>Transmitter Tristated</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXC</name>
|
|
<description>TX Complete</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXBL</name>
|
|
<description>TX Buffer Level</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXDATAV</name>
|
|
<description>RX Data Valid</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXFULL</name>
|
|
<description>RX FIFO Full</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLKDIV</name>
|
|
<description>Clock Control Register</description>
|
|
<addressOffset>0x014</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x001FFFC0</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>DIV</name>
|
|
<description>Fractional Clock Divider</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>15</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RXDATAX</name>
|
|
<description>RX Buffer Data Extended Register</description>
|
|
<addressOffset>0x018</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000C1FF</resetMask>
|
|
<readAction>modifyExternal</readAction>
|
|
<fields>
|
|
<field>
|
|
<name>RXDATA</name>
|
|
<description>RX Data</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>9</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>PERR</name>
|
|
<description>Data Parity Error</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>FERR</name>
|
|
<description>Data Framing Error</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RXDATA</name>
|
|
<description>RX Buffer Data Register</description>
|
|
<addressOffset>0x01C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x000000FF</resetMask>
|
|
<readAction>modifyExternal</readAction>
|
|
<fields>
|
|
<field>
|
|
<name>RXDATA</name>
|
|
<description>RX Data</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RXDOUBLEX</name>
|
|
<description>RX Buffer Double Data Extended Register</description>
|
|
<addressOffset>0x020</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0xC1FFC1FF</resetMask>
|
|
<readAction>modifyExternal</readAction>
|
|
<fields>
|
|
<field>
|
|
<name>RXDATA0</name>
|
|
<description>RX Data 0</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>9</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>PERR0</name>
|
|
<description>Data Parity Error 0</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>FERR0</name>
|
|
<description>Data Framing Error 0</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXDATA1</name>
|
|
<description>RX Data 1</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>9</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>PERR1</name>
|
|
<description>Data Parity Error 1</description>
|
|
<bitOffset>30</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>FERR1</name>
|
|
<description>Data Framing Error 1</description>
|
|
<bitOffset>31</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RXDOUBLE</name>
|
|
<description>RX FIFO Double Data Register</description>
|
|
<addressOffset>0x024</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<readAction>modifyExternal</readAction>
|
|
<fields>
|
|
<field>
|
|
<name>RXDATA0</name>
|
|
<description>RX Data 0</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXDATA1</name>
|
|
<description>RX Data 1</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RXDATAXP</name>
|
|
<description>RX Buffer Data Extended Peek Register</description>
|
|
<addressOffset>0x028</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000C1FF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>RXDATAP</name>
|
|
<description>RX Data Peek</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>9</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>PERRP</name>
|
|
<description>Data Parity Error Peek</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>FERRP</name>
|
|
<description>Data Framing Error Peek</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RXDOUBLEXP</name>
|
|
<description>RX Buffer Double Data Extended Peek Register</description>
|
|
<addressOffset>0x02C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0xC1FFC1FF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>RXDATAP0</name>
|
|
<description>RX Data 0 Peek</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>9</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>PERRP0</name>
|
|
<description>Data Parity Error 0 Peek</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>FERRP0</name>
|
|
<description>Data Framing Error 0 Peek</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXDATAP1</name>
|
|
<description>RX Data 1 Peek</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>9</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>PERRP1</name>
|
|
<description>Data Parity Error 1 Peek</description>
|
|
<bitOffset>30</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>FERRP1</name>
|
|
<description>Data Framing Error 1 Peek</description>
|
|
<bitOffset>31</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TXDATAX</name>
|
|
<description>TX Buffer Data Extended Register</description>
|
|
<addressOffset>0x030</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000F9FF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>TXDATAX</name>
|
|
<description>TX Data</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>9</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>UBRXAT</name>
|
|
<description>Unblock RX After Transmission</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXTRIAT</name>
|
|
<description>Set TXTRI After Transmission</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXBREAK</name>
|
|
<description>Transmit Data As Break</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXDISAT</name>
|
|
<description>Clear TXEN After Transmission</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXENAT</name>
|
|
<description>Enable RX After Transmission</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TXDATA</name>
|
|
<description>TX Buffer Data Register</description>
|
|
<addressOffset>0x034</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x000000FF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>TXDATA</name>
|
|
<description>TX Data</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TXDOUBLEX</name>
|
|
<description>TX Buffer Double Data Extended Register</description>
|
|
<addressOffset>0x038</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0xF9FFF9FF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>TXDATA0</name>
|
|
<description>TX Data</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>9</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>UBRXAT0</name>
|
|
<description>Unblock RX After Transmission</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXTRIAT0</name>
|
|
<description>Set TXTRI After Transmission</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXBREAK0</name>
|
|
<description>Transmit Data As Break</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXDISAT0</name>
|
|
<description>Clear TXEN After Transmission</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXENAT0</name>
|
|
<description>Enable RX After Transmission</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXDATA1</name>
|
|
<description>TX Data</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>9</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>UBRXAT1</name>
|
|
<description>Unblock RX After Transmission</description>
|
|
<bitOffset>27</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXTRIAT1</name>
|
|
<description>Set TXTRI After Transmission</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXBREAK1</name>
|
|
<description>Transmit Data As Break</description>
|
|
<bitOffset>29</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXDISAT1</name>
|
|
<description>Clear TXEN After Transmission</description>
|
|
<bitOffset>30</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXENAT1</name>
|
|
<description>Enable RX After Transmission</description>
|
|
<bitOffset>31</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TXDOUBLE</name>
|
|
<description>TX Buffer Double Data Register</description>
|
|
<addressOffset>0x03C</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>TXDATA0</name>
|
|
<description>TX Data</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXDATA1</name>
|
|
<description>TX Data</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IF</name>
|
|
<description>Interrupt Flag Register</description>
|
|
<addressOffset>0x040</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000002</resetValue>
|
|
<resetMask>0x00001FFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>TXC</name>
|
|
<description>TX Complete Interrupt Flag</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXBL</name>
|
|
<description>TX Buffer Level Interrupt Flag</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXDATAV</name>
|
|
<description>RX Data Valid Interrupt Flag</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXFULL</name>
|
|
<description>RX Buffer Full Interrupt Flag</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXOF</name>
|
|
<description>RX Overflow Interrupt Flag</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXUF</name>
|
|
<description>RX Underflow Interrupt Flag</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXOF</name>
|
|
<description>TX Overflow Interrupt Flag</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXUF</name>
|
|
<description>TX Underflow Interrupt Flag</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>PERR</name>
|
|
<description>Parity Error Interrupt Flag</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>FERR</name>
|
|
<description>Framing Error Interrupt Flag</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>MPAF</name>
|
|
<description>Multi-Processor Address Frame Interrupt Flag</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>SSM</name>
|
|
<description>Slave-Select In Master Mode Interrupt Flag</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CCF</name>
|
|
<description>Collision Check Fail Interrupt Flag</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IFS</name>
|
|
<description>Interrupt Flag Set Register</description>
|
|
<addressOffset>0x044</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00001FF9</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>TXC</name>
|
|
<description>Set TX Complete Interrupt Flag</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXFULL</name>
|
|
<description>Set RX Buffer Full Interrupt Flag</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXOF</name>
|
|
<description>Set RX Overflow Interrupt Flag</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXUF</name>
|
|
<description>Set RX Underflow Interrupt Flag</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXOF</name>
|
|
<description>Set TX Overflow Interrupt Flag</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXUF</name>
|
|
<description>Set TX Underflow Interrupt Flag</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>PERR</name>
|
|
<description>Set Parity Error Interrupt Flag</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>FERR</name>
|
|
<description>Set Framing Error Interrupt Flag</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>MPAF</name>
|
|
<description>Set Multi-Processor Address Frame Interrupt Flag</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>SSM</name>
|
|
<description>Set Slave-Select in Master mode Interrupt Flag</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CCF</name>
|
|
<description>Set Collision Check Fail Interrupt Flag</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IFC</name>
|
|
<description>Interrupt Flag Clear Register</description>
|
|
<addressOffset>0x048</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00001FF9</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>TXC</name>
|
|
<description>Clear TX Complete Interrupt Flag</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXFULL</name>
|
|
<description>Clear RX Buffer Full Interrupt Flag</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXOF</name>
|
|
<description>Clear RX Overflow Interrupt Flag</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXUF</name>
|
|
<description>Clear RX Underflow Interrupt Flag</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXOF</name>
|
|
<description>Clear TX Overflow Interrupt Flag</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXUF</name>
|
|
<description>Clear TX Underflow Interrupt Flag</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>PERR</name>
|
|
<description>Clear Parity Error Interrupt Flag</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>FERR</name>
|
|
<description>Clear Framing Error Interrupt Flag</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>MPAF</name>
|
|
<description>Clear Multi-Processor Address Frame Interrupt Flag</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>SSM</name>
|
|
<description>Clear Slave-Select In Master Mode Interrupt Flag</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CCF</name>
|
|
<description>Clear Collision Check Fail Interrupt Flag</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IEN</name>
|
|
<description>Interrupt Enable Register</description>
|
|
<addressOffset>0x04C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00001FFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>TXC</name>
|
|
<description>TX Complete Interrupt Enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>TXBL</name>
|
|
<description>TX Buffer Level Interrupt Enable</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>RXDATAV</name>
|
|
<description>RX Data Valid Interrupt Enable</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>RXFULL</name>
|
|
<description>RX Buffer Full Interrupt Enable</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>RXOF</name>
|
|
<description>RX Overflow Interrupt Enable</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>RXUF</name>
|
|
<description>RX Underflow Interrupt Enable</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>TXOF</name>
|
|
<description>TX Overflow Interrupt Enable</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>TXUF</name>
|
|
<description>TX Underflow Interrupt Enable</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>PERR</name>
|
|
<description>Parity Error Interrupt Enable</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>FERR</name>
|
|
<description>Framing Error Interrupt Enable</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>MPAF</name>
|
|
<description>Multi-Processor Address Frame Interrupt Enable</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>SSM</name>
|
|
<description>Slave-Select In Master Mode Interrupt Enable</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CCF</name>
|
|
<description>Collision Check Fail Interrupt Enable</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IRCTRL</name>
|
|
<description>IrDA Control Register</description>
|
|
<addressOffset>0x050</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x000000FF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>IREN</name>
|
|
<description>Enable IrDA Module</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>IRPW</name>
|
|
<description>IrDA TX Pulse Width</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>ONE</name>
|
|
<description>IrDA pulse width is 1/16 for OVS=0 and 1/8 for OVS=1</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TWO</name>
|
|
<description>IrDA pulse width is 2/16 for OVS=0 and 2/8 for OVS=1</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>THREE</name>
|
|
<description>IrDA pulse width is 3/16 for OVS=0 and 3/8 for OVS=1</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>FOUR</name>
|
|
<description>IrDA pulse width is 4/16 for OVS=0 and 4/8 for OVS=1</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>IRFILT</name>
|
|
<description>IrDA RX Filter</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>IRPRSSEL</name>
|
|
<description>IrDA PRS Channel Select</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>PRSCH0</name>
|
|
<description>PRS Channel 0 selected</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH1</name>
|
|
<description>PRS Channel 1 selected</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH2</name>
|
|
<description>PRS Channel 2 selected</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH3</name>
|
|
<description>PRS Channel 3 selected</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH4</name>
|
|
<description>PRS Channel 4 selected</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH5</name>
|
|
<description>PRS Channel 5 selected</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH6</name>
|
|
<description>PRS Channel 6 selected</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH7</name>
|
|
<description>PRS Channel 7 selected</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>IRPRSEN</name>
|
|
<description>IrDA PRS Channel Enable</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>ROUTE</name>
|
|
<description>I/O Routing Register</description>
|
|
<addressOffset>0x054</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000030F</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>RXPEN</name>
|
|
<description>RX Pin Enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>TXPEN</name>
|
|
<description>TX Pin Enable</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CSPEN</name>
|
|
<description>CS Pin Enable</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CLKPEN</name>
|
|
<description>CLK Pin Enable</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>LOCATION</name>
|
|
<description>I/O Location</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>LOC0</name>
|
|
<description>Location 0</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>LOC1</name>
|
|
<description>Location 1</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>LOC2</name>
|
|
<description>Location 2</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>LOC3</name>
|
|
<description>Location 3</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>LEUART0</name>
|
|
<description>LEUART0</description>
|
|
<baseAddress>0x40084000</baseAddress>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x00000400</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<interrupt>
|
|
<name>LEUART0</name>
|
|
<value>18</value>
|
|
</interrupt>
|
|
<registers>
|
|
<register>
|
|
<name>CTRL</name>
|
|
<description>Control Register</description>
|
|
<addressOffset>0x000</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>AUTOTRI</name>
|
|
<description>Automatic Transmitter Tristate</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>DATABITS</name>
|
|
<description>Data-Bit Mode</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>PARITY</name>
|
|
<description>Parity-Bit Mode</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>NONE</name>
|
|
<description>Parity bits are not used</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>EVEN</name>
|
|
<description>Even parity are used. Parity bits are automatically generated and checked by hardware.</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>ODD</name>
|
|
<description>Odd parity is used. Parity bits are automatically generated and checked by hardware.</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>STOPBITS</name>
|
|
<description>Stop-Bit Mode</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>INV</name>
|
|
<description>Invert Input And Output</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>ERRSDMA</name>
|
|
<description>Clear RX DMA On Error</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>LOOPBK</name>
|
|
<description>Loopback Enable</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>SFUBRX</name>
|
|
<description>Start-Frame UnBlock RX</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>MPM</name>
|
|
<description>Multi-Processor Mode</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>MPAB</name>
|
|
<description>Multi-Processor Address-Bit</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>BIT8DV</name>
|
|
<description>Bit 8 Default Value</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>RXDMAWU</name>
|
|
<description>RX DMA Wakeup</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>TXDMAWU</name>
|
|
<description>TX DMA Wakeup</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>TXDELAY</name>
|
|
<description>TX Delay Transmission</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>NONE</name>
|
|
<description>Frames are transmitted immediately</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>SINGLE</name>
|
|
<description>Transmission of new frames are delayed by a single baud period</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DOUBLE</name>
|
|
<description>Transmission of new frames are delayed by two baud periods</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TRIPLE</name>
|
|
<description>Transmission of new frames are delayed by three baud periods</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CMD</name>
|
|
<description>Command Register</description>
|
|
<addressOffset>0x004</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x000000FF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>RXEN</name>
|
|
<description>Receiver Enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXDIS</name>
|
|
<description>Receiver Disable</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXEN</name>
|
|
<description>Transmitter Enable</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXDIS</name>
|
|
<description>Transmitter Disable</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXBLOCKEN</name>
|
|
<description>Receiver Block Enable</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXBLOCKDIS</name>
|
|
<description>Receiver Block Disable</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CLEARTX</name>
|
|
<description>Clear TX</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CLEARRX</name>
|
|
<description>Clear RX</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>STATUS</name>
|
|
<description>Status Register</description>
|
|
<addressOffset>0x008</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000010</resetValue>
|
|
<resetMask>0x0000003F</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>RXENS</name>
|
|
<description>Receiver Enable Status</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXENS</name>
|
|
<description>Transmitter Enable Status</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXBLOCK</name>
|
|
<description>Block Incoming Data</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXC</name>
|
|
<description>TX Complete</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXBL</name>
|
|
<description>TX Buffer Level</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXDATAV</name>
|
|
<description>RX Data Valid</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLKDIV</name>
|
|
<description>Clock Control Register</description>
|
|
<addressOffset>0x00C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00007FF8</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>DIV</name>
|
|
<description>Fractional Clock Divider</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>12</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>STARTFRAME</name>
|
|
<description>Start Frame Register</description>
|
|
<addressOffset>0x010</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x000001FF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>STARTFRAME</name>
|
|
<description>Start Frame</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>9</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SIGFRAME</name>
|
|
<description>Signal Frame Register</description>
|
|
<addressOffset>0x014</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x000001FF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>SIGFRAME</name>
|
|
<description>Signal Frame</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>9</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RXDATAX</name>
|
|
<description>Receive Buffer Data Extended Register</description>
|
|
<addressOffset>0x018</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000C1FF</resetMask>
|
|
<readAction>modifyExternal</readAction>
|
|
<fields>
|
|
<field>
|
|
<name>RXDATA</name>
|
|
<description>RX Data</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>9</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>PERR</name>
|
|
<description>Receive Data Parity Error</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>FERR</name>
|
|
<description>Receive Data Framing Error</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RXDATA</name>
|
|
<description>Receive Buffer Data Register</description>
|
|
<addressOffset>0x01C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x000000FF</resetMask>
|
|
<readAction>modifyExternal</readAction>
|
|
<fields>
|
|
<field>
|
|
<name>RXDATA</name>
|
|
<description>RX Data</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RXDATAXP</name>
|
|
<description>Receive Buffer Data Extended Peek Register</description>
|
|
<addressOffset>0x020</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000C1FF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>RXDATAP</name>
|
|
<description>RX Data Peek</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>9</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>PERRP</name>
|
|
<description>Receive Data Parity Error Peek</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>FERRP</name>
|
|
<description>Receive Data Framing Error Peek</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TXDATAX</name>
|
|
<description>Transmit Buffer Data Extended Register</description>
|
|
<addressOffset>0x024</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000E1FF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>TXDATA</name>
|
|
<description>TX Data</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>9</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXBREAK</name>
|
|
<description>Transmit Data As Break</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXDISAT</name>
|
|
<description>Disable TX After Transmission</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXENAT</name>
|
|
<description>Enable RX After Transmission</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TXDATA</name>
|
|
<description>Transmit Buffer Data Register</description>
|
|
<addressOffset>0x028</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x000000FF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>TXDATA</name>
|
|
<description>TX Data</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IF</name>
|
|
<description>Interrupt Flag Register</description>
|
|
<addressOffset>0x02C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000002</resetValue>
|
|
<resetMask>0x000007FF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>TXC</name>
|
|
<description>TX Complete Interrupt Flag</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXBL</name>
|
|
<description>TX Buffer Level Interrupt Flag</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXDATAV</name>
|
|
<description>RX Data Valid Interrupt Flag</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXOF</name>
|
|
<description>RX Overflow Interrupt Flag</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXUF</name>
|
|
<description>RX Underflow Interrupt Flag</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXOF</name>
|
|
<description>TX Overflow Interrupt Flag</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>PERR</name>
|
|
<description>Parity Error Interrupt Flag</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>FERR</name>
|
|
<description>Framing Error Interrupt Flag</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>MPAF</name>
|
|
<description>Multi-Processor Address Frame Interrupt Flag</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>STARTF</name>
|
|
<description>Start Frame Interrupt Flag</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>SIGF</name>
|
|
<description>Signal Frame Interrupt Flag</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IFS</name>
|
|
<description>Interrupt Flag Set Register</description>
|
|
<addressOffset>0x030</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x000007F9</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>TXC</name>
|
|
<description>Set TX Complete Interrupt Flag</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXOF</name>
|
|
<description>Set RX Overflow Interrupt Flag</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXUF</name>
|
|
<description>Set RX Underflow Interrupt Flag</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXOF</name>
|
|
<description>Set TX Overflow Interrupt Flag</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>PERR</name>
|
|
<description>Set Parity Error Interrupt Flag</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>FERR</name>
|
|
<description>Set Framing Error Interrupt Flag</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>MPAF</name>
|
|
<description>Set Multi-Processor Address Frame Interrupt Flag</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>STARTF</name>
|
|
<description>Set Start Frame Interrupt Flag</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>SIGF</name>
|
|
<description>Set Signal Frame Interrupt Flag</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IFC</name>
|
|
<description>Interrupt Flag Clear Register</description>
|
|
<addressOffset>0x034</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x000007F9</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>TXC</name>
|
|
<description>Clear TX Complete Interrupt Flag</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXOF</name>
|
|
<description>Clear RX Overflow Interrupt Flag</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXUF</name>
|
|
<description>Clear RX Underflow Interrupt Flag</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXOF</name>
|
|
<description>Clear TX Overflow Interrupt Flag</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>PERR</name>
|
|
<description>Clear Parity Error Interrupt Flag</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>FERR</name>
|
|
<description>Clear Framing Error Interrupt Flag</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>MPAF</name>
|
|
<description>Clear Multi-Processor Address Frame Interrupt Flag</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>STARTF</name>
|
|
<description>Clear Start-Frame Interrupt Flag</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>SIGF</name>
|
|
<description>Clear Signal-Frame Interrupt Flag</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IEN</name>
|
|
<description>Interrupt Enable Register</description>
|
|
<addressOffset>0x038</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x000007FF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>TXC</name>
|
|
<description>TX Complete Interrupt Enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>TXBL</name>
|
|
<description>TX Buffer Level Interrupt Enable</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>RXDATAV</name>
|
|
<description>RX Data Valid Interrupt Enable</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>RXOF</name>
|
|
<description>RX Overflow Interrupt Enable</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>RXUF</name>
|
|
<description>RX Underflow Interrupt Enable</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>TXOF</name>
|
|
<description>TX Overflow Interrupt Enable</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>PERR</name>
|
|
<description>Parity Error Interrupt Enable</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>FERR</name>
|
|
<description>Framing Error Interrupt Enable</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>MPAF</name>
|
|
<description>Multi-Processor Address Frame Interrupt Enable</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>STARTF</name>
|
|
<description>Start Frame Interrupt Enable</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>SIGF</name>
|
|
<description>Signal Frame Interrupt Enable</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PULSECTRL</name>
|
|
<description>Pulse Control Register</description>
|
|
<addressOffset>0x03C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000003F</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>PULSEW</name>
|
|
<description>Pulse Width</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>PULSEEN</name>
|
|
<description>Pulse Generator/Extender Enable</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>PULSEFILT</name>
|
|
<description>Pulse Filter</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FREEZE</name>
|
|
<description>Freeze Register</description>
|
|
<addressOffset>0x040</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000001</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>REGFREEZE</name>
|
|
<description>Register Update Freeze</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SYNCBUSY</name>
|
|
<description>Synchronization Busy Register</description>
|
|
<addressOffset>0x044</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x000000FF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>CTRL</name>
|
|
<description>CTRL Register Busy</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CMD</name>
|
|
<description>CMD Register Busy</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CLKDIV</name>
|
|
<description>CLKDIV Register Busy</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>STARTFRAME</name>
|
|
<description>STARTFRAME Register Busy</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>SIGFRAME</name>
|
|
<description>SIGFRAME Register Busy</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXDATAX</name>
|
|
<description>TXDATAX Register Busy</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXDATA</name>
|
|
<description>TXDATA Register Busy</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>PULSECTRL</name>
|
|
<description>PULSECTRL Register Busy</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>ROUTE</name>
|
|
<description>I/O Routing Register</description>
|
|
<addressOffset>0x054</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000303</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>RXPEN</name>
|
|
<description>RX Pin Enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>TXPEN</name>
|
|
<description>TX Pin Enable</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>LOCATION</name>
|
|
<description>I/O Location</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>LOC0</name>
|
|
<description>Location 0</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>LOC1</name>
|
|
<description>Location 1</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>LOC2</name>
|
|
<description>Location 2</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>LEUART1</name>
|
|
<description>LEUART1</description>
|
|
<baseAddress>0x40084400</baseAddress>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x00000400</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<interrupt>
|
|
<name>LEUART1</name>
|
|
<value>19</value>
|
|
</interrupt>
|
|
<registers>
|
|
<register>
|
|
<name>CTRL</name>
|
|
<description>Control Register</description>
|
|
<addressOffset>0x000</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>AUTOTRI</name>
|
|
<description>Automatic Transmitter Tristate</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>DATABITS</name>
|
|
<description>Data-Bit Mode</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>PARITY</name>
|
|
<description>Parity-Bit Mode</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>NONE</name>
|
|
<description>Parity bits are not used</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>EVEN</name>
|
|
<description>Even parity are used. Parity bits are automatically generated and checked by hardware.</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>ODD</name>
|
|
<description>Odd parity is used. Parity bits are automatically generated and checked by hardware.</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>STOPBITS</name>
|
|
<description>Stop-Bit Mode</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>INV</name>
|
|
<description>Invert Input And Output</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>ERRSDMA</name>
|
|
<description>Clear RX DMA On Error</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>LOOPBK</name>
|
|
<description>Loopback Enable</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>SFUBRX</name>
|
|
<description>Start-Frame UnBlock RX</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>MPM</name>
|
|
<description>Multi-Processor Mode</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>MPAB</name>
|
|
<description>Multi-Processor Address-Bit</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>BIT8DV</name>
|
|
<description>Bit 8 Default Value</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>RXDMAWU</name>
|
|
<description>RX DMA Wakeup</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>TXDMAWU</name>
|
|
<description>TX DMA Wakeup</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>TXDELAY</name>
|
|
<description>TX Delay Transmission</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>NONE</name>
|
|
<description>Frames are transmitted immediately</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>SINGLE</name>
|
|
<description>Transmission of new frames are delayed by a single baud period</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DOUBLE</name>
|
|
<description>Transmission of new frames are delayed by two baud periods</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TRIPLE</name>
|
|
<description>Transmission of new frames are delayed by three baud periods</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CMD</name>
|
|
<description>Command Register</description>
|
|
<addressOffset>0x004</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x000000FF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>RXEN</name>
|
|
<description>Receiver Enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXDIS</name>
|
|
<description>Receiver Disable</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXEN</name>
|
|
<description>Transmitter Enable</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXDIS</name>
|
|
<description>Transmitter Disable</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXBLOCKEN</name>
|
|
<description>Receiver Block Enable</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXBLOCKDIS</name>
|
|
<description>Receiver Block Disable</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CLEARTX</name>
|
|
<description>Clear TX</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CLEARRX</name>
|
|
<description>Clear RX</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>STATUS</name>
|
|
<description>Status Register</description>
|
|
<addressOffset>0x008</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000010</resetValue>
|
|
<resetMask>0x0000003F</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>RXENS</name>
|
|
<description>Receiver Enable Status</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXENS</name>
|
|
<description>Transmitter Enable Status</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXBLOCK</name>
|
|
<description>Block Incoming Data</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXC</name>
|
|
<description>TX Complete</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXBL</name>
|
|
<description>TX Buffer Level</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXDATAV</name>
|
|
<description>RX Data Valid</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLKDIV</name>
|
|
<description>Clock Control Register</description>
|
|
<addressOffset>0x00C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00007FF8</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>DIV</name>
|
|
<description>Fractional Clock Divider</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>12</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>STARTFRAME</name>
|
|
<description>Start Frame Register</description>
|
|
<addressOffset>0x010</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x000001FF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>STARTFRAME</name>
|
|
<description>Start Frame</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>9</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SIGFRAME</name>
|
|
<description>Signal Frame Register</description>
|
|
<addressOffset>0x014</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x000001FF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>SIGFRAME</name>
|
|
<description>Signal Frame</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>9</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RXDATAX</name>
|
|
<description>Receive Buffer Data Extended Register</description>
|
|
<addressOffset>0x018</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000C1FF</resetMask>
|
|
<readAction>modifyExternal</readAction>
|
|
<fields>
|
|
<field>
|
|
<name>RXDATA</name>
|
|
<description>RX Data</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>9</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>PERR</name>
|
|
<description>Receive Data Parity Error</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>FERR</name>
|
|
<description>Receive Data Framing Error</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RXDATA</name>
|
|
<description>Receive Buffer Data Register</description>
|
|
<addressOffset>0x01C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x000000FF</resetMask>
|
|
<readAction>modifyExternal</readAction>
|
|
<fields>
|
|
<field>
|
|
<name>RXDATA</name>
|
|
<description>RX Data</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RXDATAXP</name>
|
|
<description>Receive Buffer Data Extended Peek Register</description>
|
|
<addressOffset>0x020</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000C1FF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>RXDATAP</name>
|
|
<description>RX Data Peek</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>9</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>PERRP</name>
|
|
<description>Receive Data Parity Error Peek</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>FERRP</name>
|
|
<description>Receive Data Framing Error Peek</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TXDATAX</name>
|
|
<description>Transmit Buffer Data Extended Register</description>
|
|
<addressOffset>0x024</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000E1FF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>TXDATA</name>
|
|
<description>TX Data</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>9</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXBREAK</name>
|
|
<description>Transmit Data As Break</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXDISAT</name>
|
|
<description>Disable TX After Transmission</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXENAT</name>
|
|
<description>Enable RX After Transmission</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TXDATA</name>
|
|
<description>Transmit Buffer Data Register</description>
|
|
<addressOffset>0x028</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x000000FF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>TXDATA</name>
|
|
<description>TX Data</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IF</name>
|
|
<description>Interrupt Flag Register</description>
|
|
<addressOffset>0x02C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000002</resetValue>
|
|
<resetMask>0x000007FF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>TXC</name>
|
|
<description>TX Complete Interrupt Flag</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXBL</name>
|
|
<description>TX Buffer Level Interrupt Flag</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXDATAV</name>
|
|
<description>RX Data Valid Interrupt Flag</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXOF</name>
|
|
<description>RX Overflow Interrupt Flag</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXUF</name>
|
|
<description>RX Underflow Interrupt Flag</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXOF</name>
|
|
<description>TX Overflow Interrupt Flag</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>PERR</name>
|
|
<description>Parity Error Interrupt Flag</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>FERR</name>
|
|
<description>Framing Error Interrupt Flag</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>MPAF</name>
|
|
<description>Multi-Processor Address Frame Interrupt Flag</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>STARTF</name>
|
|
<description>Start Frame Interrupt Flag</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>SIGF</name>
|
|
<description>Signal Frame Interrupt Flag</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IFS</name>
|
|
<description>Interrupt Flag Set Register</description>
|
|
<addressOffset>0x030</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x000007F9</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>TXC</name>
|
|
<description>Set TX Complete Interrupt Flag</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXOF</name>
|
|
<description>Set RX Overflow Interrupt Flag</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXUF</name>
|
|
<description>Set RX Underflow Interrupt Flag</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXOF</name>
|
|
<description>Set TX Overflow Interrupt Flag</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>PERR</name>
|
|
<description>Set Parity Error Interrupt Flag</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>FERR</name>
|
|
<description>Set Framing Error Interrupt Flag</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>MPAF</name>
|
|
<description>Set Multi-Processor Address Frame Interrupt Flag</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>STARTF</name>
|
|
<description>Set Start Frame Interrupt Flag</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>SIGF</name>
|
|
<description>Set Signal Frame Interrupt Flag</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IFC</name>
|
|
<description>Interrupt Flag Clear Register</description>
|
|
<addressOffset>0x034</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x000007F9</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>TXC</name>
|
|
<description>Clear TX Complete Interrupt Flag</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXOF</name>
|
|
<description>Clear RX Overflow Interrupt Flag</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXUF</name>
|
|
<description>Clear RX Underflow Interrupt Flag</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXOF</name>
|
|
<description>Clear TX Overflow Interrupt Flag</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>PERR</name>
|
|
<description>Clear Parity Error Interrupt Flag</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>FERR</name>
|
|
<description>Clear Framing Error Interrupt Flag</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>MPAF</name>
|
|
<description>Clear Multi-Processor Address Frame Interrupt Flag</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>STARTF</name>
|
|
<description>Clear Start-Frame Interrupt Flag</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>SIGF</name>
|
|
<description>Clear Signal-Frame Interrupt Flag</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IEN</name>
|
|
<description>Interrupt Enable Register</description>
|
|
<addressOffset>0x038</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x000007FF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>TXC</name>
|
|
<description>TX Complete Interrupt Enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>TXBL</name>
|
|
<description>TX Buffer Level Interrupt Enable</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>RXDATAV</name>
|
|
<description>RX Data Valid Interrupt Enable</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>RXOF</name>
|
|
<description>RX Overflow Interrupt Enable</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>RXUF</name>
|
|
<description>RX Underflow Interrupt Enable</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>TXOF</name>
|
|
<description>TX Overflow Interrupt Enable</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>PERR</name>
|
|
<description>Parity Error Interrupt Enable</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>FERR</name>
|
|
<description>Framing Error Interrupt Enable</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>MPAF</name>
|
|
<description>Multi-Processor Address Frame Interrupt Enable</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>STARTF</name>
|
|
<description>Start Frame Interrupt Enable</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>SIGF</name>
|
|
<description>Signal Frame Interrupt Enable</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PULSECTRL</name>
|
|
<description>Pulse Control Register</description>
|
|
<addressOffset>0x03C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000003F</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>PULSEW</name>
|
|
<description>Pulse Width</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>PULSEEN</name>
|
|
<description>Pulse Generator/Extender Enable</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>PULSEFILT</name>
|
|
<description>Pulse Filter</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FREEZE</name>
|
|
<description>Freeze Register</description>
|
|
<addressOffset>0x040</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000001</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>REGFREEZE</name>
|
|
<description>Register Update Freeze</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SYNCBUSY</name>
|
|
<description>Synchronization Busy Register</description>
|
|
<addressOffset>0x044</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x000000FF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>CTRL</name>
|
|
<description>CTRL Register Busy</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CMD</name>
|
|
<description>CMD Register Busy</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CLKDIV</name>
|
|
<description>CLKDIV Register Busy</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>STARTFRAME</name>
|
|
<description>STARTFRAME Register Busy</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>SIGFRAME</name>
|
|
<description>SIGFRAME Register Busy</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXDATAX</name>
|
|
<description>TXDATAX Register Busy</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXDATA</name>
|
|
<description>TXDATA Register Busy</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>PULSECTRL</name>
|
|
<description>PULSECTRL Register Busy</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>ROUTE</name>
|
|
<description>I/O Routing Register</description>
|
|
<addressOffset>0x054</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000303</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>RXPEN</name>
|
|
<description>RX Pin Enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>TXPEN</name>
|
|
<description>TX Pin Enable</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>LOCATION</name>
|
|
<description>I/O Location</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>LOC0</name>
|
|
<description>Location 0</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>LOC1</name>
|
|
<description>Location 1</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>LOC2</name>
|
|
<description>Location 2</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>RTC</name>
|
|
<description>RTC</description>
|
|
<baseAddress>0x40080000</baseAddress>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x00000400</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<interrupt>
|
|
<name>RTC</name>
|
|
<value>24</value>
|
|
</interrupt>
|
|
<registers>
|
|
<register>
|
|
<name>CTRL</name>
|
|
<description>Control Register</description>
|
|
<addressOffset>0x000</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000007</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>EN</name>
|
|
<description>RTC Enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>DEBUGRUN</name>
|
|
<description>Debug Mode Run Enable</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>COMP0TOP</name>
|
|
<description>Compare Channel 0 is Top Value</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CNT</name>
|
|
<description>Counter Value Register</description>
|
|
<addressOffset>0x004</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00FFFFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>CNT</name>
|
|
<description>Counter Value</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>24</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>COMP0</name>
|
|
<description>Compare Value Register 0</description>
|
|
<addressOffset>0x008</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00FFFFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>COMP0</name>
|
|
<description>Compare Value 0</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>24</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>COMP1</name>
|
|
<description>Compare Value Register 1</description>
|
|
<addressOffset>0x00C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00FFFFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>COMP1</name>
|
|
<description>Compare Value 1</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>24</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IF</name>
|
|
<description>Interrupt Flag Register</description>
|
|
<addressOffset>0x010</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000007</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>OF</name>
|
|
<description>Overflow Interrupt Flag</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>COMP0</name>
|
|
<description>Compare Match 0 Interrupt Flag</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>COMP1</name>
|
|
<description>Compare Match 1 Interrupt Flag</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IFS</name>
|
|
<description>Interrupt Flag Set Register</description>
|
|
<addressOffset>0x014</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000007</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>OF</name>
|
|
<description>Set Overflow Interrupt Flag</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>COMP0</name>
|
|
<description>Set Compare match 0 Interrupt Flag</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>COMP1</name>
|
|
<description>Set Compare match 1 Interrupt Flag</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IFC</name>
|
|
<description>Interrupt Flag Clear Register</description>
|
|
<addressOffset>0x018</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000007</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>OF</name>
|
|
<description>Clear Overflow Interrupt Flag</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>COMP0</name>
|
|
<description>Clear Compare match 0 Interrupt Flag</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>COMP1</name>
|
|
<description>Clear Compare match 1 Interrupt Flag</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IEN</name>
|
|
<description>Interrupt Enable Register</description>
|
|
<addressOffset>0x01C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000007</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>OF</name>
|
|
<description>Overflow Interrupt Enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>COMP0</name>
|
|
<description>Compare Match 0 Interrupt Enable</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>COMP1</name>
|
|
<description>Compare Match 1 Interrupt Enable</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FREEZE</name>
|
|
<description>Freeze Register</description>
|
|
<addressOffset>0x020</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000001</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>REGFREEZE</name>
|
|
<description>Register Update Freeze</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SYNCBUSY</name>
|
|
<description>Synchronization Busy Register</description>
|
|
<addressOffset>0x024</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000007</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>CTRL</name>
|
|
<description>CTRL Register Busy</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>COMP0</name>
|
|
<description>COMP0 Register Busy</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>COMP1</name>
|
|
<description>COMP1 Register Busy</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>LETIMER0</name>
|
|
<description>LETIMER0</description>
|
|
<baseAddress>0x40082000</baseAddress>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x00000400</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<interrupt>
|
|
<name>LETIMER0</name>
|
|
<value>20</value>
|
|
</interrupt>
|
|
<registers>
|
|
<register>
|
|
<name>CTRL</name>
|
|
<description>Control Register</description>
|
|
<addressOffset>0x000</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00001FFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>REPMODE</name>
|
|
<description>Repeat Mode</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>FREE</name>
|
|
<description>When started, the LETIMER counts down until it is stopped by software.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>ONESHOT</name>
|
|
<description>The counter counts REP0 times. When REP0 reaches zero, the counter stops.</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>BUFFERED</name>
|
|
<description>The counter counts REP0 times. If REP1 has been written, it is loaded into REP0 when REP0 reaches zero. Else the counter stops</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DOUBLE</name>
|
|
<description>Both REP0 and REP1 are decremented when the LETIMER wraps around. The LETIMER counts until both REP0 and REP1 are zero</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>UFOA0</name>
|
|
<description>Underflow Output Action 0</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>NONE</name>
|
|
<description>LETn_O0 is held at its idle value as defined by OPOL0.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TOGGLE</name>
|
|
<description>LETn_O0 is toggled on CNT underflow.</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PULSE</name>
|
|
<description>LETn_O0 is held active for one LFACLKLETIMER0 clock cycle on CNT underflow. The output then returns to its idle value as defined by OPOL0.</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PWM</name>
|
|
<description>LETn_O0 is set idle on CNT underflow, and active on compare match with COMP1</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>UFOA1</name>
|
|
<description>Underflow Output Action 1</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>NONE</name>
|
|
<description>LETn_O1 is held at its idle value as defined by OPOL1.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TOGGLE</name>
|
|
<description>LETn_O1 is toggled on CNT underflow.</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PULSE</name>
|
|
<description>LETn_O1 is held active for one LFACLKLETIMER0 clock cycle on CNT underflow. The output then returns to its idle value as defined by OPOL1.</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PWM</name>
|
|
<description>LETn_O1 is set idle on CNT underflow, and active on compare match with COMP1</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>OPOL0</name>
|
|
<description>Output 0 Polarity</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>OPOL1</name>
|
|
<description>Output 1 Polarity</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>BUFTOP</name>
|
|
<description>Buffered Top</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>COMP0TOP</name>
|
|
<description>Compare Value 0 Is Top Value</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>RTCC0TEN</name>
|
|
<description>RTC Compare 0 Trigger Enable</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>RTCC1TEN</name>
|
|
<description>RTC Compare 1 Trigger Enable</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>DEBUGRUN</name>
|
|
<description>Debug Mode Run Enable</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CMD</name>
|
|
<description>Command Register</description>
|
|
<addressOffset>0x004</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000001F</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>START</name>
|
|
<description>Start LETIMER</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>STOP</name>
|
|
<description>Stop LETIMER</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CLEAR</name>
|
|
<description>Clear LETIMER</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CTO0</name>
|
|
<description>Clear Toggle Output 0</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CTO1</name>
|
|
<description>Clear Toggle Output 1</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>STATUS</name>
|
|
<description>Status Register</description>
|
|
<addressOffset>0x008</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000001</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>RUNNING</name>
|
|
<description>LETIMER Running</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CNT</name>
|
|
<description>Counter Value Register</description>
|
|
<addressOffset>0x00C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>CNT</name>
|
|
<description>Counter Value</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>COMP0</name>
|
|
<description>Compare Value Register 0</description>
|
|
<addressOffset>0x010</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>COMP0</name>
|
|
<description>Compare Value 0</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>COMP1</name>
|
|
<description>Compare Value Register 1</description>
|
|
<addressOffset>0x014</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>COMP1</name>
|
|
<description>Compare Value 1</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REP0</name>
|
|
<description>Repeat Counter Register 0</description>
|
|
<addressOffset>0x018</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x000000FF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>REP0</name>
|
|
<description>Repeat Counter 0</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>REP1</name>
|
|
<description>Repeat Counter Register 1</description>
|
|
<addressOffset>0x01C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x000000FF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>REP1</name>
|
|
<description>Repeat Counter 1</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IF</name>
|
|
<description>Interrupt Flag Register</description>
|
|
<addressOffset>0x020</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000001F</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>COMP0</name>
|
|
<description>Compare Match 0 Interrupt Flag</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>COMP1</name>
|
|
<description>Compare Match 1 Interrupt Flag</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>UF</name>
|
|
<description>Underflow Interrupt Flag</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>REP0</name>
|
|
<description>Repeat Counter 0 Interrupt Flag</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>REP1</name>
|
|
<description>Repeat Counter 1 Interrupt Flag</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IFS</name>
|
|
<description>Interrupt Flag Set Register</description>
|
|
<addressOffset>0x024</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000001F</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>COMP0</name>
|
|
<description>Set Compare Match 0 Interrupt Flag</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>COMP1</name>
|
|
<description>Set Compare Match 1 Interrupt Flag</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>UF</name>
|
|
<description>Set Underflow Interrupt Flag</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>REP0</name>
|
|
<description>Set Repeat Counter 0 Interrupt Flag</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>REP1</name>
|
|
<description>Set Repeat Counter 1 Interrupt Flag</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IFC</name>
|
|
<description>Interrupt Flag Clear Register</description>
|
|
<addressOffset>0x028</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000001F</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>COMP0</name>
|
|
<description>Clear Compare Match 0 Interrupt Flag</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>COMP1</name>
|
|
<description>Clear Compare Match 1 Interrupt Flag</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>UF</name>
|
|
<description>Clear Underflow Interrupt Flag</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>REP0</name>
|
|
<description>Clear Repeat Counter 0 Interrupt Flag</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>REP1</name>
|
|
<description>Clear Repeat Counter 1 Interrupt Flag</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IEN</name>
|
|
<description>Interrupt Enable Register</description>
|
|
<addressOffset>0x02C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000001F</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>COMP0</name>
|
|
<description>Compare Match 0 Interrupt Enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>COMP1</name>
|
|
<description>Compare Match 1 Interrupt Enable</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>UF</name>
|
|
<description>Underflow Interrupt Enable</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>REP0</name>
|
|
<description>Repeat Counter 0 Interrupt Enable</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>REP1</name>
|
|
<description>Repeat Counter 1 Interrupt Enable</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FREEZE</name>
|
|
<description>Freeze Register</description>
|
|
<addressOffset>0x030</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000001</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>REGFREEZE</name>
|
|
<description>Register Update Freeze</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SYNCBUSY</name>
|
|
<description>Synchronization Busy Register</description>
|
|
<addressOffset>0x034</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000003F</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>CTRL</name>
|
|
<description>CTRL Register Busy</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CMD</name>
|
|
<description>CMD Register Busy</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>COMP0</name>
|
|
<description>COMP0 Register Busy</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>COMP1</name>
|
|
<description>COMP1 Register Busy</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>REP0</name>
|
|
<description>REP0 Register Busy</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>REP1</name>
|
|
<description>REP1 Register Busy</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>ROUTE</name>
|
|
<description>I/O Routing Register</description>
|
|
<addressOffset>0x040</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000303</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>OUT0PEN</name>
|
|
<description>Output 0 Pin Enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>OUT1PEN</name>
|
|
<description>Output 1 Pin Enable</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>LOCATION</name>
|
|
<description>I/O Location</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>LOC0</name>
|
|
<description>Location 0</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>LOC1</name>
|
|
<description>Location 1</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>LOC2</name>
|
|
<description>Location 2</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>LOC3</name>
|
|
<description>Location 3</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>PCNT0</name>
|
|
<description>PCNT0</description>
|
|
<baseAddress>0x40086000</baseAddress>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x00000400</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<interrupt>
|
|
<name>PCNT0</name>
|
|
<value>21</value>
|
|
</interrupt>
|
|
<registers>
|
|
<register>
|
|
<name>CTRL</name>
|
|
<description>Control Register</description>
|
|
<addressOffset>0x000</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000003F</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>MODE</name>
|
|
<description>Mode Select</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLE</name>
|
|
<description>The module is disabled.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>OVSSINGLE</name>
|
|
<description>Single input LFACLK oversampling mode (available in EM0-EM2).</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>EXTCLKSINGLE</name>
|
|
<description>Externally clocked single input counter mode (available in EM0-EM3).</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>EXTCLKQUAD</name>
|
|
<description>Externally clocked quadrature decoder mode (available in EM0-EM3).</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>CNTDIR</name>
|
|
<description>Non-Quadrature Mode Counter Direction Control</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>EDGE</name>
|
|
<description>Edge Select</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>FILT</name>
|
|
<description>Enable Digital Pulse Width Filter</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>RSTEN</name>
|
|
<description>Enable PCNT Clock Domain Reset</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CMD</name>
|
|
<description>Command Register</description>
|
|
<addressOffset>0x004</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000003</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>LCNTIM</name>
|
|
<description>Load CNT Immediately</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>LTOPBIM</name>
|
|
<description>Load TOPB Immediately</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>STATUS</name>
|
|
<description>Status Register</description>
|
|
<addressOffset>0x008</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000001</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>DIR</name>
|
|
<description>Current Counter Direction</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CNT</name>
|
|
<description>Counter Value Register</description>
|
|
<addressOffset>0x00C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>CNT</name>
|
|
<description>Counter Value</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TOP</name>
|
|
<description>Top Value Register</description>
|
|
<addressOffset>0x010</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x000000FF</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>TOP</name>
|
|
<description>Counter Top Value</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TOPB</name>
|
|
<description>Top Value Buffer Register</description>
|
|
<addressOffset>0x014</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x000000FF</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>TOPB</name>
|
|
<description>Counter Top Buffer</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IF</name>
|
|
<description>Interrupt Flag Register</description>
|
|
<addressOffset>0x018</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000007</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>UF</name>
|
|
<description>Underflow Interrupt Read Flag</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>OF</name>
|
|
<description>Overflow Interrupt Read Flag</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>DIRCNG</name>
|
|
<description>Direction Change Detect Interrupt Flag</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IFS</name>
|
|
<description>Interrupt Flag Set Register</description>
|
|
<addressOffset>0x01C</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000007</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>UF</name>
|
|
<description>Underflow interrupt set</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>OF</name>
|
|
<description>Overflow Interrupt Set</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>DIRCNG</name>
|
|
<description>Direction Change Detect Interrupt Set</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IFC</name>
|
|
<description>Interrupt Flag Clear Register</description>
|
|
<addressOffset>0x020</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000007</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>UF</name>
|
|
<description>Underflow Interrupt Clear</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>OF</name>
|
|
<description>Overflow Interrupt Clear</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>DIRCNG</name>
|
|
<description>Direction Change Detect Interrupt Clear</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IEN</name>
|
|
<description>Interrupt Enable Register</description>
|
|
<addressOffset>0x024</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000007</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>UF</name>
|
|
<description>Underflow Interrupt Enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>OF</name>
|
|
<description>Overflow Interrupt Enable</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>DIRCNG</name>
|
|
<description>Direction Change Detect Interrupt Enable</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>ROUTE</name>
|
|
<description>I/O Routing Register</description>
|
|
<addressOffset>0x028</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000300</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>LOCATION</name>
|
|
<description>I/O Location</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>LOC0</name>
|
|
<description>Location 0</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>LOC1</name>
|
|
<description>Location 1</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>LOC2</name>
|
|
<description>Location 2</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FREEZE</name>
|
|
<description>Freeze Register</description>
|
|
<addressOffset>0x02C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000001</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>REGFREEZE</name>
|
|
<description>Register Update Freeze</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SYNCBUSY</name>
|
|
<description>Synchronization Busy Register</description>
|
|
<addressOffset>0x030</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000007</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>CTRL</name>
|
|
<description>CTRL Register Busy</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CMD</name>
|
|
<description>CMD Register Busy</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TOPB</name>
|
|
<description>TOPB Register Busy</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>PCNT1</name>
|
|
<description>PCNT1</description>
|
|
<baseAddress>0x40086400</baseAddress>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x00000400</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<interrupt>
|
|
<name>PCNT1</name>
|
|
<value>22</value>
|
|
</interrupt>
|
|
<registers>
|
|
<register>
|
|
<name>CTRL</name>
|
|
<description>Control Register</description>
|
|
<addressOffset>0x000</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000003F</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>MODE</name>
|
|
<description>Mode Select</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLE</name>
|
|
<description>The module is disabled.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>OVSSINGLE</name>
|
|
<description>Single input LFACLK oversampling mode (available in EM0-EM2).</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>EXTCLKSINGLE</name>
|
|
<description>Externally clocked single input counter mode (available in EM0-EM3).</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>EXTCLKQUAD</name>
|
|
<description>Externally clocked quadrature decoder mode (available in EM0-EM3).</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>CNTDIR</name>
|
|
<description>Non-Quadrature Mode Counter Direction Control</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>EDGE</name>
|
|
<description>Edge Select</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>FILT</name>
|
|
<description>Enable Digital Pulse Width Filter</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>RSTEN</name>
|
|
<description>Enable PCNT Clock Domain Reset</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CMD</name>
|
|
<description>Command Register</description>
|
|
<addressOffset>0x004</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000003</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>LCNTIM</name>
|
|
<description>Load CNT Immediately</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>LTOPBIM</name>
|
|
<description>Load TOPB Immediately</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>STATUS</name>
|
|
<description>Status Register</description>
|
|
<addressOffset>0x008</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000001</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>DIR</name>
|
|
<description>Current Counter Direction</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CNT</name>
|
|
<description>Counter Value Register</description>
|
|
<addressOffset>0x00C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>CNT</name>
|
|
<description>Counter Value</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TOP</name>
|
|
<description>Top Value Register</description>
|
|
<addressOffset>0x010</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x000000FF</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>TOP</name>
|
|
<description>Counter Top Value</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TOPB</name>
|
|
<description>Top Value Buffer Register</description>
|
|
<addressOffset>0x014</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x000000FF</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>TOPB</name>
|
|
<description>Counter Top Buffer</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IF</name>
|
|
<description>Interrupt Flag Register</description>
|
|
<addressOffset>0x018</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000007</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>UF</name>
|
|
<description>Underflow Interrupt Read Flag</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>OF</name>
|
|
<description>Overflow Interrupt Read Flag</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>DIRCNG</name>
|
|
<description>Direction Change Detect Interrupt Flag</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IFS</name>
|
|
<description>Interrupt Flag Set Register</description>
|
|
<addressOffset>0x01C</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000007</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>UF</name>
|
|
<description>Underflow interrupt set</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>OF</name>
|
|
<description>Overflow Interrupt Set</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>DIRCNG</name>
|
|
<description>Direction Change Detect Interrupt Set</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IFC</name>
|
|
<description>Interrupt Flag Clear Register</description>
|
|
<addressOffset>0x020</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000007</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>UF</name>
|
|
<description>Underflow Interrupt Clear</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>OF</name>
|
|
<description>Overflow Interrupt Clear</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>DIRCNG</name>
|
|
<description>Direction Change Detect Interrupt Clear</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IEN</name>
|
|
<description>Interrupt Enable Register</description>
|
|
<addressOffset>0x024</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000007</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>UF</name>
|
|
<description>Underflow Interrupt Enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>OF</name>
|
|
<description>Overflow Interrupt Enable</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>DIRCNG</name>
|
|
<description>Direction Change Detect Interrupt Enable</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>ROUTE</name>
|
|
<description>I/O Routing Register</description>
|
|
<addressOffset>0x028</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000300</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>LOCATION</name>
|
|
<description>I/O Location</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>LOC0</name>
|
|
<description>Location 0</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>LOC1</name>
|
|
<description>Location 1</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>LOC2</name>
|
|
<description>Location 2</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FREEZE</name>
|
|
<description>Freeze Register</description>
|
|
<addressOffset>0x02C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000001</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>REGFREEZE</name>
|
|
<description>Register Update Freeze</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SYNCBUSY</name>
|
|
<description>Synchronization Busy Register</description>
|
|
<addressOffset>0x030</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000007</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>CTRL</name>
|
|
<description>CTRL Register Busy</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CMD</name>
|
|
<description>CMD Register Busy</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TOPB</name>
|
|
<description>TOPB Register Busy</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>PCNT2</name>
|
|
<description>PCNT2</description>
|
|
<baseAddress>0x40086800</baseAddress>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x00000400</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<interrupt>
|
|
<name>PCNT2</name>
|
|
<value>23</value>
|
|
</interrupt>
|
|
<registers>
|
|
<register>
|
|
<name>CTRL</name>
|
|
<description>Control Register</description>
|
|
<addressOffset>0x000</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000003F</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>MODE</name>
|
|
<description>Mode Select</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLE</name>
|
|
<description>The module is disabled.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>OVSSINGLE</name>
|
|
<description>Single input LFACLK oversampling mode (available in EM0-EM2).</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>EXTCLKSINGLE</name>
|
|
<description>Externally clocked single input counter mode (available in EM0-EM3).</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>EXTCLKQUAD</name>
|
|
<description>Externally clocked quadrature decoder mode (available in EM0-EM3).</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>CNTDIR</name>
|
|
<description>Non-Quadrature Mode Counter Direction Control</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>EDGE</name>
|
|
<description>Edge Select</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>FILT</name>
|
|
<description>Enable Digital Pulse Width Filter</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>RSTEN</name>
|
|
<description>Enable PCNT Clock Domain Reset</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CMD</name>
|
|
<description>Command Register</description>
|
|
<addressOffset>0x004</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000003</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>LCNTIM</name>
|
|
<description>Load CNT Immediately</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>LTOPBIM</name>
|
|
<description>Load TOPB Immediately</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>STATUS</name>
|
|
<description>Status Register</description>
|
|
<addressOffset>0x008</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000001</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>DIR</name>
|
|
<description>Current Counter Direction</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CNT</name>
|
|
<description>Counter Value Register</description>
|
|
<addressOffset>0x00C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>CNT</name>
|
|
<description>Counter Value</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TOP</name>
|
|
<description>Top Value Register</description>
|
|
<addressOffset>0x010</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x000000FF</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>TOP</name>
|
|
<description>Counter Top Value</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TOPB</name>
|
|
<description>Top Value Buffer Register</description>
|
|
<addressOffset>0x014</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x000000FF</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>TOPB</name>
|
|
<description>Counter Top Buffer</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IF</name>
|
|
<description>Interrupt Flag Register</description>
|
|
<addressOffset>0x018</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000007</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>UF</name>
|
|
<description>Underflow Interrupt Read Flag</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>OF</name>
|
|
<description>Overflow Interrupt Read Flag</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>DIRCNG</name>
|
|
<description>Direction Change Detect Interrupt Flag</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IFS</name>
|
|
<description>Interrupt Flag Set Register</description>
|
|
<addressOffset>0x01C</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000007</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>UF</name>
|
|
<description>Underflow interrupt set</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>OF</name>
|
|
<description>Overflow Interrupt Set</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>DIRCNG</name>
|
|
<description>Direction Change Detect Interrupt Set</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IFC</name>
|
|
<description>Interrupt Flag Clear Register</description>
|
|
<addressOffset>0x020</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000007</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>UF</name>
|
|
<description>Underflow Interrupt Clear</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>OF</name>
|
|
<description>Overflow Interrupt Clear</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>DIRCNG</name>
|
|
<description>Direction Change Detect Interrupt Clear</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IEN</name>
|
|
<description>Interrupt Enable Register</description>
|
|
<addressOffset>0x024</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000007</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>UF</name>
|
|
<description>Underflow Interrupt Enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>OF</name>
|
|
<description>Overflow Interrupt Enable</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>DIRCNG</name>
|
|
<description>Direction Change Detect Interrupt Enable</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>ROUTE</name>
|
|
<description>I/O Routing Register</description>
|
|
<addressOffset>0x028</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000300</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>LOCATION</name>
|
|
<description>I/O Location</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>LOC0</name>
|
|
<description>Location 0</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>LOC1</name>
|
|
<description>Location 1</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>LOC2</name>
|
|
<description>Location 2</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FREEZE</name>
|
|
<description>Freeze Register</description>
|
|
<addressOffset>0x02C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000001</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>REGFREEZE</name>
|
|
<description>Register Update Freeze</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SYNCBUSY</name>
|
|
<description>Synchronization Busy Register</description>
|
|
<addressOffset>0x030</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000007</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>CTRL</name>
|
|
<description>CTRL Register Busy</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CMD</name>
|
|
<description>CMD Register Busy</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TOPB</name>
|
|
<description>TOPB Register Busy</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>ACMP0</name>
|
|
<description>ACMP0</description>
|
|
<baseAddress>0x40001000</baseAddress>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x00000400</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<interrupt>
|
|
<name>ACMP0</name>
|
|
<value>5</value>
|
|
</interrupt>
|
|
<registers>
|
|
<register>
|
|
<name>CTRL</name>
|
|
<description>Control Register</description>
|
|
<addressOffset>0x000</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x47000000</resetValue>
|
|
<resetMask>0xCF03077F</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>EN</name>
|
|
<description>Analog Comparator Enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>MUXEN</name>
|
|
<description>Input Mux Enable</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>INACTVAL</name>
|
|
<description>Inactive Value</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>GPIOINV</name>
|
|
<description>Comparator GPIO Output Invert</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>HYSTSEL</name>
|
|
<description>Hysteresis Select</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>HYST0</name>
|
|
<description>No hysteresis.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>HYST1</name>
|
|
<description>~15 mV hysteresis.</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>HYST2</name>
|
|
<description>~22 mV hysteresis.</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>HYST3</name>
|
|
<description>~29 mV hysteresis.</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>HYST4</name>
|
|
<description>~36 mV hysteresis.</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>HYST5</name>
|
|
<description>~43 mV hysteresis.</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>HYST6</name>
|
|
<description>~50 mV hysteresis.</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>HYST7</name>
|
|
<description>~57 mV hysteresis.</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>WARMTIME</name>
|
|
<description>Warm-up Time</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>4CYCLES</name>
|
|
<description>4 HFPERCLK cycles.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>8CYCLES</name>
|
|
<description>8 HFPERCLK cycles.</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>16CYCLES</name>
|
|
<description>16 HFPERCLK cycles.</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>32CYCLES</name>
|
|
<description>32 HFPERCLK cycles.</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>64CYCLES</name>
|
|
<description>64 HFPERCLK cycles.</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>128CYCLES</name>
|
|
<description>128 HFPERCLK cycles.</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>256CYCLES</name>
|
|
<description>256 HFPERCLK cycles.</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>512CYCLES</name>
|
|
<description>512 HFPERCLK cycles.</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>IRISE</name>
|
|
<description>Rising Edge Interrupt Sense</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>IFALL</name>
|
|
<description>Falling Edge Interrupt Sense</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>BIASPROG</name>
|
|
<description>Bias Configuration</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>HALFBIAS</name>
|
|
<description>Half Bias Current</description>
|
|
<bitOffset>30</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>FULLBIAS</name>
|
|
<description>Full Bias Current</description>
|
|
<bitOffset>31</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>INPUTSEL</name>
|
|
<description>Input Selection Register</description>
|
|
<addressOffset>0x004</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00010080</resetValue>
|
|
<resetMask>0x31013FF7</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>POSSEL</name>
|
|
<description>Positive Input Select</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>CH0</name>
|
|
<description>Channel 0 as positive input.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>CH1</name>
|
|
<description>Channel 1 as positive input.</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>CH2</name>
|
|
<description>Channel 2 as positive input.</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>CH3</name>
|
|
<description>Channel 3 as positive input.</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>CH4</name>
|
|
<description>Channel 4 as positive input.</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>CH5</name>
|
|
<description>Channel 5 as positive input.</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>CH6</name>
|
|
<description>Channel 6 as positive input.</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>CH7</name>
|
|
<description>Channel 7 as positive input.</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>NEGSEL</name>
|
|
<description>Negative Input Select</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>CH0</name>
|
|
<description>Channel 0 as negative input.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>CH1</name>
|
|
<description>Channel 1 as negative input.</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>CH2</name>
|
|
<description>Channel 2 as negative input.</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>CH3</name>
|
|
<description>Channel 3 as negative input.</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>CH4</name>
|
|
<description>Channel 4 as negative input.</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>CH5</name>
|
|
<description>Channel 5 as negative input.</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>CH6</name>
|
|
<description>Channel 6 as negative input.</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>CH7</name>
|
|
<description>Channel 7 as negative input.</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>1V25</name>
|
|
<description>1.25 V as negative input.</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>2V5</name>
|
|
<description>2.5 V as negative input.</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>VDD</name>
|
|
<description>Scaled VDD as negative input.</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>CAPSENSE</name>
|
|
<description>Capacitive sense mode.</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>VDDLEVEL</name>
|
|
<description>VDD Reference Level</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>6</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>LPREF</name>
|
|
<description>Low Power Reference Mode</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CSRESEN</name>
|
|
<description>Capacitive Sense Mode Internal Resistor Enable</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CSRESSEL</name>
|
|
<description>Capacitive Sense Mode Internal Resistor Select</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>RES0</name>
|
|
<description>Internal capacitive sense resistor value 0.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>RES1</name>
|
|
<description>Internal capacitive sense resistor value 1.</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>RES2</name>
|
|
<description>Internal capacitive sense resistor value 2.</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>RES3</name>
|
|
<description>Internal capacitive sense resistor value 3.</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>STATUS</name>
|
|
<description>Status Register</description>
|
|
<addressOffset>0x008</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000003</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>ACMPACT</name>
|
|
<description>Analog Comparator Active</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>ACMPOUT</name>
|
|
<description>Analog Comparator Output</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IEN</name>
|
|
<description>Interrupt Enable Register</description>
|
|
<addressOffset>0x00C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000003</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>EDGE</name>
|
|
<description>Edge Trigger Interrupt Enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>WARMUP</name>
|
|
<description>Warm-up Interrupt Enable</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IF</name>
|
|
<description>Interrupt Flag Register</description>
|
|
<addressOffset>0x010</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000003</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>EDGE</name>
|
|
<description>Edge Triggered Interrupt Flag</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>WARMUP</name>
|
|
<description>Warm-up Interrupt Flag</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IFS</name>
|
|
<description>Interrupt Flag Set Register</description>
|
|
<addressOffset>0x014</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000003</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>EDGE</name>
|
|
<description>Edge Triggered Interrupt Flag Set</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>WARMUP</name>
|
|
<description>Warm-up Interrupt Flag Set</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IFC</name>
|
|
<description>Interrupt Flag Clear Register</description>
|
|
<addressOffset>0x018</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000003</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>EDGE</name>
|
|
<description>Edge Triggered Interrupt Flag Clear</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>WARMUP</name>
|
|
<description>Warm-up Interrupt Flag Clear</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>ROUTE</name>
|
|
<description>I/O Routing Register</description>
|
|
<addressOffset>0x01C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000301</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>ACMPPEN</name>
|
|
<description>ACMP Output Pin Enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>LOCATION</name>
|
|
<description>I/O Location</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>LOC0</name>
|
|
<description>Location 0</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>LOC1</name>
|
|
<description>Location 1</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>ACMP1</name>
|
|
<description>ACMP1</description>
|
|
<baseAddress>0x40001400</baseAddress>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x00000400</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<interrupt>
|
|
<name>ACMP0</name>
|
|
<value>5</value>
|
|
</interrupt>
|
|
<registers>
|
|
<register>
|
|
<name>CTRL</name>
|
|
<description>Control Register</description>
|
|
<addressOffset>0x000</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x47000000</resetValue>
|
|
<resetMask>0xCF03077F</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>EN</name>
|
|
<description>Analog Comparator Enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>MUXEN</name>
|
|
<description>Input Mux Enable</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>INACTVAL</name>
|
|
<description>Inactive Value</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>GPIOINV</name>
|
|
<description>Comparator GPIO Output Invert</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>HYSTSEL</name>
|
|
<description>Hysteresis Select</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>HYST0</name>
|
|
<description>No hysteresis.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>HYST1</name>
|
|
<description>~15 mV hysteresis.</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>HYST2</name>
|
|
<description>~22 mV hysteresis.</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>HYST3</name>
|
|
<description>~29 mV hysteresis.</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>HYST4</name>
|
|
<description>~36 mV hysteresis.</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>HYST5</name>
|
|
<description>~43 mV hysteresis.</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>HYST6</name>
|
|
<description>~50 mV hysteresis.</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>HYST7</name>
|
|
<description>~57 mV hysteresis.</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>WARMTIME</name>
|
|
<description>Warm-up Time</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>4CYCLES</name>
|
|
<description>4 HFPERCLK cycles.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>8CYCLES</name>
|
|
<description>8 HFPERCLK cycles.</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>16CYCLES</name>
|
|
<description>16 HFPERCLK cycles.</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>32CYCLES</name>
|
|
<description>32 HFPERCLK cycles.</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>64CYCLES</name>
|
|
<description>64 HFPERCLK cycles.</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>128CYCLES</name>
|
|
<description>128 HFPERCLK cycles.</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>256CYCLES</name>
|
|
<description>256 HFPERCLK cycles.</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>512CYCLES</name>
|
|
<description>512 HFPERCLK cycles.</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>IRISE</name>
|
|
<description>Rising Edge Interrupt Sense</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>IFALL</name>
|
|
<description>Falling Edge Interrupt Sense</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>BIASPROG</name>
|
|
<description>Bias Configuration</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>HALFBIAS</name>
|
|
<description>Half Bias Current</description>
|
|
<bitOffset>30</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>FULLBIAS</name>
|
|
<description>Full Bias Current</description>
|
|
<bitOffset>31</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>INPUTSEL</name>
|
|
<description>Input Selection Register</description>
|
|
<addressOffset>0x004</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00010080</resetValue>
|
|
<resetMask>0x31013FF7</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>POSSEL</name>
|
|
<description>Positive Input Select</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>CH0</name>
|
|
<description>Channel 0 as positive input.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>CH1</name>
|
|
<description>Channel 1 as positive input.</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>CH2</name>
|
|
<description>Channel 2 as positive input.</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>CH3</name>
|
|
<description>Channel 3 as positive input.</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>CH4</name>
|
|
<description>Channel 4 as positive input.</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>CH5</name>
|
|
<description>Channel 5 as positive input.</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>CH6</name>
|
|
<description>Channel 6 as positive input.</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>CH7</name>
|
|
<description>Channel 7 as positive input.</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>NEGSEL</name>
|
|
<description>Negative Input Select</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>CH0</name>
|
|
<description>Channel 0 as negative input.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>CH1</name>
|
|
<description>Channel 1 as negative input.</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>CH2</name>
|
|
<description>Channel 2 as negative input.</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>CH3</name>
|
|
<description>Channel 3 as negative input.</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>CH4</name>
|
|
<description>Channel 4 as negative input.</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>CH5</name>
|
|
<description>Channel 5 as negative input.</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>CH6</name>
|
|
<description>Channel 6 as negative input.</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>CH7</name>
|
|
<description>Channel 7 as negative input.</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>1V25</name>
|
|
<description>1.25 V as negative input.</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>2V5</name>
|
|
<description>2.5 V as negative input.</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>VDD</name>
|
|
<description>Scaled VDD as negative input.</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>CAPSENSE</name>
|
|
<description>Capacitive sense mode.</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>VDDLEVEL</name>
|
|
<description>VDD Reference Level</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>6</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>LPREF</name>
|
|
<description>Low Power Reference Mode</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CSRESEN</name>
|
|
<description>Capacitive Sense Mode Internal Resistor Enable</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CSRESSEL</name>
|
|
<description>Capacitive Sense Mode Internal Resistor Select</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>RES0</name>
|
|
<description>Internal capacitive sense resistor value 0.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>RES1</name>
|
|
<description>Internal capacitive sense resistor value 1.</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>RES2</name>
|
|
<description>Internal capacitive sense resistor value 2.</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>RES3</name>
|
|
<description>Internal capacitive sense resistor value 3.</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>STATUS</name>
|
|
<description>Status Register</description>
|
|
<addressOffset>0x008</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000003</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>ACMPACT</name>
|
|
<description>Analog Comparator Active</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>ACMPOUT</name>
|
|
<description>Analog Comparator Output</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IEN</name>
|
|
<description>Interrupt Enable Register</description>
|
|
<addressOffset>0x00C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000003</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>EDGE</name>
|
|
<description>Edge Trigger Interrupt Enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>WARMUP</name>
|
|
<description>Warm-up Interrupt Enable</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IF</name>
|
|
<description>Interrupt Flag Register</description>
|
|
<addressOffset>0x010</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000003</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>EDGE</name>
|
|
<description>Edge Triggered Interrupt Flag</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>WARMUP</name>
|
|
<description>Warm-up Interrupt Flag</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IFS</name>
|
|
<description>Interrupt Flag Set Register</description>
|
|
<addressOffset>0x014</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000003</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>EDGE</name>
|
|
<description>Edge Triggered Interrupt Flag Set</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>WARMUP</name>
|
|
<description>Warm-up Interrupt Flag Set</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IFC</name>
|
|
<description>Interrupt Flag Clear Register</description>
|
|
<addressOffset>0x018</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000003</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>EDGE</name>
|
|
<description>Edge Triggered Interrupt Flag Clear</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>WARMUP</name>
|
|
<description>Warm-up Interrupt Flag Clear</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>ROUTE</name>
|
|
<description>I/O Routing Register</description>
|
|
<addressOffset>0x01C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000301</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>ACMPPEN</name>
|
|
<description>ACMP Output Pin Enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>LOCATION</name>
|
|
<description>I/O Location</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>LOC0</name>
|
|
<description>Location 0</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>LOC1</name>
|
|
<description>Location 1</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>PRS</name>
|
|
<description>PRS</description>
|
|
<baseAddress>0x400CC000</baseAddress>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x00000400</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<registers>
|
|
<register>
|
|
<name>SWPULSE</name>
|
|
<description>Software Pulse Register</description>
|
|
<addressOffset>0x000</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x000000FF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>CH0PULSE</name>
|
|
<description>Channel 0 Pulse Generation</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH1PULSE</name>
|
|
<description>Channel 1 Pulse Generation</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH2PULSE</name>
|
|
<description>Channel 2 Pulse Generation</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH3PULSE</name>
|
|
<description>Channel 3 Pulse Generation</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH4PULSE</name>
|
|
<description>Channel 4 Pulse Generation</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH5PULSE</name>
|
|
<description>Channel 5 Pulse Generation</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH6PULSE</name>
|
|
<description>Channel 6 Pulse Generation</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH7PULSE</name>
|
|
<description>Channel 7 Pulse Generation</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SWLEVEL</name>
|
|
<description>Software Level Register</description>
|
|
<addressOffset>0x004</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x000000FF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>CH0LEVEL</name>
|
|
<description>Channel 0 Software Level</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CH1LEVEL</name>
|
|
<description>Channel 1 Software Level</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CH2LEVEL</name>
|
|
<description>Channel 2 Software Level</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CH3LEVEL</name>
|
|
<description>Channel 3 Software Level</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CH4LEVEL</name>
|
|
<description>Channel 4 Software Level</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CH5LEVEL</name>
|
|
<description>Channel 5 Software Level</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CH6LEVEL</name>
|
|
<description>Channel 6 Software Level</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CH7LEVEL</name>
|
|
<description>Channel 7 Software Level</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CH0_CTRL</name>
|
|
<description>Channel Control Register</description>
|
|
<addressOffset>0x010</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x033F0007</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>SIGSEL</name>
|
|
<description>Signal Select</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>SOURCESEL</name>
|
|
<description>Source Select</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>6</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>NONE</name>
|
|
<description>No source selected</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>VCMP</name>
|
|
<description>Voltage Comparator</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>ACMP0</name>
|
|
<description>Analog Comparator 0</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>ACMP1</name>
|
|
<description>Analog Comparator 1</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DAC0</name>
|
|
<description>Digital to Analog Converter 0</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>ADC0</name>
|
|
<description>Analog to Digital Converter 0</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>USART0</name>
|
|
<description>Universal Synchronous/Asynchronous Receiver/Transmitter 0</description>
|
|
<value>0x00000010</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>USART1</name>
|
|
<description>Universal Synchronous/Asynchronous Receiver/Transmitter 1</description>
|
|
<value>0x00000011</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>USART2</name>
|
|
<description>Universal Synchronous/Asynchronous Receiver/Transmitter 2</description>
|
|
<value>0x00000012</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TIMER0</name>
|
|
<description>Timer 0</description>
|
|
<value>0x0000001C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TIMER1</name>
|
|
<description>Timer 1</description>
|
|
<value>0x0000001D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TIMER2</name>
|
|
<description>Timer 2</description>
|
|
<value>0x0000001E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>RTC</name>
|
|
<description>Real-Time Counter</description>
|
|
<value>0x00000028</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>GPIOL</name>
|
|
<description>General purpose Input/Output</description>
|
|
<value>0x00000030</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>GPIOH</name>
|
|
<description>General purpose Input/Output</description>
|
|
<value>0x00000031</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>EDSEL</name>
|
|
<description>Edge Detect Select</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>OFF</name>
|
|
<description>Signal is left as it is</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>POSEDGE</name>
|
|
<description>A one HFPERCLK cycle pulse is generated for every positive edge of the incoming signal</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>NEGEDGE</name>
|
|
<description>A one HFPERCLK clock cycle pulse is generated for every negative edge of the incoming signal</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>BOTHEDGES</name>
|
|
<description>A one HFPERCLK clock cycle pulse is generated for every edge of the incoming signal</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CH1_CTRL</name>
|
|
<description>Channel Control Register</description>
|
|
<addressOffset>0x014</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x033F0007</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>SIGSEL</name>
|
|
<description>Signal Select</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>SOURCESEL</name>
|
|
<description>Source Select</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>6</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>NONE</name>
|
|
<description>No source selected</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>VCMP</name>
|
|
<description>Voltage Comparator</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>ACMP0</name>
|
|
<description>Analog Comparator 0</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>ACMP1</name>
|
|
<description>Analog Comparator 1</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DAC0</name>
|
|
<description>Digital to Analog Converter 0</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>ADC0</name>
|
|
<description>Analog to Digital Converter 0</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>USART0</name>
|
|
<description>Universal Synchronous/Asynchronous Receiver/Transmitter 0</description>
|
|
<value>0x00000010</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>USART1</name>
|
|
<description>Universal Synchronous/Asynchronous Receiver/Transmitter 1</description>
|
|
<value>0x00000011</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>USART2</name>
|
|
<description>Universal Synchronous/Asynchronous Receiver/Transmitter 2</description>
|
|
<value>0x00000012</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TIMER0</name>
|
|
<description>Timer 0</description>
|
|
<value>0x0000001C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TIMER1</name>
|
|
<description>Timer 1</description>
|
|
<value>0x0000001D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TIMER2</name>
|
|
<description>Timer 2</description>
|
|
<value>0x0000001E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>RTC</name>
|
|
<description>Real-Time Counter</description>
|
|
<value>0x00000028</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>GPIOL</name>
|
|
<description>General purpose Input/Output</description>
|
|
<value>0x00000030</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>GPIOH</name>
|
|
<description>General purpose Input/Output</description>
|
|
<value>0x00000031</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>EDSEL</name>
|
|
<description>Edge Detect Select</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>OFF</name>
|
|
<description>Signal is left as it is</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>POSEDGE</name>
|
|
<description>A one HFPERCLK cycle pulse is generated for every positive edge of the incoming signal</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>NEGEDGE</name>
|
|
<description>A one HFPERCLK clock cycle pulse is generated for every negative edge of the incoming signal</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>BOTHEDGES</name>
|
|
<description>A one HFPERCLK clock cycle pulse is generated for every edge of the incoming signal</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CH2_CTRL</name>
|
|
<description>Channel Control Register</description>
|
|
<addressOffset>0x018</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x033F0007</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>SIGSEL</name>
|
|
<description>Signal Select</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>SOURCESEL</name>
|
|
<description>Source Select</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>6</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>NONE</name>
|
|
<description>No source selected</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>VCMP</name>
|
|
<description>Voltage Comparator</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>ACMP0</name>
|
|
<description>Analog Comparator 0</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>ACMP1</name>
|
|
<description>Analog Comparator 1</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DAC0</name>
|
|
<description>Digital to Analog Converter 0</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>ADC0</name>
|
|
<description>Analog to Digital Converter 0</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>USART0</name>
|
|
<description>Universal Synchronous/Asynchronous Receiver/Transmitter 0</description>
|
|
<value>0x00000010</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>USART1</name>
|
|
<description>Universal Synchronous/Asynchronous Receiver/Transmitter 1</description>
|
|
<value>0x00000011</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>USART2</name>
|
|
<description>Universal Synchronous/Asynchronous Receiver/Transmitter 2</description>
|
|
<value>0x00000012</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TIMER0</name>
|
|
<description>Timer 0</description>
|
|
<value>0x0000001C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TIMER1</name>
|
|
<description>Timer 1</description>
|
|
<value>0x0000001D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TIMER2</name>
|
|
<description>Timer 2</description>
|
|
<value>0x0000001E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>RTC</name>
|
|
<description>Real-Time Counter</description>
|
|
<value>0x00000028</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>GPIOL</name>
|
|
<description>General purpose Input/Output</description>
|
|
<value>0x00000030</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>GPIOH</name>
|
|
<description>General purpose Input/Output</description>
|
|
<value>0x00000031</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>EDSEL</name>
|
|
<description>Edge Detect Select</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>OFF</name>
|
|
<description>Signal is left as it is</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>POSEDGE</name>
|
|
<description>A one HFPERCLK cycle pulse is generated for every positive edge of the incoming signal</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>NEGEDGE</name>
|
|
<description>A one HFPERCLK clock cycle pulse is generated for every negative edge of the incoming signal</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>BOTHEDGES</name>
|
|
<description>A one HFPERCLK clock cycle pulse is generated for every edge of the incoming signal</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CH3_CTRL</name>
|
|
<description>Channel Control Register</description>
|
|
<addressOffset>0x01C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x033F0007</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>SIGSEL</name>
|
|
<description>Signal Select</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>SOURCESEL</name>
|
|
<description>Source Select</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>6</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>NONE</name>
|
|
<description>No source selected</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>VCMP</name>
|
|
<description>Voltage Comparator</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>ACMP0</name>
|
|
<description>Analog Comparator 0</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>ACMP1</name>
|
|
<description>Analog Comparator 1</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DAC0</name>
|
|
<description>Digital to Analog Converter 0</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>ADC0</name>
|
|
<description>Analog to Digital Converter 0</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>USART0</name>
|
|
<description>Universal Synchronous/Asynchronous Receiver/Transmitter 0</description>
|
|
<value>0x00000010</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>USART1</name>
|
|
<description>Universal Synchronous/Asynchronous Receiver/Transmitter 1</description>
|
|
<value>0x00000011</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>USART2</name>
|
|
<description>Universal Synchronous/Asynchronous Receiver/Transmitter 2</description>
|
|
<value>0x00000012</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TIMER0</name>
|
|
<description>Timer 0</description>
|
|
<value>0x0000001C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TIMER1</name>
|
|
<description>Timer 1</description>
|
|
<value>0x0000001D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TIMER2</name>
|
|
<description>Timer 2</description>
|
|
<value>0x0000001E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>RTC</name>
|
|
<description>Real-Time Counter</description>
|
|
<value>0x00000028</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>GPIOL</name>
|
|
<description>General purpose Input/Output</description>
|
|
<value>0x00000030</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>GPIOH</name>
|
|
<description>General purpose Input/Output</description>
|
|
<value>0x00000031</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>EDSEL</name>
|
|
<description>Edge Detect Select</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>OFF</name>
|
|
<description>Signal is left as it is</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>POSEDGE</name>
|
|
<description>A one HFPERCLK cycle pulse is generated for every positive edge of the incoming signal</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>NEGEDGE</name>
|
|
<description>A one HFPERCLK clock cycle pulse is generated for every negative edge of the incoming signal</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>BOTHEDGES</name>
|
|
<description>A one HFPERCLK clock cycle pulse is generated for every edge of the incoming signal</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CH4_CTRL</name>
|
|
<description>Channel Control Register</description>
|
|
<addressOffset>0x020</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x033F0007</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>SIGSEL</name>
|
|
<description>Signal Select</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>SOURCESEL</name>
|
|
<description>Source Select</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>6</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>NONE</name>
|
|
<description>No source selected</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>VCMP</name>
|
|
<description>Voltage Comparator</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>ACMP0</name>
|
|
<description>Analog Comparator 0</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>ACMP1</name>
|
|
<description>Analog Comparator 1</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DAC0</name>
|
|
<description>Digital to Analog Converter 0</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>ADC0</name>
|
|
<description>Analog to Digital Converter 0</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>USART0</name>
|
|
<description>Universal Synchronous/Asynchronous Receiver/Transmitter 0</description>
|
|
<value>0x00000010</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>USART1</name>
|
|
<description>Universal Synchronous/Asynchronous Receiver/Transmitter 1</description>
|
|
<value>0x00000011</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>USART2</name>
|
|
<description>Universal Synchronous/Asynchronous Receiver/Transmitter 2</description>
|
|
<value>0x00000012</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TIMER0</name>
|
|
<description>Timer 0</description>
|
|
<value>0x0000001C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TIMER1</name>
|
|
<description>Timer 1</description>
|
|
<value>0x0000001D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TIMER2</name>
|
|
<description>Timer 2</description>
|
|
<value>0x0000001E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>RTC</name>
|
|
<description>Real-Time Counter</description>
|
|
<value>0x00000028</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>GPIOL</name>
|
|
<description>General purpose Input/Output</description>
|
|
<value>0x00000030</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>GPIOH</name>
|
|
<description>General purpose Input/Output</description>
|
|
<value>0x00000031</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>EDSEL</name>
|
|
<description>Edge Detect Select</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>OFF</name>
|
|
<description>Signal is left as it is</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>POSEDGE</name>
|
|
<description>A one HFPERCLK cycle pulse is generated for every positive edge of the incoming signal</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>NEGEDGE</name>
|
|
<description>A one HFPERCLK clock cycle pulse is generated for every negative edge of the incoming signal</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>BOTHEDGES</name>
|
|
<description>A one HFPERCLK clock cycle pulse is generated for every edge of the incoming signal</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CH5_CTRL</name>
|
|
<description>Channel Control Register</description>
|
|
<addressOffset>0x024</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x033F0007</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>SIGSEL</name>
|
|
<description>Signal Select</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>SOURCESEL</name>
|
|
<description>Source Select</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>6</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>NONE</name>
|
|
<description>No source selected</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>VCMP</name>
|
|
<description>Voltage Comparator</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>ACMP0</name>
|
|
<description>Analog Comparator 0</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>ACMP1</name>
|
|
<description>Analog Comparator 1</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DAC0</name>
|
|
<description>Digital to Analog Converter 0</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>ADC0</name>
|
|
<description>Analog to Digital Converter 0</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>USART0</name>
|
|
<description>Universal Synchronous/Asynchronous Receiver/Transmitter 0</description>
|
|
<value>0x00000010</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>USART1</name>
|
|
<description>Universal Synchronous/Asynchronous Receiver/Transmitter 1</description>
|
|
<value>0x00000011</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>USART2</name>
|
|
<description>Universal Synchronous/Asynchronous Receiver/Transmitter 2</description>
|
|
<value>0x00000012</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TIMER0</name>
|
|
<description>Timer 0</description>
|
|
<value>0x0000001C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TIMER1</name>
|
|
<description>Timer 1</description>
|
|
<value>0x0000001D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TIMER2</name>
|
|
<description>Timer 2</description>
|
|
<value>0x0000001E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>RTC</name>
|
|
<description>Real-Time Counter</description>
|
|
<value>0x00000028</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>GPIOL</name>
|
|
<description>General purpose Input/Output</description>
|
|
<value>0x00000030</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>GPIOH</name>
|
|
<description>General purpose Input/Output</description>
|
|
<value>0x00000031</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>EDSEL</name>
|
|
<description>Edge Detect Select</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>OFF</name>
|
|
<description>Signal is left as it is</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>POSEDGE</name>
|
|
<description>A one HFPERCLK cycle pulse is generated for every positive edge of the incoming signal</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>NEGEDGE</name>
|
|
<description>A one HFPERCLK clock cycle pulse is generated for every negative edge of the incoming signal</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>BOTHEDGES</name>
|
|
<description>A one HFPERCLK clock cycle pulse is generated for every edge of the incoming signal</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CH6_CTRL</name>
|
|
<description>Channel Control Register</description>
|
|
<addressOffset>0x028</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x033F0007</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>SIGSEL</name>
|
|
<description>Signal Select</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>SOURCESEL</name>
|
|
<description>Source Select</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>6</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>NONE</name>
|
|
<description>No source selected</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>VCMP</name>
|
|
<description>Voltage Comparator</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>ACMP0</name>
|
|
<description>Analog Comparator 0</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>ACMP1</name>
|
|
<description>Analog Comparator 1</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DAC0</name>
|
|
<description>Digital to Analog Converter 0</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>ADC0</name>
|
|
<description>Analog to Digital Converter 0</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>USART0</name>
|
|
<description>Universal Synchronous/Asynchronous Receiver/Transmitter 0</description>
|
|
<value>0x00000010</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>USART1</name>
|
|
<description>Universal Synchronous/Asynchronous Receiver/Transmitter 1</description>
|
|
<value>0x00000011</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>USART2</name>
|
|
<description>Universal Synchronous/Asynchronous Receiver/Transmitter 2</description>
|
|
<value>0x00000012</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TIMER0</name>
|
|
<description>Timer 0</description>
|
|
<value>0x0000001C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TIMER1</name>
|
|
<description>Timer 1</description>
|
|
<value>0x0000001D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TIMER2</name>
|
|
<description>Timer 2</description>
|
|
<value>0x0000001E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>RTC</name>
|
|
<description>Real-Time Counter</description>
|
|
<value>0x00000028</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>GPIOL</name>
|
|
<description>General purpose Input/Output</description>
|
|
<value>0x00000030</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>GPIOH</name>
|
|
<description>General purpose Input/Output</description>
|
|
<value>0x00000031</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>EDSEL</name>
|
|
<description>Edge Detect Select</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>OFF</name>
|
|
<description>Signal is left as it is</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>POSEDGE</name>
|
|
<description>A one HFPERCLK cycle pulse is generated for every positive edge of the incoming signal</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>NEGEDGE</name>
|
|
<description>A one HFPERCLK clock cycle pulse is generated for every negative edge of the incoming signal</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>BOTHEDGES</name>
|
|
<description>A one HFPERCLK clock cycle pulse is generated for every edge of the incoming signal</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CH7_CTRL</name>
|
|
<description>Channel Control Register</description>
|
|
<addressOffset>0x02C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x033F0007</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>SIGSEL</name>
|
|
<description>Signal Select</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>SOURCESEL</name>
|
|
<description>Source Select</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>6</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>NONE</name>
|
|
<description>No source selected</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>VCMP</name>
|
|
<description>Voltage Comparator</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>ACMP0</name>
|
|
<description>Analog Comparator 0</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>ACMP1</name>
|
|
<description>Analog Comparator 1</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DAC0</name>
|
|
<description>Digital to Analog Converter 0</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>ADC0</name>
|
|
<description>Analog to Digital Converter 0</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>USART0</name>
|
|
<description>Universal Synchronous/Asynchronous Receiver/Transmitter 0</description>
|
|
<value>0x00000010</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>USART1</name>
|
|
<description>Universal Synchronous/Asynchronous Receiver/Transmitter 1</description>
|
|
<value>0x00000011</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>USART2</name>
|
|
<description>Universal Synchronous/Asynchronous Receiver/Transmitter 2</description>
|
|
<value>0x00000012</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TIMER0</name>
|
|
<description>Timer 0</description>
|
|
<value>0x0000001C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TIMER1</name>
|
|
<description>Timer 1</description>
|
|
<value>0x0000001D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TIMER2</name>
|
|
<description>Timer 2</description>
|
|
<value>0x0000001E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>RTC</name>
|
|
<description>Real-Time Counter</description>
|
|
<value>0x00000028</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>GPIOL</name>
|
|
<description>General purpose Input/Output</description>
|
|
<value>0x00000030</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>GPIOH</name>
|
|
<description>General purpose Input/Output</description>
|
|
<value>0x00000031</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>EDSEL</name>
|
|
<description>Edge Detect Select</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>OFF</name>
|
|
<description>Signal is left as it is</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>POSEDGE</name>
|
|
<description>A one HFPERCLK cycle pulse is generated for every positive edge of the incoming signal</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>NEGEDGE</name>
|
|
<description>A one HFPERCLK clock cycle pulse is generated for every negative edge of the incoming signal</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>BOTHEDGES</name>
|
|
<description>A one HFPERCLK clock cycle pulse is generated for every edge of the incoming signal</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>DAC0</name>
|
|
<description>DAC0</description>
|
|
<baseAddress>0x40004000</baseAddress>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x00000400</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<interrupt>
|
|
<name>DAC0</name>
|
|
<value>7</value>
|
|
</interrupt>
|
|
<registers>
|
|
<register>
|
|
<name>CTRL</name>
|
|
<description>Control Register</description>
|
|
<addressOffset>0x000</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000010</resetValue>
|
|
<resetMask>0x003703FF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>DIFF</name>
|
|
<description>Differential Mode</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>SINEMODE</name>
|
|
<description>Sine Mode</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CONVMODE</name>
|
|
<description>Conversion Mode</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>CONTINUOUS</name>
|
|
<description>DAC is set in continuous mode</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>SAMPLEHOLD</name>
|
|
<description>DAC is set in sample/hold mode</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>SAMPLEOFF</name>
|
|
<description>DAC is set in sample/shut off mode</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>OUTMODE</name>
|
|
<description>Output Mode</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLE</name>
|
|
<description>DAC output to pin and ADC disabled</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PIN</name>
|
|
<description>DAC output to pin enabled. DAC output to ADC disabled</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>ADC</name>
|
|
<description>DAC output to pin disabled. DAC output to ADC enabled</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PINADC</name>
|
|
<description>DAC output to pin and ADC enabled</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>OUTENPRS</name>
|
|
<description>PRS Controlled Output Enable</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CH0PRESCRST</name>
|
|
<description>Channel 0 Start Reset Prescaler</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>REFSEL</name>
|
|
<description>Reference Selection</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>1V25</name>
|
|
<description>Internal 1.25 V bandgap reference</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>2V5</name>
|
|
<description>Internal 2.5 V bandgap reference</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>VDD</name>
|
|
<description>VDD reference</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>PRESC</name>
|
|
<description>Prescaler Setting</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>NODIVISION</name>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>REFRSEL</name>
|
|
<description>Refresh Interval Select</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>8CYCLES</name>
|
|
<description>All channels with enabled refresh are refreshed every 8 prescaled cycles</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>16CYCLES</name>
|
|
<description>All channels with enabled refresh are refreshed every 16 prescaled cycles</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>32CYCLES</name>
|
|
<description>All channels with enabled refresh are refreshed every 32 prescaled cycles</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>64CYCLES</name>
|
|
<description>All channels with enabled refresh are refreshed every 64 prescaled cycles</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>STATUS</name>
|
|
<description>Status Register</description>
|
|
<addressOffset>0x004</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000003</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>CH0DV</name>
|
|
<description>Channel 0 Data Valid</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH1DV</name>
|
|
<description>Channel 1 Data Valid</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CH0CTRL</name>
|
|
<description>Channel 0 Control Register</description>
|
|
<addressOffset>0x008</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000077</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>EN</name>
|
|
<description>Channel 0 Enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>REFREN</name>
|
|
<description>Channel 0 Automatic Refresh Enable</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>PRSEN</name>
|
|
<description>Channel 0 PRS Trigger Enable</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>PRSSEL</name>
|
|
<description>Channel 0 PRS Trigger Select</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>PRSCH0</name>
|
|
<description>PRS ch 0 triggers channel 0 conversion.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH1</name>
|
|
<description>PRS ch 1 triggers channel 0 conversion.</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH2</name>
|
|
<description>PRS ch 2 triggers channel 0 conversion.</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH3</name>
|
|
<description>PRS ch 3 triggers channel 0 conversion.</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH4</name>
|
|
<description>PRS ch 4 triggers channel 0 conversion.</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH5</name>
|
|
<description>PRS ch 5 triggers channel 0 conversion.</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH6</name>
|
|
<description>PRS ch 6 triggers channel 0 conversion.</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH7</name>
|
|
<description>PRS ch 7 triggers channel 0 conversion.</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CH1CTRL</name>
|
|
<description>Channel 1 Control Register</description>
|
|
<addressOffset>0x00C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000077</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>EN</name>
|
|
<description>Channel 1 Enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>REFREN</name>
|
|
<description>Channel 1 Automatic Refresh Enable</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>PRSEN</name>
|
|
<description>Channel 1 PRS Trigger Enable</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>PRSSEL</name>
|
|
<description>Channel 1 PRS Trigger Select</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>PRSCH0</name>
|
|
<description>PRS ch 0 triggers channel 1 conversion.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH1</name>
|
|
<description>PRS ch 1 triggers channel 1 conversion.</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH2</name>
|
|
<description>PRS ch 2 triggers channel 1 conversion.</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH3</name>
|
|
<description>PRS ch 3 triggers channel 1 conversion.</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH4</name>
|
|
<description>PRS ch 4 triggers channel 1 conversion.</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH5</name>
|
|
<description>PRS ch 5 triggers channel 1 conversion.</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH6</name>
|
|
<description>PRS ch 6 triggers channel 1 conversion.</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH7</name>
|
|
<description>PRS ch 7 triggers channel 1 conversion.</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IEN</name>
|
|
<description>Interrupt Enable Register</description>
|
|
<addressOffset>0x010</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000033</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>CH0</name>
|
|
<description>Channel 0 Conversion Complete Interrupt Enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CH1</name>
|
|
<description>Channel 1 Conversion Complete Interrupt Enable</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CH0UF</name>
|
|
<description>Channel 0 Conversion Data Underflow Interrupt Enable</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CH1UF</name>
|
|
<description>Channel 1 Conversion Data Underflow Interrupt Enable</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IF</name>
|
|
<description>Interrupt Flag Register</description>
|
|
<addressOffset>0x014</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000033</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>CH0</name>
|
|
<description>Channel 0 Conversion Complete Interrupt Flag</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH1</name>
|
|
<description>Channel 1 Conversion Complete Interrupt Flag</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH0UF</name>
|
|
<description>Channel 0 Data Underflow Interrupt Flag</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH1UF</name>
|
|
<description>Channel 1 Data Underflow Interrupt Flag</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IFS</name>
|
|
<description>Interrupt Flag Set Register</description>
|
|
<addressOffset>0x018</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000033</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>CH0</name>
|
|
<description>Channel 0 Conversion Complete Interrupt Flag Set</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH1</name>
|
|
<description>Channel 1 Conversion Complete Interrupt Flag Set</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH0UF</name>
|
|
<description>Channel 0 Data Underflow Interrupt Flag Set</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH1UF</name>
|
|
<description>Channel 1 Data Underflow Interrupt Flag Set</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IFC</name>
|
|
<description>Interrupt Flag Clear Register</description>
|
|
<addressOffset>0x01C</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000033</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>CH0</name>
|
|
<description>Channel 0 Conversion Complete Interrupt Flag Clear</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH1</name>
|
|
<description>Channel 1 Conversion Complete Interrupt Flag Clear</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH0UF</name>
|
|
<description>Channel 0 Data Underflow Interrupt Flag Clear</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH1UF</name>
|
|
<description>Channel 1 Data Underflow Interrupt Flag Clear</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CH0DATA</name>
|
|
<description>Channel 0 Data Register</description>
|
|
<addressOffset>0x020</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000FFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>DATA</name>
|
|
<description>Channel 0 Data</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>12</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CH1DATA</name>
|
|
<description>Channel 1 Data Register</description>
|
|
<addressOffset>0x024</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000FFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>DATA</name>
|
|
<description>Channel 1 Data</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>12</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>COMBDATA</name>
|
|
<description>Combined Data Register</description>
|
|
<addressOffset>0x028</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0FFF0FFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>CH0DATA</name>
|
|
<description>Channel 0 Data</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>12</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CH1DATA</name>
|
|
<description>Channel 1 Data</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>12</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CAL</name>
|
|
<description>Calibration Register</description>
|
|
<addressOffset>0x02C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00400000</resetValue>
|
|
<resetMask>0x007F3F3F</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>CH0OFFSET</name>
|
|
<description>Channel 0 Offset Calibration Value</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>6</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CH1OFFSET</name>
|
|
<description>Channel 1 Offset Calibration Value</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>6</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>GAIN</name>
|
|
<description>Gain Calibration Value</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>7</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>BIASPROG</name>
|
|
<description>Bias Programming Register</description>
|
|
<addressOffset>0x030</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000047</resetValue>
|
|
<resetMask>0x0000004F</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>BIASPROG</name>
|
|
<description>Bias Programming Value</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>HALFBIAS</name>
|
|
<description>Half Bias Current</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>GPIO</name>
|
|
<description>GPIO</description>
|
|
<baseAddress>0x40006000</baseAddress>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x00001000</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<interrupt>
|
|
<name>GPIO_EVEN</name>
|
|
<value>1</value>
|
|
</interrupt>
|
|
<interrupt>
|
|
<name>GPIO_ODD</name>
|
|
<value>9</value>
|
|
</interrupt>
|
|
<registers>
|
|
<register>
|
|
<name>PA_CTRL</name>
|
|
<description>Port Control Register</description>
|
|
<addressOffset>0x000</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000003</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>DRIVEMODE</name>
|
|
<description>Drive Mode Select</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>STANDARD</name>
|
|
<description>6 mA drive current</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>LOWEST</name>
|
|
<description>0.1 mA drive current</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>HIGH</name>
|
|
<description>20 mA drive current</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>LOW</name>
|
|
<description>1 mA drive current</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PA_MODEL</name>
|
|
<description>Port Pin Mode Low Register</description>
|
|
<addressOffset>0x004</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0xFFFFFFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>MODE0</name>
|
|
<description>Pin 0 Mode</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>MODE1</name>
|
|
<description>Pin 1 Mode</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>MODE2</name>
|
|
<description>Pin 2 Mode</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>MODE3</name>
|
|
<description>Pin 3 Mode</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>MODE4</name>
|
|
<description>Pin 4 Mode</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>MODE5</name>
|
|
<description>Pin 5 Mode</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>MODE6</name>
|
|
<description>Pin 6 Mode</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>MODE7</name>
|
|
<description>Pin 7 Mode</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PA_MODEH</name>
|
|
<description>Port Pin Mode High Register</description>
|
|
<addressOffset>0x008</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0xFFFFFFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>MODE8</name>
|
|
<description>Pin 8 Mode</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>MODE9</name>
|
|
<description>Pin 9 Mode</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>MODE10</name>
|
|
<description>Pin 10 Mode</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>MODE11</name>
|
|
<description>Pin 11 Mode</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>MODE12</name>
|
|
<description>Pin 12 Mode</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>MODE13</name>
|
|
<description>Pin 13 Mode</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>MODE14</name>
|
|
<description>Pin 14 Mode</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>MODE15</name>
|
|
<description>Pin 15 Mode</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PA_DOUT</name>
|
|
<description>Port Data Out Register</description>
|
|
<addressOffset>0x00C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>DOUT</name>
|
|
<description>Data Out</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PA_DOUTSET</name>
|
|
<description>Port Data Out Set Register</description>
|
|
<addressOffset>0x010</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>DOUTSET</name>
|
|
<description>Data Out Set</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PA_DOUTCLR</name>
|
|
<description>Port Data Out Clear Register</description>
|
|
<addressOffset>0x014</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>DOUTCLR</name>
|
|
<description>Data Out Clear</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PA_DOUTTGL</name>
|
|
<description>Port Data Out Toggle Register</description>
|
|
<addressOffset>0x018</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>DOUTTGL</name>
|
|
<description>Data Out Toggle</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PA_DIN</name>
|
|
<description>Port Data In Register</description>
|
|
<addressOffset>0x01C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>DIN</name>
|
|
<description>Data In</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PA_PINLOCKN</name>
|
|
<description>Port Unlocked Pins Register</description>
|
|
<addressOffset>0x020</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000FFFF</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>PINLOCKN</name>
|
|
<description>Unlocked Pins</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PB_CTRL</name>
|
|
<description>Port Control Register</description>
|
|
<addressOffset>0x024</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000003</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>DRIVEMODE</name>
|
|
<description>Drive Mode Select</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>STANDARD</name>
|
|
<description>6 mA drive current</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>LOWEST</name>
|
|
<description>0.1 mA drive current</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>HIGH</name>
|
|
<description>20 mA drive current</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>LOW</name>
|
|
<description>1 mA drive current</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PB_MODEL</name>
|
|
<description>Port Pin Mode Low Register</description>
|
|
<addressOffset>0x028</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0xFFFFFFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>MODE0</name>
|
|
<description>Pin 0 Mode</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>MODE1</name>
|
|
<description>Pin 1 Mode</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>MODE2</name>
|
|
<description>Pin 2 Mode</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>MODE3</name>
|
|
<description>Pin 3 Mode</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>MODE4</name>
|
|
<description>Pin 4 Mode</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>MODE5</name>
|
|
<description>Pin 5 Mode</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>MODE6</name>
|
|
<description>Pin 6 Mode</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>MODE7</name>
|
|
<description>Pin 7 Mode</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PB_MODEH</name>
|
|
<description>Port Pin Mode High Register</description>
|
|
<addressOffset>0x02C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0xFFFFFFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>MODE8</name>
|
|
<description>Pin 8 Mode</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>MODE9</name>
|
|
<description>Pin 9 Mode</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>MODE10</name>
|
|
<description>Pin 10 Mode</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>MODE11</name>
|
|
<description>Pin 11 Mode</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>MODE12</name>
|
|
<description>Pin 12 Mode</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>MODE13</name>
|
|
<description>Pin 13 Mode</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>MODE14</name>
|
|
<description>Pin 14 Mode</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>MODE15</name>
|
|
<description>Pin 15 Mode</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PB_DOUT</name>
|
|
<description>Port Data Out Register</description>
|
|
<addressOffset>0x030</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>DOUT</name>
|
|
<description>Data Out</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PB_DOUTSET</name>
|
|
<description>Port Data Out Set Register</description>
|
|
<addressOffset>0x034</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>DOUTSET</name>
|
|
<description>Data Out Set</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PB_DOUTCLR</name>
|
|
<description>Port Data Out Clear Register</description>
|
|
<addressOffset>0x038</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>DOUTCLR</name>
|
|
<description>Data Out Clear</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PB_DOUTTGL</name>
|
|
<description>Port Data Out Toggle Register</description>
|
|
<addressOffset>0x03C</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>DOUTTGL</name>
|
|
<description>Data Out Toggle</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PB_DIN</name>
|
|
<description>Port Data In Register</description>
|
|
<addressOffset>0x040</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>DIN</name>
|
|
<description>Data In</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PB_PINLOCKN</name>
|
|
<description>Port Unlocked Pins Register</description>
|
|
<addressOffset>0x044</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000FFFF</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>PINLOCKN</name>
|
|
<description>Unlocked Pins</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PC_CTRL</name>
|
|
<description>Port Control Register</description>
|
|
<addressOffset>0x048</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000003</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>DRIVEMODE</name>
|
|
<description>Drive Mode Select</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>STANDARD</name>
|
|
<description>6 mA drive current</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>LOWEST</name>
|
|
<description>0.1 mA drive current</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>HIGH</name>
|
|
<description>20 mA drive current</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>LOW</name>
|
|
<description>1 mA drive current</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PC_MODEL</name>
|
|
<description>Port Pin Mode Low Register</description>
|
|
<addressOffset>0x04C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0xFFFFFFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>MODE0</name>
|
|
<description>Pin 0 Mode</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>MODE1</name>
|
|
<description>Pin 1 Mode</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>MODE2</name>
|
|
<description>Pin 2 Mode</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>MODE3</name>
|
|
<description>Pin 3 Mode</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>MODE4</name>
|
|
<description>Pin 4 Mode</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>MODE5</name>
|
|
<description>Pin 5 Mode</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>MODE6</name>
|
|
<description>Pin 6 Mode</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>MODE7</name>
|
|
<description>Pin 7 Mode</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PC_MODEH</name>
|
|
<description>Port Pin Mode High Register</description>
|
|
<addressOffset>0x050</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0xFFFFFFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>MODE8</name>
|
|
<description>Pin 8 Mode</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>MODE9</name>
|
|
<description>Pin 9 Mode</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>MODE10</name>
|
|
<description>Pin 10 Mode</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>MODE11</name>
|
|
<description>Pin 11 Mode</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>MODE12</name>
|
|
<description>Pin 12 Mode</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>MODE13</name>
|
|
<description>Pin 13 Mode</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>MODE14</name>
|
|
<description>Pin 14 Mode</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>MODE15</name>
|
|
<description>Pin 15 Mode</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PC_DOUT</name>
|
|
<description>Port Data Out Register</description>
|
|
<addressOffset>0x054</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>DOUT</name>
|
|
<description>Data Out</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PC_DOUTSET</name>
|
|
<description>Port Data Out Set Register</description>
|
|
<addressOffset>0x058</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>DOUTSET</name>
|
|
<description>Data Out Set</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PC_DOUTCLR</name>
|
|
<description>Port Data Out Clear Register</description>
|
|
<addressOffset>0x05C</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>DOUTCLR</name>
|
|
<description>Data Out Clear</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PC_DOUTTGL</name>
|
|
<description>Port Data Out Toggle Register</description>
|
|
<addressOffset>0x060</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>DOUTTGL</name>
|
|
<description>Data Out Toggle</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PC_DIN</name>
|
|
<description>Port Data In Register</description>
|
|
<addressOffset>0x064</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>DIN</name>
|
|
<description>Data In</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PC_PINLOCKN</name>
|
|
<description>Port Unlocked Pins Register</description>
|
|
<addressOffset>0x068</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000FFFF</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>PINLOCKN</name>
|
|
<description>Unlocked Pins</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PD_CTRL</name>
|
|
<description>Port Control Register</description>
|
|
<addressOffset>0x06C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000003</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>DRIVEMODE</name>
|
|
<description>Drive Mode Select</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>STANDARD</name>
|
|
<description>6 mA drive current</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>LOWEST</name>
|
|
<description>0.1 mA drive current</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>HIGH</name>
|
|
<description>20 mA drive current</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>LOW</name>
|
|
<description>1 mA drive current</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PD_MODEL</name>
|
|
<description>Port Pin Mode Low Register</description>
|
|
<addressOffset>0x070</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0xFFFFFFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>MODE0</name>
|
|
<description>Pin 0 Mode</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>MODE1</name>
|
|
<description>Pin 1 Mode</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>MODE2</name>
|
|
<description>Pin 2 Mode</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>MODE3</name>
|
|
<description>Pin 3 Mode</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>MODE4</name>
|
|
<description>Pin 4 Mode</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>MODE5</name>
|
|
<description>Pin 5 Mode</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>MODE6</name>
|
|
<description>Pin 6 Mode</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>MODE7</name>
|
|
<description>Pin 7 Mode</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PD_MODEH</name>
|
|
<description>Port Pin Mode High Register</description>
|
|
<addressOffset>0x074</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0xFFFFFFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>MODE8</name>
|
|
<description>Pin 8 Mode</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>MODE9</name>
|
|
<description>Pin 9 Mode</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>MODE10</name>
|
|
<description>Pin 10 Mode</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>MODE11</name>
|
|
<description>Pin 11 Mode</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>MODE12</name>
|
|
<description>Pin 12 Mode</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>MODE13</name>
|
|
<description>Pin 13 Mode</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>MODE14</name>
|
|
<description>Pin 14 Mode</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>MODE15</name>
|
|
<description>Pin 15 Mode</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PD_DOUT</name>
|
|
<description>Port Data Out Register</description>
|
|
<addressOffset>0x078</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>DOUT</name>
|
|
<description>Data Out</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PD_DOUTSET</name>
|
|
<description>Port Data Out Set Register</description>
|
|
<addressOffset>0x07C</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>DOUTSET</name>
|
|
<description>Data Out Set</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PD_DOUTCLR</name>
|
|
<description>Port Data Out Clear Register</description>
|
|
<addressOffset>0x080</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>DOUTCLR</name>
|
|
<description>Data Out Clear</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PD_DOUTTGL</name>
|
|
<description>Port Data Out Toggle Register</description>
|
|
<addressOffset>0x084</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>DOUTTGL</name>
|
|
<description>Data Out Toggle</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PD_DIN</name>
|
|
<description>Port Data In Register</description>
|
|
<addressOffset>0x088</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>DIN</name>
|
|
<description>Data In</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PD_PINLOCKN</name>
|
|
<description>Port Unlocked Pins Register</description>
|
|
<addressOffset>0x08C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000FFFF</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>PINLOCKN</name>
|
|
<description>Unlocked Pins</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PE_CTRL</name>
|
|
<description>Port Control Register</description>
|
|
<addressOffset>0x090</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000003</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>DRIVEMODE</name>
|
|
<description>Drive Mode Select</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>STANDARD</name>
|
|
<description>6 mA drive current</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>LOWEST</name>
|
|
<description>0.1 mA drive current</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>HIGH</name>
|
|
<description>20 mA drive current</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>LOW</name>
|
|
<description>1 mA drive current</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PE_MODEL</name>
|
|
<description>Port Pin Mode Low Register</description>
|
|
<addressOffset>0x094</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0xFFFFFFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>MODE0</name>
|
|
<description>Pin 0 Mode</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>MODE1</name>
|
|
<description>Pin 1 Mode</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>MODE2</name>
|
|
<description>Pin 2 Mode</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>MODE3</name>
|
|
<description>Pin 3 Mode</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>MODE4</name>
|
|
<description>Pin 4 Mode</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>MODE5</name>
|
|
<description>Pin 5 Mode</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>MODE6</name>
|
|
<description>Pin 6 Mode</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>MODE7</name>
|
|
<description>Pin 7 Mode</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PE_MODEH</name>
|
|
<description>Port Pin Mode High Register</description>
|
|
<addressOffset>0x098</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0xFFFFFFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>MODE8</name>
|
|
<description>Pin 8 Mode</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>MODE9</name>
|
|
<description>Pin 9 Mode</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>MODE10</name>
|
|
<description>Pin 10 Mode</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>MODE11</name>
|
|
<description>Pin 11 Mode</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>MODE12</name>
|
|
<description>Pin 12 Mode</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>MODE13</name>
|
|
<description>Pin 13 Mode</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>MODE14</name>
|
|
<description>Pin 14 Mode</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>MODE15</name>
|
|
<description>Pin 15 Mode</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PE_DOUT</name>
|
|
<description>Port Data Out Register</description>
|
|
<addressOffset>0x09C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>DOUT</name>
|
|
<description>Data Out</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PE_DOUTSET</name>
|
|
<description>Port Data Out Set Register</description>
|
|
<addressOffset>0x0A0</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>DOUTSET</name>
|
|
<description>Data Out Set</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PE_DOUTCLR</name>
|
|
<description>Port Data Out Clear Register</description>
|
|
<addressOffset>0x0A4</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>DOUTCLR</name>
|
|
<description>Data Out Clear</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PE_DOUTTGL</name>
|
|
<description>Port Data Out Toggle Register</description>
|
|
<addressOffset>0x0A8</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>DOUTTGL</name>
|
|
<description>Data Out Toggle</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PE_DIN</name>
|
|
<description>Port Data In Register</description>
|
|
<addressOffset>0x0AC</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>DIN</name>
|
|
<description>Data In</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PE_PINLOCKN</name>
|
|
<description>Port Unlocked Pins Register</description>
|
|
<addressOffset>0x0B0</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000FFFF</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>PINLOCKN</name>
|
|
<description>Unlocked Pins</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PF_CTRL</name>
|
|
<description>Port Control Register</description>
|
|
<addressOffset>0x0B4</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000003</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>DRIVEMODE</name>
|
|
<description>Drive Mode Select</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>STANDARD</name>
|
|
<description>6 mA drive current</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>LOWEST</name>
|
|
<description>0.1 mA drive current</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>HIGH</name>
|
|
<description>20 mA drive current</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>LOW</name>
|
|
<description>1 mA drive current</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PF_MODEL</name>
|
|
<description>Port Pin Mode Low Register</description>
|
|
<addressOffset>0x0B8</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0xFFFFFFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>MODE0</name>
|
|
<description>Pin 0 Mode</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>MODE1</name>
|
|
<description>Pin 1 Mode</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>MODE2</name>
|
|
<description>Pin 2 Mode</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>MODE3</name>
|
|
<description>Pin 3 Mode</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>MODE4</name>
|
|
<description>Pin 4 Mode</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>MODE5</name>
|
|
<description>Pin 5 Mode</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>MODE6</name>
|
|
<description>Pin 6 Mode</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>MODE7</name>
|
|
<description>Pin 7 Mode</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PF_MODEH</name>
|
|
<description>Port Pin Mode High Register</description>
|
|
<addressOffset>0x0BC</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0xFFFFFFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>MODE8</name>
|
|
<description>Pin 8 Mode</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>MODE9</name>
|
|
<description>Pin 9 Mode</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>MODE10</name>
|
|
<description>Pin 10 Mode</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>MODE11</name>
|
|
<description>Pin 11 Mode</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>MODE12</name>
|
|
<description>Pin 12 Mode</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>MODE13</name>
|
|
<description>Pin 13 Mode</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>MODE14</name>
|
|
<description>Pin 14 Mode</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>MODE15</name>
|
|
<description>Pin 15 Mode</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DISABLED</name>
|
|
<description>Input disabled. Pullup if DOUT is set.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUT</name>
|
|
<description>Input enabled. Filter if DOUT is set</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULL</name>
|
|
<description>Input enabled. DOUT determines pull direction</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>INPUTPULLFILTER</name>
|
|
<description>Input enabled with filter. DOUT determines pull direction</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULL</name>
|
|
<description>Push-pull output</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PUSHPULLDRIVE</name>
|
|
<description>Push-pull output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDOR</name>
|
|
<description>Wired-or output</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDORPULLDOWN</name>
|
|
<description>Wired-or output with pull-down</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDAND</name>
|
|
<description>Open-drain output</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDFILTER</name>
|
|
<description>Open-drain output with filter</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUP</name>
|
|
<description>Open-drain output with pullup</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDPULLUPFILTER</name>
|
|
<description>Open-drain output with filter and pullup</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVE</name>
|
|
<description>Open-drain output with drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000C</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEFILTER</name>
|
|
<description>Open-drain output with filter and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000D</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUP</name>
|
|
<description>Open-drain output with pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000E</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WIREDANDDRIVEPULLUPFILTER</name>
|
|
<description>Open-drain output with filter, pullup and drive-strength set by DRIVEMODE</description>
|
|
<value>0x0000000F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PF_DOUT</name>
|
|
<description>Port Data Out Register</description>
|
|
<addressOffset>0x0C0</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>DOUT</name>
|
|
<description>Data Out</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PF_DOUTSET</name>
|
|
<description>Port Data Out Set Register</description>
|
|
<addressOffset>0x0C4</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>DOUTSET</name>
|
|
<description>Data Out Set</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PF_DOUTCLR</name>
|
|
<description>Port Data Out Clear Register</description>
|
|
<addressOffset>0x0C8</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>DOUTCLR</name>
|
|
<description>Data Out Clear</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PF_DOUTTGL</name>
|
|
<description>Port Data Out Toggle Register</description>
|
|
<addressOffset>0x0CC</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>DOUTTGL</name>
|
|
<description>Data Out Toggle</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PF_DIN</name>
|
|
<description>Port Data In Register</description>
|
|
<addressOffset>0x0D0</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>DIN</name>
|
|
<description>Data In</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>PF_PINLOCKN</name>
|
|
<description>Port Unlocked Pins Register</description>
|
|
<addressOffset>0x0D4</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x0000FFFF</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>PINLOCKN</name>
|
|
<description>Unlocked Pins</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>EXTIPSELL</name>
|
|
<description>External Interrupt Port Select Low Register</description>
|
|
<addressOffset>0x100</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x77777777</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>EXTIPSEL0</name>
|
|
<description>External Interrupt 0 Port Select</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>PORTA</name>
|
|
<description>Port A pin 0 selected for external interrupt 0</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PORTB</name>
|
|
<description>Port B pin 0 selected for external interrupt 0</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PORTC</name>
|
|
<description>Port C pin 0 selected for external interrupt 0</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PORTD</name>
|
|
<description>Port D pin 0 selected for external interrupt 0</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PORTE</name>
|
|
<description>Port E pin 0 selected for external interrupt 0</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PORTF</name>
|
|
<description>Port F pin 0 selected for external interrupt 0</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>EXTIPSEL1</name>
|
|
<description>External Interrupt 1 Port Select</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>PORTA</name>
|
|
<description>Port A pin 1 selected for external interrupt 1</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PORTB</name>
|
|
<description>Port B pin 1 selected for external interrupt 1</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PORTC</name>
|
|
<description>Port C pin 1 selected for external interrupt 1</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PORTD</name>
|
|
<description>Port D pin 1 selected for external interrupt 1</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PORTE</name>
|
|
<description>Port E pin 1 selected for external interrupt 1</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PORTF</name>
|
|
<description>Port F pin 1 selected for external interrupt 1</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>EXTIPSEL2</name>
|
|
<description>External Interrupt 2 Port Select</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>PORTA</name>
|
|
<description>Port A pin 2 selected for external interrupt 2</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PORTB</name>
|
|
<description>Port B pin 2 selected for external interrupt 2</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PORTC</name>
|
|
<description>Port C pin 2 selected for external interrupt 2</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PORTD</name>
|
|
<description>Port D pin 2 selected for external interrupt 2</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PORTE</name>
|
|
<description>Port E pin 2 selected for external interrupt 2</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PORTF</name>
|
|
<description>Port F pin 2 selected for external interrupt 2</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>EXTIPSEL3</name>
|
|
<description>External Interrupt 3 Port Select</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>PORTA</name>
|
|
<description>Port A pin 3 selected for external interrupt 3</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PORTB</name>
|
|
<description>Port B pin 3 selected for external interrupt 3</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PORTC</name>
|
|
<description>Port C pin 3 selected for external interrupt 3</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PORTD</name>
|
|
<description>Port D pin 3 selected for external interrupt 3</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PORTE</name>
|
|
<description>Port E pin 3 selected for external interrupt 3</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PORTF</name>
|
|
<description>Port F pin 3 selected for external interrupt 3</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>EXTIPSEL4</name>
|
|
<description>External Interrupt 4 Port Select</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>PORTA</name>
|
|
<description>Port A pin 4 selected for external interrupt 4</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PORTB</name>
|
|
<description>Port B pin 4 selected for external interrupt 4</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PORTC</name>
|
|
<description>Port C pin 4 selected for external interrupt 4</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PORTD</name>
|
|
<description>Port D pin 4 selected for external interrupt 4</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PORTE</name>
|
|
<description>Port E pin 4 selected for external interrupt 4</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PORTF</name>
|
|
<description>Port F pin 4 selected for external interrupt 4</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>EXTIPSEL5</name>
|
|
<description>External Interrupt 5 Port Select</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>PORTA</name>
|
|
<description>Port A pin 5 selected for external interrupt 5</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PORTB</name>
|
|
<description>Port B pin 5 selected for external interrupt 5</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PORTC</name>
|
|
<description>Port C pin 5 selected for external interrupt 5</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PORTD</name>
|
|
<description>Port D pin 5 selected for external interrupt 5</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PORTE</name>
|
|
<description>Port E pin 5 selected for external interrupt 5</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PORTF</name>
|
|
<description>Port F pin 5 selected for external interrupt 5</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>EXTIPSEL6</name>
|
|
<description>External Interrupt 6 Port Select</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>PORTA</name>
|
|
<description>Port A pin 6 selected for external interrupt 6</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PORTB</name>
|
|
<description>Port B pin 6 selected for external interrupt 6</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PORTC</name>
|
|
<description>Port C pin 6 selected for external interrupt 6</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PORTD</name>
|
|
<description>Port D pin 6 selected for external interrupt 6</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PORTE</name>
|
|
<description>Port E pin 6 selected for external interrupt 6</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PORTF</name>
|
|
<description>Port F pin 6 selected for external interrupt 6</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>EXTIPSEL7</name>
|
|
<description>External Interrupt 7 Port Select</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>PORTA</name>
|
|
<description>Port A pin 7 selected for external interrupt 7</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PORTB</name>
|
|
<description>Port B pin 7 selected for external interrupt 7</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PORTC</name>
|
|
<description>Port C pin 7 selected for external interrupt 7</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PORTD</name>
|
|
<description>Port D pin 7 selected for external interrupt 7</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PORTE</name>
|
|
<description>Port E pin 7 selected for external interrupt 7</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PORTF</name>
|
|
<description>Port F pin 7 selected for external interrupt 7</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>EXTIPSELH</name>
|
|
<description>External Interrupt Port Select High Register</description>
|
|
<addressOffset>0x104</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x77777777</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>EXTIPSEL8</name>
|
|
<description>External Interrupt 8 Port Select</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>PORTA</name>
|
|
<description>Port A pin 8 selected for external interrupt 8</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PORTB</name>
|
|
<description>Port B pin 8 selected for external interrupt 8</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PORTC</name>
|
|
<description>Port C pin 8 selected for external interrupt 8</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PORTD</name>
|
|
<description>Port D pin 8 selected for external interrupt 8</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PORTE</name>
|
|
<description>Port E pin 8 selected for external interrupt 8</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PORTF</name>
|
|
<description>Port F pin 8 selected for external interrupt 8</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>EXTIPSEL9</name>
|
|
<description>External Interrupt 9 Port Select</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>PORTA</name>
|
|
<description>Port A pin 9 selected for external interrupt 9</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PORTB</name>
|
|
<description>Port B pin 9 selected for external interrupt 9</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PORTC</name>
|
|
<description>Port C pin 9 selected for external interrupt 9</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PORTD</name>
|
|
<description>Port D pin 9 selected for external interrupt 9</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PORTE</name>
|
|
<description>Port E pin 9 selected for external interrupt 9</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PORTF</name>
|
|
<description>Port F pin 9 selected for external interrupt 9</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>EXTIPSEL10</name>
|
|
<description>External Interrupt 10 Port Select</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>PORTA</name>
|
|
<description>Port A pin 10 selected for external interrupt 10</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PORTB</name>
|
|
<description>Port B pin 10 selected for external interrupt 10</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PORTC</name>
|
|
<description>Port C pin 10 selected for external interrupt 10</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PORTD</name>
|
|
<description>Port D pin 10 selected for external interrupt 10</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PORTE</name>
|
|
<description>Port E pin 10 selected for external interrupt 10</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PORTF</name>
|
|
<description>Port F pin 10 selected for external interrupt 10</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>EXTIPSEL11</name>
|
|
<description>External Interrupt 11 Port Select</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>PORTA</name>
|
|
<description>Port A pin 11 selected for external interrupt 11</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PORTB</name>
|
|
<description>Port B pin 11 selected for external interrupt 11</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PORTC</name>
|
|
<description>Port C pin 11 selected for external interrupt 11</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PORTD</name>
|
|
<description>Port D pin 11 selected for external interrupt 11</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PORTE</name>
|
|
<description>Port E pin 11 selected for external interrupt 11</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PORTF</name>
|
|
<description>Port F pin 11 selected for external interrupt 11</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>EXTIPSEL12</name>
|
|
<description>External Interrupt 12 Port Select</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>PORTA</name>
|
|
<description>Port A pin 12 selected for external interrupt 12</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PORTB</name>
|
|
<description>Port B pin 12 selected for external interrupt 12</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PORTC</name>
|
|
<description>Port C pin 12 selected for external interrupt 12</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PORTD</name>
|
|
<description>Port D pin 12 selected for external interrupt 12</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PORTE</name>
|
|
<description>Port E pin 12 selected for external interrupt 12</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PORTF</name>
|
|
<description>Port F pin 12 selected for external interrupt 12</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>EXTIPSEL13</name>
|
|
<description>External Interrupt 13 Port Select</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>PORTA</name>
|
|
<description>Port A pin 13 selected for external interrupt 13</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PORTB</name>
|
|
<description>Port B pin 13 selected for external interrupt 13</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PORTC</name>
|
|
<description>Port C pin 13 selected for external interrupt 13</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PORTD</name>
|
|
<description>Port D pin 13 selected for external interrupt 13</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PORTE</name>
|
|
<description>Port E pin 13 selected for external interrupt 13</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PORTF</name>
|
|
<description>Port F pin 13 selected for external interrupt 13</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>EXTIPSEL14</name>
|
|
<description>External Interrupt 14 Port Select</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>PORTA</name>
|
|
<description>Port A pin 14 selected for external interrupt 14</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PORTB</name>
|
|
<description>Port B pin 14 selected for external interrupt 14</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PORTC</name>
|
|
<description>Port C pin 14 selected for external interrupt 14</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PORTD</name>
|
|
<description>Port D pin 14 selected for external interrupt 14</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PORTE</name>
|
|
<description>Port E pin 14 selected for external interrupt 14</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PORTF</name>
|
|
<description>Port F pin 14 selected for external interrupt 14</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>EXTIPSEL15</name>
|
|
<description>External Interrupt 15 Port Select</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>PORTA</name>
|
|
<description>Port A pin 15 selected for external interrupt 15</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PORTB</name>
|
|
<description>Port B pin 15 selected for external interrupt 15</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PORTC</name>
|
|
<description>Port C pin 15 selected for external interrupt 15</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PORTD</name>
|
|
<description>Port D pin 15 selected for external interrupt 15</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PORTE</name>
|
|
<description>Port E pin 15 selected for external interrupt 15</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PORTF</name>
|
|
<description>Port F pin 15 selected for external interrupt 15</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>EXTIRISE</name>
|
|
<description>External Interrupt Rising Edge Trigger Register</description>
|
|
<addressOffset>0x108</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>EXTIRISE</name>
|
|
<description>External Interrupt n Rising Edge Trigger Enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>EXTIFALL</name>
|
|
<description>External Interrupt Falling Edge Trigger Register</description>
|
|
<addressOffset>0x10C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>EXTIFALL</name>
|
|
<description>External Interrupt n Falling Edge Trigger Enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IEN</name>
|
|
<description>Interrupt Enable Register</description>
|
|
<addressOffset>0x110</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>EXT</name>
|
|
<description>External Interrupt n Enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IF</name>
|
|
<description>Interrupt Flag Register</description>
|
|
<addressOffset>0x114</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>EXT</name>
|
|
<description>External Interrupt Flag n</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IFS</name>
|
|
<description>Interrupt Flag Set Register</description>
|
|
<addressOffset>0x118</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>EXT</name>
|
|
<description>External Interrupt Flag n Set</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IFC</name>
|
|
<description>Interrupt Flag Clear Register</description>
|
|
<addressOffset>0x11C</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>EXT</name>
|
|
<description>External Interrupt Flag Clear</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>ROUTE</name>
|
|
<description>I/O Routing Register</description>
|
|
<addressOffset>0x120</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000003</resetValue>
|
|
<resetMask>0x00000307</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>SWCLKPEN</name>
|
|
<description>Serial Wire Clock Pin Enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>SWDIOPEN</name>
|
|
<description>Serial Wire Data Pin Enable</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>SWOPEN</name>
|
|
<description>Serial Wire Viewer Output Pin Enable</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>SWLOCATION</name>
|
|
<description>I/O Location</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>LOC0</name>
|
|
<description>Location 0</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>LOC1</name>
|
|
<description>Location 1</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>INSENSE</name>
|
|
<description>Input Sense Register</description>
|
|
<addressOffset>0x124</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000003</resetValue>
|
|
<resetMask>0x00000003</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>INT</name>
|
|
<description>Interrupt Sense Enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>PRS</name>
|
|
<description>PRS Sense Enable</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>LOCK</name>
|
|
<description>Configuration Lock Register</description>
|
|
<addressOffset>0x128</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>LOCKKEY</name>
|
|
<description>Configuration Lock Key</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>16</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>UNLOCKED</name>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>LOCKED</name>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>VCMP</name>
|
|
<description>VCMP</description>
|
|
<baseAddress>0x40000000</baseAddress>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x00000400</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<interrupt>
|
|
<name>VCMP</name>
|
|
<value>26</value>
|
|
</interrupt>
|
|
<registers>
|
|
<register>
|
|
<name>CTRL</name>
|
|
<description>Control Register</description>
|
|
<addressOffset>0x000</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x47000000</resetValue>
|
|
<resetMask>0x4F030715</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>EN</name>
|
|
<description>Voltage Supply Comparator Enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>INACTVAL</name>
|
|
<description>Inactive Value</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>HYSTEN</name>
|
|
<description>Hysteresis Enable</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>WARMTIME</name>
|
|
<description>Warm-Up Time</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>4CYCLES</name>
|
|
<description>4 HFPERCLK cycles</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>8CYCLES</name>
|
|
<description>8 HFPERCLK cycles</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>16CYCLES</name>
|
|
<description>16 HFPERCLK cycles</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>32CYCLES</name>
|
|
<description>32 HFPERCLK cycles</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>64CYCLES</name>
|
|
<description>64 HFPERCLK cycles</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>128CYCLES</name>
|
|
<description>128 HFPERCLK cycles</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>256CYCLES</name>
|
|
<description>256 HFPERCLK cycles</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>512CYCLES</name>
|
|
<description>512 HFPERCLK cycles</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>IRISE</name>
|
|
<description>Rising Edge Interrupt Sense</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>IFALL</name>
|
|
<description>Falling Edge Interrupt Sense</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>BIASPROG</name>
|
|
<description>VCMP Bias Programming Value</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>HALFBIAS</name>
|
|
<description>Half Bias Current</description>
|
|
<bitOffset>30</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>INPUTSEL</name>
|
|
<description>Input Selection Register</description>
|
|
<addressOffset>0x004</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000013F</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>TRIGLEVEL</name>
|
|
<description>Trigger Level</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>6</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>LPREF</name>
|
|
<description>Low Power Reference</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>STATUS</name>
|
|
<description>Status Register</description>
|
|
<addressOffset>0x008</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000003</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>VCMPACT</name>
|
|
<description>Voltage Supply Comparator Active</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>VCMPOUT</name>
|
|
<description>Voltage Supply Comparator Output</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IEN</name>
|
|
<description>Interrupt Enable Register</description>
|
|
<addressOffset>0x00C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000003</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>EDGE</name>
|
|
<description>Edge Trigger Interrupt Enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>WARMUP</name>
|
|
<description>Warm-up Interrupt Enable</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IF</name>
|
|
<description>Interrupt Flag Register</description>
|
|
<addressOffset>0x010</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000003</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>EDGE</name>
|
|
<description>Edge Triggered Interrupt Flag</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>WARMUP</name>
|
|
<description>Warm-up Interrupt Flag</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IFS</name>
|
|
<description>Interrupt Flag Set Register</description>
|
|
<addressOffset>0x014</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000003</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>EDGE</name>
|
|
<description>Edge Triggered Interrupt Flag Set</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>WARMUP</name>
|
|
<description>Warm-up Interrupt Flag Set</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IFC</name>
|
|
<description>Interrupt Flag Clear Register</description>
|
|
<addressOffset>0x018</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000003</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>EDGE</name>
|
|
<description>Edge Triggered Interrupt Flag Clear</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>WARMUP</name>
|
|
<description>Warm-up Interrupt Flag Clear</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>ADC0</name>
|
|
<description>ADC0</description>
|
|
<baseAddress>0x40002000</baseAddress>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x00000400</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<interrupt>
|
|
<name>ADC0</name>
|
|
<value>6</value>
|
|
</interrupt>
|
|
<registers>
|
|
<register>
|
|
<name>CTRL</name>
|
|
<description>Control Register</description>
|
|
<addressOffset>0x000</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x001F0000</resetValue>
|
|
<resetMask>0x0F1F7F3B</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>WARMUPMODE</name>
|
|
<description>Warm-up Mode</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>NORMAL</name>
|
|
<description>ADC is shut down after each conversion</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>FASTBG</name>
|
|
<description>Bandgap references do not need warm up, but have reduced accuracy.</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>KEEPSCANREFWARM</name>
|
|
<description>Reference selected for scan mode is kept warm.</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>KEEPADCWARM</name>
|
|
<description>ADC is kept warmed up and scan reference is kept warm</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>TAILGATE</name>
|
|
<description>Conversion Tailgating</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>LPFMODE</name>
|
|
<description>Low Pass Filter Mode</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>BYPASS</name>
|
|
<description>No filter or decoupling capacitor</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DECAP</name>
|
|
<description>On chip decoupling capacitor selected</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>RCFILT</name>
|
|
<description>On chip RC filter selected</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>PRESC</name>
|
|
<description>Prescaler Setting</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>7</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>NODIVISION</name>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>TIMEBASE</name>
|
|
<description>Time Base</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>5</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>OVSRSEL</name>
|
|
<description>Oversample Rate Select</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>X2</name>
|
|
<description>2 samples for each conversion result</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>X4</name>
|
|
<description>4 samples for each conversion result</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>X8</name>
|
|
<description>8 samples for each conversion result</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>X16</name>
|
|
<description>16 samples for each conversion result</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>X32</name>
|
|
<description>32 samples for each conversion result</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>X64</name>
|
|
<description>64 samples for each conversion result</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>X128</name>
|
|
<description>128 samples for each conversion result</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>X256</name>
|
|
<description>256 samples for each conversion result</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>X512</name>
|
|
<description>512 samples for each conversion result</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>X1024</name>
|
|
<description>1024 samples for each conversion result</description>
|
|
<value>0x00000009</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>X2048</name>
|
|
<description>2048 samples for each conversion result</description>
|
|
<value>0x0000000A</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>X4096</name>
|
|
<description>4096 samples for each conversion result</description>
|
|
<value>0x0000000B</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CMD</name>
|
|
<description>Command Register</description>
|
|
<addressOffset>0x004</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000000F</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>SINGLESTART</name>
|
|
<description>Single Conversion Start</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>SINGLESTOP</name>
|
|
<description>Single Conversion Stop</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>SCANSTART</name>
|
|
<description>Scan Sequence Start</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>SCANSTOP</name>
|
|
<description>Scan Sequence Stop</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>STATUS</name>
|
|
<description>Status Register</description>
|
|
<addressOffset>0x008</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x07031303</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>SINGLEACT</name>
|
|
<description>Single Conversion Active</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>SCANACT</name>
|
|
<description>Scan Conversion Active</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>SINGLEREFWARM</name>
|
|
<description>Single Reference Warmed Up</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>SCANREFWARM</name>
|
|
<description>Scan Reference Warmed Up</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>WARM</name>
|
|
<description>ADC Warmed Up</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>SINGLEDV</name>
|
|
<description>Single Sample Data Valid</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>SCANDV</name>
|
|
<description>Scan Data Valid</description>
|
|
<bitOffset>17</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>SCANDATASRC</name>
|
|
<description>Scan Data Source</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
<access>read-only</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>CH0</name>
|
|
<description>Single ended mode: SCANDATA result originates from ADCn_CH0. Differential mode: SCANDATA result originates from ADCn_CH0-ADCn_CH1</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>CH1</name>
|
|
<description>Single ended mode: SCANDATA result originates from ADCn_CH1. Differential mode: SCANDATA result originates from ADCn_CH2_ADCn_CH3</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>CH2</name>
|
|
<description>Single ended mode: SCANDATA result originates from ADCn_CH2. Differential mode: SCANDATA result originates from ADCn_CH4-ADCn_CH5</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>CH3</name>
|
|
<description>Single ended mode: SCANDATA result originates from ADCn_CH3. Differential mode: SCANDATA result originates from ADCn_CH6-ADCn_CH7</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>CH4</name>
|
|
<description>SCANDATA result originates from ADCn_CH4</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>CH5</name>
|
|
<description>SCANDATA result originates from ADCn_CH5</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>CH6</name>
|
|
<description>SCANDATA result originates from ADCn_CH6</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>CH7</name>
|
|
<description>SCANDATA result originates from ADCn_CH7</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SINGLECTRL</name>
|
|
<description>Single Sample Control Register</description>
|
|
<addressOffset>0x00C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x71F70F37</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>REP</name>
|
|
<description>Single Sample Repetitive Mode</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>DIFF</name>
|
|
<description>Single Sample Differential Mode</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>ADJ</name>
|
|
<description>Single Sample Result Adjustment</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>RES</name>
|
|
<description>Single Sample Resolution Select</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>12BIT</name>
|
|
<description>12-bit resolution</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>8BIT</name>
|
|
<description>8-bit resolution</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>6BIT</name>
|
|
<description>6-bit resolution</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>OVS</name>
|
|
<description>Oversampling enabled. Oversampling rate is set in OVSRSEL</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>INPUTSEL</name>
|
|
<description>Single Sample Input Selection</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>REF</name>
|
|
<description>Single Sample Reference Selection</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>1V25</name>
|
|
<description>Internal 1.25 V reference</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>2V5</name>
|
|
<description>Internal 2.5 V reference</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>VDD</name>
|
|
<description>Buffered VDD</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>5VDIFF</name>
|
|
<description>Internal differential 5 V reference</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>EXTSINGLE</name>
|
|
<description>Single ended external reference from ADCn_CH6</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>2XEXTDIFF</name>
|
|
<description>Differential external reference, 2x(ADCn_CH6 - ADCn_CH7)</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>2XVDD</name>
|
|
<description>Unbuffered 2xVDD</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>AT</name>
|
|
<description>Single Sample Acquisition Time</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>1CYCLE</name>
|
|
<description>1 ADC_CLK cycle acquisition time for single sample</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>2CYCLES</name>
|
|
<description>2 ADC_CLK cycles acquisition time for single sample</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>4CYCLES</name>
|
|
<description>4 ADC_CLK cycles acquisition time for single sample</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>8CYCLES</name>
|
|
<description>8 ADC_CLK cycles acquisition time for single sample</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>16CYCLES</name>
|
|
<description>16 ADC_CLK cycles acquisition time for single sample</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>32CYCLES</name>
|
|
<description>32 ADC_CLK cycles acquisition time for single sample</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>64CYCLES</name>
|
|
<description>64 ADC_CLK cycles acquisition time for single sample</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>128CYCLES</name>
|
|
<description>128 ADC_CLK cycles acquisition time for single sample</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>256CYCLES</name>
|
|
<description>256 ADC_CLK cycles acquisition time for single sample</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>PRSEN</name>
|
|
<description>Single Sample PRS Trigger Enable</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>PRSSEL</name>
|
|
<description>Single Sample PRS Trigger Select</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>PRSCH0</name>
|
|
<description>PRS ch 0 triggers single sample</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH1</name>
|
|
<description>PRS ch 1 triggers single sample</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH2</name>
|
|
<description>PRS ch 2 triggers single sample</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH3</name>
|
|
<description>PRS ch 3 triggers single sample</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH4</name>
|
|
<description>PRS ch 4 triggers single sample</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH5</name>
|
|
<description>PRS ch 5 triggers single sample</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH6</name>
|
|
<description>PRS ch 6 triggers single sample</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH7</name>
|
|
<description>PRS ch 7 triggers single sample</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SCANCTRL</name>
|
|
<description>Scan Control Register</description>
|
|
<addressOffset>0x010</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x71F7FF37</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>REP</name>
|
|
<description>Scan Sequence Repetitive Mode</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>DIFF</name>
|
|
<description>Scan Sequence Differential Mode</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>ADJ</name>
|
|
<description>Scan Sequence Result Adjustment</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>RES</name>
|
|
<description>Scan Sequence Resolution Select</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>12BIT</name>
|
|
<description>12-bit resolution</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>8BIT</name>
|
|
<description>8-bit resolution</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>6BIT</name>
|
|
<description>6-bit resolution</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>OVS</name>
|
|
<description>Oversampling enabled. Oversampling rate is set in OVSRSEL</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>INPUTMASK</name>
|
|
<description>Scan Sequence Input Mask</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>REF</name>
|
|
<description>Scan Sequence Reference Selection</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>1V25</name>
|
|
<description>Internal 1.25 V reference</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>2V5</name>
|
|
<description>Internal 2.5 V reference</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>VDD</name>
|
|
<description>VDD</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>5VDIFF</name>
|
|
<description>Internal differential 5 V reference</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>EXTSINGLE</name>
|
|
<description>Single ended external reference from ADCn_CH6</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>2XEXTDIFF</name>
|
|
<description>Differential external reference, 2x(ADCn_CH6 - ADCn_CH7)</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>2XVDD</name>
|
|
<description>Unbuffered 2xVDD</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>AT</name>
|
|
<description>Scan Sample Acquisition Time</description>
|
|
<bitOffset>20</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>1CYCLE</name>
|
|
<description>1 ADC_CLK cycle acquisition time for scan samples</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>2CYCLES</name>
|
|
<description>2 ADC_CLK cycles acquisition time for scan samples</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>4CYCLES</name>
|
|
<description>4 ADC_CLK cycles acquisition time for scan samples</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>8CYCLES</name>
|
|
<description>8 ADC_CLK cycles acquisition time for scan samples</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>16CYCLES</name>
|
|
<description>16 ADC_CLK cycles acquisition time for scan samples</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>32CYCLES</name>
|
|
<description>32 ADC_CLK cycles acquisition time for scan samples</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>64CYCLES</name>
|
|
<description>64 ADC_CLK cycles acquisition time for scan samples</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>128CYCLES</name>
|
|
<description>128 ADC_CLK cycles acquisition time for scan samples</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>256CYCLES</name>
|
|
<description>256 ADC_CLK cycles acquisition time for scan samples</description>
|
|
<value>0x00000008</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>PRSEN</name>
|
|
<description>Scan Sequence PRS Trigger Enable</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>PRSSEL</name>
|
|
<description>Scan Sequence PRS Trigger Select</description>
|
|
<bitOffset>28</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>PRSCH0</name>
|
|
<description>PRS ch 0 triggers scan sequence</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH1</name>
|
|
<description>PRS ch 1 triggers scan sequence</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH2</name>
|
|
<description>PRS ch 2 triggers scan sequence</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH3</name>
|
|
<description>PRS ch 3 triggers scan sequence</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH4</name>
|
|
<description>PRS ch 4 triggers scan sequence</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH5</name>
|
|
<description>PRS ch 5 triggers scan sequence</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH6</name>
|
|
<description>PRS ch 6 triggers scan sequence</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>PRSCH7</name>
|
|
<description>PRS ch 7 triggers scan sequence</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IEN</name>
|
|
<description>Interrupt Enable Register</description>
|
|
<addressOffset>0x014</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000303</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>SINGLE</name>
|
|
<description>Single Conversion Complete Interrupt Enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>SCAN</name>
|
|
<description>Scan Conversion Complete Interrupt Enable</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>SINGLEOF</name>
|
|
<description>Single Result Overflow Interrupt Enable</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>SCANOF</name>
|
|
<description>Scan Result Overflow Interrupt Enable</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IF</name>
|
|
<description>Interrupt Flag Register</description>
|
|
<addressOffset>0x018</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000303</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>SINGLE</name>
|
|
<description>Single Conversion Complete Interrupt Flag</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>SCAN</name>
|
|
<description>Scan Conversion Complete Interrupt Flag</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>SINGLEOF</name>
|
|
<description>Single Result Overflow Interrupt Flag</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>SCANOF</name>
|
|
<description>Scan Result Overflow Interrupt Flag</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IFS</name>
|
|
<description>Interrupt Flag Set Register</description>
|
|
<addressOffset>0x01C</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000303</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>SINGLE</name>
|
|
<description>Single Conversion Complete Interrupt Flag Set</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>SCAN</name>
|
|
<description>Scan Conversion Complete Interrupt Flag Set</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>SINGLEOF</name>
|
|
<description>Single Result Overflow Interrupt Flag Set</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>SCANOF</name>
|
|
<description>Scan Result Overflow Interrupt Flag Set</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IFC</name>
|
|
<description>Interrupt Flag Clear Register</description>
|
|
<addressOffset>0x020</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000303</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>SINGLE</name>
|
|
<description>Single Conversion Complete Interrupt Flag Clear</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>SCAN</name>
|
|
<description>Scan Conversion Complete Interrupt Flag Clear</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>SINGLEOF</name>
|
|
<description>Single Result Overflow Interrupt Flag Clear</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>SCANOF</name>
|
|
<description>Scan Result Overflow Interrupt Flag Clear</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SINGLEDATA</name>
|
|
<description>Single Conversion Result Data</description>
|
|
<addressOffset>0x024</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0xFFFFFFFF</resetMask>
|
|
<readAction>modifyExternal</readAction>
|
|
<fields>
|
|
<field>
|
|
<name>DATA</name>
|
|
<description>Single Conversion Result Data</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>32</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SCANDATA</name>
|
|
<description>Scan Conversion Result Data</description>
|
|
<addressOffset>0x028</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0xFFFFFFFF</resetMask>
|
|
<readAction>modifyExternal</readAction>
|
|
<fields>
|
|
<field>
|
|
<name>DATA</name>
|
|
<description>Scan Conversion Result Data</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>32</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SINGLEDATAP</name>
|
|
<description>Single Conversion Result Data Peek Register</description>
|
|
<addressOffset>0x02C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0xFFFFFFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>DATAP</name>
|
|
<description>Single Conversion Result Data Peek</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>32</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SCANDATAP</name>
|
|
<description>Scan Sequence Result Data Peek Register</description>
|
|
<addressOffset>0x030</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0xFFFFFFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>DATAP</name>
|
|
<description>Scan Conversion Result Data Peek</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>32</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CAL</name>
|
|
<description>Calibration Register</description>
|
|
<addressOffset>0x034</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x3F003F00</resetValue>
|
|
<resetMask>0x7F7F7F7F</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>SINGLEOFFSET</name>
|
|
<description>Single Mode Offset Calibration Value</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>7</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>SINGLEGAIN</name>
|
|
<description>Single Mode Gain Calibration Value</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>7</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>SCANOFFSET</name>
|
|
<description>Scan Mode Offset Calibration Value</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>7</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>SCANGAIN</name>
|
|
<description>Scan Mode Gain Calibration Value</description>
|
|
<bitOffset>24</bitOffset>
|
|
<bitWidth>7</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>BIASPROG</name>
|
|
<description>Bias Programming Register</description>
|
|
<addressOffset>0x03C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000747</resetValue>
|
|
<resetMask>0x00000F4F</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>BIASPROG</name>
|
|
<description>Bias Programming Value</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>HALFBIAS</name>
|
|
<description>Half Bias Current</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>COMPBIAS</name>
|
|
<description>Comparator Bias Value</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>I2C0</name>
|
|
<description>I2C0</description>
|
|
<baseAddress>0x4000A000</baseAddress>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x00000400</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<interrupt>
|
|
<name>I2C0</name>
|
|
<value>8</value>
|
|
</interrupt>
|
|
<registers>
|
|
<register>
|
|
<name>CTRL</name>
|
|
<description>Control Register</description>
|
|
<addressOffset>0x000</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0007B37F</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>EN</name>
|
|
<description>I2C Enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>SLAVE</name>
|
|
<description>Addressable as Slave</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>AUTOACK</name>
|
|
<description>Automatic Acknowledge</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>AUTOSE</name>
|
|
<description>Automatic STOP when Empty</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>AUTOSN</name>
|
|
<description>Automatic STOP on NACK</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>ARBDIS</name>
|
|
<description>Arbitration Disable</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>GCAMEN</name>
|
|
<description>General Call Address Match Enable</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CLHR</name>
|
|
<description>Clock Low High Ratio</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>STANDARD</name>
|
|
<description>The ratio between low period and high period counters (Nlow:Nhigh) is 4:4</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>ASYMMETRIC</name>
|
|
<description>The ratio between low period and high period counters (Nlow:Nhigh) is 6:3</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>FAST</name>
|
|
<description>The ratio between low period and high period counters (Nlow:Nhigh) is 11:6</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>BITO</name>
|
|
<description>Bus Idle Timeout</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>OFF</name>
|
|
<description>Timeout disabled</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>40PCC</name>
|
|
<description>Timeout after 40 prescaled clock cycles. In standard mode at 100 kHz, this results in a 50us timeout.</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>80PCC</name>
|
|
<description>Timeout after 80 prescaled clock cycles. In standard mode at 100 kHz, this results in a 100us timeout.</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>160PCC</name>
|
|
<description>Timeout after 160 prescaled clock cycles. In standard mode at 100 kHz, this results in a 200us timeout.</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>GIBITO</name>
|
|
<description>Go Idle on Bus Idle Timeout </description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CLTO</name>
|
|
<description>Clock Low Timeout</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>OFF</name>
|
|
<description>Timeout disabled</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>40PCC</name>
|
|
<description>Timeout after 40 prescaled clock cycles. In standard mode at 100 kHz, this results in a 50us timeout.</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>80PCC</name>
|
|
<description>Timeout after 80 prescaled clock cycles. In standard mode at 100 kHz, this results in a 100us timeout.</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>160PCC</name>
|
|
<description>Timeout after 160 prescaled clock cycles. In standard mode at 100 kHz, this results in a 200us timeout.</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>320PPC</name>
|
|
<description>Timeout after 320 prescaled clock cycles. In standard mode at 100 kHz, this results in a 400us timeout.</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>1024PPC</name>
|
|
<description>Timeout after 1024 prescaled clock cycles. In standard mode at 100 kHz, this results in a 1280us timeout.</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CMD</name>
|
|
<description>Command Register</description>
|
|
<addressOffset>0x004</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x000000FF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>START</name>
|
|
<description>Send start condition</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>STOP</name>
|
|
<description>Send stop condition</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>ACK</name>
|
|
<description>Send ACK</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>NACK</name>
|
|
<description>Send NACK</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CONT</name>
|
|
<description>Continue transmission</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>ABORT</name>
|
|
<description>Abort transmission</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CLEARTX</name>
|
|
<description>Clear TX</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CLEARPC</name>
|
|
<description>Clear Pending Commands</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>STATE</name>
|
|
<description>State Register</description>
|
|
<addressOffset>0x008</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000001</resetValue>
|
|
<resetMask>0x000000FF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>BUSY</name>
|
|
<description>Bus Busy</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>MASTER</name>
|
|
<description>Master</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TRANSMITTER</name>
|
|
<description>Transmitter</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>NACKED</name>
|
|
<description>Nack Received</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>BUSHOLD</name>
|
|
<description>Bus Held</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>STATE</name>
|
|
<description>Transmission State</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
<access>read-only</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>IDLE</name>
|
|
<description>No transmission is being performed.</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>WAIT</name>
|
|
<description>Waiting for idle. Will send a start condition as soon as the bus is idle.</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>START</name>
|
|
<description>Start transmitted or received</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>ADDR</name>
|
|
<description>Address transmitted or received</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>ADDRACK</name>
|
|
<description>Address ack/nack transmitted or received</description>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DATA</name>
|
|
<description>Data transmitted or received</description>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DATAACK</name>
|
|
<description>Data ack/nack transmitted or received</description>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>STATUS</name>
|
|
<description>Status Register</description>
|
|
<addressOffset>0x00C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000080</resetValue>
|
|
<resetMask>0x000001FF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>PSTART</name>
|
|
<description>Pending START</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>PSTOP</name>
|
|
<description>Pending STOP</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>PACK</name>
|
|
<description>Pending ACK</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>PNACK</name>
|
|
<description>Pending NACK</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>PCONT</name>
|
|
<description>Pending continue</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>PABORT</name>
|
|
<description>Pending abort</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXC</name>
|
|
<description>TX Complete</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXBL</name>
|
|
<description>TX Buffer Level</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXDATAV</name>
|
|
<description>RX Data Valid</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CLKDIV</name>
|
|
<description>Clock Division Register</description>
|
|
<addressOffset>0x010</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x000001FF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>DIV</name>
|
|
<description>Clock Divider</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>9</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SADDR</name>
|
|
<description>Slave Address Register</description>
|
|
<addressOffset>0x014</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x000000FE</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>ADDR</name>
|
|
<description>Slave address</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>7</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SADDRMASK</name>
|
|
<description>Slave Address Mask Register</description>
|
|
<addressOffset>0x018</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x000000FE</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>MASK</name>
|
|
<description>Slave Address Mask</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>7</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RXDATA</name>
|
|
<description>Receive Buffer Data Register</description>
|
|
<addressOffset>0x01C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x000000FF</resetMask>
|
|
<readAction>modifyExternal</readAction>
|
|
<fields>
|
|
<field>
|
|
<name>RXDATA</name>
|
|
<description>RX Data</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>RXDATAP</name>
|
|
<description>Receive Buffer Data Peek Register</description>
|
|
<addressOffset>0x020</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x000000FF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>RXDATAP</name>
|
|
<description>RX Data Peek</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>TXDATA</name>
|
|
<description>Transmit Buffer Data Register</description>
|
|
<addressOffset>0x024</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x000000FF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>TXDATA</name>
|
|
<description>TX Data</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IF</name>
|
|
<description>Interrupt Flag Register</description>
|
|
<addressOffset>0x028</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000010</resetValue>
|
|
<resetMask>0x0001FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>START</name>
|
|
<description>START condition Interrupt Flag</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RSTART</name>
|
|
<description>Repeated START condition Interrupt Flag</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>ADDR</name>
|
|
<description>Address Interrupt Flag</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXC</name>
|
|
<description>Transfer Completed Interrupt Flag</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXBL</name>
|
|
<description>Transmit Buffer Level Interrupt Flag</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXDATAV</name>
|
|
<description>Receive Data Valid Interrupt Flag</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>ACK</name>
|
|
<description>Acknowledge Received Interrupt Flag</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>NACK</name>
|
|
<description>Not Acknowledge Received Interrupt Flag</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>MSTOP</name>
|
|
<description>Master STOP Condition Interrupt Flag</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>ARBLOST</name>
|
|
<description>Arbitration Lost Interrupt Flag</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>BUSERR</name>
|
|
<description>Bus Error Interrupt Flag</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>BUSHOLD</name>
|
|
<description>Bus Held Interrupt Flag</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXOF</name>
|
|
<description>Transmit Buffer Overflow Interrupt Flag</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXUF</name>
|
|
<description>Receive Buffer Underflow Interrupt Flag</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>BITO</name>
|
|
<description>Bus Idle Timeout Interrupt Flag</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CLTO</name>
|
|
<description>Clock Low Timeout Interrupt Flag</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>SSTOP</name>
|
|
<description>Slave STOP condition Interrupt Flag</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IFS</name>
|
|
<description>Interrupt Flag Set Register</description>
|
|
<addressOffset>0x02C</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0001FFCF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>START</name>
|
|
<description>Set START Interrupt Flag</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RSTART</name>
|
|
<description>Set Repeated START Interrupt Flag</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>ADDR</name>
|
|
<description>Set Address Interrupt Flag</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXC</name>
|
|
<description>Set Transfer Completed Interrupt Flag</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>ACK</name>
|
|
<description>Set Acknowledge Received Interrupt Flag</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>NACK</name>
|
|
<description>Set Not Acknowledge Received Interrupt Flag</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>MSTOP</name>
|
|
<description>Set MSTOP Interrupt Flag</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>ARBLOST</name>
|
|
<description>Set Arbitration Lost Interrupt Flag</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>BUSERR</name>
|
|
<description>Set Bus Error Interrupt Flag</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>BUSHOLD</name>
|
|
<description>Set Bus Held Interrupt Flag</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXOF</name>
|
|
<description>Set Transmit Buffer Overflow Interrupt Flag</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXUF</name>
|
|
<description>Set Receive Buffer Underflow Interrupt Flag</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>BITO</name>
|
|
<description>Set Bus Idle Timeout Interrupt Flag</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CLTO</name>
|
|
<description>Set Clock Low Interrupt Flag</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>SSTOP</name>
|
|
<description>Set SSTOP Interrupt Flag</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IFC</name>
|
|
<description>Interrupt Flag Clear Register</description>
|
|
<addressOffset>0x030</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0001FFCF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>START</name>
|
|
<description>Clear START Interrupt Flag</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RSTART</name>
|
|
<description>Clear Repeated START Interrupt Flag</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>ADDR</name>
|
|
<description>Clear Address Interrupt Flag</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXC</name>
|
|
<description>Clear Transfer Completed Interrupt Flag</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>ACK</name>
|
|
<description>Clear Acknowledge Received Interrupt Flag</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>NACK</name>
|
|
<description>Clear Not Acknowledge Received Interrupt Flag</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>MSTOP</name>
|
|
<description>Clear MSTOP Interrupt Flag</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>ARBLOST</name>
|
|
<description>Clear Arbitration Lost Interrupt Flag</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>BUSERR</name>
|
|
<description>Clear Bus Error Interrupt Flag</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>BUSHOLD</name>
|
|
<description>Clear Bus Held Interrupt Flag</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>TXOF</name>
|
|
<description>Clear Transmit Buffer Overflow Interrupt Flag</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>RXUF</name>
|
|
<description>Clear Receive Buffer Underflow Interrupt Flag</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>BITO</name>
|
|
<description>Clear Bus Idle Timeout Interrupt Flag</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CLTO</name>
|
|
<description>Clear Clock Low Interrupt Flag</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
<field>
|
|
<name>SSTOP</name>
|
|
<description>Clear SSTOP Interrupt Flag</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IEN</name>
|
|
<description>Interrupt Enable Register</description>
|
|
<addressOffset>0x034</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0001FFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>START</name>
|
|
<description>START Condition Interrupt Enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>RSTART</name>
|
|
<description>Repeated START condition Interrupt Enable</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>ADDR</name>
|
|
<description>Address Interrupt Enable</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>TXC</name>
|
|
<description>Transfer Completed Interrupt Enable</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>TXBL</name>
|
|
<description>Transmit Buffer level Interrupt Enable</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>RXDATAV</name>
|
|
<description>Receive Data Valid Interrupt Enable</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>ACK</name>
|
|
<description>Acknowledge Received Interrupt Enable</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>NACK</name>
|
|
<description>Not Acknowledge Received Interrupt Enable</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>MSTOP</name>
|
|
<description>MSTOP Interrupt Enable</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>ARBLOST</name>
|
|
<description>Arbitration Lost Interrupt Enable</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>BUSERR</name>
|
|
<description>Bus Error Interrupt Enable</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>BUSHOLD</name>
|
|
<description>Bus Held Interrupt Enable</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>TXOF</name>
|
|
<description>Transmit Buffer Overflow Interrupt Enable</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>RXUF</name>
|
|
<description>Receive Buffer Underflow Interrupt Enable</description>
|
|
<bitOffset>13</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>BITO</name>
|
|
<description>Bus Idle Timeout Interrupt Enable</description>
|
|
<bitOffset>14</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CLTO</name>
|
|
<description>Clock Low Interrupt Enable</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>SSTOP</name>
|
|
<description>SSTOP Interrupt Enable</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>ROUTE</name>
|
|
<description>I/O Routing Register</description>
|
|
<addressOffset>0x038</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000303</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>SDAPEN</name>
|
|
<description>SDA Pin Enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>SCLPEN</name>
|
|
<description>SCL Pin Enable</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>LOCATION</name>
|
|
<description>I/O Location</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>LOC0</name>
|
|
<description>Location 0</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>LOC1</name>
|
|
<description>Location 1</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>LOC2</name>
|
|
<description>Location 2</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>LOC3</name>
|
|
<description>Location 3</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>LCD</name>
|
|
<description>LCD</description>
|
|
<baseAddress>0x4008A000</baseAddress>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x00000400</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<interrupt>
|
|
<name>LCD</name>
|
|
<value>27</value>
|
|
</interrupt>
|
|
<registers>
|
|
<register>
|
|
<name>CTRL</name>
|
|
<description>Control Register</description>
|
|
<addressOffset>0x000</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000007</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>EN</name>
|
|
<description>LCD Enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>UDCTRL</name>
|
|
<description>Update Data Control</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>REGULAR</name>
|
|
<description>The data transfer is controlled by SW. Transfer is performed as soon as possible</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>FCEVENT</name>
|
|
<description>The data transfer is done at the next event triggered by the Frame Counter</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>FRAMESTART</name>
|
|
<description>The data transfer is done continuously at every LCD frame start</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>DISPCTRL</name>
|
|
<description>Display Control Register</description>
|
|
<addressOffset>0x004</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x000C1F00</resetValue>
|
|
<resetMask>0x001D9F1F</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>MUX</name>
|
|
<description>Mux Configuration</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>STATIC</name>
|
|
<description>Static</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DUPLEX</name>
|
|
<description>Duplex</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>TRIPLEX</name>
|
|
<description>Triplex</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>QUADRUPLEX</name>
|
|
<description>Quadruplex</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>BIAS</name>
|
|
<description>Bias Configuration</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>STATIC</name>
|
|
<description>Static</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>ONEHALF</name>
|
|
<description>1/2 Bias</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>ONETHIRD</name>
|
|
<description>1/3 Bias</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>WAVE</name>
|
|
<description>Waveform Selection</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CONLEV</name>
|
|
<description>Contrast Level</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>5</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>MIN</name>
|
|
<description>Minimum contrast</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>MAX</name>
|
|
<description>Maximum contrast</description>
|
|
<value>0x0000001F</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>CONCONF</name>
|
|
<description>Contrast Configuration</description>
|
|
<bitOffset>15</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>VLCDSEL</name>
|
|
<description>VLCD Selection</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>VBLEV</name>
|
|
<description>Voltage Boost Level</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>3</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>LEVEL0</name>
|
|
<description>Minimum boost level</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>LEVEL1</name>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>LEVEL2</name>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>LEVEL3</name>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>LEVEL4</name>
|
|
<value>0x00000004</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>LEVEL5</name>
|
|
<value>0x00000005</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>LEVEL6</name>
|
|
<value>0x00000006</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>LEVEL7</name>
|
|
<description>Maximum boost level</description>
|
|
<value>0x00000007</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SEGEN</name>
|
|
<description>Segment Enable Register</description>
|
|
<addressOffset>0x008</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x000003FF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>SEGEN</name>
|
|
<description>Segment Enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>10</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>BACTRL</name>
|
|
<description>Blink and Animation Control Register</description>
|
|
<addressOffset>0x00C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00FF01FF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>BLINKEN</name>
|
|
<description>Blink Enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>BLANK</name>
|
|
<description>Blank Display</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>AEN</name>
|
|
<description>Animation Enable</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>AREGASC</name>
|
|
<description>Animate Register A Shift Control</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>NOSHIFT</name>
|
|
<description>No Shift operation on Animation Register A</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>SHIFTLEFT</name>
|
|
<description>Animation Register A is shifted left</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>SHIFTRIGHT</name>
|
|
<description>Animation Register A is shifted right</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>AREGBSC</name>
|
|
<description>Animate Register B Shift Control</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>NOSHIFT</name>
|
|
<description>No Shift operation on Animation Register B</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>SHIFTLEFT</name>
|
|
<description>Animation Register B is shifted left</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>SHIFTRIGHT</name>
|
|
<description>Animation Register B is shifted right</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>ALOGSEL</name>
|
|
<description>Animate Logic Function Select</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>FCEN</name>
|
|
<description>Frame Counter Enable</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>FCPRESC</name>
|
|
<description>Frame Counter Prescaler</description>
|
|
<bitOffset>16</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>DIV1</name>
|
|
<description>CLKFC = CLKFRAME / 1</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV2</name>
|
|
<description>CLKFC = CLKFRAME / 2</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV4</name>
|
|
<description>CLKFC = CLKFRAME / 4</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>DIV8</name>
|
|
<description>CLKFC = CLKFRAME / 8</description>
|
|
<value>0x00000003</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
<field>
|
|
<name>FCTOP</name>
|
|
<description>Frame Counter Top Value</description>
|
|
<bitOffset>18</bitOffset>
|
|
<bitWidth>6</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>STATUS</name>
|
|
<description>Status Register</description>
|
|
<addressOffset>0x010</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x0000010F</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>ASTATE</name>
|
|
<description>Current Animation State</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>BLINK</name>
|
|
<description>Blink State</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>AREGA</name>
|
|
<description>Animation Register A</description>
|
|
<addressOffset>0x014</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x000000FF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>AREGA</name>
|
|
<description>Animation Register A Data</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>AREGB</name>
|
|
<description>Animation Register B</description>
|
|
<addressOffset>0x018</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x000000FF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>AREGB</name>
|
|
<description>Animation Register B Data</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IF</name>
|
|
<description>Interrupt Flag Register</description>
|
|
<addressOffset>0x01C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000001</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>FC</name>
|
|
<description>Frame Counter Interrupt Flag</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IFS</name>
|
|
<description>Interrupt Flag Set Register</description>
|
|
<addressOffset>0x020</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000001</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>FC</name>
|
|
<description>Frame Counter Interrupt Flag Set</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IFC</name>
|
|
<description>Interrupt Flag Clear Register</description>
|
|
<addressOffset>0x024</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000001</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>FC</name>
|
|
<description>Frame Counter Interrupt Flag Clear</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>IEN</name>
|
|
<description>Interrupt Enable Register</description>
|
|
<addressOffset>0x028</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000001</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>FC</name>
|
|
<description>Frame Counter Interrupt Enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SEGD0L</name>
|
|
<description>Segment Data Low Register 0</description>
|
|
<addressOffset>0x040</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0xFFFFFFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>SEGD0L</name>
|
|
<description>COM0 Segment Data Low</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>32</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SEGD1L</name>
|
|
<description>Segment Data Low Register 1</description>
|
|
<addressOffset>0x044</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0xFFFFFFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>SEGD1L</name>
|
|
<description>COM1 Segment Data Low</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>32</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SEGD2L</name>
|
|
<description>Segment Data Low Register 2</description>
|
|
<addressOffset>0x048</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0xFFFFFFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>SEGD2L</name>
|
|
<description>COM2 Segment Data Low</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>32</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SEGD3L</name>
|
|
<description>Segment Data Low Register 3</description>
|
|
<addressOffset>0x04C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0xFFFFFFFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>SEGD3L</name>
|
|
<description>COM3 Segment Data Low</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>32</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SEGD0H</name>
|
|
<description>Segment Data High Register 0</description>
|
|
<addressOffset>0x050</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x000000FF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>SEGD0H</name>
|
|
<description>COM0 Segment Data High</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SEGD1H</name>
|
|
<description>Segment Data High Register 1</description>
|
|
<addressOffset>0x054</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x000000FF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>SEGD1H</name>
|
|
<description>COM1 Segment Data High</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SEGD2H</name>
|
|
<description>Segment Data High Register 2</description>
|
|
<addressOffset>0x058</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x000000FF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>SEGD2H</name>
|
|
<description>COM2 Segment Data High</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SEGD3H</name>
|
|
<description>Segment Data High Register 3</description>
|
|
<addressOffset>0x05C</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x000000FF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>SEGD3H</name>
|
|
<description>COM3 Segment Data High</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>8</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>FREEZE</name>
|
|
<description>Freeze Register</description>
|
|
<addressOffset>0x060</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000001</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>REGFREEZE</name>
|
|
<description>Register Update Freeze</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SYNCBUSY</name>
|
|
<description>Synchronization Busy Register</description>
|
|
<addressOffset>0x064</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000FFF</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>CTRL</name>
|
|
<description>CTRL Register Busy</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>BACTRL</name>
|
|
<description>BACTRL Register Busy</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>AREGA</name>
|
|
<description>AREGA Register Busy</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>AREGB</name>
|
|
<description>AREGB Register Busy</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>SEGD0L</name>
|
|
<description>SEGD0L Register Busy</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>SEGD1L</name>
|
|
<description>SEGD1L Register Busy</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>SEGD2L</name>
|
|
<description>SEGD2L Register Busy</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>SEGD3L</name>
|
|
<description>SEGD3L Register Busy</description>
|
|
<bitOffset>7</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>SEGD0H</name>
|
|
<description>SEGD0H Register Busy</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>SEGD1H</name>
|
|
<description>SEGD1H Register Busy</description>
|
|
<bitOffset>9</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>SEGD2H</name>
|
|
<description>SEGD2H Register Busy</description>
|
|
<bitOffset>10</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>SEGD3H</name>
|
|
<description>SEGD3H Register Busy</description>
|
|
<bitOffset>11</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral>
|
|
<peripheral>
|
|
<name>WDOG</name>
|
|
<description>WDOG</description>
|
|
<baseAddress>0x40088000</baseAddress>
|
|
<addressBlock>
|
|
<offset>0</offset>
|
|
<size>0x00000400</size>
|
|
<usage>registers</usage>
|
|
</addressBlock>
|
|
<registers>
|
|
<register>
|
|
<name>CTRL</name>
|
|
<description>Control Register</description>
|
|
<addressOffset>0x000</addressOffset>
|
|
<size>32</size>
|
|
<access>read-write</access>
|
|
<resetValue>0x00000F00</resetValue>
|
|
<resetMask>0x00003F7F</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>EN</name>
|
|
<description>Watchdog Timer Enable</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>DEBUGRUN</name>
|
|
<description>Debug Mode Run Enable</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>EM2RUN</name>
|
|
<description>Energy Mode 2 Run Enable</description>
|
|
<bitOffset>2</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>EM3RUN</name>
|
|
<description>Energy Mode 3 Run Enable</description>
|
|
<bitOffset>3</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>LOCK</name>
|
|
<description>Configuration lock</description>
|
|
<bitOffset>4</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>EM4BLOCK</name>
|
|
<description>Energy Mode 4 Block</description>
|
|
<bitOffset>5</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>SWOSCBLOCK</name>
|
|
<description>Software Oscillator Disable Block</description>
|
|
<bitOffset>6</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>PERSEL</name>
|
|
<description>Watchdog Timeout Period Select</description>
|
|
<bitOffset>8</bitOffset>
|
|
<bitWidth>4</bitWidth>
|
|
<access>read-write</access>
|
|
</field>
|
|
<field>
|
|
<name>CLKSEL</name>
|
|
<description>Watchdog Clock Select</description>
|
|
<bitOffset>12</bitOffset>
|
|
<bitWidth>2</bitWidth>
|
|
<access>read-write</access>
|
|
<enumeratedValues>
|
|
<enumeratedValue>
|
|
<name>ULFRCO</name>
|
|
<description>ULFRCO</description>
|
|
<value>0x00000000</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>LFRCO</name>
|
|
<description>LFRCO</description>
|
|
<value>0x00000001</value>
|
|
</enumeratedValue>
|
|
<enumeratedValue>
|
|
<name>LFXO</name>
|
|
<description>LFXO</description>
|
|
<value>0x00000002</value>
|
|
</enumeratedValue>
|
|
</enumeratedValues>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>CMD</name>
|
|
<description>Command Register</description>
|
|
<addressOffset>0x004</addressOffset>
|
|
<size>32</size>
|
|
<access>write-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000001</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>CLEAR</name>
|
|
<description>Watchdog Timer Clear</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>write-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
<register>
|
|
<name>SYNCBUSY</name>
|
|
<description>Synchronization Busy Register</description>
|
|
<addressOffset>0x008</addressOffset>
|
|
<size>32</size>
|
|
<access>read-only</access>
|
|
<resetValue>0x00000000</resetValue>
|
|
<resetMask>0x00000003</resetMask>
|
|
<fields>
|
|
<field>
|
|
<name>CTRL</name>
|
|
<description>CTRL Register Busy</description>
|
|
<bitOffset>0</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
<field>
|
|
<name>CMD</name>
|
|
<description>CMD Register Busy</description>
|
|
<bitOffset>1</bitOffset>
|
|
<bitWidth>1</bitWidth>
|
|
<access>read-only</access>
|
|
</field>
|
|
</fields>
|
|
</register>
|
|
</registers>
|
|
</peripheral>
|
|
</peripherals>
|
|
<!-- vendorExtions is _reqiuired_ to pass through Schema validation -->
|
|
<vendorExtensions>
|
|
<name>Copyright 2021 Silicon Laboratories, Inc.</name>
|
|
<flashBaseAddress>0x00000000</flashBaseAddress>
|
|
<flashSize>0x00008000</flashSize>
|
|
<flashAccessTypes>rx</flashAccessTypes>
|
|
<sramBaseAddress>0x20000000</sramBaseAddress>
|
|
<sramSize>0x00002000</sramSize>
|
|
<sramAccessTypes>rwx</sramAccessTypes>
|
|
</vendorExtensions>
|
|
</device>
|