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<?xml version="1.0" encoding="UTF-8"?>
<!-- ============================================================================ -->
<!-- Atmel Microcontroller Software Support -->
<!-- SAM Software Package License -->
<!-- ============================================================================ -->
<!-- Copyright (c) 2013, Atmel Corporation -->
<!-- -->
<!-- All rights reserved. -->
<!-- -->
<!-- Redistribution and use in source and binary forms, with or without -->
<!-- modification, are permitted provided that the following condition is met: -->
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<!-- - Redistributions of source code must retain the above copyright notice, -->
<!-- this list of conditions and the disclaimer below. -->
<!-- -->
<!-- Atmel's name may not be used to endorse or promote products derived from -->
<!-- this software without specific prior written permission. -->
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<!-- DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR -->
<!-- IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF -->
<!-- MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE -->
<!-- DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, -->
<!-- INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT -->
<!-- LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, -->
<!-- OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF -->
<!-- LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING -->
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<!-- ============================================================================ -->
<device xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" schemaVersion="1.1" xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd">
<vendor>Atmel</vendor>
<name>ATSAMA5D31</name>
<series>SAMA5D3</series>
<version>20130221</version>
<description>Atmel ATSAMA5D31 device: ARM Cortex-A5 processor-based embedded MPU, 536MHz, Linux support, FPU, LCD controller, 10/100 Ethernet, security (refer to http://www.atmel.com/devices/SAMA5D31.aspx for more)</description>
<addressUnitBits>8</addressUnitBits>
<width>32</width>
<peripherals>
<peripheral>
<name>SMD</name>
<version>11027A</version>
<description>Software Modem Device</description>
<baseAddress>0x00400000</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x100000</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>SMD</name>
<value>11</value>
</interrupt>
</peripheral>
<peripheral>
<name>AXIMX</name>
<version>11103A</version>
<description>AXI Matrix</description>
<prependToName>AXIMX_</prependToName>
<baseAddress>0x00800000</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x100000</size>
<usage>registers</usage>
</addressBlock>
<registers>
<register>
<name>REMAP</name>
<description>Remap Register</description>
<addressOffset>0x00000000</addressOffset>
<size>32</size>
<access>write-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>REMAP0</name>
<description>Remap State 0</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>REMAP1</name>
<description>Remap State 1</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>PERIPH_ID4</name>
<description>Peripheral ID Register 4</description>
<addressOffset>0x00001FD0</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000004</resetValue>
<fields>
<field>
<name>ID</name>
<description>Peripheral ID</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>ID0</name>
<description>Part Number</description>
<value>0x01</value>
</enumeratedValue>
<enumeratedValue>
<name>ID4</name>
<description>4KB count, JEP106 continuation code</description>
<value>0x04</value>
</enumeratedValue>
<enumeratedValue>
<name>ID1</name>
<description>JEP106[3:0, part number[11:8]</description>
<value>0xB3</value>
</enumeratedValue>
<enumeratedValue>
<name>ID2</name>
<description>Revision, JEP106 code flag, JEP106[6:4]</description>
<value>0xB6</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>PERIPH_ID5</name>
<description>Peripheral ID Register 5</description>
<addressOffset>0x00001FD4</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>ID</name>
<description>Peripheral ID</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>ID0</name>
<description>Part Number</description>
<value>0x01</value>
</enumeratedValue>
<enumeratedValue>
<name>ID4</name>
<description>4KB count, JEP106 continuation code</description>
<value>0x04</value>
</enumeratedValue>
<enumeratedValue>
<name>ID1</name>
<description>JEP106[3:0, part number[11:8]</description>
<value>0xB3</value>
</enumeratedValue>
<enumeratedValue>
<name>ID2</name>
<description>Revision, JEP106 code flag, JEP106[6:4]</description>
<value>0xB6</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>PERIPH_ID6</name>
<description>Peripheral ID Register 6</description>
<addressOffset>0x00001FD8</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>ID</name>
<description>Peripheral ID</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>ID0</name>
<description>Part Number</description>
<value>0x01</value>
</enumeratedValue>
<enumeratedValue>
<name>ID4</name>
<description>4KB count, JEP106 continuation code</description>
<value>0x04</value>
</enumeratedValue>
<enumeratedValue>
<name>ID1</name>
<description>JEP106[3:0, part number[11:8]</description>
<value>0xB3</value>
</enumeratedValue>
<enumeratedValue>
<name>ID2</name>
<description>Revision, JEP106 code flag, JEP106[6:4]</description>
<value>0xB6</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>PERIPH_ID7</name>
<description>Peripheral ID Register 7</description>
<addressOffset>0x00001FDC</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>ID</name>
<description>Peripheral ID</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>ID0</name>
<description>Part Number</description>
<value>0x01</value>
</enumeratedValue>
<enumeratedValue>
<name>ID4</name>
<description>4KB count, JEP106 continuation code</description>
<value>0x04</value>
</enumeratedValue>
<enumeratedValue>
<name>ID1</name>
<description>JEP106[3:0, part number[11:8]</description>
<value>0xB3</value>
</enumeratedValue>
<enumeratedValue>
<name>ID2</name>
<description>Revision, JEP106 code flag, JEP106[6:4]</description>
<value>0xB6</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>PERIPH_ID0</name>
<description>Peripheral ID Register 0</description>
<addressOffset>0x00001FE0</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000001</resetValue>
<fields>
<field>
<name>ID</name>
<description>Peripheral ID</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>ID0</name>
<description>Part Number</description>
<value>0x01</value>
</enumeratedValue>
<enumeratedValue>
<name>ID4</name>
<description>4KB count, JEP106 continuation code</description>
<value>0x04</value>
</enumeratedValue>
<enumeratedValue>
<name>ID1</name>
<description>JEP106[3:0, part number[11:8]</description>
<value>0xB3</value>
</enumeratedValue>
<enumeratedValue>
<name>ID2</name>
<description>Revision, JEP106 code flag, JEP106[6:4]</description>
<value>0xB6</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>PERIPH_ID1</name>
<description>Peripheral ID Register 1</description>
<addressOffset>0x00001FE4</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x000000B3</resetValue>
<fields>
<field>
<name>ID</name>
<description>Peripheral ID</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>ID0</name>
<description>Part Number</description>
<value>0x01</value>
</enumeratedValue>
<enumeratedValue>
<name>ID4</name>
<description>4KB count, JEP106 continuation code</description>
<value>0x04</value>
</enumeratedValue>
<enumeratedValue>
<name>ID1</name>
<description>JEP106[3:0, part number[11:8]</description>
<value>0xB3</value>
</enumeratedValue>
<enumeratedValue>
<name>ID2</name>
<description>Revision, JEP106 code flag, JEP106[6:4]</description>
<value>0xB6</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>PERIPH_ID2</name>
<description>Peripheral ID Register 2</description>
<addressOffset>0x00001FE8</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x0000006B</resetValue>
<fields>
<field>
<name>ID</name>
<description>Peripheral ID</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>ID0</name>
<description>Part Number</description>
<value>0x01</value>
</enumeratedValue>
<enumeratedValue>
<name>ID4</name>
<description>4KB count, JEP106 continuation code</description>
<value>0x04</value>
</enumeratedValue>
<enumeratedValue>
<name>ID1</name>
<description>JEP106[3:0, part number[11:8]</description>
<value>0xB3</value>
</enumeratedValue>
<enumeratedValue>
<name>ID2</name>
<description>Revision, JEP106 code flag, JEP106[6:4]</description>
<value>0xB6</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>PERIPH_ID3</name>
<description>Peripheral ID Register 3</description>
<addressOffset>0x00001FEC</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>ID</name>
<description>Peripheral ID</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>ID0</name>
<description>Part Number</description>
<value>0x01</value>
</enumeratedValue>
<enumeratedValue>
<name>ID4</name>
<description>4KB count, JEP106 continuation code</description>
<value>0x04</value>
</enumeratedValue>
<enumeratedValue>
<name>ID1</name>
<description>JEP106[3:0, part number[11:8]</description>
<value>0xB3</value>
</enumeratedValue>
<enumeratedValue>
<name>ID2</name>
<description>Revision, JEP106 code flag, JEP106[6:4]</description>
<value>0xB6</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<dim>4</dim>
<dimIncrement>4</dimIncrement>
<dimIndex>0-3</dimIndex>
<name>COMP_ID[%s]</name>
<description>Component ID Register</description>
<addressOffset>0x00001FF0</addressOffset>
<size>32</size>
<access>read-only</access>
<fields>
<field>
<name>ID</name>
<description>Component ID</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>AMIB3_FN_MOD_BM_ISS</name>
<description>AMIB3 Bus Matrix Functionality Modification Register</description>
<addressOffset>0x00005008</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>RD_ISS</name>
<description>Read Issuing</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>WR_ISS</name>
<description>Write Issuing</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>AMIB3_FN_MOD2</name>
<description>AMIB3 Bypass Merge</description>
<addressOffset>0x00005024</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>BP_MRG</name>
<description>Bypass Merge</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>ASIB0_READ_QOS</name>
<description>ASIB0 Read Channel QoS Register</description>
<addressOffset>0x00042100</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>RD_QOS</name>
<description>Read QoS</description>
<bitOffset>0</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>ASIB0_WRITE_QOS</name>
<description>ASIB0 Write Channel QoS Register</description>
<addressOffset>0x00042104</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>WR_QOS</name>
<description>Write QoS</description>
<bitOffset>0</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>ASIB1_FN_MOD_AHB</name>
<description>ASIB1 AHB Functionality Modification Register</description>
<addressOffset>0x00043028</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>RD_INCR_OVR</name>
<description>Read INCR Override</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>WR_INCR_OVR</name>
<description>Write INCR override</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>LOCK_OVR</name>
<description>Lock Override</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>ASIB1_READ_QOS</name>
<description>ASIB1 Read Channel QoS Register</description>
<addressOffset>0x00043100</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>RD_QOS</name>
<description>Read QoS</description>
<bitOffset>0</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>ASIB1_WRITE_QOS</name>
<description>ASIB1 Write Channel QoS Register</description>
<addressOffset>0x00043104</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>WR_QOS</name>
<description>Write QoS</description>
<bitOffset>0</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>ASIB1_FN_MOD</name>
<description>ASIB1 Issuing Functionality Modification Register</description>
<addressOffset>0x00043108</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>RD_ISS</name>
<description>Read Issuing</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>WR_ISS</name>
<description>Write Issuing</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>HSMCI0</name>
<version>6449K</version>
<description>High Speed MultiMedia Card Interface 0</description>
<groupName>HSMCI</groupName>
<prependToName>HSMCI0_</prependToName>
<baseAddress>0xF0000000</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x4000</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>HSMCI0</name>
<value>21</value>
</interrupt>
<registers>
<register>
<name>CR</name>
<description>Control Register</description>
<addressOffset>0x00000000</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>MCIEN</name>
<description>Multi-Media Interface Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>MCIDIS</name>
<description>Multi-Media Interface Disable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PWSEN</name>
<description>Power Save Mode Enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PWSDIS</name>
<description>Power Save Mode Disable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SWRST</name>
<description>Software Reset</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>MR</name>
<description>Mode Register</description>
<addressOffset>0x00000004</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CLKDIV</name>
<description>Clock Divider</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>PWSDIV</name>
<description>Power Saving Divider</description>
<bitOffset>8</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
</field>
<field>
<name>RDPROOF</name>
<description>Read Proof Enable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>WRPROOF</name>
<description>Write Proof Enable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>FBYTE</name>
<description>Force Byte Transfer</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>PADV</name>
<description>Padding Value</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CLKODD</name>
<description>Clock divider is odd</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DTOR</name>
<description>Data Timeout Register</description>
<addressOffset>0x00000008</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DTOCYC</name>
<description>Data Timeout Cycle Number</description>
<bitOffset>0</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DTOMUL</name>
<description>Data Timeout Multiplier</description>
<bitOffset>4</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>1</name>
<description>DTOCYC</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>16</name>
<description>DTOCYC x 16</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>128</name>
<description>DTOCYC x 128</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>256</name>
<description>DTOCYC x 256</description>
<value>0x3</value>
</enumeratedValue>
<enumeratedValue>
<name>1024</name>
<description>DTOCYC x 1024</description>
<value>0x4</value>
</enumeratedValue>
<enumeratedValue>
<name>4096</name>
<description>DTOCYC x 4096</description>
<value>0x5</value>
</enumeratedValue>
<enumeratedValue>
<name>65536</name>
<description>DTOCYC x 65536</description>
<value>0x6</value>
</enumeratedValue>
<enumeratedValue>
<name>1048576</name>
<description>DTOCYC x 1048576</description>
<value>0x7</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>SDCR</name>
<description>SD/SDIO Card Register</description>
<addressOffset>0x0000000C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SDCSEL</name>
<description>SDCard/SDIO Slot</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>SLOTA</name>
<description>Slot A is selected.</description>
<value>0</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SDCBUS</name>
<description>SDCard/SDIO Bus Width</description>
<bitOffset>6</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>1</name>
<description>1 bit</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>4</name>
<description>4 bit</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>8</name>
<description>8 bit</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>ARGR</name>
<description>Argument Register</description>
<addressOffset>0x00000010</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>ARG</name>
<description>Command Argument</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>CMDR</name>
<description>Command Register</description>
<addressOffset>0x00000014</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>CMDNB</name>
<description>Command Number</description>
<bitOffset>0</bitOffset>
<bitWidth>6</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RSPTYP</name>
<description>Response Type</description>
<bitOffset>6</bitOffset>
<bitWidth>2</bitWidth>
<access>write-only</access>
<enumeratedValues>
<enumeratedValue>
<name>NORESP</name>
<description>No response.</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>48_BIT</name>
<description>48-bit response.</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>136_BIT</name>
<description>136-bit response.</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>R1B</name>
<description>R1b response type</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SPCMD</name>
<description>Special Command</description>
<bitOffset>8</bitOffset>
<bitWidth>3</bitWidth>
<access>write-only</access>
<enumeratedValues>
<enumeratedValue>
<name>STD</name>
<description>Not a special CMD.</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>INIT</name>
<description>Initialization CMD: 74 clock cycles for initialization sequence.</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>SYNC</name>
<description>Synchronized CMD: Wait for the end of the current data block transfer before sending the pending command.</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>CE_ATA</name>
<description>CE-ATA Completion Signal disable Command. The host cancels the ability for the device to return a command completion signal on the command line.</description>
<value>0x3</value>
</enumeratedValue>
<enumeratedValue>
<name>IT_CMD</name>
<description>Interrupt command: Corresponds to the Interrupt Mode (CMD40).</description>
<value>0x4</value>
</enumeratedValue>
<enumeratedValue>
<name>IT_RESP</name>
<description>Interrupt response: Corresponds to the Interrupt Mode (CMD40).</description>
<value>0x5</value>
</enumeratedValue>
<enumeratedValue>
<name>BOR</name>
<description>Boot Operation Request. Start a boot operation mode, the host processor can read boot data from the MMC device directly.</description>
<value>0x6</value>
</enumeratedValue>
<enumeratedValue>
<name>EBO</name>
<description>End Boot Operation. This command allows the host processor to terminate the boot operation mode.</description>
<value>0x7</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>OPDCMD</name>
<description>Open Drain Command</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
<enumeratedValues>
<enumeratedValue>
<name>PUSHPULL</name>
<description>Push pull command.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>OPENDRAIN</name>
<description>Open drain command.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>MAXLAT</name>
<description>Max Latency for Command to Response</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
<enumeratedValues>
<enumeratedValue>
<name>5</name>
<description>5-cycle max latency.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>64</name>
<description>64-cycle max latency.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>TRCMD</name>
<description>Transfer Command</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<access>write-only</access>
<enumeratedValues>
<enumeratedValue>
<name>NO_DATA</name>
<description>No data transfer</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>START_DATA</name>
<description>Start data transfer</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>STOP_DATA</name>
<description>Stop data transfer</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>TRDIR</name>
<description>Transfer Direction</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
<enumeratedValues>
<enumeratedValue>
<name>WRITE</name>
<description>Write.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>READ</name>
<description>Read.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>TRTYP</name>
<description>Transfer Type</description>
<bitOffset>19</bitOffset>
<bitWidth>3</bitWidth>
<access>write-only</access>
<enumeratedValues>
<enumeratedValue>
<name>SINGLE</name>
<description>MMC/SD Card Single Block</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>MULTIPLE</name>
<description>MMC/SD Card Multiple Block</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>STREAM</name>
<description>MMC Stream</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>BYTE</name>
<description>SDIO Byte</description>
<value>0x4</value>
</enumeratedValue>
<enumeratedValue>
<name>BLOCK</name>
<description>SDIO Block</description>
<value>0x5</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>IOSPCMD</name>
<description>SDIO Special Command</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
<access>write-only</access>
<enumeratedValues>
<enumeratedValue>
<name>STD</name>
<description>Not an SDIO Special Command</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>SUSPEND</name>
<description>SDIO Suspend Command</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>RESUME</name>
<description>SDIO Resume Command</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>ATACS</name>
<description>ATA with Command Completion Signal</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
<enumeratedValues>
<enumeratedValue>
<name>NORMAL</name>
<description>Normal operation mode.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>COMPLETION</name>
<description>This bit indicates that a completion signal is expected within a programmed amount of time (HSMCI_CSTOR).</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>BOOT_ACK</name>
<description>Boot Operation Acknowledge.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>BLKR</name>
<description>Block Register</description>
<addressOffset>0x00000018</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>BCNT</name>
<description>MMC/SDIO Block Count - SDIO Byte Count</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
<field>
<name>BLKLEN</name>
<description>Data Block Length</description>
<bitOffset>16</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>CSTOR</name>
<description>Completion Signal Timeout Register</description>
<addressOffset>0x0000001C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CSTOCYC</name>
<description>Completion Signal Timeout Cycle Number</description>
<bitOffset>0</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CSTOMUL</name>
<description>Completion Signal Timeout Multiplier</description>
<bitOffset>4</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>1</name>
<description>CSTOCYC x 1</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>16</name>
<description>CSTOCYC x 16</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>128</name>
<description>CSTOCYC x 128</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>256</name>
<description>CSTOCYC x 256</description>
<value>0x3</value>
</enumeratedValue>
<enumeratedValue>
<name>1024</name>
<description>CSTOCYC x 1024</description>
<value>0x4</value>
</enumeratedValue>
<enumeratedValue>
<name>4096</name>
<description>CSTOCYC x 4096</description>
<value>0x5</value>
</enumeratedValue>
<enumeratedValue>
<name>65536</name>
<description>CSTOCYC x 65536</description>
<value>0x6</value>
</enumeratedValue>
<enumeratedValue>
<name>1048576</name>
<description>CSTOCYC x 1048576</description>
<value>0x7</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<dim>4</dim>
<dimIncrement>4</dimIncrement>
<dimIndex>0-3</dimIndex>
<name>RSPR[%s]</name>
<description>Response Register</description>
<addressOffset>0x00000020</addressOffset>
<size>32</size>
<access>read-only</access>
<fields>
<field>
<name>RSP</name>
<description>Response</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>RDR</name>
<description>Receive Data Register</description>
<addressOffset>0x00000030</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DATA</name>
<description>Data to Read</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>TDR</name>
<description>Transmit Data Register</description>
<addressOffset>0x00000034</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>DATA</name>
<description>Data to Write</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>SR</name>
<description>Status Register</description>
<addressOffset>0x00000040</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x0000C0E5</resetValue>
<fields>
<field>
<name>CMDRDY</name>
<description>Command Ready</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXRDY</name>
<description>Receiver Ready</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY</name>
<description>Transmit Ready</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BLKE</name>
<description>Data Block Ended</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DTIP</name>
<description>Data Transfer in Progress</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NOTBUSY</name>
<description>HSMCI Not Busy</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SDIOIRQA</name>
<description>SDIO Interrupt for Slot A</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SDIOWAIT</name>
<description>SDIO Read Wait Operation Status</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CSRCV</name>
<description>CE-ATA Completion Signal Received</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RINDE</name>
<description>Response Index Error</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RDIRE</name>
<description>Response Direction Error</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RCRCE</name>
<description>Response CRC Error</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RENDE</name>
<description>Response End Bit Error</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RTOE</name>
<description>Response Time-out Error</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DCRCE</name>
<description>Data CRC Error</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DTOE</name>
<description>Data Time-out Error</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CSTOE</name>
<description>Completion Signal Time-out Error</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BLKOVRE</name>
<description>DMA Block Overrun Error</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DMADONE</name>
<description>DMA Transfer done</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>FIFOEMPTY</name>
<description>FIFO empty flag</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>XFRDONE</name>
<description>Transfer Done flag</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ACKRCV</name>
<description>Boot Operation Acknowledge Received</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ACKRCVE</name>
<description>Boot Operation Acknowledge Error</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>OVRE</name>
<description>Overrun</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>UNRE</name>
<description>Underrun</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>IER</name>
<description>Interrupt Enable Register</description>
<addressOffset>0x00000044</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>CMDRDY</name>
<description>Command Ready Interrupt Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY</name>
<description>Receiver Ready Interrupt Enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY</name>
<description>Transmit Ready Interrupt Enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BLKE</name>
<description>Data Block Ended Interrupt Enable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DTIP</name>
<description>Data Transfer in Progress Interrupt Enable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NOTBUSY</name>
<description>Data Not Busy Interrupt Enable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SDIOIRQA</name>
<description>SDIO Interrupt for Slot A Interrupt Enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SDIOWAIT</name>
<description>SDIO Read Wait Operation Status Interrupt Enable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CSRCV</name>
<description>Completion Signal Received Interrupt Enable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RINDE</name>
<description>Response Index Error Interrupt Enable</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RDIRE</name>
<description>Response Direction Error Interrupt Enable</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RCRCE</name>
<description>Response CRC Error Interrupt Enable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RENDE</name>
<description>Response End Bit Error Interrupt Enable</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RTOE</name>
<description>Response Time-out Error Interrupt Enable</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DCRCE</name>
<description>Data CRC Error Interrupt Enable</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DTOE</name>
<description>Data Time-out Error Interrupt Enable</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CSTOE</name>
<description>Completion Signal Timeout Error Interrupt Enable</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BLKOVRE</name>
<description>DMA Block Overrun Error Interrupt Enable</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DMADONE</name>
<description>DMA Transfer completed Interrupt Enable</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>FIFOEMPTY</name>
<description>FIFO empty Interrupt enable</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>XFRDONE</name>
<description>Transfer Done Interrupt enable</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ACKRCV</name>
<description>Boot Acknowledge Interrupt Enable</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ACKRCVE</name>
<description>Boot Acknowledge Error Interrupt Enable</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>OVRE</name>
<description>Overrun Interrupt Enable</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>UNRE</name>
<description>Underrun Interrupt Enable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IDR</name>
<description>Interrupt Disable Register</description>
<addressOffset>0x00000048</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>CMDRDY</name>
<description>Command Ready Interrupt Disable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY</name>
<description>Receiver Ready Interrupt Disable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY</name>
<description>Transmit Ready Interrupt Disable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BLKE</name>
<description>Data Block Ended Interrupt Disable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DTIP</name>
<description>Data Transfer in Progress Interrupt Disable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NOTBUSY</name>
<description>Data Not Busy Interrupt Disable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SDIOIRQA</name>
<description>SDIO Interrupt for Slot A Interrupt Disable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SDIOWAIT</name>
<description>SDIO Read Wait Operation Status Interrupt Disable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CSRCV</name>
<description>Completion Signal received interrupt Disable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RINDE</name>
<description>Response Index Error Interrupt Disable</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RDIRE</name>
<description>Response Direction Error Interrupt Disable</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RCRCE</name>
<description>Response CRC Error Interrupt Disable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RENDE</name>
<description>Response End Bit Error Interrupt Disable</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RTOE</name>
<description>Response Time-out Error Interrupt Disable</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DCRCE</name>
<description>Data CRC Error Interrupt Disable</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DTOE</name>
<description>Data Time-out Error Interrupt Disable</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CSTOE</name>
<description>Completion Signal Time out Error Interrupt Disable</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BLKOVRE</name>
<description>DMA Block Overrun Error Interrupt Disable</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DMADONE</name>
<description>DMA Transfer completed Interrupt Disable</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>FIFOEMPTY</name>
<description>FIFO empty Interrupt Disable</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>XFRDONE</name>
<description>Transfer Done Interrupt Disable</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ACKRCV</name>
<description>Boot Acknowledge Interrupt Disable</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ACKRCVE</name>
<description>Boot Acknowledge Error Interrupt Disable</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>OVRE</name>
<description>Overrun Interrupt Disable</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>UNRE</name>
<description>Underrun Interrupt Disable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IMR</name>
<description>Interrupt Mask Register</description>
<addressOffset>0x0000004C</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CMDRDY</name>
<description>Command Ready Interrupt Mask</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXRDY</name>
<description>Receiver Ready Interrupt Mask</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY</name>
<description>Transmit Ready Interrupt Mask</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BLKE</name>
<description>Data Block Ended Interrupt Mask</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DTIP</name>
<description>Data Transfer in Progress Interrupt Mask</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NOTBUSY</name>
<description>Data Not Busy Interrupt Mask</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SDIOIRQA</name>
<description>SDIO Interrupt for Slot A Interrupt Mask</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SDIOWAIT</name>
<description>SDIO Read Wait Operation Status Interrupt Mask</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CSRCV</name>
<description>Completion Signal Received Interrupt Mask</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RINDE</name>
<description>Response Index Error Interrupt Mask</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RDIRE</name>
<description>Response Direction Error Interrupt Mask</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RCRCE</name>
<description>Response CRC Error Interrupt Mask</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RENDE</name>
<description>Response End Bit Error Interrupt Mask</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RTOE</name>
<description>Response Time-out Error Interrupt Mask</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DCRCE</name>
<description>Data CRC Error Interrupt Mask</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DTOE</name>
<description>Data Time-out Error Interrupt Mask</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CSTOE</name>
<description>Completion Signal Time-out Error Interrupt Mask</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BLKOVRE</name>
<description>DMA Block Overrun Error Interrupt Mask</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DMADONE</name>
<description>DMA Transfer Completed Interrupt Mask</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>FIFOEMPTY</name>
<description>FIFO Empty Interrupt Mask</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>XFRDONE</name>
<description>Transfer Done Interrupt Mask</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ACKRCV</name>
<description>Boot Operation Acknowledge Received Interrupt Mask</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ACKRCVE</name>
<description>Boot Operation Acknowledge Error Interrupt Mask</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>OVRE</name>
<description>Overrun Interrupt Mask</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>UNRE</name>
<description>Underrun Interrupt Mask</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>DMA</name>
<description>DMA Configuration Register</description>
<addressOffset>0x00000050</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>OFFSET</name>
<description>DMA Write Buffer Offset</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CHKSIZE</name>
<description>DMA Channel Read and Write Chunk Size</description>
<bitOffset>4</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DMAEN</name>
<description>DMA Hardware Handshaking Enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>ROPT</name>
<description>Read Optimization with padding</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>CFG</name>
<description>Configuration Register</description>
<addressOffset>0x00000054</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>FIFOMODE</name>
<description>HSMCI Internal FIFO control mode</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>FERRCTRL</name>
<description>Flow Error flag reset control mode</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>HSMODE</name>
<description>High Speed Mode</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>LSYNC</name>
<description>Synchronize on the last block</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>WPMR</name>
<description>Write Protection Mode Register</description>
<addressOffset>0x000000E4</addressOffset>
<size>32</size>
<access>read-write</access>
<fields>
<field>
<name>WP_EN</name>
<description>Write Protection Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>WP_KEY</name>
<description>Write Protection Key password</description>
<bitOffset>8</bitOffset>
<bitWidth>24</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>WPSR</name>
<description>Write Protection Status Register</description>
<addressOffset>0x000000E8</addressOffset>
<size>32</size>
<access>read-only</access>
<fields>
<field>
<name>WP_VS</name>
<description>Write Protection Violation Status</description>
<bitOffset>0</bitOffset>
<bitWidth>4</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>NONE</name>
<description>No Write Protection Violation occurred since the last read of this register (WP_SR)</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>WRITE</name>
<description>Write Protection detected unauthorized attempt to write a control register had occurred (since the last read.)</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>RESET</name>
<description>Software reset had been performed while Write Protection was enabled (since the last read).</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>BOTH</name>
<description>Both Write Protection violation and software reset with Write Protection enabled have occurred since the last read.</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>WP_VSRC</name>
<description>Write Protection Violation SouRCe</description>
<bitOffset>8</bitOffset>
<bitWidth>16</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<dim>256</dim>
<dimIncrement>4</dimIncrement>
<dimIndex>0-255</dimIndex>
<name>FIFO[%s]</name>
<description>FIFO Memory Aperture0</description>
<addressOffset>0x00000200</addressOffset>
<size>32</size>
<access>read-write</access>
<fields>
<field>
<name>DATA</name>
<description>Data to Read or Data to Write</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>SPI0</name>
<version>6088T</version>
<description>Serial Peripheral Interface 0</description>
<groupName>SPI</groupName>
<prependToName>SPI0_</prependToName>
<baseAddress>0xF0004000</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x4000</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>SPI0</name>
<value>24</value>
</interrupt>
<registers>
<register>
<name>CR</name>
<description>Control Register</description>
<addressOffset>0x00000000</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>SPIEN</name>
<description>SPI Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SPIDIS</name>
<description>SPI Disable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SWRST</name>
<description>SPI Software Reset</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>LASTXFER</name>
<description>Last Transfer</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>MR</name>
<description>Mode Register</description>
<addressOffset>0x00000004</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>MSTR</name>
<description>Master/Slave Mode</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>PS</name>
<description>Peripheral Select</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>PCSDEC</name>
<description>Chip Select Decode</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>MODFDIS</name>
<description>Mode Fault Detection</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>WDRBT</name>
<description>Wait Data Read Before Transfer</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>LLB</name>
<description>Local Loopback Enable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>PCS</name>
<description>Peripheral Chip Select</description>
<bitOffset>16</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DLYBCS</name>
<description>Delay Between Chip Selects</description>
<bitOffset>24</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>RDR</name>
<description>Receive Data Register</description>
<addressOffset>0x00000008</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>RD</name>
<description>Receive Data</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PCS</name>
<description>Peripheral Chip Select</description>
<bitOffset>16</bitOffset>
<bitWidth>4</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>TDR</name>
<description>Transmit Data Register</description>
<addressOffset>0x0000000C</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>TD</name>
<description>Transmit Data</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PCS</name>
<description>Peripheral Chip Select</description>
<bitOffset>16</bitOffset>
<bitWidth>4</bitWidth>
<access>write-only</access>
</field>
<field>
<name>LASTXFER</name>
<description>Last Transfer</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>SR</name>
<description>Status Register</description>
<addressOffset>0x00000010</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x000000F0</resetValue>
<fields>
<field>
<name>RDRF</name>
<description>Receive Data Register Full</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TDRE</name>
<description>Transmit Data Register Empty</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>MODF</name>
<description>Mode Fault Error</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>OVRES</name>
<description>Overrun Error Status</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NSSR</name>
<description>NSS Rising</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXEMPTY</name>
<description>Transmission Registers Empty</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>UNDES</name>
<description>Underrun Error Status (Slave Mode Only)</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SPIENS</name>
<description>SPI Enable Status</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>IER</name>
<description>Interrupt Enable Register</description>
<addressOffset>0x00000014</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>RDRF</name>
<description>Receive Data Register Full Interrupt Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TDRE</name>
<description>SPI Transmit Data Register Empty Interrupt Enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>MODF</name>
<description>Mode Fault Error Interrupt Enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>OVRES</name>
<description>Overrun Error Interrupt Enable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NSSR</name>
<description>NSS Rising Interrupt Enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXEMPTY</name>
<description>Transmission Registers Empty Enable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>UNDES</name>
<description>Underrun Error Interrupt Enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IDR</name>
<description>Interrupt Disable Register</description>
<addressOffset>0x00000018</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>RDRF</name>
<description>Receive Data Register Full Interrupt Disable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TDRE</name>
<description>SPI Transmit Data Register Empty Interrupt Disable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>MODF</name>
<description>Mode Fault Error Interrupt Disable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>OVRES</name>
<description>Overrun Error Interrupt Disable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NSSR</name>
<description>NSS Rising Interrupt Disable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXEMPTY</name>
<description>Transmission Registers Empty Disable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>UNDES</name>
<description>Underrun Error Interrupt Disable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IMR</name>
<description>Interrupt Mask Register</description>
<addressOffset>0x0000001C</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>RDRF</name>
<description>Receive Data Register Full Interrupt Mask</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TDRE</name>
<description>SPI Transmit Data Register Empty Interrupt Mask</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>MODF</name>
<description>Mode Fault Error Interrupt Mask</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>OVRES</name>
<description>Overrun Error Interrupt Mask</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NSSR</name>
<description>NSS Rising Interrupt Mask</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXEMPTY</name>
<description>Transmission Registers Empty Mask</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>UNDES</name>
<description>Underrun Error Interrupt Mask</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<dim>4</dim>
<dimIncrement>4</dimIncrement>
<dimIndex>0-3</dimIndex>
<name>CSR[%s]</name>
<description>Chip Select Register</description>
<addressOffset>0x00000030</addressOffset>
<size>32</size>
<access>read-write</access>
<fields>
<field>
<name>CPOL</name>
<description>Clock Polarity</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>NCPHA</name>
<description>Clock Phase</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CSNAAT</name>
<description>Chip Select Not Active After Transfer (Ignored if CSAAT = 1)</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CSAAT</name>
<description>Chip Select Active After Transfer</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>BITS</name>
<description>Bits Per Transfer</description>
<bitOffset>4</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>8_BIT</name>
<description>8 bits for transfer</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>9_BIT</name>
<description>9 bits for transfer</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>10_BIT</name>
<description>10 bits for transfer</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>11_BIT</name>
<description>11 bits for transfer</description>
<value>0x3</value>
</enumeratedValue>
<enumeratedValue>
<name>12_BIT</name>
<description>12 bits for transfer</description>
<value>0x4</value>
</enumeratedValue>
<enumeratedValue>
<name>13_BIT</name>
<description>13 bits for transfer</description>
<value>0x5</value>
</enumeratedValue>
<enumeratedValue>
<name>14_BIT</name>
<description>14 bits for transfer</description>
<value>0x6</value>
</enumeratedValue>
<enumeratedValue>
<name>15_BIT</name>
<description>15 bits for transfer</description>
<value>0x7</value>
</enumeratedValue>
<enumeratedValue>
<name>16_BIT</name>
<description>16 bits for transfer</description>
<value>0x8</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SCBR</name>
<description>Serial Clock Baud Rate</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DLYBS</name>
<description>Delay Before SPCK</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DLYBCT</name>
<description>Delay Between Consecutive Transfers</description>
<bitOffset>24</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>WPMR</name>
<description>Write Protection Control Register</description>
<addressOffset>0x000000E4</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>WPEN</name>
<description>Write Protection Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>WPKEY</name>
<description>Write Protection Key Password</description>
<bitOffset>8</bitOffset>
<bitWidth>24</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>WPSR</name>
<description>Write Protection Status Register</description>
<addressOffset>0x000000E8</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>WPVS</name>
<description>Write Protection Violation Status</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>WPVSRC</name>
<description>Write Protection Violation Source</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>SSC0</name>
<version>6078L</version>
<description>Synchronous Serial Controller 0</description>
<groupName>SSC</groupName>
<prependToName>SSC0_</prependToName>
<baseAddress>0xF0008000</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x4000</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>SSC0</name>
<value>38</value>
</interrupt>
<registers>
<register>
<name>CR</name>
<description>Control Register</description>
<addressOffset>0x00000000</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>RXEN</name>
<description>Receive Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXDIS</name>
<description>Receive Disable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXEN</name>
<description>Transmit Enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXDIS</name>
<description>Transmit Disable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SWRST</name>
<description>Software Reset</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>CMR</name>
<description>Clock Mode Register</description>
<addressOffset>0x00000004</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DIV</name>
<description>Clock Divider</description>
<bitOffset>0</bitOffset>
<bitWidth>12</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>RCMR</name>
<description>Receive Clock Mode Register</description>
<addressOffset>0x00000010</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CKS</name>
<description>Receive Clock Selection</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>MCK</name>
<description>Divided Clock</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>TK</name>
<description>TK Clock signal</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>RK</name>
<description>RK pin</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CKO</name>
<description>Receive Clock Output Mode Selection</description>
<bitOffset>2</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>NONE</name>
<description>None, RK pin is an input</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>CONTINUOUS</name>
<description>Continuous Receive Clock, RK pin is an output</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>TRANSFER</name>
<description>Receive Clock only during data transfers, RK pin is an output</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CKI</name>
<description>Receive Clock Inversion</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CKG</name>
<description>Receive Clock Gating Selection</description>
<bitOffset>6</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CONTINUOUS</name>
<description>None</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>EN_RF_LOW</name>
<description>Receive Clock enabled only if RF Pin is Low</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>EN_RF_HIGH</name>
<description>Receive Clock enabled only if RF Pin is High</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>START</name>
<description>Receive Start Selection</description>
<bitOffset>8</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CONTINUOUS</name>
<description>Continuous, as soon as the receiver is enabled, and immediately after the end of transfer of the previous data.</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>TRANSMIT</name>
<description>Transmit start</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>RF_LOW</name>
<description>Detection of a low level on RF signal</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>RF_HIGH</name>
<description>Detection of a high level on RF signal</description>
<value>0x3</value>
</enumeratedValue>
<enumeratedValue>
<name>RF_FALLING</name>
<description>Detection of a falling edge on RF signal</description>
<value>0x4</value>
</enumeratedValue>
<enumeratedValue>
<name>RF_RISING</name>
<description>Detection of a rising edge on RF signal</description>
<value>0x5</value>
</enumeratedValue>
<enumeratedValue>
<name>RF_LEVEL</name>
<description>Detection of any level change on RF signal</description>
<value>0x6</value>
</enumeratedValue>
<enumeratedValue>
<name>RF_EDGE</name>
<description>Detection of any edge on RF signal</description>
<value>0x7</value>
</enumeratedValue>
<enumeratedValue>
<name>CMP_0</name>
<description>Compare 0</description>
<value>0x8</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>STOP</name>
<description>Receive Stop Selection</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>STTDLY</name>
<description>Receive Start Delay</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>PERIOD</name>
<description>Receive Period Divider Selection</description>
<bitOffset>24</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>RFMR</name>
<description>Receive Frame Mode Register</description>
<addressOffset>0x00000014</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DATLEN</name>
<description>Data Length</description>
<bitOffset>0</bitOffset>
<bitWidth>5</bitWidth>
<access>read-write</access>
</field>
<field>
<name>LOOP</name>
<description>Loop Mode</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>MSBF</name>
<description>Most Significant Bit First</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DATNB</name>
<description>Data Number per Frame</description>
<bitOffset>8</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>FSLEN</name>
<description>Receive Frame Sync Length</description>
<bitOffset>16</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>FSOS</name>
<description>Receive Frame Sync Output Selection</description>
<bitOffset>20</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>NONE</name>
<description>None, RF pin is an input</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>NEGATIVE</name>
<description>Negative Pulse, RF pin is an output</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>POSITIVE</name>
<description>Positive Pulse, RF pin is an output</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>LOW</name>
<description>Driven Low during data transfer, RF pin is an output</description>
<value>0x3</value>
</enumeratedValue>
<enumeratedValue>
<name>HIGH</name>
<description>Driven High during data transfer, RF pin is an output</description>
<value>0x4</value>
</enumeratedValue>
<enumeratedValue>
<name>TOGGLING</name>
<description>Toggling at each start of data transfer, RF pin is an output</description>
<value>0x5</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>FSEDGE</name>
<description>Frame Sync Edge Detection</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>POSITIVE</name>
<description>Positive Edge Detection</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>NEGATIVE</name>
<description>Negative Edge Detection</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>FSLEN_EXT</name>
<description>FSLEN Field Extension</description>
<bitOffset>28</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>TCMR</name>
<description>Transmit Clock Mode Register</description>
<addressOffset>0x00000018</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CKS</name>
<description>Transmit Clock Selection</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>MCK</name>
<description>Divided Clock</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>RK</name>
<description>RK Clock signal</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>TK</name>
<description>TK pin</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CKO</name>
<description>Transmit Clock Output Mode Selection</description>
<bitOffset>2</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>NONE</name>
<description>None, TK pin is an input</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>CONTINUOUS</name>
<description>Continuous Transmit Clock, TK pin is an output</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>TRANSFER</name>
<description>Transmit Clock only during data transfers, TK pin is an output</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CKI</name>
<description>Transmit Clock Inversion</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CKG</name>
<description>Transmit Clock Gating Selection</description>
<bitOffset>6</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CONTINUOUS</name>
<description>None</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>EN_TF_LOW</name>
<description>Transmit Clock enabled only if TF pin is Low</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>EN_TF_HIGH</name>
<description>Transmit Clock enabled only if TF pin is High</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>START</name>
<description>Transmit Start Selection</description>
<bitOffset>8</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CONTINUOUS</name>
<description>Continuous, as soon as a word is written in the SSC_THR Register (if Transmit is enabled), and immediately after the end of transfer of the previous data.</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>RECEIVE</name>
<description>Receive start</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>TF_LOW</name>
<description>Detection of a low level on TF signal</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>TF_HIGH</name>
<description>Detection of a high level on TF signal</description>
<value>0x3</value>
</enumeratedValue>
<enumeratedValue>
<name>TF_FALLING</name>
<description>Detection of a falling edge on TF signal</description>
<value>0x4</value>
</enumeratedValue>
<enumeratedValue>
<name>TF_RISING</name>
<description>Detection of a rising edge on TF signal</description>
<value>0x5</value>
</enumeratedValue>
<enumeratedValue>
<name>TF_LEVEL</name>
<description>Detection of any level change on TF signal</description>
<value>0x6</value>
</enumeratedValue>
<enumeratedValue>
<name>TF_EDGE</name>
<description>Detection of any edge on TF signal</description>
<value>0x7</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>STTDLY</name>
<description>Transmit Start Delay</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>PERIOD</name>
<description>Transmit Period Divider Selection</description>
<bitOffset>24</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>TFMR</name>
<description>Transmit Frame Mode Register</description>
<addressOffset>0x0000001C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DATLEN</name>
<description>Data Length</description>
<bitOffset>0</bitOffset>
<bitWidth>5</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DATDEF</name>
<description>Data Default Value</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>MSBF</name>
<description>Most Significant Bit First</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DATNB</name>
<description>Data Number per frame</description>
<bitOffset>8</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>FSLEN</name>
<description>Transmit Frame Sync Length</description>
<bitOffset>16</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>FSOS</name>
<description>Transmit Frame Sync Output Selection</description>
<bitOffset>20</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>NONE</name>
<description>None, TF pin is an input</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>NEGATIVE</name>
<description>Negative Pulse, TF pin is an output</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>POSITIVE</name>
<description>Positive Pulse,TF pin is an output</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>LOW</name>
<description>TF pin Driven Low during data transfer</description>
<value>0x3</value>
</enumeratedValue>
<enumeratedValue>
<name>HIGH</name>
<description>TF pin Driven High during data transfer</description>
<value>0x4</value>
</enumeratedValue>
<enumeratedValue>
<name>TOGGLING</name>
<description>TF pin Toggles at each start of data transfer</description>
<value>0x5</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>FSDEN</name>
<description>Frame Sync Data Enable</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>FSEDGE</name>
<description>Frame Sync Edge Detection</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>POSITIVE</name>
<description>Positive Edge Detection</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>NEGATIVE</name>
<description>Negative Edge Detection</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>FSLEN_EXT</name>
<description>FSLEN Field Extension</description>
<bitOffset>28</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>RHR</name>
<description>Receive Holding Register</description>
<addressOffset>0x00000020</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>RDAT</name>
<description>Receive Data</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>THR</name>
<description>Transmit Holding Register</description>
<addressOffset>0x00000024</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>TDAT</name>
<description>Transmit Data</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>RSHR</name>
<description>Receive Sync. Holding Register</description>
<addressOffset>0x00000030</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>RSDAT</name>
<description>Receive Synchronization Data</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>TSHR</name>
<description>Transmit Sync. Holding Register</description>
<addressOffset>0x00000034</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>TSDAT</name>
<description>Transmit Synchronization Data</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>RC0R</name>
<description>Receive Compare 0 Register</description>
<addressOffset>0x00000038</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CP0</name>
<description>Receive Compare Data 0</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>RC1R</name>
<description>Receive Compare 1 Register</description>
<addressOffset>0x0000003C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CP1</name>
<description>Receive Compare Data 1</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>SR</name>
<description>Status Register</description>
<addressOffset>0x00000040</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x000000CC</resetValue>
<fields>
<field>
<name>TXRDY</name>
<description>Transmit Ready</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXEMPTY</name>
<description>Transmit Empty</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXRDY</name>
<description>Receive Ready</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>OVRUN</name>
<description>Receive Overrun</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CP0</name>
<description>Compare 0</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CP1</name>
<description>Compare 1</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXSYN</name>
<description>Transmit Sync</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXSYN</name>
<description>Receive Sync</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXEN</name>
<description>Transmit Enable</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXEN</name>
<description>Receive Enable</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>IER</name>
<description>Interrupt Enable Register</description>
<addressOffset>0x00000044</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>TXRDY</name>
<description>Transmit Ready Interrupt Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXEMPTY</name>
<description>Transmit Empty Interrupt Enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY</name>
<description>Receive Ready Interrupt Enable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>OVRUN</name>
<description>Receive Overrun Interrupt Enable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CP0</name>
<description>Compare 0 Interrupt Enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CP1</name>
<description>Compare 1 Interrupt Enable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXSYN</name>
<description>Tx Sync Interrupt Enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXSYN</name>
<description>Rx Sync Interrupt Enable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IDR</name>
<description>Interrupt Disable Register</description>
<addressOffset>0x00000048</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>TXRDY</name>
<description>Transmit Ready Interrupt Disable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXEMPTY</name>
<description>Transmit Empty Interrupt Disable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY</name>
<description>Receive Ready Interrupt Disable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>OVRUN</name>
<description>Receive Overrun Interrupt Disable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CP0</name>
<description>Compare 0 Interrupt Disable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CP1</name>
<description>Compare 1 Interrupt Disable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXSYN</name>
<description>Tx Sync Interrupt Enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXSYN</name>
<description>Rx Sync Interrupt Enable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IMR</name>
<description>Interrupt Mask Register</description>
<addressOffset>0x0000004C</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>TXRDY</name>
<description>Transmit Ready Interrupt Mask</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXEMPTY</name>
<description>Transmit Empty Interrupt Mask</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXRDY</name>
<description>Receive Ready Interrupt Mask</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>OVRUN</name>
<description>Receive Overrun Interrupt Mask</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CP0</name>
<description>Compare 0 Interrupt Mask</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CP1</name>
<description>Compare 1 Interrupt Mask</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXSYN</name>
<description>Tx Sync Interrupt Mask</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXSYN</name>
<description>Rx Sync Interrupt Mask</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>WPMR</name>
<description>Write Protect Mode Register</description>
<addressOffset>0x000000E4</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>WPEN</name>
<description>Write Protect Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>WPKEY</name>
<description>Write Protect KEY</description>
<bitOffset>8</bitOffset>
<bitWidth>24</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>WPSR</name>
<description>Write Protect Status Register</description>
<addressOffset>0x000000E8</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
</register>
</registers>
</peripheral>
<peripheral>
<name>TC0</name>
<version>6082Q</version>
<description>Timer Counter 0</description>
<groupName>TC</groupName>
<prependToName>TC0_</prependToName>
<baseAddress>0xF0010000</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x4000</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>TC0</name>
<value>26</value>
</interrupt>
<interrupt>
<name>TC1</name>
<value>27</value>
</interrupt>
<registers>
<register>
<name>CCR0</name>
<description>Channel Control Register (channel = 0)</description>
<addressOffset>0x00000000</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>CLKEN</name>
<description>Counter Clock Enable Command</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CLKDIS</name>
<description>Counter Clock Disable Command</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SWTRG</name>
<description>Software Trigger Command</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>CMR0</name>
<description>Channel Mode Register (channel = 0)</description>
<addressOffset>0x00000004</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>TCCLKS</name>
<description>Clock Selection</description>
<bitOffset>0</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>TIMER_CLOCK1</name>
<description>Clock selected: TCLK1</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>TIMER_CLOCK2</name>
<description>Clock selected: TCLK2</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>TIMER_CLOCK3</name>
<description>Clock selected: TCLK3</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>TIMER_CLOCK4</name>
<description>Clock selected: TCLK4</description>
<value>0x3</value>
</enumeratedValue>
<enumeratedValue>
<name>TIMER_CLOCK5</name>
<description>Clock selected: TCLK5</description>
<value>0x4</value>
</enumeratedValue>
<enumeratedValue>
<name>XC0</name>
<description>Clock selected: XC0</description>
<value>0x5</value>
</enumeratedValue>
<enumeratedValue>
<name>XC1</name>
<description>Clock selected: XC1</description>
<value>0x6</value>
</enumeratedValue>
<enumeratedValue>
<name>XC2</name>
<description>Clock selected: XC2</description>
<value>0x7</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CLKI</name>
<description>Clock Invert</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>BURST</name>
<description>Burst Signal Selection</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>NONE</name>
<description>The clock is not gated by an external signal.</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>XC0</name>
<description>XC0 is ANDed with the selected clock.</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>XC1</name>
<description>XC1 is ANDed with the selected clock.</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>XC2</name>
<description>XC2 is ANDed with the selected clock.</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LDBSTOP</name>
<description>Counter Clock Stopped with RB Loading</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>LDBDIS</name>
<description>Counter Clock Disable with RB Loading</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>ETRGEDG</name>
<description>External Trigger Edge Selection</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>NONE</name>
<description>The clock is not gated by an external signal.</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>RISING</name>
<description>Rising edge</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>FALLING</name>
<description>Falling edge</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>EDGE</name>
<description>Each edge</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>ABETRG</name>
<description>TIOA or TIOB External Trigger Selection</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CPCTRG</name>
<description>RC Compare Trigger Enable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>WAVE</name>
<description>Waveform Mode</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>LDRA</name>
<description>RA Loading Edge Selection</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>NONE</name>
<description>None</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>RISING</name>
<description>Rising edge of TIOA</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>FALLING</name>
<description>Falling edge of TIOA</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>EDGE</name>
<description>Each edge of TIOA</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LDRB</name>
<description>RB Loading Edge Selection</description>
<bitOffset>18</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>NONE</name>
<description>None</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>RISING</name>
<description>Rising edge of TIOA</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>FALLING</name>
<description>Falling edge of TIOA</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>EDGE</name>
<description>Each edge of TIOA</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>CMR0_WAVE_EQ_1</name>
<description>Channel Mode Register (channel = 0)</description>
<alternateGroup>WAVE_EQ_1</alternateGroup>
<addressOffset>0x00000004</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>TCCLKS</name>
<description>Clock Selection</description>
<bitOffset>0</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>TIMER_CLOCK1</name>
<description>Clock selected: TCLK1</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>TIMER_CLOCK2</name>
<description>Clock selected: TCLK2</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>TIMER_CLOCK3</name>
<description>Clock selected: TCLK3</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>TIMER_CLOCK4</name>
<description>Clock selected: TCLK4</description>
<value>0x3</value>
</enumeratedValue>
<enumeratedValue>
<name>TIMER_CLOCK5</name>
<description>Clock selected: TCLK5</description>
<value>0x4</value>
</enumeratedValue>
<enumeratedValue>
<name>XC0</name>
<description>Clock selected: XC0</description>
<value>0x5</value>
</enumeratedValue>
<enumeratedValue>
<name>XC1</name>
<description>Clock selected: XC1</description>
<value>0x6</value>
</enumeratedValue>
<enumeratedValue>
<name>XC2</name>
<description>Clock selected: XC2</description>
<value>0x7</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CLKI</name>
<description>Clock Invert</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>BURST</name>
<description>Burst Signal Selection</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>NONE</name>
<description>The clock is not gated by an external signal.</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>XC0</name>
<description>XC0 is ANDed with the selected clock.</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>XC1</name>
<description>XC1 is ANDed with the selected clock.</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>XC2</name>
<description>XC2 is ANDed with the selected clock.</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CPCSTOP</name>
<description>Counter Clock Stopped with RC Compare</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CPCDIS</name>
<description>Counter Clock Disable with RC Compare</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>EEVTEDG</name>
<description>External Event Edge Selection</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>NONE</name>
<description>None</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>RISING</name>
<description>Rising edge</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>FALLING</name>
<description>Falling edge</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>EDGE</name>
<description>Each edge</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>EEVT</name>
<description>External Event Selection</description>
<bitOffset>10</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>TIOB</name>
<description>TIOB</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>XC0</name>
<description>XC0</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>XC1</name>
<description>XC1</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>XC2</name>
<description>XC2</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>ENETRG</name>
<description>External Event Trigger Enable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>WAVSEL</name>
<description>Waveform Selection</description>
<bitOffset>13</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>UP</name>
<description>UP mode without automatic trigger on RC Compare</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>UPDOWN</name>
<description>UPDOWN mode without automatic trigger on RC Compare</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>UP_RC</name>
<description>UP mode with automatic trigger on RC Compare</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>UPDOWN_RC</name>
<description>UPDOWN mode with automatic trigger on RC Compare</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>WAVE</name>
<description>Waveform Mode</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>ACPA</name>
<description>RA Compare Effect on TIOA</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>NONE</name>
<description>None</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>SET</name>
<description>Set</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>CLEAR</name>
<description>Clear</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>TOGGLE</name>
<description>Toggle</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>ACPC</name>
<description>RC Compare Effect on TIOA</description>
<bitOffset>18</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>NONE</name>
<description>None</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>SET</name>
<description>Set</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>CLEAR</name>
<description>Clear</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>TOGGLE</name>
<description>Toggle</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>AEEVT</name>
<description>External Event Effect on TIOA</description>
<bitOffset>20</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>NONE</name>
<description>None</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>SET</name>
<description>Set</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>CLEAR</name>
<description>Clear</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>TOGGLE</name>
<description>Toggle</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>ASWTRG</name>
<description>Software Trigger Effect on TIOA</description>
<bitOffset>22</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>NONE</name>
<description>None</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>SET</name>
<description>Set</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>CLEAR</name>
<description>Clear</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>TOGGLE</name>
<description>Toggle</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>BCPB</name>
<description>RB Compare Effect on TIOB</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>NONE</name>
<description>None</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>SET</name>
<description>Set</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>CLEAR</name>
<description>Clear</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>TOGGLE</name>
<description>Toggle</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>BCPC</name>
<description>RC Compare Effect on TIOB</description>
<bitOffset>26</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>NONE</name>
<description>None</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>SET</name>
<description>Set</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>CLEAR</name>
<description>Clear</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>TOGGLE</name>
<description>Toggle</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>BEEVT</name>
<description>External Event Effect on TIOB</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>NONE</name>
<description>None</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>SET</name>
<description>Set</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>CLEAR</name>
<description>Clear</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>TOGGLE</name>
<description>Toggle</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>BSWTRG</name>
<description>Software Trigger Effect on TIOB</description>
<bitOffset>30</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>NONE</name>
<description>None</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>SET</name>
<description>Set</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>CLEAR</name>
<description>Clear</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>TOGGLE</name>
<description>Toggle</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>SMMR0</name>
<description>Stepper Motor Mode Register (channel = 0)</description>
<addressOffset>0x00000008</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>GCEN</name>
<description>Gray Count Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DOWN</name>
<description>DOWN Count</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>RAB0</name>
<description>Register AB (channel = 0)</description>
<addressOffset>0x0000000C</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>RAB</name>
<description>Register A or Register B</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>CV0</name>
<description>Counter Value (channel = 0)</description>
<addressOffset>0x00000010</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CV</name>
<description>Counter Value</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>RA0</name>
<description>Register A (channel = 0)</description>
<addressOffset>0x00000014</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>RA</name>
<description>Register A</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>RB0</name>
<description>Register B (channel = 0)</description>
<addressOffset>0x00000018</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>RB</name>
<description>Register B</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>RC0</name>
<description>Register C (channel = 0)</description>
<addressOffset>0x0000001C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>RC</name>
<description>Register C</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>SR0</name>
<description>Status Register (channel = 0)</description>
<addressOffset>0x00000020</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>COVFS</name>
<description>Counter Overflow Status</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>LOVRS</name>
<description>Load Overrun Status</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CPAS</name>
<description>RA Compare Status</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CPBS</name>
<description>RB Compare Status</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CPCS</name>
<description>RC Compare Status</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>LDRAS</name>
<description>RA Loading Status</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>LDRBS</name>
<description>RB Loading Status</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ETRGS</name>
<description>External Trigger Status</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CLKSTA</name>
<description>Clock Enabling Status</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>MTIOA</name>
<description>TIOA Mirror</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>MTIOB</name>
<description>TIOB Mirror</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>IER0</name>
<description>Interrupt Enable Register (channel = 0)</description>
<addressOffset>0x00000024</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>COVFS</name>
<description>Counter Overflow</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>LOVRS</name>
<description>Load Overrun</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CPAS</name>
<description>RA Compare</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CPBS</name>
<description>RB Compare</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CPCS</name>
<description>RC Compare</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>LDRAS</name>
<description>RA Loading</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>LDRBS</name>
<description>RB Loading</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ETRGS</name>
<description>External Trigger</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IDR0</name>
<description>Interrupt Disable Register (channel = 0)</description>
<addressOffset>0x00000028</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>COVFS</name>
<description>Counter Overflow</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>LOVRS</name>
<description>Load Overrun</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CPAS</name>
<description>RA Compare</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CPBS</name>
<description>RB Compare</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CPCS</name>
<description>RC Compare</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>LDRAS</name>
<description>RA Loading</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>LDRBS</name>
<description>RB Loading</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ETRGS</name>
<description>External Trigger</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IMR0</name>
<description>Interrupt Mask Register (channel = 0)</description>
<addressOffset>0x0000002C</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>COVFS</name>
<description>Counter Overflow</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>LOVRS</name>
<description>Load Overrun</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CPAS</name>
<description>RA Compare</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CPBS</name>
<description>RB Compare</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CPCS</name>
<description>RC Compare</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>LDRAS</name>
<description>RA Loading</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>LDRBS</name>
<description>RB Loading</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ETRGS</name>
<description>External Trigger</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>CCR1</name>
<description>Channel Control Register (channel = 1)</description>
<addressOffset>0x00000040</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>CLKEN</name>
<description>Counter Clock Enable Command</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CLKDIS</name>
<description>Counter Clock Disable Command</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SWTRG</name>
<description>Software Trigger Command</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>CMR1</name>
<description>Channel Mode Register (channel = 1)</description>
<addressOffset>0x00000044</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>TCCLKS</name>
<description>Clock Selection</description>
<bitOffset>0</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>TIMER_CLOCK1</name>
<description>Clock selected: TCLK1</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>TIMER_CLOCK2</name>
<description>Clock selected: TCLK2</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>TIMER_CLOCK3</name>
<description>Clock selected: TCLK3</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>TIMER_CLOCK4</name>
<description>Clock selected: TCLK4</description>
<value>0x3</value>
</enumeratedValue>
<enumeratedValue>
<name>TIMER_CLOCK5</name>
<description>Clock selected: TCLK5</description>
<value>0x4</value>
</enumeratedValue>
<enumeratedValue>
<name>XC0</name>
<description>Clock selected: XC0</description>
<value>0x5</value>
</enumeratedValue>
<enumeratedValue>
<name>XC1</name>
<description>Clock selected: XC1</description>
<value>0x6</value>
</enumeratedValue>
<enumeratedValue>
<name>XC2</name>
<description>Clock selected: XC2</description>
<value>0x7</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CLKI</name>
<description>Clock Invert</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>BURST</name>
<description>Burst Signal Selection</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>NONE</name>
<description>The clock is not gated by an external signal.</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>XC0</name>
<description>XC0 is ANDed with the selected clock.</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>XC1</name>
<description>XC1 is ANDed with the selected clock.</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>XC2</name>
<description>XC2 is ANDed with the selected clock.</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LDBSTOP</name>
<description>Counter Clock Stopped with RB Loading</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>LDBDIS</name>
<description>Counter Clock Disable with RB Loading</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>ETRGEDG</name>
<description>External Trigger Edge Selection</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>NONE</name>
<description>The clock is not gated by an external signal.</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>RISING</name>
<description>Rising edge</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>FALLING</name>
<description>Falling edge</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>EDGE</name>
<description>Each edge</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>ABETRG</name>
<description>TIOA or TIOB External Trigger Selection</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CPCTRG</name>
<description>RC Compare Trigger Enable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>WAVE</name>
<description>Waveform Mode</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>LDRA</name>
<description>RA Loading Edge Selection</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>NONE</name>
<description>None</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>RISING</name>
<description>Rising edge of TIOA</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>FALLING</name>
<description>Falling edge of TIOA</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>EDGE</name>
<description>Each edge of TIOA</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LDRB</name>
<description>RB Loading Edge Selection</description>
<bitOffset>18</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>NONE</name>
<description>None</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>RISING</name>
<description>Rising edge of TIOA</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>FALLING</name>
<description>Falling edge of TIOA</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>EDGE</name>
<description>Each edge of TIOA</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>CMR1_WAVE_EQ_1</name>
<description>Channel Mode Register (channel = 1)</description>
<alternateGroup>WAVE_EQ_1</alternateGroup>
<addressOffset>0x00000044</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>TCCLKS</name>
<description>Clock Selection</description>
<bitOffset>0</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>TIMER_CLOCK1</name>
<description>Clock selected: TCLK1</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>TIMER_CLOCK2</name>
<description>Clock selected: TCLK2</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>TIMER_CLOCK3</name>
<description>Clock selected: TCLK3</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>TIMER_CLOCK4</name>
<description>Clock selected: TCLK4</description>
<value>0x3</value>
</enumeratedValue>
<enumeratedValue>
<name>TIMER_CLOCK5</name>
<description>Clock selected: TCLK5</description>
<value>0x4</value>
</enumeratedValue>
<enumeratedValue>
<name>XC0</name>
<description>Clock selected: XC0</description>
<value>0x5</value>
</enumeratedValue>
<enumeratedValue>
<name>XC1</name>
<description>Clock selected: XC1</description>
<value>0x6</value>
</enumeratedValue>
<enumeratedValue>
<name>XC2</name>
<description>Clock selected: XC2</description>
<value>0x7</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CLKI</name>
<description>Clock Invert</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>BURST</name>
<description>Burst Signal Selection</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>NONE</name>
<description>The clock is not gated by an external signal.</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>XC0</name>
<description>XC0 is ANDed with the selected clock.</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>XC1</name>
<description>XC1 is ANDed with the selected clock.</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>XC2</name>
<description>XC2 is ANDed with the selected clock.</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CPCSTOP</name>
<description>Counter Clock Stopped with RC Compare</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CPCDIS</name>
<description>Counter Clock Disable with RC Compare</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>EEVTEDG</name>
<description>External Event Edge Selection</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>NONE</name>
<description>None</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>RISING</name>
<description>Rising edge</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>FALLING</name>
<description>Falling edge</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>EDGE</name>
<description>Each edge</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>EEVT</name>
<description>External Event Selection</description>
<bitOffset>10</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>TIOB</name>
<description>TIOB</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>XC0</name>
<description>XC0</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>XC1</name>
<description>XC1</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>XC2</name>
<description>XC2</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>ENETRG</name>
<description>External Event Trigger Enable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>WAVSEL</name>
<description>Waveform Selection</description>
<bitOffset>13</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>UP</name>
<description>UP mode without automatic trigger on RC Compare</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>UPDOWN</name>
<description>UPDOWN mode without automatic trigger on RC Compare</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>UP_RC</name>
<description>UP mode with automatic trigger on RC Compare</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>UPDOWN_RC</name>
<description>UPDOWN mode with automatic trigger on RC Compare</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>WAVE</name>
<description>Waveform Mode</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>ACPA</name>
<description>RA Compare Effect on TIOA</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>NONE</name>
<description>None</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>SET</name>
<description>Set</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>CLEAR</name>
<description>Clear</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>TOGGLE</name>
<description>Toggle</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>ACPC</name>
<description>RC Compare Effect on TIOA</description>
<bitOffset>18</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>NONE</name>
<description>None</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>SET</name>
<description>Set</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>CLEAR</name>
<description>Clear</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>TOGGLE</name>
<description>Toggle</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>AEEVT</name>
<description>External Event Effect on TIOA</description>
<bitOffset>20</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>NONE</name>
<description>None</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>SET</name>
<description>Set</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>CLEAR</name>
<description>Clear</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>TOGGLE</name>
<description>Toggle</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>ASWTRG</name>
<description>Software Trigger Effect on TIOA</description>
<bitOffset>22</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>NONE</name>
<description>None</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>SET</name>
<description>Set</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>CLEAR</name>
<description>Clear</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>TOGGLE</name>
<description>Toggle</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>BCPB</name>
<description>RB Compare Effect on TIOB</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>NONE</name>
<description>None</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>SET</name>
<description>Set</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>CLEAR</name>
<description>Clear</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>TOGGLE</name>
<description>Toggle</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>BCPC</name>
<description>RC Compare Effect on TIOB</description>
<bitOffset>26</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>NONE</name>
<description>None</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>SET</name>
<description>Set</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>CLEAR</name>
<description>Clear</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>TOGGLE</name>
<description>Toggle</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>BEEVT</name>
<description>External Event Effect on TIOB</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>NONE</name>
<description>None</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>SET</name>
<description>Set</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>CLEAR</name>
<description>Clear</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>TOGGLE</name>
<description>Toggle</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>BSWTRG</name>
<description>Software Trigger Effect on TIOB</description>
<bitOffset>30</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>NONE</name>
<description>None</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>SET</name>
<description>Set</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>CLEAR</name>
<description>Clear</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>TOGGLE</name>
<description>Toggle</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>SMMR1</name>
<description>Stepper Motor Mode Register (channel = 1)</description>
<addressOffset>0x00000048</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>GCEN</name>
<description>Gray Count Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DOWN</name>
<description>DOWN Count</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>RAB1</name>
<description>Register AB (channel = 1)</description>
<addressOffset>0x0000004C</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>RAB</name>
<description>Register A or Register B</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>CV1</name>
<description>Counter Value (channel = 1)</description>
<addressOffset>0x00000050</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CV</name>
<description>Counter Value</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>RA1</name>
<description>Register A (channel = 1)</description>
<addressOffset>0x00000054</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>RA</name>
<description>Register A</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>RB1</name>
<description>Register B (channel = 1)</description>
<addressOffset>0x00000058</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>RB</name>
<description>Register B</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>RC1</name>
<description>Register C (channel = 1)</description>
<addressOffset>0x0000005C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>RC</name>
<description>Register C</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>SR1</name>
<description>Status Register (channel = 1)</description>
<addressOffset>0x00000060</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>COVFS</name>
<description>Counter Overflow Status</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>LOVRS</name>
<description>Load Overrun Status</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CPAS</name>
<description>RA Compare Status</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CPBS</name>
<description>RB Compare Status</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CPCS</name>
<description>RC Compare Status</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>LDRAS</name>
<description>RA Loading Status</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>LDRBS</name>
<description>RB Loading Status</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ETRGS</name>
<description>External Trigger Status</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CLKSTA</name>
<description>Clock Enabling Status</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>MTIOA</name>
<description>TIOA Mirror</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>MTIOB</name>
<description>TIOB Mirror</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>IER1</name>
<description>Interrupt Enable Register (channel = 1)</description>
<addressOffset>0x00000064</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>COVFS</name>
<description>Counter Overflow</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>LOVRS</name>
<description>Load Overrun</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CPAS</name>
<description>RA Compare</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CPBS</name>
<description>RB Compare</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CPCS</name>
<description>RC Compare</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>LDRAS</name>
<description>RA Loading</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>LDRBS</name>
<description>RB Loading</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ETRGS</name>
<description>External Trigger</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IDR1</name>
<description>Interrupt Disable Register (channel = 1)</description>
<addressOffset>0x00000068</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>COVFS</name>
<description>Counter Overflow</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>LOVRS</name>
<description>Load Overrun</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CPAS</name>
<description>RA Compare</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CPBS</name>
<description>RB Compare</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CPCS</name>
<description>RC Compare</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>LDRAS</name>
<description>RA Loading</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>LDRBS</name>
<description>RB Loading</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ETRGS</name>
<description>External Trigger</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IMR1</name>
<description>Interrupt Mask Register (channel = 1)</description>
<addressOffset>0x0000006C</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>COVFS</name>
<description>Counter Overflow</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>LOVRS</name>
<description>Load Overrun</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CPAS</name>
<description>RA Compare</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CPBS</name>
<description>RB Compare</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CPCS</name>
<description>RC Compare</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>LDRAS</name>
<description>RA Loading</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>LDRBS</name>
<description>RB Loading</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ETRGS</name>
<description>External Trigger</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>CCR2</name>
<description>Channel Control Register (channel = 2)</description>
<addressOffset>0x00000080</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>CLKEN</name>
<description>Counter Clock Enable Command</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CLKDIS</name>
<description>Counter Clock Disable Command</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SWTRG</name>
<description>Software Trigger Command</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>CMR2</name>
<description>Channel Mode Register (channel = 2)</description>
<addressOffset>0x00000084</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>TCCLKS</name>
<description>Clock Selection</description>
<bitOffset>0</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>TIMER_CLOCK1</name>
<description>Clock selected: TCLK1</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>TIMER_CLOCK2</name>
<description>Clock selected: TCLK2</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>TIMER_CLOCK3</name>
<description>Clock selected: TCLK3</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>TIMER_CLOCK4</name>
<description>Clock selected: TCLK4</description>
<value>0x3</value>
</enumeratedValue>
<enumeratedValue>
<name>TIMER_CLOCK5</name>
<description>Clock selected: TCLK5</description>
<value>0x4</value>
</enumeratedValue>
<enumeratedValue>
<name>XC0</name>
<description>Clock selected: XC0</description>
<value>0x5</value>
</enumeratedValue>
<enumeratedValue>
<name>XC1</name>
<description>Clock selected: XC1</description>
<value>0x6</value>
</enumeratedValue>
<enumeratedValue>
<name>XC2</name>
<description>Clock selected: XC2</description>
<value>0x7</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CLKI</name>
<description>Clock Invert</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>BURST</name>
<description>Burst Signal Selection</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>NONE</name>
<description>The clock is not gated by an external signal.</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>XC0</name>
<description>XC0 is ANDed with the selected clock.</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>XC1</name>
<description>XC1 is ANDed with the selected clock.</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>XC2</name>
<description>XC2 is ANDed with the selected clock.</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LDBSTOP</name>
<description>Counter Clock Stopped with RB Loading</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>LDBDIS</name>
<description>Counter Clock Disable with RB Loading</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>ETRGEDG</name>
<description>External Trigger Edge Selection</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>NONE</name>
<description>The clock is not gated by an external signal.</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>RISING</name>
<description>Rising edge</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>FALLING</name>
<description>Falling edge</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>EDGE</name>
<description>Each edge</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>ABETRG</name>
<description>TIOA or TIOB External Trigger Selection</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CPCTRG</name>
<description>RC Compare Trigger Enable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>WAVE</name>
<description>Waveform Mode</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>LDRA</name>
<description>RA Loading Edge Selection</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>NONE</name>
<description>None</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>RISING</name>
<description>Rising edge of TIOA</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>FALLING</name>
<description>Falling edge of TIOA</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>EDGE</name>
<description>Each edge of TIOA</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LDRB</name>
<description>RB Loading Edge Selection</description>
<bitOffset>18</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>NONE</name>
<description>None</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>RISING</name>
<description>Rising edge of TIOA</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>FALLING</name>
<description>Falling edge of TIOA</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>EDGE</name>
<description>Each edge of TIOA</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>CMR2_WAVE_EQ_1</name>
<description>Channel Mode Register (channel = 2)</description>
<alternateGroup>WAVE_EQ_1</alternateGroup>
<addressOffset>0x00000084</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>TCCLKS</name>
<description>Clock Selection</description>
<bitOffset>0</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>TIMER_CLOCK1</name>
<description>Clock selected: TCLK1</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>TIMER_CLOCK2</name>
<description>Clock selected: TCLK2</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>TIMER_CLOCK3</name>
<description>Clock selected: TCLK3</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>TIMER_CLOCK4</name>
<description>Clock selected: TCLK4</description>
<value>0x3</value>
</enumeratedValue>
<enumeratedValue>
<name>TIMER_CLOCK5</name>
<description>Clock selected: TCLK5</description>
<value>0x4</value>
</enumeratedValue>
<enumeratedValue>
<name>XC0</name>
<description>Clock selected: XC0</description>
<value>0x5</value>
</enumeratedValue>
<enumeratedValue>
<name>XC1</name>
<description>Clock selected: XC1</description>
<value>0x6</value>
</enumeratedValue>
<enumeratedValue>
<name>XC2</name>
<description>Clock selected: XC2</description>
<value>0x7</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CLKI</name>
<description>Clock Invert</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>BURST</name>
<description>Burst Signal Selection</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>NONE</name>
<description>The clock is not gated by an external signal.</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>XC0</name>
<description>XC0 is ANDed with the selected clock.</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>XC1</name>
<description>XC1 is ANDed with the selected clock.</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>XC2</name>
<description>XC2 is ANDed with the selected clock.</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CPCSTOP</name>
<description>Counter Clock Stopped with RC Compare</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CPCDIS</name>
<description>Counter Clock Disable with RC Compare</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>EEVTEDG</name>
<description>External Event Edge Selection</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>NONE</name>
<description>None</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>RISING</name>
<description>Rising edge</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>FALLING</name>
<description>Falling edge</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>EDGE</name>
<description>Each edge</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>EEVT</name>
<description>External Event Selection</description>
<bitOffset>10</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>TIOB</name>
<description>TIOB</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>XC0</name>
<description>XC0</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>XC1</name>
<description>XC1</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>XC2</name>
<description>XC2</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>ENETRG</name>
<description>External Event Trigger Enable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>WAVSEL</name>
<description>Waveform Selection</description>
<bitOffset>13</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>UP</name>
<description>UP mode without automatic trigger on RC Compare</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>UPDOWN</name>
<description>UPDOWN mode without automatic trigger on RC Compare</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>UP_RC</name>
<description>UP mode with automatic trigger on RC Compare</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>UPDOWN_RC</name>
<description>UPDOWN mode with automatic trigger on RC Compare</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>WAVE</name>
<description>Waveform Mode</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>ACPA</name>
<description>RA Compare Effect on TIOA</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>NONE</name>
<description>None</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>SET</name>
<description>Set</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>CLEAR</name>
<description>Clear</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>TOGGLE</name>
<description>Toggle</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>ACPC</name>
<description>RC Compare Effect on TIOA</description>
<bitOffset>18</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>NONE</name>
<description>None</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>SET</name>
<description>Set</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>CLEAR</name>
<description>Clear</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>TOGGLE</name>
<description>Toggle</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>AEEVT</name>
<description>External Event Effect on TIOA</description>
<bitOffset>20</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>NONE</name>
<description>None</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>SET</name>
<description>Set</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>CLEAR</name>
<description>Clear</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>TOGGLE</name>
<description>Toggle</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>ASWTRG</name>
<description>Software Trigger Effect on TIOA</description>
<bitOffset>22</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>NONE</name>
<description>None</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>SET</name>
<description>Set</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>CLEAR</name>
<description>Clear</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>TOGGLE</name>
<description>Toggle</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>BCPB</name>
<description>RB Compare Effect on TIOB</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>NONE</name>
<description>None</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>SET</name>
<description>Set</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>CLEAR</name>
<description>Clear</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>TOGGLE</name>
<description>Toggle</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>BCPC</name>
<description>RC Compare Effect on TIOB</description>
<bitOffset>26</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>NONE</name>
<description>None</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>SET</name>
<description>Set</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>CLEAR</name>
<description>Clear</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>TOGGLE</name>
<description>Toggle</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>BEEVT</name>
<description>External Event Effect on TIOB</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>NONE</name>
<description>None</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>SET</name>
<description>Set</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>CLEAR</name>
<description>Clear</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>TOGGLE</name>
<description>Toggle</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>BSWTRG</name>
<description>Software Trigger Effect on TIOB</description>
<bitOffset>30</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>NONE</name>
<description>None</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>SET</name>
<description>Set</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>CLEAR</name>
<description>Clear</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>TOGGLE</name>
<description>Toggle</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>SMMR2</name>
<description>Stepper Motor Mode Register (channel = 2)</description>
<addressOffset>0x00000088</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>GCEN</name>
<description>Gray Count Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DOWN</name>
<description>DOWN Count</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>RAB2</name>
<description>Register AB (channel = 2)</description>
<addressOffset>0x0000008C</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>RAB</name>
<description>Register A or Register B</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>CV2</name>
<description>Counter Value (channel = 2)</description>
<addressOffset>0x00000090</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CV</name>
<description>Counter Value</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>RA2</name>
<description>Register A (channel = 2)</description>
<addressOffset>0x00000094</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>RA</name>
<description>Register A</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>RB2</name>
<description>Register B (channel = 2)</description>
<addressOffset>0x00000098</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>RB</name>
<description>Register B</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>RC2</name>
<description>Register C (channel = 2)</description>
<addressOffset>0x0000009C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>RC</name>
<description>Register C</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>SR2</name>
<description>Status Register (channel = 2)</description>
<addressOffset>0x000000A0</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>COVFS</name>
<description>Counter Overflow Status</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>LOVRS</name>
<description>Load Overrun Status</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CPAS</name>
<description>RA Compare Status</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CPBS</name>
<description>RB Compare Status</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CPCS</name>
<description>RC Compare Status</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>LDRAS</name>
<description>RA Loading Status</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>LDRBS</name>
<description>RB Loading Status</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ETRGS</name>
<description>External Trigger Status</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CLKSTA</name>
<description>Clock Enabling Status</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>MTIOA</name>
<description>TIOA Mirror</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>MTIOB</name>
<description>TIOB Mirror</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>IER2</name>
<description>Interrupt Enable Register (channel = 2)</description>
<addressOffset>0x000000A4</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>COVFS</name>
<description>Counter Overflow</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>LOVRS</name>
<description>Load Overrun</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CPAS</name>
<description>RA Compare</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CPBS</name>
<description>RB Compare</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CPCS</name>
<description>RC Compare</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>LDRAS</name>
<description>RA Loading</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>LDRBS</name>
<description>RB Loading</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ETRGS</name>
<description>External Trigger</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IDR2</name>
<description>Interrupt Disable Register (channel = 2)</description>
<addressOffset>0x000000A8</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>COVFS</name>
<description>Counter Overflow</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>LOVRS</name>
<description>Load Overrun</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CPAS</name>
<description>RA Compare</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CPBS</name>
<description>RB Compare</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CPCS</name>
<description>RC Compare</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>LDRAS</name>
<description>RA Loading</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>LDRBS</name>
<description>RB Loading</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ETRGS</name>
<description>External Trigger</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IMR2</name>
<description>Interrupt Mask Register (channel = 2)</description>
<addressOffset>0x000000AC</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>COVFS</name>
<description>Counter Overflow</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>LOVRS</name>
<description>Load Overrun</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CPAS</name>
<description>RA Compare</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CPBS</name>
<description>RB Compare</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CPCS</name>
<description>RC Compare</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>LDRAS</name>
<description>RA Loading</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>LDRBS</name>
<description>RB Loading</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ETRGS</name>
<description>External Trigger</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>BCR</name>
<description>Block Control Register</description>
<addressOffset>0x000000C0</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>SYNC</name>
<description>Synchro Command</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>BMR</name>
<description>Block Mode Register</description>
<addressOffset>0x000000C4</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>TC0XC0S</name>
<description>External Clock Signal 0 Selection</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>TCLK0</name>
<description>Signal connected to XC0: TCLK0</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>TIOA1</name>
<description>Signal connected to XC0: TIOA1</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>TIOA2</name>
<description>Signal connected to XC0: TIOA2</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>TC1XC1S</name>
<description>External Clock Signal 1 Selection</description>
<bitOffset>2</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>TCLK1</name>
<description>Signal connected to XC1: TCLK1</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>TIOA0</name>
<description>Signal connected to XC1: TIOA0</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>TIOA2</name>
<description>Signal connected to XC1: TIOA2</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>TC2XC2S</name>
<description>External Clock Signal 2 Selection</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>TCLK2</name>
<description>Signal connected to XC2: TCLK2</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>TIOA1</name>
<description>Signal connected to XC2: TIOA1</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>TIOA2</name>
<description>Signal connected to XC2: TIOA2</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>QDEN</name>
<description>Quadrature Decoder ENabled</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>POSEN</name>
<description>POSition ENabled</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SPEEDEN</name>
<description>SPEED ENabled</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>QDTRANS</name>
<description>Quadrature Decoding TRANSparent</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>EDGPHA</name>
<description>EDGe on PHA count mode</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>INVA</name>
<description>INVerted phA</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>INVB</name>
<description>INVerted phB</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>INVIDX</name>
<description>INVerted InDeX</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SWAP</name>
<description>SWAP PHA and PHB</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>IDXPHB</name>
<description>InDeX pin is PHB pin</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>FILTER</name>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>MAXFILT</name>
<description>MAXimum FILTer</description>
<bitOffset>20</bitOffset>
<bitWidth>6</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>QIER</name>
<description>QDEC Interrupt Enable Register</description>
<addressOffset>0x000000C8</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>IDX</name>
<description>InDeX</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DIRCHG</name>
<description>DIRection CHanGe</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>QERR</name>
<description>Quadrature ERRor</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>QIDR</name>
<description>QDEC Interrupt Disable Register</description>
<addressOffset>0x000000CC</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>IDX</name>
<description>InDeX</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DIRCHG</name>
<description>DIRection CHanGe</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>QERR</name>
<description>Quadrature ERRor</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>QIMR</name>
<description>QDEC Interrupt Mask Register</description>
<addressOffset>0x000000D0</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>IDX</name>
<description>InDeX</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DIRCHG</name>
<description>DIRection CHanGe</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>QERR</name>
<description>Quadrature ERRor</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>QISR</name>
<description>QDEC Interrupt Status Register</description>
<addressOffset>0x000000D4</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>IDX</name>
<description>InDeX</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DIRCHG</name>
<description>DIRection CHanGe</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>QERR</name>
<description>Quadrature ERRor</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DIR</name>
<description>DIRection</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>WPMR</name>
<description>Write Protect Mode Register</description>
<addressOffset>0x000000E4</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>WPEN</name>
<description>Write Protect Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>WPKEY</name>
<description>Write Protect KEY</description>
<bitOffset>8</bitOffset>
<bitWidth>24</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>TWI0</name>
<version>6212N</version>
<description>Two-wire Interface 0</description>
<groupName>TWI</groupName>
<prependToName>TWI0_</prependToName>
<baseAddress>0xF0014000</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x4000</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>TWI0</name>
<value>18</value>
</interrupt>
<registers>
<register>
<name>CR</name>
<description>Control Register</description>
<addressOffset>0x00000000</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>START</name>
<description>Send a START Condition</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>STOP</name>
<description>Send a STOP Condition</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>MSEN</name>
<description>TWI Master Mode Enabled</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>MSDIS</name>
<description>TWI Master Mode Disabled</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SVEN</name>
<description>TWI Slave Mode Enabled</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SVDIS</name>
<description>TWI Slave Mode Disabled</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>QUICK</name>
<description>SMBUS Quick Command</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SWRST</name>
<description>Software Reset</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>MMR</name>
<description>Master Mode Register</description>
<addressOffset>0x00000004</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>IADRSZ</name>
<description>Internal Device Address Size</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>NONE</name>
<description>No internal device address</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>1_BYTE</name>
<description>One-byte internal device address</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>2_BYTE</name>
<description>Two-byte internal device address</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>3_BYTE</name>
<description>Three-byte internal device address</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>MREAD</name>
<description>Master Read Direction</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DADR</name>
<description>Device Address</description>
<bitOffset>16</bitOffset>
<bitWidth>7</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>SMR</name>
<description>Slave Mode Register</description>
<addressOffset>0x00000008</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SADR</name>
<description>Slave Address</description>
<bitOffset>16</bitOffset>
<bitWidth>7</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>IADR</name>
<description>Internal Address Register</description>
<addressOffset>0x0000000C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>IADR</name>
<description>Internal Address</description>
<bitOffset>0</bitOffset>
<bitWidth>24</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>CWGR</name>
<description>Clock Waveform Generator Register</description>
<addressOffset>0x00000010</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CLDIV</name>
<description>Clock Low Divider</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CHDIV</name>
<description>Clock High Divider</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CKDIV</name>
<description>Clock Divider</description>
<bitOffset>16</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>SR</name>
<description>Status Register</description>
<addressOffset>0x00000020</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x0000F009</resetValue>
<fields>
<field>
<name>TXCOMP</name>
<description>Transmission Completed (automatically set / reset)</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXRDY</name>
<description>Receive Holding Register Ready (automatically set / reset)</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY</name>
<description>Transmit Holding Register Ready (automatically set / reset)</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SVREAD</name>
<description>Slave Read (automatically set / reset)</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SVACC</name>
<description>Slave Access (automatically set / reset)</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>GACC</name>
<description>General Call Access (clear on read)</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>OVRE</name>
<description>Overrun Error (clear on read)</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NACK</name>
<description>Not Acknowledged (clear on read)</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ARBLST</name>
<description>Arbitration Lost (clear on read)</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SCLWS</name>
<description>Clock Wait State (automatically set / reset)</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>EOSACC</name>
<description>End Of Slave Access (clear on read)</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>IER</name>
<description>Interrupt Enable Register</description>
<addressOffset>0x00000024</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>TXCOMP</name>
<description>Transmission Completed Interrupt Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY</name>
<description>Receive Holding Register Ready Interrupt Enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY</name>
<description>Transmit Holding Register Ready Interrupt Enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SVACC</name>
<description>Slave Access Interrupt Enable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>GACC</name>
<description>General Call Access Interrupt Enable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>OVRE</name>
<description>Overrun Error Interrupt Enable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NACK</name>
<description>Not Acknowledge Interrupt Enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ARBLST</name>
<description>Arbitration Lost Interrupt Enable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SCL_WS</name>
<description>Clock Wait State Interrupt Enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>EOSACC</name>
<description>End Of Slave Access Interrupt Enable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IDR</name>
<description>Interrupt Disable Register</description>
<addressOffset>0x00000028</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>TXCOMP</name>
<description>Transmission Completed Interrupt Disable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY</name>
<description>Receive Holding Register Ready Interrupt Disable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY</name>
<description>Transmit Holding Register Ready Interrupt Disable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SVACC</name>
<description>Slave Access Interrupt Disable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>GACC</name>
<description>General Call Access Interrupt Disable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>OVRE</name>
<description>Overrun Error Interrupt Disable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NACK</name>
<description>Not Acknowledge Interrupt Disable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ARBLST</name>
<description>Arbitration Lost Interrupt Disable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SCL_WS</name>
<description>Clock Wait State Interrupt Disable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>EOSACC</name>
<description>End Of Slave Access Interrupt Disable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IMR</name>
<description>Interrupt Mask Register</description>
<addressOffset>0x0000002C</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>TXCOMP</name>
<description>Transmission Completed Interrupt Mask</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXRDY</name>
<description>Receive Holding Register Ready Interrupt Mask</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY</name>
<description>Transmit Holding Register Ready Interrupt Mask</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SVACC</name>
<description>Slave Access Interrupt Mask</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>GACC</name>
<description>General Call Access Interrupt Mask</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>OVRE</name>
<description>Overrun Error Interrupt Mask</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NACK</name>
<description>Not Acknowledge Interrupt Mask</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ARBLST</name>
<description>Arbitration Lost Interrupt Mask</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SCL_WS</name>
<description>Clock Wait State Interrupt Mask</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>EOSACC</name>
<description>End Of Slave Access Interrupt Mask</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>RHR</name>
<description>Receive Holding Register</description>
<addressOffset>0x00000030</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>RXDATA</name>
<description>Master or Slave Receive Holding Data</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>THR</name>
<description>Transmit Holding Register</description>
<addressOffset>0x00000034</addressOffset>
<size>32</size>
<access>write-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>TXDATA</name>
<description>Master or Slave Transmit Holding Data</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>WPROT_MODE</name>
<description>Protection Mode Register</description>
<addressOffset>0x000000E4</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>WPROT</name>
<description>Write protection bit</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SECURITY_CODE</name>
<description>Write protection mode security code</description>
<bitOffset>8</bitOffset>
<bitWidth>24</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>WPROT_STATUS</name>
<description>Protection Status Register</description>
<addressOffset>0x000000E8</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>WPROTERR</name>
<description>Write Protection Error</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>WPROTADDR</name>
<description>Write Protection Error Address</description>
<bitOffset>8</bitOffset>
<bitWidth>24</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>TWI1</name>
<version>6212N</version>
<description>Two-wire Interface 1</description>
<groupName>TWI</groupName>
<prependToName>TWI1_</prependToName>
<baseAddress>0xF0018000</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x4000</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>TWI1</name>
<value>19</value>
</interrupt>
<registers>
<register>
<name>CR</name>
<description>Control Register</description>
<addressOffset>0x00000000</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>START</name>
<description>Send a START Condition</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>STOP</name>
<description>Send a STOP Condition</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>MSEN</name>
<description>TWI Master Mode Enabled</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>MSDIS</name>
<description>TWI Master Mode Disabled</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SVEN</name>
<description>TWI Slave Mode Enabled</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SVDIS</name>
<description>TWI Slave Mode Disabled</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>QUICK</name>
<description>SMBUS Quick Command</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SWRST</name>
<description>Software Reset</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>MMR</name>
<description>Master Mode Register</description>
<addressOffset>0x00000004</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>IADRSZ</name>
<description>Internal Device Address Size</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>NONE</name>
<description>No internal device address</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>1_BYTE</name>
<description>One-byte internal device address</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>2_BYTE</name>
<description>Two-byte internal device address</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>3_BYTE</name>
<description>Three-byte internal device address</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>MREAD</name>
<description>Master Read Direction</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DADR</name>
<description>Device Address</description>
<bitOffset>16</bitOffset>
<bitWidth>7</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>SMR</name>
<description>Slave Mode Register</description>
<addressOffset>0x00000008</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SADR</name>
<description>Slave Address</description>
<bitOffset>16</bitOffset>
<bitWidth>7</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>IADR</name>
<description>Internal Address Register</description>
<addressOffset>0x0000000C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>IADR</name>
<description>Internal Address</description>
<bitOffset>0</bitOffset>
<bitWidth>24</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>CWGR</name>
<description>Clock Waveform Generator Register</description>
<addressOffset>0x00000010</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CLDIV</name>
<description>Clock Low Divider</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CHDIV</name>
<description>Clock High Divider</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CKDIV</name>
<description>Clock Divider</description>
<bitOffset>16</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>SR</name>
<description>Status Register</description>
<addressOffset>0x00000020</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x0000F009</resetValue>
<fields>
<field>
<name>TXCOMP</name>
<description>Transmission Completed (automatically set / reset)</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXRDY</name>
<description>Receive Holding Register Ready (automatically set / reset)</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY</name>
<description>Transmit Holding Register Ready (automatically set / reset)</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SVREAD</name>
<description>Slave Read (automatically set / reset)</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SVACC</name>
<description>Slave Access (automatically set / reset)</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>GACC</name>
<description>General Call Access (clear on read)</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>OVRE</name>
<description>Overrun Error (clear on read)</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NACK</name>
<description>Not Acknowledged (clear on read)</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ARBLST</name>
<description>Arbitration Lost (clear on read)</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SCLWS</name>
<description>Clock Wait State (automatically set / reset)</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>EOSACC</name>
<description>End Of Slave Access (clear on read)</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>IER</name>
<description>Interrupt Enable Register</description>
<addressOffset>0x00000024</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>TXCOMP</name>
<description>Transmission Completed Interrupt Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY</name>
<description>Receive Holding Register Ready Interrupt Enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY</name>
<description>Transmit Holding Register Ready Interrupt Enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SVACC</name>
<description>Slave Access Interrupt Enable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>GACC</name>
<description>General Call Access Interrupt Enable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>OVRE</name>
<description>Overrun Error Interrupt Enable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NACK</name>
<description>Not Acknowledge Interrupt Enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ARBLST</name>
<description>Arbitration Lost Interrupt Enable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SCL_WS</name>
<description>Clock Wait State Interrupt Enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>EOSACC</name>
<description>End Of Slave Access Interrupt Enable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IDR</name>
<description>Interrupt Disable Register</description>
<addressOffset>0x00000028</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>TXCOMP</name>
<description>Transmission Completed Interrupt Disable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY</name>
<description>Receive Holding Register Ready Interrupt Disable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY</name>
<description>Transmit Holding Register Ready Interrupt Disable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SVACC</name>
<description>Slave Access Interrupt Disable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>GACC</name>
<description>General Call Access Interrupt Disable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>OVRE</name>
<description>Overrun Error Interrupt Disable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NACK</name>
<description>Not Acknowledge Interrupt Disable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ARBLST</name>
<description>Arbitration Lost Interrupt Disable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SCL_WS</name>
<description>Clock Wait State Interrupt Disable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>EOSACC</name>
<description>End Of Slave Access Interrupt Disable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IMR</name>
<description>Interrupt Mask Register</description>
<addressOffset>0x0000002C</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>TXCOMP</name>
<description>Transmission Completed Interrupt Mask</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXRDY</name>
<description>Receive Holding Register Ready Interrupt Mask</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY</name>
<description>Transmit Holding Register Ready Interrupt Mask</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SVACC</name>
<description>Slave Access Interrupt Mask</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>GACC</name>
<description>General Call Access Interrupt Mask</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>OVRE</name>
<description>Overrun Error Interrupt Mask</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NACK</name>
<description>Not Acknowledge Interrupt Mask</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ARBLST</name>
<description>Arbitration Lost Interrupt Mask</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SCL_WS</name>
<description>Clock Wait State Interrupt Mask</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>EOSACC</name>
<description>End Of Slave Access Interrupt Mask</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>RHR</name>
<description>Receive Holding Register</description>
<addressOffset>0x00000030</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>RXDATA</name>
<description>Master or Slave Receive Holding Data</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>THR</name>
<description>Transmit Holding Register</description>
<addressOffset>0x00000034</addressOffset>
<size>32</size>
<access>write-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>TXDATA</name>
<description>Master or Slave Transmit Holding Data</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>WPROT_MODE</name>
<description>Protection Mode Register</description>
<addressOffset>0x000000E4</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>WPROT</name>
<description>Write protection bit</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SECURITY_CODE</name>
<description>Write protection mode security code</description>
<bitOffset>8</bitOffset>
<bitWidth>24</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>WPROT_STATUS</name>
<description>Protection Status Register</description>
<addressOffset>0x000000E8</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>WPROTERR</name>
<description>Write Protection Error</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>WPROTADDR</name>
<description>Write Protection Error Address</description>
<bitOffset>8</bitOffset>
<bitWidth>24</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>USART0</name>
<version>6089Z</version>
<description>Universal Synchronous Asynchronous Receiver Transmitter 0</description>
<groupName>USART</groupName>
<prependToName>USART0_</prependToName>
<baseAddress>0xF001C000</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x4000</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>USART0</name>
<value>12</value>
</interrupt>
<registers>
<register>
<name>CR</name>
<description>Control Register</description>
<addressOffset>0x00000000</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>RSTRX</name>
<description>Reset Receiver</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RSTTX</name>
<description>Reset Transmitter</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXEN</name>
<description>Receiver Enable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXDIS</name>
<description>Receiver Disable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXEN</name>
<description>Transmitter Enable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXDIS</name>
<description>Transmitter Disable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RSTSTA</name>
<description>Reset Status Bits</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>STTBRK</name>
<description>Start Break</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>STPBRK</name>
<description>Stop Break</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>STTTO</name>
<description>Start Time-out</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SENDA</name>
<description>Send Address</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RSTIT</name>
<description>Reset Iterations</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RSTNACK</name>
<description>Reset Non Acknowledge</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RETTO</name>
<description>Rearm Time-out</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RTSEN</name>
<description>Request to Send Enable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RTSDIS</name>
<description>Request to Send Disable</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>CR_SPI_MODE</name>
<description>Control Register</description>
<alternateGroup>SPI_MODE</alternateGroup>
<addressOffset>0x00000000</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>RSTRX</name>
<description>Reset Receiver</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RSTTX</name>
<description>Reset Transmitter</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXEN</name>
<description>Receiver Enable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXDIS</name>
<description>Receiver Disable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXEN</name>
<description>Transmitter Enable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXDIS</name>
<description>Transmitter Disable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RSTSTA</name>
<description>Reset Status Bits</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>FCS</name>
<description>Force SPI Chip Select</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RCS</name>
<description>Release SPI Chip Select</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>MR</name>
<description>Mode Register</description>
<addressOffset>0x00000004</addressOffset>
<size>32</size>
<access>read-write</access>
<fields>
<field>
<name>USART_MODE</name>
<description>USART Mode of Operation</description>
<bitOffset>0</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>NORMAL</name>
<description>Normal mode</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>RS485</name>
<description>RS485</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>HW_HANDSHAKING</name>
<description>Hardware Handshaking</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>IS07816_T_0</name>
<description>IS07816 Protocol: T = 0</description>
<value>0x4</value>
</enumeratedValue>
<enumeratedValue>
<name>IS07816_T_1</name>
<description>IS07816 Protocol: T = 1</description>
<value>0x6</value>
</enumeratedValue>
<enumeratedValue>
<name>IRDA</name>
<description>IrDA</description>
<value>0x8</value>
</enumeratedValue>
<enumeratedValue>
<name>SPI_MASTER</name>
<description>SPI Master</description>
<value>0xE</value>
</enumeratedValue>
<enumeratedValue>
<name>SPI_SLAVE</name>
<description>SPI Slave</description>
<value>0xF</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>USCLKS</name>
<description>Clock Selection</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>MCK</name>
<description>Master Clock MCK is selected</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>DIV</name>
<description>Internal Clock Divided MCK/DIV (DIV=(DIV=8)) is selected</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>SCK</name>
<description>Serial Clock SLK is selected</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CHRL</name>
<description>Character Length.</description>
<bitOffset>6</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>5_BIT</name>
<description>Character length is 5 bits</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>6_BIT</name>
<description>Character length is 6 bits</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>7_BIT</name>
<description>Character length is 7 bits</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>8_BIT</name>
<description>Character length is 8 bits</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SYNC</name>
<description>Synchronous Mode Select</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>PAR</name>
<description>Parity Type</description>
<bitOffset>9</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>EVEN</name>
<description>Even parity</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ODD</name>
<description>Odd parity</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>SPACE</name>
<description>Parity forced to 0 (Space)</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>MARK</name>
<description>Parity forced to 1 (Mark)</description>
<value>0x3</value>
</enumeratedValue>
<enumeratedValue>
<name>NO</name>
<description>No parity</description>
<value>0x4</value>
</enumeratedValue>
<enumeratedValue>
<name>MULTIDROP</name>
<description>Multidrop mode</description>
<value>0x6</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>NBSTOP</name>
<description>Number of Stop Bits</description>
<bitOffset>12</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>1_BIT</name>
<description>1 stop bit</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>1_5_BIT</name>
<description>1.5 stop bit (SYNC = 0) or reserved (SYNC = 1)</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>2_BIT</name>
<description>2 stop bits</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CHMODE</name>
<description>Channel Mode</description>
<bitOffset>14</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>NORMAL</name>
<description>Normal Mode</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>AUTOMATIC</name>
<description>Automatic Echo. Receiver input is connected to the TXD pin.</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>LOCAL_LOOPBACK</name>
<description>Local Loopback. Transmitter output is connected to the Receiver Input.</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>REMOTE_LOOPBACK</name>
<description>Remote Loopback. RXD pin is internally connected to the TXD pin.</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>MSBF</name>
<description>Bit Order</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>MODE9</name>
<description>9-bit Character Length</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CLKO</name>
<description>Clock Output Select</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>OVER</name>
<description>Oversampling Mode</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>INACK</name>
<description>Inhibit Non Acknowledge</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DSNACK</name>
<description>Disable Successive NACK</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>VAR_SYNC</name>
<description>Variable Synchronization of Command/Data Sync Start Frame Delimiter</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>INVDATA</name>
<description>Inverted Data</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>MAX_ITERATION</name>
<description>Maximum Number of Automatic Iteration</description>
<bitOffset>24</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
</field>
<field>
<name>FILTER</name>
<description>Infrared Receive Line Filter</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>MAN</name>
<description>Manchester Encoder/Decoder Enable</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>MODSYNC</name>
<description>Manchester Synchronization Mode</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>ONEBIT</name>
<description>Start Frame Delimiter Selector</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>MR_SPI_MODE</name>
<description>Mode Register</description>
<alternateGroup>SPI_MODE</alternateGroup>
<addressOffset>0x00000004</addressOffset>
<size>32</size>
<access>read-write</access>
<fields>
<field>
<name>USART_MODE</name>
<description>USART Mode of Operation</description>
<bitOffset>0</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>SPI_MASTER</name>
<description>SPI Master</description>
<value>0xE</value>
</enumeratedValue>
<enumeratedValue>
<name>SPI_SLAVE</name>
<description>SPI Slave</description>
<value>0xF</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>USCLKS</name>
<description>Clock Selection</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>MCK</name>
<description>Master Clock MCK is selected</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>DIV</name>
<description>Internal Clock Divided MCK/DIV (DIV=(DIV=8)) is selected</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>SCK</name>
<description>Serial Clock SLK is selected</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CHRL</name>
<description>Character Length.</description>
<bitOffset>6</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>8_BIT</name>
<description>Character length is 8 bits</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CPHA</name>
<description>SPI Clock Phase</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CPOL</name>
<description>SPI Clock Polarity</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>WRDBT</name>
<description>Wait Read Data Before Transfer</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>IER</name>
<description>Interrupt Enable Register</description>
<addressOffset>0x00000008</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>RXRDY</name>
<description>RXRDY Interrupt Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TXRDY Interrupt Enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXBRK</name>
<description>Receiver Break Interrupt Enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>OVRE</name>
<description>Overrun Error Interrupt Enable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>FRAME</name>
<description>Framing Error Interrupt Enable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PARE</name>
<description>Parity Error Interrupt Enable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TIMEOUT</name>
<description>Time-out Interrupt Enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXEMPTY</name>
<description>TXEMPTY Interrupt Enable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ITER</name>
<description>Max number of Repetitions Reached Interrupt Enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NACK</name>
<description>Non AcknowledgeInterrupt Enable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CTSIC</name>
<description>Clear to Send Input Change Interrupt Enable</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>MANE</name>
<description>Manchester Error Interrupt Enable</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IER_SPI_MODE</name>
<description>Interrupt Enable Register</description>
<alternateGroup>SPI_MODE</alternateGroup>
<addressOffset>0x00000008</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>RXRDY</name>
<description>RXRDY Interrupt Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TXRDY Interrupt Enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>OVRE</name>
<description>Overrun Error Interrupt Enable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXEMPTY</name>
<description>TXEMPTY Interrupt Enable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>UNRE</name>
<description>SPI Underrun Error Interrupt Enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IDR</name>
<description>Interrupt Disable Register</description>
<addressOffset>0x0000000C</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>RXRDY</name>
<description>RXRDY Interrupt Disable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TXRDY Interrupt Disable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXBRK</name>
<description>Receiver Break Interrupt Disable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>OVRE</name>
<description>Overrun Error Interrupt Enable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>FRAME</name>
<description>Framing Error Interrupt Disable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PARE</name>
<description>Parity Error Interrupt Disable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TIMEOUT</name>
<description>Time-out Interrupt Disable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXEMPTY</name>
<description>TXEMPTY Interrupt Disable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ITER</name>
<description>Max Number of Repetitions Reached Interrupt Disable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NACK</name>
<description>Non AcknowledgeInterrupt Disable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CTSIC</name>
<description>Clear to Send Input Change Interrupt Disable</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>MANE</name>
<description>Manchester Error Interrupt Disable</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IDR_SPI_MODE</name>
<description>Interrupt Disable Register</description>
<alternateGroup>SPI_MODE</alternateGroup>
<addressOffset>0x0000000C</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>RXRDY</name>
<description>RXRDY Interrupt Disable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TXRDY Interrupt Disable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>OVRE</name>
<description>Overrun Error Interrupt Disable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXEMPTY</name>
<description>TXEMPTY Interrupt Disable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>UNRE</name>
<description>SPI Underrun Error Interrupt Disable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IMR</name>
<description>Interrupt Mask Register</description>
<addressOffset>0x00000010</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>RXRDY</name>
<description>RXRDY Interrupt Mask</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TXRDY Interrupt Mask</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXBRK</name>
<description>Receiver Break Interrupt Mask</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>OVRE</name>
<description>Overrun Error Interrupt Mask</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>FRAME</name>
<description>Framing Error Interrupt Mask</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PARE</name>
<description>Parity Error Interrupt Mask</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TIMEOUT</name>
<description>Time-out Interrupt Mask</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXEMPTY</name>
<description>TXEMPTY Interrupt Mask</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ITER</name>
<description>Max Number of Repetitions Reached Interrupt Mask</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NACK</name>
<description>Non AcknowledgeInterrupt Mask</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CTSIC</name>
<description>Clear to Send Input Change Interrupt Mask</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>MANE</name>
<description>Manchester Error Interrupt Mask</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>IMR_SPI_MODE</name>
<description>Interrupt Mask Register</description>
<alternateGroup>SPI_MODE</alternateGroup>
<addressOffset>0x00000010</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>RXRDY</name>
<description>RXRDY Interrupt Mask</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TXRDY Interrupt Mask</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>OVRE</name>
<description>Overrun Error Interrupt Mask</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXEMPTY</name>
<description>TXEMPTY Interrupt Mask</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>UNRE</name>
<description>SPI Underrun Error Interrupt Mask</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>CSR</name>
<description>Channel Status Register</description>
<addressOffset>0x00000014</addressOffset>
<size>32</size>
<access>read-only</access>
<fields>
<field>
<name>RXRDY</name>
<description>Receiver Ready</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY</name>
<description>Transmitter Ready</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXBRK</name>
<description>Break Received/End of Break</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>OVRE</name>
<description>Overrun Error</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>FRAME</name>
<description>Framing Error</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PARE</name>
<description>Parity Error</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TIMEOUT</name>
<description>Receiver Time-out</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXEMPTY</name>
<description>Transmitter Empty</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ITER</name>
<description>MaxNumber of Repetitions Reached</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NACK</name>
<description>Non AcknowledgeInterrupt</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CTSIC</name>
<description>Clear to Send Input Change Flag</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CTS</name>
<description>Image of CTS Input</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>MANERR</name>
<description>Manchester Error</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>CSR_SPI_MODE</name>
<description>Channel Status Register</description>
<alternateGroup>SPI_MODE</alternateGroup>
<addressOffset>0x00000014</addressOffset>
<size>32</size>
<access>read-only</access>
<fields>
<field>
<name>RXRDY</name>
<description>Receiver Ready</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY</name>
<description>Transmitter Ready</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>OVRE</name>
<description>Overrun Error</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXEMPTY</name>
<description>Transmitter Empty</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>UNRE</name>
<description>Underrun Error</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>RHR</name>
<description>Receiver Holding Register</description>
<addressOffset>0x00000018</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>RXCHR</name>
<description>Received Character</description>
<bitOffset>0</bitOffset>
<bitWidth>9</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXSYNH</name>
<description>Received Sync</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>THR</name>
<description>Transmitter Holding Register</description>
<addressOffset>0x0000001C</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>TXCHR</name>
<description>Character to be Transmitted</description>
<bitOffset>0</bitOffset>
<bitWidth>9</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXSYNH</name>
<description>Sync Field to be Transmitted</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>BRGR</name>
<description>Baud Rate Generator Register</description>
<addressOffset>0x00000020</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CD</name>
<description>Clock Divider</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
<field>
<name>FP</name>
<description>Fractional Part</description>
<bitOffset>16</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>RTOR</name>
<description>Receiver Time-out Register</description>
<addressOffset>0x00000024</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>TO</name>
<description>Time-out Value</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>TTGR</name>
<description>Transmitter Timeguard Register</description>
<addressOffset>0x00000028</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>TG</name>
<description>Timeguard Value</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>FIDI</name>
<description>FI DI Ratio Register</description>
<addressOffset>0x00000040</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000174</resetValue>
<fields>
<field>
<name>FI_DI_RATIO</name>
<description>FI Over DI Ratio Value</description>
<bitOffset>0</bitOffset>
<bitWidth>11</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>NER</name>
<description>Number of Errors Register</description>
<addressOffset>0x00000044</addressOffset>
<size>32</size>
<access>read-only</access>
<fields>
<field>
<name>NB_ERRORS</name>
<description>Number of Errors</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>IF</name>
<description>IrDA Filter Register</description>
<addressOffset>0x0000004C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>IRDA_FILTER</name>
<description>IrDA Filter</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>MAN</name>
<description>Manchester Encoder Decoder Register</description>
<addressOffset>0x00000050</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0xB0011004</resetValue>
<fields>
<field>
<name>TX_PL</name>
<description>Transmitter Preamble Length</description>
<bitOffset>0</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>TX_PP</name>
<description>Transmitter Preamble Pattern</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>ALL_ONE</name>
<description>The preamble is composed of '1's</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ALL_ZERO</name>
<description>The preamble is composed of '0's</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>ZERO_ONE</name>
<description>The preamble is composed of '01's</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>ONE_ZERO</name>
<description>The preamble is composed of '10's</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>TX_MPOL</name>
<description>Transmitter Manchester Polarity</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>RX_PL</name>
<description>Receiver Preamble Length</description>
<bitOffset>16</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>RX_PP</name>
<description>Receiver Preamble Pattern detected</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>ALL_ONE</name>
<description>The preamble is composed of '1's</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ALL_ZERO</name>
<description>The preamble is composed of '0's</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>ZERO_ONE</name>
<description>The preamble is composed of '01's</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>ONE_ZERO</name>
<description>The preamble is composed of '10's</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>RX_MPOL</name>
<description>Receiver Manchester Polarity</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>ONE</name>
<description>Must Be Set to 1</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DRIFT</name>
<description>Drift Compensation</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>WPMR</name>
<description>Write Protect Mode Register</description>
<addressOffset>0x000000E4</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>WPEN</name>
<description>Write Protect Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>WPKEY</name>
<description>Write Protect KEY</description>
<bitOffset>8</bitOffset>
<bitWidth>24</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>WPSR</name>
<description>Write Protect Status Register</description>
<addressOffset>0x000000E8</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>WPVS</name>
<description>Write Protect Violation Status</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>WPVSRC</name>
<description>Write Protect Violation Source</description>
<bitOffset>8</bitOffset>
<bitWidth>16</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>USART1</name>
<version>6089Z</version>
<description>Universal Synchronous Asynchronous Receiver Transmitter 1</description>
<groupName>USART</groupName>
<prependToName>USART1_</prependToName>
<baseAddress>0xF0020000</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x4000</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>USART1</name>
<value>13</value>
</interrupt>
<registers>
<register>
<name>CR</name>
<description>Control Register</description>
<addressOffset>0x00000000</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>RSTRX</name>
<description>Reset Receiver</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RSTTX</name>
<description>Reset Transmitter</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXEN</name>
<description>Receiver Enable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXDIS</name>
<description>Receiver Disable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXEN</name>
<description>Transmitter Enable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXDIS</name>
<description>Transmitter Disable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RSTSTA</name>
<description>Reset Status Bits</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>STTBRK</name>
<description>Start Break</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>STPBRK</name>
<description>Stop Break</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>STTTO</name>
<description>Start Time-out</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SENDA</name>
<description>Send Address</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RSTIT</name>
<description>Reset Iterations</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RSTNACK</name>
<description>Reset Non Acknowledge</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RETTO</name>
<description>Rearm Time-out</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RTSEN</name>
<description>Request to Send Enable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RTSDIS</name>
<description>Request to Send Disable</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>CR_SPI_MODE</name>
<description>Control Register</description>
<alternateGroup>SPI_MODE</alternateGroup>
<addressOffset>0x00000000</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>RSTRX</name>
<description>Reset Receiver</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RSTTX</name>
<description>Reset Transmitter</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXEN</name>
<description>Receiver Enable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXDIS</name>
<description>Receiver Disable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXEN</name>
<description>Transmitter Enable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXDIS</name>
<description>Transmitter Disable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RSTSTA</name>
<description>Reset Status Bits</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>FCS</name>
<description>Force SPI Chip Select</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RCS</name>
<description>Release SPI Chip Select</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>MR</name>
<description>Mode Register</description>
<addressOffset>0x00000004</addressOffset>
<size>32</size>
<access>read-write</access>
<fields>
<field>
<name>USART_MODE</name>
<description>USART Mode of Operation</description>
<bitOffset>0</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>NORMAL</name>
<description>Normal mode</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>RS485</name>
<description>RS485</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>HW_HANDSHAKING</name>
<description>Hardware Handshaking</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>IS07816_T_0</name>
<description>IS07816 Protocol: T = 0</description>
<value>0x4</value>
</enumeratedValue>
<enumeratedValue>
<name>IS07816_T_1</name>
<description>IS07816 Protocol: T = 1</description>
<value>0x6</value>
</enumeratedValue>
<enumeratedValue>
<name>IRDA</name>
<description>IrDA</description>
<value>0x8</value>
</enumeratedValue>
<enumeratedValue>
<name>SPI_MASTER</name>
<description>SPI Master</description>
<value>0xE</value>
</enumeratedValue>
<enumeratedValue>
<name>SPI_SLAVE</name>
<description>SPI Slave</description>
<value>0xF</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>USCLKS</name>
<description>Clock Selection</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>MCK</name>
<description>Master Clock MCK is selected</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>DIV</name>
<description>Internal Clock Divided MCK/DIV (DIV=(DIV=8)) is selected</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>SCK</name>
<description>Serial Clock SLK is selected</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CHRL</name>
<description>Character Length.</description>
<bitOffset>6</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>5_BIT</name>
<description>Character length is 5 bits</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>6_BIT</name>
<description>Character length is 6 bits</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>7_BIT</name>
<description>Character length is 7 bits</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>8_BIT</name>
<description>Character length is 8 bits</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SYNC</name>
<description>Synchronous Mode Select</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>PAR</name>
<description>Parity Type</description>
<bitOffset>9</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>EVEN</name>
<description>Even parity</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ODD</name>
<description>Odd parity</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>SPACE</name>
<description>Parity forced to 0 (Space)</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>MARK</name>
<description>Parity forced to 1 (Mark)</description>
<value>0x3</value>
</enumeratedValue>
<enumeratedValue>
<name>NO</name>
<description>No parity</description>
<value>0x4</value>
</enumeratedValue>
<enumeratedValue>
<name>MULTIDROP</name>
<description>Multidrop mode</description>
<value>0x6</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>NBSTOP</name>
<description>Number of Stop Bits</description>
<bitOffset>12</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>1_BIT</name>
<description>1 stop bit</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>1_5_BIT</name>
<description>1.5 stop bit (SYNC = 0) or reserved (SYNC = 1)</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>2_BIT</name>
<description>2 stop bits</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CHMODE</name>
<description>Channel Mode</description>
<bitOffset>14</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>NORMAL</name>
<description>Normal Mode</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>AUTOMATIC</name>
<description>Automatic Echo. Receiver input is connected to the TXD pin.</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>LOCAL_LOOPBACK</name>
<description>Local Loopback. Transmitter output is connected to the Receiver Input.</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>REMOTE_LOOPBACK</name>
<description>Remote Loopback. RXD pin is internally connected to the TXD pin.</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>MSBF</name>
<description>Bit Order</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>MODE9</name>
<description>9-bit Character Length</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CLKO</name>
<description>Clock Output Select</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>OVER</name>
<description>Oversampling Mode</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>INACK</name>
<description>Inhibit Non Acknowledge</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DSNACK</name>
<description>Disable Successive NACK</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>VAR_SYNC</name>
<description>Variable Synchronization of Command/Data Sync Start Frame Delimiter</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>INVDATA</name>
<description>Inverted Data</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>MAX_ITERATION</name>
<description>Maximum Number of Automatic Iteration</description>
<bitOffset>24</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
</field>
<field>
<name>FILTER</name>
<description>Infrared Receive Line Filter</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>MAN</name>
<description>Manchester Encoder/Decoder Enable</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>MODSYNC</name>
<description>Manchester Synchronization Mode</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>ONEBIT</name>
<description>Start Frame Delimiter Selector</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>MR_SPI_MODE</name>
<description>Mode Register</description>
<alternateGroup>SPI_MODE</alternateGroup>
<addressOffset>0x00000004</addressOffset>
<size>32</size>
<access>read-write</access>
<fields>
<field>
<name>USART_MODE</name>
<description>USART Mode of Operation</description>
<bitOffset>0</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>SPI_MASTER</name>
<description>SPI Master</description>
<value>0xE</value>
</enumeratedValue>
<enumeratedValue>
<name>SPI_SLAVE</name>
<description>SPI Slave</description>
<value>0xF</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>USCLKS</name>
<description>Clock Selection</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>MCK</name>
<description>Master Clock MCK is selected</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>DIV</name>
<description>Internal Clock Divided MCK/DIV (DIV=(DIV=8)) is selected</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>SCK</name>
<description>Serial Clock SLK is selected</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CHRL</name>
<description>Character Length.</description>
<bitOffset>6</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>8_BIT</name>
<description>Character length is 8 bits</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CPHA</name>
<description>SPI Clock Phase</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CPOL</name>
<description>SPI Clock Polarity</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>WRDBT</name>
<description>Wait Read Data Before Transfer</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>IER</name>
<description>Interrupt Enable Register</description>
<addressOffset>0x00000008</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>RXRDY</name>
<description>RXRDY Interrupt Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TXRDY Interrupt Enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXBRK</name>
<description>Receiver Break Interrupt Enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>OVRE</name>
<description>Overrun Error Interrupt Enable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>FRAME</name>
<description>Framing Error Interrupt Enable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PARE</name>
<description>Parity Error Interrupt Enable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TIMEOUT</name>
<description>Time-out Interrupt Enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXEMPTY</name>
<description>TXEMPTY Interrupt Enable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ITER</name>
<description>Max number of Repetitions Reached Interrupt Enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NACK</name>
<description>Non AcknowledgeInterrupt Enable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CTSIC</name>
<description>Clear to Send Input Change Interrupt Enable</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>MANE</name>
<description>Manchester Error Interrupt Enable</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IER_SPI_MODE</name>
<description>Interrupt Enable Register</description>
<alternateGroup>SPI_MODE</alternateGroup>
<addressOffset>0x00000008</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>RXRDY</name>
<description>RXRDY Interrupt Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TXRDY Interrupt Enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>OVRE</name>
<description>Overrun Error Interrupt Enable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXEMPTY</name>
<description>TXEMPTY Interrupt Enable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>UNRE</name>
<description>SPI Underrun Error Interrupt Enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IDR</name>
<description>Interrupt Disable Register</description>
<addressOffset>0x0000000C</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>RXRDY</name>
<description>RXRDY Interrupt Disable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TXRDY Interrupt Disable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXBRK</name>
<description>Receiver Break Interrupt Disable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>OVRE</name>
<description>Overrun Error Interrupt Enable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>FRAME</name>
<description>Framing Error Interrupt Disable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PARE</name>
<description>Parity Error Interrupt Disable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TIMEOUT</name>
<description>Time-out Interrupt Disable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXEMPTY</name>
<description>TXEMPTY Interrupt Disable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ITER</name>
<description>Max Number of Repetitions Reached Interrupt Disable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NACK</name>
<description>Non AcknowledgeInterrupt Disable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CTSIC</name>
<description>Clear to Send Input Change Interrupt Disable</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>MANE</name>
<description>Manchester Error Interrupt Disable</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IDR_SPI_MODE</name>
<description>Interrupt Disable Register</description>
<alternateGroup>SPI_MODE</alternateGroup>
<addressOffset>0x0000000C</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>RXRDY</name>
<description>RXRDY Interrupt Disable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TXRDY Interrupt Disable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>OVRE</name>
<description>Overrun Error Interrupt Disable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXEMPTY</name>
<description>TXEMPTY Interrupt Disable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>UNRE</name>
<description>SPI Underrun Error Interrupt Disable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IMR</name>
<description>Interrupt Mask Register</description>
<addressOffset>0x00000010</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>RXRDY</name>
<description>RXRDY Interrupt Mask</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TXRDY Interrupt Mask</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXBRK</name>
<description>Receiver Break Interrupt Mask</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>OVRE</name>
<description>Overrun Error Interrupt Mask</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>FRAME</name>
<description>Framing Error Interrupt Mask</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PARE</name>
<description>Parity Error Interrupt Mask</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TIMEOUT</name>
<description>Time-out Interrupt Mask</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXEMPTY</name>
<description>TXEMPTY Interrupt Mask</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ITER</name>
<description>Max Number of Repetitions Reached Interrupt Mask</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NACK</name>
<description>Non AcknowledgeInterrupt Mask</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CTSIC</name>
<description>Clear to Send Input Change Interrupt Mask</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>MANE</name>
<description>Manchester Error Interrupt Mask</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>IMR_SPI_MODE</name>
<description>Interrupt Mask Register</description>
<alternateGroup>SPI_MODE</alternateGroup>
<addressOffset>0x00000010</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>RXRDY</name>
<description>RXRDY Interrupt Mask</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TXRDY Interrupt Mask</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>OVRE</name>
<description>Overrun Error Interrupt Mask</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXEMPTY</name>
<description>TXEMPTY Interrupt Mask</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>UNRE</name>
<description>SPI Underrun Error Interrupt Mask</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>CSR</name>
<description>Channel Status Register</description>
<addressOffset>0x00000014</addressOffset>
<size>32</size>
<access>read-only</access>
<fields>
<field>
<name>RXRDY</name>
<description>Receiver Ready</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY</name>
<description>Transmitter Ready</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXBRK</name>
<description>Break Received/End of Break</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>OVRE</name>
<description>Overrun Error</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>FRAME</name>
<description>Framing Error</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PARE</name>
<description>Parity Error</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TIMEOUT</name>
<description>Receiver Time-out</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXEMPTY</name>
<description>Transmitter Empty</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ITER</name>
<description>MaxNumber of Repetitions Reached</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NACK</name>
<description>Non AcknowledgeInterrupt</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CTSIC</name>
<description>Clear to Send Input Change Flag</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CTS</name>
<description>Image of CTS Input</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>MANERR</name>
<description>Manchester Error</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>CSR_SPI_MODE</name>
<description>Channel Status Register</description>
<alternateGroup>SPI_MODE</alternateGroup>
<addressOffset>0x00000014</addressOffset>
<size>32</size>
<access>read-only</access>
<fields>
<field>
<name>RXRDY</name>
<description>Receiver Ready</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY</name>
<description>Transmitter Ready</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>OVRE</name>
<description>Overrun Error</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXEMPTY</name>
<description>Transmitter Empty</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>UNRE</name>
<description>Underrun Error</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>RHR</name>
<description>Receiver Holding Register</description>
<addressOffset>0x00000018</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>RXCHR</name>
<description>Received Character</description>
<bitOffset>0</bitOffset>
<bitWidth>9</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXSYNH</name>
<description>Received Sync</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>THR</name>
<description>Transmitter Holding Register</description>
<addressOffset>0x0000001C</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>TXCHR</name>
<description>Character to be Transmitted</description>
<bitOffset>0</bitOffset>
<bitWidth>9</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXSYNH</name>
<description>Sync Field to be Transmitted</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>BRGR</name>
<description>Baud Rate Generator Register</description>
<addressOffset>0x00000020</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CD</name>
<description>Clock Divider</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
<field>
<name>FP</name>
<description>Fractional Part</description>
<bitOffset>16</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>RTOR</name>
<description>Receiver Time-out Register</description>
<addressOffset>0x00000024</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>TO</name>
<description>Time-out Value</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>TTGR</name>
<description>Transmitter Timeguard Register</description>
<addressOffset>0x00000028</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>TG</name>
<description>Timeguard Value</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>FIDI</name>
<description>FI DI Ratio Register</description>
<addressOffset>0x00000040</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000174</resetValue>
<fields>
<field>
<name>FI_DI_RATIO</name>
<description>FI Over DI Ratio Value</description>
<bitOffset>0</bitOffset>
<bitWidth>11</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>NER</name>
<description>Number of Errors Register</description>
<addressOffset>0x00000044</addressOffset>
<size>32</size>
<access>read-only</access>
<fields>
<field>
<name>NB_ERRORS</name>
<description>Number of Errors</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>IF</name>
<description>IrDA Filter Register</description>
<addressOffset>0x0000004C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>IRDA_FILTER</name>
<description>IrDA Filter</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>MAN</name>
<description>Manchester Encoder Decoder Register</description>
<addressOffset>0x00000050</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0xB0011004</resetValue>
<fields>
<field>
<name>TX_PL</name>
<description>Transmitter Preamble Length</description>
<bitOffset>0</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>TX_PP</name>
<description>Transmitter Preamble Pattern</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>ALL_ONE</name>
<description>The preamble is composed of '1's</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ALL_ZERO</name>
<description>The preamble is composed of '0's</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>ZERO_ONE</name>
<description>The preamble is composed of '01's</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>ONE_ZERO</name>
<description>The preamble is composed of '10's</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>TX_MPOL</name>
<description>Transmitter Manchester Polarity</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>RX_PL</name>
<description>Receiver Preamble Length</description>
<bitOffset>16</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>RX_PP</name>
<description>Receiver Preamble Pattern detected</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>ALL_ONE</name>
<description>The preamble is composed of '1's</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ALL_ZERO</name>
<description>The preamble is composed of '0's</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>ZERO_ONE</name>
<description>The preamble is composed of '01's</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>ONE_ZERO</name>
<description>The preamble is composed of '10's</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>RX_MPOL</name>
<description>Receiver Manchester Polarity</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>ONE</name>
<description>Must Be Set to 1</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DRIFT</name>
<description>Drift Compensation</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>WPMR</name>
<description>Write Protect Mode Register</description>
<addressOffset>0x000000E4</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>WPEN</name>
<description>Write Protect Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>WPKEY</name>
<description>Write Protect KEY</description>
<bitOffset>8</bitOffset>
<bitWidth>24</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>WPSR</name>
<description>Write Protect Status Register</description>
<addressOffset>0x000000E8</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>WPVS</name>
<description>Write Protect Violation Status</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>WPVSRC</name>
<description>Write Protect Violation Source</description>
<bitOffset>8</bitOffset>
<bitWidth>16</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>UART0</name>
<version>6418G</version>
<description>Universal Asynchronous Receiver Transmitter 0</description>
<groupName>UART</groupName>
<prependToName>UART0_</prependToName>
<baseAddress>0xF0024000</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x4000</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>UART0</name>
<value>16</value>
</interrupt>
<registers>
<register>
<name>CR</name>
<description>Control Register</description>
<addressOffset>0x00000000</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>RSTRX</name>
<description>Reset Receiver</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RSTTX</name>
<description>Reset Transmitter</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXEN</name>
<description>Receiver Enable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXDIS</name>
<description>Receiver Disable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXEN</name>
<description>Transmitter Enable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXDIS</name>
<description>Transmitter Disable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RSTSTA</name>
<description>Reset Status Bits</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>MR</name>
<description>Mode Register</description>
<addressOffset>0x00000004</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>PAR</name>
<description>Parity Type</description>
<bitOffset>9</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>EVEN</name>
<description>Even Parity</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ODD</name>
<description>Odd Parity</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>SPACE</name>
<description>Space: parity forced to 0</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>MARK</name>
<description>Mark: parity forced to 1</description>
<value>0x3</value>
</enumeratedValue>
<enumeratedValue>
<name>NO</name>
<description>No Parity</description>
<value>0x4</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CHMODE</name>
<description>Channel Mode</description>
<bitOffset>14</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>NORMAL</name>
<description>Normal Mode</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>AUTOMATIC</name>
<description>Automatic Echo</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>LOCAL_LOOPBACK</name>
<description>Local Loopback</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>REMOTE_LOOPBACK</name>
<description>Remote Loopback</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>IER</name>
<description>Interrupt Enable Register</description>
<addressOffset>0x00000008</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>RXRDY</name>
<description>Enable RXRDY Interrupt</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY</name>
<description>Enable TXRDY Interrupt</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>OVRE</name>
<description>Enable Overrun Error Interrupt</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>FRAME</name>
<description>Enable Framing Error Interrupt</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PARE</name>
<description>Enable Parity Error Interrupt</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXEMPTY</name>
<description>Enable TXEMPTY Interrupt</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IDR</name>
<description>Interrupt Disable Register</description>
<addressOffset>0x0000000C</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>RXRDY</name>
<description>Disable RXRDY Interrupt</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY</name>
<description>Disable TXRDY Interrupt</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>OVRE</name>
<description>Disable Overrun Error Interrupt</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>FRAME</name>
<description>Disable Framing Error Interrupt</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PARE</name>
<description>Disable Parity Error Interrupt</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXEMPTY</name>
<description>Disable TXEMPTY Interrupt</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IMR</name>
<description>Interrupt Mask Register</description>
<addressOffset>0x00000010</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>RXRDY</name>
<description>Mask RXRDY Interrupt</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY</name>
<description>Disable TXRDY Interrupt</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>OVRE</name>
<description>Mask Overrun Error Interrupt</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>FRAME</name>
<description>Mask Framing Error Interrupt</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PARE</name>
<description>Mask Parity Error Interrupt</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXEMPTY</name>
<description>Mask TXEMPTY Interrupt</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>SR</name>
<description>Status Register</description>
<addressOffset>0x00000014</addressOffset>
<size>32</size>
<access>read-only</access>
<fields>
<field>
<name>RXRDY</name>
<description>Receiver Ready</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY</name>
<description>Transmitter Ready</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>OVRE</name>
<description>Overrun Error</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>FRAME</name>
<description>Framing Error</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PARE</name>
<description>Parity Error</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXEMPTY</name>
<description>Transmitter Empty</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>RHR</name>
<description>Receive Holding Register</description>
<addressOffset>0x00000018</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>RXCHR</name>
<description>Received Character</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>THR</name>
<description>Transmit Holding Register</description>
<addressOffset>0x0000001C</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>TXCHR</name>
<description>Character to be Transmitted</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>BRGR</name>
<description>Baud Rate Generator Register</description>
<addressOffset>0x00000020</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CD</name>
<description>Clock Divisor</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>PWM</name>
<version>6343J</version>
<description>Pulse Width Modulation Controller</description>
<prependToName>PWM_</prependToName>
<baseAddress>0xF002C000</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x4000</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>PWM</name>
<value>28</value>
</interrupt>
<registers>
<register>
<name>CLK</name>
<description>PWM Clock Register</description>
<addressOffset>0x00000000</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DIVA</name>
<description>CLKA, CLKB Divide Factor</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>PREA</name>
<description>CLKA, CLKB Source Clock Selection</description>
<bitOffset>8</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DIVB</name>
<description>CLKA, CLKB Divide Factor</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>PREB</name>
<description>CLKA, CLKB Source Clock Selection</description>
<bitOffset>24</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>ENA</name>
<description>PWM Enable Register</description>
<addressOffset>0x00000004</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>CHID0</name>
<description>Channel ID</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CHID1</name>
<description>Channel ID</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CHID2</name>
<description>Channel ID</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CHID3</name>
<description>Channel ID</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>DIS</name>
<description>PWM Disable Register</description>
<addressOffset>0x00000008</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>CHID0</name>
<description>Channel ID</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CHID1</name>
<description>Channel ID</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CHID2</name>
<description>Channel ID</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CHID3</name>
<description>Channel ID</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>SR</name>
<description>PWM Status Register</description>
<addressOffset>0x0000000C</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CHID0</name>
<description>Channel ID</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CHID1</name>
<description>Channel ID</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CHID2</name>
<description>Channel ID</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CHID3</name>
<description>Channel ID</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>IER1</name>
<description>PWM Interrupt Enable Register 1</description>
<addressOffset>0x00000010</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>CHID0</name>
<description>Counter Event on Channel 0 Interrupt Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CHID1</name>
<description>Counter Event on Channel 1 Interrupt Enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CHID2</name>
<description>Counter Event on Channel 2 Interrupt Enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CHID3</name>
<description>Counter Event on Channel 3 Interrupt Enable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>FCHID0</name>
<description>Fault Protection Trigger on Channel 0 Interrupt Enable</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>FCHID1</name>
<description>Fault Protection Trigger on Channel 1 Interrupt Enable</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>FCHID2</name>
<description>Fault Protection Trigger on Channel 2 Interrupt Enable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>FCHID3</name>
<description>Fault Protection Trigger on Channel 3 Interrupt Enable</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IDR1</name>
<description>PWM Interrupt Disable Register 1</description>
<addressOffset>0x00000014</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>CHID0</name>
<description>Counter Event on Channel 0 Interrupt Disable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CHID1</name>
<description>Counter Event on Channel 1 Interrupt Disable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CHID2</name>
<description>Counter Event on Channel 2 Interrupt Disable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CHID3</name>
<description>Counter Event on Channel 3 Interrupt Disable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>FCHID0</name>
<description>Fault Protection Trigger on Channel 0 Interrupt Disable</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>FCHID1</name>
<description>Fault Protection Trigger on Channel 1 Interrupt Disable</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>FCHID2</name>
<description>Fault Protection Trigger on Channel 2 Interrupt Disable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>FCHID3</name>
<description>Fault Protection Trigger on Channel 3 Interrupt Disable</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IMR1</name>
<description>PWM Interrupt Mask Register 1</description>
<addressOffset>0x00000018</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CHID0</name>
<description>Counter Event on Channel 0 Interrupt Mask</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CHID1</name>
<description>Counter Event on Channel 1 Interrupt Mask</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CHID2</name>
<description>Counter Event on Channel 2 Interrupt Mask</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CHID3</name>
<description>Counter Event on Channel 3 Interrupt Mask</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>FCHID0</name>
<description>Fault Protection Trigger on Channel 0 Interrupt Mask</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>FCHID1</name>
<description>Fault Protection Trigger on Channel 1 Interrupt Mask</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>FCHID2</name>
<description>Fault Protection Trigger on Channel 2 Interrupt Mask</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>FCHID3</name>
<description>Fault Protection Trigger on Channel 3 Interrupt Mask</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>ISR1</name>
<description>PWM Interrupt Status Register 1</description>
<addressOffset>0x0000001C</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CHID0</name>
<description>Counter Event on Channel 0</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CHID1</name>
<description>Counter Event on Channel 1</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CHID2</name>
<description>Counter Event on Channel 2</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CHID3</name>
<description>Counter Event on Channel 3</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>FCHID0</name>
<description>Fault Protection Trigger on Channel 0</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>FCHID1</name>
<description>Fault Protection Trigger on Channel 1</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>FCHID2</name>
<description>Fault Protection Trigger on Channel 2</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>FCHID3</name>
<description>Fault Protection Trigger on Channel 3</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>SCM</name>
<description>PWM Sync Channels Mode Register</description>
<addressOffset>0x00000020</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SYNC0</name>
<description>Synchronous Channel 0</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SYNC1</name>
<description>Synchronous Channel 1</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SYNC2</name>
<description>Synchronous Channel 2</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SYNC3</name>
<description>Synchronous Channel 3</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>UPDM</name>
<description>Synchronous Channels Update Mode</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>MODE0</name>
<description>Manual write of double buffer registers and manual update of synchronous channels</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>MODE1</name>
<description>Manual write of double buffer registers and automatic update of synchronous channels</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>SCUC</name>
<description>PWM Sync Channels Update Control Register</description>
<addressOffset>0x00000028</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>UPDULOCK</name>
<description>Synchronous Channels Update Unlock</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>SCUP</name>
<description>PWM Sync Channels Update Period Register</description>
<addressOffset>0x0000002C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>UPR</name>
<description>Update Period</description>
<bitOffset>0</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>UPRCNT</name>
<description>Update Period Counter</description>
<bitOffset>4</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>SCUPUPD</name>
<description>PWM Sync Channels Update Period Update Register</description>
<addressOffset>0x00000030</addressOffset>
<size>32</size>
<access>write-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>UPRUPD</name>
<description>Update Period Update</description>
<bitOffset>0</bitOffset>
<bitWidth>4</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IER2</name>
<description>PWM Interrupt Enable Register 2</description>
<addressOffset>0x00000034</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>WRDY</name>
<description>Write Ready for Synchronous Channels Update Interrupt Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>UNRE</name>
<description>Synchronous Channels Update Underrun Error Interrupt Enable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CMPM0</name>
<description>Comparison 0 Match Interrupt Enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CMPM1</name>
<description>Comparison 1 Match Interrupt Enable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CMPM2</name>
<description>Comparison 2 Match Interrupt Enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CMPM3</name>
<description>Comparison 3 Match Interrupt Enable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CMPM4</name>
<description>Comparison 4 Match Interrupt Enable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CMPM5</name>
<description>Comparison 5 Match Interrupt Enable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CMPM6</name>
<description>Comparison 6 Match Interrupt Enable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CMPM7</name>
<description>Comparison 7 Match Interrupt Enable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CMPU0</name>
<description>Comparison 0 Update Interrupt Enable</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CMPU1</name>
<description>Comparison 1 Update Interrupt Enable</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CMPU2</name>
<description>Comparison 2 Update Interrupt Enable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CMPU3</name>
<description>Comparison 3 Update Interrupt Enable</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CMPU4</name>
<description>Comparison 4 Update Interrupt Enable</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CMPU5</name>
<description>Comparison 5 Update Interrupt Enable</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CMPU6</name>
<description>Comparison 6 Update Interrupt Enable</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CMPU7</name>
<description>Comparison 7 Update Interrupt Enable</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IDR2</name>
<description>PWM Interrupt Disable Register 2</description>
<addressOffset>0x00000038</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>WRDY</name>
<description>Write Ready for Synchronous Channels Update Interrupt Disable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>UNRE</name>
<description>Synchronous Channels Update Underrun Error Interrupt Disable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CMPM0</name>
<description>Comparison 0 Match Interrupt Disable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CMPM1</name>
<description>Comparison 1 Match Interrupt Disable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CMPM2</name>
<description>Comparison 2 Match Interrupt Disable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CMPM3</name>
<description>Comparison 3 Match Interrupt Disable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CMPM4</name>
<description>Comparison 4 Match Interrupt Disable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CMPM5</name>
<description>Comparison 5 Match Interrupt Disable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CMPM6</name>
<description>Comparison 6 Match Interrupt Disable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CMPM7</name>
<description>Comparison 7 Match Interrupt Disable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CMPU0</name>
<description>Comparison 0 Update Interrupt Disable</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CMPU1</name>
<description>Comparison 1 Update Interrupt Disable</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CMPU2</name>
<description>Comparison 2 Update Interrupt Disable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CMPU3</name>
<description>Comparison 3 Update Interrupt Disable</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CMPU4</name>
<description>Comparison 4 Update Interrupt Disable</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CMPU5</name>
<description>Comparison 5 Update Interrupt Disable</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CMPU6</name>
<description>Comparison 6 Update Interrupt Disable</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CMPU7</name>
<description>Comparison 7 Update Interrupt Disable</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IMR2</name>
<description>PWM Interrupt Mask Register 2</description>
<addressOffset>0x0000003C</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>WRDY</name>
<description>Write Ready for Synchronous Channels Update Interrupt Mask</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>UNRE</name>
<description>Synchronous Channels Update Underrun Error Interrupt Mask</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CMPM0</name>
<description>Comparison 0 Match Interrupt Mask</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CMPM1</name>
<description>Comparison 1 Match Interrupt Mask</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CMPM2</name>
<description>Comparison 2 Match Interrupt Mask</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CMPM3</name>
<description>Comparison 3 Match Interrupt Mask</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CMPM4</name>
<description>Comparison 4 Match Interrupt Mask</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CMPM5</name>
<description>Comparison 5 Match Interrupt Mask</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CMPM6</name>
<description>Comparison 6 Match Interrupt Mask</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CMPM7</name>
<description>Comparison 7 Match Interrupt Mask</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CMPU0</name>
<description>Comparison 0 Update Interrupt Mask</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CMPU1</name>
<description>Comparison 1 Update Interrupt Mask</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CMPU2</name>
<description>Comparison 2 Update Interrupt Mask</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CMPU3</name>
<description>Comparison 3 Update Interrupt Mask</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CMPU4</name>
<description>Comparison 4 Update Interrupt Mask</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CMPU5</name>
<description>Comparison 5 Update Interrupt Mask</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CMPU6</name>
<description>Comparison 6 Update Interrupt Mask</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CMPU7</name>
<description>Comparison 7 Update Interrupt Mask</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>ISR2</name>
<description>PWM Interrupt Status Register 2</description>
<addressOffset>0x00000040</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>WRDY</name>
<description>Write Ready for Synchronous Channels Update</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>UNRE</name>
<description>Synchronous Channels Update Underrun Error</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CMPM0</name>
<description>Comparison 0 Match</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CMPM1</name>
<description>Comparison 1 Match</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CMPM2</name>
<description>Comparison 2 Match</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CMPM3</name>
<description>Comparison 3 Match</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CMPM4</name>
<description>Comparison 4 Match</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CMPM5</name>
<description>Comparison 5 Match</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CMPM6</name>
<description>Comparison 6 Match</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CMPM7</name>
<description>Comparison 7 Match</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CMPU0</name>
<description>Comparison 0 Update</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CMPU1</name>
<description>Comparison 1 Update</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CMPU2</name>
<description>Comparison 2 Update</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CMPU3</name>
<description>Comparison 3 Update</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CMPU4</name>
<description>Comparison 4 Update</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CMPU5</name>
<description>Comparison 5 Update</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CMPU6</name>
<description>Comparison 6 Update</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CMPU7</name>
<description>Comparison 7 Update</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>OOV</name>
<description>PWM Output Override Value Register</description>
<addressOffset>0x00000044</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>OOVH0</name>
<description>Output Override Value for PWMH output of the channel 0</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>OOVH1</name>
<description>Output Override Value for PWMH output of the channel 1</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>OOVH2</name>
<description>Output Override Value for PWMH output of the channel 2</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>OOVH3</name>
<description>Output Override Value for PWMH output of the channel 3</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>OOVL0</name>
<description>Output Override Value for PWML output of the channel 0</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>OOVL1</name>
<description>Output Override Value for PWML output of the channel 1</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>OOVL2</name>
<description>Output Override Value for PWML output of the channel 2</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>OOVL3</name>
<description>Output Override Value for PWML output of the channel 3</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>OS</name>
<description>PWM Output Selection Register</description>
<addressOffset>0x00000048</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>OSH0</name>
<description>Output Selection for PWMH output of the channel 0</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>OSH1</name>
<description>Output Selection for PWMH output of the channel 1</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>OSH2</name>
<description>Output Selection for PWMH output of the channel 2</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>OSH3</name>
<description>Output Selection for PWMH output of the channel 3</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>OSL0</name>
<description>Output Selection for PWML output of the channel 0</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>OSL1</name>
<description>Output Selection for PWML output of the channel 1</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>OSL2</name>
<description>Output Selection for PWML output of the channel 2</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>OSL3</name>
<description>Output Selection for PWML output of the channel 3</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>OSS</name>
<description>PWM Output Selection Set Register</description>
<addressOffset>0x0000004C</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>OSSH0</name>
<description>Output Selection Set for PWMH output of the channel 0</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>OSSH1</name>
<description>Output Selection Set for PWMH output of the channel 1</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>OSSH2</name>
<description>Output Selection Set for PWMH output of the channel 2</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>OSSH3</name>
<description>Output Selection Set for PWMH output of the channel 3</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>OSSL0</name>
<description>Output Selection Set for PWML output of the channel 0</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>OSSL1</name>
<description>Output Selection Set for PWML output of the channel 1</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>OSSL2</name>
<description>Output Selection Set for PWML output of the channel 2</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>OSSL3</name>
<description>Output Selection Set for PWML output of the channel 3</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>OSC</name>
<description>PWM Output Selection Clear Register</description>
<addressOffset>0x00000050</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>OSCH0</name>
<description>Output Selection Clear for PWMH output of the channel 0</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>OSCH1</name>
<description>Output Selection Clear for PWMH output of the channel 1</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>OSCH2</name>
<description>Output Selection Clear for PWMH output of the channel 2</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>OSCH3</name>
<description>Output Selection Clear for PWMH output of the channel 3</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>OSCL0</name>
<description>Output Selection Clear for PWML output of the channel 0</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>OSCL1</name>
<description>Output Selection Clear for PWML output of the channel 1</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>OSCL2</name>
<description>Output Selection Clear for PWML output of the channel 2</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>OSCL3</name>
<description>Output Selection Clear for PWML output of the channel 3</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>OSSUPD</name>
<description>PWM Output Selection Set Update Register</description>
<addressOffset>0x00000054</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>OSSUPH0</name>
<description>Output Selection Set for PWMH output of the channel 0</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>OSSUPH1</name>
<description>Output Selection Set for PWMH output of the channel 1</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>OSSUPH2</name>
<description>Output Selection Set for PWMH output of the channel 2</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>OSSUPH3</name>
<description>Output Selection Set for PWMH output of the channel 3</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>OSSUPL0</name>
<description>Output Selection Set for PWML output of the channel 0</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>OSSUPL1</name>
<description>Output Selection Set for PWML output of the channel 1</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>OSSUPL2</name>
<description>Output Selection Set for PWML output of the channel 2</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>OSSUPL3</name>
<description>Output Selection Set for PWML output of the channel 3</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>OSCUPD</name>
<description>PWM Output Selection Clear Update Register</description>
<addressOffset>0x00000058</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>OSCUPH0</name>
<description>Output Selection Clear for PWMH output of the channel 0</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>OSCUPH1</name>
<description>Output Selection Clear for PWMH output of the channel 1</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>OSCUPH2</name>
<description>Output Selection Clear for PWMH output of the channel 2</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>OSCUPH3</name>
<description>Output Selection Clear for PWMH output of the channel 3</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>OSCUPL0</name>
<description>Output Selection Clear for PWML output of the channel 0</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>OSCUPL1</name>
<description>Output Selection Clear for PWML output of the channel 1</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>OSCUPL2</name>
<description>Output Selection Clear for PWML output of the channel 2</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>OSCUPL3</name>
<description>Output Selection Clear for PWML output of the channel 3</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>FMR</name>
<description>PWM Fault Mode Register</description>
<addressOffset>0x0000005C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>FPOL</name>
<description>Fault Polarity (fault input bit varies from 0 to )</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>FMOD</name>
<description>Fault Activation Mode (fault input bit varies from 0 to )</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>FFIL</name>
<description>Fault Filtering (fault input bit varies from 0 to )</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>FSR</name>
<description>PWM Fault Status Register</description>
<addressOffset>0x00000060</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>FIV</name>
<description>Fault Input Value (fault input bit varies from 0 to )</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-only</access>
</field>
<field>
<name>FS</name>
<description>Fault Status (fault input bit varies from 0 to )</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>FCR</name>
<description>PWM Fault Clear Register</description>
<addressOffset>0x00000064</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>FCLR</name>
<description>Fault Clear (fault input bit varies from 0 to )</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>FPV</name>
<description>PWM Fault Protection Value Register</description>
<addressOffset>0x00000068</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>FPVH0</name>
<description>Fault Protection Value for PWMH output on channel 0</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>FPVH1</name>
<description>Fault Protection Value for PWMH output on channel 1</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>FPVH2</name>
<description>Fault Protection Value for PWMH output on channel 2</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>FPVH3</name>
<description>Fault Protection Value for PWMH output on channel 3</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>FPVL0</name>
<description>Fault Protection Value for PWML output on channel 0</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>FPVL1</name>
<description>Fault Protection Value for PWML output on channel 1</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>FPVL2</name>
<description>Fault Protection Value for PWML output on channel 2</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>FPVL3</name>
<description>Fault Protection Value for PWML output on channel 3</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>FPE</name>
<description>PWM Fault Protection Enable Register</description>
<addressOffset>0x0000006C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>FPE0</name>
<description>Fault Protection Enable for channel 0 (fault input bit varies from 0 to )</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>FPE1</name>
<description>Fault Protection Enable for channel 1 (fault input bit varies from 0 to )</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>FPE2</name>
<description>Fault Protection Enable for channel 2 (fault input bit varies from 0 to )</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>FPE3</name>
<description>Fault Protection Enable for channel 3 (fault input bit varies from 0 to )</description>
<bitOffset>24</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<dim>2</dim>
<dimIncrement>4</dimIncrement>
<dimIndex>0-1</dimIndex>
<name>ELMR[%s]</name>
<description>PWM Event Line 0 Mode Register</description>
<addressOffset>0x0000007C</addressOffset>
<size>32</size>
<access>read-write</access>
<fields>
<field>
<name>CSEL0</name>
<description>Comparison 0 Selection</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CSEL1</name>
<description>Comparison 1 Selection</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CSEL2</name>
<description>Comparison 2 Selection</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CSEL3</name>
<description>Comparison 3 Selection</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CSEL4</name>
<description>Comparison 4 Selection</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CSEL5</name>
<description>Comparison 5 Selection</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CSEL6</name>
<description>Comparison 6 Selection</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CSEL7</name>
<description>Comparison 7 Selection</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>SMMR</name>
<description>PWM Stepper Motor Mode Register</description>
<addressOffset>0x000000B0</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>GCEN0</name>
<description>Gray Count ENable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>GCEN1</name>
<description>Gray Count ENable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DOWN0</name>
<description>DOWN Count</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DOWN1</name>
<description>DOWN Count</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>WPCR</name>
<description>PWM Write Protect Control Register</description>
<addressOffset>0x000000E4</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>WPCMD</name>
<description>Write Protect Command</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>write-only</access>
</field>
<field>
<name>WPRG0</name>
<description>Write Protect Register Group 0</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>WPRG1</name>
<description>Write Protect Register Group 1</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>WPRG2</name>
<description>Write Protect Register Group 2</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>WPRG3</name>
<description>Write Protect Register Group 3</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>WPRG4</name>
<description>Write Protect Register Group 4</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>WPRG5</name>
<description>Write Protect Register Group 5</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>WPKEY</name>
<description>Write Protect Key</description>
<bitOffset>8</bitOffset>
<bitWidth>24</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>WPSR</name>
<description>PWM Write Protect Status Register</description>
<addressOffset>0x000000E8</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>WPSWS0</name>
<description>Write Protect SW Status</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>WPSWS1</name>
<description>Write Protect SW Status</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>WPSWS2</name>
<description>Write Protect SW Status</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>WPSWS3</name>
<description>Write Protect SW Status</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>WPSWS4</name>
<description>Write Protect SW Status</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>WPSWS5</name>
<description>Write Protect SW Status</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>WPVS</name>
<description>Write Protect Violation Status</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>WPHWS0</name>
<description>Write Protect HW Status</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>WPHWS1</name>
<description>Write Protect HW Status</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>WPHWS2</name>
<description>Write Protect HW Status</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>WPHWS3</name>
<description>Write Protect HW Status</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>WPHWS4</name>
<description>Write Protect HW Status</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>WPHWS5</name>
<description>Write Protect HW Status</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>WPVSRC</name>
<description>Write Protect Violation Source</description>
<bitOffset>16</bitOffset>
<bitWidth>16</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>CMPV0</name>
<description>PWM Comparison 0 Value Register</description>
<addressOffset>0x00000130</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CV</name>
<description>Comparison x Value</description>
<bitOffset>0</bitOffset>
<bitWidth>24</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CVM</name>
<description>Comparison x Value Mode</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>CMPVUPD0</name>
<description>PWM Comparison 0 Value Update Register</description>
<addressOffset>0x00000134</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>CVUPD</name>
<description>Comparison x Value Update</description>
<bitOffset>0</bitOffset>
<bitWidth>24</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CVMUPD</name>
<description>Comparison x Value Mode Update</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>CMPM0</name>
<description>PWM Comparison 0 Mode Register</description>
<addressOffset>0x00000138</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CEN</name>
<description>Comparison x Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CTR</name>
<description>Comparison x Trigger</description>
<bitOffset>4</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CPR</name>
<description>Comparison x Period</description>
<bitOffset>8</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CPRCNT</name>
<description>Comparison x Period Counter</description>
<bitOffset>12</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CUPR</name>
<description>Comparison x Update Period</description>
<bitOffset>16</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CUPRCNT</name>
<description>Comparison x Update Period Counter</description>
<bitOffset>20</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>CMPMUPD0</name>
<description>PWM Comparison 0 Mode Update Register</description>
<addressOffset>0x0000013C</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>CENUPD</name>
<description>Comparison x Enable Update</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CTRUPD</name>
<description>Comparison x Trigger Update</description>
<bitOffset>4</bitOffset>
<bitWidth>4</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CPRUPD</name>
<description>Comparison x Period Update</description>
<bitOffset>8</bitOffset>
<bitWidth>4</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CUPRUPD</name>
<description>Comparison x Update Period Update</description>
<bitOffset>16</bitOffset>
<bitWidth>4</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>CMPV1</name>
<description>PWM Comparison 1 Value Register</description>
<addressOffset>0x00000140</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CV</name>
<description>Comparison x Value</description>
<bitOffset>0</bitOffset>
<bitWidth>24</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CVM</name>
<description>Comparison x Value Mode</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>CMPVUPD1</name>
<description>PWM Comparison 1 Value Update Register</description>
<addressOffset>0x00000144</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>CVUPD</name>
<description>Comparison x Value Update</description>
<bitOffset>0</bitOffset>
<bitWidth>24</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CVMUPD</name>
<description>Comparison x Value Mode Update</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>CMPM1</name>
<description>PWM Comparison 1 Mode Register</description>
<addressOffset>0x00000148</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CEN</name>
<description>Comparison x Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CTR</name>
<description>Comparison x Trigger</description>
<bitOffset>4</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CPR</name>
<description>Comparison x Period</description>
<bitOffset>8</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CPRCNT</name>
<description>Comparison x Period Counter</description>
<bitOffset>12</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CUPR</name>
<description>Comparison x Update Period</description>
<bitOffset>16</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CUPRCNT</name>
<description>Comparison x Update Period Counter</description>
<bitOffset>20</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>CMPMUPD1</name>
<description>PWM Comparison 1 Mode Update Register</description>
<addressOffset>0x0000014C</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>CENUPD</name>
<description>Comparison x Enable Update</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CTRUPD</name>
<description>Comparison x Trigger Update</description>
<bitOffset>4</bitOffset>
<bitWidth>4</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CPRUPD</name>
<description>Comparison x Period Update</description>
<bitOffset>8</bitOffset>
<bitWidth>4</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CUPRUPD</name>
<description>Comparison x Update Period Update</description>
<bitOffset>16</bitOffset>
<bitWidth>4</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>CMPV2</name>
<description>PWM Comparison 2 Value Register</description>
<addressOffset>0x00000150</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CV</name>
<description>Comparison x Value</description>
<bitOffset>0</bitOffset>
<bitWidth>24</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CVM</name>
<description>Comparison x Value Mode</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>CMPVUPD2</name>
<description>PWM Comparison 2 Value Update Register</description>
<addressOffset>0x00000154</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>CVUPD</name>
<description>Comparison x Value Update</description>
<bitOffset>0</bitOffset>
<bitWidth>24</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CVMUPD</name>
<description>Comparison x Value Mode Update</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>CMPM2</name>
<description>PWM Comparison 2 Mode Register</description>
<addressOffset>0x00000158</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CEN</name>
<description>Comparison x Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CTR</name>
<description>Comparison x Trigger</description>
<bitOffset>4</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CPR</name>
<description>Comparison x Period</description>
<bitOffset>8</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CPRCNT</name>
<description>Comparison x Period Counter</description>
<bitOffset>12</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CUPR</name>
<description>Comparison x Update Period</description>
<bitOffset>16</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CUPRCNT</name>
<description>Comparison x Update Period Counter</description>
<bitOffset>20</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>CMPMUPD2</name>
<description>PWM Comparison 2 Mode Update Register</description>
<addressOffset>0x0000015C</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>CENUPD</name>
<description>Comparison x Enable Update</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CTRUPD</name>
<description>Comparison x Trigger Update</description>
<bitOffset>4</bitOffset>
<bitWidth>4</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CPRUPD</name>
<description>Comparison x Period Update</description>
<bitOffset>8</bitOffset>
<bitWidth>4</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CUPRUPD</name>
<description>Comparison x Update Period Update</description>
<bitOffset>16</bitOffset>
<bitWidth>4</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>CMPV3</name>
<description>PWM Comparison 3 Value Register</description>
<addressOffset>0x00000160</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CV</name>
<description>Comparison x Value</description>
<bitOffset>0</bitOffset>
<bitWidth>24</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CVM</name>
<description>Comparison x Value Mode</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>CMPVUPD3</name>
<description>PWM Comparison 3 Value Update Register</description>
<addressOffset>0x00000164</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>CVUPD</name>
<description>Comparison x Value Update</description>
<bitOffset>0</bitOffset>
<bitWidth>24</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CVMUPD</name>
<description>Comparison x Value Mode Update</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>CMPM3</name>
<description>PWM Comparison 3 Mode Register</description>
<addressOffset>0x00000168</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CEN</name>
<description>Comparison x Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CTR</name>
<description>Comparison x Trigger</description>
<bitOffset>4</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CPR</name>
<description>Comparison x Period</description>
<bitOffset>8</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CPRCNT</name>
<description>Comparison x Period Counter</description>
<bitOffset>12</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CUPR</name>
<description>Comparison x Update Period</description>
<bitOffset>16</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CUPRCNT</name>
<description>Comparison x Update Period Counter</description>
<bitOffset>20</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>CMPMUPD3</name>
<description>PWM Comparison 3 Mode Update Register</description>
<addressOffset>0x0000016C</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>CENUPD</name>
<description>Comparison x Enable Update</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CTRUPD</name>
<description>Comparison x Trigger Update</description>
<bitOffset>4</bitOffset>
<bitWidth>4</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CPRUPD</name>
<description>Comparison x Period Update</description>
<bitOffset>8</bitOffset>
<bitWidth>4</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CUPRUPD</name>
<description>Comparison x Update Period Update</description>
<bitOffset>16</bitOffset>
<bitWidth>4</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>CMPV4</name>
<description>PWM Comparison 4 Value Register</description>
<addressOffset>0x00000170</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CV</name>
<description>Comparison x Value</description>
<bitOffset>0</bitOffset>
<bitWidth>24</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CVM</name>
<description>Comparison x Value Mode</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>CMPVUPD4</name>
<description>PWM Comparison 4 Value Update Register</description>
<addressOffset>0x00000174</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>CVUPD</name>
<description>Comparison x Value Update</description>
<bitOffset>0</bitOffset>
<bitWidth>24</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CVMUPD</name>
<description>Comparison x Value Mode Update</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>CMPM4</name>
<description>PWM Comparison 4 Mode Register</description>
<addressOffset>0x00000178</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CEN</name>
<description>Comparison x Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CTR</name>
<description>Comparison x Trigger</description>
<bitOffset>4</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CPR</name>
<description>Comparison x Period</description>
<bitOffset>8</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CPRCNT</name>
<description>Comparison x Period Counter</description>
<bitOffset>12</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CUPR</name>
<description>Comparison x Update Period</description>
<bitOffset>16</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CUPRCNT</name>
<description>Comparison x Update Period Counter</description>
<bitOffset>20</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>CMPMUPD4</name>
<description>PWM Comparison 4 Mode Update Register</description>
<addressOffset>0x0000017C</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>CENUPD</name>
<description>Comparison x Enable Update</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CTRUPD</name>
<description>Comparison x Trigger Update</description>
<bitOffset>4</bitOffset>
<bitWidth>4</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CPRUPD</name>
<description>Comparison x Period Update</description>
<bitOffset>8</bitOffset>
<bitWidth>4</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CUPRUPD</name>
<description>Comparison x Update Period Update</description>
<bitOffset>16</bitOffset>
<bitWidth>4</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>CMPV5</name>
<description>PWM Comparison 5 Value Register</description>
<addressOffset>0x00000180</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CV</name>
<description>Comparison x Value</description>
<bitOffset>0</bitOffset>
<bitWidth>24</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CVM</name>
<description>Comparison x Value Mode</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>CMPVUPD5</name>
<description>PWM Comparison 5 Value Update Register</description>
<addressOffset>0x00000184</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>CVUPD</name>
<description>Comparison x Value Update</description>
<bitOffset>0</bitOffset>
<bitWidth>24</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CVMUPD</name>
<description>Comparison x Value Mode Update</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>CMPM5</name>
<description>PWM Comparison 5 Mode Register</description>
<addressOffset>0x00000188</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CEN</name>
<description>Comparison x Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CTR</name>
<description>Comparison x Trigger</description>
<bitOffset>4</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CPR</name>
<description>Comparison x Period</description>
<bitOffset>8</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CPRCNT</name>
<description>Comparison x Period Counter</description>
<bitOffset>12</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CUPR</name>
<description>Comparison x Update Period</description>
<bitOffset>16</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CUPRCNT</name>
<description>Comparison x Update Period Counter</description>
<bitOffset>20</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>CMPMUPD5</name>
<description>PWM Comparison 5 Mode Update Register</description>
<addressOffset>0x0000018C</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>CENUPD</name>
<description>Comparison x Enable Update</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CTRUPD</name>
<description>Comparison x Trigger Update</description>
<bitOffset>4</bitOffset>
<bitWidth>4</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CPRUPD</name>
<description>Comparison x Period Update</description>
<bitOffset>8</bitOffset>
<bitWidth>4</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CUPRUPD</name>
<description>Comparison x Update Period Update</description>
<bitOffset>16</bitOffset>
<bitWidth>4</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>CMPV6</name>
<description>PWM Comparison 6 Value Register</description>
<addressOffset>0x00000190</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CV</name>
<description>Comparison x Value</description>
<bitOffset>0</bitOffset>
<bitWidth>24</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CVM</name>
<description>Comparison x Value Mode</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>CMPVUPD6</name>
<description>PWM Comparison 6 Value Update Register</description>
<addressOffset>0x00000194</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>CVUPD</name>
<description>Comparison x Value Update</description>
<bitOffset>0</bitOffset>
<bitWidth>24</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CVMUPD</name>
<description>Comparison x Value Mode Update</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>CMPM6</name>
<description>PWM Comparison 6 Mode Register</description>
<addressOffset>0x00000198</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CEN</name>
<description>Comparison x Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CTR</name>
<description>Comparison x Trigger</description>
<bitOffset>4</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CPR</name>
<description>Comparison x Period</description>
<bitOffset>8</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CPRCNT</name>
<description>Comparison x Period Counter</description>
<bitOffset>12</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CUPR</name>
<description>Comparison x Update Period</description>
<bitOffset>16</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CUPRCNT</name>
<description>Comparison x Update Period Counter</description>
<bitOffset>20</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>CMPMUPD6</name>
<description>PWM Comparison 6 Mode Update Register</description>
<addressOffset>0x0000019C</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>CENUPD</name>
<description>Comparison x Enable Update</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CTRUPD</name>
<description>Comparison x Trigger Update</description>
<bitOffset>4</bitOffset>
<bitWidth>4</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CPRUPD</name>
<description>Comparison x Period Update</description>
<bitOffset>8</bitOffset>
<bitWidth>4</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CUPRUPD</name>
<description>Comparison x Update Period Update</description>
<bitOffset>16</bitOffset>
<bitWidth>4</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>CMPV7</name>
<description>PWM Comparison 7 Value Register</description>
<addressOffset>0x000001A0</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CV</name>
<description>Comparison x Value</description>
<bitOffset>0</bitOffset>
<bitWidth>24</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CVM</name>
<description>Comparison x Value Mode</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>CMPVUPD7</name>
<description>PWM Comparison 7 Value Update Register</description>
<addressOffset>0x000001A4</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>CVUPD</name>
<description>Comparison x Value Update</description>
<bitOffset>0</bitOffset>
<bitWidth>24</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CVMUPD</name>
<description>Comparison x Value Mode Update</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>CMPM7</name>
<description>PWM Comparison 7 Mode Register</description>
<addressOffset>0x000001A8</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CEN</name>
<description>Comparison x Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CTR</name>
<description>Comparison x Trigger</description>
<bitOffset>4</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CPR</name>
<description>Comparison x Period</description>
<bitOffset>8</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CPRCNT</name>
<description>Comparison x Period Counter</description>
<bitOffset>12</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CUPR</name>
<description>Comparison x Update Period</description>
<bitOffset>16</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CUPRCNT</name>
<description>Comparison x Update Period Counter</description>
<bitOffset>20</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>CMPMUPD7</name>
<description>PWM Comparison 7 Mode Update Register</description>
<addressOffset>0x000001AC</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>CENUPD</name>
<description>Comparison x Enable Update</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CTRUPD</name>
<description>Comparison x Trigger Update</description>
<bitOffset>4</bitOffset>
<bitWidth>4</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CPRUPD</name>
<description>Comparison x Period Update</description>
<bitOffset>8</bitOffset>
<bitWidth>4</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CUPRUPD</name>
<description>Comparison x Update Period Update</description>
<bitOffset>16</bitOffset>
<bitWidth>4</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>CMR0</name>
<description>PWM Channel Mode Register (ch_num = 0)</description>
<addressOffset>0x00000200</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CPRE</name>
<description>Channel Pre-scaler</description>
<bitOffset>0</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>MCK</name>
<description>Master clock</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>MCK_DIV_2</name>
<description>Master clock/2</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>MCK_DIV_4</name>
<description>Master clock/4</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>MCK_DIV_8</name>
<description>Master clock/8</description>
<value>0x3</value>
</enumeratedValue>
<enumeratedValue>
<name>MCK_DIV_16</name>
<description>Master clock/16</description>
<value>0x4</value>
</enumeratedValue>
<enumeratedValue>
<name>MCK_DIV_32</name>
<description>Master clock/32</description>
<value>0x5</value>
</enumeratedValue>
<enumeratedValue>
<name>MCK_DIV_64</name>
<description>Master clock/64</description>
<value>0x6</value>
</enumeratedValue>
<enumeratedValue>
<name>MCK_DIV_128</name>
<description>Master clock/128</description>
<value>0x7</value>
</enumeratedValue>
<enumeratedValue>
<name>MCK_DIV_256</name>
<description>Master clock/256</description>
<value>0x8</value>
</enumeratedValue>
<enumeratedValue>
<name>MCK_DIV_512</name>
<description>Master clock/512</description>
<value>0x9</value>
</enumeratedValue>
<enumeratedValue>
<name>MCK_DIV_1024</name>
<description>Master clock/1024</description>
<value>0xA</value>
</enumeratedValue>
<enumeratedValue>
<name>CLKA</name>
<description>Clock A</description>
<value>0xB</value>
</enumeratedValue>
<enumeratedValue>
<name>CLKB</name>
<description>Clock B</description>
<value>0xC</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CALG</name>
<description>Channel Alignment</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CPOL</name>
<description>Channel Polarity</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CES</name>
<description>Counter Event Selection</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DTE</name>
<description>Dead-Time Generator Enable</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DTHI</name>
<description>Dead-Time PWMHx Output Inverted</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DTLI</name>
<description>Dead-Time PWMLx Output Inverted</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>CDTY0</name>
<description>PWM Channel Duty Cycle Register (ch_num = 0)</description>
<addressOffset>0x00000204</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CDTY</name>
<description>Channel Duty-Cycle</description>
<bitOffset>0</bitOffset>
<bitWidth>24</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>CDTYUPD0</name>
<description>PWM Channel Duty Cycle Update Register (ch_num = 0)</description>
<addressOffset>0x00000208</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>CDTYUPD</name>
<description>Channel Duty-Cycle Update</description>
<bitOffset>0</bitOffset>
<bitWidth>24</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>CPRD0</name>
<description>PWM Channel Period Register (ch_num = 0)</description>
<addressOffset>0x0000020C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CPRD</name>
<description>Channel Period</description>
<bitOffset>0</bitOffset>
<bitWidth>24</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>CPRDUPD0</name>
<description>PWM Channel Period Update Register (ch_num = 0)</description>
<addressOffset>0x00000210</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>CPRDUPD</name>
<description>Channel Period Update</description>
<bitOffset>0</bitOffset>
<bitWidth>24</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>CCNT0</name>
<description>PWM Channel Counter Register (ch_num = 0)</description>
<addressOffset>0x00000214</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CNT</name>
<description>Channel Counter Register</description>
<bitOffset>0</bitOffset>
<bitWidth>24</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>DT0</name>
<description>PWM Channel Dead Time Register (ch_num = 0)</description>
<addressOffset>0x00000218</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DTH</name>
<description>Dead-Time Value for PWMHx Output</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DTL</name>
<description>Dead-Time Value for PWMLx Output</description>
<bitOffset>16</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DTUPD0</name>
<description>PWM Channel Dead Time Update Register (ch_num = 0)</description>
<addressOffset>0x0000021C</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>DTHUPD</name>
<description>Dead-Time Value Update for PWMHx Output</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DTLUPD</name>
<description>Dead-Time Value Update for PWMLx Output</description>
<bitOffset>16</bitOffset>
<bitWidth>16</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>CMR1</name>
<description>PWM Channel Mode Register (ch_num = 1)</description>
<addressOffset>0x00000220</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CPRE</name>
<description>Channel Pre-scaler</description>
<bitOffset>0</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>MCK</name>
<description>Master clock</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>MCK_DIV_2</name>
<description>Master clock/2</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>MCK_DIV_4</name>
<description>Master clock/4</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>MCK_DIV_8</name>
<description>Master clock/8</description>
<value>0x3</value>
</enumeratedValue>
<enumeratedValue>
<name>MCK_DIV_16</name>
<description>Master clock/16</description>
<value>0x4</value>
</enumeratedValue>
<enumeratedValue>
<name>MCK_DIV_32</name>
<description>Master clock/32</description>
<value>0x5</value>
</enumeratedValue>
<enumeratedValue>
<name>MCK_DIV_64</name>
<description>Master clock/64</description>
<value>0x6</value>
</enumeratedValue>
<enumeratedValue>
<name>MCK_DIV_128</name>
<description>Master clock/128</description>
<value>0x7</value>
</enumeratedValue>
<enumeratedValue>
<name>MCK_DIV_256</name>
<description>Master clock/256</description>
<value>0x8</value>
</enumeratedValue>
<enumeratedValue>
<name>MCK_DIV_512</name>
<description>Master clock/512</description>
<value>0x9</value>
</enumeratedValue>
<enumeratedValue>
<name>MCK_DIV_1024</name>
<description>Master clock/1024</description>
<value>0xA</value>
</enumeratedValue>
<enumeratedValue>
<name>CLKA</name>
<description>Clock A</description>
<value>0xB</value>
</enumeratedValue>
<enumeratedValue>
<name>CLKB</name>
<description>Clock B</description>
<value>0xC</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CALG</name>
<description>Channel Alignment</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CPOL</name>
<description>Channel Polarity</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CES</name>
<description>Counter Event Selection</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DTE</name>
<description>Dead-Time Generator Enable</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DTHI</name>
<description>Dead-Time PWMHx Output Inverted</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DTLI</name>
<description>Dead-Time PWMLx Output Inverted</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>CDTY1</name>
<description>PWM Channel Duty Cycle Register (ch_num = 1)</description>
<addressOffset>0x00000224</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CDTY</name>
<description>Channel Duty-Cycle</description>
<bitOffset>0</bitOffset>
<bitWidth>24</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>CDTYUPD1</name>
<description>PWM Channel Duty Cycle Update Register (ch_num = 1)</description>
<addressOffset>0x00000228</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>CDTYUPD</name>
<description>Channel Duty-Cycle Update</description>
<bitOffset>0</bitOffset>
<bitWidth>24</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>CPRD1</name>
<description>PWM Channel Period Register (ch_num = 1)</description>
<addressOffset>0x0000022C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CPRD</name>
<description>Channel Period</description>
<bitOffset>0</bitOffset>
<bitWidth>24</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>CPRDUPD1</name>
<description>PWM Channel Period Update Register (ch_num = 1)</description>
<addressOffset>0x00000230</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>CPRDUPD</name>
<description>Channel Period Update</description>
<bitOffset>0</bitOffset>
<bitWidth>24</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>CCNT1</name>
<description>PWM Channel Counter Register (ch_num = 1)</description>
<addressOffset>0x00000234</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CNT</name>
<description>Channel Counter Register</description>
<bitOffset>0</bitOffset>
<bitWidth>24</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>DT1</name>
<description>PWM Channel Dead Time Register (ch_num = 1)</description>
<addressOffset>0x00000238</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DTH</name>
<description>Dead-Time Value for PWMHx Output</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DTL</name>
<description>Dead-Time Value for PWMLx Output</description>
<bitOffset>16</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DTUPD1</name>
<description>PWM Channel Dead Time Update Register (ch_num = 1)</description>
<addressOffset>0x0000023C</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>DTHUPD</name>
<description>Dead-Time Value Update for PWMHx Output</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DTLUPD</name>
<description>Dead-Time Value Update for PWMLx Output</description>
<bitOffset>16</bitOffset>
<bitWidth>16</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>CMR2</name>
<description>PWM Channel Mode Register (ch_num = 2)</description>
<addressOffset>0x00000240</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CPRE</name>
<description>Channel Pre-scaler</description>
<bitOffset>0</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>MCK</name>
<description>Master clock</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>MCK_DIV_2</name>
<description>Master clock/2</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>MCK_DIV_4</name>
<description>Master clock/4</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>MCK_DIV_8</name>
<description>Master clock/8</description>
<value>0x3</value>
</enumeratedValue>
<enumeratedValue>
<name>MCK_DIV_16</name>
<description>Master clock/16</description>
<value>0x4</value>
</enumeratedValue>
<enumeratedValue>
<name>MCK_DIV_32</name>
<description>Master clock/32</description>
<value>0x5</value>
</enumeratedValue>
<enumeratedValue>
<name>MCK_DIV_64</name>
<description>Master clock/64</description>
<value>0x6</value>
</enumeratedValue>
<enumeratedValue>
<name>MCK_DIV_128</name>
<description>Master clock/128</description>
<value>0x7</value>
</enumeratedValue>
<enumeratedValue>
<name>MCK_DIV_256</name>
<description>Master clock/256</description>
<value>0x8</value>
</enumeratedValue>
<enumeratedValue>
<name>MCK_DIV_512</name>
<description>Master clock/512</description>
<value>0x9</value>
</enumeratedValue>
<enumeratedValue>
<name>MCK_DIV_1024</name>
<description>Master clock/1024</description>
<value>0xA</value>
</enumeratedValue>
<enumeratedValue>
<name>CLKA</name>
<description>Clock A</description>
<value>0xB</value>
</enumeratedValue>
<enumeratedValue>
<name>CLKB</name>
<description>Clock B</description>
<value>0xC</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CALG</name>
<description>Channel Alignment</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CPOL</name>
<description>Channel Polarity</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CES</name>
<description>Counter Event Selection</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DTE</name>
<description>Dead-Time Generator Enable</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DTHI</name>
<description>Dead-Time PWMHx Output Inverted</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DTLI</name>
<description>Dead-Time PWMLx Output Inverted</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>CDTY2</name>
<description>PWM Channel Duty Cycle Register (ch_num = 2)</description>
<addressOffset>0x00000244</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CDTY</name>
<description>Channel Duty-Cycle</description>
<bitOffset>0</bitOffset>
<bitWidth>24</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>CDTYUPD2</name>
<description>PWM Channel Duty Cycle Update Register (ch_num = 2)</description>
<addressOffset>0x00000248</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>CDTYUPD</name>
<description>Channel Duty-Cycle Update</description>
<bitOffset>0</bitOffset>
<bitWidth>24</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>CPRD2</name>
<description>PWM Channel Period Register (ch_num = 2)</description>
<addressOffset>0x0000024C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CPRD</name>
<description>Channel Period</description>
<bitOffset>0</bitOffset>
<bitWidth>24</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>CPRDUPD2</name>
<description>PWM Channel Period Update Register (ch_num = 2)</description>
<addressOffset>0x00000250</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>CPRDUPD</name>
<description>Channel Period Update</description>
<bitOffset>0</bitOffset>
<bitWidth>24</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>CCNT2</name>
<description>PWM Channel Counter Register (ch_num = 2)</description>
<addressOffset>0x00000254</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CNT</name>
<description>Channel Counter Register</description>
<bitOffset>0</bitOffset>
<bitWidth>24</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>DT2</name>
<description>PWM Channel Dead Time Register (ch_num = 2)</description>
<addressOffset>0x00000258</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DTH</name>
<description>Dead-Time Value for PWMHx Output</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DTL</name>
<description>Dead-Time Value for PWMLx Output</description>
<bitOffset>16</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DTUPD2</name>
<description>PWM Channel Dead Time Update Register (ch_num = 2)</description>
<addressOffset>0x0000025C</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>DTHUPD</name>
<description>Dead-Time Value Update for PWMHx Output</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DTLUPD</name>
<description>Dead-Time Value Update for PWMLx Output</description>
<bitOffset>16</bitOffset>
<bitWidth>16</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>CMR3</name>
<description>PWM Channel Mode Register (ch_num = 3)</description>
<addressOffset>0x00000260</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CPRE</name>
<description>Channel Pre-scaler</description>
<bitOffset>0</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>MCK</name>
<description>Master clock</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>MCK_DIV_2</name>
<description>Master clock/2</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>MCK_DIV_4</name>
<description>Master clock/4</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>MCK_DIV_8</name>
<description>Master clock/8</description>
<value>0x3</value>
</enumeratedValue>
<enumeratedValue>
<name>MCK_DIV_16</name>
<description>Master clock/16</description>
<value>0x4</value>
</enumeratedValue>
<enumeratedValue>
<name>MCK_DIV_32</name>
<description>Master clock/32</description>
<value>0x5</value>
</enumeratedValue>
<enumeratedValue>
<name>MCK_DIV_64</name>
<description>Master clock/64</description>
<value>0x6</value>
</enumeratedValue>
<enumeratedValue>
<name>MCK_DIV_128</name>
<description>Master clock/128</description>
<value>0x7</value>
</enumeratedValue>
<enumeratedValue>
<name>MCK_DIV_256</name>
<description>Master clock/256</description>
<value>0x8</value>
</enumeratedValue>
<enumeratedValue>
<name>MCK_DIV_512</name>
<description>Master clock/512</description>
<value>0x9</value>
</enumeratedValue>
<enumeratedValue>
<name>MCK_DIV_1024</name>
<description>Master clock/1024</description>
<value>0xA</value>
</enumeratedValue>
<enumeratedValue>
<name>CLKA</name>
<description>Clock A</description>
<value>0xB</value>
</enumeratedValue>
<enumeratedValue>
<name>CLKB</name>
<description>Clock B</description>
<value>0xC</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CALG</name>
<description>Channel Alignment</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CPOL</name>
<description>Channel Polarity</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CES</name>
<description>Counter Event Selection</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DTE</name>
<description>Dead-Time Generator Enable</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DTHI</name>
<description>Dead-Time PWMHx Output Inverted</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DTLI</name>
<description>Dead-Time PWMLx Output Inverted</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>CDTY3</name>
<description>PWM Channel Duty Cycle Register (ch_num = 3)</description>
<addressOffset>0x00000264</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CDTY</name>
<description>Channel Duty-Cycle</description>
<bitOffset>0</bitOffset>
<bitWidth>24</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>CDTYUPD3</name>
<description>PWM Channel Duty Cycle Update Register (ch_num = 3)</description>
<addressOffset>0x00000268</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>CDTYUPD</name>
<description>Channel Duty-Cycle Update</description>
<bitOffset>0</bitOffset>
<bitWidth>24</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>CPRD3</name>
<description>PWM Channel Period Register (ch_num = 3)</description>
<addressOffset>0x0000026C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CPRD</name>
<description>Channel Period</description>
<bitOffset>0</bitOffset>
<bitWidth>24</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>CPRDUPD3</name>
<description>PWM Channel Period Update Register (ch_num = 3)</description>
<addressOffset>0x00000270</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>CPRDUPD</name>
<description>Channel Period Update</description>
<bitOffset>0</bitOffset>
<bitWidth>24</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>CCNT3</name>
<description>PWM Channel Counter Register (ch_num = 3)</description>
<addressOffset>0x00000274</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CNT</name>
<description>Channel Counter Register</description>
<bitOffset>0</bitOffset>
<bitWidth>24</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>DT3</name>
<description>PWM Channel Dead Time Register (ch_num = 3)</description>
<addressOffset>0x00000278</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DTH</name>
<description>Dead-Time Value for PWMHx Output</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DTL</name>
<description>Dead-Time Value for PWMLx Output</description>
<bitOffset>16</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DTUPD3</name>
<description>PWM Channel Dead Time Update Register (ch_num = 3)</description>
<addressOffset>0x0000027C</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>DTHUPD</name>
<description>Dead-Time Value Update for PWMHx Output</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DTLUPD</name>
<description>Dead-Time Value Update for PWMLx Output</description>
<bitOffset>16</bitOffset>
<bitWidth>16</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>LCDC</name>
<version>11062B</version>
<description>LCD Controller</description>
<prependToName>LCDC_</prependToName>
<baseAddress>0xF0030000</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x4000</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>LCDC</name>
<value>36</value>
</interrupt>
<registers>
<register>
<name>LCDCFG0</name>
<description>LCD Controller Configuration Register 0</description>
<addressOffset>0x00000000</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CLKPOL</name>
<description>LCD Controller Clock Polarity</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CLKSEL</name>
<description>LCD Controller Clock Source Selection</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CLKPWMSEL</name>
<description>LCD Controller PWM Clock Source Selection</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CGDISBASE</name>
<description>Clock Gating Disable Control for the Base Layer</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CGDISOVR1</name>
<description>Clock Gating Disable Control for the Overlay 1 Layer</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CGDISOVR2</name>
<description>Clock Gating Disable Control for the Overlay 2 Layer</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CGDISHEO</name>
<description>Clock Gating Disable Control for the High End Overlay</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CGDISHCR</name>
<description>Clock Gating Disable Control for the Hardware Cursor Layer</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CGDISPP</name>
<description>Clock Gating Disable Control for the Post Processing Layer</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CLKDIV</name>
<description>LCD Controller Clock Divider</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>LCDCFG1</name>
<description>LCD Controller Configuration Register 1</description>
<addressOffset>0x00000004</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>HSPW</name>
<description>Horizontal Synchronization Pulse Width</description>
<bitOffset>0</bitOffset>
<bitWidth>6</bitWidth>
<access>read-write</access>
</field>
<field>
<name>VSPW</name>
<description>Vertical Synchronization Pulse Width</description>
<bitOffset>16</bitOffset>
<bitWidth>6</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>LCDCFG2</name>
<description>LCD Controller Configuration Register 2</description>
<addressOffset>0x00000008</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>VFPW</name>
<description>Vertical Front Porch Width</description>
<bitOffset>0</bitOffset>
<bitWidth>6</bitWidth>
<access>read-write</access>
</field>
<field>
<name>VBPW</name>
<description>Vertical Back Porch Width</description>
<bitOffset>16</bitOffset>
<bitWidth>6</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>LCDCFG3</name>
<description>LCD Controller Configuration Register 3</description>
<addressOffset>0x0000000C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>HFPW</name>
<description>Horizontal Front Porch Width</description>
<bitOffset>0</bitOffset>
<bitWidth>9</bitWidth>
<access>read-write</access>
</field>
<field>
<name>HBPW</name>
<description>Horizontal Back Porch Width</description>
<bitOffset>16</bitOffset>
<bitWidth>9</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>LCDCFG4</name>
<description>LCD Controller Configuration Register 4</description>
<addressOffset>0x00000010</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>PPL</name>
<description>Number of Pixels Per Line</description>
<bitOffset>0</bitOffset>
<bitWidth>11</bitWidth>
<access>read-write</access>
</field>
<field>
<name>RPF</name>
<description>Number of Active Row Per Frame</description>
<bitOffset>16</bitOffset>
<bitWidth>11</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>LCDCFG5</name>
<description>LCD Controller Configuration Register 5</description>
<addressOffset>0x00000014</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>HSPOL</name>
<description>Horizontal Synchronization Pulse Polarity</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>VSPOL</name>
<description>Vertical Synchronization Pulse Polarity</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>VSPDLYS</name>
<description>Vertical Synchronization Pulse Start</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>VSPDLYE</name>
<description>Vertical Synchronization Pulse End</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DISPPOL</name>
<description>Display Signal Polarity</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DITHER</name>
<description>LCD Controller Dithering</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DISPDLY</name>
<description>LCD Controller Display Power Signal Synchronization</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>MODE</name>
<description>LCD Controller Output Mode</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>OUTPUT_12BPP</name>
<description>LCD output mode is set to 12 bits per pixel</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>OUTPUT_16BPP</name>
<description>LCD output mode is set to 16 bits per pixel</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>OUTPUT_18BPP</name>
<description>LCD output mode is set to 18 bits per pixel</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>OUTPUT_24BPP</name>
<description>LCD output mode is set to 24 bits per pixel</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PP</name>
<description>Post Processing Enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>VSPSU</name>
<description>LCD Controller Vertical synchronization Pulse Setup Configuration</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>VSPHO</name>
<description>LCD Controller Vertical synchronization Pulse Hold Configuration</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>GUARDTIME</name>
<description>LCD DISPLAY Guard Time</description>
<bitOffset>16</bitOffset>
<bitWidth>5</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>LCDCFG6</name>
<description>LCD Controller Configuration Register 6</description>
<addressOffset>0x00000018</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>PWMPS</name>
<description>PWM Clock Prescaler</description>
<bitOffset>0</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
</field>
<field>
<name>PWMPOL</name>
<description>LCD Controller PWM Signal Polarity</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>PWMCVAL</name>
<description>LCD Controller PWM Compare Value</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>LCDEN</name>
<description>LCD Controller Enable Register</description>
<addressOffset>0x00000020</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>CLKEN</name>
<description>LCD Controller Pixel Clock Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SYNCEN</name>
<description>LCD Controller Horizontal and Vertical Synchronization Enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DISPEN</name>
<description>LCD Controller DISP Signal Enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PWMEN</name>
<description>LCD Controller Pulse Width Modulation Enable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>LCDDIS</name>
<description>LCD Controller Disable Register</description>
<addressOffset>0x00000024</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>CLKDIS</name>
<description>LCD Controller Pixel Clock Disable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SYNCDIS</name>
<description>LCD Controller Horizontal and Vertical Synchronization Disable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DISPDIS</name>
<description>LCD Controller DISP Signal Disable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PWMDIS</name>
<description>LCD Controller Pulse Width Modulation Disable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CLKRST</name>
<description>LCD Controller Clock Reset</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SYNCRST</name>
<description>LCD Controller Horizontal and Vertical Synchronization Reset</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DISPRST</name>
<description>LCD Controller DISP Signal Reset</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PWMRST</name>
<description>LCD Controller PWM Reset</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>LCDSR</name>
<description>LCD Controller Status Register</description>
<addressOffset>0x00000028</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CLKSTS</name>
<description>Clock Status</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>LCDSTS</name>
<description>LCD Controller Synchronization status</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DISPSTS</name>
<description>LCD Controller DISP Signal Status</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PWMSTS</name>
<description>LCD Controller PWM Signal Status</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SIPSTS</name>
<description>Synchronization In Progress</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>LCDIER</name>
<description>LCD Controller Interrupt Enable Register</description>
<addressOffset>0x0000002C</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>SOFIE</name>
<description>Start of Frame Interrupt Enable Register</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DISIE</name>
<description>LCD Disable Interrupt Enable Register</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DISPIE</name>
<description>Power UP/Down Sequence Terminated Interrupt Enable Register</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>FIFOERRIE</name>
<description>Output FIFO Error Interrupt Enable Register</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BASEIE</name>
<description>Base Layer Interrupt Enable Register</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>OVR1IE</name>
<description>Overlay 1 Interrupt Enable Register</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>OVR2IE</name>
<description>Overlay 2 Interrupt Enable Register</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>HEOIE</name>
<description>High End Overlay Interrupt Enable Register</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>HCRIE</name>
<description>Hardware Cursor Interrupt Enable Register</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PPIE</name>
<description>Post Processing Interrupt Enable Register</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>LCDIDR</name>
<description>LCD Controller Interrupt Disable Register</description>
<addressOffset>0x00000030</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>SOFID</name>
<description>Start of Frame Interrupt Disable Register</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DISID</name>
<description>LCD Disable Interrupt Disable Register</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DISPID</name>
<description>Power UP/Down Sequence Terminated Interrupt Disable Register</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>FIFOERRID</name>
<description>Output FIFO Error Interrupt Disable Register</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BASEID</name>
<description>Base Layer Interrupt Disable Register</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>OVR1ID</name>
<description>Overlay 1 Interrupt Disable Register</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>OVR2ID</name>
<description>Overlay 2 Interrupt Disable Register</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>HEOID</name>
<description>High End Overlay Interrupt Disable Register</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>HCRID</name>
<description>Hardware Cursor Interrupt Disable Register</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PPID</name>
<description>Post Processing Interrupt Disable Register</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>LCDIMR</name>
<description>LCD Controller Interrupt Mask Register</description>
<addressOffset>0x00000034</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SOFIM</name>
<description>Start of Frame Interrupt Mask Register</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DISIM</name>
<description>LCD Disable Interrupt Mask Register</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DISPIM</name>
<description>Power UP/Down Sequence Terminated Interrupt Mask Register</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>FIFOERRIM</name>
<description>Output FIFO Error Interrupt Mask Register</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BASEIM</name>
<description>Base Layer Interrupt Mask Register</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>OVR1IM</name>
<description>Overlay 1 Interrupt Mask Register</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>OVR2IM</name>
<description>Overlay 2 Interrupt Mask Register</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>HEOIM</name>
<description>High End Overlay Interrupt Mask Register</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>HCRIM</name>
<description>Hardware Cursor Interrupt Mask Register</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PPIM</name>
<description>Post Processing Interrupt Mask Register</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>LCDISR</name>
<description>LCD Controller Interrupt Status Register</description>
<addressOffset>0x00000038</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SOF</name>
<description>Start of Frame Interrupt Status Register</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DIS</name>
<description>LCD Disable Interrupt Status Register</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DISP</name>
<description>Power-up/Power-down Sequence Terminated Interrupt Status Register</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>FIFOERR</name>
<description>Output FIFO Error</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BASE</name>
<description>Base Layer Raw Interrupt Status Register</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>OVR1</name>
<description>Overlay 1 Raw Interrupt Status Register</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>OVR2</name>
<description>Overlay 2 Raw Interrupt Status Register</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>HEO</name>
<description>High End Overlay Raw Interrupt Status Register</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>HCR</name>
<description>Hardware Cursor Raw Interrupt Status Register</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PP</name>
<description>Post Processing Raw Interrupt Status Register</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>BASECHER</name>
<description>Base Layer Channel Enable Register</description>
<addressOffset>0x00000040</addressOffset>
<size>32</size>
<access>write-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CHEN</name>
<description>Channel Enable Register</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>UPDATEEN</name>
<description>Update Overlay Attributes Enable Register</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>A2QEN</name>
<description>Add Head Pointer Enable Register</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>BASECHDR</name>
<description>Base Layer Channel Disable Register</description>
<addressOffset>0x00000044</addressOffset>
<size>32</size>
<access>write-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CHDIS</name>
<description>Channel Disable Register</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CHRST</name>
<description>Channel Reset Register</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>BASECHSR</name>
<description>Base Layer Channel Status Register</description>
<addressOffset>0x00000048</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CHSR</name>
<description>Channel Status Register</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>UPDATESR</name>
<description>Update Overlay Attributes In Progress</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>A2QSR</name>
<description>Add To Queue Pending Register</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>BASEIER</name>
<description>Base Layer Interrupt Enable Register</description>
<addressOffset>0x0000004C</addressOffset>
<size>32</size>
<access>write-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DMA</name>
<description>End of DMA Transfer Interrupt Enable Register</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DSCR</name>
<description>Descriptor Loaded Interrupt Enable Register</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ADD</name>
<description>Head Descriptor Loaded Interrupt Enable Register</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DONE</name>
<description>End of List Interrupt Enable Register</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>OVR</name>
<description>Overflow Interrupt Enable Register</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>BASEIDR</name>
<description>Base Layer Interrupt Disabled Register</description>
<addressOffset>0x00000050</addressOffset>
<size>32</size>
<access>write-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DMA</name>
<description>End of DMA Transfer Interrupt Disable Register</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DSCR</name>
<description>Descriptor Loaded Interrupt Disable Register</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ADD</name>
<description>Head Descriptor Loaded Interrupt Disable Register</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DONE</name>
<description>End of List Interrupt Disable Register</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>OVR</name>
<description>Overflow Interrupt Disable Register</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>BASEIMR</name>
<description>Base Layer Interrupt Mask Register</description>
<addressOffset>0x00000054</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DMA</name>
<description>End of DMA Transfer Interrupt Mask Register</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DSCR</name>
<description>Descriptor Loaded Interrupt Mask Register</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ADD</name>
<description>Head Descriptor Loaded Interrupt Mask Register</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DONE</name>
<description>End of List Interrupt Mask Register</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>OVR</name>
<description>Overflow Interrupt Mask Register</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>BASEISR</name>
<description>Base Layer Interrupt status Register</description>
<addressOffset>0x00000058</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DMA</name>
<description>End of DMA Transfer</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DSCR</name>
<description>DMA Descriptor Loaded</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ADD</name>
<description>Head Descriptor Loaded</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DONE</name>
<description>End of List Detected</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>OVR</name>
<description>Overflow Detected</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>BASEHEAD</name>
<description>Base DMA Head Register</description>
<addressOffset>0x0000005C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>HEAD</name>
<description>DMA Head Pointer</description>
<bitOffset>2</bitOffset>
<bitWidth>30</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>BASEADDR</name>
<description>Base DMA Address Register</description>
<addressOffset>0x00000060</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>ADDR</name>
<description>DMA Transfer Start Address</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>BASECTRL</name>
<description>Base DMA Control Register</description>
<addressOffset>0x00000064</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DFETCH</name>
<description>Transfer Descriptor Fetch Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>LFETCH</name>
<description>Lookup Table Fetch Enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DMAIEN</name>
<description>End of DMA Transfer Interrupt Enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DSCRIEN</name>
<description>Descriptor Loaded Interrupt Enable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>ADDIEN</name>
<description>Add Head Descriptor to Queue Interrupt Enable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DONEIEN</name>
<description>End of List Interrupt Enable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>BASENEXT</name>
<description>Base DMA Next Register</description>
<addressOffset>0x00000068</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>NEXT</name>
<description>DMA Descriptor Next Address</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>BASECFG0</name>
<description>Base Configuration register 0</description>
<addressOffset>0x0000006C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SIF</name>
<description>Source Interface</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>BLEN</name>
<description>AHB Burst Length</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>AHB_SINGLE</name>
<description>AHB Access is started as soon as there is enough space in the FIFO to store one data. SINGLE, INCR, INCR4, INCR8 and INCR16 bursts are used. INCR is used for a burst of 2 and 3 beats.</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_INCR4</name>
<description>AHB Access is started as soon as there is enough space in the FIFO to store a total amount of 4 data. An AHB INCR4 Burst is used. SINGLE, INCR and INCR4 bursts are used. INCR is used for a burst of 2 and 3 beats.</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_INCR8</name>
<description>AHB Access is started as soon as there is enough space in the FIFO to store a total amount of 8 data. An AHB INCR8 Burst is used. SINGLE, INCR, INCR4 and INCR8 bursts are used. INCR is used for a burst of 2 and 3 beats.</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_INCR16</name>
<description>AHB Access is started as soon as there is enough space in the FIFO to store a total amount of 16 data. An AHB INCR16 Burst is used. SINGLE, INCR, INCR4, INCR8 and INCR16 bursts are used. INCR is used for a burst of 2 and 3 beats.</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DLBO</name>
<description>Defined Length Burst Only For Channel Bus Transaction.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>BASECFG1</name>
<description>Base Configuration register 1</description>
<addressOffset>0x00000070</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CLUTEN</name>
<description>Color Lookup Table Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>RGBMODE</name>
<description>RGB Input Mode Selection</description>
<bitOffset>4</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>12BPP_RGB_444</name>
<description>12 bpp RGB 444</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>16BPP_ARGB_4444</name>
<description>16 bpp ARGB 4444</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>16BPP_RGBA_4444</name>
<description>16 bpp RGBA 4444</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>16BPP_RGB_565</name>
<description>16 bpp RGB 565</description>
<value>0x3</value>
</enumeratedValue>
<enumeratedValue>
<name>16BPP_TRGB_1555</name>
<description>16 bpp TRGB 1555</description>
<value>0x4</value>
</enumeratedValue>
<enumeratedValue>
<name>18BPP_RGB_666</name>
<description>18 bpp RGB 666</description>
<value>0x5</value>
</enumeratedValue>
<enumeratedValue>
<name>18BPP_RGB_666PACKED</name>
<description>18 bpp RGB 666 PACKED</description>
<value>0x6</value>
</enumeratedValue>
<enumeratedValue>
<name>19BPP_TRGB_1666</name>
<description>19 bpp TRGB 1666</description>
<value>0x7</value>
</enumeratedValue>
<enumeratedValue>
<name>19BPP_TRGB_PACKED</name>
<description>19 bpp TRGB 1666 PACKED</description>
<value>0x8</value>
</enumeratedValue>
<enumeratedValue>
<name>24BPP_RGB_888</name>
<description>24 bpp RGB 888</description>
<value>0x9</value>
</enumeratedValue>
<enumeratedValue>
<name>24BPP_RGB_888_PACKED</name>
<description>24 bpp RGB 888 PACKED</description>
<value>0xA</value>
</enumeratedValue>
<enumeratedValue>
<name>25BPP_TRGB_1888</name>
<description>25 bpp TRGB 1888</description>
<value>0xB</value>
</enumeratedValue>
<enumeratedValue>
<name>32BPP_ARGB_8888</name>
<description>32 bpp ARGB 8888</description>
<value>0xC</value>
</enumeratedValue>
<enumeratedValue>
<name>32BPP_RGBA_8888</name>
<description>32 bpp RGBA 8888</description>
<value>0xD</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CLUTMODE</name>
<description>Color Lookup Table Input Mode Selection</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CLUT_1BPP</name>
<description>color lookup table mode set to 1 bit per pixel</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>CLUT_2BPP</name>
<description>color lookup table mode set to 2 bits per pixel</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>CLUT_4BPP</name>
<description>color lookup table mode set to 4 bits per pixel</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>CLUT_8BPP</name>
<description>color lookup table mode set to 8 bits per pixel</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>BASECFG2</name>
<description>Base Configuration register 2</description>
<addressOffset>0x00000074</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>XSTRIDE</name>
<description>Horizontal Stride</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>BASECFG3</name>
<description>Base Configuration register 3</description>
<addressOffset>0x00000078</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>BDEF</name>
<description>Blue Default</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>GDEF</name>
<description>Green Default</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>RDEF</name>
<description>Red Default</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>BASECFG4</name>
<description>Base Configuration register 4</description>
<addressOffset>0x0000007C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DMA</name>
<description>Use DMA Data Path</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>REP</name>
<description>Use Replication logic to expand RGB color to 24 bits</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DISCEN</name>
<description>Discard Area Enable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>BASECFG5</name>
<description>Base Configuration register 5</description>
<addressOffset>0x00000080</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DISCXPOS</name>
<description>Discard Area horizontal coordinate</description>
<bitOffset>0</bitOffset>
<bitWidth>11</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DISCYPOS</name>
<description>Discard Area Vertical coordinate</description>
<bitOffset>16</bitOffset>
<bitWidth>11</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>BASECFG6</name>
<description>Base Configuration register 6</description>
<addressOffset>0x00000084</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DISCXSIZE</name>
<description>Discard Area Horizontal Size</description>
<bitOffset>0</bitOffset>
<bitWidth>11</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DISCYSIZE</name>
<description>Discard Area Vertical Size</description>
<bitOffset>16</bitOffset>
<bitWidth>11</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>OVR1CHER</name>
<description>Overlay 1 Channel Enable Register</description>
<addressOffset>0x00000140</addressOffset>
<size>32</size>
<access>write-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CHEN</name>
<description>Channel Enable Register</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>UPDATEEN</name>
<description>Update Overlay Attributes Enable Register</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>A2QEN</name>
<description>Add Head Pointer Enable Register</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>OVR1CHDR</name>
<description>Overlay 1 Channel Disable Register</description>
<addressOffset>0x00000144</addressOffset>
<size>32</size>
<access>write-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CHDIS</name>
<description>Channel Disable Register</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CHRST</name>
<description>Channel Reset Register</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>OVR1CHSR</name>
<description>Overlay 1 Channel Status Register</description>
<addressOffset>0x00000148</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CHSR</name>
<description>Channel Status Register</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>UPDATESR</name>
<description>Update Overlay Attributes In Progress</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>A2QSR</name>
<description>Add to Queue Pending Register</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>OVR1IER</name>
<description>Overlay 1 Interrupt Enable Register</description>
<addressOffset>0x0000014C</addressOffset>
<size>32</size>
<access>write-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DMA</name>
<description>End of DMA Transfer Interrupt Enable Register</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DSCR</name>
<description>Descriptor Loaded Interrupt Enable Register</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ADD</name>
<description>Head Descriptor Loaded Interrupt Enable Register</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DONE</name>
<description>End of List Interrupt Enable Register</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>OVR</name>
<description>Overflow Interrupt Enable Register</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>OVR1IDR</name>
<description>Overlay 1 Interrupt Disable Register</description>
<addressOffset>0x00000150</addressOffset>
<size>32</size>
<access>write-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DMA</name>
<description>End of DMA Transfer Interrupt Disable Register</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DSCR</name>
<description>Descriptor Loaded Interrupt Disable Register</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ADD</name>
<description>Head Descriptor Loaded Interrupt Disable Register</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DONE</name>
<description>End of List Interrupt Disable Register</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>OVR</name>
<description>Overflow Interrupt Disable Register</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>OVR1IMR</name>
<description>Overlay 1 Interrupt Mask Register</description>
<addressOffset>0x00000154</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DMA</name>
<description>End of DMA Transfer Interrupt Mask Register</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DSCR</name>
<description>Descriptor Loaded Interrupt Mask Register</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ADD</name>
<description>Head Descriptor Loaded Interrupt Mask Register</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DONE</name>
<description>End of List Interrupt Mask Register</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>OVR</name>
<description>Overflow Interrupt Mask Register</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>OVR1ISR</name>
<description>Overlay 1 Interrupt Status Register</description>
<addressOffset>0x00000158</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DMA</name>
<description>End of DMA Transfer</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DSCR</name>
<description>DMA Descriptor Loaded</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ADD</name>
<description>Head Descriptor Loaded</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DONE</name>
<description>End of List Detected Register</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>OVR</name>
<description>Overflow Detected</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>OVR1HEAD</name>
<description>Overlay 1 DMA Head Register</description>
<addressOffset>0x0000015C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>HEAD</name>
<description>DMA Head Pointer</description>
<bitOffset>2</bitOffset>
<bitWidth>30</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>OVR1ADDR</name>
<description>Overlay 1 DMA Address Register</description>
<addressOffset>0x00000160</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>ADDR</name>
<description>DMA Transfer Overlay 1 Address</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>OVR1CTRL</name>
<description>Overlay1 DMA Control Register</description>
<addressOffset>0x00000164</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DFETCH</name>
<description>Transfer Descriptor Fetch Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>LFETCH</name>
<description>Lookup Table Fetch Enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DMAIEN</name>
<description>End of DMA Transfer Interrupt Enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DSCRIEN</name>
<description>Descriptor Loaded Interrupt Enable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>ADDIEN</name>
<description>Add Head Descriptor to Queue Interrupt Enable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DONEIEN</name>
<description>End of List Interrupt Enable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>OVR1NEXT</name>
<description>Overlay1 DMA Next Register</description>
<addressOffset>0x00000168</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>NEXT</name>
<description>DMA Descriptor Next Address</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>OVR1CFG0</name>
<description>Overlay 1 Configuration 0 Register</description>
<addressOffset>0x0000016C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SIF</name>
<description>Source Interface</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>BLEN</name>
<description>AHB Burst Length</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>AHB_BLEN_SINGLE</name>
<description>AHB Access is started as soon as there is enough space in the FIFO to store one data. SINGLE, INCR, INCR4, INCR8 and INCR16 bursts are used. INCR is used for a burst of 2 and 3 beats.</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_BLEN_INCR4</name>
<description>AHB Access is started as soon as there is enough space in the FIFO to store a total amount of 4 data. An AHB INCR4 Burst is used. SINGLE, INCR and INCR4 bursts are used. INCR is used for a burst of 2 and 3 beats.</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_BLEN_INCR8</name>
<description>AHB Access is started as soon as there is enough space in the FIFO to store a total amount of 8 data. An AHB INCR8 Burst is used. SINGLE, INCR, INCR4 and INCR8 bursts are used. INCR is used for a burst of 2 and 3 beats.</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_BLEN_INCR16</name>
<description>AHB Access is started as soon as there is enough space in the FIFO to store a total amount of 16 data. An AHB INCR16 Burst is used. SINGLE, INCR, INCR4, INCR8 and INCR16 bursts are used. INCR is used for a burst of 2 and 3 beats.</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DLBO</name>
<description>Defined Length Burst Only for Channel Bus Transaction.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>ROTDIS</name>
<description>Hardware Rotation Optimization Disable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>LOCKDIS</name>
<description>Hardware Rotation Lock Disable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>OVR1CFG1</name>
<description>Overlay 1 Configuration 1 Register</description>
<addressOffset>0x00000170</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CLUTEN</name>
<description>Color Lookup Table Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>RGBMODE</name>
<description>RGB Input Mode Selection</description>
<bitOffset>4</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>12BPP_RGB_444</name>
<description>12 bpp RGB 444</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>16BPP_ARGB_4444</name>
<description>16 bpp ARGB 4444</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>16BPP_RGBA_4444</name>
<description>16 bpp RGBA 4444</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>16BPP_RGB_565</name>
<description>16 bpp RGB 565</description>
<value>0x3</value>
</enumeratedValue>
<enumeratedValue>
<name>16BPP_TRGB_1555</name>
<description>16 bpp TRGB 1555</description>
<value>0x4</value>
</enumeratedValue>
<enumeratedValue>
<name>18BPP_RGB_666</name>
<description>18 bpp RGB 666</description>
<value>0x5</value>
</enumeratedValue>
<enumeratedValue>
<name>18BPP_RGB_666PACKED</name>
<description>18 bpp RGB 666 PACKED</description>
<value>0x6</value>
</enumeratedValue>
<enumeratedValue>
<name>19BPP_TRGB_1666</name>
<description>19 bpp TRGB 1666</description>
<value>0x7</value>
</enumeratedValue>
<enumeratedValue>
<name>19BPP_TRGB_PACKED</name>
<description>19 bpp TRGB 1666 PACKED</description>
<value>0x8</value>
</enumeratedValue>
<enumeratedValue>
<name>24BPP_RGB_888</name>
<description>24 bpp RGB 888</description>
<value>0x9</value>
</enumeratedValue>
<enumeratedValue>
<name>24BPP_RGB_888_PACKED</name>
<description>24 bpp RGB 888 PACKED</description>
<value>0xA</value>
</enumeratedValue>
<enumeratedValue>
<name>25BPP_TRGB_1888</name>
<description>25 bpp TRGB 1888</description>
<value>0xB</value>
</enumeratedValue>
<enumeratedValue>
<name>32BPP_ARGB_8888</name>
<description>32 bpp ARGB 8888</description>
<value>0xC</value>
</enumeratedValue>
<enumeratedValue>
<name>32BPP_RGBA_8888</name>
<description>32 bpp RGBA 8888</description>
<value>0xD</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CLUTMODE</name>
<description>Color Lookup table input mode selection</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CLUT_1BPP</name>
<description>color lookup table mode set to 1 bit per pixel</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>CLUT_2BPP</name>
<description>color lookup table mode set to 2 bits per pixel</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>CLUT_4BPP</name>
<description>color lookup table mode set to 4 bits per pixel</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>CLUT_8BPP</name>
<description>color lookup table mode set to 8 bits per pixel</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>OVR1CFG2</name>
<description>Overlay 1 Configuration 2 Register</description>
<addressOffset>0x00000174</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>XPOS</name>
<description>Horizontal Window Position</description>
<bitOffset>0</bitOffset>
<bitWidth>11</bitWidth>
<access>read-write</access>
</field>
<field>
<name>YPOS</name>
<description>Vertical Window Position</description>
<bitOffset>16</bitOffset>
<bitWidth>11</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>OVR1CFG3</name>
<description>Overlay 1 Configuration 3 Register</description>
<addressOffset>0x00000178</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>XSIZE</name>
<description>Horizontal Window Size</description>
<bitOffset>0</bitOffset>
<bitWidth>11</bitWidth>
<access>read-write</access>
</field>
<field>
<name>YSIZE</name>
<description>Vertical Window Size</description>
<bitOffset>16</bitOffset>
<bitWidth>11</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>OVR1CFG4</name>
<description>Overlay 1 Configuration 4 Register</description>
<addressOffset>0x0000017C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>XSTRIDE</name>
<description>Horizontal Stride</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>OVR1CFG5</name>
<description>Overlay 1 Configuration 5 Register</description>
<addressOffset>0x00000180</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>PSTRIDE</name>
<description>Pixel Stride</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>OVR1CFG6</name>
<description>Overlay 1 Configuration 6 Register</description>
<addressOffset>0x00000184</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>BDEF</name>
<description>Blue Default</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>GDEF</name>
<description>Green Default</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>RDEF</name>
<description>Red Default</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>OVR1CFG7</name>
<description>Overlay 1 Configuration 7 Register</description>
<addressOffset>0x00000188</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>BKEY</name>
<description>Blue Color Component Chroma Key</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>GKEY</name>
<description>Green Color Component Chroma Key</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>RKEY</name>
<description>Red Color Component Chroma Key</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>OVR1CFG8</name>
<description>Overlay 1 Configuration 8Register</description>
<addressOffset>0x0000018C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>BMASK</name>
<description>Blue Color Component Chroma Key Mask</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>GMASK</name>
<description>Green Color Component Chroma Key Mask</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>RMASK</name>
<description>Red Color Component Chroma Key Mask</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>OVR1CFG9</name>
<description>Overlay 1 Configuration 9 Register</description>
<addressOffset>0x00000190</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CRKEY</name>
<description>Blender Chroma Key Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>INV</name>
<description>Blender Inverted Blender Output Enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>ITER2BL</name>
<description>Blender Iterated Color Enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>ITER</name>
<description>Blender Use Iterated Color</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>REVALPHA</name>
<description>Blender Reverse Alpha</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>GAEN</name>
<description>Blender Global Alpha Enable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>LAEN</name>
<description>Blender Local Alpha Enable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>OVR</name>
<description>Blender Overlay Layer Enable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DMA</name>
<description>Blender DMA Layer Enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>REP</name>
<description>Use Replication logic to expand RGB color to 24 bits</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DSTKEY</name>
<description>Destination Chroma Keying</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>GA</name>
<description>Blender Global Alpha</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>OVR2CHER</name>
<description>Overlay 2 Channel Enable Register</description>
<addressOffset>0x00000240</addressOffset>
<size>32</size>
<access>write-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CHEN</name>
<description>Channel Enable Register</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>UPDATEEN</name>
<description>Update Overlay Attributes Enable Register</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>A2QEN</name>
<description>Add Head Pointer Enable Register</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>OVR2CHDR</name>
<description>Overlay 2 Channel Disable Register</description>
<addressOffset>0x00000244</addressOffset>
<size>32</size>
<access>write-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CHDIS</name>
<description>Channel Disable Register</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CHRST</name>
<description>Channel Reset Register</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>OVR2CHSR</name>
<description>Overlay 2 Channel Status Register</description>
<addressOffset>0x00000248</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CHSR</name>
<description>Channel Status Register</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>UPDATESR</name>
<description>Update Overlay Attributes In Progress</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>A2QSR</name>
<description>Add To Queue Pending Register</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>OVR2IER</name>
<description>Overlay 2 Interrupt Enable Register</description>
<addressOffset>0x0000024C</addressOffset>
<size>32</size>
<access>write-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DMA</name>
<description>End of DMA Transfer Interrupt Enable Register</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DSCR</name>
<description>Descriptor Loaded Interrupt Enable Register</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ADD</name>
<description>Head Descriptor Loaded Interrupt Enable Register</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DONE</name>
<description>End of List Interrupt Enable Register</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>OVR</name>
<description>Overflow Interrupt Enable Register</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>OVR2IDR</name>
<description>Overlay 2 Interrupt Disable Register</description>
<addressOffset>0x00000250</addressOffset>
<size>32</size>
<access>write-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DMA</name>
<description>End of DMA Transfer Interrupt Disable Register</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DSCR</name>
<description>Descriptor Loaded Interrupt Disable Register</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ADD</name>
<description>Head Descriptor Loaded Interrupt Disable Register</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DONE</name>
<description>End of List Interrupt Disable Register</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>OVR</name>
<description>Overflow Interrupt Disable Register</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>OVR2IMR</name>
<description>Overlay 2 Interrupt Mask Register</description>
<addressOffset>0x00000254</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DMA</name>
<description>End of DMA Transfer Interrupt Mask Register</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DSCR</name>
<description>Descriptor Loaded Interrupt Mask Register</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ADD</name>
<description>Head Descriptor Loaded Interrupt Mask Register</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DONE</name>
<description>End of List Interrupt Mask Register</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>OVR</name>
<description>Overflow Interrupt Mask Register</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>OVR2ISR</name>
<description>Overlay 2 Interrupt status Register</description>
<addressOffset>0x00000258</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DMA</name>
<description>End of DMA Transfer</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DSCR</name>
<description>DMA Descriptor Loaded</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ADD</name>
<description>Head Descriptor Loaded Interrupt Disable Register</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DONE</name>
<description>End Of List Interrupt Disable Register</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>OVR</name>
<description>Overflow Detected</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>OVR2HEAD</name>
<description>Overlay 2 DMA Head Register</description>
<addressOffset>0x0000025C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>HEAD</name>
<description>DMA Head Pointer</description>
<bitOffset>2</bitOffset>
<bitWidth>30</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>OVR2ADDR</name>
<description>Overlay 2 DMA Address Register</description>
<addressOffset>0x00000260</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>ADDR</name>
<description>DMA Transfer Overlay 2 Address</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>OVR2CTRL</name>
<description>Overlay 2 DMA Control Register</description>
<addressOffset>0x00000264</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DFETCH</name>
<description>Transfer Descriptor Fetch Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>LFETCH</name>
<description>Lookup Table Fetch Enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DMAIEN</name>
<description>End of DMA Transfer Interrupt Enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DSCRIEN</name>
<description>Descriptor Loaded Interrupt Enable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>ADDIEN</name>
<description>Add Head Descriptor to Queue Interrupt Enable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DONEIEN</name>
<description>End of List Interrupt Enable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>OVR2NEXT</name>
<description>Overlay 2 DMA Next Register</description>
<addressOffset>0x00000268</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>NEXT</name>
<description>DMA Descriptor Next Address</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>OVR2CFG0</name>
<description>Overlay 2 Configuration 0 Register</description>
<addressOffset>0x0000026C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>BLEN</name>
<description>AHB Burst Length</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>AHB_SINGLE</name>
<description>AHB Access is started as soon as there is enough space in the FIFO to store one data. SINGLE, INCR, INCR4, INCR8 and INCR16 bursts are used. INCR is used for a burst of 2 and 3 beats.</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_INCR4</name>
<description>AHB Access is started as soon as there is enough space in the FIFO to store a total amount of 4 data. An AHB INCR4 Burst is used. SINGLE, INCR and INCR4 bursts are used. INCR is used for a burst of 2 and 3 beats.</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_INCR8</name>
<description>AHB Access is started as soon as there is enough space in the FIFO to store a total amount of 8 data. An AHB INCR8 Burst is used. SINGLE, INCR, INCR4 and INCR8 bursts are used. INCR is used for a burst of 2 and 3 beats.</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_INCR16</name>
<description>AHB Access is started as soon as there is enough space in the FIFO to store a total amount of 16 data. An AHB INCR16 Burst is used. SINGLE, INCR, INCR4, INCR8 and INCR16 bursts are used. INCR is used for a burst of 2 and 3 beats.</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DLBO</name>
<description>Defined Length Burst Only For Channel Bus Transaction.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>ROTDIS</name>
<description>Hardware Rotation Optimization Disable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>LOCKDIS</name>
<description>Hardware Rotation Lock Disable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>OVR2CFG1</name>
<description>Overlay 2 Configuration 1 Register</description>
<addressOffset>0x00000270</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CLUTEN</name>
<description>Color Lookup Table Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>RGBMODE</name>
<description>RGB Input Mode Selection</description>
<bitOffset>4</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>12BPP_RGB_444</name>
<description>12 bpp RGB 444</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>16BPP_ARGB_4444</name>
<description>16 bpp ARGB 4444</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>16BPP_RGBA_4444</name>
<description>16 bpp RGBA 4444</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>16BPP_RGB_565</name>
<description>16 bpp RGB 565</description>
<value>0x3</value>
</enumeratedValue>
<enumeratedValue>
<name>16BPP_TRGB_1555</name>
<description>16 bpp TRGB 1555</description>
<value>0x4</value>
</enumeratedValue>
<enumeratedValue>
<name>18BPP_RGB_666</name>
<description>18 bpp RGB 666</description>
<value>0x5</value>
</enumeratedValue>
<enumeratedValue>
<name>18BPP_RGB_666PACKED</name>
<description>18 bpp RGB 666 PACKED</description>
<value>0x6</value>
</enumeratedValue>
<enumeratedValue>
<name>19BPP_TRGB_1666</name>
<description>19 bpp TRGB 1666</description>
<value>0x7</value>
</enumeratedValue>
<enumeratedValue>
<name>19BPP_TRGB_PACKED</name>
<description>19 bpp TRGB 1666 PACKED</description>
<value>0x8</value>
</enumeratedValue>
<enumeratedValue>
<name>24BPP_RGB_888</name>
<description>24 bpp RGB 888</description>
<value>0x9</value>
</enumeratedValue>
<enumeratedValue>
<name>24BPP_RGB_888_PACKED</name>
<description>24 bpp RGB 888 PACKED</description>
<value>0xA</value>
</enumeratedValue>
<enumeratedValue>
<name>25BPP_TRGB_1888</name>
<description>25 bpp TRGB 1888</description>
<value>0xB</value>
</enumeratedValue>
<enumeratedValue>
<name>32BPP_ARGB_8888</name>
<description>32 bpp ARGB 8888</description>
<value>0xC</value>
</enumeratedValue>
<enumeratedValue>
<name>32BPP_RGBA_8888</name>
<description>32 bpp RGBA 8888</description>
<value>0xD</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CLUTMODE</name>
<description>Color Lookup table input mode selection</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CLUT_1BPP</name>
<description>color lookup table mode set to 1 bit per pixel</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>CLUT_2BPP</name>
<description>color lookup table mode set to 2 bits per pixel</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>CLUT_4BPP</name>
<description>color lookup table mode set to 4 bits per pixel</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>CLUT_8BPP</name>
<description>color lookup table mode set to 8 bits per pixel</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>OVR2CFG2</name>
<description>Overlay 2 Configuration 2 Register</description>
<addressOffset>0x00000274</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>XPOS</name>
<description>Horizontal Window Position</description>
<bitOffset>0</bitOffset>
<bitWidth>11</bitWidth>
<access>read-write</access>
</field>
<field>
<name>YPOS</name>
<description>Vertical Window Position</description>
<bitOffset>16</bitOffset>
<bitWidth>11</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>OVR2CFG3</name>
<description>Overlay 2 Configuration 3 Register</description>
<addressOffset>0x00000278</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>XSIZE</name>
<description>Horizontal Window Size</description>
<bitOffset>0</bitOffset>
<bitWidth>11</bitWidth>
<access>read-write</access>
</field>
<field>
<name>YSIZE</name>
<description>Vertical Window Size</description>
<bitOffset>16</bitOffset>
<bitWidth>11</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>OVR2CFG4</name>
<description>Overlay 2 Configuration 4 Register</description>
<addressOffset>0x0000027C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>XSTRIDE</name>
<description>Horizontal Stride</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>OVR2CFG5</name>
<description>Overlay 2 Configuration 5 Register</description>
<addressOffset>0x00000280</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>PSTRIDE</name>
<description>Pixel Stride</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>OVR2CFG6</name>
<description>Overlay 2 Configuration 6 Register</description>
<addressOffset>0x00000284</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>BDEF</name>
<description>Blue Default</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>GDEF</name>
<description>Green Default</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>RDEF</name>
<description>Red Default</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>OVR2CFG7</name>
<description>Overlay 2 Configuration 7 Register</description>
<addressOffset>0x00000288</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>BKEY</name>
<description>Blue Color Component Chroma Key</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>GKEY</name>
<description>Green Color Component Chroma Key</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>RKEY</name>
<description>Red Color Component Chroma Key</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>OVR2CFG8</name>
<description>Overlay 2 Configuration 8 Register</description>
<addressOffset>0x0000028C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>BMASK</name>
<description>Blue Color Component Chroma Key Mask</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>GMASK</name>
<description>Green Color Component Chroma Key Mask</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>RMASK</name>
<description>Red Color Component Chroma Key Mask</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>OVR2CFG9</name>
<description>Overlay 2 Configuration 9 Register</description>
<addressOffset>0x00000290</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CRKEY</name>
<description>Blender Chroma Key Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>INV</name>
<description>Blender Inverted Blender Output Enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>ITER2BL</name>
<description>Blender Iterated Color Enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>ITER</name>
<description>Blender Use Iterated Color</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>REVALPHA</name>
<description>Blender Reverse Alpha</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>GAEN</name>
<description>Blender Global Alpha Enable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>LAEN</name>
<description>Blender Local Alpha Enable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>OVR</name>
<description>Blender Overlay Layer Enable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DMA</name>
<description>Blender DMA Layer Enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>REP</name>
<description>Use Replication logic to expand RGB color to 24 bits</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DSTKEY</name>
<description>Destination Chroma Keying</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>GA</name>
<description>Blender Global Alpha</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>HEOCHER</name>
<description>High-End Overlay Channel Enable Register</description>
<addressOffset>0x00000340</addressOffset>
<size>32</size>
<access>write-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CHEN</name>
<description>Channel Enable Register</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>UPDATEEN</name>
<description>Update Overlay Attributes Enable Register</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>A2QEN</name>
<description>Add Head Pointer Enable Register</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>HEOCHDR</name>
<description>High-End Overlay Channel Disable Register</description>
<addressOffset>0x00000344</addressOffset>
<size>32</size>
<access>write-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CHDIS</name>
<description>Channel Disable Register</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CHRST</name>
<description>Channel Reset Register</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>HEOCHSR</name>
<description>High-End Overlay Channel Status Register</description>
<addressOffset>0x00000348</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CHSR</name>
<description>Channel Status Register</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>UPDATESR</name>
<description>Update Overlay Attributes In Progress</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>A2QSR</name>
<description>Add To Queue Pending Register</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>HEOIER</name>
<description>High-End Overlay Interrupt Enable Register</description>
<addressOffset>0x0000034C</addressOffset>
<size>32</size>
<access>write-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DMA</name>
<description>End of DMA Transfer Interrupt Enable Register</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DSCR</name>
<description>Descriptor Loaded Interrupt Enable Register</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ADD</name>
<description>Head Descriptor Loaded Interrupt Enable Register</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DONE</name>
<description>End of List Interrupt Enable Register</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>OVR</name>
<description>Overflow Interrupt Enable Register</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>UDMA</name>
<description>End of DMA Transfer for U or UV Chrominance Interrupt Enable Register</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>UDSCR</name>
<description>Descriptor Loaded for U or UV Chrominance Interrupt Enable Register</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>UADD</name>
<description>Head Descriptor Loaded for U or UV Chrominance Interrupt Enable Register</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>UDONE</name>
<description>End of List for U or UV Chrominance Interrupt Enable Register</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>UOVR</name>
<description>Overflow for U or UV Chrominance Interrupt Enable Register</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>VDMA</name>
<description>End of DMA for V Chrominance Transfer Interrupt Enable Register</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>VDSCR</name>
<description>Descriptor Loaded for V Chrominance Interrupt Enable Register</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>VADD</name>
<description>Head Descriptor Loaded for V Chrominance Interrupt Enable Register</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>VDONE</name>
<description>End of List for V Chrominance Interrupt Enable Register</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>VOVR</name>
<description>Overflow for V Chrominance Interrupt Enable Register</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>HEOIDR</name>
<description>High-End Overlay Interrupt Disable Register</description>
<addressOffset>0x00000350</addressOffset>
<size>32</size>
<access>write-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DMA</name>
<description>End of DMA Transfer Interrupt Disable Register</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DSCR</name>
<description>Descriptor Loaded Interrupt Disable Register</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ADD</name>
<description>Head Descriptor Loaded Interrupt Disable Register</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DONE</name>
<description>End of List Interrupt Disable Register</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>OVR</name>
<description>Overflow Interrupt Disable Register</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>UDMA</name>
<description>End of DMA Transfer for U or UV Chrominance Component Interrupt Disable Register</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>UDSCR</name>
<description>Descriptor Loaded for U or UV Chrominance Component Interrupt Disable Register</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>UADD</name>
<description>Head Descriptor Loaded for U or UV Chrominance Component Interrupt Disable Register</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>UDONE</name>
<description>End of List Interrupt for U or UV Chrominance Component Disable Register</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>UOVR</name>
<description>Overflow Interrupt for U or UV Chrominance Component Disable Register</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>VDMA</name>
<description>End of DMA Transfer for V Chrominance Component Interrupt Disable Register</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>VDSCR</name>
<description>Descriptor Loaded for V Chrominance Component Interrupt Disable Register</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>VADD</name>
<description>Head Descriptor Loaded for V Chrominance Component Interrupt Disable Register</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>VDONE</name>
<description>End of List for V Chrominance Component Interrupt Disable Register</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>VOVR</name>
<description>Overflow for V Chrominance Component Interrupt Disable Register</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>HEOIMR</name>
<description>High-End Overlay Interrupt Mask Register</description>
<addressOffset>0x00000354</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DMA</name>
<description>End of DMA Transfer Interrupt Mask Register</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DSCR</name>
<description>Descriptor Loaded Interrupt Mask Register</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ADD</name>
<description>Head Descriptor Loaded Interrupt Mask Register</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DONE</name>
<description>End of List Interrupt Mask Register</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>OVR</name>
<description>Overflow Interrupt Mask Register</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>UDMA</name>
<description>End of DMA Transfer for U or UV Chrominance Component Interrupt Mask Register</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>UDSCR</name>
<description>Descriptor Loaded for U or UV Chrominance Component Interrupt Mask Register</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>UADD</name>
<description>Head Descriptor Loaded for U or UV Chrominance Component Mask Register</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>UDONE</name>
<description>End of List for U or UV Chrominance Component Mask Register</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>UOVR</name>
<description>Overflow for U Chrominance Interrupt Mask Register</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>VDMA</name>
<description>End of DMA Transfer for V Chrominance Component Interrupt Mask Register</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>VDSCR</name>
<description>Descriptor Loaded for V Chrominance Component Interrupt Mask Register</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>VADD</name>
<description>Head Descriptor Loaded for V Chrominance Component Mask Register</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>VDONE</name>
<description>End of List for V Chrominance Component Mask Register</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>VOVR</name>
<description>Overflow for V Chrominance Interrupt Mask Register</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>HEOISR</name>
<description>High-End Overlay Interrupt Status Register</description>
<addressOffset>0x00000358</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DMA</name>
<description>End of DMA Transfer</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DSCR</name>
<description>DMA Descriptor Loaded</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ADD</name>
<description>Head Descriptor Loaded</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DONE</name>
<description>End of List Detected</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>OVR</name>
<description>Overflow Detected</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>UDMA</name>
<description>End of DMA Transfer for U component</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>UDSCR</name>
<description>DMA Descriptor Loaded for U component</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>UADD</name>
<description>Head Descriptor Loaded for U component</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>UDONE</name>
<description>End of List Detected for U component</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>UOVR</name>
<description>Overflow Detected for U component</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>VDMA</name>
<description>End of DMA Transfer for V component</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>VDSCR</name>
<description>DMA Descriptor Loaded for V component</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>VADD</name>
<description>Head Descriptor Loaded for V component</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>VDONE</name>
<description>End of List Detected for V component</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>VOVR</name>
<description>Overflow Detected for V component</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>HEOHEAD</name>
<description>High-End Overlay DMA Head Register</description>
<addressOffset>0x0000035C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>HEAD</name>
<description>DMA Head Pointer</description>
<bitOffset>2</bitOffset>
<bitWidth>30</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>HEOADDR</name>
<description>High-End Overlay DMA Address Register</description>
<addressOffset>0x00000360</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>ADDR</name>
<description>DMA Transfer start Address</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>HEOCTRL</name>
<description>High-End Overlay DMA Control Register</description>
<addressOffset>0x00000364</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DFETCH</name>
<description>Transfer Descriptor Fetch Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>LFETCH</name>
<description>Lookup Table Fetch Enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DMAIEN</name>
<description>End of DMA Transfer Interrupt Enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DSCRIEN</name>
<description>Descriptor Loaded Interrupt Enable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>ADDIEN</name>
<description>Add Head Descriptor to Queue Interrupt Enable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DONEIEN</name>
<description>End of List Interrupt Enable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>HEONEXT</name>
<description>High-End Overlay DMA Next Register</description>
<addressOffset>0x00000368</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>NEXT</name>
<description>DMA Descriptor Next Address</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>HEOUHEAD</name>
<description>High-End Overlay U DMA Head Register</description>
<addressOffset>0x0000036C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>UHEAD</name>
<description>DMA Head Pointer</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>HEOUADDR</name>
<description>High-End Overlay U DMA Address Register</description>
<addressOffset>0x00000370</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>UADDR</name>
<description>DMA Transfer Start Address for U or UV Chrominance</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>HEOUCTRL</name>
<description>High-End Overlay U DMA control Register</description>
<addressOffset>0x00000374</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>UDFETCH</name>
<description>Transfer Descriptor Fetch Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>UDMAIEN</name>
<description>End of DMA Transfer Interrupt Enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>UDSCRIEN</name>
<description>Descriptor Loaded Interrupt Enable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>UADDIEN</name>
<description>Add Head Descriptor to Queue Interrupt Enable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>UDONEIEN</name>
<description>End of List Interrupt Enable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>HEOUNEXT</name>
<description>High-End Overlay U DMA Next Register</description>
<addressOffset>0x00000378</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>UNEXT</name>
<description>DMA Descriptor Next Address</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>HEOVHEAD</name>
<description>High-End Overlay V DMA Head Register</description>
<addressOffset>0x0000037C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>VHEAD</name>
<description>DMA Head Pointer</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>HEOVADDR</name>
<description>High-End Overlay V DMA Address Register</description>
<addressOffset>0x00000380</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>VADDR</name>
<description>DMA Transfer Start Address for V Chrominance</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>HEOVCTRL</name>
<description>High-End Overlay V DMA control Register</description>
<addressOffset>0x00000384</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>VDFETCH</name>
<description>Transfer Descriptor Fetch Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>VDMAIEN</name>
<description>End of DMA Transfer Interrupt Enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>VDSCRIEN</name>
<description>Descriptor Loaded Interrupt Enable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>VADDIEN</name>
<description>Add Head Descriptor to Queue Interrupt Enable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>VDONEIEN</name>
<description>End of List Interrupt Enable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>HEOVNEXT</name>
<description>High-End Overlay VDMA Next Register</description>
<addressOffset>0x00000388</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>VNEXT</name>
<description>DMA Descriptor Next Address</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>HEOCFG0</name>
<description>High-End Overlay Configuration Register 0</description>
<addressOffset>0x0000038C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SIF</name>
<description>Source Interface</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>BLEN</name>
<description>AHB Burst Length</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>AHB_BLEN_SINGLE</name>
<description>AHB Access is started as soon as there is enough space in the FIFO to store one data. SINGLE, INCR, INCR4, INCR8 and INCR16 bursts are used. INCR is used for a burst of 2 and 3 beats.</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_BLEN_INCR4</name>
<description>AHB Access is started as soon as there is enough space in the FIFO to store a total amount of 4 data. An AHB INCR4 Burst is used. SINGLE, INCR and INCR4 bursts are used. INCR is used for a burst of 2 and 3 beats.</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_BLEN_INCR8</name>
<description>AHB Access is started as soon as there is enough space in the FIFO to store a total amount of 8 data. An AHB INCR8 Burst is used. SINGLE, INCR, INCR4 and INCR8 bursts are used. INCR is used for a burst of 2 and 3 beats.</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_BLEN_INCR16</name>
<description>AHB Access is started as soon as there is enough space in the FIFO to store a total amount of 16 data. An AHB INCR16 Burst is used. SINGLE, INCR, INCR4, INCR8 and INCR16 bursts are used. INCR is used for a burst of 2 and 3 beats.</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>BLENUV</name>
<description>AHB Burst Length for U-V channel</description>
<bitOffset>6</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>AHB_SINGLE</name>
<description>AHB Access is started as soon as there is enough space in the FIFO to store one data. SINGLE, INCR, INCR4, INCR8 and INCR16 bursts are used. INCR is used for a burst of 2 and 3 beats.</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_INCR4</name>
<description>AHB Access is started as soon as there is enough space in the FIFO to store a total amount of 4 data. An AHB INCR4 Burst is used. SINGLE, INCR and INCR4 bursts are used. INCR is used for a burst of 2 and 3 beats.</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_INCR8</name>
<description>AHB Access is started as soon as there is enough space in the FIFO to store a total amount of 8 data. An AHB INCR8 Burst is used. SINGLE, INCR, INCR4 and INCR8 bursts are used. INCR is used for a burst of 2 and 3 beats.</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_INCR16</name>
<description>AHB Access is started as soon as there is enough space in the FIFO to store a total amount of 16 data. An AHB INCR16 Burst is used. SINGLE, INCR, INCR4, INCR8 and INCR16 bursts are used. INCR is used for a burst of 2 and 3 beats.</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DLBO</name>
<description>Defined Length Burst Only For Channel Bus Transaction.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>ROTDIS</name>
<description>Hardware Rotation Optimization Disable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>LOCKDIS</name>
<description>Hardware Rotation Lock Disable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>HEOCFG1</name>
<description>High-End Overlay Configuration Register 1</description>
<addressOffset>0x00000390</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CLUTEN</name>
<description>Color Lookup Table Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>YUVEN</name>
<description>YUV Color Space Enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>RGBMODE</name>
<description>RGB input mode selection</description>
<bitOffset>4</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>12BPP_RGB_444</name>
<description>12 bpp RGB 444</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>16BPP_ARGB_4444</name>
<description>16 bpp ARGB 4444</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>16BPP_RGBA_4444</name>
<description>16 bpp RGBA 4444</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>16BPP_RGB_565</name>
<description>16 bpp RGB 565</description>
<value>0x3</value>
</enumeratedValue>
<enumeratedValue>
<name>16BPP_TRGB_1555</name>
<description>16 bpp TRGB 1555</description>
<value>0x4</value>
</enumeratedValue>
<enumeratedValue>
<name>18BPP_RGB_666</name>
<description>18 bpp RGB 666</description>
<value>0x5</value>
</enumeratedValue>
<enumeratedValue>
<name>18BPP_RGB_666PACKED</name>
<description>18 bpp RGB 666 PACKED</description>
<value>0x6</value>
</enumeratedValue>
<enumeratedValue>
<name>19BPP_TRGB_1666</name>
<description>19 bpp TRGB 1666</description>
<value>0x7</value>
</enumeratedValue>
<enumeratedValue>
<name>19BPP_TRGB_PACKED</name>
<description>19 bpp TRGB 1666 PACKED</description>
<value>0x8</value>
</enumeratedValue>
<enumeratedValue>
<name>24BPP_RGB_888</name>
<description>24 bpp RGB 888</description>
<value>0x9</value>
</enumeratedValue>
<enumeratedValue>
<name>24BPP_RGB_888_PACKED</name>
<description>24 bpp RGB 888 PACKED</description>
<value>0xA</value>
</enumeratedValue>
<enumeratedValue>
<name>25BPP_TRGB_1888</name>
<description>25 bpp TRGB 1888</description>
<value>0xB</value>
</enumeratedValue>
<enumeratedValue>
<name>32BPP_ARGB_8888</name>
<description>32 bpp ARGB 8888</description>
<value>0xC</value>
</enumeratedValue>
<enumeratedValue>
<name>32BPP_RGBA_8888</name>
<description>32 bpp RGBA 8888</description>
<value>0xD</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CLUTMODE</name>
<description>Color Lookup table input mode selection</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CLUT_1BPP</name>
<description>color lookup table mode set to 1 bit per pixel</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>CLUT_2BPP</name>
<description>color lookup table mode set to 2 bits per pixel</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>CLUT_4BPP</name>
<description>color lookup table mode set to 4 bits per pixel</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>CLUT_8BPP</name>
<description>color lookup table mode set to 8 bits per pixel</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>YUVMODE</name>
<description>YUV input mode selection</description>
<bitOffset>12</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>32BPP_AYCBCR</name>
<description>32 bpp AYCbCr 444</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>16BPP_YCBCR_MODE0</name>
<description>16 bpp Cr(n)Y(n+1)Cb(n)Y(n) 422</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>16BPP_YCBCR_MODE1</name>
<description>16 bpp Y(n+1)Cr(n)Y(n)Cb(n) 422</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>16BPP_YCBCR_MODE2</name>
<description>16 bpp Cb(n)Y(+1)Cr(n)Y(n) 422</description>
<value>0x3</value>
</enumeratedValue>
<enumeratedValue>
<name>16BPP_YCBCR_MODE3</name>
<description>16 bpp Y(n+1)Cb(n)Y(n)Cr(n) 422</description>
<value>0x4</value>
</enumeratedValue>
<enumeratedValue>
<name>16BPP_YCBCR_SEMIPLANAR</name>
<description>16 bpp Semiplanar 422 YCbCr</description>
<value>0x5</value>
</enumeratedValue>
<enumeratedValue>
<name>16BPP_YCBCR_PLANAR</name>
<description>16 bpp Planar 422 YCbCr</description>
<value>0x6</value>
</enumeratedValue>
<enumeratedValue>
<name>12BPP_YCBCR_SEMIPLANAR</name>
<description>12 bpp Semiplanar 420 YCbCr</description>
<value>0x7</value>
</enumeratedValue>
<enumeratedValue>
<name>12BPP_YCBCR_PLANAR</name>
<description>12 bpp Planar 420 YCbCr</description>
<value>0x8</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>YUV422ROT</name>
<description>YUV 4:2:2 Rotation</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>YUV422SWP</name>
<description>YUV 4:2:2 SWAP</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DSCALEOPT</name>
<description>Down Scaling Bandwidth Optimization</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>HEOCFG2</name>
<description>High-End Overlay Configuration Register 2</description>
<addressOffset>0x00000394</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>XPOS</name>
<description>Horizontal Window Position</description>
<bitOffset>0</bitOffset>
<bitWidth>11</bitWidth>
<access>read-write</access>
</field>
<field>
<name>YPOS</name>
<description>Vertical Window Position</description>
<bitOffset>16</bitOffset>
<bitWidth>11</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>HEOCFG3</name>
<description>High-End Overlay Configuration Register 3</description>
<addressOffset>0x00000398</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>XSIZE</name>
<description>Horizontal Window Size</description>
<bitOffset>0</bitOffset>
<bitWidth>11</bitWidth>
<access>read-write</access>
</field>
<field>
<name>YSIZE</name>
<description>Vertical Window Size</description>
<bitOffset>16</bitOffset>
<bitWidth>11</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>HEOCFG4</name>
<description>High-End Overlay Configuration Register 4</description>
<addressOffset>0x0000039C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>XMEMSIZE</name>
<description>Horizontal image Size in Memory</description>
<bitOffset>0</bitOffset>
<bitWidth>11</bitWidth>
<access>read-write</access>
</field>
<field>
<name>YMEMSIZE</name>
<description>Vertical image Size in Memory</description>
<bitOffset>16</bitOffset>
<bitWidth>11</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>HEOCFG5</name>
<description>High-End Overlay Configuration Register 5</description>
<addressOffset>0x000003A0</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>XSTRIDE</name>
<description>Horizontal Stride</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>HEOCFG6</name>
<description>High-End Overlay Configuration Register 6</description>
<addressOffset>0x000003A4</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>PSTRIDE</name>
<description>Pixel Stride</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>HEOCFG7</name>
<description>High-End Overlay Configuration Register 7</description>
<addressOffset>0x000003A8</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>UVXSTRIDE</name>
<description>UV Horizontal Stride</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>HEOCFG8</name>
<description>High-End Overlay Configuration Register 8</description>
<addressOffset>0x000003AC</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>UVPSTRIDE</name>
<description>UV Pixel Stride</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>HEOCFG9</name>
<description>High-End Overlay Configuration Register 9</description>
<addressOffset>0x000003B0</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>BDEF</name>
<description>Blue Default</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>GDEF</name>
<description>Green Default</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>RDEF</name>
<description>Red Default</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>HEOCFG10</name>
<description>High-End Overlay Configuration Register 10</description>
<addressOffset>0x000003B4</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>BKEY</name>
<description>Blue Color Component Chroma Key</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>GKEY</name>
<description>Green Color Component Chroma Key</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>RKEY</name>
<description>Red Color Component Chroma Key</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>HEOCFG11</name>
<description>High-End Overlay Configuration Register 11</description>
<addressOffset>0x000003B8</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>BMASK</name>
<description>Blue Color Component Chroma Key Mask</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>GMASK</name>
<description>Green Color Component Chroma Key Mask</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>RMASK</name>
<description>Red Color Component Chroma Key Mask</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>HEOCFG12</name>
<description>High-End Overlay Configuration Register 12</description>
<addressOffset>0x000003BC</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CRKEY</name>
<description>Blender Chroma Key Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>INV</name>
<description>Blender Inverted Blender Output Enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>ITER2BL</name>
<description>Blender Iterated Color Enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>ITER</name>
<description>Blender Use Iterated Color</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>REVALPHA</name>
<description>Blender Reverse Alpha</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>GAEN</name>
<description>Blender Global Alpha Enable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>LAEN</name>
<description>Blender Local Alpha Enable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>OVR</name>
<description>Blender Overlay Layer Enable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DMA</name>
<description>Blender DMA Layer Enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>REP</name>
<description>Use Replication logic to expand RGB color to 24 bits</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DSTKEY</name>
<description>Destination Chroma Keying</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>VIDPRI</name>
<description>Video Priority</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>GA</name>
<description>Blender Global Alpha</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>HEOCFG13</name>
<description>High-End Overlay Configuration Register 13</description>
<addressOffset>0x000003C0</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>XFACTOR</name>
<description>Horizontal Scaling Factor</description>
<bitOffset>0</bitOffset>
<bitWidth>14</bitWidth>
<access>read-write</access>
</field>
<field>
<name>YFACTOR</name>
<description>Vertical Scaling Factor</description>
<bitOffset>16</bitOffset>
<bitWidth>14</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCALEN</name>
<description>Hardware Scaler Enable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>HEOCFG14</name>
<description>High-End Overlay Configuration Register 14</description>
<addressOffset>0x000003C4</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CSCRY</name>
<description>Color Space Conversion Y coefficient for Red Component 1:2:7 format</description>
<bitOffset>0</bitOffset>
<bitWidth>10</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CSCRU</name>
<description>Color Space Conversion U coefficient for Red Component 1:2:7 format</description>
<bitOffset>10</bitOffset>
<bitWidth>10</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CSCRV</name>
<description>Color Space Conversion V coefficient for Red Component 1:2:7 format</description>
<bitOffset>20</bitOffset>
<bitWidth>10</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CSCYOFF</name>
<description>Color Space Conversion Offset</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>HEOCFG15</name>
<description>High-End Overlay Configuration Register 15</description>
<addressOffset>0x000003C8</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CSCGY</name>
<description>Color Space Conversion Y coefficient for Green Component 1:2:7 format</description>
<bitOffset>0</bitOffset>
<bitWidth>10</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CSCGU</name>
<description>Color Space Conversion U coefficient for Green Component 1:2:7 format</description>
<bitOffset>10</bitOffset>
<bitWidth>10</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CSCGV</name>
<description>Color Space Conversion V coefficient for Green Component 1:2:7 format</description>
<bitOffset>20</bitOffset>
<bitWidth>10</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CSCUOFF</name>
<description>Color Space Conversion Offset</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>HEOCFG16</name>
<description>High-End Overlay Configuration Register 16</description>
<addressOffset>0x000003CC</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CSCBY</name>
<description>Color Space Conversion Y coefficient for Blue Component 1:2:7 format</description>
<bitOffset>0</bitOffset>
<bitWidth>10</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CSCBU</name>
<description>Color Space Conversion U coefficient for Blue Component 1:2:7 format</description>
<bitOffset>10</bitOffset>
<bitWidth>10</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CSCBV</name>
<description>Color Space Conversion V coefficient for Blue Component 1:2:7 format</description>
<bitOffset>20</bitOffset>
<bitWidth>10</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CSCVOFF</name>
<description>Color Space Conversion Offset</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>HEOCFG17</name>
<description>High-End Overlay Configuration Register 17</description>
<addressOffset>0x000003D0</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>XPHI0COEFF0</name>
<description>Horizontal Coefficient for phase 0 tap 0</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>XPHI0COEFF1</name>
<description>Horizontal Coefficient for phase 0 tap 1</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>XPHI0COEFF2</name>
<description>Horizontal Coefficient for phase 0 tap 2</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>XPHI0COEFF3</name>
<description>Horizontal Coefficient for phase 0 tap 3</description>
<bitOffset>24</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>HEOCFG18</name>
<description>High-End Overlay Configuration Register 18</description>
<addressOffset>0x000003D4</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>XPHI0COEFF4</name>
<description>Horizontal Coefficient for phase 0 tap 4</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>HEOCFG19</name>
<description>High-End Overlay Configuration Register 19</description>
<addressOffset>0x000003D8</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>XPHI1COEFF0</name>
<description>Horizontal Coefficient for phase 1 tap 0</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>XPHI1COEFF1</name>
<description>Horizontal Coefficient for phase 1 tap 1</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>XPHI1COEFF2</name>
<description>Horizontal Coefficient for phase 1 tap 2</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>XPHI1COEFF3</name>
<description>Horizontal Coefficient for phase 1 tap 3</description>
<bitOffset>24</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>HEOCFG20</name>
<description>High-End Overlay Configuration Register 20</description>
<addressOffset>0x000003DC</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>XPHI1COEFF4</name>
<description>Horizontal Coefficient for phase 1 tap 4</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>HEOCFG21</name>
<description>High-End Overlay Configuration Register 21</description>
<addressOffset>0x000003E0</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>XPHI2COEFF0</name>
<description>Horizontal Coefficient for phase 2 tap 0</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>XPHI2COEFF1</name>
<description>Horizontal Coefficient for phase 2 tap 1</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>XPHI2COEFF2</name>
<description>Horizontal Coefficient for phase 2 tap 2</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>XPHI2COEFF3</name>
<description>Horizontal Coefficient for phase 2 tap 3</description>
<bitOffset>24</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>HEOCFG22</name>
<description>High-End Overlay Configuration Register 22</description>
<addressOffset>0x000003E4</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>XPHI2COEFF4</name>
<description>Horizontal Coefficient for phase 2 tap 4</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>HEOCFG23</name>
<description>High-End Overlay Configuration Register 23</description>
<addressOffset>0x000003E8</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>XPHI3COEFF0</name>
<description>Horizontal Coefficient for phase 3 tap 0</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>XPHI3COEFF1</name>
<description>Horizontal Coefficient for phase 3 tap 1</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>XPHI3COEFF2</name>
<description>Horizontal Coefficient for phase 3 tap 2</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>XPHI3COEFF3</name>
<description>Horizontal Coefficient for phase 3 tap 3</description>
<bitOffset>24</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>HEOCFG24</name>
<description>High-End Overlay Configuration Register 24</description>
<addressOffset>0x000003EC</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>XPHI3COEFF4</name>
<description>Horizontal Coefficient for phase 3 tap 4</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>HEOCFG25</name>
<description>High-End Overlay Configuration Register 25</description>
<addressOffset>0x000003F0</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>XPHI4COEFF0</name>
<description>Horizontal Coefficient for phase 4 tap 0</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>XPHI4COEFF1</name>
<description>Horizontal Coefficient for phase 4 tap 1</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>XPHI4COEFF2</name>
<description>Horizontal Coefficient for phase 4 tap 2</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>XPHI4COEFF3</name>
<description>Horizontal Coefficient for phase 4 tap 3</description>
<bitOffset>24</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>HEOCFG26</name>
<description>High-End Overlay Configuration Register 26</description>
<addressOffset>0x000003F4</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>XPHI4COEFF4</name>
<description>Horizontal Coefficient for phase 4 tap 4</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>HEOCFG27</name>
<description>High-End Overlay Configuration Register 27</description>
<addressOffset>0x000003F8</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>XPHI5COEFF0</name>
<description>Horizontal Coefficient for phase 5 tap 0</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>XPHI5COEFF1</name>
<description>Horizontal Coefficient for phase 5 tap 1</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>XPHI5COEFF2</name>
<description>Horizontal Coefficient for phase 5 tap 2</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>XPHI5COEFF3</name>
<description>Horizontal Coefficient for phase 5 tap 3</description>
<bitOffset>24</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>HEOCFG28</name>
<description>High-End Overlay Configuration Register 28</description>
<addressOffset>0x000003FC</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>XPHI5COEFF4</name>
<description>Horizontal Coefficient for phase 5 tap 4</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>HEOCFG29</name>
<description>High-End Overlay Configuration Register 29</description>
<addressOffset>0x00000400</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>XPHI6COEFF0</name>
<description>Horizontal Coefficient for phase 6 tap 0</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>XPHI6COEFF1</name>
<description>Horizontal Coefficient for phase 6 tap 1</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>XPHI6COEFF2</name>
<description>Horizontal Coefficient for phase 6 tap 2</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>XPHI6COEFF3</name>
<description>Horizontal Coefficient for phase 6 tap 3</description>
<bitOffset>24</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>HEOCFG30</name>
<description>High-End Overlay Configuration Register 30</description>
<addressOffset>0x00000404</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>XPHI6COEFF4</name>
<description>Horizontal Coefficient for phase 6 tap 4</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>HEOCFG31</name>
<description>High-End Overlay Configuration Register 31</description>
<addressOffset>0x00000408</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>XPHI7COEFF0</name>
<description>Horizontal Coefficient for phase 7 tap 0</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>XPHI7COEFF1</name>
<description>Horizontal Coefficient for phase 7 tap 1</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>XPHI7COEFF2</name>
<description>Horizontal Coefficient for phase 7 tap 2</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>XPHI7COEFF3</name>
<description>Horizontal Coefficient for phase 7 tap 3</description>
<bitOffset>24</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>HEOCFG32</name>
<description>High-End Overlay Configuration Register 32</description>
<addressOffset>0x0000040C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>XPHI7COEFF4</name>
<description>Horizontal Coefficient for phase 7 tap 4</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>HEOCFG33</name>
<description>High-End Overlay Configuration Register 33</description>
<addressOffset>0x00000410</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>YPHI0COEFF0</name>
<description>Vertical Coefficient for phase 0 tap 0</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>YPHI0COEFF1</name>
<description>Vertical Coefficient for phase 0 tap 1</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>YPHI0COEFF2</name>
<description>Vertical Coefficient for phase 0 tap 2</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>HEOCFG34</name>
<description>High-End Overlay Configuration Register 34</description>
<addressOffset>0x00000414</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>YPHI1COEFF0</name>
<description>Vertical Coefficient for phase 1 tap 0</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>YPHI1COEFF1</name>
<description>Vertical Coefficient for phase 1 tap 1</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>YPHI1COEFF2</name>
<description>Vertical Coefficient for phase 1 tap 2</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>HEOCFG35</name>
<description>High-End Overlay Configuration Register 35</description>
<addressOffset>0x00000418</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>YPHI2COEFF0</name>
<description>Vertical Coefficient for phase 2 tap 0</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>YPHI2COEFF1</name>
<description>Vertical Coefficient for phase 2 tap 1</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>YPHI2COEFF2</name>
<description>Vertical Coefficient for phase 2 tap 2</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>HEOCFG36</name>
<description>High-End Overlay Configuration Register 36</description>
<addressOffset>0x0000041C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>YPHI3COEFF0</name>
<description>Vertical Coefficient for phase 3 tap 0</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>YPHI3COEFF1</name>
<description>Vertical Coefficient for phase 3 tap 1</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>YPHI3COEFF2</name>
<description>Vertical Coefficient for phase 3 tap 2</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>HEOCFG37</name>
<description>High-End Overlay Configuration Register 37</description>
<addressOffset>0x00000420</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>YPHI4COEFF0</name>
<description>Vertical Coefficient for phase 4 tap 0</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>YPHI4COEFF1</name>
<description>Vertical Coefficient for phase 4 tap 1</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>YPHI4COEFF2</name>
<description>Vertical Coefficient for phase 4 tap 2</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>HEOCFG38</name>
<description>High-End Overlay Configuration Register 38</description>
<addressOffset>0x00000424</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>YPHI5COEFF0</name>
<description>Vertical Coefficient for phase 5 tap 0</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>YPHI5COEFF1</name>
<description>Vertical Coefficient for phase 5 tap 1</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>YPHI5COEFF2</name>
<description>Vertical Coefficient for phase 5 tap 2</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>HEOCFG39</name>
<description>High-End Overlay Configuration Register 39</description>
<addressOffset>0x00000428</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>YPHI6COEFF0</name>
<description>Vertical Coefficient for phase 6 tap 0</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>YPHI6COEFF1</name>
<description>Vertical Coefficient for phase 6 tap 1</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>YPHI6COEFF2</name>
<description>Vertical Coefficient for phase 6 tap 2</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>HEOCFG40</name>
<description>High-End Overlay Configuration Register 40</description>
<addressOffset>0x0000042C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>YPHI7COEFF0</name>
<description>Vertical Coefficient for phase 7 tap 0</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>YPHI7COEFF1</name>
<description>Vertical Coefficient for phase 7 tap 1</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>YPHI7COEFF2</name>
<description>Vertical Coefficient for phase 7 tap 2</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>HEOCFG41</name>
<description>High-End Overlay Configuration Register 41</description>
<addressOffset>0x00000430</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>XPHIDEF</name>
<description>Horizontal Filter Phase Offset</description>
<bitOffset>0</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
</field>
<field>
<name>YPHIDEF</name>
<description>Vertical Filter Phase Offset</description>
<bitOffset>16</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>HCRCHER</name>
<description>Hardware Cursor Channel Enable Register</description>
<addressOffset>0x00000440</addressOffset>
<size>32</size>
<access>write-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CHEN</name>
<description>Channel Enable Register</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>UPDATEEN</name>
<description>Update Overlay Attributes Enable Register</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>A2QEN</name>
<description>Add Head Pointer Enable Register</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>HCRCHDR</name>
<description>Hardware Cursor Channel disable Register</description>
<addressOffset>0x00000444</addressOffset>
<size>32</size>
<access>write-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CHDIS</name>
<description>Channel Disable Register</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CHRST</name>
<description>Channel Reset Register</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>HCRCHSR</name>
<description>Hardware Cursor Channel Status Register</description>
<addressOffset>0x00000448</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CHSR</name>
<description>Channel Status Register</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>UPDATESR</name>
<description>Update Overlay Attributes In Progress</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>A2QSR</name>
<description>Add To Queue Pending Register</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>HCRIER</name>
<description>Hardware Cursor Interrupt Enable Register</description>
<addressOffset>0x0000044C</addressOffset>
<size>32</size>
<access>write-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DMA</name>
<description>End of DMA Transfer Interrupt Enable Register</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DSCR</name>
<description>Descriptor Loaded Interrupt Enable Register</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ADD</name>
<description>Head Descriptor Loaded Interrupt Enable Register</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DONE</name>
<description>End of List Interrupt Enable Register</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>OVR</name>
<description>Overflow Interrupt Enable Register</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>HCRIDR</name>
<description>Hardware Cursor Interrupt Disable Register</description>
<addressOffset>0x00000450</addressOffset>
<size>32</size>
<access>write-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DMA</name>
<description>End of DMA Transfer Interrupt Disable Register</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DSCR</name>
<description>Descriptor Loaded Interrupt Disable Register</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ADD</name>
<description>Head Descriptor Loaded Interrupt Disable Register</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DONE</name>
<description>End of List Interrupt Disable Register</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>OVR</name>
<description>Overflow Interrupt Disable Register</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>HCRIMR</name>
<description>Hardware Cursor Interrupt Mask Register</description>
<addressOffset>0x00000454</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DMA</name>
<description>End of DMA Transfer Interrupt Mask Register</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DSCR</name>
<description>Descriptor Loaded Interrupt Mask Register</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ADD</name>
<description>Head Descriptor Loaded Interrupt Mask Register</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DONE</name>
<description>End of List Interrupt Mask Register</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>OVR</name>
<description>Overflow Interrupt Mask Register</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>HCRISR</name>
<description>Hardware Cursor Interrupt Status Register</description>
<addressOffset>0x00000458</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DMA</name>
<description>End of DMA Transfer</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DSCR</name>
<description>DMA Descriptor Loaded</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ADD</name>
<description>Head Descriptor Loaded</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DONE</name>
<description>End of List Detected</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>OVR</name>
<description>Overflow Detected</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>HCRHEAD</name>
<description>Hardware Cursor DMA Head Register</description>
<addressOffset>0x0000045C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>HEAD</name>
<description>DMA Head Pointer</description>
<bitOffset>2</bitOffset>
<bitWidth>30</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>HCRADDR</name>
<description>Hardware cursor DMA Address Register</description>
<addressOffset>0x00000460</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>ADDR</name>
<description>DMA Transfer start address</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>HCRCTRL</name>
<description>Hardware Cursor DMA Control Register</description>
<addressOffset>0x00000464</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DFETCH</name>
<description>Transfer Descriptor Fetch Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>LFETCH</name>
<description>Lookup Table Fetch Enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DMAIEN</name>
<description>End of DMA Transfer Interrupt Enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DSCRIEN</name>
<description>Descriptor Loaded Interrupt Enable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>ADDIEN</name>
<description>Add Head Descriptor to Queue Interrupt Enable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DONEIEN</name>
<description>End of List Interrupt Enable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>HCRNEXT</name>
<description>Hardware Cursor DMA NExt Register</description>
<addressOffset>0x00000468</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>NEXT</name>
<description>DMA Descriptor Next Address</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>HCRCFG0</name>
<description>Hardware Cursor Configuration 0 Register</description>
<addressOffset>0x0000046C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SIF</name>
<description>Source Interface</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>BLEN</name>
<description>AHB Burst Length</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>AHB_BLEN_SINGLE</name>
<description>AHB Access is started as soon as there is enough space in the FIFO to store one data. SINGLE, INCR, INCR4, INCR8 and INCR16 bursts are used. INCR is used for a burst of 2 and 3 beats.</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_BLEN_INCR4</name>
<description>AHB Access is started as soon as there is enough space in the FIFO to store a total amount of 4 data. An AHB INCR4 Burst is used. SINGLE, INCR and INCR4 bursts are used. INCR is used for a burst of 2 and 3 beats.</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_BLEN_INCR8</name>
<description>AHB Access is started as soon as there is enough space in the FIFO to store a total amount of 8 data. An AHB INCR8 Burst is used. SINGLE, INCR, INCR4 and INCR8 bursts are used. INCR is used for a burst of 2 and 3 beats.</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_BLEN_INCR16</name>
<description>AHB Access is started as soon as there is enough space in the FIFO to store a total amount of 16 data. An AHB INCR16 Burst is used. SINGLE, INCR, INCR4, INCR8 and INCR16 bursts are used. INCR is used for a burst of 2 and 3 beats.</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DLBO</name>
<description>Defined Length Burst Only for Channel Bus Transaction.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>HCRCFG1</name>
<description>Hardware Cursor Configuration 1 Register</description>
<addressOffset>0x00000470</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CLUTEN</name>
<description>Color Lookup Table Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>RGBMODE</name>
<description>RGB input mode selection</description>
<bitOffset>4</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>12BPP_RGB_444</name>
<description>12 bpp RGB 444</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>16BPP_ARGB_4444</name>
<description>16 bpp ARGB 4444</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>16BPP_RGBA_4444</name>
<description>16 bpp RGBA 4444</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>16BPP_RGB_565</name>
<description>16 bpp RGB 565</description>
<value>0x3</value>
</enumeratedValue>
<enumeratedValue>
<name>16BPP_TRGB_1555</name>
<description>16 bpp TRGB 1555</description>
<value>0x4</value>
</enumeratedValue>
<enumeratedValue>
<name>18BPP_RGB_666</name>
<description>18 bpp RGB 666</description>
<value>0x5</value>
</enumeratedValue>
<enumeratedValue>
<name>18BPP_RGB_666PACKED</name>
<description>18 bpp RGB 666 PACKED</description>
<value>0x6</value>
</enumeratedValue>
<enumeratedValue>
<name>19BPP_TRGB_1666</name>
<description>19 bpp TRGB 1666</description>
<value>0x7</value>
</enumeratedValue>
<enumeratedValue>
<name>19BPP_TRGB_PACKED</name>
<description>19 bpp TRGB 1666 PACKED</description>
<value>0x8</value>
</enumeratedValue>
<enumeratedValue>
<name>24BPP_RGB_888</name>
<description>24 bpp RGB 888</description>
<value>0x9</value>
</enumeratedValue>
<enumeratedValue>
<name>24BPP_RGB_888_PACKED</name>
<description>24 bpp RGB 888 PACKED</description>
<value>0xA</value>
</enumeratedValue>
<enumeratedValue>
<name>25BPP_TRGB_1888</name>
<description>25 bpp TRGB 1888</description>
<value>0xB</value>
</enumeratedValue>
<enumeratedValue>
<name>32BPP_ARGB_8888</name>
<description>32 bpp ARGB 8888</description>
<value>0xC</value>
</enumeratedValue>
<enumeratedValue>
<name>32BPP_RGBA_8888</name>
<description>32 bpp RGBA 8888</description>
<value>0xD</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CLUTMODE</name>
<description>Color Lookup table input mode selection</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CLUT_1BPP</name>
<description>color lookup table mode set to 1 bit per pixel</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>CLUT_2BPP</name>
<description>color lookup table mode set to 2 bits per pixel</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>CLUT_4BPP</name>
<description>color lookup table mode set to 4 bits per pixel</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>CLUT_8BPP</name>
<description>color lookup table mode set to 8 bits per pixel</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>HCRCFG2</name>
<description>Hardware Cursor Configuration 2 Register</description>
<addressOffset>0x00000474</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>XPOS</name>
<description>Horizontal Window Position</description>
<bitOffset>0</bitOffset>
<bitWidth>11</bitWidth>
<access>read-write</access>
</field>
<field>
<name>YPOS</name>
<description>Vertical Window Position</description>
<bitOffset>16</bitOffset>
<bitWidth>11</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>HCRCFG3</name>
<description>Hardware Cursor Configuration 3 Register</description>
<addressOffset>0x00000478</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>XSIZE</name>
<description>Horizontal Window Size</description>
<bitOffset>0</bitOffset>
<bitWidth>11</bitWidth>
<access>read-write</access>
</field>
<field>
<name>YSIZE</name>
<description>Vertical Window Size</description>
<bitOffset>16</bitOffset>
<bitWidth>11</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>HCRCFG4</name>
<description>Hardware Cursor Configuration 4 Register</description>
<addressOffset>0x0000047C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>XSTRIDE</name>
<description>Horizontal Stride</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>HCRCFG6</name>
<description>Hardware Cursor Configuration 6 Register</description>
<addressOffset>0x00000484</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>BDEF</name>
<description>Blue Default</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>GDEF</name>
<description>Green Default</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>RDEF</name>
<description>Red Default</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>HCRCFG7</name>
<description>Hardware Cursor Configuration 7 Register</description>
<addressOffset>0x00000488</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>BKEY</name>
<description>Blue Color Component Chroma Key</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>GKEY</name>
<description>Green Color Component Chroma Key</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>RKEY</name>
<description>Red Color Component Chroma Key</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>HCRCFG8</name>
<description>Hardware Cursor Configuration 8 Register</description>
<addressOffset>0x0000048C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>BMASK</name>
<description>Blue Color Component Chroma Key Mask</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>GMASK</name>
<description>Green Color Component Chroma Key Mask</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>RMASK</name>
<description>Red Color Component Chroma Key Mask</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>HCRCFG9</name>
<description>Hardware Cursor Configuration 9 Register</description>
<addressOffset>0x00000490</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CRKEY</name>
<description>Blender Chroma Key Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>INV</name>
<description>Blender Inverted Blender Output Enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>ITER2BL</name>
<description>Blender Iterated Color Enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>ITER</name>
<description>Blender Use Iterated Color</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>REVALPHA</name>
<description>Blender Reverse Alpha</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>GAEN</name>
<description>Blender Global Alpha Enable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>LAEN</name>
<description>Blender Local Alpha Enable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>OVR</name>
<description>Blender Overlay Layer Enable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DMA</name>
<description>Blender DMA Layer Enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>REP</name>
<description>Use Replication logic to expand RGB color to 24 bits</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DSTKEY</name>
<description>Destination Chroma Keying</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>GA</name>
<description>Blender Global Alpha</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>PPCHER</name>
<description>Post Processing Channel Enable Register</description>
<addressOffset>0x00000540</addressOffset>
<size>32</size>
<access>write-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CHEN</name>
<description>Channel Enable Register</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>UPDATEEN</name>
<description>Update Overlay Attributes Enable Register</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>A2QEN</name>
<description>Add Head Pointer Enable Register</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>PPCHDR</name>
<description>Post Processing Channel Disable Register</description>
<addressOffset>0x00000544</addressOffset>
<size>32</size>
<access>write-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CHDIS</name>
<description>Channel Disable Register</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CHRST</name>
<description>Channel Reset Register</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>PPCHSR</name>
<description>Post Processing Channel Status Register</description>
<addressOffset>0x00000548</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CHSR</name>
<description>Channel Status Register</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>UPDATESR</name>
<description>Update Overlay Attributes In Progress</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>A2QSR</name>
<description>Add To Queue Pending Register</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>PPIER</name>
<description>Post Processing Interrupt Enable Register</description>
<addressOffset>0x0000054C</addressOffset>
<size>32</size>
<access>write-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DMA</name>
<description>End of DMA Transfer Interrupt Enable Register</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DSCR</name>
<description>Descriptor Loaded Interrupt Enable Register</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ADD</name>
<description>Head Descriptor Loaded Interrupt Enable Register</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DONE</name>
<description>End of List Interrupt Enable Register</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>PPIDR</name>
<description>Post Processing Interrupt Disable Register</description>
<addressOffset>0x00000550</addressOffset>
<size>32</size>
<access>write-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DMA</name>
<description>End of DMA Transfer Interrupt Disable Register</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DSCR</name>
<description>Descriptor Loaded Interrupt Disable Register</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ADD</name>
<description>Head Descriptor Loaded Interrupt Disable Register</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DONE</name>
<description>End of List Interrupt Disable Register</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>PPIMR</name>
<description>Post Processing Interrupt Mask Register</description>
<addressOffset>0x00000554</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DMA</name>
<description>End of DMA Transfer Interrupt Mask Register</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DSCR</name>
<description>Descriptor Loaded Interrupt Mask Register</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ADD</name>
<description>Head Descriptor Loaded Interrupt Mask Register</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DONE</name>
<description>End of List Interrupt Mask Register</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>PPISR</name>
<description>Post Processing Interrupt Status Register</description>
<addressOffset>0x00000558</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DMA</name>
<description>End of DMA Transfer</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DSCR</name>
<description>DMA Descriptor Loaded</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ADD</name>
<description>Head Descriptor Loaded</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DONE</name>
<description>End Of List Detected</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>PPHEAD</name>
<description>Post Processing Head Register</description>
<addressOffset>0x0000055C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>HEAD</name>
<description>DMA Head Pointer</description>
<bitOffset>2</bitOffset>
<bitWidth>30</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>PPADDR</name>
<description>Post Processing Address Register</description>
<addressOffset>0x00000560</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>ADDR</name>
<description>DMA Transfer start address</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>PPCTRL</name>
<description>Post Processing Control Register</description>
<addressOffset>0x00000564</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DFETCH</name>
<description>Transfer Descriptor Fetch Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DMAIEN</name>
<description>End of DMA Transfer Interrupt Enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DSCRIEN</name>
<description>Descriptor Loaded Interrupt Enable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>ADDIEN</name>
<description>Add Head Descriptor to Queue Interrupt Enable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DONEIEN</name>
<description>End of List Interrupt Enable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>PPNEXT</name>
<description>Post Processing Next Register</description>
<addressOffset>0x00000568</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>NEXT</name>
<description>DMA Descriptor Next Address</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>PPCFG0</name>
<description>Post Processing Configuration Register 0</description>
<addressOffset>0x0000056C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SIF</name>
<description>Source Interface</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>BLEN</name>
<description>AHB Burst Length</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>AHB_BLEN_SINGLE</name>
<description>AHB Access is started as soon as there is enough space in the FIFO to store one data. SINGLE, INCR, INCR4, INCR8 and INCR16 bursts are used. INCR is used for a burst of 2 and 3 beats.</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_BLEN_INCR4</name>
<description>AHB Access is started as soon as there is enough space in the FIFO to store a total amount of 4 data. An AHB INCR4 Burst is used. SINGLE, INCR and INCR4 bursts are used. INCR is used for a burst of 2 and 3 beats.</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_BLEN_INCR8</name>
<description>AHB Access is started as soon as there is enough space in the FIFO to store a total amount of 8 data. An AHB INCR8 Burst is used. SINGLE, INCR, INCR4 and INCR8 bursts are used. INCR is used for a burst of 2 and 3 beats.</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_BLEN_INCR16</name>
<description>AHB Access is started as soon as there is enough space in the FIFO to store a total amount of 16 data. An AHB INCR16 Burst is used. SINGLE, INCR, INCR4, INCR8 and INCR16 bursts are used. INCR is used for a burst of 2 and 3 beats.</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DLBO</name>
<description>Defined Length Burst Only For Channel Bus Transaction.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>PPCFG1</name>
<description>Post Processing Configuration Register 1</description>
<addressOffset>0x00000570</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>PPMODE</name>
<description>Post Processing Output Format selection</description>
<bitOffset>0</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>PPMODE_RGB_16BPP</name>
<description>RGB 16 bpp</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>PPMODE_RGB_24BPP_PACKED</name>
<description>RGB 24 bpp PACKED</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>PPMODE_RGB_24BPP_UNPACKED</name>
<description>RGB 24 bpp UNPACKED</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>PPMODE_YCBCR_422_MODE0</name>
<description>YCbCr 422 16 bpp (Mode 0)</description>
<value>0x3</value>
</enumeratedValue>
<enumeratedValue>
<name>PPMODE_YCBCR_422_MODE1</name>
<description>YCbCr 422 16 bpp (Mode 1)</description>
<value>0x4</value>
</enumeratedValue>
<enumeratedValue>
<name>PPMODE_YCBCR_422_MODE2</name>
<description>YCbCr 422 16 bpp (Mode 2)</description>
<value>0x5</value>
</enumeratedValue>
<enumeratedValue>
<name>PPMODE_YCBCR_422_MODE3</name>
<description>YCbCr 422 16 bpp (Mode 3)</description>
<value>0x6</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>ITUBT601</name>
<description>Color Space Conversion Luminance</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>PPCFG2</name>
<description>Post Processing Configuration Register 2</description>
<addressOffset>0x00000574</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>XSTRIDE</name>
<description>Horizontal Stride</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>PPCFG3</name>
<description>Post Processing Configuration Register 3</description>
<addressOffset>0x00000578</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CSCYR</name>
<description>Color Space Conversion R coefficient for Luminance component, signed format, step set to 1/1024</description>
<bitOffset>0</bitOffset>
<bitWidth>10</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CSCYG</name>
<description>Color Space Conversion G coefficient for Luminance component, signed format, step set to 1/512</description>
<bitOffset>10</bitOffset>
<bitWidth>10</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CSCYB</name>
<description>Color Space Conversion B coefficient for Luminance component, signed format, step set to 1/1024</description>
<bitOffset>20</bitOffset>
<bitWidth>10</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CSCYOFF</name>
<description>Color Space Conversion Luminance Offset</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>PPCFG4</name>
<description>Post Processing Configuration Register 4</description>
<addressOffset>0x0000057C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CSCUR</name>
<description>Color Space Conversion R coefficient for Chrominance B component, signed format. (step 1/1024)</description>
<bitOffset>0</bitOffset>
<bitWidth>10</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CSCUG</name>
<description>Color Space Conversion G coefficient for Chrominance B component, signed format. (step 1/512)</description>
<bitOffset>10</bitOffset>
<bitWidth>10</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CSCUB</name>
<description>Color Space Conversion B coefficient for Chrominance B component, signed format. (step 1/512)</description>
<bitOffset>20</bitOffset>
<bitWidth>10</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CSCUOFF</name>
<description>Color Space Conversion Chrominance B Offset</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>PPCFG5</name>
<description>Post Processing Configuration Register 5</description>
<addressOffset>0x00000580</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CSCVR</name>
<description>Color Space Conversion R coefficient for Chrominance R component, signed format. (step 1/1024)</description>
<bitOffset>0</bitOffset>
<bitWidth>10</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CSCVG</name>
<description>Color Space Conversion G coefficient for Chrominance R component, signed format. (step 1/512)</description>
<bitOffset>10</bitOffset>
<bitWidth>10</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CSCVB</name>
<description>Color Space Conversion B coefficient for Chrominance R component, signed format. (step 1/1024)</description>
<bitOffset>20</bitOffset>
<bitWidth>10</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CSCVOFF</name>
<description>Color Space Conversion Chrominance R Offset</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<dim>256</dim>
<dimIncrement>4</dimIncrement>
<dimIndex>0-255</dimIndex>
<name>BASECLUT[%s]</name>
<description>Base CLUT Register</description>
<addressOffset>0x00000600</addressOffset>
<size>32</size>
<access>read-write</access>
<fields>
<field>
<name>BCLUT</name>
<description>Blue Color entry</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>GCLUT</name>
<description>Green Color entry</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>RCLUT</name>
<description>Red Color entry</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<dim>256</dim>
<dimIncrement>4</dimIncrement>
<dimIndex>0-255</dimIndex>
<name>OVR1CLUT[%s]</name>
<description>Overlay 1 CLUT Register</description>
<addressOffset>0x00000A00</addressOffset>
<size>32</size>
<access>read-write</access>
<fields>
<field>
<name>BCLUT</name>
<description>Blue Color entry</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>GCLUT</name>
<description>Green Color entry</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>RCLUT</name>
<description>Red Color entry</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>ACLUT</name>
<description>Alpha Color entry</description>
<bitOffset>24</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<dim>256</dim>
<dimIncrement>4</dimIncrement>
<dimIndex>0-255</dimIndex>
<name>OVR2CLUT[%s]</name>
<description>Overlay 2 CLUT Register</description>
<addressOffset>0x00000E00</addressOffset>
<size>32</size>
<access>read-write</access>
<fields>
<field>
<name>BCLUT</name>
<description>Blue Color entry</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>GCLUT</name>
<description>Green Color entry</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>RCLUT</name>
<description>Red Color entry</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>ACLUT</name>
<description>Alpha Color entry</description>
<bitOffset>24</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<dim>256</dim>
<dimIncrement>4</dimIncrement>
<dimIndex>0-255</dimIndex>
<name>HEOCLUT[%s]</name>
<description>High End Overlay CLUT Register</description>
<addressOffset>0x00001200</addressOffset>
<size>32</size>
<access>read-write</access>
<fields>
<field>
<name>BCLUT</name>
<description>Blue Color entry</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>GCLUT</name>
<description>Green Color entry</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>RCLUT</name>
<description>Red Color entry</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>ACLUT</name>
<description>Alpha Color entry</description>
<bitOffset>24</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<dim>256</dim>
<dimIncrement>4</dimIncrement>
<dimIndex>0-255</dimIndex>
<name>HCRCLUT[%s]</name>
<description>Hardware Cursor CLUT Register</description>
<addressOffset>0x00001600</addressOffset>
<size>32</size>
<access>read-write</access>
<fields>
<field>
<name>BCLUT</name>
<description>Blue Color entry</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>GCLUT</name>
<description>Green Color entry</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>RCLUT</name>
<description>Red Color entry</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>ACLUT</name>
<description>Alpha Color entry</description>
<bitOffset>24</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>ISI</name>
<version>6350F</version>
<description>Image Sensor Interface</description>
<prependToName>ISI_</prependToName>
<baseAddress>0xF0034000</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x4000</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>ISI</name>
<value>37</value>
</interrupt>
<registers>
<register>
<name>CFG1</name>
<description>ISI Configuration 1 Register</description>
<addressOffset>0x00000000</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>HSYNC_POL</name>
<description>Horizontal Synchronization Polarity</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>VSYNC_POL</name>
<description>Vertical Synchronization Polarity</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>PIXCLK_POL</name>
<description>Pixel Clock Polarity</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>EMB_SYNC</name>
<description>Embedded Synchronization</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CRC_SYNC</name>
<description>Embedded Synchronization Correction</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>FRATE</name>
<description>Frame Rate [0..7]</description>
<bitOffset>8</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DISCR</name>
<description>Disable Codec Request</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>FULL</name>
<description>Full Mode is Allowed</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>THMASK</name>
<description>Threshold Mask</description>
<bitOffset>13</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>BEATS_4</name>
<description>Only 4 beats AHB burst allowed</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>BEATS_8</name>
<description>Only 4 and 8 beats AHB burst allowed</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>BEATS_16</name>
<description>4, 8 and 16 beats AHB burst allowed</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SLD</name>
<description>Start of Line Delay</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SFD</name>
<description>Start of Frame Delay</description>
<bitOffset>24</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>CFG2</name>
<description>ISI Configuration 2 Register</description>
<addressOffset>0x00000004</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>IM_VSIZE</name>
<description>Vertical Size of the Image Sensor [0..2047]:</description>
<bitOffset>0</bitOffset>
<bitWidth>11</bitWidth>
<access>read-write</access>
</field>
<field>
<name>GS_MODE</name>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>RGB_MODE</name>
<description>RGB Input Mode:</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>GRAYSCALE</name>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>RGB_SWAP</name>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>COL_SPACE</name>
<description>Color Space for the Image Data</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>IM_HSIZE</name>
<description>Horizontal Size of the Image Sensor [0..2047]</description>
<bitOffset>16</bitOffset>
<bitWidth>11</bitWidth>
<access>read-write</access>
</field>
<field>
<name>YCC_SWAP</name>
<description>Defines the YCC Image Data</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>RGB_CFG</name>
<description>Defines RGB Pattern when RGB_MODE is set to 1</description>
<bitOffset>30</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>PSIZE</name>
<description>ISI Preview Size Register</description>
<addressOffset>0x00000008</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>PREV_VSIZE</name>
<description>Vertical Size for the Preview Path</description>
<bitOffset>0</bitOffset>
<bitWidth>10</bitWidth>
<access>read-write</access>
</field>
<field>
<name>PREV_HSIZE</name>
<description>Horizontal Size for the Preview Path</description>
<bitOffset>16</bitOffset>
<bitWidth>10</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>PDECF</name>
<description>ISI Preview Decimation Factor Register</description>
<addressOffset>0x0000000C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000010</resetValue>
<fields>
<field>
<name>DEC_FACTOR</name>
<description>Decimation Factor</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>Y2R_SET0</name>
<description>ISI CSC YCrCb To RGB Set 0 Register</description>
<addressOffset>0x00000010</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x6832CC95</resetValue>
<fields>
<field>
<name>C0</name>
<description>Color Space Conversion Matrix Coefficient C0</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>C1</name>
<description>Color Space Conversion Matrix Coefficient C1</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>C2</name>
<description>Color Space Conversion Matrix Coefficient C2</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>C3</name>
<description>Color Space Conversion Matrix Coefficient C3</description>
<bitOffset>24</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>Y2R_SET1</name>
<description>ISI CSC YCrCb To RGB Set 1 Register</description>
<addressOffset>0x00000014</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00007102</resetValue>
<fields>
<field>
<name>C4</name>
<description>Color Space Conversion Matrix Coefficient C4</description>
<bitOffset>0</bitOffset>
<bitWidth>9</bitWidth>
<access>read-write</access>
</field>
<field>
<name>Yoff</name>
<description>Color Space Conversion Luminance Default Offset</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>Croff</name>
<description>Color Space Conversion Red Chrominance Default Offset</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>Cboff</name>
<description>Color Space Conversion Blue Chrominance Default Offset</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>R2Y_SET0</name>
<description>ISI CSC RGB To YCrCb Set 0 Register</description>
<addressOffset>0x00000018</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x01324145</resetValue>
<fields>
<field>
<name>C0</name>
<description>Color Space Conversion Matrix Coefficient C0</description>
<bitOffset>0</bitOffset>
<bitWidth>7</bitWidth>
<access>read-write</access>
</field>
<field>
<name>C1</name>
<description>Color Space Conversion Matrix Coefficient C1</description>
<bitOffset>8</bitOffset>
<bitWidth>7</bitWidth>
<access>read-write</access>
</field>
<field>
<name>C2</name>
<description>Color Space Conversion Matrix Coefficient C2</description>
<bitOffset>16</bitOffset>
<bitWidth>7</bitWidth>
<access>read-write</access>
</field>
<field>
<name>Roff</name>
<description>Color Space Conversion Red Component Offset</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>R2Y_SET1</name>
<description>ISI CSC RGB To YCrCb Set 1 Register</description>
<addressOffset>0x0000001C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x01245E38</resetValue>
<fields>
<field>
<name>C3</name>
<description>Color Space Conversion Matrix Coefficient C3</description>
<bitOffset>0</bitOffset>
<bitWidth>7</bitWidth>
<access>read-write</access>
</field>
<field>
<name>C4</name>
<description>Color Space Conversion Matrix Coefficient C4</description>
<bitOffset>8</bitOffset>
<bitWidth>7</bitWidth>
<access>read-write</access>
</field>
<field>
<name>C5</name>
<description>Color Space Conversion Matrix Coefficient C5</description>
<bitOffset>16</bitOffset>
<bitWidth>7</bitWidth>
<access>read-write</access>
</field>
<field>
<name>Goff</name>
<description>Color Space Conversion Green Component Offset</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>R2Y_SET2</name>
<description>ISI CSC RGB To YCrCb Set 2 Register</description>
<addressOffset>0x00000020</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x01384A4B</resetValue>
<fields>
<field>
<name>C6</name>
<description>Color Space Conversion Matrix Coefficient C6</description>
<bitOffset>0</bitOffset>
<bitWidth>7</bitWidth>
<access>read-write</access>
</field>
<field>
<name>C7</name>
<description>Color Space Conversion Matrix Coefficient C7</description>
<bitOffset>8</bitOffset>
<bitWidth>7</bitWidth>
<access>read-write</access>
</field>
<field>
<name>C8</name>
<description>Color Space Conversion Matrix Coefficient C8</description>
<bitOffset>16</bitOffset>
<bitWidth>7</bitWidth>
<access>read-write</access>
</field>
<field>
<name>Boff</name>
<description>Color Space Conversion Blue Component Offset</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>CR</name>
<description>ISI Control Register</description>
<addressOffset>0x00000024</addressOffset>
<size>32</size>
<access>write-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>ISI_EN</name>
<description>ISI Module Enable Request</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ISI_DIS</name>
<description>ISI Module Disable Request</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ISI_SRST</name>
<description>ISI Software Reset Request</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ISI_CDC</name>
<description>ISI Codec Request</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>SR</name>
<description>ISI Status Register</description>
<addressOffset>0x00000028</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>ENABLE</name>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DIS_DONE</name>
<description>Module Disable Request has Terminated</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SRST</name>
<description>Module Software Reset Request has Terminated</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CDC_PND</name>
<description>Pending Codec Request (this bit is a status bit)</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>VSYNC</name>
<description>Vertical Synchronization</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PXFR_DONE</name>
<description>Preview DMA Transfer has Terminated.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CXFR_DONE</name>
<description>Codec DMA Transfer has Terminated.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SIP</name>
<description>Synchronization in Progress (this is a status bit)</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P_OVR</name>
<description>Preview Datapath Overflow</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>C_OVR</name>
<description>Codec Datapath Overflow</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CRC_ERR</name>
<description>CRC Synchronization Error</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>FR_OVR</name>
<description>Frame Rate Overrun</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>IER</name>
<description>ISI Interrupt Enable Register</description>
<addressOffset>0x0000002C</addressOffset>
<size>32</size>
<access>write-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DIS_DONE</name>
<description>Disable Done Interrupt Enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SRST</name>
<description>Software Reset Interrupt Enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>VSYNC</name>
<description>Vertical Synchronization Interrupt Enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PXFR_DONE</name>
<description>Preview DMA Transfer Done Interrupt Enable</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CXFR_DONE</name>
<description>Codec DMA Transfer Done Interrupt Enable</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P_OVR</name>
<description>Preview Datapath Overflow Interrupt Enable</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>C_OVR</name>
<description>Codec Datapath Overflow Interrupt Enable</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CRC_ERR</name>
<description>Embedded Synchronization CRC Error Interrupt Enable</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>FR_OVR</name>
<description>Frame Rate Overflow Interrupt Enable</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IDR</name>
<description>ISI Interrupt Disable Register</description>
<addressOffset>0x00000030</addressOffset>
<size>32</size>
<access>write-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DIS_DONE</name>
<description>Disable Done Interrupt Disable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SRST</name>
<description>Software Reset Interrupt Disable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>VSYNC</name>
<description>Vertical Synchronization Interrupt Disable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PXFR_DONE</name>
<description>Preview DMA Transfer Done Interrupt Disable</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CXFR_DONE</name>
<description>Codec DMA Transfer Done Interrupt Disable</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P_OVR</name>
<description>Preview Datapath Overflow Interrupt Disable</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>C_OVR</name>
<description>Codec Datapath Overflow Interrupt Disable</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CRC_ERR</name>
<description>Embedded Synchronization CRC Error Interrupt Disable</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>FR_OVR</name>
<description>Frame Rate Overflow Interrupt Disable</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IMR</name>
<description>ISI Interrupt Mask Register</description>
<addressOffset>0x00000034</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DIS_DONE</name>
<description>Module Disable Operation Completed</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SRST</name>
<description>Software Reset Completed</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>VSYNC</name>
<description>Vertical Synchronization</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PXFR_DONE</name>
<description>Preview DMA Transfer Interrupt</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CXFR_DONE</name>
<description>Codec DMA Transfer Interrupt</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P_OVR</name>
<description>FIFO Preview Overflow</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>C_OVR</name>
<description>FIFO Codec Overflow</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CRC_ERR</name>
<description>CRC Synchronization Error</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>FR_OVR</name>
<description>Frame Rate Overrun</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>DMA_CHER</name>
<description>DMA Channel Enable Register</description>
<addressOffset>0x00000038</addressOffset>
<size>32</size>
<access>write-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>P_CH_EN</name>
<description>Preview Channel Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>C_CH_EN</name>
<description>Codec Channel Enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>DMA_CHDR</name>
<description>DMA Channel Disable Register</description>
<addressOffset>0x0000003C</addressOffset>
<size>32</size>
<access>write-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>P_CH_DIS</name>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>C_CH_DIS</name>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>DMA_CHSR</name>
<description>DMA Channel Status Register</description>
<addressOffset>0x00000040</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>P_CH_S</name>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>C_CH_S</name>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>DMA_P_ADDR</name>
<description>DMA Preview Base Address Register</description>
<addressOffset>0x00000044</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>P_ADDR</name>
<description>Preview Image Base Address. (This address is word aligned.)</description>
<bitOffset>2</bitOffset>
<bitWidth>30</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DMA_P_CTRL</name>
<description>DMA Preview Control Register</description>
<addressOffset>0x00000048</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>P_FETCH</name>
<description>Descriptor Fetch Control Field</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P_WB</name>
<description>Descriptor Writeback Control Field</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P_IEN</name>
<description>Transfer Done Flag Control</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P_DONE</name>
<description>(This field is only updated in the memory.)</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DMA_P_DSCR</name>
<description>DMA Preview Descriptor Address Register</description>
<addressOffset>0x0000004C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>P_DSCR</name>
<description>Preview Descriptor Base Address (This address is word aligned.)</description>
<bitOffset>2</bitOffset>
<bitWidth>30</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DMA_C_ADDR</name>
<description>DMA Codec Base Address Register</description>
<addressOffset>0x00000050</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>C_ADDR</name>
<description>Codec Image Base Address (This address is word aligned.)</description>
<bitOffset>2</bitOffset>
<bitWidth>30</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DMA_C_CTRL</name>
<description>DMA Codec Control Register</description>
<addressOffset>0x00000054</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>C_FETCH</name>
<description>Descriptor Fetch Control Field</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>C_WB</name>
<description>Descriptor Writeback Control Field</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>C_IEN</name>
<description>Transfer Done flag control</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>C_DONE</name>
<description>(This field is only updated in the memory.)</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DMA_C_DSCR</name>
<description>DMA Codec Descriptor Address Register</description>
<addressOffset>0x00000058</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>C_DSCR</name>
<description>Codec Descriptor Base Address (This address is word aligned.)</description>
<bitOffset>2</bitOffset>
<bitWidth>30</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>WPCR</name>
<description>Write Protection Control Register</description>
<addressOffset>0x000000E4</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>WP_EN</name>
<description>Write Protection Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>WP_KEY</name>
<description>Write Protection KEY Password</description>
<bitOffset>8</bitOffset>
<bitWidth>24</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>WPSR</name>
<description>Write Protection Status Register</description>
<addressOffset>0x000000E8</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>WP_VS</name>
<description>Write Protection Violation Status</description>
<bitOffset>0</bitOffset>
<bitWidth>4</bitWidth>
<access>read-only</access>
</field>
<field>
<name>WP_VSRC</name>
<description>Write Protection Violation Source</description>
<bitOffset>8</bitOffset>
<bitWidth>16</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>SFR</name>
<version>11066A</version>
<description>Special Function Registers</description>
<prependToName>SFR_</prependToName>
<baseAddress>0xF0038000</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x4000</size>
<usage>registers</usage>
</addressBlock>
<registers>
<register>
<name>OHCIICR</name>
<description>OHCI Interrupt Configuration Register</description>
<addressOffset>0x00000010</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>RES0</name>
<description>USB PORTx RESET</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>RES1</name>
<description>USB PORTx RESET</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>RES2</name>
<description>USB PORTx RESET</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>ARIE</name>
<description>OHCI Asynchronous Resume Interrupt Enable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>APPSTART</name>
<description>Reserved</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>UDPPUDIS</name>
<description>OHCI USB DEVICE PULL-UP DISABLE</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>OHCIISR</name>
<description>OHCI Interrupt Status Register</description>
<addressOffset>0x00000014</addressOffset>
<size>32</size>
<access>read-only</access>
<fields>
<field>
<name>RIS0</name>
<description>OHCI Resume Interrupt Status Port 0</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RIS1</name>
<description>OHCI Resume Interrupt Status Port 1</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RIS2</name>
<description>OHCI Resume Interrupt Status Port 2</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>AHB</name>
<description>AHB Configuration Register</description>
<addressOffset>0x00000020</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>PFETCH10</name>
<description>AHB MASTERx 10 Converter Prefetch</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>INCR4</name>
<description>INCR undefined burst converted to burst of 4 beats.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>INCR8</name>
<description>INCR undefined burst converted to burst of 8 beats.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PFETCH11</name>
<description>AHB MASTERx 11 Converter Prefetch</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>INCR4</name>
<description>INCR undefined burst converted to burst of 4 beats.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>INCR8</name>
<description>INCR undefined burst converted to burst of 8 beats.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PFETCH12</name>
<description>AHB MASTERx 12 Converter Prefetch</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>INCR4</name>
<description>INCR undefined burst converted to burst of 4 beats.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>INCR8</name>
<description>INCR undefined burst converted to burst of 8 beats.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PFETCH13</name>
<description>AHB MASTERx 13 Converter Prefetch</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>INCR4</name>
<description>INCR undefined burst converted to burst of 4 beats.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>INCR8</name>
<description>INCR undefined burst converted to burst of 8 beats.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PFETCH14</name>
<description>AHB MASTERx 14 Converter Prefetch</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>INCR4</name>
<description>INCR undefined burst converted to burst of 4 beats.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>INCR8</name>
<description>INCR undefined burst converted to burst of 8 beats.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DLBOPT10</name>
<description>AHB MASTERx 10 Converter Define Length Burst Optimization</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DLBOPT11</name>
<description>AHB MASTERx 11 Converter Define Length Burst Optimization</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DLBOPT12</name>
<description>AHB MASTERx 12 Converter Define Length Burst Optimization</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DLBOPT13</name>
<description>AHB MASTERx 13 Converter Define Length Burst Optimization</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DLBOPT14</name>
<description>AHB MASTERx 14 Converter Define Length Burst Optimization</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>BRIDGE</name>
<description>Bridge Configuration Register</description>
<addressOffset>0x00000024</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>APBTURBO</name>
<description>AHB to APB Bridge mode</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>AXI2AHBSEL</name>
<description>AXI to AHB bridge for DDR controller selection</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>SINGLE</name>
<description>use single port bridge.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>DUAL</name>
<description>use dual port bridge.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>SECURE</name>
<description>Security Configuration Register</description>
<addressOffset>0x00000028</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>ROM</name>
<description>Disable Access to ROM Code</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>FUSE</name>
<description>Disable Access to Fuse Controller</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>UTMICKTRIM</name>
<description>UTMI Clock Trimming Register</description>
<addressOffset>0x00000030</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00010000</resetValue>
<fields>
<field>
<name>FREQ</name>
<description>UTMI Reference Clock Frequency</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>12</name>
<description>12 MHz reference clock</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>16</name>
<description>16 MHz reference clock</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>24</name>
<description>24 MHz reference clock</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>48</name>
<description>48 MHz reference clock</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>VBG</name>
<description>UTMI Band Gap Voltage Trimming</description>
<bitOffset>16</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>UTMIHSTRIM</name>
<description>UTMI High Speed Trimming Register</description>
<addressOffset>0x00000034</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00044433</resetValue>
<fields>
<field>
<name>SQUELCH</name>
<description>UTMI HS SQUELCH Voltage Trimming</description>
<bitOffset>0</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DISC</name>
<description>UTMI Disconnect Voltage Trimming</description>
<bitOffset>4</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SLOPE0</name>
<description>UTMI HS PORTx Transceiver Slope Trimming</description>
<bitOffset>8</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SLOPE1</name>
<description>UTMI HS PORTx Transceiver Slope Trimming</description>
<bitOffset>12</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SLOPE2</name>
<description>UTMI HS PORTx Transceiver Slope Trimming</description>
<bitOffset>16</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>UTMIFSTRIM</name>
<description>UTMI Full Speed Trimming Register</description>
<addressOffset>0x00000038</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00430211</resetValue>
<fields>
<field>
<name>RISE</name>
<description>FS Transceiver output rising slope trimming</description>
<bitOffset>0</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
</field>
<field>
<name>FALL</name>
<description>FS Transceiver output falling slope trimming</description>
<bitOffset>4</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
</field>
<field>
<name>XCVR</name>
<description>FS Transceiver crossover voltage trimming</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>ZN</name>
<description>FS Transceiver NMOS impedance trimming</description>
<bitOffset>16</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
</field>
<field>
<name>ZP</name>
<description>FS Transceiver PMOS impedance trimming</description>
<bitOffset>20</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>UTMISWAP</name>
<description>UTMI DP/DM Pin Swapping Register</description>
<addressOffset>0x0000003C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>PORT0</name>
<description>PORT 0 DP/DM Pin Swapping</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>NORMAL</name>
<description>DP/DM normal pinout.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>SWAPPED</name>
<description>DP/DM swapped pinout.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PORT1</name>
<description>PORT 1 DP/DM Pin Swapping</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>NORMAL</name>
<description>DP/DM normal pinout.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>SWAPPED</name>
<description>DP/DM swapped pinout.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PORT2</name>
<description>PORT 2 DP/DM Pin Swapping</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>NORMAL</name>
<description>DP/DM normal pinout.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>SWAPPED</name>
<description>DP/DM swapped pinout.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>EBICFG</name>
<description>EBI Configuration Register</description>
<addressOffset>0x00000040</addressOffset>
<size>32</size>
<access>read-write</access>
<fields>
<field>
<name>DRIVE0</name>
<description>EBI Pins Drive Level</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LOW</name>
<description>Low drive level</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>MEDIUM</name>
<description>Medium drive level</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HIGH</name>
<description>High drive level</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PULL0</name>
<description>EBI Pins Pull Value</description>
<bitOffset>2</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>UP</name>
<description>Pull-up</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>NONE</name>
<description>No Pull</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>DOWN</name>
<description>Pull-down</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SCH0</name>
<description>EBI Pins Schmitt Trigger</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DRIVE1</name>
<description>EBI Pins Drive Level</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LOW</name>
<description>Low drive level</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>MEDIUM</name>
<description>Medium drive level</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HIGH</name>
<description>High drive level</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PULL1</name>
<description>EBI Pins Pull Value</description>
<bitOffset>10</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>UP</name>
<description>Pull-up</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>NONE</name>
<description>No Pull</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>DOWN</name>
<description>Pull-down</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SCH1</name>
<description>EBI Pins Schmitt Trigger</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>BMS</name>
<description>BMS Sampled Value (Read Only)</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>ROM</name>
<description>Boot on ROM.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>EBI</name>
<description>Boot on EBI.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>HSMCI1</name>
<version>6449K</version>
<description>High Speed MultiMedia Card Interface 1</description>
<groupName>HSMCI</groupName>
<prependToName>HSMCI1_</prependToName>
<baseAddress>0xF8000000</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x4000</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>HSMCI1</name>
<value>22</value>
</interrupt>
<registers>
<register>
<name>CR</name>
<description>Control Register</description>
<addressOffset>0x00000000</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>MCIEN</name>
<description>Multi-Media Interface Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>MCIDIS</name>
<description>Multi-Media Interface Disable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PWSEN</name>
<description>Power Save Mode Enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PWSDIS</name>
<description>Power Save Mode Disable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SWRST</name>
<description>Software Reset</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>MR</name>
<description>Mode Register</description>
<addressOffset>0x00000004</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CLKDIV</name>
<description>Clock Divider</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>PWSDIV</name>
<description>Power Saving Divider</description>
<bitOffset>8</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
</field>
<field>
<name>RDPROOF</name>
<description>Read Proof Enable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>WRPROOF</name>
<description>Write Proof Enable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>FBYTE</name>
<description>Force Byte Transfer</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>PADV</name>
<description>Padding Value</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CLKODD</name>
<description>Clock divider is odd</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DTOR</name>
<description>Data Timeout Register</description>
<addressOffset>0x00000008</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DTOCYC</name>
<description>Data Timeout Cycle Number</description>
<bitOffset>0</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DTOMUL</name>
<description>Data Timeout Multiplier</description>
<bitOffset>4</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>1</name>
<description>DTOCYC</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>16</name>
<description>DTOCYC x 16</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>128</name>
<description>DTOCYC x 128</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>256</name>
<description>DTOCYC x 256</description>
<value>0x3</value>
</enumeratedValue>
<enumeratedValue>
<name>1024</name>
<description>DTOCYC x 1024</description>
<value>0x4</value>
</enumeratedValue>
<enumeratedValue>
<name>4096</name>
<description>DTOCYC x 4096</description>
<value>0x5</value>
</enumeratedValue>
<enumeratedValue>
<name>65536</name>
<description>DTOCYC x 65536</description>
<value>0x6</value>
</enumeratedValue>
<enumeratedValue>
<name>1048576</name>
<description>DTOCYC x 1048576</description>
<value>0x7</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>SDCR</name>
<description>SD/SDIO Card Register</description>
<addressOffset>0x0000000C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SDCSEL</name>
<description>SDCard/SDIO Slot</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>SLOTA</name>
<description>Slot A is selected.</description>
<value>0</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SDCBUS</name>
<description>SDCard/SDIO Bus Width</description>
<bitOffset>6</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>1</name>
<description>1 bit</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>4</name>
<description>4 bit</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>8</name>
<description>8 bit</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>ARGR</name>
<description>Argument Register</description>
<addressOffset>0x00000010</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>ARG</name>
<description>Command Argument</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>CMDR</name>
<description>Command Register</description>
<addressOffset>0x00000014</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>CMDNB</name>
<description>Command Number</description>
<bitOffset>0</bitOffset>
<bitWidth>6</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RSPTYP</name>
<description>Response Type</description>
<bitOffset>6</bitOffset>
<bitWidth>2</bitWidth>
<access>write-only</access>
<enumeratedValues>
<enumeratedValue>
<name>NORESP</name>
<description>No response.</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>48_BIT</name>
<description>48-bit response.</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>136_BIT</name>
<description>136-bit response.</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>R1B</name>
<description>R1b response type</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SPCMD</name>
<description>Special Command</description>
<bitOffset>8</bitOffset>
<bitWidth>3</bitWidth>
<access>write-only</access>
<enumeratedValues>
<enumeratedValue>
<name>STD</name>
<description>Not a special CMD.</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>INIT</name>
<description>Initialization CMD: 74 clock cycles for initialization sequence.</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>SYNC</name>
<description>Synchronized CMD: Wait for the end of the current data block transfer before sending the pending command.</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>CE_ATA</name>
<description>CE-ATA Completion Signal disable Command. The host cancels the ability for the device to return a command completion signal on the command line.</description>
<value>0x3</value>
</enumeratedValue>
<enumeratedValue>
<name>IT_CMD</name>
<description>Interrupt command: Corresponds to the Interrupt Mode (CMD40).</description>
<value>0x4</value>
</enumeratedValue>
<enumeratedValue>
<name>IT_RESP</name>
<description>Interrupt response: Corresponds to the Interrupt Mode (CMD40).</description>
<value>0x5</value>
</enumeratedValue>
<enumeratedValue>
<name>BOR</name>
<description>Boot Operation Request. Start a boot operation mode, the host processor can read boot data from the MMC device directly.</description>
<value>0x6</value>
</enumeratedValue>
<enumeratedValue>
<name>EBO</name>
<description>End Boot Operation. This command allows the host processor to terminate the boot operation mode.</description>
<value>0x7</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>OPDCMD</name>
<description>Open Drain Command</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
<enumeratedValues>
<enumeratedValue>
<name>PUSHPULL</name>
<description>Push pull command.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>OPENDRAIN</name>
<description>Open drain command.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>MAXLAT</name>
<description>Max Latency for Command to Response</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
<enumeratedValues>
<enumeratedValue>
<name>5</name>
<description>5-cycle max latency.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>64</name>
<description>64-cycle max latency.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>TRCMD</name>
<description>Transfer Command</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<access>write-only</access>
<enumeratedValues>
<enumeratedValue>
<name>NO_DATA</name>
<description>No data transfer</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>START_DATA</name>
<description>Start data transfer</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>STOP_DATA</name>
<description>Stop data transfer</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>TRDIR</name>
<description>Transfer Direction</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
<enumeratedValues>
<enumeratedValue>
<name>WRITE</name>
<description>Write.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>READ</name>
<description>Read.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>TRTYP</name>
<description>Transfer Type</description>
<bitOffset>19</bitOffset>
<bitWidth>3</bitWidth>
<access>write-only</access>
<enumeratedValues>
<enumeratedValue>
<name>SINGLE</name>
<description>MMC/SD Card Single Block</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>MULTIPLE</name>
<description>MMC/SD Card Multiple Block</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>STREAM</name>
<description>MMC Stream</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>BYTE</name>
<description>SDIO Byte</description>
<value>0x4</value>
</enumeratedValue>
<enumeratedValue>
<name>BLOCK</name>
<description>SDIO Block</description>
<value>0x5</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>IOSPCMD</name>
<description>SDIO Special Command</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
<access>write-only</access>
<enumeratedValues>
<enumeratedValue>
<name>STD</name>
<description>Not an SDIO Special Command</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>SUSPEND</name>
<description>SDIO Suspend Command</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>RESUME</name>
<description>SDIO Resume Command</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>ATACS</name>
<description>ATA with Command Completion Signal</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
<enumeratedValues>
<enumeratedValue>
<name>NORMAL</name>
<description>Normal operation mode.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>COMPLETION</name>
<description>This bit indicates that a completion signal is expected within a programmed amount of time (HSMCI_CSTOR).</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>BOOT_ACK</name>
<description>Boot Operation Acknowledge.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>BLKR</name>
<description>Block Register</description>
<addressOffset>0x00000018</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>BCNT</name>
<description>MMC/SDIO Block Count - SDIO Byte Count</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
<field>
<name>BLKLEN</name>
<description>Data Block Length</description>
<bitOffset>16</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>CSTOR</name>
<description>Completion Signal Timeout Register</description>
<addressOffset>0x0000001C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CSTOCYC</name>
<description>Completion Signal Timeout Cycle Number</description>
<bitOffset>0</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CSTOMUL</name>
<description>Completion Signal Timeout Multiplier</description>
<bitOffset>4</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>1</name>
<description>CSTOCYC x 1</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>16</name>
<description>CSTOCYC x 16</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>128</name>
<description>CSTOCYC x 128</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>256</name>
<description>CSTOCYC x 256</description>
<value>0x3</value>
</enumeratedValue>
<enumeratedValue>
<name>1024</name>
<description>CSTOCYC x 1024</description>
<value>0x4</value>
</enumeratedValue>
<enumeratedValue>
<name>4096</name>
<description>CSTOCYC x 4096</description>
<value>0x5</value>
</enumeratedValue>
<enumeratedValue>
<name>65536</name>
<description>CSTOCYC x 65536</description>
<value>0x6</value>
</enumeratedValue>
<enumeratedValue>
<name>1048576</name>
<description>CSTOCYC x 1048576</description>
<value>0x7</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<dim>4</dim>
<dimIncrement>4</dimIncrement>
<dimIndex>0-3</dimIndex>
<name>RSPR[%s]</name>
<description>Response Register</description>
<addressOffset>0x00000020</addressOffset>
<size>32</size>
<access>read-only</access>
<fields>
<field>
<name>RSP</name>
<description>Response</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>RDR</name>
<description>Receive Data Register</description>
<addressOffset>0x00000030</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DATA</name>
<description>Data to Read</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>TDR</name>
<description>Transmit Data Register</description>
<addressOffset>0x00000034</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>DATA</name>
<description>Data to Write</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>SR</name>
<description>Status Register</description>
<addressOffset>0x00000040</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x0000C0E5</resetValue>
<fields>
<field>
<name>CMDRDY</name>
<description>Command Ready</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXRDY</name>
<description>Receiver Ready</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY</name>
<description>Transmit Ready</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BLKE</name>
<description>Data Block Ended</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DTIP</name>
<description>Data Transfer in Progress</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NOTBUSY</name>
<description>HSMCI Not Busy</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SDIOIRQA</name>
<description>SDIO Interrupt for Slot A</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SDIOWAIT</name>
<description>SDIO Read Wait Operation Status</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CSRCV</name>
<description>CE-ATA Completion Signal Received</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RINDE</name>
<description>Response Index Error</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RDIRE</name>
<description>Response Direction Error</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RCRCE</name>
<description>Response CRC Error</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RENDE</name>
<description>Response End Bit Error</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RTOE</name>
<description>Response Time-out Error</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DCRCE</name>
<description>Data CRC Error</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DTOE</name>
<description>Data Time-out Error</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CSTOE</name>
<description>Completion Signal Time-out Error</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BLKOVRE</name>
<description>DMA Block Overrun Error</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DMADONE</name>
<description>DMA Transfer done</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>FIFOEMPTY</name>
<description>FIFO empty flag</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>XFRDONE</name>
<description>Transfer Done flag</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ACKRCV</name>
<description>Boot Operation Acknowledge Received</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ACKRCVE</name>
<description>Boot Operation Acknowledge Error</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>OVRE</name>
<description>Overrun</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>UNRE</name>
<description>Underrun</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>IER</name>
<description>Interrupt Enable Register</description>
<addressOffset>0x00000044</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>CMDRDY</name>
<description>Command Ready Interrupt Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY</name>
<description>Receiver Ready Interrupt Enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY</name>
<description>Transmit Ready Interrupt Enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BLKE</name>
<description>Data Block Ended Interrupt Enable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DTIP</name>
<description>Data Transfer in Progress Interrupt Enable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NOTBUSY</name>
<description>Data Not Busy Interrupt Enable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SDIOIRQA</name>
<description>SDIO Interrupt for Slot A Interrupt Enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SDIOWAIT</name>
<description>SDIO Read Wait Operation Status Interrupt Enable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CSRCV</name>
<description>Completion Signal Received Interrupt Enable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RINDE</name>
<description>Response Index Error Interrupt Enable</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RDIRE</name>
<description>Response Direction Error Interrupt Enable</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RCRCE</name>
<description>Response CRC Error Interrupt Enable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RENDE</name>
<description>Response End Bit Error Interrupt Enable</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RTOE</name>
<description>Response Time-out Error Interrupt Enable</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DCRCE</name>
<description>Data CRC Error Interrupt Enable</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DTOE</name>
<description>Data Time-out Error Interrupt Enable</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CSTOE</name>
<description>Completion Signal Timeout Error Interrupt Enable</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BLKOVRE</name>
<description>DMA Block Overrun Error Interrupt Enable</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DMADONE</name>
<description>DMA Transfer completed Interrupt Enable</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>FIFOEMPTY</name>
<description>FIFO empty Interrupt enable</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>XFRDONE</name>
<description>Transfer Done Interrupt enable</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ACKRCV</name>
<description>Boot Acknowledge Interrupt Enable</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ACKRCVE</name>
<description>Boot Acknowledge Error Interrupt Enable</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>OVRE</name>
<description>Overrun Interrupt Enable</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>UNRE</name>
<description>Underrun Interrupt Enable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IDR</name>
<description>Interrupt Disable Register</description>
<addressOffset>0x00000048</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>CMDRDY</name>
<description>Command Ready Interrupt Disable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY</name>
<description>Receiver Ready Interrupt Disable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY</name>
<description>Transmit Ready Interrupt Disable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BLKE</name>
<description>Data Block Ended Interrupt Disable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DTIP</name>
<description>Data Transfer in Progress Interrupt Disable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NOTBUSY</name>
<description>Data Not Busy Interrupt Disable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SDIOIRQA</name>
<description>SDIO Interrupt for Slot A Interrupt Disable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SDIOWAIT</name>
<description>SDIO Read Wait Operation Status Interrupt Disable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CSRCV</name>
<description>Completion Signal received interrupt Disable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RINDE</name>
<description>Response Index Error Interrupt Disable</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RDIRE</name>
<description>Response Direction Error Interrupt Disable</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RCRCE</name>
<description>Response CRC Error Interrupt Disable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RENDE</name>
<description>Response End Bit Error Interrupt Disable</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RTOE</name>
<description>Response Time-out Error Interrupt Disable</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DCRCE</name>
<description>Data CRC Error Interrupt Disable</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DTOE</name>
<description>Data Time-out Error Interrupt Disable</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CSTOE</name>
<description>Completion Signal Time out Error Interrupt Disable</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BLKOVRE</name>
<description>DMA Block Overrun Error Interrupt Disable</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DMADONE</name>
<description>DMA Transfer completed Interrupt Disable</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>FIFOEMPTY</name>
<description>FIFO empty Interrupt Disable</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>XFRDONE</name>
<description>Transfer Done Interrupt Disable</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ACKRCV</name>
<description>Boot Acknowledge Interrupt Disable</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ACKRCVE</name>
<description>Boot Acknowledge Error Interrupt Disable</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>OVRE</name>
<description>Overrun Interrupt Disable</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>UNRE</name>
<description>Underrun Interrupt Disable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IMR</name>
<description>Interrupt Mask Register</description>
<addressOffset>0x0000004C</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CMDRDY</name>
<description>Command Ready Interrupt Mask</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXRDY</name>
<description>Receiver Ready Interrupt Mask</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY</name>
<description>Transmit Ready Interrupt Mask</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BLKE</name>
<description>Data Block Ended Interrupt Mask</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DTIP</name>
<description>Data Transfer in Progress Interrupt Mask</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NOTBUSY</name>
<description>Data Not Busy Interrupt Mask</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SDIOIRQA</name>
<description>SDIO Interrupt for Slot A Interrupt Mask</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SDIOWAIT</name>
<description>SDIO Read Wait Operation Status Interrupt Mask</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CSRCV</name>
<description>Completion Signal Received Interrupt Mask</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RINDE</name>
<description>Response Index Error Interrupt Mask</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RDIRE</name>
<description>Response Direction Error Interrupt Mask</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RCRCE</name>
<description>Response CRC Error Interrupt Mask</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RENDE</name>
<description>Response End Bit Error Interrupt Mask</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RTOE</name>
<description>Response Time-out Error Interrupt Mask</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DCRCE</name>
<description>Data CRC Error Interrupt Mask</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DTOE</name>
<description>Data Time-out Error Interrupt Mask</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CSTOE</name>
<description>Completion Signal Time-out Error Interrupt Mask</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BLKOVRE</name>
<description>DMA Block Overrun Error Interrupt Mask</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DMADONE</name>
<description>DMA Transfer Completed Interrupt Mask</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>FIFOEMPTY</name>
<description>FIFO Empty Interrupt Mask</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>XFRDONE</name>
<description>Transfer Done Interrupt Mask</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ACKRCV</name>
<description>Boot Operation Acknowledge Received Interrupt Mask</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ACKRCVE</name>
<description>Boot Operation Acknowledge Error Interrupt Mask</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>OVRE</name>
<description>Overrun Interrupt Mask</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>UNRE</name>
<description>Underrun Interrupt Mask</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>DMA</name>
<description>DMA Configuration Register</description>
<addressOffset>0x00000050</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>OFFSET</name>
<description>DMA Write Buffer Offset</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CHKSIZE</name>
<description>DMA Channel Read and Write Chunk Size</description>
<bitOffset>4</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DMAEN</name>
<description>DMA Hardware Handshaking Enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>ROPT</name>
<description>Read Optimization with padding</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>CFG</name>
<description>Configuration Register</description>
<addressOffset>0x00000054</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>FIFOMODE</name>
<description>HSMCI Internal FIFO control mode</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>FERRCTRL</name>
<description>Flow Error flag reset control mode</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>HSMODE</name>
<description>High Speed Mode</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>LSYNC</name>
<description>Synchronize on the last block</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>WPMR</name>
<description>Write Protection Mode Register</description>
<addressOffset>0x000000E4</addressOffset>
<size>32</size>
<access>read-write</access>
<fields>
<field>
<name>WP_EN</name>
<description>Write Protection Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>WP_KEY</name>
<description>Write Protection Key password</description>
<bitOffset>8</bitOffset>
<bitWidth>24</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>WPSR</name>
<description>Write Protection Status Register</description>
<addressOffset>0x000000E8</addressOffset>
<size>32</size>
<access>read-only</access>
<fields>
<field>
<name>WP_VS</name>
<description>Write Protection Violation Status</description>
<bitOffset>0</bitOffset>
<bitWidth>4</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>NONE</name>
<description>No Write Protection Violation occurred since the last read of this register (WP_SR)</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>WRITE</name>
<description>Write Protection detected unauthorized attempt to write a control register had occurred (since the last read.)</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>RESET</name>
<description>Software reset had been performed while Write Protection was enabled (since the last read).</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>BOTH</name>
<description>Both Write Protection violation and software reset with Write Protection enabled have occurred since the last read.</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>WP_VSRC</name>
<description>Write Protection Violation SouRCe</description>
<bitOffset>8</bitOffset>
<bitWidth>16</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<dim>256</dim>
<dimIncrement>4</dimIncrement>
<dimIndex>0-255</dimIndex>
<name>FIFO[%s]</name>
<description>FIFO Memory Aperture0</description>
<addressOffset>0x00000200</addressOffset>
<size>32</size>
<access>read-write</access>
<fields>
<field>
<name>DATA</name>
<description>Data to Read or Data to Write</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>HSMCI2</name>
<version>6449K</version>
<description>High Speed MultiMedia Card Interface 2</description>
<groupName>HSMCI</groupName>
<prependToName>HSMCI2_</prependToName>
<baseAddress>0xF8004000</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x4000</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>HSMCI2</name>
<value>23</value>
</interrupt>
<registers>
<register>
<name>CR</name>
<description>Control Register</description>
<addressOffset>0x00000000</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>MCIEN</name>
<description>Multi-Media Interface Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>MCIDIS</name>
<description>Multi-Media Interface Disable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PWSEN</name>
<description>Power Save Mode Enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PWSDIS</name>
<description>Power Save Mode Disable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SWRST</name>
<description>Software Reset</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>MR</name>
<description>Mode Register</description>
<addressOffset>0x00000004</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CLKDIV</name>
<description>Clock Divider</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>PWSDIV</name>
<description>Power Saving Divider</description>
<bitOffset>8</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
</field>
<field>
<name>RDPROOF</name>
<description>Read Proof Enable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>WRPROOF</name>
<description>Write Proof Enable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>FBYTE</name>
<description>Force Byte Transfer</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>PADV</name>
<description>Padding Value</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CLKODD</name>
<description>Clock divider is odd</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DTOR</name>
<description>Data Timeout Register</description>
<addressOffset>0x00000008</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DTOCYC</name>
<description>Data Timeout Cycle Number</description>
<bitOffset>0</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DTOMUL</name>
<description>Data Timeout Multiplier</description>
<bitOffset>4</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>1</name>
<description>DTOCYC</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>16</name>
<description>DTOCYC x 16</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>128</name>
<description>DTOCYC x 128</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>256</name>
<description>DTOCYC x 256</description>
<value>0x3</value>
</enumeratedValue>
<enumeratedValue>
<name>1024</name>
<description>DTOCYC x 1024</description>
<value>0x4</value>
</enumeratedValue>
<enumeratedValue>
<name>4096</name>
<description>DTOCYC x 4096</description>
<value>0x5</value>
</enumeratedValue>
<enumeratedValue>
<name>65536</name>
<description>DTOCYC x 65536</description>
<value>0x6</value>
</enumeratedValue>
<enumeratedValue>
<name>1048576</name>
<description>DTOCYC x 1048576</description>
<value>0x7</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>SDCR</name>
<description>SD/SDIO Card Register</description>
<addressOffset>0x0000000C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SDCSEL</name>
<description>SDCard/SDIO Slot</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>SLOTA</name>
<description>Slot A is selected.</description>
<value>0</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SDCBUS</name>
<description>SDCard/SDIO Bus Width</description>
<bitOffset>6</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>1</name>
<description>1 bit</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>4</name>
<description>4 bit</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>8</name>
<description>8 bit</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>ARGR</name>
<description>Argument Register</description>
<addressOffset>0x00000010</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>ARG</name>
<description>Command Argument</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>CMDR</name>
<description>Command Register</description>
<addressOffset>0x00000014</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>CMDNB</name>
<description>Command Number</description>
<bitOffset>0</bitOffset>
<bitWidth>6</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RSPTYP</name>
<description>Response Type</description>
<bitOffset>6</bitOffset>
<bitWidth>2</bitWidth>
<access>write-only</access>
<enumeratedValues>
<enumeratedValue>
<name>NORESP</name>
<description>No response.</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>48_BIT</name>
<description>48-bit response.</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>136_BIT</name>
<description>136-bit response.</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>R1B</name>
<description>R1b response type</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SPCMD</name>
<description>Special Command</description>
<bitOffset>8</bitOffset>
<bitWidth>3</bitWidth>
<access>write-only</access>
<enumeratedValues>
<enumeratedValue>
<name>STD</name>
<description>Not a special CMD.</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>INIT</name>
<description>Initialization CMD: 74 clock cycles for initialization sequence.</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>SYNC</name>
<description>Synchronized CMD: Wait for the end of the current data block transfer before sending the pending command.</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>CE_ATA</name>
<description>CE-ATA Completion Signal disable Command. The host cancels the ability for the device to return a command completion signal on the command line.</description>
<value>0x3</value>
</enumeratedValue>
<enumeratedValue>
<name>IT_CMD</name>
<description>Interrupt command: Corresponds to the Interrupt Mode (CMD40).</description>
<value>0x4</value>
</enumeratedValue>
<enumeratedValue>
<name>IT_RESP</name>
<description>Interrupt response: Corresponds to the Interrupt Mode (CMD40).</description>
<value>0x5</value>
</enumeratedValue>
<enumeratedValue>
<name>BOR</name>
<description>Boot Operation Request. Start a boot operation mode, the host processor can read boot data from the MMC device directly.</description>
<value>0x6</value>
</enumeratedValue>
<enumeratedValue>
<name>EBO</name>
<description>End Boot Operation. This command allows the host processor to terminate the boot operation mode.</description>
<value>0x7</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>OPDCMD</name>
<description>Open Drain Command</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
<enumeratedValues>
<enumeratedValue>
<name>PUSHPULL</name>
<description>Push pull command.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>OPENDRAIN</name>
<description>Open drain command.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>MAXLAT</name>
<description>Max Latency for Command to Response</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
<enumeratedValues>
<enumeratedValue>
<name>5</name>
<description>5-cycle max latency.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>64</name>
<description>64-cycle max latency.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>TRCMD</name>
<description>Transfer Command</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<access>write-only</access>
<enumeratedValues>
<enumeratedValue>
<name>NO_DATA</name>
<description>No data transfer</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>START_DATA</name>
<description>Start data transfer</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>STOP_DATA</name>
<description>Stop data transfer</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>TRDIR</name>
<description>Transfer Direction</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
<enumeratedValues>
<enumeratedValue>
<name>WRITE</name>
<description>Write.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>READ</name>
<description>Read.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>TRTYP</name>
<description>Transfer Type</description>
<bitOffset>19</bitOffset>
<bitWidth>3</bitWidth>
<access>write-only</access>
<enumeratedValues>
<enumeratedValue>
<name>SINGLE</name>
<description>MMC/SD Card Single Block</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>MULTIPLE</name>
<description>MMC/SD Card Multiple Block</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>STREAM</name>
<description>MMC Stream</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>BYTE</name>
<description>SDIO Byte</description>
<value>0x4</value>
</enumeratedValue>
<enumeratedValue>
<name>BLOCK</name>
<description>SDIO Block</description>
<value>0x5</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>IOSPCMD</name>
<description>SDIO Special Command</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
<access>write-only</access>
<enumeratedValues>
<enumeratedValue>
<name>STD</name>
<description>Not an SDIO Special Command</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>SUSPEND</name>
<description>SDIO Suspend Command</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>RESUME</name>
<description>SDIO Resume Command</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>ATACS</name>
<description>ATA with Command Completion Signal</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
<enumeratedValues>
<enumeratedValue>
<name>NORMAL</name>
<description>Normal operation mode.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>COMPLETION</name>
<description>This bit indicates that a completion signal is expected within a programmed amount of time (HSMCI_CSTOR).</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>BOOT_ACK</name>
<description>Boot Operation Acknowledge.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>BLKR</name>
<description>Block Register</description>
<addressOffset>0x00000018</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>BCNT</name>
<description>MMC/SDIO Block Count - SDIO Byte Count</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
<field>
<name>BLKLEN</name>
<description>Data Block Length</description>
<bitOffset>16</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>CSTOR</name>
<description>Completion Signal Timeout Register</description>
<addressOffset>0x0000001C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CSTOCYC</name>
<description>Completion Signal Timeout Cycle Number</description>
<bitOffset>0</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CSTOMUL</name>
<description>Completion Signal Timeout Multiplier</description>
<bitOffset>4</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>1</name>
<description>CSTOCYC x 1</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>16</name>
<description>CSTOCYC x 16</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>128</name>
<description>CSTOCYC x 128</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>256</name>
<description>CSTOCYC x 256</description>
<value>0x3</value>
</enumeratedValue>
<enumeratedValue>
<name>1024</name>
<description>CSTOCYC x 1024</description>
<value>0x4</value>
</enumeratedValue>
<enumeratedValue>
<name>4096</name>
<description>CSTOCYC x 4096</description>
<value>0x5</value>
</enumeratedValue>
<enumeratedValue>
<name>65536</name>
<description>CSTOCYC x 65536</description>
<value>0x6</value>
</enumeratedValue>
<enumeratedValue>
<name>1048576</name>
<description>CSTOCYC x 1048576</description>
<value>0x7</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<dim>4</dim>
<dimIncrement>4</dimIncrement>
<dimIndex>0-3</dimIndex>
<name>RSPR[%s]</name>
<description>Response Register</description>
<addressOffset>0x00000020</addressOffset>
<size>32</size>
<access>read-only</access>
<fields>
<field>
<name>RSP</name>
<description>Response</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>RDR</name>
<description>Receive Data Register</description>
<addressOffset>0x00000030</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DATA</name>
<description>Data to Read</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>TDR</name>
<description>Transmit Data Register</description>
<addressOffset>0x00000034</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>DATA</name>
<description>Data to Write</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>SR</name>
<description>Status Register</description>
<addressOffset>0x00000040</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x0000C0E5</resetValue>
<fields>
<field>
<name>CMDRDY</name>
<description>Command Ready</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXRDY</name>
<description>Receiver Ready</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY</name>
<description>Transmit Ready</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BLKE</name>
<description>Data Block Ended</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DTIP</name>
<description>Data Transfer in Progress</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NOTBUSY</name>
<description>HSMCI Not Busy</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SDIOIRQA</name>
<description>SDIO Interrupt for Slot A</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SDIOWAIT</name>
<description>SDIO Read Wait Operation Status</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CSRCV</name>
<description>CE-ATA Completion Signal Received</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RINDE</name>
<description>Response Index Error</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RDIRE</name>
<description>Response Direction Error</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RCRCE</name>
<description>Response CRC Error</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RENDE</name>
<description>Response End Bit Error</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RTOE</name>
<description>Response Time-out Error</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DCRCE</name>
<description>Data CRC Error</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DTOE</name>
<description>Data Time-out Error</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CSTOE</name>
<description>Completion Signal Time-out Error</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BLKOVRE</name>
<description>DMA Block Overrun Error</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DMADONE</name>
<description>DMA Transfer done</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>FIFOEMPTY</name>
<description>FIFO empty flag</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>XFRDONE</name>
<description>Transfer Done flag</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ACKRCV</name>
<description>Boot Operation Acknowledge Received</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ACKRCVE</name>
<description>Boot Operation Acknowledge Error</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>OVRE</name>
<description>Overrun</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>UNRE</name>
<description>Underrun</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>IER</name>
<description>Interrupt Enable Register</description>
<addressOffset>0x00000044</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>CMDRDY</name>
<description>Command Ready Interrupt Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY</name>
<description>Receiver Ready Interrupt Enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY</name>
<description>Transmit Ready Interrupt Enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BLKE</name>
<description>Data Block Ended Interrupt Enable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DTIP</name>
<description>Data Transfer in Progress Interrupt Enable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NOTBUSY</name>
<description>Data Not Busy Interrupt Enable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SDIOIRQA</name>
<description>SDIO Interrupt for Slot A Interrupt Enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SDIOWAIT</name>
<description>SDIO Read Wait Operation Status Interrupt Enable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CSRCV</name>
<description>Completion Signal Received Interrupt Enable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RINDE</name>
<description>Response Index Error Interrupt Enable</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RDIRE</name>
<description>Response Direction Error Interrupt Enable</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RCRCE</name>
<description>Response CRC Error Interrupt Enable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RENDE</name>
<description>Response End Bit Error Interrupt Enable</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RTOE</name>
<description>Response Time-out Error Interrupt Enable</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DCRCE</name>
<description>Data CRC Error Interrupt Enable</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DTOE</name>
<description>Data Time-out Error Interrupt Enable</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CSTOE</name>
<description>Completion Signal Timeout Error Interrupt Enable</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BLKOVRE</name>
<description>DMA Block Overrun Error Interrupt Enable</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DMADONE</name>
<description>DMA Transfer completed Interrupt Enable</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>FIFOEMPTY</name>
<description>FIFO empty Interrupt enable</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>XFRDONE</name>
<description>Transfer Done Interrupt enable</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ACKRCV</name>
<description>Boot Acknowledge Interrupt Enable</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ACKRCVE</name>
<description>Boot Acknowledge Error Interrupt Enable</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>OVRE</name>
<description>Overrun Interrupt Enable</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>UNRE</name>
<description>Underrun Interrupt Enable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IDR</name>
<description>Interrupt Disable Register</description>
<addressOffset>0x00000048</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>CMDRDY</name>
<description>Command Ready Interrupt Disable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY</name>
<description>Receiver Ready Interrupt Disable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY</name>
<description>Transmit Ready Interrupt Disable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BLKE</name>
<description>Data Block Ended Interrupt Disable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DTIP</name>
<description>Data Transfer in Progress Interrupt Disable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NOTBUSY</name>
<description>Data Not Busy Interrupt Disable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SDIOIRQA</name>
<description>SDIO Interrupt for Slot A Interrupt Disable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SDIOWAIT</name>
<description>SDIO Read Wait Operation Status Interrupt Disable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CSRCV</name>
<description>Completion Signal received interrupt Disable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RINDE</name>
<description>Response Index Error Interrupt Disable</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RDIRE</name>
<description>Response Direction Error Interrupt Disable</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RCRCE</name>
<description>Response CRC Error Interrupt Disable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RENDE</name>
<description>Response End Bit Error Interrupt Disable</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RTOE</name>
<description>Response Time-out Error Interrupt Disable</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DCRCE</name>
<description>Data CRC Error Interrupt Disable</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DTOE</name>
<description>Data Time-out Error Interrupt Disable</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CSTOE</name>
<description>Completion Signal Time out Error Interrupt Disable</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BLKOVRE</name>
<description>DMA Block Overrun Error Interrupt Disable</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DMADONE</name>
<description>DMA Transfer completed Interrupt Disable</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>FIFOEMPTY</name>
<description>FIFO empty Interrupt Disable</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>XFRDONE</name>
<description>Transfer Done Interrupt Disable</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ACKRCV</name>
<description>Boot Acknowledge Interrupt Disable</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ACKRCVE</name>
<description>Boot Acknowledge Error Interrupt Disable</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>OVRE</name>
<description>Overrun Interrupt Disable</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>UNRE</name>
<description>Underrun Interrupt Disable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IMR</name>
<description>Interrupt Mask Register</description>
<addressOffset>0x0000004C</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CMDRDY</name>
<description>Command Ready Interrupt Mask</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXRDY</name>
<description>Receiver Ready Interrupt Mask</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY</name>
<description>Transmit Ready Interrupt Mask</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BLKE</name>
<description>Data Block Ended Interrupt Mask</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DTIP</name>
<description>Data Transfer in Progress Interrupt Mask</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NOTBUSY</name>
<description>Data Not Busy Interrupt Mask</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SDIOIRQA</name>
<description>SDIO Interrupt for Slot A Interrupt Mask</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SDIOWAIT</name>
<description>SDIO Read Wait Operation Status Interrupt Mask</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CSRCV</name>
<description>Completion Signal Received Interrupt Mask</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RINDE</name>
<description>Response Index Error Interrupt Mask</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RDIRE</name>
<description>Response Direction Error Interrupt Mask</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RCRCE</name>
<description>Response CRC Error Interrupt Mask</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RENDE</name>
<description>Response End Bit Error Interrupt Mask</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RTOE</name>
<description>Response Time-out Error Interrupt Mask</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DCRCE</name>
<description>Data CRC Error Interrupt Mask</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DTOE</name>
<description>Data Time-out Error Interrupt Mask</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CSTOE</name>
<description>Completion Signal Time-out Error Interrupt Mask</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BLKOVRE</name>
<description>DMA Block Overrun Error Interrupt Mask</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DMADONE</name>
<description>DMA Transfer Completed Interrupt Mask</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>FIFOEMPTY</name>
<description>FIFO Empty Interrupt Mask</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>XFRDONE</name>
<description>Transfer Done Interrupt Mask</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ACKRCV</name>
<description>Boot Operation Acknowledge Received Interrupt Mask</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ACKRCVE</name>
<description>Boot Operation Acknowledge Error Interrupt Mask</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>OVRE</name>
<description>Overrun Interrupt Mask</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>UNRE</name>
<description>Underrun Interrupt Mask</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>DMA</name>
<description>DMA Configuration Register</description>
<addressOffset>0x00000050</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>OFFSET</name>
<description>DMA Write Buffer Offset</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CHKSIZE</name>
<description>DMA Channel Read and Write Chunk Size</description>
<bitOffset>4</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DMAEN</name>
<description>DMA Hardware Handshaking Enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>ROPT</name>
<description>Read Optimization with padding</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>CFG</name>
<description>Configuration Register</description>
<addressOffset>0x00000054</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>FIFOMODE</name>
<description>HSMCI Internal FIFO control mode</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>FERRCTRL</name>
<description>Flow Error flag reset control mode</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>HSMODE</name>
<description>High Speed Mode</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>LSYNC</name>
<description>Synchronize on the last block</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>WPMR</name>
<description>Write Protection Mode Register</description>
<addressOffset>0x000000E4</addressOffset>
<size>32</size>
<access>read-write</access>
<fields>
<field>
<name>WP_EN</name>
<description>Write Protection Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>WP_KEY</name>
<description>Write Protection Key password</description>
<bitOffset>8</bitOffset>
<bitWidth>24</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>WPSR</name>
<description>Write Protection Status Register</description>
<addressOffset>0x000000E8</addressOffset>
<size>32</size>
<access>read-only</access>
<fields>
<field>
<name>WP_VS</name>
<description>Write Protection Violation Status</description>
<bitOffset>0</bitOffset>
<bitWidth>4</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>NONE</name>
<description>No Write Protection Violation occurred since the last read of this register (WP_SR)</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>WRITE</name>
<description>Write Protection detected unauthorized attempt to write a control register had occurred (since the last read.)</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>RESET</name>
<description>Software reset had been performed while Write Protection was enabled (since the last read).</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>BOTH</name>
<description>Both Write Protection violation and software reset with Write Protection enabled have occurred since the last read.</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>WP_VSRC</name>
<description>Write Protection Violation SouRCe</description>
<bitOffset>8</bitOffset>
<bitWidth>16</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<dim>256</dim>
<dimIncrement>4</dimIncrement>
<dimIndex>0-255</dimIndex>
<name>FIFO[%s]</name>
<description>FIFO Memory Aperture0</description>
<addressOffset>0x00000200</addressOffset>
<size>32</size>
<access>read-write</access>
<fields>
<field>
<name>DATA</name>
<description>Data to Read or Data to Write</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>SPI1</name>
<version>6088T</version>
<description>Serial Peripheral Interface 1</description>
<groupName>SPI</groupName>
<prependToName>SPI1_</prependToName>
<baseAddress>0xF8008000</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x4000</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>SPI1</name>
<value>25</value>
</interrupt>
<registers>
<register>
<name>CR</name>
<description>Control Register</description>
<addressOffset>0x00000000</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>SPIEN</name>
<description>SPI Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SPIDIS</name>
<description>SPI Disable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SWRST</name>
<description>SPI Software Reset</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>LASTXFER</name>
<description>Last Transfer</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>MR</name>
<description>Mode Register</description>
<addressOffset>0x00000004</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>MSTR</name>
<description>Master/Slave Mode</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>PS</name>
<description>Peripheral Select</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>PCSDEC</name>
<description>Chip Select Decode</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>MODFDIS</name>
<description>Mode Fault Detection</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>WDRBT</name>
<description>Wait Data Read Before Transfer</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>LLB</name>
<description>Local Loopback Enable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>PCS</name>
<description>Peripheral Chip Select</description>
<bitOffset>16</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DLYBCS</name>
<description>Delay Between Chip Selects</description>
<bitOffset>24</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>RDR</name>
<description>Receive Data Register</description>
<addressOffset>0x00000008</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>RD</name>
<description>Receive Data</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PCS</name>
<description>Peripheral Chip Select</description>
<bitOffset>16</bitOffset>
<bitWidth>4</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>TDR</name>
<description>Transmit Data Register</description>
<addressOffset>0x0000000C</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>TD</name>
<description>Transmit Data</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PCS</name>
<description>Peripheral Chip Select</description>
<bitOffset>16</bitOffset>
<bitWidth>4</bitWidth>
<access>write-only</access>
</field>
<field>
<name>LASTXFER</name>
<description>Last Transfer</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>SR</name>
<description>Status Register</description>
<addressOffset>0x00000010</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x000000F0</resetValue>
<fields>
<field>
<name>RDRF</name>
<description>Receive Data Register Full</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TDRE</name>
<description>Transmit Data Register Empty</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>MODF</name>
<description>Mode Fault Error</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>OVRES</name>
<description>Overrun Error Status</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NSSR</name>
<description>NSS Rising</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXEMPTY</name>
<description>Transmission Registers Empty</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>UNDES</name>
<description>Underrun Error Status (Slave Mode Only)</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SPIENS</name>
<description>SPI Enable Status</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>IER</name>
<description>Interrupt Enable Register</description>
<addressOffset>0x00000014</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>RDRF</name>
<description>Receive Data Register Full Interrupt Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TDRE</name>
<description>SPI Transmit Data Register Empty Interrupt Enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>MODF</name>
<description>Mode Fault Error Interrupt Enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>OVRES</name>
<description>Overrun Error Interrupt Enable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NSSR</name>
<description>NSS Rising Interrupt Enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXEMPTY</name>
<description>Transmission Registers Empty Enable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>UNDES</name>
<description>Underrun Error Interrupt Enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IDR</name>
<description>Interrupt Disable Register</description>
<addressOffset>0x00000018</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>RDRF</name>
<description>Receive Data Register Full Interrupt Disable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TDRE</name>
<description>SPI Transmit Data Register Empty Interrupt Disable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>MODF</name>
<description>Mode Fault Error Interrupt Disable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>OVRES</name>
<description>Overrun Error Interrupt Disable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NSSR</name>
<description>NSS Rising Interrupt Disable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXEMPTY</name>
<description>Transmission Registers Empty Disable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>UNDES</name>
<description>Underrun Error Interrupt Disable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IMR</name>
<description>Interrupt Mask Register</description>
<addressOffset>0x0000001C</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>RDRF</name>
<description>Receive Data Register Full Interrupt Mask</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TDRE</name>
<description>SPI Transmit Data Register Empty Interrupt Mask</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>MODF</name>
<description>Mode Fault Error Interrupt Mask</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>OVRES</name>
<description>Overrun Error Interrupt Mask</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NSSR</name>
<description>NSS Rising Interrupt Mask</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXEMPTY</name>
<description>Transmission Registers Empty Mask</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>UNDES</name>
<description>Underrun Error Interrupt Mask</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<dim>4</dim>
<dimIncrement>4</dimIncrement>
<dimIndex>0-3</dimIndex>
<name>CSR[%s]</name>
<description>Chip Select Register</description>
<addressOffset>0x00000030</addressOffset>
<size>32</size>
<access>read-write</access>
<fields>
<field>
<name>CPOL</name>
<description>Clock Polarity</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>NCPHA</name>
<description>Clock Phase</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CSNAAT</name>
<description>Chip Select Not Active After Transfer (Ignored if CSAAT = 1)</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CSAAT</name>
<description>Chip Select Active After Transfer</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>BITS</name>
<description>Bits Per Transfer</description>
<bitOffset>4</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>8_BIT</name>
<description>8 bits for transfer</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>9_BIT</name>
<description>9 bits for transfer</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>10_BIT</name>
<description>10 bits for transfer</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>11_BIT</name>
<description>11 bits for transfer</description>
<value>0x3</value>
</enumeratedValue>
<enumeratedValue>
<name>12_BIT</name>
<description>12 bits for transfer</description>
<value>0x4</value>
</enumeratedValue>
<enumeratedValue>
<name>13_BIT</name>
<description>13 bits for transfer</description>
<value>0x5</value>
</enumeratedValue>
<enumeratedValue>
<name>14_BIT</name>
<description>14 bits for transfer</description>
<value>0x6</value>
</enumeratedValue>
<enumeratedValue>
<name>15_BIT</name>
<description>15 bits for transfer</description>
<value>0x7</value>
</enumeratedValue>
<enumeratedValue>
<name>16_BIT</name>
<description>16 bits for transfer</description>
<value>0x8</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SCBR</name>
<description>Serial Clock Baud Rate</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DLYBS</name>
<description>Delay Before SPCK</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DLYBCT</name>
<description>Delay Between Consecutive Transfers</description>
<bitOffset>24</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>WPMR</name>
<description>Write Protection Control Register</description>
<addressOffset>0x000000E4</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>WPEN</name>
<description>Write Protection Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>WPKEY</name>
<description>Write Protection Key Password</description>
<bitOffset>8</bitOffset>
<bitWidth>24</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>WPSR</name>
<description>Write Protection Status Register</description>
<addressOffset>0x000000E8</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>WPVS</name>
<description>Write Protection Violation Status</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>WPVSRC</name>
<description>Write Protection Violation Source</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>SSC1</name>
<version>6078L</version>
<description>Synchronous Serial Controller 1</description>
<groupName>SSC</groupName>
<prependToName>SSC1_</prependToName>
<baseAddress>0xF800C000</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x4000</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>SSC1</name>
<value>39</value>
</interrupt>
<registers>
<register>
<name>CR</name>
<description>Control Register</description>
<addressOffset>0x00000000</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>RXEN</name>
<description>Receive Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXDIS</name>
<description>Receive Disable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXEN</name>
<description>Transmit Enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXDIS</name>
<description>Transmit Disable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SWRST</name>
<description>Software Reset</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>CMR</name>
<description>Clock Mode Register</description>
<addressOffset>0x00000004</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DIV</name>
<description>Clock Divider</description>
<bitOffset>0</bitOffset>
<bitWidth>12</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>RCMR</name>
<description>Receive Clock Mode Register</description>
<addressOffset>0x00000010</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CKS</name>
<description>Receive Clock Selection</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>MCK</name>
<description>Divided Clock</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>TK</name>
<description>TK Clock signal</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>RK</name>
<description>RK pin</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CKO</name>
<description>Receive Clock Output Mode Selection</description>
<bitOffset>2</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>NONE</name>
<description>None, RK pin is an input</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>CONTINUOUS</name>
<description>Continuous Receive Clock, RK pin is an output</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>TRANSFER</name>
<description>Receive Clock only during data transfers, RK pin is an output</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CKI</name>
<description>Receive Clock Inversion</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CKG</name>
<description>Receive Clock Gating Selection</description>
<bitOffset>6</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CONTINUOUS</name>
<description>None</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>EN_RF_LOW</name>
<description>Receive Clock enabled only if RF Pin is Low</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>EN_RF_HIGH</name>
<description>Receive Clock enabled only if RF Pin is High</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>START</name>
<description>Receive Start Selection</description>
<bitOffset>8</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CONTINUOUS</name>
<description>Continuous, as soon as the receiver is enabled, and immediately after the end of transfer of the previous data.</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>TRANSMIT</name>
<description>Transmit start</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>RF_LOW</name>
<description>Detection of a low level on RF signal</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>RF_HIGH</name>
<description>Detection of a high level on RF signal</description>
<value>0x3</value>
</enumeratedValue>
<enumeratedValue>
<name>RF_FALLING</name>
<description>Detection of a falling edge on RF signal</description>
<value>0x4</value>
</enumeratedValue>
<enumeratedValue>
<name>RF_RISING</name>
<description>Detection of a rising edge on RF signal</description>
<value>0x5</value>
</enumeratedValue>
<enumeratedValue>
<name>RF_LEVEL</name>
<description>Detection of any level change on RF signal</description>
<value>0x6</value>
</enumeratedValue>
<enumeratedValue>
<name>RF_EDGE</name>
<description>Detection of any edge on RF signal</description>
<value>0x7</value>
</enumeratedValue>
<enumeratedValue>
<name>CMP_0</name>
<description>Compare 0</description>
<value>0x8</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>STOP</name>
<description>Receive Stop Selection</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>STTDLY</name>
<description>Receive Start Delay</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>PERIOD</name>
<description>Receive Period Divider Selection</description>
<bitOffset>24</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>RFMR</name>
<description>Receive Frame Mode Register</description>
<addressOffset>0x00000014</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DATLEN</name>
<description>Data Length</description>
<bitOffset>0</bitOffset>
<bitWidth>5</bitWidth>
<access>read-write</access>
</field>
<field>
<name>LOOP</name>
<description>Loop Mode</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>MSBF</name>
<description>Most Significant Bit First</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DATNB</name>
<description>Data Number per Frame</description>
<bitOffset>8</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>FSLEN</name>
<description>Receive Frame Sync Length</description>
<bitOffset>16</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>FSOS</name>
<description>Receive Frame Sync Output Selection</description>
<bitOffset>20</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>NONE</name>
<description>None, RF pin is an input</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>NEGATIVE</name>
<description>Negative Pulse, RF pin is an output</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>POSITIVE</name>
<description>Positive Pulse, RF pin is an output</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>LOW</name>
<description>Driven Low during data transfer, RF pin is an output</description>
<value>0x3</value>
</enumeratedValue>
<enumeratedValue>
<name>HIGH</name>
<description>Driven High during data transfer, RF pin is an output</description>
<value>0x4</value>
</enumeratedValue>
<enumeratedValue>
<name>TOGGLING</name>
<description>Toggling at each start of data transfer, RF pin is an output</description>
<value>0x5</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>FSEDGE</name>
<description>Frame Sync Edge Detection</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>POSITIVE</name>
<description>Positive Edge Detection</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>NEGATIVE</name>
<description>Negative Edge Detection</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>FSLEN_EXT</name>
<description>FSLEN Field Extension</description>
<bitOffset>28</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>TCMR</name>
<description>Transmit Clock Mode Register</description>
<addressOffset>0x00000018</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CKS</name>
<description>Transmit Clock Selection</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>MCK</name>
<description>Divided Clock</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>RK</name>
<description>RK Clock signal</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>TK</name>
<description>TK pin</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CKO</name>
<description>Transmit Clock Output Mode Selection</description>
<bitOffset>2</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>NONE</name>
<description>None, TK pin is an input</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>CONTINUOUS</name>
<description>Continuous Transmit Clock, TK pin is an output</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>TRANSFER</name>
<description>Transmit Clock only during data transfers, TK pin is an output</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CKI</name>
<description>Transmit Clock Inversion</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CKG</name>
<description>Transmit Clock Gating Selection</description>
<bitOffset>6</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CONTINUOUS</name>
<description>None</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>EN_TF_LOW</name>
<description>Transmit Clock enabled only if TF pin is Low</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>EN_TF_HIGH</name>
<description>Transmit Clock enabled only if TF pin is High</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>START</name>
<description>Transmit Start Selection</description>
<bitOffset>8</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CONTINUOUS</name>
<description>Continuous, as soon as a word is written in the SSC_THR Register (if Transmit is enabled), and immediately after the end of transfer of the previous data.</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>RECEIVE</name>
<description>Receive start</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>TF_LOW</name>
<description>Detection of a low level on TF signal</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>TF_HIGH</name>
<description>Detection of a high level on TF signal</description>
<value>0x3</value>
</enumeratedValue>
<enumeratedValue>
<name>TF_FALLING</name>
<description>Detection of a falling edge on TF signal</description>
<value>0x4</value>
</enumeratedValue>
<enumeratedValue>
<name>TF_RISING</name>
<description>Detection of a rising edge on TF signal</description>
<value>0x5</value>
</enumeratedValue>
<enumeratedValue>
<name>TF_LEVEL</name>
<description>Detection of any level change on TF signal</description>
<value>0x6</value>
</enumeratedValue>
<enumeratedValue>
<name>TF_EDGE</name>
<description>Detection of any edge on TF signal</description>
<value>0x7</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>STTDLY</name>
<description>Transmit Start Delay</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>PERIOD</name>
<description>Transmit Period Divider Selection</description>
<bitOffset>24</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>TFMR</name>
<description>Transmit Frame Mode Register</description>
<addressOffset>0x0000001C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DATLEN</name>
<description>Data Length</description>
<bitOffset>0</bitOffset>
<bitWidth>5</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DATDEF</name>
<description>Data Default Value</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>MSBF</name>
<description>Most Significant Bit First</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DATNB</name>
<description>Data Number per frame</description>
<bitOffset>8</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>FSLEN</name>
<description>Transmit Frame Sync Length</description>
<bitOffset>16</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>FSOS</name>
<description>Transmit Frame Sync Output Selection</description>
<bitOffset>20</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>NONE</name>
<description>None, TF pin is an input</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>NEGATIVE</name>
<description>Negative Pulse, TF pin is an output</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>POSITIVE</name>
<description>Positive Pulse,TF pin is an output</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>LOW</name>
<description>TF pin Driven Low during data transfer</description>
<value>0x3</value>
</enumeratedValue>
<enumeratedValue>
<name>HIGH</name>
<description>TF pin Driven High during data transfer</description>
<value>0x4</value>
</enumeratedValue>
<enumeratedValue>
<name>TOGGLING</name>
<description>TF pin Toggles at each start of data transfer</description>
<value>0x5</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>FSDEN</name>
<description>Frame Sync Data Enable</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>FSEDGE</name>
<description>Frame Sync Edge Detection</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>POSITIVE</name>
<description>Positive Edge Detection</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>NEGATIVE</name>
<description>Negative Edge Detection</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>FSLEN_EXT</name>
<description>FSLEN Field Extension</description>
<bitOffset>28</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>RHR</name>
<description>Receive Holding Register</description>
<addressOffset>0x00000020</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>RDAT</name>
<description>Receive Data</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>THR</name>
<description>Transmit Holding Register</description>
<addressOffset>0x00000024</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>TDAT</name>
<description>Transmit Data</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>RSHR</name>
<description>Receive Sync. Holding Register</description>
<addressOffset>0x00000030</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>RSDAT</name>
<description>Receive Synchronization Data</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>TSHR</name>
<description>Transmit Sync. Holding Register</description>
<addressOffset>0x00000034</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>TSDAT</name>
<description>Transmit Synchronization Data</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>RC0R</name>
<description>Receive Compare 0 Register</description>
<addressOffset>0x00000038</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CP0</name>
<description>Receive Compare Data 0</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>RC1R</name>
<description>Receive Compare 1 Register</description>
<addressOffset>0x0000003C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CP1</name>
<description>Receive Compare Data 1</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>SR</name>
<description>Status Register</description>
<addressOffset>0x00000040</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x000000CC</resetValue>
<fields>
<field>
<name>TXRDY</name>
<description>Transmit Ready</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXEMPTY</name>
<description>Transmit Empty</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXRDY</name>
<description>Receive Ready</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>OVRUN</name>
<description>Receive Overrun</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CP0</name>
<description>Compare 0</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CP1</name>
<description>Compare 1</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXSYN</name>
<description>Transmit Sync</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXSYN</name>
<description>Receive Sync</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXEN</name>
<description>Transmit Enable</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXEN</name>
<description>Receive Enable</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>IER</name>
<description>Interrupt Enable Register</description>
<addressOffset>0x00000044</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>TXRDY</name>
<description>Transmit Ready Interrupt Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXEMPTY</name>
<description>Transmit Empty Interrupt Enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY</name>
<description>Receive Ready Interrupt Enable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>OVRUN</name>
<description>Receive Overrun Interrupt Enable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CP0</name>
<description>Compare 0 Interrupt Enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CP1</name>
<description>Compare 1 Interrupt Enable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXSYN</name>
<description>Tx Sync Interrupt Enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXSYN</name>
<description>Rx Sync Interrupt Enable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IDR</name>
<description>Interrupt Disable Register</description>
<addressOffset>0x00000048</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>TXRDY</name>
<description>Transmit Ready Interrupt Disable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXEMPTY</name>
<description>Transmit Empty Interrupt Disable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY</name>
<description>Receive Ready Interrupt Disable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>OVRUN</name>
<description>Receive Overrun Interrupt Disable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CP0</name>
<description>Compare 0 Interrupt Disable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CP1</name>
<description>Compare 1 Interrupt Disable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXSYN</name>
<description>Tx Sync Interrupt Enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXSYN</name>
<description>Rx Sync Interrupt Enable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IMR</name>
<description>Interrupt Mask Register</description>
<addressOffset>0x0000004C</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>TXRDY</name>
<description>Transmit Ready Interrupt Mask</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXEMPTY</name>
<description>Transmit Empty Interrupt Mask</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXRDY</name>
<description>Receive Ready Interrupt Mask</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>OVRUN</name>
<description>Receive Overrun Interrupt Mask</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CP0</name>
<description>Compare 0 Interrupt Mask</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CP1</name>
<description>Compare 1 Interrupt Mask</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXSYN</name>
<description>Tx Sync Interrupt Mask</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXSYN</name>
<description>Rx Sync Interrupt Mask</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>WPMR</name>
<description>Write Protect Mode Register</description>
<addressOffset>0x000000E4</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>WPEN</name>
<description>Write Protect Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>WPKEY</name>
<description>Write Protect KEY</description>
<bitOffset>8</bitOffset>
<bitWidth>24</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>WPSR</name>
<description>Write Protect Status Register</description>
<addressOffset>0x000000E8</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
</register>
</registers>
</peripheral>
<peripheral>
<name>ADC</name>
<version>6489M</version>
<description>Analog-to-Digital Converter</description>
<prependToName>ADC_</prependToName>
<baseAddress>0xF8018000</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x4000</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>ADC</name>
<value>29</value>
</interrupt>
<registers>
<register>
<name>CR</name>
<description>Control Register</description>
<addressOffset>0x00000000</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>SWRST</name>
<description>Software Reset</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>START</name>
<description>Start Conversion</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TSCALIB</name>
<description>Touchscreen Calibration</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>AUTOCAL</name>
<description>Automatic Calibration of ADC</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>MR</name>
<description>Mode Register</description>
<addressOffset>0x00000004</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>TRGSEL</name>
<description>Trigger Selection</description>
<bitOffset>1</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>ADC_TRIG0</name>
<description>ADTRG</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ADC_TRIG1</name>
<description>TIOA0</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>ADC_TRIG2</name>
<description>TIOA1</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>ADC_TRIG3</name>
<description>TIOA2</description>
<value>0x3</value>
</enumeratedValue>
<enumeratedValue>
<name>ADC_TRIG4</name>
<description>PWM event line 0</description>
<value>0x4</value>
</enumeratedValue>
<enumeratedValue>
<name>ADC_TRIG5</name>
<description>PWM_even line 1</description>
<value>0x5</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SLEEP</name>
<description>Sleep Mode</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>NORMAL</name>
<description>Normal Mode: The ADC Core and reference voltage circuitry are kept ON between conversions</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>SLEEP</name>
<description>Sleep Mode: The wake-up time can be modified by programming FWUP bit</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>FWUP</name>
<description>Fast Wake Up</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>OFF</name>
<description>If SLEEP is 1 then both ADC Core and reference voltage circuitry are OFF between conversions</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ON</name>
<description>If SLEEP is 1 then Fast Wake-up Sleep Mode: The Voltage reference is ON between conversions and ADC Core is OFF</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PRESCAL</name>
<description>Prescaler Rate Selection</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>STARTUP</name>
<description>Start Up Time</description>
<bitOffset>16</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>SUT0</name>
<description>0 periods of ADCClock</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>SUT8</name>
<description>8 periods of ADCClock</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>SUT16</name>
<description>16 periods of ADCClock</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>SUT24</name>
<description>24 periods of ADCClock</description>
<value>0x3</value>
</enumeratedValue>
<enumeratedValue>
<name>SUT64</name>
<description>64 periods of ADCClock</description>
<value>0x4</value>
</enumeratedValue>
<enumeratedValue>
<name>SUT80</name>
<description>80 periods of ADCClock</description>
<value>0x5</value>
</enumeratedValue>
<enumeratedValue>
<name>SUT96</name>
<description>96 periods of ADCClock</description>
<value>0x6</value>
</enumeratedValue>
<enumeratedValue>
<name>SUT112</name>
<description>112 periods of ADCClock</description>
<value>0x7</value>
</enumeratedValue>
<enumeratedValue>
<name>SUT512</name>
<description>512 periods of ADCClock</description>
<value>0x8</value>
</enumeratedValue>
<enumeratedValue>
<name>SUT576</name>
<description>576 periods of ADCClock</description>
<value>0x9</value>
</enumeratedValue>
<enumeratedValue>
<name>SUT640</name>
<description>640 periods of ADCClock</description>
<value>0xA</value>
</enumeratedValue>
<enumeratedValue>
<name>SUT704</name>
<description>704 periods of ADCClock</description>
<value>0xB</value>
</enumeratedValue>
<enumeratedValue>
<name>SUT768</name>
<description>768 periods of ADCClock</description>
<value>0xC</value>
</enumeratedValue>
<enumeratedValue>
<name>SUT832</name>
<description>832 periods of ADCClock</description>
<value>0xD</value>
</enumeratedValue>
<enumeratedValue>
<name>SUT896</name>
<description>896 periods of ADCClock</description>
<value>0xE</value>
</enumeratedValue>
<enumeratedValue>
<name>SUT960</name>
<description>960 periods of ADCClock</description>
<value>0xF</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SETTLING</name>
<description>Analog Settling Time</description>
<bitOffset>20</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>AST3</name>
<description>3 periods of ADCClock</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>AST5</name>
<description>5 periods of ADCClock</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>AST9</name>
<description>9 periods of ADCClock</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>AST17</name>
<description>17 periods of ADCClock</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>ANACH</name>
<description>Analog Change</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>NONE</name>
<description>No analog change on channel switching: DIFF0, GAIN0 and OFF0 are used for all channels</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ALLOWED</name>
<description>Allows different analog settings for each channel. See ADC_CGR and ADC_COR Registers</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>TRACKTIM</name>
<description>Tracking Time</description>
<bitOffset>24</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>USEQ</name>
<description>Use Sequence Enable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>NUM_ORDER</name>
<description>Normal Mode: The controller converts channels in a simple numeric order depending only on the channel index.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>REG_ORDER</name>
<description>User Sequence Mode: The sequence respects what is defined in ADC_SEQR1 and ADC_SEQR2 registers and can be used to convert several times the same channel.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>SEQR1</name>
<description>Channel Sequence Register 1</description>
<addressOffset>0x00000008</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>USCH1</name>
<description>User Sequence Number 1</description>
<bitOffset>0</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>USCH2</name>
<description>User Sequence Number 2</description>
<bitOffset>4</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>USCH3</name>
<description>User Sequence Number 3</description>
<bitOffset>8</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>USCH4</name>
<description>User Sequence Number 4</description>
<bitOffset>12</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>USCH5</name>
<description>User Sequence Number 5</description>
<bitOffset>16</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>USCH6</name>
<description>User Sequence Number 6</description>
<bitOffset>20</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>USCH7</name>
<description>User Sequence Number 7</description>
<bitOffset>24</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>USCH8</name>
<description>User Sequence Number 8</description>
<bitOffset>28</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>SEQR2</name>
<description>Channel Sequence Register 2</description>
<addressOffset>0x0000000C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>USCH9</name>
<description>User Sequence Number 9</description>
<bitOffset>0</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>USCH10</name>
<description>User Sequence Number 10</description>
<bitOffset>4</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>USCH11</name>
<description>User Sequence Number 11</description>
<bitOffset>8</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>CHER</name>
<description>Channel Enable Register</description>
<addressOffset>0x00000010</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>CH0</name>
<description>Channel 0 Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CH1</name>
<description>Channel 1 Enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CH2</name>
<description>Channel 2 Enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CH3</name>
<description>Channel 3 Enable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CH4</name>
<description>Channel 4 Enable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CH5</name>
<description>Channel 5 Enable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CH6</name>
<description>Channel 6 Enable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CH7</name>
<description>Channel 7 Enable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CH8</name>
<description>Channel 8 Enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CH9</name>
<description>Channel 9 Enable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CH10</name>
<description>Channel 10 Enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CH11</name>
<description>Channel 11 Enable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>CHDR</name>
<description>Channel Disable Register</description>
<addressOffset>0x00000014</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>CH0</name>
<description>Channel 0 Disable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CH1</name>
<description>Channel 1 Disable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CH2</name>
<description>Channel 2 Disable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CH3</name>
<description>Channel 3 Disable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CH4</name>
<description>Channel 4 Disable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CH5</name>
<description>Channel 5 Disable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CH6</name>
<description>Channel 6 Disable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CH7</name>
<description>Channel 7 Disable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CH8</name>
<description>Channel 8 Disable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CH9</name>
<description>Channel 9 Disable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CH10</name>
<description>Channel 10 Disable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CH11</name>
<description>Channel 11 Disable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>CHSR</name>
<description>Channel Status Register</description>
<addressOffset>0x00000018</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CH0</name>
<description>Channel 0 Status</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CH1</name>
<description>Channel 1 Status</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CH2</name>
<description>Channel 2 Status</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CH3</name>
<description>Channel 3 Status</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CH4</name>
<description>Channel 4 Status</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CH5</name>
<description>Channel 5 Status</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CH6</name>
<description>Channel 6 Status</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CH7</name>
<description>Channel 7 Status</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CH8</name>
<description>Channel 8 Status</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CH9</name>
<description>Channel 9 Status</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CH10</name>
<description>Channel 10 Status</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CH11</name>
<description>Channel 11 Status</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>LCDR</name>
<description>Last Converted Data Register</description>
<addressOffset>0x00000020</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>LDATA</name>
<description>Last Data Converted</description>
<bitOffset>0</bitOffset>
<bitWidth>12</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CHNB</name>
<description>Channel Number</description>
<bitOffset>12</bitOffset>
<bitWidth>4</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>IER</name>
<description>Interrupt Enable Register</description>
<addressOffset>0x00000024</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>EOC0</name>
<description>End of Conversion Interrupt Enable 0</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>EOC1</name>
<description>End of Conversion Interrupt Enable 1</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>EOC2</name>
<description>End of Conversion Interrupt Enable 2</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>EOC3</name>
<description>End of Conversion Interrupt Enable 3</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>EOC4</name>
<description>End of Conversion Interrupt Enable 4</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>EOC5</name>
<description>End of Conversion Interrupt Enable 5</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>EOC6</name>
<description>End of Conversion Interrupt Enable 6</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>EOC7</name>
<description>End of Conversion Interrupt Enable 7</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>EOC8</name>
<description>End of Conversion Interrupt Enable 8</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>EOC9</name>
<description>End of Conversion Interrupt Enable 9</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>EOC10</name>
<description>End of Conversion Interrupt Enable 10</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>EOC11</name>
<description>End of Conversion Interrupt Enable 11</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>XRDY</name>
<description>Touchscreen Measure XPOS Ready Interrupt Enable</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>YRDY</name>
<description>Touchscreen Measure YPOS Ready Interrupt Enable</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PRDY</name>
<description>Touchscreen Measure Pressure Ready Interrupt Enable</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>EOCAL</name>
<description>End of Calibration Sequence</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DRDY</name>
<description>Data Ready Interrupt Enable</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>GOVRE</name>
<description>General Overrun Error Interrupt Enable</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>COMPE</name>
<description>Comparison Event Interrupt Enable</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PEN</name>
<description>Pen Contact Interrupt Enable</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NOPEN</name>
<description>No Pen Contact Interrupt Enable</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IDR</name>
<description>Interrupt Disable Register</description>
<addressOffset>0x00000028</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>EOC0</name>
<description>End of Conversion Interrupt Disable 0</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>EOC1</name>
<description>End of Conversion Interrupt Disable 1</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>EOC2</name>
<description>End of Conversion Interrupt Disable 2</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>EOC3</name>
<description>End of Conversion Interrupt Disable 3</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>EOC4</name>
<description>End of Conversion Interrupt Disable 4</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>EOC5</name>
<description>End of Conversion Interrupt Disable 5</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>EOC6</name>
<description>End of Conversion Interrupt Disable 6</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>EOC7</name>
<description>End of Conversion Interrupt Disable 7</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>EOC8</name>
<description>End of Conversion Interrupt Disable 8</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>EOC9</name>
<description>End of Conversion Interrupt Disable 9</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>EOC10</name>
<description>End of Conversion Interrupt Disable 10</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>EOC11</name>
<description>End of Conversion Interrupt Disable 11</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>XRDY</name>
<description>Touchscreen Measure XPOS Ready Interrupt Disable</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>YRDY</name>
<description>Touchscreen Measure YPOS Ready Interrupt Disable</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PRDY</name>
<description>Touchscreen Measure Pressure Ready Interrupt Disable</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>EOCAL</name>
<description>End of Calibration Sequence</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DRDY</name>
<description>Data Ready Interrupt Disable</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>GOVRE</name>
<description>General Overrun Error Interrupt Disable</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>COMPE</name>
<description>Comparison Event Interrupt Disable</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PEN</name>
<description>Pen Contact Interrupt Disable</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NOPEN</name>
<description>No Pen Contact Interrupt Disable</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IMR</name>
<description>Interrupt Mask Register</description>
<addressOffset>0x0000002C</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>EOC0</name>
<description>End of Conversion Interrupt Mask 0</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>EOC1</name>
<description>End of Conversion Interrupt Mask 1</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>EOC2</name>
<description>End of Conversion Interrupt Mask 2</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>EOC3</name>
<description>End of Conversion Interrupt Mask 3</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>EOC4</name>
<description>End of Conversion Interrupt Mask 4</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>EOC5</name>
<description>End of Conversion Interrupt Mask 5</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>EOC6</name>
<description>End of Conversion Interrupt Mask 6</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>EOC7</name>
<description>End of Conversion Interrupt Mask 7</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>EOC8</name>
<description>End of Conversion Interrupt Mask 8</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>EOC9</name>
<description>End of Conversion Interrupt Mask 9</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>EOC10</name>
<description>End of Conversion Interrupt Mask 10</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>EOC11</name>
<description>End of Conversion Interrupt Mask 11</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>XRDY</name>
<description>Touchscreen Measure XPOS Ready Interrupt Mask</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>YRDY</name>
<description>Touchscreen Measure YPOS Ready Interrupt Mask</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PRDY</name>
<description>Touchscreen Measure Pressure Ready Interrupt Mask</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>EOCAL</name>
<description>End of Calibration Sequence</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DRDY</name>
<description>Data Ready Interrupt Mask</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>GOVRE</name>
<description>General Overrun Error Interrupt Mask</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>COMPE</name>
<description>Comparison Event Interrupt Mask</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PEN</name>
<description>Pen Contact Interrupt Mask</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NOPEN</name>
<description>No Pen Contact Interrupt Mask</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>ISR</name>
<description>Interrupt Status Register</description>
<addressOffset>0x00000030</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>EOC0</name>
<description>End of Conversion 0</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>EOC1</name>
<description>End of Conversion 1</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>EOC2</name>
<description>End of Conversion 2</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>EOC3</name>
<description>End of Conversion 3</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>EOC4</name>
<description>End of Conversion 4</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>EOC5</name>
<description>End of Conversion 5</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>EOC6</name>
<description>End of Conversion 6</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>EOC7</name>
<description>End of Conversion 7</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>EOC8</name>
<description>End of Conversion 8</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>EOC9</name>
<description>End of Conversion 9</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>EOC10</name>
<description>End of Conversion 10</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>EOC11</name>
<description>End of Conversion 11</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>XRDY</name>
<description>Touchscreen XPOS Measure Ready</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>YRDY</name>
<description>Touchscreen YPOS Measure Ready</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PRDY</name>
<description>Touchscreen Pressure Measure Ready</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>EOCAL</name>
<description>End of Calibration Sequence</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DRDY</name>
<description>Data Ready</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>GOVRE</name>
<description>General Overrun Error</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>COMPE</name>
<description>Comparison Error</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PEN</name>
<description>Pen contact</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NOPEN</name>
<description>No Pen contact</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PENS</name>
<description>Pen detect Status</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>OVER</name>
<description>Overrun Status Register</description>
<addressOffset>0x0000003C</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>OVRE0</name>
<description>Overrun Error 0</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>OVRE1</name>
<description>Overrun Error 1</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>OVRE2</name>
<description>Overrun Error 2</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>OVRE3</name>
<description>Overrun Error 3</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>OVRE4</name>
<description>Overrun Error 4</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>OVRE5</name>
<description>Overrun Error 5</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>OVRE6</name>
<description>Overrun Error 6</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>OVRE7</name>
<description>Overrun Error 7</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>OVRE8</name>
<description>Overrun Error 8</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>OVRE9</name>
<description>Overrun Error 9</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>OVRE10</name>
<description>Overrun Error 10</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>OVRE11</name>
<description>Overrun Error 11</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>EMR</name>
<description>Extended Mode Register</description>
<addressOffset>0x00000040</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CMPMODE</name>
<description>Comparison Mode</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LOW</name>
<description>Generates an event when the converted data is lower than the low threshold of the window.</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>HIGH</name>
<description>Generates an event when the converted data is higher than the high threshold of the window.</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>IN</name>
<description>Generates an event when the converted data is in the comparison window.</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>OUT</name>
<description>Generates an event when the converted data is out of the comparison window.</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CMPSEL</name>
<description>Comparison Selected Channel</description>
<bitOffset>4</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CMPALL</name>
<description>Compare All Channels</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CMPFILTER</name>
<description>Compare Event Filtering</description>
<bitOffset>12</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>TAG</name>
<description>TAG of the ADC_LDCR register</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>CWR</name>
<description>Compare Window Register</description>
<addressOffset>0x00000044</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>LOWTHRES</name>
<description>Low Threshold</description>
<bitOffset>0</bitOffset>
<bitWidth>12</bitWidth>
<access>read-write</access>
</field>
<field>
<name>HIGHTHRES</name>
<description>High Threshold</description>
<bitOffset>16</bitOffset>
<bitWidth>12</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>CGR</name>
<description>Channel Gain Register</description>
<addressOffset>0x00000048</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>GAIN0</name>
<description>Gain for channel 0</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>GAIN1</name>
<description>Gain for channel 1</description>
<bitOffset>2</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>GAIN2</name>
<description>Gain for channel 2</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>GAIN3</name>
<description>Gain for channel 3</description>
<bitOffset>6</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>GAIN4</name>
<description>Gain for channel 4</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>GAIN5</name>
<description>Gain for channel 5</description>
<bitOffset>10</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>GAIN6</name>
<description>Gain for channel 6</description>
<bitOffset>12</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>GAIN7</name>
<description>Gain for channel 7</description>
<bitOffset>14</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>GAIN8</name>
<description>Gain for channel 8</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>GAIN9</name>
<description>Gain for channel 9</description>
<bitOffset>18</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>GAIN10</name>
<description>Gain for channel 10</description>
<bitOffset>20</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>GAIN11</name>
<description>Gain for channel 11</description>
<bitOffset>22</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>COR</name>
<description>Channel Offset Register</description>
<addressOffset>0x0000004C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>OFF0</name>
<description>Offset for channel 0</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>OFF1</name>
<description>Offset for channel 1</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>OFF2</name>
<description>Offset for channel 2</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>OFF3</name>
<description>Offset for channel 3</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>OFF4</name>
<description>Offset for channel 4</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>OFF5</name>
<description>Offset for channel 5</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>OFF6</name>
<description>Offset for channel 6</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>OFF7</name>
<description>Offset for channel 7</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>OFF8</name>
<description>Offset for channel 8</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>OFF9</name>
<description>Offset for channel 9</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>OFF10</name>
<description>Offset for channel 10</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>OFF11</name>
<description>Offset for channel 11</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DIFF0</name>
<description>Differential inputs for channel 0</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DIFF1</name>
<description>Differential inputs for channel 1</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DIFF2</name>
<description>Differential inputs for channel 2</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DIFF3</name>
<description>Differential inputs for channel 3</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DIFF4</name>
<description>Differential inputs for channel 4</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DIFF5</name>
<description>Differential inputs for channel 5</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DIFF6</name>
<description>Differential inputs for channel 6</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DIFF7</name>
<description>Differential inputs for channel 7</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DIFF8</name>
<description>Differential inputs for channel 8</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DIFF9</name>
<description>Differential inputs for channel 9</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DIFF10</name>
<description>Differential inputs for channel 10</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DIFF11</name>
<description>Differential inputs for channel 11</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<dim>12</dim>
<dimIncrement>4</dimIncrement>
<dimIndex>0-11</dimIndex>
<name>CDR[%s]</name>
<description>Channel Data Register</description>
<addressOffset>0x00000050</addressOffset>
<size>32</size>
<access>read-only</access>
<fields>
<field>
<name>DATA</name>
<description>Converted Data</description>
<bitOffset>0</bitOffset>
<bitWidth>12</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>ACR</name>
<description>Analog Control Register</description>
<addressOffset>0x00000094</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000100</resetValue>
<fields>
<field>
<name>PENDETSENS</name>
<description>Pen Detection Sensitivity</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>TSMR</name>
<description>Touchscreen Mode Register</description>
<addressOffset>0x000000B0</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>TSMODE</name>
<description>Touchscreen Mode</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>NONE</name>
<description>No Touchscreen</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>4_WIRE_NO_PM</name>
<description>4-wire Touchscreen without pressure measurement</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>4_WIRE</name>
<description>4-wire Touchscreen with pressure measurement</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>5_WIRE</name>
<description>5-wire Touchscreen</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>TSAV</name>
<description>Touchscreen Average</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>NO_FILTER</name>
<description>No Filtering. Only one ADC conversion per measure</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>AVG2CONV</name>
<description>Averages 2 ADC conversions</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>AVG4CONV</name>
<description>Averages 4 ADC conversions</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>AVG8CONV</name>
<description>Averages 8 ADC conversions</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>TSFREQ</name>
<description>Touchscreen Frequency</description>
<bitOffset>8</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>TSSCTIM</name>
<description>Touchscreen Switches Closure Time</description>
<bitOffset>16</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>NOTSDMA</name>
<description>No TouchScreen DMA</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>PENDET</name>
<description>Pen Contact Detection Enable</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>PENDBC</name>
<description>Pen Detect Debouncing Period</description>
<bitOffset>28</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>XPOSR</name>
<description>Touchscreen X Position Register</description>
<addressOffset>0x000000B4</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>XPOS</name>
<description>X Position</description>
<bitOffset>0</bitOffset>
<bitWidth>12</bitWidth>
<access>read-only</access>
</field>
<field>
<name>XSCALE</name>
<description>Scale of XPOS</description>
<bitOffset>16</bitOffset>
<bitWidth>12</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>YPOSR</name>
<description>Touchscreen Y Position Register</description>
<addressOffset>0x000000B8</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>YPOS</name>
<description>Y Position</description>
<bitOffset>0</bitOffset>
<bitWidth>12</bitWidth>
<access>read-only</access>
</field>
<field>
<name>YSCALE</name>
<description>Scale of YPOS</description>
<bitOffset>16</bitOffset>
<bitWidth>12</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>PRESSR</name>
<description>Touchscreen Pressure Register</description>
<addressOffset>0x000000BC</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>Z1</name>
<description>Data of Z1 Measurement</description>
<bitOffset>0</bitOffset>
<bitWidth>12</bitWidth>
<access>read-only</access>
</field>
<field>
<name>Z2</name>
<description>Data of Z2 Measurement</description>
<bitOffset>16</bitOffset>
<bitWidth>12</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>TRGR</name>
<description>Trigger Register</description>
<addressOffset>0x000000C0</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>TRGMOD</name>
<description>Trigger Mode</description>
<bitOffset>0</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>NO_TRIGGER</name>
<description>No trigger, only software trigger can start conversions</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>EXT_TRIG_RISE</name>
<description>External Trigger Rising Edge</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>EXT_TRIG_FALL</name>
<description>External Trigger Falling Edge</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>EXT_TRIG_ANY</name>
<description>External Trigger Any Edge</description>
<value>0x3</value>
</enumeratedValue>
<enumeratedValue>
<name>PEN_TRIG</name>
<description>Pen Detect Trigger (shall be selected only if PENDET is set and TSAMOD = Touchscreen only mode)</description>
<value>0x4</value>
</enumeratedValue>
<enumeratedValue>
<name>PERIOD_TRIG</name>
<description>Periodic Trigger (TRGPER shall be initiated appropriately)</description>
<value>0x5</value>
</enumeratedValue>
<enumeratedValue>
<name>CONTINUOUS</name>
<description>Continuous Mode</description>
<value>0x6</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>TRGPER</name>
<description>Trigger Period</description>
<bitOffset>16</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>WPMR</name>
<description>Write Protect Mode Register</description>
<addressOffset>0x000000E4</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>WPEN</name>
<description>Write Protect Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>WPKEY</name>
<description>Write Protect KEY</description>
<bitOffset>8</bitOffset>
<bitWidth>24</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>WPSR</name>
<description>Write Protect Status Register</description>
<addressOffset>0x000000E8</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>WPVS</name>
<description>Write Protect Violation Status</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>WPVSRC</name>
<description>Write Protect Violation Source</description>
<bitOffset>8</bitOffset>
<bitWidth>16</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>TWI2</name>
<version>6212N</version>
<description>Two-wire Interface 2</description>
<groupName>TWI</groupName>
<prependToName>TWI2_</prependToName>
<baseAddress>0xF801C000</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x4000</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>TWI2</name>
<value>20</value>
</interrupt>
<registers>
<register>
<name>CR</name>
<description>Control Register</description>
<addressOffset>0x00000000</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>START</name>
<description>Send a START Condition</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>STOP</name>
<description>Send a STOP Condition</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>MSEN</name>
<description>TWI Master Mode Enabled</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>MSDIS</name>
<description>TWI Master Mode Disabled</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SVEN</name>
<description>TWI Slave Mode Enabled</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SVDIS</name>
<description>TWI Slave Mode Disabled</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>QUICK</name>
<description>SMBUS Quick Command</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SWRST</name>
<description>Software Reset</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>MMR</name>
<description>Master Mode Register</description>
<addressOffset>0x00000004</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>IADRSZ</name>
<description>Internal Device Address Size</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>NONE</name>
<description>No internal device address</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>1_BYTE</name>
<description>One-byte internal device address</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>2_BYTE</name>
<description>Two-byte internal device address</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>3_BYTE</name>
<description>Three-byte internal device address</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>MREAD</name>
<description>Master Read Direction</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DADR</name>
<description>Device Address</description>
<bitOffset>16</bitOffset>
<bitWidth>7</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>SMR</name>
<description>Slave Mode Register</description>
<addressOffset>0x00000008</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SADR</name>
<description>Slave Address</description>
<bitOffset>16</bitOffset>
<bitWidth>7</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>IADR</name>
<description>Internal Address Register</description>
<addressOffset>0x0000000C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>IADR</name>
<description>Internal Address</description>
<bitOffset>0</bitOffset>
<bitWidth>24</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>CWGR</name>
<description>Clock Waveform Generator Register</description>
<addressOffset>0x00000010</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CLDIV</name>
<description>Clock Low Divider</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CHDIV</name>
<description>Clock High Divider</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CKDIV</name>
<description>Clock Divider</description>
<bitOffset>16</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>SR</name>
<description>Status Register</description>
<addressOffset>0x00000020</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x0000F009</resetValue>
<fields>
<field>
<name>TXCOMP</name>
<description>Transmission Completed (automatically set / reset)</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXRDY</name>
<description>Receive Holding Register Ready (automatically set / reset)</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY</name>
<description>Transmit Holding Register Ready (automatically set / reset)</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SVREAD</name>
<description>Slave Read (automatically set / reset)</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SVACC</name>
<description>Slave Access (automatically set / reset)</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>GACC</name>
<description>General Call Access (clear on read)</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>OVRE</name>
<description>Overrun Error (clear on read)</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NACK</name>
<description>Not Acknowledged (clear on read)</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ARBLST</name>
<description>Arbitration Lost (clear on read)</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SCLWS</name>
<description>Clock Wait State (automatically set / reset)</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>EOSACC</name>
<description>End Of Slave Access (clear on read)</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>IER</name>
<description>Interrupt Enable Register</description>
<addressOffset>0x00000024</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>TXCOMP</name>
<description>Transmission Completed Interrupt Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY</name>
<description>Receive Holding Register Ready Interrupt Enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY</name>
<description>Transmit Holding Register Ready Interrupt Enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SVACC</name>
<description>Slave Access Interrupt Enable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>GACC</name>
<description>General Call Access Interrupt Enable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>OVRE</name>
<description>Overrun Error Interrupt Enable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NACK</name>
<description>Not Acknowledge Interrupt Enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ARBLST</name>
<description>Arbitration Lost Interrupt Enable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SCL_WS</name>
<description>Clock Wait State Interrupt Enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>EOSACC</name>
<description>End Of Slave Access Interrupt Enable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IDR</name>
<description>Interrupt Disable Register</description>
<addressOffset>0x00000028</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>TXCOMP</name>
<description>Transmission Completed Interrupt Disable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY</name>
<description>Receive Holding Register Ready Interrupt Disable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY</name>
<description>Transmit Holding Register Ready Interrupt Disable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SVACC</name>
<description>Slave Access Interrupt Disable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>GACC</name>
<description>General Call Access Interrupt Disable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>OVRE</name>
<description>Overrun Error Interrupt Disable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NACK</name>
<description>Not Acknowledge Interrupt Disable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ARBLST</name>
<description>Arbitration Lost Interrupt Disable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SCL_WS</name>
<description>Clock Wait State Interrupt Disable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>EOSACC</name>
<description>End Of Slave Access Interrupt Disable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IMR</name>
<description>Interrupt Mask Register</description>
<addressOffset>0x0000002C</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>TXCOMP</name>
<description>Transmission Completed Interrupt Mask</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXRDY</name>
<description>Receive Holding Register Ready Interrupt Mask</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY</name>
<description>Transmit Holding Register Ready Interrupt Mask</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SVACC</name>
<description>Slave Access Interrupt Mask</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>GACC</name>
<description>General Call Access Interrupt Mask</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>OVRE</name>
<description>Overrun Error Interrupt Mask</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NACK</name>
<description>Not Acknowledge Interrupt Mask</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ARBLST</name>
<description>Arbitration Lost Interrupt Mask</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SCL_WS</name>
<description>Clock Wait State Interrupt Mask</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>EOSACC</name>
<description>End Of Slave Access Interrupt Mask</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>RHR</name>
<description>Receive Holding Register</description>
<addressOffset>0x00000030</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>RXDATA</name>
<description>Master or Slave Receive Holding Data</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>THR</name>
<description>Transmit Holding Register</description>
<addressOffset>0x00000034</addressOffset>
<size>32</size>
<access>write-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>TXDATA</name>
<description>Master or Slave Transmit Holding Data</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>WPROT_MODE</name>
<description>Protection Mode Register</description>
<addressOffset>0x000000E4</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>WPROT</name>
<description>Write protection bit</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SECURITY_CODE</name>
<description>Write protection mode security code</description>
<bitOffset>8</bitOffset>
<bitWidth>24</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>WPROT_STATUS</name>
<description>Protection Status Register</description>
<addressOffset>0x000000E8</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>WPROTERR</name>
<description>Write Protection Error</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>WPROTADDR</name>
<description>Write Protection Error Address</description>
<bitOffset>8</bitOffset>
<bitWidth>24</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>USART2</name>
<version>6089Z</version>
<description>Universal Synchronous Asynchronous Receiver Transmitter 2</description>
<groupName>USART</groupName>
<prependToName>USART2_</prependToName>
<baseAddress>0xF8020000</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x4000</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>USART2</name>
<value>14</value>
</interrupt>
<registers>
<register>
<name>CR</name>
<description>Control Register</description>
<addressOffset>0x00000000</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>RSTRX</name>
<description>Reset Receiver</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RSTTX</name>
<description>Reset Transmitter</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXEN</name>
<description>Receiver Enable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXDIS</name>
<description>Receiver Disable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXEN</name>
<description>Transmitter Enable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXDIS</name>
<description>Transmitter Disable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RSTSTA</name>
<description>Reset Status Bits</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>STTBRK</name>
<description>Start Break</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>STPBRK</name>
<description>Stop Break</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>STTTO</name>
<description>Start Time-out</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SENDA</name>
<description>Send Address</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RSTIT</name>
<description>Reset Iterations</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RSTNACK</name>
<description>Reset Non Acknowledge</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RETTO</name>
<description>Rearm Time-out</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RTSEN</name>
<description>Request to Send Enable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RTSDIS</name>
<description>Request to Send Disable</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>CR_SPI_MODE</name>
<description>Control Register</description>
<alternateGroup>SPI_MODE</alternateGroup>
<addressOffset>0x00000000</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>RSTRX</name>
<description>Reset Receiver</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RSTTX</name>
<description>Reset Transmitter</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXEN</name>
<description>Receiver Enable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXDIS</name>
<description>Receiver Disable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXEN</name>
<description>Transmitter Enable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXDIS</name>
<description>Transmitter Disable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RSTSTA</name>
<description>Reset Status Bits</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>FCS</name>
<description>Force SPI Chip Select</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RCS</name>
<description>Release SPI Chip Select</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>MR</name>
<description>Mode Register</description>
<addressOffset>0x00000004</addressOffset>
<size>32</size>
<access>read-write</access>
<fields>
<field>
<name>USART_MODE</name>
<description>USART Mode of Operation</description>
<bitOffset>0</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>NORMAL</name>
<description>Normal mode</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>RS485</name>
<description>RS485</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>HW_HANDSHAKING</name>
<description>Hardware Handshaking</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>IS07816_T_0</name>
<description>IS07816 Protocol: T = 0</description>
<value>0x4</value>
</enumeratedValue>
<enumeratedValue>
<name>IS07816_T_1</name>
<description>IS07816 Protocol: T = 1</description>
<value>0x6</value>
</enumeratedValue>
<enumeratedValue>
<name>IRDA</name>
<description>IrDA</description>
<value>0x8</value>
</enumeratedValue>
<enumeratedValue>
<name>SPI_MASTER</name>
<description>SPI Master</description>
<value>0xE</value>
</enumeratedValue>
<enumeratedValue>
<name>SPI_SLAVE</name>
<description>SPI Slave</description>
<value>0xF</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>USCLKS</name>
<description>Clock Selection</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>MCK</name>
<description>Master Clock MCK is selected</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>DIV</name>
<description>Internal Clock Divided MCK/DIV (DIV=(DIV=8)) is selected</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>SCK</name>
<description>Serial Clock SLK is selected</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CHRL</name>
<description>Character Length.</description>
<bitOffset>6</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>5_BIT</name>
<description>Character length is 5 bits</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>6_BIT</name>
<description>Character length is 6 bits</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>7_BIT</name>
<description>Character length is 7 bits</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>8_BIT</name>
<description>Character length is 8 bits</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SYNC</name>
<description>Synchronous Mode Select</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>PAR</name>
<description>Parity Type</description>
<bitOffset>9</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>EVEN</name>
<description>Even parity</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ODD</name>
<description>Odd parity</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>SPACE</name>
<description>Parity forced to 0 (Space)</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>MARK</name>
<description>Parity forced to 1 (Mark)</description>
<value>0x3</value>
</enumeratedValue>
<enumeratedValue>
<name>NO</name>
<description>No parity</description>
<value>0x4</value>
</enumeratedValue>
<enumeratedValue>
<name>MULTIDROP</name>
<description>Multidrop mode</description>
<value>0x6</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>NBSTOP</name>
<description>Number of Stop Bits</description>
<bitOffset>12</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>1_BIT</name>
<description>1 stop bit</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>1_5_BIT</name>
<description>1.5 stop bit (SYNC = 0) or reserved (SYNC = 1)</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>2_BIT</name>
<description>2 stop bits</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CHMODE</name>
<description>Channel Mode</description>
<bitOffset>14</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>NORMAL</name>
<description>Normal Mode</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>AUTOMATIC</name>
<description>Automatic Echo. Receiver input is connected to the TXD pin.</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>LOCAL_LOOPBACK</name>
<description>Local Loopback. Transmitter output is connected to the Receiver Input.</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>REMOTE_LOOPBACK</name>
<description>Remote Loopback. RXD pin is internally connected to the TXD pin.</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>MSBF</name>
<description>Bit Order</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>MODE9</name>
<description>9-bit Character Length</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CLKO</name>
<description>Clock Output Select</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>OVER</name>
<description>Oversampling Mode</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>INACK</name>
<description>Inhibit Non Acknowledge</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DSNACK</name>
<description>Disable Successive NACK</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>VAR_SYNC</name>
<description>Variable Synchronization of Command/Data Sync Start Frame Delimiter</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>INVDATA</name>
<description>Inverted Data</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>MAX_ITERATION</name>
<description>Maximum Number of Automatic Iteration</description>
<bitOffset>24</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
</field>
<field>
<name>FILTER</name>
<description>Infrared Receive Line Filter</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>MAN</name>
<description>Manchester Encoder/Decoder Enable</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>MODSYNC</name>
<description>Manchester Synchronization Mode</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>ONEBIT</name>
<description>Start Frame Delimiter Selector</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>MR_SPI_MODE</name>
<description>Mode Register</description>
<alternateGroup>SPI_MODE</alternateGroup>
<addressOffset>0x00000004</addressOffset>
<size>32</size>
<access>read-write</access>
<fields>
<field>
<name>USART_MODE</name>
<description>USART Mode of Operation</description>
<bitOffset>0</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>SPI_MASTER</name>
<description>SPI Master</description>
<value>0xE</value>
</enumeratedValue>
<enumeratedValue>
<name>SPI_SLAVE</name>
<description>SPI Slave</description>
<value>0xF</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>USCLKS</name>
<description>Clock Selection</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>MCK</name>
<description>Master Clock MCK is selected</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>DIV</name>
<description>Internal Clock Divided MCK/DIV (DIV=(DIV=8)) is selected</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>SCK</name>
<description>Serial Clock SLK is selected</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CHRL</name>
<description>Character Length.</description>
<bitOffset>6</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>8_BIT</name>
<description>Character length is 8 bits</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CPHA</name>
<description>SPI Clock Phase</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CPOL</name>
<description>SPI Clock Polarity</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>WRDBT</name>
<description>Wait Read Data Before Transfer</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>IER</name>
<description>Interrupt Enable Register</description>
<addressOffset>0x00000008</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>RXRDY</name>
<description>RXRDY Interrupt Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TXRDY Interrupt Enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXBRK</name>
<description>Receiver Break Interrupt Enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>OVRE</name>
<description>Overrun Error Interrupt Enable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>FRAME</name>
<description>Framing Error Interrupt Enable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PARE</name>
<description>Parity Error Interrupt Enable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TIMEOUT</name>
<description>Time-out Interrupt Enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXEMPTY</name>
<description>TXEMPTY Interrupt Enable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ITER</name>
<description>Max number of Repetitions Reached Interrupt Enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NACK</name>
<description>Non AcknowledgeInterrupt Enable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CTSIC</name>
<description>Clear to Send Input Change Interrupt Enable</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>MANE</name>
<description>Manchester Error Interrupt Enable</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IER_SPI_MODE</name>
<description>Interrupt Enable Register</description>
<alternateGroup>SPI_MODE</alternateGroup>
<addressOffset>0x00000008</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>RXRDY</name>
<description>RXRDY Interrupt Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TXRDY Interrupt Enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>OVRE</name>
<description>Overrun Error Interrupt Enable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXEMPTY</name>
<description>TXEMPTY Interrupt Enable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>UNRE</name>
<description>SPI Underrun Error Interrupt Enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IDR</name>
<description>Interrupt Disable Register</description>
<addressOffset>0x0000000C</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>RXRDY</name>
<description>RXRDY Interrupt Disable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TXRDY Interrupt Disable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXBRK</name>
<description>Receiver Break Interrupt Disable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>OVRE</name>
<description>Overrun Error Interrupt Enable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>FRAME</name>
<description>Framing Error Interrupt Disable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PARE</name>
<description>Parity Error Interrupt Disable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TIMEOUT</name>
<description>Time-out Interrupt Disable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXEMPTY</name>
<description>TXEMPTY Interrupt Disable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ITER</name>
<description>Max Number of Repetitions Reached Interrupt Disable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NACK</name>
<description>Non AcknowledgeInterrupt Disable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CTSIC</name>
<description>Clear to Send Input Change Interrupt Disable</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>MANE</name>
<description>Manchester Error Interrupt Disable</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IDR_SPI_MODE</name>
<description>Interrupt Disable Register</description>
<alternateGroup>SPI_MODE</alternateGroup>
<addressOffset>0x0000000C</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>RXRDY</name>
<description>RXRDY Interrupt Disable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TXRDY Interrupt Disable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>OVRE</name>
<description>Overrun Error Interrupt Disable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXEMPTY</name>
<description>TXEMPTY Interrupt Disable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>UNRE</name>
<description>SPI Underrun Error Interrupt Disable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IMR</name>
<description>Interrupt Mask Register</description>
<addressOffset>0x00000010</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>RXRDY</name>
<description>RXRDY Interrupt Mask</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TXRDY Interrupt Mask</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXBRK</name>
<description>Receiver Break Interrupt Mask</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>OVRE</name>
<description>Overrun Error Interrupt Mask</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>FRAME</name>
<description>Framing Error Interrupt Mask</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PARE</name>
<description>Parity Error Interrupt Mask</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TIMEOUT</name>
<description>Time-out Interrupt Mask</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXEMPTY</name>
<description>TXEMPTY Interrupt Mask</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ITER</name>
<description>Max Number of Repetitions Reached Interrupt Mask</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NACK</name>
<description>Non AcknowledgeInterrupt Mask</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CTSIC</name>
<description>Clear to Send Input Change Interrupt Mask</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>MANE</name>
<description>Manchester Error Interrupt Mask</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>IMR_SPI_MODE</name>
<description>Interrupt Mask Register</description>
<alternateGroup>SPI_MODE</alternateGroup>
<addressOffset>0x00000010</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>RXRDY</name>
<description>RXRDY Interrupt Mask</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TXRDY Interrupt Mask</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>OVRE</name>
<description>Overrun Error Interrupt Mask</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXEMPTY</name>
<description>TXEMPTY Interrupt Mask</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>UNRE</name>
<description>SPI Underrun Error Interrupt Mask</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>CSR</name>
<description>Channel Status Register</description>
<addressOffset>0x00000014</addressOffset>
<size>32</size>
<access>read-only</access>
<fields>
<field>
<name>RXRDY</name>
<description>Receiver Ready</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY</name>
<description>Transmitter Ready</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXBRK</name>
<description>Break Received/End of Break</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>OVRE</name>
<description>Overrun Error</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>FRAME</name>
<description>Framing Error</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PARE</name>
<description>Parity Error</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TIMEOUT</name>
<description>Receiver Time-out</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXEMPTY</name>
<description>Transmitter Empty</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ITER</name>
<description>MaxNumber of Repetitions Reached</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NACK</name>
<description>Non AcknowledgeInterrupt</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CTSIC</name>
<description>Clear to Send Input Change Flag</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CTS</name>
<description>Image of CTS Input</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>MANERR</name>
<description>Manchester Error</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>CSR_SPI_MODE</name>
<description>Channel Status Register</description>
<alternateGroup>SPI_MODE</alternateGroup>
<addressOffset>0x00000014</addressOffset>
<size>32</size>
<access>read-only</access>
<fields>
<field>
<name>RXRDY</name>
<description>Receiver Ready</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY</name>
<description>Transmitter Ready</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>OVRE</name>
<description>Overrun Error</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXEMPTY</name>
<description>Transmitter Empty</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>UNRE</name>
<description>Underrun Error</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>RHR</name>
<description>Receiver Holding Register</description>
<addressOffset>0x00000018</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>RXCHR</name>
<description>Received Character</description>
<bitOffset>0</bitOffset>
<bitWidth>9</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXSYNH</name>
<description>Received Sync</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>THR</name>
<description>Transmitter Holding Register</description>
<addressOffset>0x0000001C</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>TXCHR</name>
<description>Character to be Transmitted</description>
<bitOffset>0</bitOffset>
<bitWidth>9</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXSYNH</name>
<description>Sync Field to be Transmitted</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>BRGR</name>
<description>Baud Rate Generator Register</description>
<addressOffset>0x00000020</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CD</name>
<description>Clock Divider</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
<field>
<name>FP</name>
<description>Fractional Part</description>
<bitOffset>16</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>RTOR</name>
<description>Receiver Time-out Register</description>
<addressOffset>0x00000024</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>TO</name>
<description>Time-out Value</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>TTGR</name>
<description>Transmitter Timeguard Register</description>
<addressOffset>0x00000028</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>TG</name>
<description>Timeguard Value</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>FIDI</name>
<description>FI DI Ratio Register</description>
<addressOffset>0x00000040</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000174</resetValue>
<fields>
<field>
<name>FI_DI_RATIO</name>
<description>FI Over DI Ratio Value</description>
<bitOffset>0</bitOffset>
<bitWidth>11</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>NER</name>
<description>Number of Errors Register</description>
<addressOffset>0x00000044</addressOffset>
<size>32</size>
<access>read-only</access>
<fields>
<field>
<name>NB_ERRORS</name>
<description>Number of Errors</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>IF</name>
<description>IrDA Filter Register</description>
<addressOffset>0x0000004C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>IRDA_FILTER</name>
<description>IrDA Filter</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>MAN</name>
<description>Manchester Encoder Decoder Register</description>
<addressOffset>0x00000050</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0xB0011004</resetValue>
<fields>
<field>
<name>TX_PL</name>
<description>Transmitter Preamble Length</description>
<bitOffset>0</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>TX_PP</name>
<description>Transmitter Preamble Pattern</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>ALL_ONE</name>
<description>The preamble is composed of '1's</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ALL_ZERO</name>
<description>The preamble is composed of '0's</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>ZERO_ONE</name>
<description>The preamble is composed of '01's</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>ONE_ZERO</name>
<description>The preamble is composed of '10's</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>TX_MPOL</name>
<description>Transmitter Manchester Polarity</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>RX_PL</name>
<description>Receiver Preamble Length</description>
<bitOffset>16</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>RX_PP</name>
<description>Receiver Preamble Pattern detected</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>ALL_ONE</name>
<description>The preamble is composed of '1's</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ALL_ZERO</name>
<description>The preamble is composed of '0's</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>ZERO_ONE</name>
<description>The preamble is composed of '01's</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>ONE_ZERO</name>
<description>The preamble is composed of '10's</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>RX_MPOL</name>
<description>Receiver Manchester Polarity</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>ONE</name>
<description>Must Be Set to 1</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DRIFT</name>
<description>Drift Compensation</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>WPMR</name>
<description>Write Protect Mode Register</description>
<addressOffset>0x000000E4</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>WPEN</name>
<description>Write Protect Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>WPKEY</name>
<description>Write Protect KEY</description>
<bitOffset>8</bitOffset>
<bitWidth>24</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>WPSR</name>
<description>Write Protect Status Register</description>
<addressOffset>0x000000E8</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>WPVS</name>
<description>Write Protect Violation Status</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>WPVSRC</name>
<description>Write Protect Violation Source</description>
<bitOffset>8</bitOffset>
<bitWidth>16</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>USART3</name>
<version>6089Z</version>
<description>Universal Synchronous Asynchronous Receiver Transmitter 3</description>
<groupName>USART</groupName>
<prependToName>USART3_</prependToName>
<baseAddress>0xF8024000</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x4000</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>USART3</name>
<value>15</value>
</interrupt>
<registers>
<register>
<name>CR</name>
<description>Control Register</description>
<addressOffset>0x00000000</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>RSTRX</name>
<description>Reset Receiver</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RSTTX</name>
<description>Reset Transmitter</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXEN</name>
<description>Receiver Enable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXDIS</name>
<description>Receiver Disable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXEN</name>
<description>Transmitter Enable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXDIS</name>
<description>Transmitter Disable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RSTSTA</name>
<description>Reset Status Bits</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>STTBRK</name>
<description>Start Break</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>STPBRK</name>
<description>Stop Break</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>STTTO</name>
<description>Start Time-out</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SENDA</name>
<description>Send Address</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RSTIT</name>
<description>Reset Iterations</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RSTNACK</name>
<description>Reset Non Acknowledge</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RETTO</name>
<description>Rearm Time-out</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RTSEN</name>
<description>Request to Send Enable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RTSDIS</name>
<description>Request to Send Disable</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>CR_SPI_MODE</name>
<description>Control Register</description>
<alternateGroup>SPI_MODE</alternateGroup>
<addressOffset>0x00000000</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>RSTRX</name>
<description>Reset Receiver</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RSTTX</name>
<description>Reset Transmitter</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXEN</name>
<description>Receiver Enable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXDIS</name>
<description>Receiver Disable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXEN</name>
<description>Transmitter Enable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXDIS</name>
<description>Transmitter Disable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RSTSTA</name>
<description>Reset Status Bits</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>FCS</name>
<description>Force SPI Chip Select</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RCS</name>
<description>Release SPI Chip Select</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>MR</name>
<description>Mode Register</description>
<addressOffset>0x00000004</addressOffset>
<size>32</size>
<access>read-write</access>
<fields>
<field>
<name>USART_MODE</name>
<description>USART Mode of Operation</description>
<bitOffset>0</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>NORMAL</name>
<description>Normal mode</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>RS485</name>
<description>RS485</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>HW_HANDSHAKING</name>
<description>Hardware Handshaking</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>IS07816_T_0</name>
<description>IS07816 Protocol: T = 0</description>
<value>0x4</value>
</enumeratedValue>
<enumeratedValue>
<name>IS07816_T_1</name>
<description>IS07816 Protocol: T = 1</description>
<value>0x6</value>
</enumeratedValue>
<enumeratedValue>
<name>IRDA</name>
<description>IrDA</description>
<value>0x8</value>
</enumeratedValue>
<enumeratedValue>
<name>SPI_MASTER</name>
<description>SPI Master</description>
<value>0xE</value>
</enumeratedValue>
<enumeratedValue>
<name>SPI_SLAVE</name>
<description>SPI Slave</description>
<value>0xF</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>USCLKS</name>
<description>Clock Selection</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>MCK</name>
<description>Master Clock MCK is selected</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>DIV</name>
<description>Internal Clock Divided MCK/DIV (DIV=(DIV=8)) is selected</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>SCK</name>
<description>Serial Clock SLK is selected</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CHRL</name>
<description>Character Length.</description>
<bitOffset>6</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>5_BIT</name>
<description>Character length is 5 bits</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>6_BIT</name>
<description>Character length is 6 bits</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>7_BIT</name>
<description>Character length is 7 bits</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>8_BIT</name>
<description>Character length is 8 bits</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SYNC</name>
<description>Synchronous Mode Select</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>PAR</name>
<description>Parity Type</description>
<bitOffset>9</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>EVEN</name>
<description>Even parity</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ODD</name>
<description>Odd parity</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>SPACE</name>
<description>Parity forced to 0 (Space)</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>MARK</name>
<description>Parity forced to 1 (Mark)</description>
<value>0x3</value>
</enumeratedValue>
<enumeratedValue>
<name>NO</name>
<description>No parity</description>
<value>0x4</value>
</enumeratedValue>
<enumeratedValue>
<name>MULTIDROP</name>
<description>Multidrop mode</description>
<value>0x6</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>NBSTOP</name>
<description>Number of Stop Bits</description>
<bitOffset>12</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>1_BIT</name>
<description>1 stop bit</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>1_5_BIT</name>
<description>1.5 stop bit (SYNC = 0) or reserved (SYNC = 1)</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>2_BIT</name>
<description>2 stop bits</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CHMODE</name>
<description>Channel Mode</description>
<bitOffset>14</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>NORMAL</name>
<description>Normal Mode</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>AUTOMATIC</name>
<description>Automatic Echo. Receiver input is connected to the TXD pin.</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>LOCAL_LOOPBACK</name>
<description>Local Loopback. Transmitter output is connected to the Receiver Input.</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>REMOTE_LOOPBACK</name>
<description>Remote Loopback. RXD pin is internally connected to the TXD pin.</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>MSBF</name>
<description>Bit Order</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>MODE9</name>
<description>9-bit Character Length</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CLKO</name>
<description>Clock Output Select</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>OVER</name>
<description>Oversampling Mode</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>INACK</name>
<description>Inhibit Non Acknowledge</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DSNACK</name>
<description>Disable Successive NACK</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>VAR_SYNC</name>
<description>Variable Synchronization of Command/Data Sync Start Frame Delimiter</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>INVDATA</name>
<description>Inverted Data</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>MAX_ITERATION</name>
<description>Maximum Number of Automatic Iteration</description>
<bitOffset>24</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
</field>
<field>
<name>FILTER</name>
<description>Infrared Receive Line Filter</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>MAN</name>
<description>Manchester Encoder/Decoder Enable</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>MODSYNC</name>
<description>Manchester Synchronization Mode</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>ONEBIT</name>
<description>Start Frame Delimiter Selector</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>MR_SPI_MODE</name>
<description>Mode Register</description>
<alternateGroup>SPI_MODE</alternateGroup>
<addressOffset>0x00000004</addressOffset>
<size>32</size>
<access>read-write</access>
<fields>
<field>
<name>USART_MODE</name>
<description>USART Mode of Operation</description>
<bitOffset>0</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>SPI_MASTER</name>
<description>SPI Master</description>
<value>0xE</value>
</enumeratedValue>
<enumeratedValue>
<name>SPI_SLAVE</name>
<description>SPI Slave</description>
<value>0xF</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>USCLKS</name>
<description>Clock Selection</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>MCK</name>
<description>Master Clock MCK is selected</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>DIV</name>
<description>Internal Clock Divided MCK/DIV (DIV=(DIV=8)) is selected</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>SCK</name>
<description>Serial Clock SLK is selected</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CHRL</name>
<description>Character Length.</description>
<bitOffset>6</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>8_BIT</name>
<description>Character length is 8 bits</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CPHA</name>
<description>SPI Clock Phase</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CPOL</name>
<description>SPI Clock Polarity</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>WRDBT</name>
<description>Wait Read Data Before Transfer</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>IER</name>
<description>Interrupt Enable Register</description>
<addressOffset>0x00000008</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>RXRDY</name>
<description>RXRDY Interrupt Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TXRDY Interrupt Enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXBRK</name>
<description>Receiver Break Interrupt Enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>OVRE</name>
<description>Overrun Error Interrupt Enable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>FRAME</name>
<description>Framing Error Interrupt Enable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PARE</name>
<description>Parity Error Interrupt Enable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TIMEOUT</name>
<description>Time-out Interrupt Enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXEMPTY</name>
<description>TXEMPTY Interrupt Enable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ITER</name>
<description>Max number of Repetitions Reached Interrupt Enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NACK</name>
<description>Non AcknowledgeInterrupt Enable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CTSIC</name>
<description>Clear to Send Input Change Interrupt Enable</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>MANE</name>
<description>Manchester Error Interrupt Enable</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IER_SPI_MODE</name>
<description>Interrupt Enable Register</description>
<alternateGroup>SPI_MODE</alternateGroup>
<addressOffset>0x00000008</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>RXRDY</name>
<description>RXRDY Interrupt Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TXRDY Interrupt Enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>OVRE</name>
<description>Overrun Error Interrupt Enable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXEMPTY</name>
<description>TXEMPTY Interrupt Enable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>UNRE</name>
<description>SPI Underrun Error Interrupt Enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IDR</name>
<description>Interrupt Disable Register</description>
<addressOffset>0x0000000C</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>RXRDY</name>
<description>RXRDY Interrupt Disable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TXRDY Interrupt Disable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXBRK</name>
<description>Receiver Break Interrupt Disable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>OVRE</name>
<description>Overrun Error Interrupt Enable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>FRAME</name>
<description>Framing Error Interrupt Disable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PARE</name>
<description>Parity Error Interrupt Disable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TIMEOUT</name>
<description>Time-out Interrupt Disable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXEMPTY</name>
<description>TXEMPTY Interrupt Disable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ITER</name>
<description>Max Number of Repetitions Reached Interrupt Disable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NACK</name>
<description>Non AcknowledgeInterrupt Disable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CTSIC</name>
<description>Clear to Send Input Change Interrupt Disable</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>MANE</name>
<description>Manchester Error Interrupt Disable</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IDR_SPI_MODE</name>
<description>Interrupt Disable Register</description>
<alternateGroup>SPI_MODE</alternateGroup>
<addressOffset>0x0000000C</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>RXRDY</name>
<description>RXRDY Interrupt Disable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TXRDY Interrupt Disable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>OVRE</name>
<description>Overrun Error Interrupt Disable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXEMPTY</name>
<description>TXEMPTY Interrupt Disable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>UNRE</name>
<description>SPI Underrun Error Interrupt Disable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IMR</name>
<description>Interrupt Mask Register</description>
<addressOffset>0x00000010</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>RXRDY</name>
<description>RXRDY Interrupt Mask</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TXRDY Interrupt Mask</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXBRK</name>
<description>Receiver Break Interrupt Mask</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>OVRE</name>
<description>Overrun Error Interrupt Mask</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>FRAME</name>
<description>Framing Error Interrupt Mask</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PARE</name>
<description>Parity Error Interrupt Mask</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TIMEOUT</name>
<description>Time-out Interrupt Mask</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXEMPTY</name>
<description>TXEMPTY Interrupt Mask</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ITER</name>
<description>Max Number of Repetitions Reached Interrupt Mask</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NACK</name>
<description>Non AcknowledgeInterrupt Mask</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CTSIC</name>
<description>Clear to Send Input Change Interrupt Mask</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>MANE</name>
<description>Manchester Error Interrupt Mask</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>IMR_SPI_MODE</name>
<description>Interrupt Mask Register</description>
<alternateGroup>SPI_MODE</alternateGroup>
<addressOffset>0x00000010</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>RXRDY</name>
<description>RXRDY Interrupt Mask</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TXRDY Interrupt Mask</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>OVRE</name>
<description>Overrun Error Interrupt Mask</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXEMPTY</name>
<description>TXEMPTY Interrupt Mask</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>UNRE</name>
<description>SPI Underrun Error Interrupt Mask</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>CSR</name>
<description>Channel Status Register</description>
<addressOffset>0x00000014</addressOffset>
<size>32</size>
<access>read-only</access>
<fields>
<field>
<name>RXRDY</name>
<description>Receiver Ready</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY</name>
<description>Transmitter Ready</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXBRK</name>
<description>Break Received/End of Break</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>OVRE</name>
<description>Overrun Error</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>FRAME</name>
<description>Framing Error</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PARE</name>
<description>Parity Error</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TIMEOUT</name>
<description>Receiver Time-out</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXEMPTY</name>
<description>Transmitter Empty</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ITER</name>
<description>MaxNumber of Repetitions Reached</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NACK</name>
<description>Non AcknowledgeInterrupt</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CTSIC</name>
<description>Clear to Send Input Change Flag</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CTS</name>
<description>Image of CTS Input</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>MANERR</name>
<description>Manchester Error</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>CSR_SPI_MODE</name>
<description>Channel Status Register</description>
<alternateGroup>SPI_MODE</alternateGroup>
<addressOffset>0x00000014</addressOffset>
<size>32</size>
<access>read-only</access>
<fields>
<field>
<name>RXRDY</name>
<description>Receiver Ready</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY</name>
<description>Transmitter Ready</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>OVRE</name>
<description>Overrun Error</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXEMPTY</name>
<description>Transmitter Empty</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>UNRE</name>
<description>Underrun Error</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>RHR</name>
<description>Receiver Holding Register</description>
<addressOffset>0x00000018</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>RXCHR</name>
<description>Received Character</description>
<bitOffset>0</bitOffset>
<bitWidth>9</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXSYNH</name>
<description>Received Sync</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>THR</name>
<description>Transmitter Holding Register</description>
<addressOffset>0x0000001C</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>TXCHR</name>
<description>Character to be Transmitted</description>
<bitOffset>0</bitOffset>
<bitWidth>9</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXSYNH</name>
<description>Sync Field to be Transmitted</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>BRGR</name>
<description>Baud Rate Generator Register</description>
<addressOffset>0x00000020</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CD</name>
<description>Clock Divider</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
<field>
<name>FP</name>
<description>Fractional Part</description>
<bitOffset>16</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>RTOR</name>
<description>Receiver Time-out Register</description>
<addressOffset>0x00000024</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>TO</name>
<description>Time-out Value</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>TTGR</name>
<description>Transmitter Timeguard Register</description>
<addressOffset>0x00000028</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>TG</name>
<description>Timeguard Value</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>FIDI</name>
<description>FI DI Ratio Register</description>
<addressOffset>0x00000040</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000174</resetValue>
<fields>
<field>
<name>FI_DI_RATIO</name>
<description>FI Over DI Ratio Value</description>
<bitOffset>0</bitOffset>
<bitWidth>11</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>NER</name>
<description>Number of Errors Register</description>
<addressOffset>0x00000044</addressOffset>
<size>32</size>
<access>read-only</access>
<fields>
<field>
<name>NB_ERRORS</name>
<description>Number of Errors</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>IF</name>
<description>IrDA Filter Register</description>
<addressOffset>0x0000004C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>IRDA_FILTER</name>
<description>IrDA Filter</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>MAN</name>
<description>Manchester Encoder Decoder Register</description>
<addressOffset>0x00000050</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0xB0011004</resetValue>
<fields>
<field>
<name>TX_PL</name>
<description>Transmitter Preamble Length</description>
<bitOffset>0</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>TX_PP</name>
<description>Transmitter Preamble Pattern</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>ALL_ONE</name>
<description>The preamble is composed of '1's</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ALL_ZERO</name>
<description>The preamble is composed of '0's</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>ZERO_ONE</name>
<description>The preamble is composed of '01's</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>ONE_ZERO</name>
<description>The preamble is composed of '10's</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>TX_MPOL</name>
<description>Transmitter Manchester Polarity</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>RX_PL</name>
<description>Receiver Preamble Length</description>
<bitOffset>16</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>RX_PP</name>
<description>Receiver Preamble Pattern detected</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>ALL_ONE</name>
<description>The preamble is composed of '1's</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ALL_ZERO</name>
<description>The preamble is composed of '0's</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>ZERO_ONE</name>
<description>The preamble is composed of '01's</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>ONE_ZERO</name>
<description>The preamble is composed of '10's</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>RX_MPOL</name>
<description>Receiver Manchester Polarity</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>ONE</name>
<description>Must Be Set to 1</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DRIFT</name>
<description>Drift Compensation</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>WPMR</name>
<description>Write Protect Mode Register</description>
<addressOffset>0x000000E4</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>WPEN</name>
<description>Write Protect Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>WPKEY</name>
<description>Write Protect KEY</description>
<bitOffset>8</bitOffset>
<bitWidth>24</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>WPSR</name>
<description>Write Protect Status Register</description>
<addressOffset>0x000000E8</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>WPVS</name>
<description>Write Protect Violation Status</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>WPVSRC</name>
<description>Write Protect Violation Source</description>
<bitOffset>8</bitOffset>
<bitWidth>16</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>UART1</name>
<version>6418G</version>
<description>Universal Asynchronous Receiver Transmitter 1</description>
<groupName>UART</groupName>
<prependToName>UART1_</prependToName>
<baseAddress>0xF8028000</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x4000</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>UART1</name>
<value>17</value>
</interrupt>
<registers>
<register>
<name>CR</name>
<description>Control Register</description>
<addressOffset>0x00000000</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>RSTRX</name>
<description>Reset Receiver</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RSTTX</name>
<description>Reset Transmitter</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXEN</name>
<description>Receiver Enable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXDIS</name>
<description>Receiver Disable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXEN</name>
<description>Transmitter Enable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXDIS</name>
<description>Transmitter Disable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RSTSTA</name>
<description>Reset Status Bits</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>MR</name>
<description>Mode Register</description>
<addressOffset>0x00000004</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>PAR</name>
<description>Parity Type</description>
<bitOffset>9</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>EVEN</name>
<description>Even Parity</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ODD</name>
<description>Odd Parity</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>SPACE</name>
<description>Space: parity forced to 0</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>MARK</name>
<description>Mark: parity forced to 1</description>
<value>0x3</value>
</enumeratedValue>
<enumeratedValue>
<name>NO</name>
<description>No Parity</description>
<value>0x4</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CHMODE</name>
<description>Channel Mode</description>
<bitOffset>14</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>NORMAL</name>
<description>Normal Mode</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>AUTOMATIC</name>
<description>Automatic Echo</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>LOCAL_LOOPBACK</name>
<description>Local Loopback</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>REMOTE_LOOPBACK</name>
<description>Remote Loopback</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>IER</name>
<description>Interrupt Enable Register</description>
<addressOffset>0x00000008</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>RXRDY</name>
<description>Enable RXRDY Interrupt</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY</name>
<description>Enable TXRDY Interrupt</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>OVRE</name>
<description>Enable Overrun Error Interrupt</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>FRAME</name>
<description>Enable Framing Error Interrupt</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PARE</name>
<description>Enable Parity Error Interrupt</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXEMPTY</name>
<description>Enable TXEMPTY Interrupt</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IDR</name>
<description>Interrupt Disable Register</description>
<addressOffset>0x0000000C</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>RXRDY</name>
<description>Disable RXRDY Interrupt</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY</name>
<description>Disable TXRDY Interrupt</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>OVRE</name>
<description>Disable Overrun Error Interrupt</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>FRAME</name>
<description>Disable Framing Error Interrupt</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PARE</name>
<description>Disable Parity Error Interrupt</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXEMPTY</name>
<description>Disable TXEMPTY Interrupt</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IMR</name>
<description>Interrupt Mask Register</description>
<addressOffset>0x00000010</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>RXRDY</name>
<description>Mask RXRDY Interrupt</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY</name>
<description>Disable TXRDY Interrupt</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>OVRE</name>
<description>Mask Overrun Error Interrupt</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>FRAME</name>
<description>Mask Framing Error Interrupt</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PARE</name>
<description>Mask Parity Error Interrupt</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXEMPTY</name>
<description>Mask TXEMPTY Interrupt</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>SR</name>
<description>Status Register</description>
<addressOffset>0x00000014</addressOffset>
<size>32</size>
<access>read-only</access>
<fields>
<field>
<name>RXRDY</name>
<description>Receiver Ready</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY</name>
<description>Transmitter Ready</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>OVRE</name>
<description>Overrun Error</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>FRAME</name>
<description>Framing Error</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PARE</name>
<description>Parity Error</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXEMPTY</name>
<description>Transmitter Empty</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>RHR</name>
<description>Receive Holding Register</description>
<addressOffset>0x00000018</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>RXCHR</name>
<description>Received Character</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>THR</name>
<description>Transmit Holding Register</description>
<addressOffset>0x0000001C</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>TXCHR</name>
<description>Character to be Transmitted</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>BRGR</name>
<description>Baud Rate Generator Register</description>
<addressOffset>0x00000020</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CD</name>
<description>Clock Divisor</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>EMAC</name>
<version>6119I</version>
<description>Ethernet MAC 10/100</description>
<prependToName>EMAC_</prependToName>
<baseAddress>0xF802C000</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x4000</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>EMAC</name>
<value>35</value>
</interrupt>
<registers>
<register>
<name>NCR</name>
<description>Network Control Register</description>
<addressOffset>0x00000000</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>LB</name>
<description>LoopBack</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>LLB</name>
<description>Loopback local</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>RE</name>
<description>Receive enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>TE</name>
<description>Transmit enable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>MPE</name>
<description>Management port enable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CLRSTAT</name>
<description>Clear statistics registers</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>INCSTAT</name>
<description>Increment statistics registers</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>WESTAT</name>
<description>Write enable for statistics registers</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>BP</name>
<description>Back pressure</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>TSTART</name>
<description>Start transmission</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>THALT</name>
<description>Transmit halt</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>NCFGR</name>
<description>Network Configuration Register</description>
<addressOffset>0x00000004</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000800</resetValue>
<fields>
<field>
<name>SPD</name>
<description>Speed</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>FD</name>
<description>Full Duplex</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>JFRAME</name>
<description>Jumbo Frames</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CAF</name>
<description>Copy All Frames</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>NBC</name>
<description>No Broadcast</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>MTI</name>
<description>Multicast Hash Enable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>UNI</name>
<description>Unicast Hash Enable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>BIG</name>
<description>Receive 1536 bytes frames</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CLK</name>
<description>MDC clock divider</description>
<bitOffset>10</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>MCK_8</name>
<description>MCK divided by 8 (MCK up to 20 MHz).</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>MCK_16</name>
<description>MCK divided by 16 (MCK up to 40 MHz).</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>MCK_32</name>
<description>MCK divided by 32 (MCK up to 80 MHz).</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>MCK_64</name>
<description>MCK divided by 64 (MCK up to 160 MHz).</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>RTY</name>
<description>Retry test</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>PAE</name>
<description>Pause Enable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>RBOF</name>
<description>Receive Buffer Offset</description>
<bitOffset>14</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>OFFSET_0</name>
<description>No offset from start of receive buffer.</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>OFFSET_1</name>
<description>One-byte offset from start of receive buffer.</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>OFFSET_2</name>
<description>Two-byte offset from start of receive buffer.</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>OFFSET_3</name>
<description>Three-byte offset from start of receive buffer.</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>RLCE</name>
<description>Receive Length field Checking Enable</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DRFCS</name>
<description>Discard Receive FCS</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>EFRHD</name>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>IRXFCS</name>
<description>Ignore RX FCS</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>NSR</name>
<description>Network Status Register</description>
<addressOffset>0x00000008</addressOffset>
<size>32</size>
<access>read-only</access>
<fields>
<field>
<name>MDIO</name>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>IDLE</name>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>TSR</name>
<description>Transmit Status Register</description>
<addressOffset>0x00000014</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>UBR</name>
<description>Used Bit Read</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>COL</name>
<description>Collision Occurred</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>RLES</name>
<description>Retry Limit exceeded</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>TGO</name>
<description>Transmit Go</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>BEX</name>
<description>Buffers exhausted mid frame</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>COMP</name>
<description>Transmit Complete</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>UND</name>
<description>Transmit Underrun</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>RBQP</name>
<description>Receive Buffer Queue Pointer Register</description>
<addressOffset>0x00000018</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>ADDR</name>
<description>Receive buffer queue pointer address</description>
<bitOffset>2</bitOffset>
<bitWidth>30</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>TBQP</name>
<description>Transmit Buffer Queue Pointer Register</description>
<addressOffset>0x0000001C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>ADDR</name>
<description>Transmit buffer queue pointer address</description>
<bitOffset>2</bitOffset>
<bitWidth>30</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>RSR</name>
<description>Receive Status Register</description>
<addressOffset>0x00000020</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>BNA</name>
<description>Buffer Not Available</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>REC</name>
<description>Frame Received</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>OVR</name>
<description>Receive Overrun</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>ISR</name>
<description>Interrupt Status Register</description>
<addressOffset>0x00000024</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>MFD</name>
<description>Management Frame Done</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>RCOMP</name>
<description>Receive Complete</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>RXUBR</name>
<description>Receive Used Bit Read</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>TXUBR</name>
<description>Transmit Used Bit Read</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>TUND</name>
<description>Ethernet Transmit Buffer Underrun</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>RLEX</name>
<description>Retry Limit Exceeded</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>TXERR</name>
<description>Transmit Error</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>TCOMP</name>
<description>Transmit Complete</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>ROVR</name>
<description>Receive Overrun</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>HRESP</name>
<description>Hresp not OK</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>PFRE</name>
<description>Pause Frame Received</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>PTZ</name>
<description>Pause Time Zero</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>WOL</name>
<description>Wake On LAN</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>IER</name>
<description>Interrupt Enable Register</description>
<addressOffset>0x00000028</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>MFD</name>
<description>Management Frame sent</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RCOMP</name>
<description>Receive Complete</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXUBR</name>
<description>Receive Used Bit Read</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXUBR</name>
<description>Transmit Used Bit Read</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TUND</name>
<description>Ethernet Transmit Buffer Underrun</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RLE</name>
<description>Retry Limit Exceeded</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXERR</name>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TCOMP</name>
<description>Transmit Complete</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ROVR</name>
<description>Receive Overrun</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>HRESP</name>
<description>Hresp not OK</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PFR</name>
<description>Pause Frame Received</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PTZ</name>
<description>Pause Time Zero</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>WOL</name>
<description>Wake On LAN</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IDR</name>
<description>Interrupt Disable Register</description>
<addressOffset>0x0000002C</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>MFD</name>
<description>Management Frame sent</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RCOMP</name>
<description>Receive Complete</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXUBR</name>
<description>Receive Used Bit Read</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXUBR</name>
<description>Transmit Used Bit Read</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TUND</name>
<description>Ethernet Transmit Buffer Underrun</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RLE</name>
<description>Retry Limit Exceeded</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXERR</name>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TCOMP</name>
<description>Transmit Complete</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ROVR</name>
<description>Receive Overrun</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>HRESP</name>
<description>Hresp not OK</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PFR</name>
<description>Pause Frame Received</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PTZ</name>
<description>Pause Time Zero</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>WOL</name>
<description>Wake On LAN</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IMR</name>
<description>Interrupt Mask Register</description>
<addressOffset>0x00000030</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00007FFF</resetValue>
<fields>
<field>
<name>MFD</name>
<description>Management Frame sent</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RCOMP</name>
<description>Receive Complete</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXUBR</name>
<description>Receive Used Bit Read</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXUBR</name>
<description>Transmit Used Bit Read</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TUND</name>
<description>Ethernet Transmit Buffer Underrun</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RLE</name>
<description>Retry Limit Exceeded</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXERR</name>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TCOMP</name>
<description>Transmit Complete</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ROVR</name>
<description>Receive Overrun</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>HRESP</name>
<description>Hresp not OK</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PFR</name>
<description>Pause Frame Received</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PTZ</name>
<description>Pause Time Zero</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>WOL</name>
<description>Wake On LAN</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>MAN</name>
<description>Phy Maintenance Register</description>
<addressOffset>0x00000034</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DATA</name>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CODE</name>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>REGA</name>
<description>Register Address</description>
<bitOffset>18</bitOffset>
<bitWidth>5</bitWidth>
<access>read-write</access>
</field>
<field>
<name>PHYA</name>
<description>PHY Address</description>
<bitOffset>23</bitOffset>
<bitWidth>5</bitWidth>
<access>read-write</access>
</field>
<field>
<name>RW</name>
<description>Read-write</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SOF</name>
<description>Start of frame</description>
<bitOffset>30</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>PTR</name>
<description>Pause Time Register</description>
<addressOffset>0x00000038</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>PTIME</name>
<description>Pause Time</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>PFR</name>
<description>Pause Frames Received Register</description>
<addressOffset>0x0000003C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>FROK</name>
<description>Pause Frames received OK</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>FTO</name>
<description>Frames Transmitted Ok Register</description>
<addressOffset>0x00000040</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>FTOK</name>
<description>Frames Transmitted OK</description>
<bitOffset>0</bitOffset>
<bitWidth>24</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>SCF</name>
<description>Single Collision Frames Register</description>
<addressOffset>0x00000044</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SCF</name>
<description>Single Collision Frames</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>MCF</name>
<description>Multiple Collision Frames Register</description>
<addressOffset>0x00000048</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>MCF</name>
<description>Multicollision Frames</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>FRO</name>
<description>Frames Received Ok Register</description>
<addressOffset>0x0000004C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>FROK</name>
<description>Frames Received OK</description>
<bitOffset>0</bitOffset>
<bitWidth>24</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>FCSE</name>
<description>Frame Check Sequence Errors Register</description>
<addressOffset>0x00000050</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>FCSE</name>
<description>Frame Check Sequence Errors</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>ALE</name>
<description>Alignment Errors Register</description>
<addressOffset>0x00000054</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>ALE</name>
<description>Alignment Errors</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DTF</name>
<description>Deferred Transmission Frames Register</description>
<addressOffset>0x00000058</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DTF</name>
<description>Deferred Transmission Frames</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>LCOL</name>
<description>Late Collisions Register</description>
<addressOffset>0x0000005C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>LCOL</name>
<description>Late Collisions</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>ECOL</name>
<description>Excessive Collisions Register</description>
<addressOffset>0x00000060</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>EXCOL</name>
<description>Excessive Collisions</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>TUND</name>
<description>Transmit Underrun Errors Register</description>
<addressOffset>0x00000064</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>TUND</name>
<description>Transmit Underruns</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>CSE</name>
<description>Carrier Sense Errors Register</description>
<addressOffset>0x00000068</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CSE</name>
<description>Carrier Sense Errors</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>RRE</name>
<description>Receive Resource Errors Register</description>
<addressOffset>0x0000006C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>RRE</name>
<description>Receive Resource Errors</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>ROV</name>
<description>Receive Overrun Errors Register</description>
<addressOffset>0x00000070</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>ROVR</name>
<description>Receive Overrun</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>RSE</name>
<description>Receive Symbol Errors Register</description>
<addressOffset>0x00000074</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>RSE</name>
<description>Receive Symbol Errors</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>ELE</name>
<description>Excessive Length Errors Register</description>
<addressOffset>0x00000078</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>EXL</name>
<description>Excessive Length Errors</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>RJA</name>
<description>Receive Jabbers Register</description>
<addressOffset>0x0000007C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>RJB</name>
<description>Receive Jabbers</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>USF</name>
<description>Undersize Frames Register</description>
<addressOffset>0x00000080</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>USF</name>
<description>Undersize frames</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>STE</name>
<description>SQE Test Errors Register</description>
<addressOffset>0x00000084</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SQER</name>
<description>SQE test errors</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>RLE</name>
<description>Received Length Field Mismatch Register</description>
<addressOffset>0x00000088</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>RLFM</name>
<description>Receive Length Field Mismatch</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>HRB</name>
<description>Hash Register Bottom [31:0] Register</description>
<addressOffset>0x00000090</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>ADDR</name>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>HRT</name>
<description>Hash Register Top [63:32] Register</description>
<addressOffset>0x00000094</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>ADDR</name>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>SA1B</name>
<description>Specific Address 1 Bottom Register</description>
<addressOffset>0x00000098</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>ADDR</name>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>SA1T</name>
<description>Specific Address 1 Top Register</description>
<addressOffset>0x0000009C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>ADDR</name>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>SA2B</name>
<description>Specific Address 2 Bottom Register</description>
<addressOffset>0x000000A0</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>ADDR</name>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>SA2T</name>
<description>Specific Address 2 Top Register</description>
<addressOffset>0x000000A4</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>ADDR</name>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>SA3B</name>
<description>Specific Address 3 Bottom Register</description>
<addressOffset>0x000000A8</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>ADDR</name>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>SA3T</name>
<description>Specific Address 3 Top Register</description>
<addressOffset>0x000000AC</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>ADDR</name>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>SA4B</name>
<description>Specific Address 4 Bottom Register</description>
<addressOffset>0x000000B0</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>ADDR</name>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>SA4T</name>
<description>Specific Address 4 Top Register</description>
<addressOffset>0x000000B4</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>ADDR</name>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>TID</name>
<description>Type ID Checking Register</description>
<addressOffset>0x000000B8</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>TID</name>
<description>Type ID checking</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>USRIO</name>
<description>User Input/Output Register</description>
<addressOffset>0x000000C0</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>RMII</name>
<description>Reduce MII</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CLKEN</name>
<description>Clock Enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>WOL</name>
<description>Wake on LAN Register</description>
<addressOffset>0x000000C4</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>IP</name>
<description>ARP request IP address</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
<field>
<name>MAG</name>
<description>Magic packet event enable</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>ARP</name>
<description>ARP request IP address</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SA1</name>
<description>Specific address register 1 event enable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>MTI</name>
<description>Multicast hash event enable</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>UDPHS</name>
<version>6227O</version>
<description>USB High Speed Device Port</description>
<prependToName>UDPHS_</prependToName>
<baseAddress>0xF8030000</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x4000</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>UDPHS</name>
<value>33</value>
</interrupt>
<registers>
<register>
<name>CTRL</name>
<description>UDPHS Control Register</description>
<addressOffset>0x00000000</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000200</resetValue>
<fields>
<field>
<name>DEV_ADDR</name>
<description>UDPHS Address</description>
<bitOffset>0</bitOffset>
<bitWidth>7</bitWidth>
<access>read-write</access>
</field>
<field>
<name>FADDR_EN</name>
<description>Function Address Enable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>EN_UDPHS</name>
<description>UDPHS Enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DETACH</name>
<description>Detach Command</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>REWAKEUP</name>
<description>Send Remote Wake Up</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>PULLD_DIS</name>
<description>Pull-Down Disable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>FNUM</name>
<description>UDPHS Frame Number Register</description>
<addressOffset>0x00000004</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>MICRO_FRAME_NUM</name>
<description>Microframe Number</description>
<bitOffset>0</bitOffset>
<bitWidth>3</bitWidth>
<access>read-only</access>
</field>
<field>
<name>FRAME_NUMBER</name>
<description>Frame Number as defined in the Packet Field Formats</description>
<bitOffset>3</bitOffset>
<bitWidth>11</bitWidth>
<access>read-only</access>
</field>
<field>
<name>FNUM_ERR</name>
<description>Frame Number CRC Error</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>IEN</name>
<description>UDPHS Interrupt Enable Register</description>
<addressOffset>0x00000010</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000010</resetValue>
<fields>
<field>
<name>DET_SUSPD</name>
<description>Suspend Interrupt Enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>MICRO_SOF</name>
<description>Micro-SOF Interrupt Enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>INT_SOF</name>
<description>SOF Interrupt Enable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>ENDRESET</name>
<description>End Of Reset Interrupt Enable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>WAKE_UP</name>
<description>Wake Up CPU Interrupt Enable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>ENDOFRSM</name>
<description>End Of Resume Interrupt Enable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>UPSTR_RES</name>
<description>Upstream Resume Interrupt Enable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>EPT_0</name>
<description>Endpoint 0 Interrupt Enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>EPT_1</name>
<description>Endpoint 1 Interrupt Enable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>EPT_2</name>
<description>Endpoint 2 Interrupt Enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>EPT_3</name>
<description>Endpoint 3 Interrupt Enable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>EPT_4</name>
<description>Endpoint 4 Interrupt Enable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>EPT_5</name>
<description>Endpoint 5 Interrupt Enable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>EPT_6</name>
<description>Endpoint 6 Interrupt Enable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>EPT_7</name>
<description>Endpoint 7 Interrupt Enable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>EPT_8</name>
<description>Endpoint 8 Interrupt Enable</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>EPT_9</name>
<description>Endpoint 9 Interrupt Enable</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>EPT_10</name>
<description>Endpoint 10 Interrupt Enable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>EPT_11</name>
<description>Endpoint 11 Interrupt Enable</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>EPT_12</name>
<description>Endpoint 12 Interrupt Enable</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>EPT_13</name>
<description>Endpoint 13 Interrupt Enable</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>EPT_14</name>
<description>Endpoint 14 Interrupt Enable</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>EPT_15</name>
<description>Endpoint 15 Interrupt Enable</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DMA_1</name>
<description>DMA Channel 1 Interrupt Enable</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DMA_2</name>
<description>DMA Channel 2 Interrupt Enable</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DMA_3</name>
<description>DMA Channel 3 Interrupt Enable</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DMA_4</name>
<description>DMA Channel 4 Interrupt Enable</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DMA_5</name>
<description>DMA Channel 5 Interrupt Enable</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DMA_6</name>
<description>DMA Channel 6 Interrupt Enable</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DMA_7</name>
<description>DMA Channel 7 Interrupt Enable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>INTSTA</name>
<description>UDPHS Interrupt Status Register</description>
<addressOffset>0x00000014</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SPEED</name>
<description>Speed Status</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DET_SUSPD</name>
<description>Suspend Interrupt</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>MICRO_SOF</name>
<description>Micro Start Of Frame Interrupt</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>INT_SOF</name>
<description>Start Of Frame Interrupt</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ENDRESET</name>
<description>End Of Reset Interrupt</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>WAKE_UP</name>
<description>Wake Up CPU Interrupt</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ENDOFRSM</name>
<description>End Of Resume Interrupt</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>UPSTR_RES</name>
<description>Upstream Resume Interrupt</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>EPT_0</name>
<description>Endpoint 0 Interrupt</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>EPT_1</name>
<description>Endpoint 1 Interrupt</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>EPT_2</name>
<description>Endpoint 2 Interrupt</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>EPT_3</name>
<description>Endpoint 3 Interrupt</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>EPT_4</name>
<description>Endpoint 4 Interrupt</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>EPT_5</name>
<description>Endpoint 5 Interrupt</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>EPT_6</name>
<description>Endpoint 6 Interrupt</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>EPT_7</name>
<description>Endpoint 7 Interrupt</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>EPT_8</name>
<description>Endpoint 8 Interrupt</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>EPT_9</name>
<description>Endpoint 9 Interrupt</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>EPT_10</name>
<description>Endpoint 10 Interrupt</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>EPT_11</name>
<description>Endpoint 11 Interrupt</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>EPT_12</name>
<description>Endpoint 12 Interrupt</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>EPT_13</name>
<description>Endpoint 13 Interrupt</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>EPT_14</name>
<description>Endpoint 14 Interrupt</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>EPT_15</name>
<description>Endpoint 15 Interrupt</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DMA_1</name>
<description>DMA Channel 1 Interrupt</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DMA_2</name>
<description>DMA Channel 2 Interrupt</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DMA_3</name>
<description>DMA Channel 3 Interrupt</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DMA_4</name>
<description>DMA Channel 4 Interrupt</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DMA_5</name>
<description>DMA Channel 5 Interrupt</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DMA_6</name>
<description>DMA Channel 6 Interrupt</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DMA_7</name>
<description>DMA Channel 7 Interrupt</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>CLRINT</name>
<description>UDPHS Clear Interrupt Register</description>
<addressOffset>0x00000018</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>DET_SUSPD</name>
<description>Suspend Interrupt Clear</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>MICRO_SOF</name>
<description>Micro Start Of Frame Interrupt Clear</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>INT_SOF</name>
<description>Start Of Frame Interrupt Clear</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ENDRESET</name>
<description>End Of Reset Interrupt Clear</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>WAKE_UP</name>
<description>Wake Up CPU Interrupt Clear</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ENDOFRSM</name>
<description>End Of Resume Interrupt Clear</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>UPSTR_RES</name>
<description>Upstream Resume Interrupt Clear</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTRST</name>
<description>UDPHS Endpoints Reset Register</description>
<addressOffset>0x0000001C</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>EPT_0</name>
<description>Endpoint 0 Reset</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>EPT_1</name>
<description>Endpoint 1 Reset</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>EPT_2</name>
<description>Endpoint 2 Reset</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>EPT_3</name>
<description>Endpoint 3 Reset</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>EPT_4</name>
<description>Endpoint 4 Reset</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>EPT_5</name>
<description>Endpoint 5 Reset</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>EPT_6</name>
<description>Endpoint 6 Reset</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>EPT_7</name>
<description>Endpoint 7 Reset</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>EPT_8</name>
<description>Endpoint 8 Reset</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>EPT_9</name>
<description>Endpoint 9 Reset</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>EPT_10</name>
<description>Endpoint 10 Reset</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>EPT_11</name>
<description>Endpoint 11 Reset</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>EPT_12</name>
<description>Endpoint 12 Reset</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>EPT_13</name>
<description>Endpoint 13 Reset</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>EPT_14</name>
<description>Endpoint 14 Reset</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>EPT_15</name>
<description>Endpoint 15 Reset</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>TST</name>
<description>UDPHS Test Register</description>
<addressOffset>0x000000E0</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SPEED_CFG</name>
<description>Speed Configuration</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>NORMAL</name>
<description>Normal Mode: The macro is in Full Speed mode, ready to make a High Speed identification, if the host supports it and then to automatically switch to High Speed mode</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>HIGH_SPEED</name>
<description>Force High Speed: Set this value to force the hardware to work in High Speed mode. Only for debug or test purpose.</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>FULL_SPEED</name>
<description>Force Full Speed: Set this value to force the hardware to work only in Full Speed mode. In this configuration, the macro will not respond to a High Speed reset handshake.</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>TST_J</name>
<description>Test J Mode</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>TST_K</name>
<description>Test K Mode</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>TST_PKT</name>
<description>Test Packet Mode</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>OPMODE2</name>
<description>OpMode2</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>EPTCFG0</name>
<description>UDPHS Endpoint Configuration Register (endpoint = 0)</description>
<addressOffset>0x00000100</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>EPT_SIZE</name>
<description>Endpoint Size</description>
<bitOffset>0</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>8</name>
<description>8 bytes</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>16</name>
<description>16 bytes</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>32</name>
<description>32 bytes</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>64</name>
<description>64 bytes</description>
<value>0x3</value>
</enumeratedValue>
<enumeratedValue>
<name>128</name>
<description>128 bytes</description>
<value>0x4</value>
</enumeratedValue>
<enumeratedValue>
<name>256</name>
<description>256 bytes</description>
<value>0x5</value>
</enumeratedValue>
<enumeratedValue>
<name>512</name>
<description>512 bytes</description>
<value>0x6</value>
</enumeratedValue>
<enumeratedValue>
<name>1024</name>
<description>1024 bytes</description>
<value>0x7</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>EPT_DIR</name>
<description>Endpoint Direction</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>EPT_TYPE</name>
<description>Endpoint Type</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CTRL8</name>
<description>Control endpoint</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ISO</name>
<description>Isochronous endpoint</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>BULK</name>
<description>Bulk endpoint</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>INT</name>
<description>Interrupt endpoint</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>BK_NUMBER</name>
<description>Number of Banks</description>
<bitOffset>6</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>0</name>
<description>Zero bank, the endpoint is not mapped in memory</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>1</name>
<description>One bank (bank 0)</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>2</name>
<description>Double bank (Ping-Pong: bank0/bank1)</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>3</name>
<description>Triple bank (bank0/bank1/bank2)</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>NB_TRANS</name>
<description>Number Of Transaction per Microframe</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>EPT_MAPD</name>
<description>Endpoint Mapped</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>EPTCTLENB0</name>
<description>UDPHS Endpoint Control Enable Register (endpoint = 0)</description>
<addressOffset>0x00000104</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>EPT_ENABL</name>
<description>Endpoint Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupts Disable DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NYET_DIS</name>
<description>NYET Disable (Only for High Speed Bulk OUT endpoints)</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Enable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TX Packet Ready Interrupt Enable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RX_SETUP</name>
<description>Received SETUP</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>STALL_SNT</name>
<description>Stall Sent Interrupt Enable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_IN</name>
<description>NAKIN Interrupt Enable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_OUT</name>
<description>NAKOUT Interrupt Enable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Enable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Send/Short Packet Interrupt Enable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCTLENB0_ISOENDPT</name>
<description>UDPHS Endpoint Control Enable Register (endpoint = 0)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x00000104</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>EPT_ENABL</name>
<description>Endpoint Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupts Disable DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DATAX_RX</name>
<description>DATAx Interrupt Enable (Only for high bandwidth Isochronous OUT endpoints)</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>MDATA_RX</name>
<description>MDATA Interrupt Enable (Only for high bandwidth Isochronous OUT endpoints)</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Enable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY_TRER</name>
<description>TX Packet Ready/Transaction Error Interrupt Enable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FL_ISO</name>
<description>Error Flow Interrupt Enable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_CRC_NTR</name>
<description>ISO CRC Error/Number of Transaction Error Interrupt Enable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FLUSH</name>
<description>Bank Flush Error Interrupt Enable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Enable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Send/Short Packet Interrupt Enable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCTLDIS0</name>
<description>UDPHS Endpoint Control Disable Register (endpoint = 0)</description>
<addressOffset>0x00000108</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>EPT_DISABL</name>
<description>Endpoint Disable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Disable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupts Disable DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NYET_DIS</name>
<description>NYET Enable (Only for High Speed Bulk OUT endpoints)</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Disable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Disable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Disable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TX Packet Ready Interrupt Disable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RX_SETUP</name>
<description>Received SETUP Interrupt Disable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>STALL_SNT</name>
<description>Stall Sent Interrupt Disable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_IN</name>
<description>NAKIN Interrupt Disable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_OUT</name>
<description>NAKOUT Interrupt Disable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Disable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Interrupt Disable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCTLDIS0_ISOENDPT</name>
<description>UDPHS Endpoint Control Disable Register (endpoint = 0)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x00000108</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>EPT_DISABL</name>
<description>Endpoint Disable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Disable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupts Disable DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DATAX_RX</name>
<description>DATAx Interrupt Disable (Only for High Bandwidth Isochronous OUT endpoints)</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>MDATA_RX</name>
<description>MDATA Interrupt Disable (Only for High Bandwidth Isochronous OUT endpoints)</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Disable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Disable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Disable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY_TRER</name>
<description>TX Packet Ready/Transaction Error Interrupt Disable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FL_ISO</name>
<description>Error Flow Interrupt Disable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_CRC_NTR</name>
<description>ISO CRC Error/Number of Transaction Error Interrupt Disable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FLUSH</name>
<description>bank flush error Interrupt Disable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Disable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Interrupt Disable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCTL0</name>
<description>UDPHS Endpoint Control Register (endpoint = 0)</description>
<addressOffset>0x0000010C</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>EPT_ENABL</name>
<description>Endpoint Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Enabled (Not for CONTROL Endpoints)</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupt Disables DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NYET_DIS</name>
<description>NYET Disable (Only for High Speed Bulk OUT endpoints)</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Enabled</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Enabled</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Enabled</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TX Packet Ready Interrupt Enabled</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RX_SETUP</name>
<description>Received SETUP Interrupt Enabled</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>STALL_SNT</name>
<description>Stall Sent Interrupt Enabled</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NAK_IN</name>
<description>NAKIN Interrupt Enabled</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NAK_OUT</name>
<description>NAKOUT Interrupt Enabled</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Enabled</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Interrupt Enabled</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCTL0_ISOENDPT</name>
<description>UDPHS Endpoint Control Register (endpoint = 0)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x0000010C</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>EPT_ENABL</name>
<description>Endpoint Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Enabled</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupt Disables DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DATAX_RX</name>
<description>DATAx Interrupt Enabled (Only for High Bandwidth Isochronous OUT endpoints)</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>MDATA_RX</name>
<description>MDATA Interrupt Enabled (Only for High Bandwidth Isochronous OUT endpoints)</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Enabled</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Enabled</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Enabled</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY_TRER</name>
<description>TX Packet Ready/Transaction Error Interrupt Enabled</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_FL_ISO</name>
<description>Error Flow Interrupt Enabled</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_CRC_NTR</name>
<description>ISO CRC Error/Number of Transaction Error Interrupt Enabled</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_FLUSH</name>
<description>Bank Flush Error Interrupt Enabled</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Enabled</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Interrupt Enabled</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>EPTSETSTA0</name>
<description>UDPHS Endpoint Set Status Register (endpoint = 0)</description>
<addressOffset>0x00000114</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>FRCESTALL</name>
<description>Stall Handshake Request Set</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>KILL Bank Set (for IN Endpoint)</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TX Packet Ready Set</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTSETSTA0_ISOENDPT</name>
<description>UDPHS Endpoint Set Status Register (endpoint = 0)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x00000114</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>RXRDY_TXKL</name>
<description>KILL Bank Set (for IN Endpoint)</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY_TRER</name>
<description>TX Packet Ready Set</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCLRSTA0</name>
<description>UDPHS Endpoint Clear Status Register (endpoint = 0)</description>
<addressOffset>0x00000118</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>FRCESTALL</name>
<description>Stall Handshake Request Clear</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TOGGLESQ</name>
<description>Data Toggle Clear</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Clear</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Clear</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RX_SETUP</name>
<description>Received SETUP Clear</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>STALL_SNT</name>
<description>Stall Sent Clear</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_IN</name>
<description>NAKIN Clear</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_OUT</name>
<description>NAKOUT Clear</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCLRSTA0_ISOENDPT</name>
<description>UDPHS Endpoint Clear Status Register (endpoint = 0)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x00000118</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>TOGGLESQ</name>
<description>Data Toggle Clear</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Clear</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Clear</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FL_ISO</name>
<description>Error Flow Clear</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_CRC_NTR</name>
<description>Number of Transaction Error Clear</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FLUSH</name>
<description>Bank Flush Error Clear</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTSTA0</name>
<description>UDPHS Endpoint Status Register (endpoint = 0)</description>
<addressOffset>0x0000011C</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000040</resetValue>
<fields>
<field>
<name>FRCESTALL</name>
<description>Stall Handshake Request</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TOGGLESQ_STA</name>
<description>Toggle Sequencing</description>
<bitOffset>6</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>DATA0</name>
<description>DATA0</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>DATA1</name>
<description>DATA1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>DATA2</name>
<description>Reserved for High Bandwidth Isochronous Endpoint</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>MDATA</name>
<description>Reserved for High Bandwidth Isochronous Endpoint</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data/KILL Bank</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TX Packet Ready</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RX_SETUP</name>
<description>Received SETUP</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>STALL_SNT</name>
<description>Stall Sent</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NAK_IN</name>
<description>NAK IN</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NAK_OUT</name>
<description>NAK OUT</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CURBK_CTLDIR</name>
<description>Current Bank/Control Direction</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BUSY_BANK_STA</name>
<description>Busy Bank Number</description>
<bitOffset>18</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>1BUSYBANK</name>
<description>1 busy bank</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>2BUSYBANKS</name>
<description>2 busy banks</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>3BUSYBANKS</name>
<description>3 busy banks</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>BYTE_COUNT</name>
<description>UDPHS Byte Count</description>
<bitOffset>20</bitOffset>
<bitWidth>11</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>EPTSTA0_ISOENDPT</name>
<description>UDPHS Endpoint Status Register (endpoint = 0)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x0000011C</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000040</resetValue>
<fields>
<field>
<name>TOGGLESQ_STA</name>
<description>Toggle Sequencing</description>
<bitOffset>6</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>DATA0</name>
<description>DATA0</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>DATA1</name>
<description>DATA1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>DATA2</name>
<description>Data2 (only for High Bandwidth Isochronous Endpoint)</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>MDATA</name>
<description>MData (only for High Bandwidth Isochronous Endpoint)</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data/KILL Bank</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY_TRER</name>
<description>TX Packet Ready/Transaction Error</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_FL_ISO</name>
<description>Error Flow</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_CRC_NTR</name>
<description>CRC ISO Error/Number of Transaction Error</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_FLUSH</name>
<description>Bank Flush Error</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CURBK</name>
<description>Current Bank</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>BANK0</name>
<description>Bank 0 (or single bank)</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>BANK1</name>
<description>Bank 1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>BANK2</name>
<description>Bank 2</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>BUSY_BANK_STA</name>
<description>Busy Bank Number</description>
<bitOffset>18</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>1BUSYBANK</name>
<description>1 busy bank</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>2BUSYBANKS</name>
<description>2 busy banks</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>3BUSYBANKS</name>
<description>3 busy banks</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>BYTE_COUNT</name>
<description>UDPHS Byte Count</description>
<bitOffset>20</bitOffset>
<bitWidth>11</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCFG1</name>
<description>UDPHS Endpoint Configuration Register (endpoint = 1)</description>
<addressOffset>0x00000120</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>EPT_SIZE</name>
<description>Endpoint Size</description>
<bitOffset>0</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>8</name>
<description>8 bytes</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>16</name>
<description>16 bytes</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>32</name>
<description>32 bytes</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>64</name>
<description>64 bytes</description>
<value>0x3</value>
</enumeratedValue>
<enumeratedValue>
<name>128</name>
<description>128 bytes</description>
<value>0x4</value>
</enumeratedValue>
<enumeratedValue>
<name>256</name>
<description>256 bytes</description>
<value>0x5</value>
</enumeratedValue>
<enumeratedValue>
<name>512</name>
<description>512 bytes</description>
<value>0x6</value>
</enumeratedValue>
<enumeratedValue>
<name>1024</name>
<description>1024 bytes</description>
<value>0x7</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>EPT_DIR</name>
<description>Endpoint Direction</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>EPT_TYPE</name>
<description>Endpoint Type</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CTRL8</name>
<description>Control endpoint</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ISO</name>
<description>Isochronous endpoint</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>BULK</name>
<description>Bulk endpoint</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>INT</name>
<description>Interrupt endpoint</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>BK_NUMBER</name>
<description>Number of Banks</description>
<bitOffset>6</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>0</name>
<description>Zero bank, the endpoint is not mapped in memory</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>1</name>
<description>One bank (bank 0)</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>2</name>
<description>Double bank (Ping-Pong: bank0/bank1)</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>3</name>
<description>Triple bank (bank0/bank1/bank2)</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>NB_TRANS</name>
<description>Number Of Transaction per Microframe</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>EPT_MAPD</name>
<description>Endpoint Mapped</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>EPTCTLENB1</name>
<description>UDPHS Endpoint Control Enable Register (endpoint = 1)</description>
<addressOffset>0x00000124</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>EPT_ENABL</name>
<description>Endpoint Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupts Disable DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NYET_DIS</name>
<description>NYET Disable (Only for High Speed Bulk OUT endpoints)</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Enable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TX Packet Ready Interrupt Enable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RX_SETUP</name>
<description>Received SETUP</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>STALL_SNT</name>
<description>Stall Sent Interrupt Enable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_IN</name>
<description>NAKIN Interrupt Enable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_OUT</name>
<description>NAKOUT Interrupt Enable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Enable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Send/Short Packet Interrupt Enable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCTLENB1_ISOENDPT</name>
<description>UDPHS Endpoint Control Enable Register (endpoint = 1)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x00000124</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>EPT_ENABL</name>
<description>Endpoint Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupts Disable DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DATAX_RX</name>
<description>DATAx Interrupt Enable (Only for high bandwidth Isochronous OUT endpoints)</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>MDATA_RX</name>
<description>MDATA Interrupt Enable (Only for high bandwidth Isochronous OUT endpoints)</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Enable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY_TRER</name>
<description>TX Packet Ready/Transaction Error Interrupt Enable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FL_ISO</name>
<description>Error Flow Interrupt Enable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_CRC_NTR</name>
<description>ISO CRC Error/Number of Transaction Error Interrupt Enable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FLUSH</name>
<description>Bank Flush Error Interrupt Enable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Enable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Send/Short Packet Interrupt Enable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCTLDIS1</name>
<description>UDPHS Endpoint Control Disable Register (endpoint = 1)</description>
<addressOffset>0x00000128</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>EPT_DISABL</name>
<description>Endpoint Disable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Disable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupts Disable DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NYET_DIS</name>
<description>NYET Enable (Only for High Speed Bulk OUT endpoints)</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Disable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Disable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Disable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TX Packet Ready Interrupt Disable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RX_SETUP</name>
<description>Received SETUP Interrupt Disable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>STALL_SNT</name>
<description>Stall Sent Interrupt Disable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_IN</name>
<description>NAKIN Interrupt Disable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_OUT</name>
<description>NAKOUT Interrupt Disable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Disable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Interrupt Disable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCTLDIS1_ISOENDPT</name>
<description>UDPHS Endpoint Control Disable Register (endpoint = 1)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x00000128</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>EPT_DISABL</name>
<description>Endpoint Disable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Disable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupts Disable DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DATAX_RX</name>
<description>DATAx Interrupt Disable (Only for High Bandwidth Isochronous OUT endpoints)</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>MDATA_RX</name>
<description>MDATA Interrupt Disable (Only for High Bandwidth Isochronous OUT endpoints)</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Disable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Disable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Disable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY_TRER</name>
<description>TX Packet Ready/Transaction Error Interrupt Disable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FL_ISO</name>
<description>Error Flow Interrupt Disable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_CRC_NTR</name>
<description>ISO CRC Error/Number of Transaction Error Interrupt Disable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FLUSH</name>
<description>bank flush error Interrupt Disable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Disable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Interrupt Disable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCTL1</name>
<description>UDPHS Endpoint Control Register (endpoint = 1)</description>
<addressOffset>0x0000012C</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>EPT_ENABL</name>
<description>Endpoint Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Enabled (Not for CONTROL Endpoints)</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupt Disables DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NYET_DIS</name>
<description>NYET Disable (Only for High Speed Bulk OUT endpoints)</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Enabled</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Enabled</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Enabled</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TX Packet Ready Interrupt Enabled</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RX_SETUP</name>
<description>Received SETUP Interrupt Enabled</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>STALL_SNT</name>
<description>Stall Sent Interrupt Enabled</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NAK_IN</name>
<description>NAKIN Interrupt Enabled</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NAK_OUT</name>
<description>NAKOUT Interrupt Enabled</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Enabled</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Interrupt Enabled</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCTL1_ISOENDPT</name>
<description>UDPHS Endpoint Control Register (endpoint = 1)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x0000012C</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>EPT_ENABL</name>
<description>Endpoint Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Enabled</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupt Disables DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DATAX_RX</name>
<description>DATAx Interrupt Enabled (Only for High Bandwidth Isochronous OUT endpoints)</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>MDATA_RX</name>
<description>MDATA Interrupt Enabled (Only for High Bandwidth Isochronous OUT endpoints)</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Enabled</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Enabled</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Enabled</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY_TRER</name>
<description>TX Packet Ready/Transaction Error Interrupt Enabled</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_FL_ISO</name>
<description>Error Flow Interrupt Enabled</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_CRC_NTR</name>
<description>ISO CRC Error/Number of Transaction Error Interrupt Enabled</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_FLUSH</name>
<description>Bank Flush Error Interrupt Enabled</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Enabled</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Interrupt Enabled</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>EPTSETSTA1</name>
<description>UDPHS Endpoint Set Status Register (endpoint = 1)</description>
<addressOffset>0x00000134</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>FRCESTALL</name>
<description>Stall Handshake Request Set</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>KILL Bank Set (for IN Endpoint)</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TX Packet Ready Set</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTSETSTA1_ISOENDPT</name>
<description>UDPHS Endpoint Set Status Register (endpoint = 1)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x00000134</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>RXRDY_TXKL</name>
<description>KILL Bank Set (for IN Endpoint)</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY_TRER</name>
<description>TX Packet Ready Set</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCLRSTA1</name>
<description>UDPHS Endpoint Clear Status Register (endpoint = 1)</description>
<addressOffset>0x00000138</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>FRCESTALL</name>
<description>Stall Handshake Request Clear</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TOGGLESQ</name>
<description>Data Toggle Clear</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Clear</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Clear</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RX_SETUP</name>
<description>Received SETUP Clear</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>STALL_SNT</name>
<description>Stall Sent Clear</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_IN</name>
<description>NAKIN Clear</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_OUT</name>
<description>NAKOUT Clear</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCLRSTA1_ISOENDPT</name>
<description>UDPHS Endpoint Clear Status Register (endpoint = 1)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x00000138</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>TOGGLESQ</name>
<description>Data Toggle Clear</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Clear</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Clear</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FL_ISO</name>
<description>Error Flow Clear</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_CRC_NTR</name>
<description>Number of Transaction Error Clear</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FLUSH</name>
<description>Bank Flush Error Clear</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTSTA1</name>
<description>UDPHS Endpoint Status Register (endpoint = 1)</description>
<addressOffset>0x0000013C</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000040</resetValue>
<fields>
<field>
<name>FRCESTALL</name>
<description>Stall Handshake Request</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TOGGLESQ_STA</name>
<description>Toggle Sequencing</description>
<bitOffset>6</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>DATA0</name>
<description>DATA0</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>DATA1</name>
<description>DATA1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>DATA2</name>
<description>Reserved for High Bandwidth Isochronous Endpoint</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>MDATA</name>
<description>Reserved for High Bandwidth Isochronous Endpoint</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data/KILL Bank</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TX Packet Ready</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RX_SETUP</name>
<description>Received SETUP</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>STALL_SNT</name>
<description>Stall Sent</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NAK_IN</name>
<description>NAK IN</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NAK_OUT</name>
<description>NAK OUT</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CURBK_CTLDIR</name>
<description>Current Bank/Control Direction</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BUSY_BANK_STA</name>
<description>Busy Bank Number</description>
<bitOffset>18</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>1BUSYBANK</name>
<description>1 busy bank</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>2BUSYBANKS</name>
<description>2 busy banks</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>3BUSYBANKS</name>
<description>3 busy banks</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>BYTE_COUNT</name>
<description>UDPHS Byte Count</description>
<bitOffset>20</bitOffset>
<bitWidth>11</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>EPTSTA1_ISOENDPT</name>
<description>UDPHS Endpoint Status Register (endpoint = 1)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x0000013C</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000040</resetValue>
<fields>
<field>
<name>TOGGLESQ_STA</name>
<description>Toggle Sequencing</description>
<bitOffset>6</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>DATA0</name>
<description>DATA0</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>DATA1</name>
<description>DATA1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>DATA2</name>
<description>Data2 (only for High Bandwidth Isochronous Endpoint)</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>MDATA</name>
<description>MData (only for High Bandwidth Isochronous Endpoint)</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data/KILL Bank</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY_TRER</name>
<description>TX Packet Ready/Transaction Error</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_FL_ISO</name>
<description>Error Flow</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_CRC_NTR</name>
<description>CRC ISO Error/Number of Transaction Error</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_FLUSH</name>
<description>Bank Flush Error</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CURBK</name>
<description>Current Bank</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>BANK0</name>
<description>Bank 0 (or single bank)</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>BANK1</name>
<description>Bank 1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>BANK2</name>
<description>Bank 2</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>BUSY_BANK_STA</name>
<description>Busy Bank Number</description>
<bitOffset>18</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>1BUSYBANK</name>
<description>1 busy bank</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>2BUSYBANKS</name>
<description>2 busy banks</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>3BUSYBANKS</name>
<description>3 busy banks</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>BYTE_COUNT</name>
<description>UDPHS Byte Count</description>
<bitOffset>20</bitOffset>
<bitWidth>11</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCFG2</name>
<description>UDPHS Endpoint Configuration Register (endpoint = 2)</description>
<addressOffset>0x00000140</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>EPT_SIZE</name>
<description>Endpoint Size</description>
<bitOffset>0</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>8</name>
<description>8 bytes</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>16</name>
<description>16 bytes</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>32</name>
<description>32 bytes</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>64</name>
<description>64 bytes</description>
<value>0x3</value>
</enumeratedValue>
<enumeratedValue>
<name>128</name>
<description>128 bytes</description>
<value>0x4</value>
</enumeratedValue>
<enumeratedValue>
<name>256</name>
<description>256 bytes</description>
<value>0x5</value>
</enumeratedValue>
<enumeratedValue>
<name>512</name>
<description>512 bytes</description>
<value>0x6</value>
</enumeratedValue>
<enumeratedValue>
<name>1024</name>
<description>1024 bytes</description>
<value>0x7</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>EPT_DIR</name>
<description>Endpoint Direction</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>EPT_TYPE</name>
<description>Endpoint Type</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CTRL8</name>
<description>Control endpoint</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ISO</name>
<description>Isochronous endpoint</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>BULK</name>
<description>Bulk endpoint</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>INT</name>
<description>Interrupt endpoint</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>BK_NUMBER</name>
<description>Number of Banks</description>
<bitOffset>6</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>0</name>
<description>Zero bank, the endpoint is not mapped in memory</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>1</name>
<description>One bank (bank 0)</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>2</name>
<description>Double bank (Ping-Pong: bank0/bank1)</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>3</name>
<description>Triple bank (bank0/bank1/bank2)</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>NB_TRANS</name>
<description>Number Of Transaction per Microframe</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>EPT_MAPD</name>
<description>Endpoint Mapped</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>EPTCTLENB2</name>
<description>UDPHS Endpoint Control Enable Register (endpoint = 2)</description>
<addressOffset>0x00000144</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>EPT_ENABL</name>
<description>Endpoint Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupts Disable DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NYET_DIS</name>
<description>NYET Disable (Only for High Speed Bulk OUT endpoints)</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Enable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TX Packet Ready Interrupt Enable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RX_SETUP</name>
<description>Received SETUP</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>STALL_SNT</name>
<description>Stall Sent Interrupt Enable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_IN</name>
<description>NAKIN Interrupt Enable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_OUT</name>
<description>NAKOUT Interrupt Enable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Enable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Send/Short Packet Interrupt Enable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCTLENB2_ISOENDPT</name>
<description>UDPHS Endpoint Control Enable Register (endpoint = 2)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x00000144</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>EPT_ENABL</name>
<description>Endpoint Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupts Disable DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DATAX_RX</name>
<description>DATAx Interrupt Enable (Only for high bandwidth Isochronous OUT endpoints)</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>MDATA_RX</name>
<description>MDATA Interrupt Enable (Only for high bandwidth Isochronous OUT endpoints)</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Enable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY_TRER</name>
<description>TX Packet Ready/Transaction Error Interrupt Enable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FL_ISO</name>
<description>Error Flow Interrupt Enable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_CRC_NTR</name>
<description>ISO CRC Error/Number of Transaction Error Interrupt Enable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FLUSH</name>
<description>Bank Flush Error Interrupt Enable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Enable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Send/Short Packet Interrupt Enable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCTLDIS2</name>
<description>UDPHS Endpoint Control Disable Register (endpoint = 2)</description>
<addressOffset>0x00000148</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>EPT_DISABL</name>
<description>Endpoint Disable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Disable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupts Disable DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NYET_DIS</name>
<description>NYET Enable (Only for High Speed Bulk OUT endpoints)</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Disable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Disable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Disable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TX Packet Ready Interrupt Disable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RX_SETUP</name>
<description>Received SETUP Interrupt Disable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>STALL_SNT</name>
<description>Stall Sent Interrupt Disable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_IN</name>
<description>NAKIN Interrupt Disable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_OUT</name>
<description>NAKOUT Interrupt Disable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Disable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Interrupt Disable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCTLDIS2_ISOENDPT</name>
<description>UDPHS Endpoint Control Disable Register (endpoint = 2)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x00000148</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>EPT_DISABL</name>
<description>Endpoint Disable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Disable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupts Disable DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DATAX_RX</name>
<description>DATAx Interrupt Disable (Only for High Bandwidth Isochronous OUT endpoints)</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>MDATA_RX</name>
<description>MDATA Interrupt Disable (Only for High Bandwidth Isochronous OUT endpoints)</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Disable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Disable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Disable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY_TRER</name>
<description>TX Packet Ready/Transaction Error Interrupt Disable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FL_ISO</name>
<description>Error Flow Interrupt Disable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_CRC_NTR</name>
<description>ISO CRC Error/Number of Transaction Error Interrupt Disable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FLUSH</name>
<description>bank flush error Interrupt Disable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Disable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Interrupt Disable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCTL2</name>
<description>UDPHS Endpoint Control Register (endpoint = 2)</description>
<addressOffset>0x0000014C</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>EPT_ENABL</name>
<description>Endpoint Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Enabled (Not for CONTROL Endpoints)</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupt Disables DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NYET_DIS</name>
<description>NYET Disable (Only for High Speed Bulk OUT endpoints)</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Enabled</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Enabled</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Enabled</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TX Packet Ready Interrupt Enabled</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RX_SETUP</name>
<description>Received SETUP Interrupt Enabled</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>STALL_SNT</name>
<description>Stall Sent Interrupt Enabled</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NAK_IN</name>
<description>NAKIN Interrupt Enabled</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NAK_OUT</name>
<description>NAKOUT Interrupt Enabled</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Enabled</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Interrupt Enabled</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCTL2_ISOENDPT</name>
<description>UDPHS Endpoint Control Register (endpoint = 2)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x0000014C</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>EPT_ENABL</name>
<description>Endpoint Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Enabled</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupt Disables DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DATAX_RX</name>
<description>DATAx Interrupt Enabled (Only for High Bandwidth Isochronous OUT endpoints)</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>MDATA_RX</name>
<description>MDATA Interrupt Enabled (Only for High Bandwidth Isochronous OUT endpoints)</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Enabled</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Enabled</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Enabled</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY_TRER</name>
<description>TX Packet Ready/Transaction Error Interrupt Enabled</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_FL_ISO</name>
<description>Error Flow Interrupt Enabled</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_CRC_NTR</name>
<description>ISO CRC Error/Number of Transaction Error Interrupt Enabled</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_FLUSH</name>
<description>Bank Flush Error Interrupt Enabled</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Enabled</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Interrupt Enabled</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>EPTSETSTA2</name>
<description>UDPHS Endpoint Set Status Register (endpoint = 2)</description>
<addressOffset>0x00000154</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>FRCESTALL</name>
<description>Stall Handshake Request Set</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>KILL Bank Set (for IN Endpoint)</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TX Packet Ready Set</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTSETSTA2_ISOENDPT</name>
<description>UDPHS Endpoint Set Status Register (endpoint = 2)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x00000154</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>RXRDY_TXKL</name>
<description>KILL Bank Set (for IN Endpoint)</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY_TRER</name>
<description>TX Packet Ready Set</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCLRSTA2</name>
<description>UDPHS Endpoint Clear Status Register (endpoint = 2)</description>
<addressOffset>0x00000158</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>FRCESTALL</name>
<description>Stall Handshake Request Clear</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TOGGLESQ</name>
<description>Data Toggle Clear</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Clear</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Clear</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RX_SETUP</name>
<description>Received SETUP Clear</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>STALL_SNT</name>
<description>Stall Sent Clear</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_IN</name>
<description>NAKIN Clear</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_OUT</name>
<description>NAKOUT Clear</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCLRSTA2_ISOENDPT</name>
<description>UDPHS Endpoint Clear Status Register (endpoint = 2)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x00000158</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>TOGGLESQ</name>
<description>Data Toggle Clear</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Clear</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Clear</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FL_ISO</name>
<description>Error Flow Clear</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_CRC_NTR</name>
<description>Number of Transaction Error Clear</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FLUSH</name>
<description>Bank Flush Error Clear</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTSTA2</name>
<description>UDPHS Endpoint Status Register (endpoint = 2)</description>
<addressOffset>0x0000015C</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000040</resetValue>
<fields>
<field>
<name>FRCESTALL</name>
<description>Stall Handshake Request</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TOGGLESQ_STA</name>
<description>Toggle Sequencing</description>
<bitOffset>6</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>DATA0</name>
<description>DATA0</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>DATA1</name>
<description>DATA1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>DATA2</name>
<description>Reserved for High Bandwidth Isochronous Endpoint</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>MDATA</name>
<description>Reserved for High Bandwidth Isochronous Endpoint</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data/KILL Bank</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TX Packet Ready</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RX_SETUP</name>
<description>Received SETUP</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>STALL_SNT</name>
<description>Stall Sent</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NAK_IN</name>
<description>NAK IN</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NAK_OUT</name>
<description>NAK OUT</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CURBK_CTLDIR</name>
<description>Current Bank/Control Direction</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BUSY_BANK_STA</name>
<description>Busy Bank Number</description>
<bitOffset>18</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>1BUSYBANK</name>
<description>1 busy bank</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>2BUSYBANKS</name>
<description>2 busy banks</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>3BUSYBANKS</name>
<description>3 busy banks</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>BYTE_COUNT</name>
<description>UDPHS Byte Count</description>
<bitOffset>20</bitOffset>
<bitWidth>11</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>EPTSTA2_ISOENDPT</name>
<description>UDPHS Endpoint Status Register (endpoint = 2)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x0000015C</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000040</resetValue>
<fields>
<field>
<name>TOGGLESQ_STA</name>
<description>Toggle Sequencing</description>
<bitOffset>6</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>DATA0</name>
<description>DATA0</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>DATA1</name>
<description>DATA1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>DATA2</name>
<description>Data2 (only for High Bandwidth Isochronous Endpoint)</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>MDATA</name>
<description>MData (only for High Bandwidth Isochronous Endpoint)</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data/KILL Bank</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY_TRER</name>
<description>TX Packet Ready/Transaction Error</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_FL_ISO</name>
<description>Error Flow</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_CRC_NTR</name>
<description>CRC ISO Error/Number of Transaction Error</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_FLUSH</name>
<description>Bank Flush Error</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CURBK</name>
<description>Current Bank</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>BANK0</name>
<description>Bank 0 (or single bank)</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>BANK1</name>
<description>Bank 1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>BANK2</name>
<description>Bank 2</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>BUSY_BANK_STA</name>
<description>Busy Bank Number</description>
<bitOffset>18</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>1BUSYBANK</name>
<description>1 busy bank</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>2BUSYBANKS</name>
<description>2 busy banks</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>3BUSYBANKS</name>
<description>3 busy banks</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>BYTE_COUNT</name>
<description>UDPHS Byte Count</description>
<bitOffset>20</bitOffset>
<bitWidth>11</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCFG3</name>
<description>UDPHS Endpoint Configuration Register (endpoint = 3)</description>
<addressOffset>0x00000160</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>EPT_SIZE</name>
<description>Endpoint Size</description>
<bitOffset>0</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>8</name>
<description>8 bytes</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>16</name>
<description>16 bytes</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>32</name>
<description>32 bytes</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>64</name>
<description>64 bytes</description>
<value>0x3</value>
</enumeratedValue>
<enumeratedValue>
<name>128</name>
<description>128 bytes</description>
<value>0x4</value>
</enumeratedValue>
<enumeratedValue>
<name>256</name>
<description>256 bytes</description>
<value>0x5</value>
</enumeratedValue>
<enumeratedValue>
<name>512</name>
<description>512 bytes</description>
<value>0x6</value>
</enumeratedValue>
<enumeratedValue>
<name>1024</name>
<description>1024 bytes</description>
<value>0x7</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>EPT_DIR</name>
<description>Endpoint Direction</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>EPT_TYPE</name>
<description>Endpoint Type</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CTRL8</name>
<description>Control endpoint</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ISO</name>
<description>Isochronous endpoint</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>BULK</name>
<description>Bulk endpoint</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>INT</name>
<description>Interrupt endpoint</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>BK_NUMBER</name>
<description>Number of Banks</description>
<bitOffset>6</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>0</name>
<description>Zero bank, the endpoint is not mapped in memory</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>1</name>
<description>One bank (bank 0)</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>2</name>
<description>Double bank (Ping-Pong: bank0/bank1)</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>3</name>
<description>Triple bank (bank0/bank1/bank2)</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>NB_TRANS</name>
<description>Number Of Transaction per Microframe</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>EPT_MAPD</name>
<description>Endpoint Mapped</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>EPTCTLENB3</name>
<description>UDPHS Endpoint Control Enable Register (endpoint = 3)</description>
<addressOffset>0x00000164</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>EPT_ENABL</name>
<description>Endpoint Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupts Disable DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NYET_DIS</name>
<description>NYET Disable (Only for High Speed Bulk OUT endpoints)</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Enable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TX Packet Ready Interrupt Enable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RX_SETUP</name>
<description>Received SETUP</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>STALL_SNT</name>
<description>Stall Sent Interrupt Enable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_IN</name>
<description>NAKIN Interrupt Enable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_OUT</name>
<description>NAKOUT Interrupt Enable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Enable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Send/Short Packet Interrupt Enable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCTLENB3_ISOENDPT</name>
<description>UDPHS Endpoint Control Enable Register (endpoint = 3)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x00000164</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>EPT_ENABL</name>
<description>Endpoint Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupts Disable DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DATAX_RX</name>
<description>DATAx Interrupt Enable (Only for high bandwidth Isochronous OUT endpoints)</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>MDATA_RX</name>
<description>MDATA Interrupt Enable (Only for high bandwidth Isochronous OUT endpoints)</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Enable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY_TRER</name>
<description>TX Packet Ready/Transaction Error Interrupt Enable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FL_ISO</name>
<description>Error Flow Interrupt Enable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_CRC_NTR</name>
<description>ISO CRC Error/Number of Transaction Error Interrupt Enable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FLUSH</name>
<description>Bank Flush Error Interrupt Enable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Enable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Send/Short Packet Interrupt Enable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCTLDIS3</name>
<description>UDPHS Endpoint Control Disable Register (endpoint = 3)</description>
<addressOffset>0x00000168</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>EPT_DISABL</name>
<description>Endpoint Disable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Disable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupts Disable DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NYET_DIS</name>
<description>NYET Enable (Only for High Speed Bulk OUT endpoints)</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Disable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Disable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Disable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TX Packet Ready Interrupt Disable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RX_SETUP</name>
<description>Received SETUP Interrupt Disable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>STALL_SNT</name>
<description>Stall Sent Interrupt Disable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_IN</name>
<description>NAKIN Interrupt Disable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_OUT</name>
<description>NAKOUT Interrupt Disable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Disable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Interrupt Disable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCTLDIS3_ISOENDPT</name>
<description>UDPHS Endpoint Control Disable Register (endpoint = 3)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x00000168</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>EPT_DISABL</name>
<description>Endpoint Disable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Disable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupts Disable DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DATAX_RX</name>
<description>DATAx Interrupt Disable (Only for High Bandwidth Isochronous OUT endpoints)</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>MDATA_RX</name>
<description>MDATA Interrupt Disable (Only for High Bandwidth Isochronous OUT endpoints)</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Disable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Disable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Disable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY_TRER</name>
<description>TX Packet Ready/Transaction Error Interrupt Disable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FL_ISO</name>
<description>Error Flow Interrupt Disable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_CRC_NTR</name>
<description>ISO CRC Error/Number of Transaction Error Interrupt Disable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FLUSH</name>
<description>bank flush error Interrupt Disable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Disable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Interrupt Disable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCTL3</name>
<description>UDPHS Endpoint Control Register (endpoint = 3)</description>
<addressOffset>0x0000016C</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>EPT_ENABL</name>
<description>Endpoint Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Enabled (Not for CONTROL Endpoints)</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupt Disables DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NYET_DIS</name>
<description>NYET Disable (Only for High Speed Bulk OUT endpoints)</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Enabled</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Enabled</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Enabled</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TX Packet Ready Interrupt Enabled</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RX_SETUP</name>
<description>Received SETUP Interrupt Enabled</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>STALL_SNT</name>
<description>Stall Sent Interrupt Enabled</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NAK_IN</name>
<description>NAKIN Interrupt Enabled</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NAK_OUT</name>
<description>NAKOUT Interrupt Enabled</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Enabled</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Interrupt Enabled</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCTL3_ISOENDPT</name>
<description>UDPHS Endpoint Control Register (endpoint = 3)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x0000016C</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>EPT_ENABL</name>
<description>Endpoint Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Enabled</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupt Disables DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DATAX_RX</name>
<description>DATAx Interrupt Enabled (Only for High Bandwidth Isochronous OUT endpoints)</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>MDATA_RX</name>
<description>MDATA Interrupt Enabled (Only for High Bandwidth Isochronous OUT endpoints)</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Enabled</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Enabled</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Enabled</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY_TRER</name>
<description>TX Packet Ready/Transaction Error Interrupt Enabled</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_FL_ISO</name>
<description>Error Flow Interrupt Enabled</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_CRC_NTR</name>
<description>ISO CRC Error/Number of Transaction Error Interrupt Enabled</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_FLUSH</name>
<description>Bank Flush Error Interrupt Enabled</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Enabled</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Interrupt Enabled</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>EPTSETSTA3</name>
<description>UDPHS Endpoint Set Status Register (endpoint = 3)</description>
<addressOffset>0x00000174</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>FRCESTALL</name>
<description>Stall Handshake Request Set</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>KILL Bank Set (for IN Endpoint)</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TX Packet Ready Set</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTSETSTA3_ISOENDPT</name>
<description>UDPHS Endpoint Set Status Register (endpoint = 3)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x00000174</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>RXRDY_TXKL</name>
<description>KILL Bank Set (for IN Endpoint)</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY_TRER</name>
<description>TX Packet Ready Set</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCLRSTA3</name>
<description>UDPHS Endpoint Clear Status Register (endpoint = 3)</description>
<addressOffset>0x00000178</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>FRCESTALL</name>
<description>Stall Handshake Request Clear</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TOGGLESQ</name>
<description>Data Toggle Clear</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Clear</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Clear</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RX_SETUP</name>
<description>Received SETUP Clear</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>STALL_SNT</name>
<description>Stall Sent Clear</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_IN</name>
<description>NAKIN Clear</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_OUT</name>
<description>NAKOUT Clear</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCLRSTA3_ISOENDPT</name>
<description>UDPHS Endpoint Clear Status Register (endpoint = 3)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x00000178</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>TOGGLESQ</name>
<description>Data Toggle Clear</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Clear</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Clear</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FL_ISO</name>
<description>Error Flow Clear</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_CRC_NTR</name>
<description>Number of Transaction Error Clear</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FLUSH</name>
<description>Bank Flush Error Clear</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTSTA3</name>
<description>UDPHS Endpoint Status Register (endpoint = 3)</description>
<addressOffset>0x0000017C</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000040</resetValue>
<fields>
<field>
<name>FRCESTALL</name>
<description>Stall Handshake Request</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TOGGLESQ_STA</name>
<description>Toggle Sequencing</description>
<bitOffset>6</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>DATA0</name>
<description>DATA0</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>DATA1</name>
<description>DATA1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>DATA2</name>
<description>Reserved for High Bandwidth Isochronous Endpoint</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>MDATA</name>
<description>Reserved for High Bandwidth Isochronous Endpoint</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data/KILL Bank</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TX Packet Ready</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RX_SETUP</name>
<description>Received SETUP</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>STALL_SNT</name>
<description>Stall Sent</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NAK_IN</name>
<description>NAK IN</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NAK_OUT</name>
<description>NAK OUT</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CURBK_CTLDIR</name>
<description>Current Bank/Control Direction</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BUSY_BANK_STA</name>
<description>Busy Bank Number</description>
<bitOffset>18</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>1BUSYBANK</name>
<description>1 busy bank</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>2BUSYBANKS</name>
<description>2 busy banks</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>3BUSYBANKS</name>
<description>3 busy banks</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>BYTE_COUNT</name>
<description>UDPHS Byte Count</description>
<bitOffset>20</bitOffset>
<bitWidth>11</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>EPTSTA3_ISOENDPT</name>
<description>UDPHS Endpoint Status Register (endpoint = 3)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x0000017C</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000040</resetValue>
<fields>
<field>
<name>TOGGLESQ_STA</name>
<description>Toggle Sequencing</description>
<bitOffset>6</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>DATA0</name>
<description>DATA0</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>DATA1</name>
<description>DATA1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>DATA2</name>
<description>Data2 (only for High Bandwidth Isochronous Endpoint)</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>MDATA</name>
<description>MData (only for High Bandwidth Isochronous Endpoint)</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data/KILL Bank</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY_TRER</name>
<description>TX Packet Ready/Transaction Error</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_FL_ISO</name>
<description>Error Flow</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_CRC_NTR</name>
<description>CRC ISO Error/Number of Transaction Error</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_FLUSH</name>
<description>Bank Flush Error</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CURBK</name>
<description>Current Bank</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>BANK0</name>
<description>Bank 0 (or single bank)</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>BANK1</name>
<description>Bank 1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>BANK2</name>
<description>Bank 2</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>BUSY_BANK_STA</name>
<description>Busy Bank Number</description>
<bitOffset>18</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>1BUSYBANK</name>
<description>1 busy bank</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>2BUSYBANKS</name>
<description>2 busy banks</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>3BUSYBANKS</name>
<description>3 busy banks</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>BYTE_COUNT</name>
<description>UDPHS Byte Count</description>
<bitOffset>20</bitOffset>
<bitWidth>11</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCFG4</name>
<description>UDPHS Endpoint Configuration Register (endpoint = 4)</description>
<addressOffset>0x00000180</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>EPT_SIZE</name>
<description>Endpoint Size</description>
<bitOffset>0</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>8</name>
<description>8 bytes</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>16</name>
<description>16 bytes</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>32</name>
<description>32 bytes</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>64</name>
<description>64 bytes</description>
<value>0x3</value>
</enumeratedValue>
<enumeratedValue>
<name>128</name>
<description>128 bytes</description>
<value>0x4</value>
</enumeratedValue>
<enumeratedValue>
<name>256</name>
<description>256 bytes</description>
<value>0x5</value>
</enumeratedValue>
<enumeratedValue>
<name>512</name>
<description>512 bytes</description>
<value>0x6</value>
</enumeratedValue>
<enumeratedValue>
<name>1024</name>
<description>1024 bytes</description>
<value>0x7</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>EPT_DIR</name>
<description>Endpoint Direction</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>EPT_TYPE</name>
<description>Endpoint Type</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CTRL8</name>
<description>Control endpoint</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ISO</name>
<description>Isochronous endpoint</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>BULK</name>
<description>Bulk endpoint</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>INT</name>
<description>Interrupt endpoint</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>BK_NUMBER</name>
<description>Number of Banks</description>
<bitOffset>6</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>0</name>
<description>Zero bank, the endpoint is not mapped in memory</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>1</name>
<description>One bank (bank 0)</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>2</name>
<description>Double bank (Ping-Pong: bank0/bank1)</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>3</name>
<description>Triple bank (bank0/bank1/bank2)</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>NB_TRANS</name>
<description>Number Of Transaction per Microframe</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>EPT_MAPD</name>
<description>Endpoint Mapped</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>EPTCTLENB4</name>
<description>UDPHS Endpoint Control Enable Register (endpoint = 4)</description>
<addressOffset>0x00000184</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>EPT_ENABL</name>
<description>Endpoint Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupts Disable DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NYET_DIS</name>
<description>NYET Disable (Only for High Speed Bulk OUT endpoints)</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Enable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TX Packet Ready Interrupt Enable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RX_SETUP</name>
<description>Received SETUP</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>STALL_SNT</name>
<description>Stall Sent Interrupt Enable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_IN</name>
<description>NAKIN Interrupt Enable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_OUT</name>
<description>NAKOUT Interrupt Enable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Enable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Send/Short Packet Interrupt Enable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCTLENB4_ISOENDPT</name>
<description>UDPHS Endpoint Control Enable Register (endpoint = 4)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x00000184</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>EPT_ENABL</name>
<description>Endpoint Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupts Disable DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DATAX_RX</name>
<description>DATAx Interrupt Enable (Only for high bandwidth Isochronous OUT endpoints)</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>MDATA_RX</name>
<description>MDATA Interrupt Enable (Only for high bandwidth Isochronous OUT endpoints)</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Enable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY_TRER</name>
<description>TX Packet Ready/Transaction Error Interrupt Enable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FL_ISO</name>
<description>Error Flow Interrupt Enable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_CRC_NTR</name>
<description>ISO CRC Error/Number of Transaction Error Interrupt Enable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FLUSH</name>
<description>Bank Flush Error Interrupt Enable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Enable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Send/Short Packet Interrupt Enable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCTLDIS4</name>
<description>UDPHS Endpoint Control Disable Register (endpoint = 4)</description>
<addressOffset>0x00000188</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>EPT_DISABL</name>
<description>Endpoint Disable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Disable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupts Disable DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NYET_DIS</name>
<description>NYET Enable (Only for High Speed Bulk OUT endpoints)</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Disable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Disable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Disable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TX Packet Ready Interrupt Disable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RX_SETUP</name>
<description>Received SETUP Interrupt Disable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>STALL_SNT</name>
<description>Stall Sent Interrupt Disable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_IN</name>
<description>NAKIN Interrupt Disable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_OUT</name>
<description>NAKOUT Interrupt Disable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Disable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Interrupt Disable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCTLDIS4_ISOENDPT</name>
<description>UDPHS Endpoint Control Disable Register (endpoint = 4)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x00000188</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>EPT_DISABL</name>
<description>Endpoint Disable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Disable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupts Disable DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DATAX_RX</name>
<description>DATAx Interrupt Disable (Only for High Bandwidth Isochronous OUT endpoints)</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>MDATA_RX</name>
<description>MDATA Interrupt Disable (Only for High Bandwidth Isochronous OUT endpoints)</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Disable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Disable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Disable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY_TRER</name>
<description>TX Packet Ready/Transaction Error Interrupt Disable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FL_ISO</name>
<description>Error Flow Interrupt Disable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_CRC_NTR</name>
<description>ISO CRC Error/Number of Transaction Error Interrupt Disable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FLUSH</name>
<description>bank flush error Interrupt Disable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Disable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Interrupt Disable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCTL4</name>
<description>UDPHS Endpoint Control Register (endpoint = 4)</description>
<addressOffset>0x0000018C</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>EPT_ENABL</name>
<description>Endpoint Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Enabled (Not for CONTROL Endpoints)</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupt Disables DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NYET_DIS</name>
<description>NYET Disable (Only for High Speed Bulk OUT endpoints)</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Enabled</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Enabled</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Enabled</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TX Packet Ready Interrupt Enabled</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RX_SETUP</name>
<description>Received SETUP Interrupt Enabled</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>STALL_SNT</name>
<description>Stall Sent Interrupt Enabled</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NAK_IN</name>
<description>NAKIN Interrupt Enabled</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NAK_OUT</name>
<description>NAKOUT Interrupt Enabled</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Enabled</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Interrupt Enabled</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCTL4_ISOENDPT</name>
<description>UDPHS Endpoint Control Register (endpoint = 4)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x0000018C</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>EPT_ENABL</name>
<description>Endpoint Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Enabled</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupt Disables DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DATAX_RX</name>
<description>DATAx Interrupt Enabled (Only for High Bandwidth Isochronous OUT endpoints)</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>MDATA_RX</name>
<description>MDATA Interrupt Enabled (Only for High Bandwidth Isochronous OUT endpoints)</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Enabled</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Enabled</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Enabled</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY_TRER</name>
<description>TX Packet Ready/Transaction Error Interrupt Enabled</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_FL_ISO</name>
<description>Error Flow Interrupt Enabled</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_CRC_NTR</name>
<description>ISO CRC Error/Number of Transaction Error Interrupt Enabled</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_FLUSH</name>
<description>Bank Flush Error Interrupt Enabled</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Enabled</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Interrupt Enabled</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>EPTSETSTA4</name>
<description>UDPHS Endpoint Set Status Register (endpoint = 4)</description>
<addressOffset>0x00000194</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>FRCESTALL</name>
<description>Stall Handshake Request Set</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>KILL Bank Set (for IN Endpoint)</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TX Packet Ready Set</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTSETSTA4_ISOENDPT</name>
<description>UDPHS Endpoint Set Status Register (endpoint = 4)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x00000194</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>RXRDY_TXKL</name>
<description>KILL Bank Set (for IN Endpoint)</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY_TRER</name>
<description>TX Packet Ready Set</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCLRSTA4</name>
<description>UDPHS Endpoint Clear Status Register (endpoint = 4)</description>
<addressOffset>0x00000198</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>FRCESTALL</name>
<description>Stall Handshake Request Clear</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TOGGLESQ</name>
<description>Data Toggle Clear</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Clear</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Clear</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RX_SETUP</name>
<description>Received SETUP Clear</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>STALL_SNT</name>
<description>Stall Sent Clear</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_IN</name>
<description>NAKIN Clear</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_OUT</name>
<description>NAKOUT Clear</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCLRSTA4_ISOENDPT</name>
<description>UDPHS Endpoint Clear Status Register (endpoint = 4)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x00000198</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>TOGGLESQ</name>
<description>Data Toggle Clear</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Clear</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Clear</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FL_ISO</name>
<description>Error Flow Clear</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_CRC_NTR</name>
<description>Number of Transaction Error Clear</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FLUSH</name>
<description>Bank Flush Error Clear</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTSTA4</name>
<description>UDPHS Endpoint Status Register (endpoint = 4)</description>
<addressOffset>0x0000019C</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000040</resetValue>
<fields>
<field>
<name>FRCESTALL</name>
<description>Stall Handshake Request</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TOGGLESQ_STA</name>
<description>Toggle Sequencing</description>
<bitOffset>6</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>DATA0</name>
<description>DATA0</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>DATA1</name>
<description>DATA1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>DATA2</name>
<description>Reserved for High Bandwidth Isochronous Endpoint</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>MDATA</name>
<description>Reserved for High Bandwidth Isochronous Endpoint</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data/KILL Bank</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TX Packet Ready</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RX_SETUP</name>
<description>Received SETUP</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>STALL_SNT</name>
<description>Stall Sent</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NAK_IN</name>
<description>NAK IN</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NAK_OUT</name>
<description>NAK OUT</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CURBK_CTLDIR</name>
<description>Current Bank/Control Direction</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BUSY_BANK_STA</name>
<description>Busy Bank Number</description>
<bitOffset>18</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>1BUSYBANK</name>
<description>1 busy bank</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>2BUSYBANKS</name>
<description>2 busy banks</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>3BUSYBANKS</name>
<description>3 busy banks</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>BYTE_COUNT</name>
<description>UDPHS Byte Count</description>
<bitOffset>20</bitOffset>
<bitWidth>11</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>EPTSTA4_ISOENDPT</name>
<description>UDPHS Endpoint Status Register (endpoint = 4)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x0000019C</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000040</resetValue>
<fields>
<field>
<name>TOGGLESQ_STA</name>
<description>Toggle Sequencing</description>
<bitOffset>6</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>DATA0</name>
<description>DATA0</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>DATA1</name>
<description>DATA1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>DATA2</name>
<description>Data2 (only for High Bandwidth Isochronous Endpoint)</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>MDATA</name>
<description>MData (only for High Bandwidth Isochronous Endpoint)</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data/KILL Bank</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY_TRER</name>
<description>TX Packet Ready/Transaction Error</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_FL_ISO</name>
<description>Error Flow</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_CRC_NTR</name>
<description>CRC ISO Error/Number of Transaction Error</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_FLUSH</name>
<description>Bank Flush Error</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CURBK</name>
<description>Current Bank</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>BANK0</name>
<description>Bank 0 (or single bank)</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>BANK1</name>
<description>Bank 1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>BANK2</name>
<description>Bank 2</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>BUSY_BANK_STA</name>
<description>Busy Bank Number</description>
<bitOffset>18</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>1BUSYBANK</name>
<description>1 busy bank</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>2BUSYBANKS</name>
<description>2 busy banks</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>3BUSYBANKS</name>
<description>3 busy banks</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>BYTE_COUNT</name>
<description>UDPHS Byte Count</description>
<bitOffset>20</bitOffset>
<bitWidth>11</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCFG5</name>
<description>UDPHS Endpoint Configuration Register (endpoint = 5)</description>
<addressOffset>0x000001A0</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>EPT_SIZE</name>
<description>Endpoint Size</description>
<bitOffset>0</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>8</name>
<description>8 bytes</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>16</name>
<description>16 bytes</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>32</name>
<description>32 bytes</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>64</name>
<description>64 bytes</description>
<value>0x3</value>
</enumeratedValue>
<enumeratedValue>
<name>128</name>
<description>128 bytes</description>
<value>0x4</value>
</enumeratedValue>
<enumeratedValue>
<name>256</name>
<description>256 bytes</description>
<value>0x5</value>
</enumeratedValue>
<enumeratedValue>
<name>512</name>
<description>512 bytes</description>
<value>0x6</value>
</enumeratedValue>
<enumeratedValue>
<name>1024</name>
<description>1024 bytes</description>
<value>0x7</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>EPT_DIR</name>
<description>Endpoint Direction</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>EPT_TYPE</name>
<description>Endpoint Type</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CTRL8</name>
<description>Control endpoint</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ISO</name>
<description>Isochronous endpoint</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>BULK</name>
<description>Bulk endpoint</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>INT</name>
<description>Interrupt endpoint</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>BK_NUMBER</name>
<description>Number of Banks</description>
<bitOffset>6</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>0</name>
<description>Zero bank, the endpoint is not mapped in memory</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>1</name>
<description>One bank (bank 0)</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>2</name>
<description>Double bank (Ping-Pong: bank0/bank1)</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>3</name>
<description>Triple bank (bank0/bank1/bank2)</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>NB_TRANS</name>
<description>Number Of Transaction per Microframe</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>EPT_MAPD</name>
<description>Endpoint Mapped</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>EPTCTLENB5</name>
<description>UDPHS Endpoint Control Enable Register (endpoint = 5)</description>
<addressOffset>0x000001A4</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>EPT_ENABL</name>
<description>Endpoint Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupts Disable DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NYET_DIS</name>
<description>NYET Disable (Only for High Speed Bulk OUT endpoints)</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Enable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TX Packet Ready Interrupt Enable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RX_SETUP</name>
<description>Received SETUP</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>STALL_SNT</name>
<description>Stall Sent Interrupt Enable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_IN</name>
<description>NAKIN Interrupt Enable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_OUT</name>
<description>NAKOUT Interrupt Enable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Enable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Send/Short Packet Interrupt Enable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCTLENB5_ISOENDPT</name>
<description>UDPHS Endpoint Control Enable Register (endpoint = 5)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x000001A4</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>EPT_ENABL</name>
<description>Endpoint Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupts Disable DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DATAX_RX</name>
<description>DATAx Interrupt Enable (Only for high bandwidth Isochronous OUT endpoints)</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>MDATA_RX</name>
<description>MDATA Interrupt Enable (Only for high bandwidth Isochronous OUT endpoints)</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Enable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY_TRER</name>
<description>TX Packet Ready/Transaction Error Interrupt Enable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FL_ISO</name>
<description>Error Flow Interrupt Enable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_CRC_NTR</name>
<description>ISO CRC Error/Number of Transaction Error Interrupt Enable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FLUSH</name>
<description>Bank Flush Error Interrupt Enable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Enable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Send/Short Packet Interrupt Enable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCTLDIS5</name>
<description>UDPHS Endpoint Control Disable Register (endpoint = 5)</description>
<addressOffset>0x000001A8</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>EPT_DISABL</name>
<description>Endpoint Disable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Disable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupts Disable DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NYET_DIS</name>
<description>NYET Enable (Only for High Speed Bulk OUT endpoints)</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Disable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Disable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Disable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TX Packet Ready Interrupt Disable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RX_SETUP</name>
<description>Received SETUP Interrupt Disable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>STALL_SNT</name>
<description>Stall Sent Interrupt Disable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_IN</name>
<description>NAKIN Interrupt Disable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_OUT</name>
<description>NAKOUT Interrupt Disable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Disable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Interrupt Disable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCTLDIS5_ISOENDPT</name>
<description>UDPHS Endpoint Control Disable Register (endpoint = 5)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x000001A8</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>EPT_DISABL</name>
<description>Endpoint Disable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Disable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupts Disable DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DATAX_RX</name>
<description>DATAx Interrupt Disable (Only for High Bandwidth Isochronous OUT endpoints)</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>MDATA_RX</name>
<description>MDATA Interrupt Disable (Only for High Bandwidth Isochronous OUT endpoints)</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Disable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Disable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Disable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY_TRER</name>
<description>TX Packet Ready/Transaction Error Interrupt Disable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FL_ISO</name>
<description>Error Flow Interrupt Disable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_CRC_NTR</name>
<description>ISO CRC Error/Number of Transaction Error Interrupt Disable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FLUSH</name>
<description>bank flush error Interrupt Disable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Disable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Interrupt Disable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCTL5</name>
<description>UDPHS Endpoint Control Register (endpoint = 5)</description>
<addressOffset>0x000001AC</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>EPT_ENABL</name>
<description>Endpoint Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Enabled (Not for CONTROL Endpoints)</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupt Disables DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NYET_DIS</name>
<description>NYET Disable (Only for High Speed Bulk OUT endpoints)</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Enabled</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Enabled</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Enabled</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TX Packet Ready Interrupt Enabled</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RX_SETUP</name>
<description>Received SETUP Interrupt Enabled</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>STALL_SNT</name>
<description>Stall Sent Interrupt Enabled</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NAK_IN</name>
<description>NAKIN Interrupt Enabled</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NAK_OUT</name>
<description>NAKOUT Interrupt Enabled</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Enabled</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Interrupt Enabled</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCTL5_ISOENDPT</name>
<description>UDPHS Endpoint Control Register (endpoint = 5)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x000001AC</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>EPT_ENABL</name>
<description>Endpoint Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Enabled</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupt Disables DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DATAX_RX</name>
<description>DATAx Interrupt Enabled (Only for High Bandwidth Isochronous OUT endpoints)</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>MDATA_RX</name>
<description>MDATA Interrupt Enabled (Only for High Bandwidth Isochronous OUT endpoints)</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Enabled</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Enabled</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Enabled</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY_TRER</name>
<description>TX Packet Ready/Transaction Error Interrupt Enabled</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_FL_ISO</name>
<description>Error Flow Interrupt Enabled</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_CRC_NTR</name>
<description>ISO CRC Error/Number of Transaction Error Interrupt Enabled</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_FLUSH</name>
<description>Bank Flush Error Interrupt Enabled</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Enabled</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Interrupt Enabled</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>EPTSETSTA5</name>
<description>UDPHS Endpoint Set Status Register (endpoint = 5)</description>
<addressOffset>0x000001B4</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>FRCESTALL</name>
<description>Stall Handshake Request Set</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>KILL Bank Set (for IN Endpoint)</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TX Packet Ready Set</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTSETSTA5_ISOENDPT</name>
<description>UDPHS Endpoint Set Status Register (endpoint = 5)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x000001B4</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>RXRDY_TXKL</name>
<description>KILL Bank Set (for IN Endpoint)</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY_TRER</name>
<description>TX Packet Ready Set</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCLRSTA5</name>
<description>UDPHS Endpoint Clear Status Register (endpoint = 5)</description>
<addressOffset>0x000001B8</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>FRCESTALL</name>
<description>Stall Handshake Request Clear</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TOGGLESQ</name>
<description>Data Toggle Clear</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Clear</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Clear</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RX_SETUP</name>
<description>Received SETUP Clear</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>STALL_SNT</name>
<description>Stall Sent Clear</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_IN</name>
<description>NAKIN Clear</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_OUT</name>
<description>NAKOUT Clear</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCLRSTA5_ISOENDPT</name>
<description>UDPHS Endpoint Clear Status Register (endpoint = 5)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x000001B8</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>TOGGLESQ</name>
<description>Data Toggle Clear</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Clear</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Clear</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FL_ISO</name>
<description>Error Flow Clear</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_CRC_NTR</name>
<description>Number of Transaction Error Clear</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FLUSH</name>
<description>Bank Flush Error Clear</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTSTA5</name>
<description>UDPHS Endpoint Status Register (endpoint = 5)</description>
<addressOffset>0x000001BC</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000040</resetValue>
<fields>
<field>
<name>FRCESTALL</name>
<description>Stall Handshake Request</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TOGGLESQ_STA</name>
<description>Toggle Sequencing</description>
<bitOffset>6</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>DATA0</name>
<description>DATA0</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>DATA1</name>
<description>DATA1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>DATA2</name>
<description>Reserved for High Bandwidth Isochronous Endpoint</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>MDATA</name>
<description>Reserved for High Bandwidth Isochronous Endpoint</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data/KILL Bank</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TX Packet Ready</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RX_SETUP</name>
<description>Received SETUP</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>STALL_SNT</name>
<description>Stall Sent</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NAK_IN</name>
<description>NAK IN</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NAK_OUT</name>
<description>NAK OUT</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CURBK_CTLDIR</name>
<description>Current Bank/Control Direction</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BUSY_BANK_STA</name>
<description>Busy Bank Number</description>
<bitOffset>18</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>1BUSYBANK</name>
<description>1 busy bank</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>2BUSYBANKS</name>
<description>2 busy banks</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>3BUSYBANKS</name>
<description>3 busy banks</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>BYTE_COUNT</name>
<description>UDPHS Byte Count</description>
<bitOffset>20</bitOffset>
<bitWidth>11</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>EPTSTA5_ISOENDPT</name>
<description>UDPHS Endpoint Status Register (endpoint = 5)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x000001BC</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000040</resetValue>
<fields>
<field>
<name>TOGGLESQ_STA</name>
<description>Toggle Sequencing</description>
<bitOffset>6</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>DATA0</name>
<description>DATA0</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>DATA1</name>
<description>DATA1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>DATA2</name>
<description>Data2 (only for High Bandwidth Isochronous Endpoint)</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>MDATA</name>
<description>MData (only for High Bandwidth Isochronous Endpoint)</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data/KILL Bank</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY_TRER</name>
<description>TX Packet Ready/Transaction Error</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_FL_ISO</name>
<description>Error Flow</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_CRC_NTR</name>
<description>CRC ISO Error/Number of Transaction Error</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_FLUSH</name>
<description>Bank Flush Error</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CURBK</name>
<description>Current Bank</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>BANK0</name>
<description>Bank 0 (or single bank)</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>BANK1</name>
<description>Bank 1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>BANK2</name>
<description>Bank 2</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>BUSY_BANK_STA</name>
<description>Busy Bank Number</description>
<bitOffset>18</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>1BUSYBANK</name>
<description>1 busy bank</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>2BUSYBANKS</name>
<description>2 busy banks</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>3BUSYBANKS</name>
<description>3 busy banks</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>BYTE_COUNT</name>
<description>UDPHS Byte Count</description>
<bitOffset>20</bitOffset>
<bitWidth>11</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCFG6</name>
<description>UDPHS Endpoint Configuration Register (endpoint = 6)</description>
<addressOffset>0x000001C0</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>EPT_SIZE</name>
<description>Endpoint Size</description>
<bitOffset>0</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>8</name>
<description>8 bytes</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>16</name>
<description>16 bytes</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>32</name>
<description>32 bytes</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>64</name>
<description>64 bytes</description>
<value>0x3</value>
</enumeratedValue>
<enumeratedValue>
<name>128</name>
<description>128 bytes</description>
<value>0x4</value>
</enumeratedValue>
<enumeratedValue>
<name>256</name>
<description>256 bytes</description>
<value>0x5</value>
</enumeratedValue>
<enumeratedValue>
<name>512</name>
<description>512 bytes</description>
<value>0x6</value>
</enumeratedValue>
<enumeratedValue>
<name>1024</name>
<description>1024 bytes</description>
<value>0x7</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>EPT_DIR</name>
<description>Endpoint Direction</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>EPT_TYPE</name>
<description>Endpoint Type</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CTRL8</name>
<description>Control endpoint</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ISO</name>
<description>Isochronous endpoint</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>BULK</name>
<description>Bulk endpoint</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>INT</name>
<description>Interrupt endpoint</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>BK_NUMBER</name>
<description>Number of Banks</description>
<bitOffset>6</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>0</name>
<description>Zero bank, the endpoint is not mapped in memory</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>1</name>
<description>One bank (bank 0)</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>2</name>
<description>Double bank (Ping-Pong: bank0/bank1)</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>3</name>
<description>Triple bank (bank0/bank1/bank2)</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>NB_TRANS</name>
<description>Number Of Transaction per Microframe</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>EPT_MAPD</name>
<description>Endpoint Mapped</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>EPTCTLENB6</name>
<description>UDPHS Endpoint Control Enable Register (endpoint = 6)</description>
<addressOffset>0x000001C4</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>EPT_ENABL</name>
<description>Endpoint Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupts Disable DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NYET_DIS</name>
<description>NYET Disable (Only for High Speed Bulk OUT endpoints)</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Enable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TX Packet Ready Interrupt Enable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RX_SETUP</name>
<description>Received SETUP</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>STALL_SNT</name>
<description>Stall Sent Interrupt Enable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_IN</name>
<description>NAKIN Interrupt Enable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_OUT</name>
<description>NAKOUT Interrupt Enable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Enable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Send/Short Packet Interrupt Enable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCTLENB6_ISOENDPT</name>
<description>UDPHS Endpoint Control Enable Register (endpoint = 6)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x000001C4</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>EPT_ENABL</name>
<description>Endpoint Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupts Disable DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DATAX_RX</name>
<description>DATAx Interrupt Enable (Only for high bandwidth Isochronous OUT endpoints)</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>MDATA_RX</name>
<description>MDATA Interrupt Enable (Only for high bandwidth Isochronous OUT endpoints)</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Enable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY_TRER</name>
<description>TX Packet Ready/Transaction Error Interrupt Enable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FL_ISO</name>
<description>Error Flow Interrupt Enable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_CRC_NTR</name>
<description>ISO CRC Error/Number of Transaction Error Interrupt Enable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FLUSH</name>
<description>Bank Flush Error Interrupt Enable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Enable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Send/Short Packet Interrupt Enable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCTLDIS6</name>
<description>UDPHS Endpoint Control Disable Register (endpoint = 6)</description>
<addressOffset>0x000001C8</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>EPT_DISABL</name>
<description>Endpoint Disable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Disable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupts Disable DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NYET_DIS</name>
<description>NYET Enable (Only for High Speed Bulk OUT endpoints)</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Disable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Disable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Disable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TX Packet Ready Interrupt Disable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RX_SETUP</name>
<description>Received SETUP Interrupt Disable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>STALL_SNT</name>
<description>Stall Sent Interrupt Disable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_IN</name>
<description>NAKIN Interrupt Disable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_OUT</name>
<description>NAKOUT Interrupt Disable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Disable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Interrupt Disable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCTLDIS6_ISOENDPT</name>
<description>UDPHS Endpoint Control Disable Register (endpoint = 6)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x000001C8</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>EPT_DISABL</name>
<description>Endpoint Disable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Disable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupts Disable DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DATAX_RX</name>
<description>DATAx Interrupt Disable (Only for High Bandwidth Isochronous OUT endpoints)</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>MDATA_RX</name>
<description>MDATA Interrupt Disable (Only for High Bandwidth Isochronous OUT endpoints)</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Disable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Disable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Disable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY_TRER</name>
<description>TX Packet Ready/Transaction Error Interrupt Disable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FL_ISO</name>
<description>Error Flow Interrupt Disable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_CRC_NTR</name>
<description>ISO CRC Error/Number of Transaction Error Interrupt Disable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FLUSH</name>
<description>bank flush error Interrupt Disable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Disable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Interrupt Disable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCTL6</name>
<description>UDPHS Endpoint Control Register (endpoint = 6)</description>
<addressOffset>0x000001CC</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>EPT_ENABL</name>
<description>Endpoint Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Enabled (Not for CONTROL Endpoints)</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupt Disables DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NYET_DIS</name>
<description>NYET Disable (Only for High Speed Bulk OUT endpoints)</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Enabled</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Enabled</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Enabled</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TX Packet Ready Interrupt Enabled</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RX_SETUP</name>
<description>Received SETUP Interrupt Enabled</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>STALL_SNT</name>
<description>Stall Sent Interrupt Enabled</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NAK_IN</name>
<description>NAKIN Interrupt Enabled</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NAK_OUT</name>
<description>NAKOUT Interrupt Enabled</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Enabled</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Interrupt Enabled</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCTL6_ISOENDPT</name>
<description>UDPHS Endpoint Control Register (endpoint = 6)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x000001CC</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>EPT_ENABL</name>
<description>Endpoint Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Enabled</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupt Disables DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DATAX_RX</name>
<description>DATAx Interrupt Enabled (Only for High Bandwidth Isochronous OUT endpoints)</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>MDATA_RX</name>
<description>MDATA Interrupt Enabled (Only for High Bandwidth Isochronous OUT endpoints)</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Enabled</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Enabled</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Enabled</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY_TRER</name>
<description>TX Packet Ready/Transaction Error Interrupt Enabled</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_FL_ISO</name>
<description>Error Flow Interrupt Enabled</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_CRC_NTR</name>
<description>ISO CRC Error/Number of Transaction Error Interrupt Enabled</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_FLUSH</name>
<description>Bank Flush Error Interrupt Enabled</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Enabled</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Interrupt Enabled</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>EPTSETSTA6</name>
<description>UDPHS Endpoint Set Status Register (endpoint = 6)</description>
<addressOffset>0x000001D4</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>FRCESTALL</name>
<description>Stall Handshake Request Set</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>KILL Bank Set (for IN Endpoint)</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TX Packet Ready Set</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTSETSTA6_ISOENDPT</name>
<description>UDPHS Endpoint Set Status Register (endpoint = 6)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x000001D4</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>RXRDY_TXKL</name>
<description>KILL Bank Set (for IN Endpoint)</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY_TRER</name>
<description>TX Packet Ready Set</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCLRSTA6</name>
<description>UDPHS Endpoint Clear Status Register (endpoint = 6)</description>
<addressOffset>0x000001D8</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>FRCESTALL</name>
<description>Stall Handshake Request Clear</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TOGGLESQ</name>
<description>Data Toggle Clear</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Clear</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Clear</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RX_SETUP</name>
<description>Received SETUP Clear</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>STALL_SNT</name>
<description>Stall Sent Clear</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_IN</name>
<description>NAKIN Clear</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_OUT</name>
<description>NAKOUT Clear</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCLRSTA6_ISOENDPT</name>
<description>UDPHS Endpoint Clear Status Register (endpoint = 6)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x000001D8</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>TOGGLESQ</name>
<description>Data Toggle Clear</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Clear</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Clear</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FL_ISO</name>
<description>Error Flow Clear</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_CRC_NTR</name>
<description>Number of Transaction Error Clear</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FLUSH</name>
<description>Bank Flush Error Clear</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTSTA6</name>
<description>UDPHS Endpoint Status Register (endpoint = 6)</description>
<addressOffset>0x000001DC</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000040</resetValue>
<fields>
<field>
<name>FRCESTALL</name>
<description>Stall Handshake Request</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TOGGLESQ_STA</name>
<description>Toggle Sequencing</description>
<bitOffset>6</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>DATA0</name>
<description>DATA0</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>DATA1</name>
<description>DATA1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>DATA2</name>
<description>Reserved for High Bandwidth Isochronous Endpoint</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>MDATA</name>
<description>Reserved for High Bandwidth Isochronous Endpoint</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data/KILL Bank</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TX Packet Ready</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RX_SETUP</name>
<description>Received SETUP</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>STALL_SNT</name>
<description>Stall Sent</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NAK_IN</name>
<description>NAK IN</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NAK_OUT</name>
<description>NAK OUT</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CURBK_CTLDIR</name>
<description>Current Bank/Control Direction</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BUSY_BANK_STA</name>
<description>Busy Bank Number</description>
<bitOffset>18</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>1BUSYBANK</name>
<description>1 busy bank</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>2BUSYBANKS</name>
<description>2 busy banks</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>3BUSYBANKS</name>
<description>3 busy banks</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>BYTE_COUNT</name>
<description>UDPHS Byte Count</description>
<bitOffset>20</bitOffset>
<bitWidth>11</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>EPTSTA6_ISOENDPT</name>
<description>UDPHS Endpoint Status Register (endpoint = 6)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x000001DC</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000040</resetValue>
<fields>
<field>
<name>TOGGLESQ_STA</name>
<description>Toggle Sequencing</description>
<bitOffset>6</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>DATA0</name>
<description>DATA0</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>DATA1</name>
<description>DATA1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>DATA2</name>
<description>Data2 (only for High Bandwidth Isochronous Endpoint)</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>MDATA</name>
<description>MData (only for High Bandwidth Isochronous Endpoint)</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data/KILL Bank</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY_TRER</name>
<description>TX Packet Ready/Transaction Error</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_FL_ISO</name>
<description>Error Flow</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_CRC_NTR</name>
<description>CRC ISO Error/Number of Transaction Error</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_FLUSH</name>
<description>Bank Flush Error</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CURBK</name>
<description>Current Bank</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>BANK0</name>
<description>Bank 0 (or single bank)</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>BANK1</name>
<description>Bank 1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>BANK2</name>
<description>Bank 2</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>BUSY_BANK_STA</name>
<description>Busy Bank Number</description>
<bitOffset>18</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>1BUSYBANK</name>
<description>1 busy bank</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>2BUSYBANKS</name>
<description>2 busy banks</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>3BUSYBANKS</name>
<description>3 busy banks</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>BYTE_COUNT</name>
<description>UDPHS Byte Count</description>
<bitOffset>20</bitOffset>
<bitWidth>11</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCFG7</name>
<description>UDPHS Endpoint Configuration Register (endpoint = 7)</description>
<addressOffset>0x000001E0</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>EPT_SIZE</name>
<description>Endpoint Size</description>
<bitOffset>0</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>8</name>
<description>8 bytes</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>16</name>
<description>16 bytes</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>32</name>
<description>32 bytes</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>64</name>
<description>64 bytes</description>
<value>0x3</value>
</enumeratedValue>
<enumeratedValue>
<name>128</name>
<description>128 bytes</description>
<value>0x4</value>
</enumeratedValue>
<enumeratedValue>
<name>256</name>
<description>256 bytes</description>
<value>0x5</value>
</enumeratedValue>
<enumeratedValue>
<name>512</name>
<description>512 bytes</description>
<value>0x6</value>
</enumeratedValue>
<enumeratedValue>
<name>1024</name>
<description>1024 bytes</description>
<value>0x7</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>EPT_DIR</name>
<description>Endpoint Direction</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>EPT_TYPE</name>
<description>Endpoint Type</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CTRL8</name>
<description>Control endpoint</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ISO</name>
<description>Isochronous endpoint</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>BULK</name>
<description>Bulk endpoint</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>INT</name>
<description>Interrupt endpoint</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>BK_NUMBER</name>
<description>Number of Banks</description>
<bitOffset>6</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>0</name>
<description>Zero bank, the endpoint is not mapped in memory</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>1</name>
<description>One bank (bank 0)</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>2</name>
<description>Double bank (Ping-Pong: bank0/bank1)</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>3</name>
<description>Triple bank (bank0/bank1/bank2)</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>NB_TRANS</name>
<description>Number Of Transaction per Microframe</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>EPT_MAPD</name>
<description>Endpoint Mapped</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>EPTCTLENB7</name>
<description>UDPHS Endpoint Control Enable Register (endpoint = 7)</description>
<addressOffset>0x000001E4</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>EPT_ENABL</name>
<description>Endpoint Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupts Disable DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NYET_DIS</name>
<description>NYET Disable (Only for High Speed Bulk OUT endpoints)</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Enable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TX Packet Ready Interrupt Enable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RX_SETUP</name>
<description>Received SETUP</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>STALL_SNT</name>
<description>Stall Sent Interrupt Enable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_IN</name>
<description>NAKIN Interrupt Enable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_OUT</name>
<description>NAKOUT Interrupt Enable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Enable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Send/Short Packet Interrupt Enable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCTLENB7_ISOENDPT</name>
<description>UDPHS Endpoint Control Enable Register (endpoint = 7)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x000001E4</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>EPT_ENABL</name>
<description>Endpoint Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupts Disable DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DATAX_RX</name>
<description>DATAx Interrupt Enable (Only for high bandwidth Isochronous OUT endpoints)</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>MDATA_RX</name>
<description>MDATA Interrupt Enable (Only for high bandwidth Isochronous OUT endpoints)</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Enable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY_TRER</name>
<description>TX Packet Ready/Transaction Error Interrupt Enable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FL_ISO</name>
<description>Error Flow Interrupt Enable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_CRC_NTR</name>
<description>ISO CRC Error/Number of Transaction Error Interrupt Enable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FLUSH</name>
<description>Bank Flush Error Interrupt Enable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Enable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Send/Short Packet Interrupt Enable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCTLDIS7</name>
<description>UDPHS Endpoint Control Disable Register (endpoint = 7)</description>
<addressOffset>0x000001E8</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>EPT_DISABL</name>
<description>Endpoint Disable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Disable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupts Disable DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NYET_DIS</name>
<description>NYET Enable (Only for High Speed Bulk OUT endpoints)</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Disable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Disable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Disable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TX Packet Ready Interrupt Disable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RX_SETUP</name>
<description>Received SETUP Interrupt Disable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>STALL_SNT</name>
<description>Stall Sent Interrupt Disable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_IN</name>
<description>NAKIN Interrupt Disable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_OUT</name>
<description>NAKOUT Interrupt Disable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Disable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Interrupt Disable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCTLDIS7_ISOENDPT</name>
<description>UDPHS Endpoint Control Disable Register (endpoint = 7)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x000001E8</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>EPT_DISABL</name>
<description>Endpoint Disable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Disable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupts Disable DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DATAX_RX</name>
<description>DATAx Interrupt Disable (Only for High Bandwidth Isochronous OUT endpoints)</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>MDATA_RX</name>
<description>MDATA Interrupt Disable (Only for High Bandwidth Isochronous OUT endpoints)</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Disable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Disable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Disable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY_TRER</name>
<description>TX Packet Ready/Transaction Error Interrupt Disable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FL_ISO</name>
<description>Error Flow Interrupt Disable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_CRC_NTR</name>
<description>ISO CRC Error/Number of Transaction Error Interrupt Disable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FLUSH</name>
<description>bank flush error Interrupt Disable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Disable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Interrupt Disable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCTL7</name>
<description>UDPHS Endpoint Control Register (endpoint = 7)</description>
<addressOffset>0x000001EC</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>EPT_ENABL</name>
<description>Endpoint Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Enabled (Not for CONTROL Endpoints)</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupt Disables DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NYET_DIS</name>
<description>NYET Disable (Only for High Speed Bulk OUT endpoints)</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Enabled</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Enabled</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Enabled</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TX Packet Ready Interrupt Enabled</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RX_SETUP</name>
<description>Received SETUP Interrupt Enabled</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>STALL_SNT</name>
<description>Stall Sent Interrupt Enabled</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NAK_IN</name>
<description>NAKIN Interrupt Enabled</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NAK_OUT</name>
<description>NAKOUT Interrupt Enabled</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Enabled</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Interrupt Enabled</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCTL7_ISOENDPT</name>
<description>UDPHS Endpoint Control Register (endpoint = 7)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x000001EC</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>EPT_ENABL</name>
<description>Endpoint Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Enabled</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupt Disables DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DATAX_RX</name>
<description>DATAx Interrupt Enabled (Only for High Bandwidth Isochronous OUT endpoints)</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>MDATA_RX</name>
<description>MDATA Interrupt Enabled (Only for High Bandwidth Isochronous OUT endpoints)</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Enabled</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Enabled</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Enabled</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY_TRER</name>
<description>TX Packet Ready/Transaction Error Interrupt Enabled</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_FL_ISO</name>
<description>Error Flow Interrupt Enabled</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_CRC_NTR</name>
<description>ISO CRC Error/Number of Transaction Error Interrupt Enabled</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_FLUSH</name>
<description>Bank Flush Error Interrupt Enabled</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Enabled</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Interrupt Enabled</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>EPTSETSTA7</name>
<description>UDPHS Endpoint Set Status Register (endpoint = 7)</description>
<addressOffset>0x000001F4</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>FRCESTALL</name>
<description>Stall Handshake Request Set</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>KILL Bank Set (for IN Endpoint)</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TX Packet Ready Set</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTSETSTA7_ISOENDPT</name>
<description>UDPHS Endpoint Set Status Register (endpoint = 7)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x000001F4</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>RXRDY_TXKL</name>
<description>KILL Bank Set (for IN Endpoint)</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY_TRER</name>
<description>TX Packet Ready Set</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCLRSTA7</name>
<description>UDPHS Endpoint Clear Status Register (endpoint = 7)</description>
<addressOffset>0x000001F8</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>FRCESTALL</name>
<description>Stall Handshake Request Clear</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TOGGLESQ</name>
<description>Data Toggle Clear</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Clear</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Clear</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RX_SETUP</name>
<description>Received SETUP Clear</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>STALL_SNT</name>
<description>Stall Sent Clear</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_IN</name>
<description>NAKIN Clear</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_OUT</name>
<description>NAKOUT Clear</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCLRSTA7_ISOENDPT</name>
<description>UDPHS Endpoint Clear Status Register (endpoint = 7)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x000001F8</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>TOGGLESQ</name>
<description>Data Toggle Clear</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Clear</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Clear</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FL_ISO</name>
<description>Error Flow Clear</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_CRC_NTR</name>
<description>Number of Transaction Error Clear</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FLUSH</name>
<description>Bank Flush Error Clear</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTSTA7</name>
<description>UDPHS Endpoint Status Register (endpoint = 7)</description>
<addressOffset>0x000001FC</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000040</resetValue>
<fields>
<field>
<name>FRCESTALL</name>
<description>Stall Handshake Request</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TOGGLESQ_STA</name>
<description>Toggle Sequencing</description>
<bitOffset>6</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>DATA0</name>
<description>DATA0</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>DATA1</name>
<description>DATA1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>DATA2</name>
<description>Reserved for High Bandwidth Isochronous Endpoint</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>MDATA</name>
<description>Reserved for High Bandwidth Isochronous Endpoint</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data/KILL Bank</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TX Packet Ready</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RX_SETUP</name>
<description>Received SETUP</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>STALL_SNT</name>
<description>Stall Sent</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NAK_IN</name>
<description>NAK IN</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NAK_OUT</name>
<description>NAK OUT</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CURBK_CTLDIR</name>
<description>Current Bank/Control Direction</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BUSY_BANK_STA</name>
<description>Busy Bank Number</description>
<bitOffset>18</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>1BUSYBANK</name>
<description>1 busy bank</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>2BUSYBANKS</name>
<description>2 busy banks</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>3BUSYBANKS</name>
<description>3 busy banks</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>BYTE_COUNT</name>
<description>UDPHS Byte Count</description>
<bitOffset>20</bitOffset>
<bitWidth>11</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>EPTSTA7_ISOENDPT</name>
<description>UDPHS Endpoint Status Register (endpoint = 7)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x000001FC</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000040</resetValue>
<fields>
<field>
<name>TOGGLESQ_STA</name>
<description>Toggle Sequencing</description>
<bitOffset>6</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>DATA0</name>
<description>DATA0</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>DATA1</name>
<description>DATA1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>DATA2</name>
<description>Data2 (only for High Bandwidth Isochronous Endpoint)</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>MDATA</name>
<description>MData (only for High Bandwidth Isochronous Endpoint)</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data/KILL Bank</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY_TRER</name>
<description>TX Packet Ready/Transaction Error</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_FL_ISO</name>
<description>Error Flow</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_CRC_NTR</name>
<description>CRC ISO Error/Number of Transaction Error</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_FLUSH</name>
<description>Bank Flush Error</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CURBK</name>
<description>Current Bank</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>BANK0</name>
<description>Bank 0 (or single bank)</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>BANK1</name>
<description>Bank 1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>BANK2</name>
<description>Bank 2</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>BUSY_BANK_STA</name>
<description>Busy Bank Number</description>
<bitOffset>18</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>1BUSYBANK</name>
<description>1 busy bank</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>2BUSYBANKS</name>
<description>2 busy banks</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>3BUSYBANKS</name>
<description>3 busy banks</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>BYTE_COUNT</name>
<description>UDPHS Byte Count</description>
<bitOffset>20</bitOffset>
<bitWidth>11</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCFG8</name>
<description>UDPHS Endpoint Configuration Register (endpoint = 8)</description>
<addressOffset>0x00000200</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>EPT_SIZE</name>
<description>Endpoint Size</description>
<bitOffset>0</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>8</name>
<description>8 bytes</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>16</name>
<description>16 bytes</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>32</name>
<description>32 bytes</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>64</name>
<description>64 bytes</description>
<value>0x3</value>
</enumeratedValue>
<enumeratedValue>
<name>128</name>
<description>128 bytes</description>
<value>0x4</value>
</enumeratedValue>
<enumeratedValue>
<name>256</name>
<description>256 bytes</description>
<value>0x5</value>
</enumeratedValue>
<enumeratedValue>
<name>512</name>
<description>512 bytes</description>
<value>0x6</value>
</enumeratedValue>
<enumeratedValue>
<name>1024</name>
<description>1024 bytes</description>
<value>0x7</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>EPT_DIR</name>
<description>Endpoint Direction</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>EPT_TYPE</name>
<description>Endpoint Type</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CTRL8</name>
<description>Control endpoint</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ISO</name>
<description>Isochronous endpoint</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>BULK</name>
<description>Bulk endpoint</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>INT</name>
<description>Interrupt endpoint</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>BK_NUMBER</name>
<description>Number of Banks</description>
<bitOffset>6</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>0</name>
<description>Zero bank, the endpoint is not mapped in memory</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>1</name>
<description>One bank (bank 0)</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>2</name>
<description>Double bank (Ping-Pong: bank0/bank1)</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>3</name>
<description>Triple bank (bank0/bank1/bank2)</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>NB_TRANS</name>
<description>Number Of Transaction per Microframe</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>EPT_MAPD</name>
<description>Endpoint Mapped</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>EPTCTLENB8</name>
<description>UDPHS Endpoint Control Enable Register (endpoint = 8)</description>
<addressOffset>0x00000204</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>EPT_ENABL</name>
<description>Endpoint Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupts Disable DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NYET_DIS</name>
<description>NYET Disable (Only for High Speed Bulk OUT endpoints)</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Enable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TX Packet Ready Interrupt Enable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RX_SETUP</name>
<description>Received SETUP</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>STALL_SNT</name>
<description>Stall Sent Interrupt Enable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_IN</name>
<description>NAKIN Interrupt Enable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_OUT</name>
<description>NAKOUT Interrupt Enable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Enable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Send/Short Packet Interrupt Enable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCTLENB8_ISOENDPT</name>
<description>UDPHS Endpoint Control Enable Register (endpoint = 8)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x00000204</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>EPT_ENABL</name>
<description>Endpoint Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupts Disable DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DATAX_RX</name>
<description>DATAx Interrupt Enable (Only for high bandwidth Isochronous OUT endpoints)</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>MDATA_RX</name>
<description>MDATA Interrupt Enable (Only for high bandwidth Isochronous OUT endpoints)</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Enable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY_TRER</name>
<description>TX Packet Ready/Transaction Error Interrupt Enable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FL_ISO</name>
<description>Error Flow Interrupt Enable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_CRC_NTR</name>
<description>ISO CRC Error/Number of Transaction Error Interrupt Enable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FLUSH</name>
<description>Bank Flush Error Interrupt Enable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Enable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Send/Short Packet Interrupt Enable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCTLDIS8</name>
<description>UDPHS Endpoint Control Disable Register (endpoint = 8)</description>
<addressOffset>0x00000208</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>EPT_DISABL</name>
<description>Endpoint Disable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Disable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupts Disable DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NYET_DIS</name>
<description>NYET Enable (Only for High Speed Bulk OUT endpoints)</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Disable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Disable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Disable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TX Packet Ready Interrupt Disable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RX_SETUP</name>
<description>Received SETUP Interrupt Disable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>STALL_SNT</name>
<description>Stall Sent Interrupt Disable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_IN</name>
<description>NAKIN Interrupt Disable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_OUT</name>
<description>NAKOUT Interrupt Disable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Disable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Interrupt Disable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCTLDIS8_ISOENDPT</name>
<description>UDPHS Endpoint Control Disable Register (endpoint = 8)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x00000208</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>EPT_DISABL</name>
<description>Endpoint Disable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Disable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupts Disable DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DATAX_RX</name>
<description>DATAx Interrupt Disable (Only for High Bandwidth Isochronous OUT endpoints)</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>MDATA_RX</name>
<description>MDATA Interrupt Disable (Only for High Bandwidth Isochronous OUT endpoints)</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Disable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Disable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Disable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY_TRER</name>
<description>TX Packet Ready/Transaction Error Interrupt Disable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FL_ISO</name>
<description>Error Flow Interrupt Disable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_CRC_NTR</name>
<description>ISO CRC Error/Number of Transaction Error Interrupt Disable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FLUSH</name>
<description>bank flush error Interrupt Disable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Disable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Interrupt Disable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCTL8</name>
<description>UDPHS Endpoint Control Register (endpoint = 8)</description>
<addressOffset>0x0000020C</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>EPT_ENABL</name>
<description>Endpoint Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Enabled (Not for CONTROL Endpoints)</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupt Disables DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NYET_DIS</name>
<description>NYET Disable (Only for High Speed Bulk OUT endpoints)</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Enabled</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Enabled</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Enabled</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TX Packet Ready Interrupt Enabled</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RX_SETUP</name>
<description>Received SETUP Interrupt Enabled</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>STALL_SNT</name>
<description>Stall Sent Interrupt Enabled</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NAK_IN</name>
<description>NAKIN Interrupt Enabled</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NAK_OUT</name>
<description>NAKOUT Interrupt Enabled</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Enabled</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Interrupt Enabled</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCTL8_ISOENDPT</name>
<description>UDPHS Endpoint Control Register (endpoint = 8)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x0000020C</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>EPT_ENABL</name>
<description>Endpoint Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Enabled</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupt Disables DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DATAX_RX</name>
<description>DATAx Interrupt Enabled (Only for High Bandwidth Isochronous OUT endpoints)</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>MDATA_RX</name>
<description>MDATA Interrupt Enabled (Only for High Bandwidth Isochronous OUT endpoints)</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Enabled</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Enabled</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Enabled</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY_TRER</name>
<description>TX Packet Ready/Transaction Error Interrupt Enabled</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_FL_ISO</name>
<description>Error Flow Interrupt Enabled</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_CRC_NTR</name>
<description>ISO CRC Error/Number of Transaction Error Interrupt Enabled</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_FLUSH</name>
<description>Bank Flush Error Interrupt Enabled</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Enabled</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Interrupt Enabled</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>EPTSETSTA8</name>
<description>UDPHS Endpoint Set Status Register (endpoint = 8)</description>
<addressOffset>0x00000214</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>FRCESTALL</name>
<description>Stall Handshake Request Set</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>KILL Bank Set (for IN Endpoint)</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TX Packet Ready Set</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTSETSTA8_ISOENDPT</name>
<description>UDPHS Endpoint Set Status Register (endpoint = 8)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x00000214</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>RXRDY_TXKL</name>
<description>KILL Bank Set (for IN Endpoint)</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY_TRER</name>
<description>TX Packet Ready Set</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCLRSTA8</name>
<description>UDPHS Endpoint Clear Status Register (endpoint = 8)</description>
<addressOffset>0x00000218</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>FRCESTALL</name>
<description>Stall Handshake Request Clear</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TOGGLESQ</name>
<description>Data Toggle Clear</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Clear</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Clear</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RX_SETUP</name>
<description>Received SETUP Clear</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>STALL_SNT</name>
<description>Stall Sent Clear</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_IN</name>
<description>NAKIN Clear</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_OUT</name>
<description>NAKOUT Clear</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCLRSTA8_ISOENDPT</name>
<description>UDPHS Endpoint Clear Status Register (endpoint = 8)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x00000218</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>TOGGLESQ</name>
<description>Data Toggle Clear</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Clear</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Clear</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FL_ISO</name>
<description>Error Flow Clear</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_CRC_NTR</name>
<description>Number of Transaction Error Clear</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FLUSH</name>
<description>Bank Flush Error Clear</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTSTA8</name>
<description>UDPHS Endpoint Status Register (endpoint = 8)</description>
<addressOffset>0x0000021C</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000040</resetValue>
<fields>
<field>
<name>FRCESTALL</name>
<description>Stall Handshake Request</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TOGGLESQ_STA</name>
<description>Toggle Sequencing</description>
<bitOffset>6</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>DATA0</name>
<description>DATA0</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>DATA1</name>
<description>DATA1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>DATA2</name>
<description>Reserved for High Bandwidth Isochronous Endpoint</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>MDATA</name>
<description>Reserved for High Bandwidth Isochronous Endpoint</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data/KILL Bank</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TX Packet Ready</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RX_SETUP</name>
<description>Received SETUP</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>STALL_SNT</name>
<description>Stall Sent</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NAK_IN</name>
<description>NAK IN</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NAK_OUT</name>
<description>NAK OUT</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CURBK_CTLDIR</name>
<description>Current Bank/Control Direction</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BUSY_BANK_STA</name>
<description>Busy Bank Number</description>
<bitOffset>18</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>1BUSYBANK</name>
<description>1 busy bank</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>2BUSYBANKS</name>
<description>2 busy banks</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>3BUSYBANKS</name>
<description>3 busy banks</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>BYTE_COUNT</name>
<description>UDPHS Byte Count</description>
<bitOffset>20</bitOffset>
<bitWidth>11</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>EPTSTA8_ISOENDPT</name>
<description>UDPHS Endpoint Status Register (endpoint = 8)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x0000021C</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000040</resetValue>
<fields>
<field>
<name>TOGGLESQ_STA</name>
<description>Toggle Sequencing</description>
<bitOffset>6</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>DATA0</name>
<description>DATA0</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>DATA1</name>
<description>DATA1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>DATA2</name>
<description>Data2 (only for High Bandwidth Isochronous Endpoint)</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>MDATA</name>
<description>MData (only for High Bandwidth Isochronous Endpoint)</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data/KILL Bank</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY_TRER</name>
<description>TX Packet Ready/Transaction Error</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_FL_ISO</name>
<description>Error Flow</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_CRC_NTR</name>
<description>CRC ISO Error/Number of Transaction Error</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_FLUSH</name>
<description>Bank Flush Error</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CURBK</name>
<description>Current Bank</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>BANK0</name>
<description>Bank 0 (or single bank)</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>BANK1</name>
<description>Bank 1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>BANK2</name>
<description>Bank 2</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>BUSY_BANK_STA</name>
<description>Busy Bank Number</description>
<bitOffset>18</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>1BUSYBANK</name>
<description>1 busy bank</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>2BUSYBANKS</name>
<description>2 busy banks</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>3BUSYBANKS</name>
<description>3 busy banks</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>BYTE_COUNT</name>
<description>UDPHS Byte Count</description>
<bitOffset>20</bitOffset>
<bitWidth>11</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCFG9</name>
<description>UDPHS Endpoint Configuration Register (endpoint = 9)</description>
<addressOffset>0x00000220</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>EPT_SIZE</name>
<description>Endpoint Size</description>
<bitOffset>0</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>8</name>
<description>8 bytes</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>16</name>
<description>16 bytes</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>32</name>
<description>32 bytes</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>64</name>
<description>64 bytes</description>
<value>0x3</value>
</enumeratedValue>
<enumeratedValue>
<name>128</name>
<description>128 bytes</description>
<value>0x4</value>
</enumeratedValue>
<enumeratedValue>
<name>256</name>
<description>256 bytes</description>
<value>0x5</value>
</enumeratedValue>
<enumeratedValue>
<name>512</name>
<description>512 bytes</description>
<value>0x6</value>
</enumeratedValue>
<enumeratedValue>
<name>1024</name>
<description>1024 bytes</description>
<value>0x7</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>EPT_DIR</name>
<description>Endpoint Direction</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>EPT_TYPE</name>
<description>Endpoint Type</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CTRL8</name>
<description>Control endpoint</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ISO</name>
<description>Isochronous endpoint</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>BULK</name>
<description>Bulk endpoint</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>INT</name>
<description>Interrupt endpoint</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>BK_NUMBER</name>
<description>Number of Banks</description>
<bitOffset>6</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>0</name>
<description>Zero bank, the endpoint is not mapped in memory</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>1</name>
<description>One bank (bank 0)</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>2</name>
<description>Double bank (Ping-Pong: bank0/bank1)</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>3</name>
<description>Triple bank (bank0/bank1/bank2)</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>NB_TRANS</name>
<description>Number Of Transaction per Microframe</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>EPT_MAPD</name>
<description>Endpoint Mapped</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>EPTCTLENB9</name>
<description>UDPHS Endpoint Control Enable Register (endpoint = 9)</description>
<addressOffset>0x00000224</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>EPT_ENABL</name>
<description>Endpoint Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupts Disable DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NYET_DIS</name>
<description>NYET Disable (Only for High Speed Bulk OUT endpoints)</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Enable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TX Packet Ready Interrupt Enable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RX_SETUP</name>
<description>Received SETUP</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>STALL_SNT</name>
<description>Stall Sent Interrupt Enable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_IN</name>
<description>NAKIN Interrupt Enable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_OUT</name>
<description>NAKOUT Interrupt Enable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Enable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Send/Short Packet Interrupt Enable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCTLENB9_ISOENDPT</name>
<description>UDPHS Endpoint Control Enable Register (endpoint = 9)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x00000224</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>EPT_ENABL</name>
<description>Endpoint Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupts Disable DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DATAX_RX</name>
<description>DATAx Interrupt Enable (Only for high bandwidth Isochronous OUT endpoints)</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>MDATA_RX</name>
<description>MDATA Interrupt Enable (Only for high bandwidth Isochronous OUT endpoints)</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Enable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY_TRER</name>
<description>TX Packet Ready/Transaction Error Interrupt Enable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FL_ISO</name>
<description>Error Flow Interrupt Enable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_CRC_NTR</name>
<description>ISO CRC Error/Number of Transaction Error Interrupt Enable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FLUSH</name>
<description>Bank Flush Error Interrupt Enable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Enable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Send/Short Packet Interrupt Enable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCTLDIS9</name>
<description>UDPHS Endpoint Control Disable Register (endpoint = 9)</description>
<addressOffset>0x00000228</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>EPT_DISABL</name>
<description>Endpoint Disable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Disable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupts Disable DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NYET_DIS</name>
<description>NYET Enable (Only for High Speed Bulk OUT endpoints)</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Disable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Disable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Disable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TX Packet Ready Interrupt Disable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RX_SETUP</name>
<description>Received SETUP Interrupt Disable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>STALL_SNT</name>
<description>Stall Sent Interrupt Disable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_IN</name>
<description>NAKIN Interrupt Disable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_OUT</name>
<description>NAKOUT Interrupt Disable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Disable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Interrupt Disable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCTLDIS9_ISOENDPT</name>
<description>UDPHS Endpoint Control Disable Register (endpoint = 9)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x00000228</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>EPT_DISABL</name>
<description>Endpoint Disable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Disable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupts Disable DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DATAX_RX</name>
<description>DATAx Interrupt Disable (Only for High Bandwidth Isochronous OUT endpoints)</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>MDATA_RX</name>
<description>MDATA Interrupt Disable (Only for High Bandwidth Isochronous OUT endpoints)</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Disable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Disable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Disable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY_TRER</name>
<description>TX Packet Ready/Transaction Error Interrupt Disable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FL_ISO</name>
<description>Error Flow Interrupt Disable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_CRC_NTR</name>
<description>ISO CRC Error/Number of Transaction Error Interrupt Disable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FLUSH</name>
<description>bank flush error Interrupt Disable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Disable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Interrupt Disable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCTL9</name>
<description>UDPHS Endpoint Control Register (endpoint = 9)</description>
<addressOffset>0x0000022C</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>EPT_ENABL</name>
<description>Endpoint Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Enabled (Not for CONTROL Endpoints)</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupt Disables DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NYET_DIS</name>
<description>NYET Disable (Only for High Speed Bulk OUT endpoints)</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Enabled</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Enabled</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Enabled</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TX Packet Ready Interrupt Enabled</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RX_SETUP</name>
<description>Received SETUP Interrupt Enabled</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>STALL_SNT</name>
<description>Stall Sent Interrupt Enabled</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NAK_IN</name>
<description>NAKIN Interrupt Enabled</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NAK_OUT</name>
<description>NAKOUT Interrupt Enabled</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Enabled</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Interrupt Enabled</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCTL9_ISOENDPT</name>
<description>UDPHS Endpoint Control Register (endpoint = 9)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x0000022C</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>EPT_ENABL</name>
<description>Endpoint Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Enabled</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupt Disables DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DATAX_RX</name>
<description>DATAx Interrupt Enabled (Only for High Bandwidth Isochronous OUT endpoints)</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>MDATA_RX</name>
<description>MDATA Interrupt Enabled (Only for High Bandwidth Isochronous OUT endpoints)</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Enabled</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Enabled</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Enabled</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY_TRER</name>
<description>TX Packet Ready/Transaction Error Interrupt Enabled</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_FL_ISO</name>
<description>Error Flow Interrupt Enabled</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_CRC_NTR</name>
<description>ISO CRC Error/Number of Transaction Error Interrupt Enabled</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_FLUSH</name>
<description>Bank Flush Error Interrupt Enabled</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Enabled</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Interrupt Enabled</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>EPTSETSTA9</name>
<description>UDPHS Endpoint Set Status Register (endpoint = 9)</description>
<addressOffset>0x00000234</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>FRCESTALL</name>
<description>Stall Handshake Request Set</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>KILL Bank Set (for IN Endpoint)</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TX Packet Ready Set</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTSETSTA9_ISOENDPT</name>
<description>UDPHS Endpoint Set Status Register (endpoint = 9)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x00000234</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>RXRDY_TXKL</name>
<description>KILL Bank Set (for IN Endpoint)</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY_TRER</name>
<description>TX Packet Ready Set</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCLRSTA9</name>
<description>UDPHS Endpoint Clear Status Register (endpoint = 9)</description>
<addressOffset>0x00000238</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>FRCESTALL</name>
<description>Stall Handshake Request Clear</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TOGGLESQ</name>
<description>Data Toggle Clear</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Clear</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Clear</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RX_SETUP</name>
<description>Received SETUP Clear</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>STALL_SNT</name>
<description>Stall Sent Clear</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_IN</name>
<description>NAKIN Clear</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_OUT</name>
<description>NAKOUT Clear</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCLRSTA9_ISOENDPT</name>
<description>UDPHS Endpoint Clear Status Register (endpoint = 9)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x00000238</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>TOGGLESQ</name>
<description>Data Toggle Clear</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Clear</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Clear</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FL_ISO</name>
<description>Error Flow Clear</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_CRC_NTR</name>
<description>Number of Transaction Error Clear</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FLUSH</name>
<description>Bank Flush Error Clear</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTSTA9</name>
<description>UDPHS Endpoint Status Register (endpoint = 9)</description>
<addressOffset>0x0000023C</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000040</resetValue>
<fields>
<field>
<name>FRCESTALL</name>
<description>Stall Handshake Request</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TOGGLESQ_STA</name>
<description>Toggle Sequencing</description>
<bitOffset>6</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>DATA0</name>
<description>DATA0</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>DATA1</name>
<description>DATA1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>DATA2</name>
<description>Reserved for High Bandwidth Isochronous Endpoint</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>MDATA</name>
<description>Reserved for High Bandwidth Isochronous Endpoint</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data/KILL Bank</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TX Packet Ready</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RX_SETUP</name>
<description>Received SETUP</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>STALL_SNT</name>
<description>Stall Sent</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NAK_IN</name>
<description>NAK IN</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NAK_OUT</name>
<description>NAK OUT</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CURBK_CTLDIR</name>
<description>Current Bank/Control Direction</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BUSY_BANK_STA</name>
<description>Busy Bank Number</description>
<bitOffset>18</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>1BUSYBANK</name>
<description>1 busy bank</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>2BUSYBANKS</name>
<description>2 busy banks</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>3BUSYBANKS</name>
<description>3 busy banks</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>BYTE_COUNT</name>
<description>UDPHS Byte Count</description>
<bitOffset>20</bitOffset>
<bitWidth>11</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>EPTSTA9_ISOENDPT</name>
<description>UDPHS Endpoint Status Register (endpoint = 9)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x0000023C</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000040</resetValue>
<fields>
<field>
<name>TOGGLESQ_STA</name>
<description>Toggle Sequencing</description>
<bitOffset>6</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>DATA0</name>
<description>DATA0</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>DATA1</name>
<description>DATA1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>DATA2</name>
<description>Data2 (only for High Bandwidth Isochronous Endpoint)</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>MDATA</name>
<description>MData (only for High Bandwidth Isochronous Endpoint)</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data/KILL Bank</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY_TRER</name>
<description>TX Packet Ready/Transaction Error</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_FL_ISO</name>
<description>Error Flow</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_CRC_NTR</name>
<description>CRC ISO Error/Number of Transaction Error</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_FLUSH</name>
<description>Bank Flush Error</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CURBK</name>
<description>Current Bank</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>BANK0</name>
<description>Bank 0 (or single bank)</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>BANK1</name>
<description>Bank 1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>BANK2</name>
<description>Bank 2</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>BUSY_BANK_STA</name>
<description>Busy Bank Number</description>
<bitOffset>18</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>1BUSYBANK</name>
<description>1 busy bank</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>2BUSYBANKS</name>
<description>2 busy banks</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>3BUSYBANKS</name>
<description>3 busy banks</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>BYTE_COUNT</name>
<description>UDPHS Byte Count</description>
<bitOffset>20</bitOffset>
<bitWidth>11</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCFG10</name>
<description>UDPHS Endpoint Configuration Register (endpoint = 10)</description>
<addressOffset>0x00000240</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>EPT_SIZE</name>
<description>Endpoint Size</description>
<bitOffset>0</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>8</name>
<description>8 bytes</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>16</name>
<description>16 bytes</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>32</name>
<description>32 bytes</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>64</name>
<description>64 bytes</description>
<value>0x3</value>
</enumeratedValue>
<enumeratedValue>
<name>128</name>
<description>128 bytes</description>
<value>0x4</value>
</enumeratedValue>
<enumeratedValue>
<name>256</name>
<description>256 bytes</description>
<value>0x5</value>
</enumeratedValue>
<enumeratedValue>
<name>512</name>
<description>512 bytes</description>
<value>0x6</value>
</enumeratedValue>
<enumeratedValue>
<name>1024</name>
<description>1024 bytes</description>
<value>0x7</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>EPT_DIR</name>
<description>Endpoint Direction</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>EPT_TYPE</name>
<description>Endpoint Type</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CTRL8</name>
<description>Control endpoint</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ISO</name>
<description>Isochronous endpoint</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>BULK</name>
<description>Bulk endpoint</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>INT</name>
<description>Interrupt endpoint</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>BK_NUMBER</name>
<description>Number of Banks</description>
<bitOffset>6</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>0</name>
<description>Zero bank, the endpoint is not mapped in memory</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>1</name>
<description>One bank (bank 0)</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>2</name>
<description>Double bank (Ping-Pong: bank0/bank1)</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>3</name>
<description>Triple bank (bank0/bank1/bank2)</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>NB_TRANS</name>
<description>Number Of Transaction per Microframe</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>EPT_MAPD</name>
<description>Endpoint Mapped</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>EPTCTLENB10</name>
<description>UDPHS Endpoint Control Enable Register (endpoint = 10)</description>
<addressOffset>0x00000244</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>EPT_ENABL</name>
<description>Endpoint Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupts Disable DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NYET_DIS</name>
<description>NYET Disable (Only for High Speed Bulk OUT endpoints)</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Enable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TX Packet Ready Interrupt Enable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RX_SETUP</name>
<description>Received SETUP</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>STALL_SNT</name>
<description>Stall Sent Interrupt Enable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_IN</name>
<description>NAKIN Interrupt Enable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_OUT</name>
<description>NAKOUT Interrupt Enable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Enable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Send/Short Packet Interrupt Enable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCTLENB10_ISOENDPT</name>
<description>UDPHS Endpoint Control Enable Register (endpoint = 10)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x00000244</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>EPT_ENABL</name>
<description>Endpoint Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupts Disable DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DATAX_RX</name>
<description>DATAx Interrupt Enable (Only for high bandwidth Isochronous OUT endpoints)</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>MDATA_RX</name>
<description>MDATA Interrupt Enable (Only for high bandwidth Isochronous OUT endpoints)</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Enable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY_TRER</name>
<description>TX Packet Ready/Transaction Error Interrupt Enable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FL_ISO</name>
<description>Error Flow Interrupt Enable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_CRC_NTR</name>
<description>ISO CRC Error/Number of Transaction Error Interrupt Enable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FLUSH</name>
<description>Bank Flush Error Interrupt Enable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Enable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Send/Short Packet Interrupt Enable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCTLDIS10</name>
<description>UDPHS Endpoint Control Disable Register (endpoint = 10)</description>
<addressOffset>0x00000248</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>EPT_DISABL</name>
<description>Endpoint Disable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Disable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupts Disable DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NYET_DIS</name>
<description>NYET Enable (Only for High Speed Bulk OUT endpoints)</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Disable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Disable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Disable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TX Packet Ready Interrupt Disable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RX_SETUP</name>
<description>Received SETUP Interrupt Disable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>STALL_SNT</name>
<description>Stall Sent Interrupt Disable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_IN</name>
<description>NAKIN Interrupt Disable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_OUT</name>
<description>NAKOUT Interrupt Disable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Disable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Interrupt Disable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCTLDIS10_ISOENDPT</name>
<description>UDPHS Endpoint Control Disable Register (endpoint = 10)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x00000248</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>EPT_DISABL</name>
<description>Endpoint Disable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Disable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupts Disable DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DATAX_RX</name>
<description>DATAx Interrupt Disable (Only for High Bandwidth Isochronous OUT endpoints)</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>MDATA_RX</name>
<description>MDATA Interrupt Disable (Only for High Bandwidth Isochronous OUT endpoints)</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Disable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Disable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Disable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY_TRER</name>
<description>TX Packet Ready/Transaction Error Interrupt Disable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FL_ISO</name>
<description>Error Flow Interrupt Disable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_CRC_NTR</name>
<description>ISO CRC Error/Number of Transaction Error Interrupt Disable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FLUSH</name>
<description>bank flush error Interrupt Disable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Disable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Interrupt Disable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCTL10</name>
<description>UDPHS Endpoint Control Register (endpoint = 10)</description>
<addressOffset>0x0000024C</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>EPT_ENABL</name>
<description>Endpoint Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Enabled (Not for CONTROL Endpoints)</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupt Disables DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NYET_DIS</name>
<description>NYET Disable (Only for High Speed Bulk OUT endpoints)</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Enabled</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Enabled</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Enabled</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TX Packet Ready Interrupt Enabled</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RX_SETUP</name>
<description>Received SETUP Interrupt Enabled</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>STALL_SNT</name>
<description>Stall Sent Interrupt Enabled</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NAK_IN</name>
<description>NAKIN Interrupt Enabled</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NAK_OUT</name>
<description>NAKOUT Interrupt Enabled</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Enabled</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Interrupt Enabled</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCTL10_ISOENDPT</name>
<description>UDPHS Endpoint Control Register (endpoint = 10)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x0000024C</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>EPT_ENABL</name>
<description>Endpoint Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Enabled</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupt Disables DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DATAX_RX</name>
<description>DATAx Interrupt Enabled (Only for High Bandwidth Isochronous OUT endpoints)</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>MDATA_RX</name>
<description>MDATA Interrupt Enabled (Only for High Bandwidth Isochronous OUT endpoints)</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Enabled</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Enabled</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Enabled</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY_TRER</name>
<description>TX Packet Ready/Transaction Error Interrupt Enabled</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_FL_ISO</name>
<description>Error Flow Interrupt Enabled</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_CRC_NTR</name>
<description>ISO CRC Error/Number of Transaction Error Interrupt Enabled</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_FLUSH</name>
<description>Bank Flush Error Interrupt Enabled</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Enabled</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Interrupt Enabled</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>EPTSETSTA10</name>
<description>UDPHS Endpoint Set Status Register (endpoint = 10)</description>
<addressOffset>0x00000254</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>FRCESTALL</name>
<description>Stall Handshake Request Set</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>KILL Bank Set (for IN Endpoint)</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TX Packet Ready Set</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTSETSTA10_ISOENDPT</name>
<description>UDPHS Endpoint Set Status Register (endpoint = 10)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x00000254</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>RXRDY_TXKL</name>
<description>KILL Bank Set (for IN Endpoint)</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY_TRER</name>
<description>TX Packet Ready Set</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCLRSTA10</name>
<description>UDPHS Endpoint Clear Status Register (endpoint = 10)</description>
<addressOffset>0x00000258</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>FRCESTALL</name>
<description>Stall Handshake Request Clear</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TOGGLESQ</name>
<description>Data Toggle Clear</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Clear</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Clear</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RX_SETUP</name>
<description>Received SETUP Clear</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>STALL_SNT</name>
<description>Stall Sent Clear</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_IN</name>
<description>NAKIN Clear</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_OUT</name>
<description>NAKOUT Clear</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCLRSTA10_ISOENDPT</name>
<description>UDPHS Endpoint Clear Status Register (endpoint = 10)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x00000258</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>TOGGLESQ</name>
<description>Data Toggle Clear</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Clear</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Clear</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FL_ISO</name>
<description>Error Flow Clear</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_CRC_NTR</name>
<description>Number of Transaction Error Clear</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FLUSH</name>
<description>Bank Flush Error Clear</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTSTA10</name>
<description>UDPHS Endpoint Status Register (endpoint = 10)</description>
<addressOffset>0x0000025C</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000040</resetValue>
<fields>
<field>
<name>FRCESTALL</name>
<description>Stall Handshake Request</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TOGGLESQ_STA</name>
<description>Toggle Sequencing</description>
<bitOffset>6</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>DATA0</name>
<description>DATA0</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>DATA1</name>
<description>DATA1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>DATA2</name>
<description>Reserved for High Bandwidth Isochronous Endpoint</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>MDATA</name>
<description>Reserved for High Bandwidth Isochronous Endpoint</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data/KILL Bank</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TX Packet Ready</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RX_SETUP</name>
<description>Received SETUP</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>STALL_SNT</name>
<description>Stall Sent</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NAK_IN</name>
<description>NAK IN</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NAK_OUT</name>
<description>NAK OUT</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CURBK_CTLDIR</name>
<description>Current Bank/Control Direction</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BUSY_BANK_STA</name>
<description>Busy Bank Number</description>
<bitOffset>18</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>1BUSYBANK</name>
<description>1 busy bank</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>2BUSYBANKS</name>
<description>2 busy banks</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>3BUSYBANKS</name>
<description>3 busy banks</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>BYTE_COUNT</name>
<description>UDPHS Byte Count</description>
<bitOffset>20</bitOffset>
<bitWidth>11</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>EPTSTA10_ISOENDPT</name>
<description>UDPHS Endpoint Status Register (endpoint = 10)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x0000025C</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000040</resetValue>
<fields>
<field>
<name>TOGGLESQ_STA</name>
<description>Toggle Sequencing</description>
<bitOffset>6</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>DATA0</name>
<description>DATA0</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>DATA1</name>
<description>DATA1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>DATA2</name>
<description>Data2 (only for High Bandwidth Isochronous Endpoint)</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>MDATA</name>
<description>MData (only for High Bandwidth Isochronous Endpoint)</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data/KILL Bank</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY_TRER</name>
<description>TX Packet Ready/Transaction Error</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_FL_ISO</name>
<description>Error Flow</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_CRC_NTR</name>
<description>CRC ISO Error/Number of Transaction Error</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_FLUSH</name>
<description>Bank Flush Error</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CURBK</name>
<description>Current Bank</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>BANK0</name>
<description>Bank 0 (or single bank)</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>BANK1</name>
<description>Bank 1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>BANK2</name>
<description>Bank 2</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>BUSY_BANK_STA</name>
<description>Busy Bank Number</description>
<bitOffset>18</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>1BUSYBANK</name>
<description>1 busy bank</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>2BUSYBANKS</name>
<description>2 busy banks</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>3BUSYBANKS</name>
<description>3 busy banks</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>BYTE_COUNT</name>
<description>UDPHS Byte Count</description>
<bitOffset>20</bitOffset>
<bitWidth>11</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCFG11</name>
<description>UDPHS Endpoint Configuration Register (endpoint = 11)</description>
<addressOffset>0x00000260</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>EPT_SIZE</name>
<description>Endpoint Size</description>
<bitOffset>0</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>8</name>
<description>8 bytes</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>16</name>
<description>16 bytes</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>32</name>
<description>32 bytes</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>64</name>
<description>64 bytes</description>
<value>0x3</value>
</enumeratedValue>
<enumeratedValue>
<name>128</name>
<description>128 bytes</description>
<value>0x4</value>
</enumeratedValue>
<enumeratedValue>
<name>256</name>
<description>256 bytes</description>
<value>0x5</value>
</enumeratedValue>
<enumeratedValue>
<name>512</name>
<description>512 bytes</description>
<value>0x6</value>
</enumeratedValue>
<enumeratedValue>
<name>1024</name>
<description>1024 bytes</description>
<value>0x7</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>EPT_DIR</name>
<description>Endpoint Direction</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>EPT_TYPE</name>
<description>Endpoint Type</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CTRL8</name>
<description>Control endpoint</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ISO</name>
<description>Isochronous endpoint</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>BULK</name>
<description>Bulk endpoint</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>INT</name>
<description>Interrupt endpoint</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>BK_NUMBER</name>
<description>Number of Banks</description>
<bitOffset>6</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>0</name>
<description>Zero bank, the endpoint is not mapped in memory</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>1</name>
<description>One bank (bank 0)</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>2</name>
<description>Double bank (Ping-Pong: bank0/bank1)</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>3</name>
<description>Triple bank (bank0/bank1/bank2)</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>NB_TRANS</name>
<description>Number Of Transaction per Microframe</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>EPT_MAPD</name>
<description>Endpoint Mapped</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>EPTCTLENB11</name>
<description>UDPHS Endpoint Control Enable Register (endpoint = 11)</description>
<addressOffset>0x00000264</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>EPT_ENABL</name>
<description>Endpoint Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupts Disable DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NYET_DIS</name>
<description>NYET Disable (Only for High Speed Bulk OUT endpoints)</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Enable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TX Packet Ready Interrupt Enable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RX_SETUP</name>
<description>Received SETUP</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>STALL_SNT</name>
<description>Stall Sent Interrupt Enable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_IN</name>
<description>NAKIN Interrupt Enable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_OUT</name>
<description>NAKOUT Interrupt Enable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Enable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Send/Short Packet Interrupt Enable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCTLENB11_ISOENDPT</name>
<description>UDPHS Endpoint Control Enable Register (endpoint = 11)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x00000264</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>EPT_ENABL</name>
<description>Endpoint Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupts Disable DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DATAX_RX</name>
<description>DATAx Interrupt Enable (Only for high bandwidth Isochronous OUT endpoints)</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>MDATA_RX</name>
<description>MDATA Interrupt Enable (Only for high bandwidth Isochronous OUT endpoints)</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Enable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY_TRER</name>
<description>TX Packet Ready/Transaction Error Interrupt Enable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FL_ISO</name>
<description>Error Flow Interrupt Enable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_CRC_NTR</name>
<description>ISO CRC Error/Number of Transaction Error Interrupt Enable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FLUSH</name>
<description>Bank Flush Error Interrupt Enable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Enable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Send/Short Packet Interrupt Enable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCTLDIS11</name>
<description>UDPHS Endpoint Control Disable Register (endpoint = 11)</description>
<addressOffset>0x00000268</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>EPT_DISABL</name>
<description>Endpoint Disable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Disable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupts Disable DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NYET_DIS</name>
<description>NYET Enable (Only for High Speed Bulk OUT endpoints)</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Disable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Disable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Disable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TX Packet Ready Interrupt Disable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RX_SETUP</name>
<description>Received SETUP Interrupt Disable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>STALL_SNT</name>
<description>Stall Sent Interrupt Disable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_IN</name>
<description>NAKIN Interrupt Disable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_OUT</name>
<description>NAKOUT Interrupt Disable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Disable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Interrupt Disable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCTLDIS11_ISOENDPT</name>
<description>UDPHS Endpoint Control Disable Register (endpoint = 11)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x00000268</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>EPT_DISABL</name>
<description>Endpoint Disable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Disable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupts Disable DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DATAX_RX</name>
<description>DATAx Interrupt Disable (Only for High Bandwidth Isochronous OUT endpoints)</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>MDATA_RX</name>
<description>MDATA Interrupt Disable (Only for High Bandwidth Isochronous OUT endpoints)</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Disable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Disable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Disable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY_TRER</name>
<description>TX Packet Ready/Transaction Error Interrupt Disable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FL_ISO</name>
<description>Error Flow Interrupt Disable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_CRC_NTR</name>
<description>ISO CRC Error/Number of Transaction Error Interrupt Disable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FLUSH</name>
<description>bank flush error Interrupt Disable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Disable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Interrupt Disable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCTL11</name>
<description>UDPHS Endpoint Control Register (endpoint = 11)</description>
<addressOffset>0x0000026C</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>EPT_ENABL</name>
<description>Endpoint Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Enabled (Not for CONTROL Endpoints)</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupt Disables DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NYET_DIS</name>
<description>NYET Disable (Only for High Speed Bulk OUT endpoints)</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Enabled</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Enabled</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Enabled</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TX Packet Ready Interrupt Enabled</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RX_SETUP</name>
<description>Received SETUP Interrupt Enabled</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>STALL_SNT</name>
<description>Stall Sent Interrupt Enabled</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NAK_IN</name>
<description>NAKIN Interrupt Enabled</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NAK_OUT</name>
<description>NAKOUT Interrupt Enabled</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Enabled</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Interrupt Enabled</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCTL11_ISOENDPT</name>
<description>UDPHS Endpoint Control Register (endpoint = 11)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x0000026C</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>EPT_ENABL</name>
<description>Endpoint Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Enabled</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupt Disables DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DATAX_RX</name>
<description>DATAx Interrupt Enabled (Only for High Bandwidth Isochronous OUT endpoints)</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>MDATA_RX</name>
<description>MDATA Interrupt Enabled (Only for High Bandwidth Isochronous OUT endpoints)</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Enabled</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Enabled</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Enabled</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY_TRER</name>
<description>TX Packet Ready/Transaction Error Interrupt Enabled</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_FL_ISO</name>
<description>Error Flow Interrupt Enabled</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_CRC_NTR</name>
<description>ISO CRC Error/Number of Transaction Error Interrupt Enabled</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_FLUSH</name>
<description>Bank Flush Error Interrupt Enabled</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Enabled</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Interrupt Enabled</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>EPTSETSTA11</name>
<description>UDPHS Endpoint Set Status Register (endpoint = 11)</description>
<addressOffset>0x00000274</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>FRCESTALL</name>
<description>Stall Handshake Request Set</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>KILL Bank Set (for IN Endpoint)</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TX Packet Ready Set</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTSETSTA11_ISOENDPT</name>
<description>UDPHS Endpoint Set Status Register (endpoint = 11)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x00000274</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>RXRDY_TXKL</name>
<description>KILL Bank Set (for IN Endpoint)</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY_TRER</name>
<description>TX Packet Ready Set</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCLRSTA11</name>
<description>UDPHS Endpoint Clear Status Register (endpoint = 11)</description>
<addressOffset>0x00000278</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>FRCESTALL</name>
<description>Stall Handshake Request Clear</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TOGGLESQ</name>
<description>Data Toggle Clear</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Clear</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Clear</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RX_SETUP</name>
<description>Received SETUP Clear</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>STALL_SNT</name>
<description>Stall Sent Clear</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_IN</name>
<description>NAKIN Clear</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_OUT</name>
<description>NAKOUT Clear</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCLRSTA11_ISOENDPT</name>
<description>UDPHS Endpoint Clear Status Register (endpoint = 11)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x00000278</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>TOGGLESQ</name>
<description>Data Toggle Clear</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Clear</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Clear</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FL_ISO</name>
<description>Error Flow Clear</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_CRC_NTR</name>
<description>Number of Transaction Error Clear</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FLUSH</name>
<description>Bank Flush Error Clear</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTSTA11</name>
<description>UDPHS Endpoint Status Register (endpoint = 11)</description>
<addressOffset>0x0000027C</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000040</resetValue>
<fields>
<field>
<name>FRCESTALL</name>
<description>Stall Handshake Request</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TOGGLESQ_STA</name>
<description>Toggle Sequencing</description>
<bitOffset>6</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>DATA0</name>
<description>DATA0</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>DATA1</name>
<description>DATA1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>DATA2</name>
<description>Reserved for High Bandwidth Isochronous Endpoint</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>MDATA</name>
<description>Reserved for High Bandwidth Isochronous Endpoint</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data/KILL Bank</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TX Packet Ready</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RX_SETUP</name>
<description>Received SETUP</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>STALL_SNT</name>
<description>Stall Sent</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NAK_IN</name>
<description>NAK IN</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NAK_OUT</name>
<description>NAK OUT</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CURBK_CTLDIR</name>
<description>Current Bank/Control Direction</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BUSY_BANK_STA</name>
<description>Busy Bank Number</description>
<bitOffset>18</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>1BUSYBANK</name>
<description>1 busy bank</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>2BUSYBANKS</name>
<description>2 busy banks</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>3BUSYBANKS</name>
<description>3 busy banks</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>BYTE_COUNT</name>
<description>UDPHS Byte Count</description>
<bitOffset>20</bitOffset>
<bitWidth>11</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>EPTSTA11_ISOENDPT</name>
<description>UDPHS Endpoint Status Register (endpoint = 11)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x0000027C</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000040</resetValue>
<fields>
<field>
<name>TOGGLESQ_STA</name>
<description>Toggle Sequencing</description>
<bitOffset>6</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>DATA0</name>
<description>DATA0</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>DATA1</name>
<description>DATA1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>DATA2</name>
<description>Data2 (only for High Bandwidth Isochronous Endpoint)</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>MDATA</name>
<description>MData (only for High Bandwidth Isochronous Endpoint)</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data/KILL Bank</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY_TRER</name>
<description>TX Packet Ready/Transaction Error</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_FL_ISO</name>
<description>Error Flow</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_CRC_NTR</name>
<description>CRC ISO Error/Number of Transaction Error</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_FLUSH</name>
<description>Bank Flush Error</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CURBK</name>
<description>Current Bank</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>BANK0</name>
<description>Bank 0 (or single bank)</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>BANK1</name>
<description>Bank 1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>BANK2</name>
<description>Bank 2</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>BUSY_BANK_STA</name>
<description>Busy Bank Number</description>
<bitOffset>18</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>1BUSYBANK</name>
<description>1 busy bank</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>2BUSYBANKS</name>
<description>2 busy banks</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>3BUSYBANKS</name>
<description>3 busy banks</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>BYTE_COUNT</name>
<description>UDPHS Byte Count</description>
<bitOffset>20</bitOffset>
<bitWidth>11</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCFG12</name>
<description>UDPHS Endpoint Configuration Register (endpoint = 12)</description>
<addressOffset>0x00000280</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>EPT_SIZE</name>
<description>Endpoint Size</description>
<bitOffset>0</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>8</name>
<description>8 bytes</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>16</name>
<description>16 bytes</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>32</name>
<description>32 bytes</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>64</name>
<description>64 bytes</description>
<value>0x3</value>
</enumeratedValue>
<enumeratedValue>
<name>128</name>
<description>128 bytes</description>
<value>0x4</value>
</enumeratedValue>
<enumeratedValue>
<name>256</name>
<description>256 bytes</description>
<value>0x5</value>
</enumeratedValue>
<enumeratedValue>
<name>512</name>
<description>512 bytes</description>
<value>0x6</value>
</enumeratedValue>
<enumeratedValue>
<name>1024</name>
<description>1024 bytes</description>
<value>0x7</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>EPT_DIR</name>
<description>Endpoint Direction</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>EPT_TYPE</name>
<description>Endpoint Type</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CTRL8</name>
<description>Control endpoint</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ISO</name>
<description>Isochronous endpoint</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>BULK</name>
<description>Bulk endpoint</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>INT</name>
<description>Interrupt endpoint</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>BK_NUMBER</name>
<description>Number of Banks</description>
<bitOffset>6</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>0</name>
<description>Zero bank, the endpoint is not mapped in memory</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>1</name>
<description>One bank (bank 0)</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>2</name>
<description>Double bank (Ping-Pong: bank0/bank1)</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>3</name>
<description>Triple bank (bank0/bank1/bank2)</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>NB_TRANS</name>
<description>Number Of Transaction per Microframe</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>EPT_MAPD</name>
<description>Endpoint Mapped</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>EPTCTLENB12</name>
<description>UDPHS Endpoint Control Enable Register (endpoint = 12)</description>
<addressOffset>0x00000284</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>EPT_ENABL</name>
<description>Endpoint Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupts Disable DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NYET_DIS</name>
<description>NYET Disable (Only for High Speed Bulk OUT endpoints)</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Enable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TX Packet Ready Interrupt Enable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RX_SETUP</name>
<description>Received SETUP</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>STALL_SNT</name>
<description>Stall Sent Interrupt Enable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_IN</name>
<description>NAKIN Interrupt Enable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_OUT</name>
<description>NAKOUT Interrupt Enable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Enable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Send/Short Packet Interrupt Enable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCTLENB12_ISOENDPT</name>
<description>UDPHS Endpoint Control Enable Register (endpoint = 12)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x00000284</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>EPT_ENABL</name>
<description>Endpoint Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupts Disable DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DATAX_RX</name>
<description>DATAx Interrupt Enable (Only for high bandwidth Isochronous OUT endpoints)</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>MDATA_RX</name>
<description>MDATA Interrupt Enable (Only for high bandwidth Isochronous OUT endpoints)</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Enable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY_TRER</name>
<description>TX Packet Ready/Transaction Error Interrupt Enable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FL_ISO</name>
<description>Error Flow Interrupt Enable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_CRC_NTR</name>
<description>ISO CRC Error/Number of Transaction Error Interrupt Enable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FLUSH</name>
<description>Bank Flush Error Interrupt Enable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Enable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Send/Short Packet Interrupt Enable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCTLDIS12</name>
<description>UDPHS Endpoint Control Disable Register (endpoint = 12)</description>
<addressOffset>0x00000288</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>EPT_DISABL</name>
<description>Endpoint Disable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Disable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupts Disable DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NYET_DIS</name>
<description>NYET Enable (Only for High Speed Bulk OUT endpoints)</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Disable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Disable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Disable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TX Packet Ready Interrupt Disable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RX_SETUP</name>
<description>Received SETUP Interrupt Disable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>STALL_SNT</name>
<description>Stall Sent Interrupt Disable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_IN</name>
<description>NAKIN Interrupt Disable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_OUT</name>
<description>NAKOUT Interrupt Disable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Disable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Interrupt Disable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCTLDIS12_ISOENDPT</name>
<description>UDPHS Endpoint Control Disable Register (endpoint = 12)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x00000288</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>EPT_DISABL</name>
<description>Endpoint Disable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Disable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupts Disable DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DATAX_RX</name>
<description>DATAx Interrupt Disable (Only for High Bandwidth Isochronous OUT endpoints)</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>MDATA_RX</name>
<description>MDATA Interrupt Disable (Only for High Bandwidth Isochronous OUT endpoints)</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Disable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Disable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Disable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY_TRER</name>
<description>TX Packet Ready/Transaction Error Interrupt Disable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FL_ISO</name>
<description>Error Flow Interrupt Disable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_CRC_NTR</name>
<description>ISO CRC Error/Number of Transaction Error Interrupt Disable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FLUSH</name>
<description>bank flush error Interrupt Disable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Disable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Interrupt Disable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCTL12</name>
<description>UDPHS Endpoint Control Register (endpoint = 12)</description>
<addressOffset>0x0000028C</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>EPT_ENABL</name>
<description>Endpoint Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Enabled (Not for CONTROL Endpoints)</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupt Disables DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NYET_DIS</name>
<description>NYET Disable (Only for High Speed Bulk OUT endpoints)</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Enabled</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Enabled</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Enabled</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TX Packet Ready Interrupt Enabled</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RX_SETUP</name>
<description>Received SETUP Interrupt Enabled</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>STALL_SNT</name>
<description>Stall Sent Interrupt Enabled</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NAK_IN</name>
<description>NAKIN Interrupt Enabled</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NAK_OUT</name>
<description>NAKOUT Interrupt Enabled</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Enabled</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Interrupt Enabled</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCTL12_ISOENDPT</name>
<description>UDPHS Endpoint Control Register (endpoint = 12)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x0000028C</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>EPT_ENABL</name>
<description>Endpoint Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Enabled</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupt Disables DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DATAX_RX</name>
<description>DATAx Interrupt Enabled (Only for High Bandwidth Isochronous OUT endpoints)</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>MDATA_RX</name>
<description>MDATA Interrupt Enabled (Only for High Bandwidth Isochronous OUT endpoints)</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Enabled</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Enabled</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Enabled</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY_TRER</name>
<description>TX Packet Ready/Transaction Error Interrupt Enabled</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_FL_ISO</name>
<description>Error Flow Interrupt Enabled</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_CRC_NTR</name>
<description>ISO CRC Error/Number of Transaction Error Interrupt Enabled</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_FLUSH</name>
<description>Bank Flush Error Interrupt Enabled</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Enabled</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Interrupt Enabled</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>EPTSETSTA12</name>
<description>UDPHS Endpoint Set Status Register (endpoint = 12)</description>
<addressOffset>0x00000294</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>FRCESTALL</name>
<description>Stall Handshake Request Set</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>KILL Bank Set (for IN Endpoint)</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TX Packet Ready Set</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTSETSTA12_ISOENDPT</name>
<description>UDPHS Endpoint Set Status Register (endpoint = 12)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x00000294</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>RXRDY_TXKL</name>
<description>KILL Bank Set (for IN Endpoint)</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY_TRER</name>
<description>TX Packet Ready Set</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCLRSTA12</name>
<description>UDPHS Endpoint Clear Status Register (endpoint = 12)</description>
<addressOffset>0x00000298</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>FRCESTALL</name>
<description>Stall Handshake Request Clear</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TOGGLESQ</name>
<description>Data Toggle Clear</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Clear</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Clear</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RX_SETUP</name>
<description>Received SETUP Clear</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>STALL_SNT</name>
<description>Stall Sent Clear</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_IN</name>
<description>NAKIN Clear</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_OUT</name>
<description>NAKOUT Clear</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCLRSTA12_ISOENDPT</name>
<description>UDPHS Endpoint Clear Status Register (endpoint = 12)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x00000298</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>TOGGLESQ</name>
<description>Data Toggle Clear</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Clear</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Clear</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FL_ISO</name>
<description>Error Flow Clear</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_CRC_NTR</name>
<description>Number of Transaction Error Clear</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FLUSH</name>
<description>Bank Flush Error Clear</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTSTA12</name>
<description>UDPHS Endpoint Status Register (endpoint = 12)</description>
<addressOffset>0x0000029C</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000040</resetValue>
<fields>
<field>
<name>FRCESTALL</name>
<description>Stall Handshake Request</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TOGGLESQ_STA</name>
<description>Toggle Sequencing</description>
<bitOffset>6</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>DATA0</name>
<description>DATA0</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>DATA1</name>
<description>DATA1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>DATA2</name>
<description>Reserved for High Bandwidth Isochronous Endpoint</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>MDATA</name>
<description>Reserved for High Bandwidth Isochronous Endpoint</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data/KILL Bank</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TX Packet Ready</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RX_SETUP</name>
<description>Received SETUP</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>STALL_SNT</name>
<description>Stall Sent</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NAK_IN</name>
<description>NAK IN</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NAK_OUT</name>
<description>NAK OUT</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CURBK_CTLDIR</name>
<description>Current Bank/Control Direction</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BUSY_BANK_STA</name>
<description>Busy Bank Number</description>
<bitOffset>18</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>1BUSYBANK</name>
<description>1 busy bank</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>2BUSYBANKS</name>
<description>2 busy banks</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>3BUSYBANKS</name>
<description>3 busy banks</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>BYTE_COUNT</name>
<description>UDPHS Byte Count</description>
<bitOffset>20</bitOffset>
<bitWidth>11</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>EPTSTA12_ISOENDPT</name>
<description>UDPHS Endpoint Status Register (endpoint = 12)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x0000029C</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000040</resetValue>
<fields>
<field>
<name>TOGGLESQ_STA</name>
<description>Toggle Sequencing</description>
<bitOffset>6</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>DATA0</name>
<description>DATA0</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>DATA1</name>
<description>DATA1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>DATA2</name>
<description>Data2 (only for High Bandwidth Isochronous Endpoint)</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>MDATA</name>
<description>MData (only for High Bandwidth Isochronous Endpoint)</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data/KILL Bank</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY_TRER</name>
<description>TX Packet Ready/Transaction Error</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_FL_ISO</name>
<description>Error Flow</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_CRC_NTR</name>
<description>CRC ISO Error/Number of Transaction Error</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_FLUSH</name>
<description>Bank Flush Error</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CURBK</name>
<description>Current Bank</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>BANK0</name>
<description>Bank 0 (or single bank)</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>BANK1</name>
<description>Bank 1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>BANK2</name>
<description>Bank 2</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>BUSY_BANK_STA</name>
<description>Busy Bank Number</description>
<bitOffset>18</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>1BUSYBANK</name>
<description>1 busy bank</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>2BUSYBANKS</name>
<description>2 busy banks</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>3BUSYBANKS</name>
<description>3 busy banks</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>BYTE_COUNT</name>
<description>UDPHS Byte Count</description>
<bitOffset>20</bitOffset>
<bitWidth>11</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCFG13</name>
<description>UDPHS Endpoint Configuration Register (endpoint = 13)</description>
<addressOffset>0x000002A0</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>EPT_SIZE</name>
<description>Endpoint Size</description>
<bitOffset>0</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>8</name>
<description>8 bytes</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>16</name>
<description>16 bytes</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>32</name>
<description>32 bytes</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>64</name>
<description>64 bytes</description>
<value>0x3</value>
</enumeratedValue>
<enumeratedValue>
<name>128</name>
<description>128 bytes</description>
<value>0x4</value>
</enumeratedValue>
<enumeratedValue>
<name>256</name>
<description>256 bytes</description>
<value>0x5</value>
</enumeratedValue>
<enumeratedValue>
<name>512</name>
<description>512 bytes</description>
<value>0x6</value>
</enumeratedValue>
<enumeratedValue>
<name>1024</name>
<description>1024 bytes</description>
<value>0x7</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>EPT_DIR</name>
<description>Endpoint Direction</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>EPT_TYPE</name>
<description>Endpoint Type</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CTRL8</name>
<description>Control endpoint</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ISO</name>
<description>Isochronous endpoint</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>BULK</name>
<description>Bulk endpoint</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>INT</name>
<description>Interrupt endpoint</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>BK_NUMBER</name>
<description>Number of Banks</description>
<bitOffset>6</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>0</name>
<description>Zero bank, the endpoint is not mapped in memory</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>1</name>
<description>One bank (bank 0)</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>2</name>
<description>Double bank (Ping-Pong: bank0/bank1)</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>3</name>
<description>Triple bank (bank0/bank1/bank2)</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>NB_TRANS</name>
<description>Number Of Transaction per Microframe</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>EPT_MAPD</name>
<description>Endpoint Mapped</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>EPTCTLENB13</name>
<description>UDPHS Endpoint Control Enable Register (endpoint = 13)</description>
<addressOffset>0x000002A4</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>EPT_ENABL</name>
<description>Endpoint Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupts Disable DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NYET_DIS</name>
<description>NYET Disable (Only for High Speed Bulk OUT endpoints)</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Enable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TX Packet Ready Interrupt Enable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RX_SETUP</name>
<description>Received SETUP</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>STALL_SNT</name>
<description>Stall Sent Interrupt Enable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_IN</name>
<description>NAKIN Interrupt Enable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_OUT</name>
<description>NAKOUT Interrupt Enable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Enable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Send/Short Packet Interrupt Enable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCTLENB13_ISOENDPT</name>
<description>UDPHS Endpoint Control Enable Register (endpoint = 13)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x000002A4</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>EPT_ENABL</name>
<description>Endpoint Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupts Disable DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DATAX_RX</name>
<description>DATAx Interrupt Enable (Only for high bandwidth Isochronous OUT endpoints)</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>MDATA_RX</name>
<description>MDATA Interrupt Enable (Only for high bandwidth Isochronous OUT endpoints)</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Enable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY_TRER</name>
<description>TX Packet Ready/Transaction Error Interrupt Enable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FL_ISO</name>
<description>Error Flow Interrupt Enable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_CRC_NTR</name>
<description>ISO CRC Error/Number of Transaction Error Interrupt Enable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FLUSH</name>
<description>Bank Flush Error Interrupt Enable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Enable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Send/Short Packet Interrupt Enable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCTLDIS13</name>
<description>UDPHS Endpoint Control Disable Register (endpoint = 13)</description>
<addressOffset>0x000002A8</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>EPT_DISABL</name>
<description>Endpoint Disable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Disable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupts Disable DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NYET_DIS</name>
<description>NYET Enable (Only for High Speed Bulk OUT endpoints)</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Disable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Disable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Disable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TX Packet Ready Interrupt Disable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RX_SETUP</name>
<description>Received SETUP Interrupt Disable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>STALL_SNT</name>
<description>Stall Sent Interrupt Disable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_IN</name>
<description>NAKIN Interrupt Disable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_OUT</name>
<description>NAKOUT Interrupt Disable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Disable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Interrupt Disable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCTLDIS13_ISOENDPT</name>
<description>UDPHS Endpoint Control Disable Register (endpoint = 13)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x000002A8</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>EPT_DISABL</name>
<description>Endpoint Disable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Disable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupts Disable DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DATAX_RX</name>
<description>DATAx Interrupt Disable (Only for High Bandwidth Isochronous OUT endpoints)</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>MDATA_RX</name>
<description>MDATA Interrupt Disable (Only for High Bandwidth Isochronous OUT endpoints)</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Disable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Disable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Disable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY_TRER</name>
<description>TX Packet Ready/Transaction Error Interrupt Disable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FL_ISO</name>
<description>Error Flow Interrupt Disable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_CRC_NTR</name>
<description>ISO CRC Error/Number of Transaction Error Interrupt Disable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FLUSH</name>
<description>bank flush error Interrupt Disable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Disable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Interrupt Disable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCTL13</name>
<description>UDPHS Endpoint Control Register (endpoint = 13)</description>
<addressOffset>0x000002AC</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>EPT_ENABL</name>
<description>Endpoint Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Enabled (Not for CONTROL Endpoints)</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupt Disables DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NYET_DIS</name>
<description>NYET Disable (Only for High Speed Bulk OUT endpoints)</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Enabled</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Enabled</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Enabled</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TX Packet Ready Interrupt Enabled</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RX_SETUP</name>
<description>Received SETUP Interrupt Enabled</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>STALL_SNT</name>
<description>Stall Sent Interrupt Enabled</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NAK_IN</name>
<description>NAKIN Interrupt Enabled</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NAK_OUT</name>
<description>NAKOUT Interrupt Enabled</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Enabled</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Interrupt Enabled</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCTL13_ISOENDPT</name>
<description>UDPHS Endpoint Control Register (endpoint = 13)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x000002AC</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>EPT_ENABL</name>
<description>Endpoint Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Enabled</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupt Disables DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DATAX_RX</name>
<description>DATAx Interrupt Enabled (Only for High Bandwidth Isochronous OUT endpoints)</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>MDATA_RX</name>
<description>MDATA Interrupt Enabled (Only for High Bandwidth Isochronous OUT endpoints)</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Enabled</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Enabled</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Enabled</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY_TRER</name>
<description>TX Packet Ready/Transaction Error Interrupt Enabled</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_FL_ISO</name>
<description>Error Flow Interrupt Enabled</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_CRC_NTR</name>
<description>ISO CRC Error/Number of Transaction Error Interrupt Enabled</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_FLUSH</name>
<description>Bank Flush Error Interrupt Enabled</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Enabled</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Interrupt Enabled</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>EPTSETSTA13</name>
<description>UDPHS Endpoint Set Status Register (endpoint = 13)</description>
<addressOffset>0x000002B4</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>FRCESTALL</name>
<description>Stall Handshake Request Set</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>KILL Bank Set (for IN Endpoint)</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TX Packet Ready Set</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTSETSTA13_ISOENDPT</name>
<description>UDPHS Endpoint Set Status Register (endpoint = 13)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x000002B4</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>RXRDY_TXKL</name>
<description>KILL Bank Set (for IN Endpoint)</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY_TRER</name>
<description>TX Packet Ready Set</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCLRSTA13</name>
<description>UDPHS Endpoint Clear Status Register (endpoint = 13)</description>
<addressOffset>0x000002B8</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>FRCESTALL</name>
<description>Stall Handshake Request Clear</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TOGGLESQ</name>
<description>Data Toggle Clear</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Clear</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Clear</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RX_SETUP</name>
<description>Received SETUP Clear</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>STALL_SNT</name>
<description>Stall Sent Clear</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_IN</name>
<description>NAKIN Clear</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_OUT</name>
<description>NAKOUT Clear</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCLRSTA13_ISOENDPT</name>
<description>UDPHS Endpoint Clear Status Register (endpoint = 13)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x000002B8</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>TOGGLESQ</name>
<description>Data Toggle Clear</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Clear</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Clear</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FL_ISO</name>
<description>Error Flow Clear</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_CRC_NTR</name>
<description>Number of Transaction Error Clear</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FLUSH</name>
<description>Bank Flush Error Clear</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTSTA13</name>
<description>UDPHS Endpoint Status Register (endpoint = 13)</description>
<addressOffset>0x000002BC</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000040</resetValue>
<fields>
<field>
<name>FRCESTALL</name>
<description>Stall Handshake Request</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TOGGLESQ_STA</name>
<description>Toggle Sequencing</description>
<bitOffset>6</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>DATA0</name>
<description>DATA0</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>DATA1</name>
<description>DATA1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>DATA2</name>
<description>Reserved for High Bandwidth Isochronous Endpoint</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>MDATA</name>
<description>Reserved for High Bandwidth Isochronous Endpoint</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data/KILL Bank</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TX Packet Ready</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RX_SETUP</name>
<description>Received SETUP</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>STALL_SNT</name>
<description>Stall Sent</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NAK_IN</name>
<description>NAK IN</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NAK_OUT</name>
<description>NAK OUT</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CURBK_CTLDIR</name>
<description>Current Bank/Control Direction</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BUSY_BANK_STA</name>
<description>Busy Bank Number</description>
<bitOffset>18</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>1BUSYBANK</name>
<description>1 busy bank</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>2BUSYBANKS</name>
<description>2 busy banks</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>3BUSYBANKS</name>
<description>3 busy banks</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>BYTE_COUNT</name>
<description>UDPHS Byte Count</description>
<bitOffset>20</bitOffset>
<bitWidth>11</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>EPTSTA13_ISOENDPT</name>
<description>UDPHS Endpoint Status Register (endpoint = 13)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x000002BC</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000040</resetValue>
<fields>
<field>
<name>TOGGLESQ_STA</name>
<description>Toggle Sequencing</description>
<bitOffset>6</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>DATA0</name>
<description>DATA0</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>DATA1</name>
<description>DATA1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>DATA2</name>
<description>Data2 (only for High Bandwidth Isochronous Endpoint)</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>MDATA</name>
<description>MData (only for High Bandwidth Isochronous Endpoint)</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data/KILL Bank</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY_TRER</name>
<description>TX Packet Ready/Transaction Error</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_FL_ISO</name>
<description>Error Flow</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_CRC_NTR</name>
<description>CRC ISO Error/Number of Transaction Error</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_FLUSH</name>
<description>Bank Flush Error</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CURBK</name>
<description>Current Bank</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>BANK0</name>
<description>Bank 0 (or single bank)</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>BANK1</name>
<description>Bank 1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>BANK2</name>
<description>Bank 2</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>BUSY_BANK_STA</name>
<description>Busy Bank Number</description>
<bitOffset>18</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>1BUSYBANK</name>
<description>1 busy bank</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>2BUSYBANKS</name>
<description>2 busy banks</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>3BUSYBANKS</name>
<description>3 busy banks</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>BYTE_COUNT</name>
<description>UDPHS Byte Count</description>
<bitOffset>20</bitOffset>
<bitWidth>11</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCFG14</name>
<description>UDPHS Endpoint Configuration Register (endpoint = 14)</description>
<addressOffset>0x000002C0</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>EPT_SIZE</name>
<description>Endpoint Size</description>
<bitOffset>0</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>8</name>
<description>8 bytes</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>16</name>
<description>16 bytes</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>32</name>
<description>32 bytes</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>64</name>
<description>64 bytes</description>
<value>0x3</value>
</enumeratedValue>
<enumeratedValue>
<name>128</name>
<description>128 bytes</description>
<value>0x4</value>
</enumeratedValue>
<enumeratedValue>
<name>256</name>
<description>256 bytes</description>
<value>0x5</value>
</enumeratedValue>
<enumeratedValue>
<name>512</name>
<description>512 bytes</description>
<value>0x6</value>
</enumeratedValue>
<enumeratedValue>
<name>1024</name>
<description>1024 bytes</description>
<value>0x7</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>EPT_DIR</name>
<description>Endpoint Direction</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>EPT_TYPE</name>
<description>Endpoint Type</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CTRL8</name>
<description>Control endpoint</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ISO</name>
<description>Isochronous endpoint</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>BULK</name>
<description>Bulk endpoint</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>INT</name>
<description>Interrupt endpoint</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>BK_NUMBER</name>
<description>Number of Banks</description>
<bitOffset>6</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>0</name>
<description>Zero bank, the endpoint is not mapped in memory</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>1</name>
<description>One bank (bank 0)</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>2</name>
<description>Double bank (Ping-Pong: bank0/bank1)</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>3</name>
<description>Triple bank (bank0/bank1/bank2)</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>NB_TRANS</name>
<description>Number Of Transaction per Microframe</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>EPT_MAPD</name>
<description>Endpoint Mapped</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>EPTCTLENB14</name>
<description>UDPHS Endpoint Control Enable Register (endpoint = 14)</description>
<addressOffset>0x000002C4</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>EPT_ENABL</name>
<description>Endpoint Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupts Disable DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NYET_DIS</name>
<description>NYET Disable (Only for High Speed Bulk OUT endpoints)</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Enable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TX Packet Ready Interrupt Enable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RX_SETUP</name>
<description>Received SETUP</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>STALL_SNT</name>
<description>Stall Sent Interrupt Enable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_IN</name>
<description>NAKIN Interrupt Enable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_OUT</name>
<description>NAKOUT Interrupt Enable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Enable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Send/Short Packet Interrupt Enable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCTLENB14_ISOENDPT</name>
<description>UDPHS Endpoint Control Enable Register (endpoint = 14)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x000002C4</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>EPT_ENABL</name>
<description>Endpoint Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupts Disable DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DATAX_RX</name>
<description>DATAx Interrupt Enable (Only for high bandwidth Isochronous OUT endpoints)</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>MDATA_RX</name>
<description>MDATA Interrupt Enable (Only for high bandwidth Isochronous OUT endpoints)</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Enable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY_TRER</name>
<description>TX Packet Ready/Transaction Error Interrupt Enable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FL_ISO</name>
<description>Error Flow Interrupt Enable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_CRC_NTR</name>
<description>ISO CRC Error/Number of Transaction Error Interrupt Enable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FLUSH</name>
<description>Bank Flush Error Interrupt Enable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Enable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Send/Short Packet Interrupt Enable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCTLDIS14</name>
<description>UDPHS Endpoint Control Disable Register (endpoint = 14)</description>
<addressOffset>0x000002C8</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>EPT_DISABL</name>
<description>Endpoint Disable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Disable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupts Disable DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NYET_DIS</name>
<description>NYET Enable (Only for High Speed Bulk OUT endpoints)</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Disable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Disable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Disable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TX Packet Ready Interrupt Disable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RX_SETUP</name>
<description>Received SETUP Interrupt Disable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>STALL_SNT</name>
<description>Stall Sent Interrupt Disable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_IN</name>
<description>NAKIN Interrupt Disable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_OUT</name>
<description>NAKOUT Interrupt Disable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Disable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Interrupt Disable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCTLDIS14_ISOENDPT</name>
<description>UDPHS Endpoint Control Disable Register (endpoint = 14)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x000002C8</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>EPT_DISABL</name>
<description>Endpoint Disable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Disable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupts Disable DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DATAX_RX</name>
<description>DATAx Interrupt Disable (Only for High Bandwidth Isochronous OUT endpoints)</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>MDATA_RX</name>
<description>MDATA Interrupt Disable (Only for High Bandwidth Isochronous OUT endpoints)</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Disable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Disable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Disable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY_TRER</name>
<description>TX Packet Ready/Transaction Error Interrupt Disable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FL_ISO</name>
<description>Error Flow Interrupt Disable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_CRC_NTR</name>
<description>ISO CRC Error/Number of Transaction Error Interrupt Disable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FLUSH</name>
<description>bank flush error Interrupt Disable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Disable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Interrupt Disable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCTL14</name>
<description>UDPHS Endpoint Control Register (endpoint = 14)</description>
<addressOffset>0x000002CC</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>EPT_ENABL</name>
<description>Endpoint Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Enabled (Not for CONTROL Endpoints)</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupt Disables DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NYET_DIS</name>
<description>NYET Disable (Only for High Speed Bulk OUT endpoints)</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Enabled</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Enabled</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Enabled</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TX Packet Ready Interrupt Enabled</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RX_SETUP</name>
<description>Received SETUP Interrupt Enabled</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>STALL_SNT</name>
<description>Stall Sent Interrupt Enabled</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NAK_IN</name>
<description>NAKIN Interrupt Enabled</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NAK_OUT</name>
<description>NAKOUT Interrupt Enabled</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Enabled</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Interrupt Enabled</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCTL14_ISOENDPT</name>
<description>UDPHS Endpoint Control Register (endpoint = 14)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x000002CC</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>EPT_ENABL</name>
<description>Endpoint Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Enabled</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupt Disables DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DATAX_RX</name>
<description>DATAx Interrupt Enabled (Only for High Bandwidth Isochronous OUT endpoints)</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>MDATA_RX</name>
<description>MDATA Interrupt Enabled (Only for High Bandwidth Isochronous OUT endpoints)</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Enabled</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Enabled</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Enabled</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY_TRER</name>
<description>TX Packet Ready/Transaction Error Interrupt Enabled</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_FL_ISO</name>
<description>Error Flow Interrupt Enabled</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_CRC_NTR</name>
<description>ISO CRC Error/Number of Transaction Error Interrupt Enabled</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_FLUSH</name>
<description>Bank Flush Error Interrupt Enabled</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Enabled</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Interrupt Enabled</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>EPTSETSTA14</name>
<description>UDPHS Endpoint Set Status Register (endpoint = 14)</description>
<addressOffset>0x000002D4</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>FRCESTALL</name>
<description>Stall Handshake Request Set</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>KILL Bank Set (for IN Endpoint)</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TX Packet Ready Set</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTSETSTA14_ISOENDPT</name>
<description>UDPHS Endpoint Set Status Register (endpoint = 14)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x000002D4</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>RXRDY_TXKL</name>
<description>KILL Bank Set (for IN Endpoint)</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY_TRER</name>
<description>TX Packet Ready Set</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCLRSTA14</name>
<description>UDPHS Endpoint Clear Status Register (endpoint = 14)</description>
<addressOffset>0x000002D8</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>FRCESTALL</name>
<description>Stall Handshake Request Clear</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TOGGLESQ</name>
<description>Data Toggle Clear</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Clear</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Clear</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RX_SETUP</name>
<description>Received SETUP Clear</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>STALL_SNT</name>
<description>Stall Sent Clear</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_IN</name>
<description>NAKIN Clear</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_OUT</name>
<description>NAKOUT Clear</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCLRSTA14_ISOENDPT</name>
<description>UDPHS Endpoint Clear Status Register (endpoint = 14)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x000002D8</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>TOGGLESQ</name>
<description>Data Toggle Clear</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Clear</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Clear</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FL_ISO</name>
<description>Error Flow Clear</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_CRC_NTR</name>
<description>Number of Transaction Error Clear</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FLUSH</name>
<description>Bank Flush Error Clear</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTSTA14</name>
<description>UDPHS Endpoint Status Register (endpoint = 14)</description>
<addressOffset>0x000002DC</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000040</resetValue>
<fields>
<field>
<name>FRCESTALL</name>
<description>Stall Handshake Request</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TOGGLESQ_STA</name>
<description>Toggle Sequencing</description>
<bitOffset>6</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>DATA0</name>
<description>DATA0</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>DATA1</name>
<description>DATA1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>DATA2</name>
<description>Reserved for High Bandwidth Isochronous Endpoint</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>MDATA</name>
<description>Reserved for High Bandwidth Isochronous Endpoint</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data/KILL Bank</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TX Packet Ready</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RX_SETUP</name>
<description>Received SETUP</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>STALL_SNT</name>
<description>Stall Sent</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NAK_IN</name>
<description>NAK IN</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NAK_OUT</name>
<description>NAK OUT</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CURBK_CTLDIR</name>
<description>Current Bank/Control Direction</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BUSY_BANK_STA</name>
<description>Busy Bank Number</description>
<bitOffset>18</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>1BUSYBANK</name>
<description>1 busy bank</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>2BUSYBANKS</name>
<description>2 busy banks</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>3BUSYBANKS</name>
<description>3 busy banks</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>BYTE_COUNT</name>
<description>UDPHS Byte Count</description>
<bitOffset>20</bitOffset>
<bitWidth>11</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>EPTSTA14_ISOENDPT</name>
<description>UDPHS Endpoint Status Register (endpoint = 14)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x000002DC</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000040</resetValue>
<fields>
<field>
<name>TOGGLESQ_STA</name>
<description>Toggle Sequencing</description>
<bitOffset>6</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>DATA0</name>
<description>DATA0</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>DATA1</name>
<description>DATA1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>DATA2</name>
<description>Data2 (only for High Bandwidth Isochronous Endpoint)</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>MDATA</name>
<description>MData (only for High Bandwidth Isochronous Endpoint)</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data/KILL Bank</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY_TRER</name>
<description>TX Packet Ready/Transaction Error</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_FL_ISO</name>
<description>Error Flow</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_CRC_NTR</name>
<description>CRC ISO Error/Number of Transaction Error</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_FLUSH</name>
<description>Bank Flush Error</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CURBK</name>
<description>Current Bank</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>BANK0</name>
<description>Bank 0 (or single bank)</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>BANK1</name>
<description>Bank 1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>BANK2</name>
<description>Bank 2</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>BUSY_BANK_STA</name>
<description>Busy Bank Number</description>
<bitOffset>18</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>1BUSYBANK</name>
<description>1 busy bank</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>2BUSYBANKS</name>
<description>2 busy banks</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>3BUSYBANKS</name>
<description>3 busy banks</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>BYTE_COUNT</name>
<description>UDPHS Byte Count</description>
<bitOffset>20</bitOffset>
<bitWidth>11</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCFG15</name>
<description>UDPHS Endpoint Configuration Register (endpoint = 15)</description>
<addressOffset>0x000002E0</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>EPT_SIZE</name>
<description>Endpoint Size</description>
<bitOffset>0</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>8</name>
<description>8 bytes</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>16</name>
<description>16 bytes</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>32</name>
<description>32 bytes</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>64</name>
<description>64 bytes</description>
<value>0x3</value>
</enumeratedValue>
<enumeratedValue>
<name>128</name>
<description>128 bytes</description>
<value>0x4</value>
</enumeratedValue>
<enumeratedValue>
<name>256</name>
<description>256 bytes</description>
<value>0x5</value>
</enumeratedValue>
<enumeratedValue>
<name>512</name>
<description>512 bytes</description>
<value>0x6</value>
</enumeratedValue>
<enumeratedValue>
<name>1024</name>
<description>1024 bytes</description>
<value>0x7</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>EPT_DIR</name>
<description>Endpoint Direction</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>EPT_TYPE</name>
<description>Endpoint Type</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CTRL8</name>
<description>Control endpoint</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ISO</name>
<description>Isochronous endpoint</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>BULK</name>
<description>Bulk endpoint</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>INT</name>
<description>Interrupt endpoint</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>BK_NUMBER</name>
<description>Number of Banks</description>
<bitOffset>6</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>0</name>
<description>Zero bank, the endpoint is not mapped in memory</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>1</name>
<description>One bank (bank 0)</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>2</name>
<description>Double bank (Ping-Pong: bank0/bank1)</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>3</name>
<description>Triple bank (bank0/bank1/bank2)</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>NB_TRANS</name>
<description>Number Of Transaction per Microframe</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>EPT_MAPD</name>
<description>Endpoint Mapped</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>EPTCTLENB15</name>
<description>UDPHS Endpoint Control Enable Register (endpoint = 15)</description>
<addressOffset>0x000002E4</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>EPT_ENABL</name>
<description>Endpoint Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupts Disable DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NYET_DIS</name>
<description>NYET Disable (Only for High Speed Bulk OUT endpoints)</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Enable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TX Packet Ready Interrupt Enable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RX_SETUP</name>
<description>Received SETUP</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>STALL_SNT</name>
<description>Stall Sent Interrupt Enable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_IN</name>
<description>NAKIN Interrupt Enable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_OUT</name>
<description>NAKOUT Interrupt Enable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Enable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Send/Short Packet Interrupt Enable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCTLENB15_ISOENDPT</name>
<description>UDPHS Endpoint Control Enable Register (endpoint = 15)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x000002E4</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>EPT_ENABL</name>
<description>Endpoint Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupts Disable DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DATAX_RX</name>
<description>DATAx Interrupt Enable (Only for high bandwidth Isochronous OUT endpoints)</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>MDATA_RX</name>
<description>MDATA Interrupt Enable (Only for high bandwidth Isochronous OUT endpoints)</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Enable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY_TRER</name>
<description>TX Packet Ready/Transaction Error Interrupt Enable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FL_ISO</name>
<description>Error Flow Interrupt Enable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_CRC_NTR</name>
<description>ISO CRC Error/Number of Transaction Error Interrupt Enable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FLUSH</name>
<description>Bank Flush Error Interrupt Enable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Enable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Send/Short Packet Interrupt Enable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCTLDIS15</name>
<description>UDPHS Endpoint Control Disable Register (endpoint = 15)</description>
<addressOffset>0x000002E8</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>EPT_DISABL</name>
<description>Endpoint Disable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Disable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupts Disable DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NYET_DIS</name>
<description>NYET Enable (Only for High Speed Bulk OUT endpoints)</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Disable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Disable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Disable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TX Packet Ready Interrupt Disable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RX_SETUP</name>
<description>Received SETUP Interrupt Disable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>STALL_SNT</name>
<description>Stall Sent Interrupt Disable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_IN</name>
<description>NAKIN Interrupt Disable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_OUT</name>
<description>NAKOUT Interrupt Disable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Disable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Interrupt Disable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCTLDIS15_ISOENDPT</name>
<description>UDPHS Endpoint Control Disable Register (endpoint = 15)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x000002E8</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>EPT_DISABL</name>
<description>Endpoint Disable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Disable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupts Disable DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DATAX_RX</name>
<description>DATAx Interrupt Disable (Only for High Bandwidth Isochronous OUT endpoints)</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>MDATA_RX</name>
<description>MDATA Interrupt Disable (Only for High Bandwidth Isochronous OUT endpoints)</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Disable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Disable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Disable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY_TRER</name>
<description>TX Packet Ready/Transaction Error Interrupt Disable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FL_ISO</name>
<description>Error Flow Interrupt Disable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_CRC_NTR</name>
<description>ISO CRC Error/Number of Transaction Error Interrupt Disable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FLUSH</name>
<description>bank flush error Interrupt Disable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Disable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Interrupt Disable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCTL15</name>
<description>UDPHS Endpoint Control Register (endpoint = 15)</description>
<addressOffset>0x000002EC</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>EPT_ENABL</name>
<description>Endpoint Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Enabled (Not for CONTROL Endpoints)</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupt Disables DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NYET_DIS</name>
<description>NYET Disable (Only for High Speed Bulk OUT endpoints)</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Enabled</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Enabled</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Enabled</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TX Packet Ready Interrupt Enabled</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RX_SETUP</name>
<description>Received SETUP Interrupt Enabled</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>STALL_SNT</name>
<description>Stall Sent Interrupt Enabled</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NAK_IN</name>
<description>NAKIN Interrupt Enabled</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NAK_OUT</name>
<description>NAKOUT Interrupt Enabled</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Enabled</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Interrupt Enabled</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCTL15_ISOENDPT</name>
<description>UDPHS Endpoint Control Register (endpoint = 15)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x000002EC</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>EPT_ENABL</name>
<description>Endpoint Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>AUTO_VALID</name>
<description>Packet Auto-Valid Enabled</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>INTDIS_DMA</name>
<description>Interrupt Disables DMA</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DATAX_RX</name>
<description>DATAx Interrupt Enabled (Only for High Bandwidth Isochronous OUT endpoints)</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>MDATA_RX</name>
<description>MDATA Interrupt Enabled (Only for High Bandwidth Isochronous OUT endpoints)</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error Interrupt Enabled</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Interrupt Enabled</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Interrupt Enabled</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY_TRER</name>
<description>TX Packet Ready/Transaction Error Interrupt Enabled</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_FL_ISO</name>
<description>Error Flow Interrupt Enabled</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_CRC_NTR</name>
<description>ISO CRC Error/Number of Transaction Error Interrupt Enabled</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_FLUSH</name>
<description>Bank Flush Error Interrupt Enabled</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BUSY_BANK</name>
<description>Busy Bank Interrupt Enabled</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet Interrupt Enabled</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>EPTSETSTA15</name>
<description>UDPHS Endpoint Set Status Register (endpoint = 15)</description>
<addressOffset>0x000002F4</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>FRCESTALL</name>
<description>Stall Handshake Request Set</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>KILL Bank Set (for IN Endpoint)</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TX Packet Ready Set</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTSETSTA15_ISOENDPT</name>
<description>UDPHS Endpoint Set Status Register (endpoint = 15)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x000002F4</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>RXRDY_TXKL</name>
<description>KILL Bank Set (for IN Endpoint)</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY_TRER</name>
<description>TX Packet Ready Set</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCLRSTA15</name>
<description>UDPHS Endpoint Clear Status Register (endpoint = 15)</description>
<addressOffset>0x000002F8</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>FRCESTALL</name>
<description>Stall Handshake Request Clear</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TOGGLESQ</name>
<description>Data Toggle Clear</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Clear</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Clear</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RX_SETUP</name>
<description>Received SETUP Clear</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>STALL_SNT</name>
<description>Stall Sent Clear</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_IN</name>
<description>NAKIN Clear</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>NAK_OUT</name>
<description>NAKOUT Clear</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTCLRSTA15_ISOENDPT</name>
<description>UDPHS Endpoint Clear Status Register (endpoint = 15)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x000002F8</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>TOGGLESQ</name>
<description>Data Toggle Clear</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data Clear</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete Clear</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FL_ISO</name>
<description>Error Flow Clear</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_CRC_NTR</name>
<description>Number of Transaction Error Clear</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR_FLUSH</name>
<description>Bank Flush Error Clear</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EPTSTA15</name>
<description>UDPHS Endpoint Status Register (endpoint = 15)</description>
<addressOffset>0x000002FC</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000040</resetValue>
<fields>
<field>
<name>FRCESTALL</name>
<description>Stall Handshake Request</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TOGGLESQ_STA</name>
<description>Toggle Sequencing</description>
<bitOffset>6</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>DATA0</name>
<description>DATA0</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>DATA1</name>
<description>DATA1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>DATA2</name>
<description>Reserved for High Bandwidth Isochronous Endpoint</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>MDATA</name>
<description>Reserved for High Bandwidth Isochronous Endpoint</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data/KILL Bank</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY</name>
<description>TX Packet Ready</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RX_SETUP</name>
<description>Received SETUP</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>STALL_SNT</name>
<description>Stall Sent</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NAK_IN</name>
<description>NAK IN</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NAK_OUT</name>
<description>NAK OUT</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CURBK_CTLDIR</name>
<description>Current Bank/Control Direction</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BUSY_BANK_STA</name>
<description>Busy Bank Number</description>
<bitOffset>18</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>1BUSYBANK</name>
<description>1 busy bank</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>2BUSYBANKS</name>
<description>2 busy banks</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>3BUSYBANKS</name>
<description>3 busy banks</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>BYTE_COUNT</name>
<description>UDPHS Byte Count</description>
<bitOffset>20</bitOffset>
<bitWidth>11</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>EPTSTA15_ISOENDPT</name>
<description>UDPHS Endpoint Status Register (endpoint = 15)</description>
<alternateGroup>ISOENDPT</alternateGroup>
<addressOffset>0x000002FC</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000040</resetValue>
<fields>
<field>
<name>TOGGLESQ_STA</name>
<description>Toggle Sequencing</description>
<bitOffset>6</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>DATA0</name>
<description>DATA0</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>DATA1</name>
<description>DATA1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>DATA2</name>
<description>Data2 (only for High Bandwidth Isochronous Endpoint)</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>MDATA</name>
<description>MData (only for High Bandwidth Isochronous Endpoint)</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>ERR_OVFLW</name>
<description>Overflow Error</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RXRDY_TXKL</name>
<description>Received OUT Data/KILL Bank</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TX_COMPLT</name>
<description>Transmitted IN Data Complete</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY_TRER</name>
<description>TX Packet Ready/Transaction Error</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_FL_ISO</name>
<description>Error Flow</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_CRC_NTR</name>
<description>CRC ISO Error/Number of Transaction Error</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR_FLUSH</name>
<description>Bank Flush Error</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CURBK</name>
<description>Current Bank</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>BANK0</name>
<description>Bank 0 (or single bank)</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>BANK1</name>
<description>Bank 1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>BANK2</name>
<description>Bank 2</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>BUSY_BANK_STA</name>
<description>Busy Bank Number</description>
<bitOffset>18</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>1BUSYBANK</name>
<description>1 busy bank</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>2BUSYBANKS</name>
<description>2 busy banks</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>3BUSYBANKS</name>
<description>3 busy banks</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>BYTE_COUNT</name>
<description>UDPHS Byte Count</description>
<bitOffset>20</bitOffset>
<bitWidth>11</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SHRT_PCKT</name>
<description>Short Packet</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>DMANXTDSC0</name>
<description>UDPHS DMA Next Descriptor Address Register (channel = 0)</description>
<addressOffset>0x00000300</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>NXT_DSC_ADD</name>
<description>Next Descriptor Address</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DMAADDRESS0</name>
<description>UDPHS DMA Channel Address Register (channel = 0)</description>
<addressOffset>0x00000304</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>BUFF_ADD</name>
<description>Buffer Address</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DMACONTROL0</name>
<description>UDPHS DMA Channel Control Register (channel = 0)</description>
<addressOffset>0x00000308</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CHANN_ENB</name>
<description>(Channel Enable Command)</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>LDNXT_DSC</name>
<description>Load Next Channel Transfer Descriptor Enable (Command)</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>END_TR_EN</name>
<description>End of Transfer Enable (Control)</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>END_B_EN</name>
<description>End of Buffer Enable (Control)</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>END_TR_IT</name>
<description>End of Transfer Interrupt Enable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>END_BUFFIT</name>
<description>End of Buffer Interrupt Enable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DESC_LD_IT</name>
<description>Descriptor Loaded Interrupt Enable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>BURST_LCK</name>
<description>Burst Lock Enable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>BUFF_LENGTH</name>
<description>Buffer Byte Length (Write-only)</description>
<bitOffset>16</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DMASTATUS0</name>
<description>UDPHS DMA Channel Status Register (channel = 0)</description>
<addressOffset>0x0000030C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CHANN_ENB</name>
<description>Channel Enable Status</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CHANN_ACT</name>
<description>Channel Active Status</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>END_TR_ST</name>
<description>End of Channel Transfer Status</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>END_BF_ST</name>
<description>End of Channel Buffer Status</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DESC_LDST</name>
<description>Descriptor Loaded Status</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>BUFF_COUNT</name>
<description>Buffer Byte Count</description>
<bitOffset>16</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DMANXTDSC1</name>
<description>UDPHS DMA Next Descriptor Address Register (channel = 1)</description>
<addressOffset>0x00000310</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>NXT_DSC_ADD</name>
<description>Next Descriptor Address</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DMAADDRESS1</name>
<description>UDPHS DMA Channel Address Register (channel = 1)</description>
<addressOffset>0x00000314</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>BUFF_ADD</name>
<description>Buffer Address</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DMACONTROL1</name>
<description>UDPHS DMA Channel Control Register (channel = 1)</description>
<addressOffset>0x00000318</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CHANN_ENB</name>
<description>(Channel Enable Command)</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>LDNXT_DSC</name>
<description>Load Next Channel Transfer Descriptor Enable (Command)</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>END_TR_EN</name>
<description>End of Transfer Enable (Control)</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>END_B_EN</name>
<description>End of Buffer Enable (Control)</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>END_TR_IT</name>
<description>End of Transfer Interrupt Enable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>END_BUFFIT</name>
<description>End of Buffer Interrupt Enable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DESC_LD_IT</name>
<description>Descriptor Loaded Interrupt Enable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>BURST_LCK</name>
<description>Burst Lock Enable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>BUFF_LENGTH</name>
<description>Buffer Byte Length (Write-only)</description>
<bitOffset>16</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DMASTATUS1</name>
<description>UDPHS DMA Channel Status Register (channel = 1)</description>
<addressOffset>0x0000031C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CHANN_ENB</name>
<description>Channel Enable Status</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CHANN_ACT</name>
<description>Channel Active Status</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>END_TR_ST</name>
<description>End of Channel Transfer Status</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>END_BF_ST</name>
<description>End of Channel Buffer Status</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DESC_LDST</name>
<description>Descriptor Loaded Status</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>BUFF_COUNT</name>
<description>Buffer Byte Count</description>
<bitOffset>16</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DMANXTDSC2</name>
<description>UDPHS DMA Next Descriptor Address Register (channel = 2)</description>
<addressOffset>0x00000320</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>NXT_DSC_ADD</name>
<description>Next Descriptor Address</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DMAADDRESS2</name>
<description>UDPHS DMA Channel Address Register (channel = 2)</description>
<addressOffset>0x00000324</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>BUFF_ADD</name>
<description>Buffer Address</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DMACONTROL2</name>
<description>UDPHS DMA Channel Control Register (channel = 2)</description>
<addressOffset>0x00000328</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CHANN_ENB</name>
<description>(Channel Enable Command)</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>LDNXT_DSC</name>
<description>Load Next Channel Transfer Descriptor Enable (Command)</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>END_TR_EN</name>
<description>End of Transfer Enable (Control)</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>END_B_EN</name>
<description>End of Buffer Enable (Control)</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>END_TR_IT</name>
<description>End of Transfer Interrupt Enable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>END_BUFFIT</name>
<description>End of Buffer Interrupt Enable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DESC_LD_IT</name>
<description>Descriptor Loaded Interrupt Enable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>BURST_LCK</name>
<description>Burst Lock Enable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>BUFF_LENGTH</name>
<description>Buffer Byte Length (Write-only)</description>
<bitOffset>16</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DMASTATUS2</name>
<description>UDPHS DMA Channel Status Register (channel = 2)</description>
<addressOffset>0x0000032C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CHANN_ENB</name>
<description>Channel Enable Status</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CHANN_ACT</name>
<description>Channel Active Status</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>END_TR_ST</name>
<description>End of Channel Transfer Status</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>END_BF_ST</name>
<description>End of Channel Buffer Status</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DESC_LDST</name>
<description>Descriptor Loaded Status</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>BUFF_COUNT</name>
<description>Buffer Byte Count</description>
<bitOffset>16</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DMANXTDSC3</name>
<description>UDPHS DMA Next Descriptor Address Register (channel = 3)</description>
<addressOffset>0x00000330</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>NXT_DSC_ADD</name>
<description>Next Descriptor Address</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DMAADDRESS3</name>
<description>UDPHS DMA Channel Address Register (channel = 3)</description>
<addressOffset>0x00000334</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>BUFF_ADD</name>
<description>Buffer Address</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DMACONTROL3</name>
<description>UDPHS DMA Channel Control Register (channel = 3)</description>
<addressOffset>0x00000338</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CHANN_ENB</name>
<description>(Channel Enable Command)</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>LDNXT_DSC</name>
<description>Load Next Channel Transfer Descriptor Enable (Command)</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>END_TR_EN</name>
<description>End of Transfer Enable (Control)</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>END_B_EN</name>
<description>End of Buffer Enable (Control)</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>END_TR_IT</name>
<description>End of Transfer Interrupt Enable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>END_BUFFIT</name>
<description>End of Buffer Interrupt Enable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DESC_LD_IT</name>
<description>Descriptor Loaded Interrupt Enable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>BURST_LCK</name>
<description>Burst Lock Enable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>BUFF_LENGTH</name>
<description>Buffer Byte Length (Write-only)</description>
<bitOffset>16</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DMASTATUS3</name>
<description>UDPHS DMA Channel Status Register (channel = 3)</description>
<addressOffset>0x0000033C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CHANN_ENB</name>
<description>Channel Enable Status</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CHANN_ACT</name>
<description>Channel Active Status</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>END_TR_ST</name>
<description>End of Channel Transfer Status</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>END_BF_ST</name>
<description>End of Channel Buffer Status</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DESC_LDST</name>
<description>Descriptor Loaded Status</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>BUFF_COUNT</name>
<description>Buffer Byte Count</description>
<bitOffset>16</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DMANXTDSC4</name>
<description>UDPHS DMA Next Descriptor Address Register (channel = 4)</description>
<addressOffset>0x00000340</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>NXT_DSC_ADD</name>
<description>Next Descriptor Address</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DMAADDRESS4</name>
<description>UDPHS DMA Channel Address Register (channel = 4)</description>
<addressOffset>0x00000344</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>BUFF_ADD</name>
<description>Buffer Address</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DMACONTROL4</name>
<description>UDPHS DMA Channel Control Register (channel = 4)</description>
<addressOffset>0x00000348</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CHANN_ENB</name>
<description>(Channel Enable Command)</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>LDNXT_DSC</name>
<description>Load Next Channel Transfer Descriptor Enable (Command)</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>END_TR_EN</name>
<description>End of Transfer Enable (Control)</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>END_B_EN</name>
<description>End of Buffer Enable (Control)</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>END_TR_IT</name>
<description>End of Transfer Interrupt Enable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>END_BUFFIT</name>
<description>End of Buffer Interrupt Enable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DESC_LD_IT</name>
<description>Descriptor Loaded Interrupt Enable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>BURST_LCK</name>
<description>Burst Lock Enable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>BUFF_LENGTH</name>
<description>Buffer Byte Length (Write-only)</description>
<bitOffset>16</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DMASTATUS4</name>
<description>UDPHS DMA Channel Status Register (channel = 4)</description>
<addressOffset>0x0000034C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CHANN_ENB</name>
<description>Channel Enable Status</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CHANN_ACT</name>
<description>Channel Active Status</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>END_TR_ST</name>
<description>End of Channel Transfer Status</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>END_BF_ST</name>
<description>End of Channel Buffer Status</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DESC_LDST</name>
<description>Descriptor Loaded Status</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>BUFF_COUNT</name>
<description>Buffer Byte Count</description>
<bitOffset>16</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DMANXTDSC5</name>
<description>UDPHS DMA Next Descriptor Address Register (channel = 5)</description>
<addressOffset>0x00000350</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>NXT_DSC_ADD</name>
<description>Next Descriptor Address</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DMAADDRESS5</name>
<description>UDPHS DMA Channel Address Register (channel = 5)</description>
<addressOffset>0x00000354</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>BUFF_ADD</name>
<description>Buffer Address</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DMACONTROL5</name>
<description>UDPHS DMA Channel Control Register (channel = 5)</description>
<addressOffset>0x00000358</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CHANN_ENB</name>
<description>(Channel Enable Command)</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>LDNXT_DSC</name>
<description>Load Next Channel Transfer Descriptor Enable (Command)</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>END_TR_EN</name>
<description>End of Transfer Enable (Control)</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>END_B_EN</name>
<description>End of Buffer Enable (Control)</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>END_TR_IT</name>
<description>End of Transfer Interrupt Enable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>END_BUFFIT</name>
<description>End of Buffer Interrupt Enable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DESC_LD_IT</name>
<description>Descriptor Loaded Interrupt Enable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>BURST_LCK</name>
<description>Burst Lock Enable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>BUFF_LENGTH</name>
<description>Buffer Byte Length (Write-only)</description>
<bitOffset>16</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DMASTATUS5</name>
<description>UDPHS DMA Channel Status Register (channel = 5)</description>
<addressOffset>0x0000035C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CHANN_ENB</name>
<description>Channel Enable Status</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CHANN_ACT</name>
<description>Channel Active Status</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>END_TR_ST</name>
<description>End of Channel Transfer Status</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>END_BF_ST</name>
<description>End of Channel Buffer Status</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DESC_LDST</name>
<description>Descriptor Loaded Status</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>BUFF_COUNT</name>
<description>Buffer Byte Count</description>
<bitOffset>16</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DMANXTDSC6</name>
<description>UDPHS DMA Next Descriptor Address Register (channel = 6)</description>
<addressOffset>0x00000360</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>NXT_DSC_ADD</name>
<description>Next Descriptor Address</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DMAADDRESS6</name>
<description>UDPHS DMA Channel Address Register (channel = 6)</description>
<addressOffset>0x00000364</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>BUFF_ADD</name>
<description>Buffer Address</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DMACONTROL6</name>
<description>UDPHS DMA Channel Control Register (channel = 6)</description>
<addressOffset>0x00000368</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CHANN_ENB</name>
<description>(Channel Enable Command)</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>LDNXT_DSC</name>
<description>Load Next Channel Transfer Descriptor Enable (Command)</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>END_TR_EN</name>
<description>End of Transfer Enable (Control)</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>END_B_EN</name>
<description>End of Buffer Enable (Control)</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>END_TR_IT</name>
<description>End of Transfer Interrupt Enable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>END_BUFFIT</name>
<description>End of Buffer Interrupt Enable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DESC_LD_IT</name>
<description>Descriptor Loaded Interrupt Enable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>BURST_LCK</name>
<description>Burst Lock Enable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>BUFF_LENGTH</name>
<description>Buffer Byte Length (Write-only)</description>
<bitOffset>16</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DMASTATUS6</name>
<description>UDPHS DMA Channel Status Register (channel = 6)</description>
<addressOffset>0x0000036C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CHANN_ENB</name>
<description>Channel Enable Status</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CHANN_ACT</name>
<description>Channel Active Status</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>END_TR_ST</name>
<description>End of Channel Transfer Status</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>END_BF_ST</name>
<description>End of Channel Buffer Status</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DESC_LDST</name>
<description>Descriptor Loaded Status</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>BUFF_COUNT</name>
<description>Buffer Byte Count</description>
<bitOffset>16</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>TRNG</name>
<version>6334D</version>
<description>True Random Number Generator</description>
<prependToName>TRNG_</prependToName>
<baseAddress>0xF8040000</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x4000</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>TRNG</name>
<value>45</value>
</interrupt>
<registers>
<register>
<name>CR</name>
<description>Control Register</description>
<addressOffset>0x00000000</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>ENABLE</name>
<description>Enables the TRNG to provide random values</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>KEY</name>
<description>Security Key</description>
<bitOffset>8</bitOffset>
<bitWidth>24</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IER</name>
<description>Interrupt Enable Register</description>
<addressOffset>0x00000010</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>DATRDY</name>
<description>Data Ready Interrupt Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IDR</name>
<description>Interrupt Disable Register</description>
<addressOffset>0x00000014</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>DATRDY</name>
<description>Data Ready Interrupt Disable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IMR</name>
<description>Interrupt Mask Register</description>
<addressOffset>0x00000018</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DATRDY</name>
<description>Data Ready Interrupt Mask</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>ISR</name>
<description>Interrupt Status Register</description>
<addressOffset>0x0000001C</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DATRDY</name>
<description>Data Ready</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>ODATA</name>
<description>Output Data Register</description>
<addressOffset>0x00000050</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>ODATA</name>
<description>Output Data</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>FUSE</name>
<version>11094C</version>
<description>Fuse Controller</description>
<prependToName>FUSE_</prependToName>
<baseAddress>0xFFFFE400</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x200</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>FUSE</name>
<value>48</value>
</interrupt>
<registers>
<register>
<name>CR</name>
<description>Fuse Control Register</description>
<addressOffset>0x00000000</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>WRQ</name>
<description>Write Request</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RRQ</name>
<description>Read Request</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>KEY</name>
<description>Key code</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
<access>write-only</access>
<enumeratedValues>
<enumeratedValue>
<name>VALID</name>
<description>valid key.</description>
<value>0xFB</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>MR</name>
<description>Fuse Mode Register</description>
<addressOffset>0x00000004</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>MSK</name>
<description>Mask Fuse Status Registers</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IR</name>
<description>Fuse Index Register</description>
<addressOffset>0x00000008</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>WS</name>
<description>Write Status</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>RS</name>
<description>Read Status</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>WSEL</name>
<description>Word Selection</description>
<bitOffset>8</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DR</name>
<description>Fuse Data Register</description>
<addressOffset>0x0000000C</addressOffset>
<size>32</size>
<access>read-write</access>
<fields>
<field>
<name>DATA</name>
<description>Data to Program</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<dim>8</dim>
<dimIncrement>4</dimIncrement>
<dimIndex>0-7</dimIndex>
<name>SR[%s]</name>
<description>Fuse Status Register</description>
<addressOffset>0x00000010</addressOffset>
<size>32</size>
<access>read-only</access>
<fields>
<field>
<name>FUSE</name>
<description>Fuse Status</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>DMAC0</name>
<version>6233O</version>
<description>DMA Controller 0</description>
<groupName>DMAC</groupName>
<prependToName>DMAC0_</prependToName>
<baseAddress>0xFFFFE600</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x200</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>DMAC0</name>
<value>30</value>
</interrupt>
<registers>
<register>
<name>GCFG</name>
<description>DMAC Global Configuration Register</description>
<addressOffset>0x00000000</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000010</resetValue>
<fields>
<field>
<name>ARB_CFG</name>
<description>Arbiter Configuration</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>FIXED</name>
<description>Fixed priority arbiter.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ROUND_ROBIN</name>
<description>Modified round robin arbiter.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DICEN</name>
<description>Descriptor Integrity Check</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>EN</name>
<description>DMAC Enable Register</description>
<addressOffset>0x00000004</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>ENABLE</name>
<description>General Enable of DMA</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>SREQ</name>
<description>DMAC Software Single Request Register</description>
<addressOffset>0x00000008</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SSREQ0</name>
<description>Source Request</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DSREQ0</name>
<description>Destination Request</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SSREQ1</name>
<description>Source Request</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DSREQ1</name>
<description>Destination Request</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SSREQ2</name>
<description>Source Request</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DSREQ2</name>
<description>Destination Request</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SSREQ3</name>
<description>Source Request</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DSREQ3</name>
<description>Destination Request</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SSREQ4</name>
<description>Source Request</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DSREQ4</name>
<description>Destination Request</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SSREQ5</name>
<description>Source Request</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DSREQ5</name>
<description>Destination Request</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SSREQ6</name>
<description>Source Request</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DSREQ6</name>
<description>Destination Request</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SSREQ7</name>
<description>Source Request</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DSREQ7</name>
<description>Destination Request</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>CREQ</name>
<description>DMAC Software Chunk Transfer Request Register</description>
<addressOffset>0x0000000C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SCREQ0</name>
<description>Source Chunk Request</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DCREQ0</name>
<description>Destination Chunk Request</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCREQ1</name>
<description>Source Chunk Request</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DCREQ1</name>
<description>Destination Chunk Request</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCREQ2</name>
<description>Source Chunk Request</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DCREQ2</name>
<description>Destination Chunk Request</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCREQ3</name>
<description>Source Chunk Request</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DCREQ3</name>
<description>Destination Chunk Request</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCREQ4</name>
<description>Source Chunk Request</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DCREQ4</name>
<description>Destination Chunk Request</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCREQ5</name>
<description>Source Chunk Request</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DCREQ5</name>
<description>Destination Chunk Request</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCREQ6</name>
<description>Source Chunk Request</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DCREQ6</name>
<description>Destination Chunk Request</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCREQ7</name>
<description>Source Chunk Request</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DCREQ7</name>
<description>Destination Chunk Request</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>LAST</name>
<description>DMAC Software Last Transfer Flag Register</description>
<addressOffset>0x00000010</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SLAST0</name>
<description>Source Last</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DLAST0</name>
<description>Destination Last</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SLAST1</name>
<description>Source Last</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DLAST1</name>
<description>Destination Last</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SLAST2</name>
<description>Source Last</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DLAST2</name>
<description>Destination Last</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SLAST3</name>
<description>Source Last</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DLAST3</name>
<description>Destination Last</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SLAST4</name>
<description>Source Last</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DLAST4</name>
<description>Destination Last</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SLAST5</name>
<description>Source Last</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DLAST5</name>
<description>Destination Last</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SLAST6</name>
<description>Source Last</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DLAST6</name>
<description>Destination Last</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SLAST7</name>
<description>Source Last</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DLAST7</name>
<description>Destination Last</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>EBCIER</name>
<description>DMAC Error, Chained Buffer Transfer Completed Interrupt and Buffer Transfer Completed Interrupt Enable register.</description>
<addressOffset>0x00000018</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>BTC0</name>
<description>Buffer Transfer Completed [7:0]</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BTC1</name>
<description>Buffer Transfer Completed [7:0]</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BTC2</name>
<description>Buffer Transfer Completed [7:0]</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BTC3</name>
<description>Buffer Transfer Completed [7:0]</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BTC4</name>
<description>Buffer Transfer Completed [7:0]</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BTC5</name>
<description>Buffer Transfer Completed [7:0]</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BTC6</name>
<description>Buffer Transfer Completed [7:0]</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BTC7</name>
<description>Buffer Transfer Completed [7:0]</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CBTC0</name>
<description>Chained Buffer Transfer Completed [7:0]</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CBTC1</name>
<description>Chained Buffer Transfer Completed [7:0]</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CBTC2</name>
<description>Chained Buffer Transfer Completed [7:0]</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CBTC3</name>
<description>Chained Buffer Transfer Completed [7:0]</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CBTC4</name>
<description>Chained Buffer Transfer Completed [7:0]</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CBTC5</name>
<description>Chained Buffer Transfer Completed [7:0]</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CBTC6</name>
<description>Chained Buffer Transfer Completed [7:0]</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CBTC7</name>
<description>Chained Buffer Transfer Completed [7:0]</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR0</name>
<description>Access Error [7:0]</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR1</name>
<description>Access Error [7:0]</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR2</name>
<description>Access Error [7:0]</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR3</name>
<description>Access Error [7:0]</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR4</name>
<description>Access Error [7:0]</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR5</name>
<description>Access Error [7:0]</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR6</name>
<description>Access Error [7:0]</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR7</name>
<description>Access Error [7:0]</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DICERR0</name>
<description>Descriptor Integrity Check Error [7:0]</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DICERR1</name>
<description>Descriptor Integrity Check Error [7:0]</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DICERR2</name>
<description>Descriptor Integrity Check Error [7:0]</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DICERR3</name>
<description>Descriptor Integrity Check Error [7:0]</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DICERR4</name>
<description>Descriptor Integrity Check Error [7:0]</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DICERR5</name>
<description>Descriptor Integrity Check Error [7:0]</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DICERR6</name>
<description>Descriptor Integrity Check Error [7:0]</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DICERR7</name>
<description>Descriptor Integrity Check Error [7:0]</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EBCIDR</name>
<description>DMAC Error, Chained Buffer Transfer Completed Interrupt and Buffer Transfer Completed Interrupt Disable register.</description>
<addressOffset>0x0000001C</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>BTC0</name>
<description>Buffer Transfer Completed [7:0]</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BTC1</name>
<description>Buffer Transfer Completed [7:0]</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BTC2</name>
<description>Buffer Transfer Completed [7:0]</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BTC3</name>
<description>Buffer Transfer Completed [7:0]</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BTC4</name>
<description>Buffer Transfer Completed [7:0]</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BTC5</name>
<description>Buffer Transfer Completed [7:0]</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BTC6</name>
<description>Buffer Transfer Completed [7:0]</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BTC7</name>
<description>Buffer Transfer Completed [7:0]</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CBTC0</name>
<description>Chained Buffer Transfer Completed [7:0]</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CBTC1</name>
<description>Chained Buffer Transfer Completed [7:0]</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CBTC2</name>
<description>Chained Buffer Transfer Completed [7:0]</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CBTC3</name>
<description>Chained Buffer Transfer Completed [7:0]</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CBTC4</name>
<description>Chained Buffer Transfer Completed [7:0]</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CBTC5</name>
<description>Chained Buffer Transfer Completed [7:0]</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CBTC6</name>
<description>Chained Buffer Transfer Completed [7:0]</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CBTC7</name>
<description>Chained Buffer Transfer Completed [7:0]</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR0</name>
<description>Access Error [7:0]</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR1</name>
<description>Access Error [7:0]</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR2</name>
<description>Access Error [7:0]</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR3</name>
<description>Access Error [7:0]</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR4</name>
<description>Access Error [7:0]</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR5</name>
<description>Access Error [7:0]</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR6</name>
<description>Access Error [7:0]</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR7</name>
<description>Access Error [7:0]</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DICERR0</name>
<description>Descriptor Integrity Check Error [7:0]</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DICERR1</name>
<description>Descriptor Integrity Check Error [7:0]</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DICERR2</name>
<description>Descriptor Integrity Check Error [7:0]</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DICERR3</name>
<description>Descriptor Integrity Check Error [7:0]</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DICERR4</name>
<description>Descriptor Integrity Check Error [7:0]</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DICERR5</name>
<description>Descriptor Integrity Check Error [7:0]</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DICERR6</name>
<description>Descriptor Integrity Check Error [7:0]</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DICERR7</name>
<description>Descriptor Integrity Check Error [7:0]</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EBCIMR</name>
<description>DMAC Error, Chained Buffer Transfer Completed Interrupt and Buffer transfer completed Mask Register.</description>
<addressOffset>0x00000020</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>BTC0</name>
<description>Buffer Transfer Completed [7:0]</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BTC1</name>
<description>Buffer Transfer Completed [7:0]</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BTC2</name>
<description>Buffer Transfer Completed [7:0]</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BTC3</name>
<description>Buffer Transfer Completed [7:0]</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BTC4</name>
<description>Buffer Transfer Completed [7:0]</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BTC5</name>
<description>Buffer Transfer Completed [7:0]</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BTC6</name>
<description>Buffer Transfer Completed [7:0]</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BTC7</name>
<description>Buffer Transfer Completed [7:0]</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CBTC0</name>
<description>Chained Buffer Transfer Completed [7:0]</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CBTC1</name>
<description>Chained Buffer Transfer Completed [7:0]</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CBTC2</name>
<description>Chained Buffer Transfer Completed [7:0]</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CBTC3</name>
<description>Chained Buffer Transfer Completed [7:0]</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CBTC4</name>
<description>Chained Buffer Transfer Completed [7:0]</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CBTC5</name>
<description>Chained Buffer Transfer Completed [7:0]</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CBTC6</name>
<description>Chained Buffer Transfer Completed [7:0]</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CBTC7</name>
<description>Chained Buffer Transfer Completed [7:0]</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR0</name>
<description>Access Error [7:0]</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR1</name>
<description>Access Error [7:0]</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR2</name>
<description>Access Error [7:0]</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR3</name>
<description>Access Error [7:0]</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR4</name>
<description>Access Error [7:0]</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR5</name>
<description>Access Error [7:0]</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR6</name>
<description>Access Error [7:0]</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR7</name>
<description>Access Error [7:0]</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DICERR0</name>
<description>Descriptor Integrity Check Error [7:0]</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DICERR1</name>
<description>Descriptor Integrity Check Error [7:0]</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DICERR2</name>
<description>Descriptor Integrity Check Error [7:0]</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DICERR3</name>
<description>Descriptor Integrity Check Error [7:0]</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DICERR4</name>
<description>Descriptor Integrity Check Error [7:0]</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DICERR5</name>
<description>Descriptor Integrity Check Error [7:0]</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DICERR6</name>
<description>Descriptor Integrity Check Error [7:0]</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DICERR7</name>
<description>Descriptor Integrity Check Error [7:0]</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>EBCISR</name>
<description>DMAC Error, Chained Buffer Transfer Completed Interrupt and Buffer transfer completed Status Register.</description>
<addressOffset>0x00000024</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>BTC0</name>
<description>Buffer Transfer Completed [7:0]</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BTC1</name>
<description>Buffer Transfer Completed [7:0]</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BTC2</name>
<description>Buffer Transfer Completed [7:0]</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BTC3</name>
<description>Buffer Transfer Completed [7:0]</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BTC4</name>
<description>Buffer Transfer Completed [7:0]</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BTC5</name>
<description>Buffer Transfer Completed [7:0]</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BTC6</name>
<description>Buffer Transfer Completed [7:0]</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BTC7</name>
<description>Buffer Transfer Completed [7:0]</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CBTC0</name>
<description>Chained Buffer Transfer Completed [7:0]</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CBTC1</name>
<description>Chained Buffer Transfer Completed [7:0]</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CBTC2</name>
<description>Chained Buffer Transfer Completed [7:0]</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CBTC3</name>
<description>Chained Buffer Transfer Completed [7:0]</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CBTC4</name>
<description>Chained Buffer Transfer Completed [7:0]</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CBTC5</name>
<description>Chained Buffer Transfer Completed [7:0]</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CBTC6</name>
<description>Chained Buffer Transfer Completed [7:0]</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CBTC7</name>
<description>Chained Buffer Transfer Completed [7:0]</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR0</name>
<description>Access Error [7:0]</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR1</name>
<description>Access Error [7:0]</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR2</name>
<description>Access Error [7:0]</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR3</name>
<description>Access Error [7:0]</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR4</name>
<description>Access Error [7:0]</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR5</name>
<description>Access Error [7:0]</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR6</name>
<description>Access Error [7:0]</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR7</name>
<description>Access Error [7:0]</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DICERR0</name>
<description>Descriptor Integrity Check Error [7:0]</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DICERR1</name>
<description>Descriptor Integrity Check Error [7:0]</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DICERR2</name>
<description>Descriptor Integrity Check Error [7:0]</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DICERR3</name>
<description>Descriptor Integrity Check Error [7:0]</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DICERR4</name>
<description>Descriptor Integrity Check Error [7:0]</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DICERR5</name>
<description>Descriptor Integrity Check Error [7:0]</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DICERR6</name>
<description>Descriptor Integrity Check Error [7:0]</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DICERR7</name>
<description>Descriptor Integrity Check Error [7:0]</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>CHER</name>
<description>DMAC Channel Handler Enable Register</description>
<addressOffset>0x00000028</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>ENA0</name>
<description>Enable [7:0]</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ENA1</name>
<description>Enable [7:0]</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ENA2</name>
<description>Enable [7:0]</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ENA3</name>
<description>Enable [7:0]</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ENA4</name>
<description>Enable [7:0]</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ENA5</name>
<description>Enable [7:0]</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ENA6</name>
<description>Enable [7:0]</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ENA7</name>
<description>Enable [7:0]</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SUSP0</name>
<description>Suspend [7:0]</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SUSP1</name>
<description>Suspend [7:0]</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SUSP2</name>
<description>Suspend [7:0]</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SUSP3</name>
<description>Suspend [7:0]</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SUSP4</name>
<description>Suspend [7:0]</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SUSP5</name>
<description>Suspend [7:0]</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SUSP6</name>
<description>Suspend [7:0]</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SUSP7</name>
<description>Suspend [7:0]</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>KEEP0</name>
<description>Keep on [7:0]</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>KEEP1</name>
<description>Keep on [7:0]</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>KEEP2</name>
<description>Keep on [7:0]</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>KEEP3</name>
<description>Keep on [7:0]</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>KEEP4</name>
<description>Keep on [7:0]</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>KEEP5</name>
<description>Keep on [7:0]</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>KEEP6</name>
<description>Keep on [7:0]</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>KEEP7</name>
<description>Keep on [7:0]</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>CHDR</name>
<description>DMAC Channel Handler Disable Register</description>
<addressOffset>0x0000002C</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>DIS0</name>
<description>Disable [7:0]</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DIS1</name>
<description>Disable [7:0]</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DIS2</name>
<description>Disable [7:0]</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DIS3</name>
<description>Disable [7:0]</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DIS4</name>
<description>Disable [7:0]</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DIS5</name>
<description>Disable [7:0]</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DIS6</name>
<description>Disable [7:0]</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DIS7</name>
<description>Disable [7:0]</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RES0</name>
<description>Resume [7:0]</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RES1</name>
<description>Resume [7:0]</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RES2</name>
<description>Resume [7:0]</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RES3</name>
<description>Resume [7:0]</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RES4</name>
<description>Resume [7:0]</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RES5</name>
<description>Resume [7:0]</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RES6</name>
<description>Resume [7:0]</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RES7</name>
<description>Resume [7:0]</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>CHSR</name>
<description>DMAC Channel Handler Status Register</description>
<addressOffset>0x00000030</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00FF0000</resetValue>
<fields>
<field>
<name>ENA0</name>
<description>Enable [7:0]</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ENA1</name>
<description>Enable [7:0]</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ENA2</name>
<description>Enable [7:0]</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ENA3</name>
<description>Enable [7:0]</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ENA4</name>
<description>Enable [7:0]</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ENA5</name>
<description>Enable [7:0]</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ENA6</name>
<description>Enable [7:0]</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ENA7</name>
<description>Enable [7:0]</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SUSP0</name>
<description>Suspend [7:0]</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SUSP1</name>
<description>Suspend [7:0]</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SUSP2</name>
<description>Suspend [7:0]</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SUSP3</name>
<description>Suspend [7:0]</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SUSP4</name>
<description>Suspend [7:0]</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SUSP5</name>
<description>Suspend [7:0]</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SUSP6</name>
<description>Suspend [7:0]</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SUSP7</name>
<description>Suspend [7:0]</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>EMPT0</name>
<description>Empty [7:0]</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>EMPT1</name>
<description>Empty [7:0]</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>EMPT2</name>
<description>Empty [7:0]</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>EMPT3</name>
<description>Empty [7:0]</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>EMPT4</name>
<description>Empty [7:0]</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>EMPT5</name>
<description>Empty [7:0]</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>EMPT6</name>
<description>Empty [7:0]</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>EMPT7</name>
<description>Empty [7:0]</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>STAL0</name>
<description>Stalled [7:0]</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>STAL1</name>
<description>Stalled [7:0]</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>STAL2</name>
<description>Stalled [7:0]</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>STAL3</name>
<description>Stalled [7:0]</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>STAL4</name>
<description>Stalled [7:0]</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>STAL5</name>
<description>Stalled [7:0]</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>STAL6</name>
<description>Stalled [7:0]</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>STAL7</name>
<description>Stalled [7:0]</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>SADDR0</name>
<description>DMAC Channel Source Address Register (ch_num = 0)</description>
<addressOffset>0x0000003C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SADDR</name>
<description>Channel x Source Address</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DADDR0</name>
<description>DMAC Channel Destination Address Register (ch_num = 0)</description>
<addressOffset>0x00000040</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DADDR</name>
<description>Channel x Destination Address</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DSCR0</name>
<description>DMAC Channel Descriptor Address Register (ch_num = 0)</description>
<addressOffset>0x00000044</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DSCR_IF</name>
<description>Descriptor Interface Selection</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>AHB_IF0</name>
<description>The buffer transfer descriptor is fetched via AHB-Lite Interface 0</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF1</name>
<description>The buffer transfer descriptor is fetched via AHB-Lite Interface 1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF2</name>
<description>The buffer transfer descriptor is fetched via AHB-Lite Interface 2</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DSCR</name>
<description>Buffer Transfer Descriptor Address</description>
<bitOffset>2</bitOffset>
<bitWidth>30</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>CTRLA0</name>
<description>DMAC Channel Control A Register (ch_num = 0)</description>
<addressOffset>0x00000048</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>BTSIZE</name>
<description>Buffer Transfer Size</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCSIZE</name>
<description>Source Chunk Transfer Size.</description>
<bitOffset>16</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CHK_1</name>
<description>1 data transferred</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_4</name>
<description>4 data transferred</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_8</name>
<description>8 data transferred</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_16</name>
<description>16 data transferred</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DCSIZE</name>
<description>Destination Chunk Transfer Size</description>
<bitOffset>20</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CHK_1</name>
<description>1 data transferred</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_4</name>
<description>4 data transferred</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_8</name>
<description>8 data transferred</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_16</name>
<description>16 data transferred</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_WIDTH</name>
<description>Transfer Width for the Source</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>BYTE</name>
<description>the transfer size is set to 8-bit width</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>HALF_WORD</name>
<description>the transfer size is set to 16-bit width</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>WORD</name>
<description>the transfer size is set to 32-bit width</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>DWORD</name>
<description>the transfer size is set to 64-bit width</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_WIDTH</name>
<description>Transfer Width for the Destination</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>BYTE</name>
<description>the transfer size is set to 8-bit width</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>HALF_WORD</name>
<description>the transfer size is set to 16-bit width</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>WORD</name>
<description>the transfer size is set to 32-bit width</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>DWORD</name>
<description>the transfer size is set to 64-bit width</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DONE</name>
<description>Current Descriptor Stop Command and Transfer Completed Memory Indicator</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>CTRLB0</name>
<description>DMAC Channel Control B Register (ch_num = 0)</description>
<addressOffset>0x0000004C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SIF</name>
<description>Source Interface Selection Field</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>AHB_IF0</name>
<description>The source transfer is done via AHB_Lite Interface 0</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF1</name>
<description>The source transfer is done via AHB_Lite Interface 1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF2</name>
<description>The source transfer is done via AHB_Lite Interface 2</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DIF</name>
<description>Destination Interface Selection Field</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>AHB_IF0</name>
<description>The destination transfer is done via AHB_Lite Interface 0</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF1</name>
<description>The destination transfer is done via AHB_Lite Interface 1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF2</name>
<description>The destination transfer is done via AHB_Lite Interface 2</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_PIP</name>
<description>Source Picture-in-Picture Mode</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>Picture-in-Picture mode is disabled. The source data area is contiguous.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ENABLE</name>
<description>Picture-in-Picture mode is enabled. When the source PIP counter reaches the programmable boundary, the address is automatically incremented by a user defined amount.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_PIP</name>
<description>Destination Picture-in-Picture Mode</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>Picture-in-Picture mode is disabled. The Destination data area is contiguous.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ENABLE</name>
<description>Picture-in-Picture mode is enabled. When the Destination PIP counter reaches the programmable boundary the address is automatically incremented by a user-defined amount.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_DSCR</name>
<description>Source Address Descriptor</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>FETCH_FROM_MEM</name>
<description>Source address is updated when the descriptor is fetched from the memory.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>FETCH_DISABLE</name>
<description>Buffer Descriptor Fetch operation is disabled for the source.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_DSCR</name>
<description>Destination Address Descriptor</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>FETCH_FROM_MEM</name>
<description>Destination address is updated when the descriptor is fetched from the memory.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>FETCH_DISABLE</name>
<description>Buffer Descriptor Fetch operation is disabled for the destination.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>FC</name>
<description>Flow Control</description>
<bitOffset>21</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>MEM2MEM_DMA_FC</name>
<description>Memory-to-Memory Transfer DMAC is flow controller</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>MEM2PER_DMA_FC</name>
<description>Memory-to-Peripheral Transfer DMAC is flow controller</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>PER2MEM_DMA_FC</name>
<description>Peripheral-to-Memory Transfer DMAC is flow controller</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>PER2PER_DMA_FC</name>
<description>Peripheral-to-Peripheral Transfer DMAC is flow controller</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_INCR</name>
<description>Incrementing, Decrementing or Fixed Address for the Source</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>INCREMENTING</name>
<description>The source address is incremented</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>DECREMENTING</name>
<description>The source address is decremented</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>FIXED</name>
<description>The source address remains unchanged</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_INCR</name>
<description>Incrementing, Decrementing or Fixed Address for the Destination</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>INCREMENTING</name>
<description>The destination address is incremented</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>DECREMENTING</name>
<description>The destination address is decremented</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>FIXED</name>
<description>The destination address remains unchanged</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>IEN</name>
<description>Interrupt Enable Not</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>AUTO</name>
<description>Automatic Multiple Buffer Transfer</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>Automatic multiple buffer transfer is disabled.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ENABLE</name>
<description>Automatic multiple buffer transfer is enabled. This bit enables replay mode or contiguous mode when several buffers are transferred.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>CFG0</name>
<description>DMAC Channel Configuration Register (ch_num = 0)</description>
<addressOffset>0x00000050</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x01000000</resetValue>
<fields>
<field>
<name>SRC_PER</name>
<description>Source with Peripheral identifier</description>
<bitOffset>0</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DST_PER</name>
<description>Destination with Peripheral identifier</description>
<bitOffset>4</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SRC_REP</name>
<description>Source Reloaded from Previous</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CONTIGUOUS_ADDR</name>
<description>When automatic mode is activated, source address is contiguous between two buffers.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>RELOAD_ADDR</name>
<description>When automatic mode is activated, the source address and the control register are reloaded from previous transfer.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_H2SEL</name>
<description>Software or Hardware Selection for the Source</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>SW</name>
<description>Software handshaking interface is used to trigger a transfer request.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>HW</name>
<description>Hardware handshaking interface is used to trigger a transfer request.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_PER_MSB</name>
<description>SRC_PER Most Significant Bits</description>
<bitOffset>10</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DST_REP</name>
<description>Destination Reloaded from Previous</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CONTIGUOUS_ADDR</name>
<description>When automatic mode is activated, destination address is contiguous between two buffers.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>RELOAD_ADDR</name>
<description>When automatic mode is activated, the destination and the control register are reloaded from the pre-vious transfer.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_H2SEL</name>
<description>Software or Hardware Selection for the Destination</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>SW</name>
<description>Software handshaking interface is used to trigger a transfer request.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>HW</name>
<description>Hardware handshaking interface is used to trigger a transfer request.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_PER_MSB</name>
<description>DST_PER Most Significant Bits</description>
<bitOffset>14</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SOD</name>
<description>Stop On Done</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>STOP ON DONE disabled, the descriptor fetch operation ignores DONE Field of CTRLA register.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ENABLE</name>
<description>STOP ON DONE activated, the DMAC module is automatically disabled if DONE FIELD is set to 1.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LOCK_IF</name>
<description>Interface Lock</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>Interface Lock capability is disabled</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ENABLE</name>
<description>Interface Lock capability is enabled</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LOCK_B</name>
<description>Bus Lock</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>AHB Bus Locking capability is disabled.</description>
<value>0</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LOCK_IF_L</name>
<description>Master Interface Arbiter Lock</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CHUNK</name>
<description>The Master Interface Arbiter is locked by the channel x for a chunk transfer.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>BUFFER</name>
<description>The Master Interface Arbiter is locked by the channel x for a buffer transfer.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>AHB_PROT</name>
<description>AHB Protection</description>
<bitOffset>24</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
</field>
<field>
<name>FIFOCFG</name>
<description>FIFO Configuration</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>ALAP_CFG</name>
<description>The largest defined length AHB burst is performed on the destination AHB interface.</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>HALF_CFG</name>
<description>When half FIFO size is available/filled, a source/destination request is serviced.</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>ASAP_CFG</name>
<description>When there is enough space/data available to perform a single AHB access, then the request is serviced.</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>SPIP0</name>
<description>DMAC Channel Source Picture-in-Picture Configuration Register (ch_num = 0)</description>
<addressOffset>0x00000054</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SPIP_HOLE</name>
<description>Source Picture-in-Picture Hole</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SPIP_BOUNDARY</name>
<description>Source Picture-in-Picture Boundary</description>
<bitOffset>16</bitOffset>
<bitWidth>10</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DPIP0</name>
<description>DMAC Channel Destination Picture-in-Picture Configuration Register (ch_num = 0)</description>
<addressOffset>0x00000058</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DPIP_HOLE</name>
<description>Destination Picture-in-Picture Hole</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DPIP_BOUNDARY</name>
<description>Destination Picture-in-Picture Boundary</description>
<bitOffset>16</bitOffset>
<bitWidth>10</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>SADDR1</name>
<description>DMAC Channel Source Address Register (ch_num = 1)</description>
<addressOffset>0x00000064</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SADDR</name>
<description>Channel x Source Address</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DADDR1</name>
<description>DMAC Channel Destination Address Register (ch_num = 1)</description>
<addressOffset>0x00000068</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DADDR</name>
<description>Channel x Destination Address</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DSCR1</name>
<description>DMAC Channel Descriptor Address Register (ch_num = 1)</description>
<addressOffset>0x0000006C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DSCR_IF</name>
<description>Descriptor Interface Selection</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>AHB_IF0</name>
<description>The buffer transfer descriptor is fetched via AHB-Lite Interface 0</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF1</name>
<description>The buffer transfer descriptor is fetched via AHB-Lite Interface 1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF2</name>
<description>The buffer transfer descriptor is fetched via AHB-Lite Interface 2</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DSCR</name>
<description>Buffer Transfer Descriptor Address</description>
<bitOffset>2</bitOffset>
<bitWidth>30</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>CTRLA1</name>
<description>DMAC Channel Control A Register (ch_num = 1)</description>
<addressOffset>0x00000070</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>BTSIZE</name>
<description>Buffer Transfer Size</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCSIZE</name>
<description>Source Chunk Transfer Size.</description>
<bitOffset>16</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CHK_1</name>
<description>1 data transferred</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_4</name>
<description>4 data transferred</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_8</name>
<description>8 data transferred</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_16</name>
<description>16 data transferred</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DCSIZE</name>
<description>Destination Chunk Transfer Size</description>
<bitOffset>20</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CHK_1</name>
<description>1 data transferred</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_4</name>
<description>4 data transferred</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_8</name>
<description>8 data transferred</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_16</name>
<description>16 data transferred</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_WIDTH</name>
<description>Transfer Width for the Source</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>BYTE</name>
<description>the transfer size is set to 8-bit width</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>HALF_WORD</name>
<description>the transfer size is set to 16-bit width</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>WORD</name>
<description>the transfer size is set to 32-bit width</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>DWORD</name>
<description>the transfer size is set to 64-bit width</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_WIDTH</name>
<description>Transfer Width for the Destination</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>BYTE</name>
<description>the transfer size is set to 8-bit width</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>HALF_WORD</name>
<description>the transfer size is set to 16-bit width</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>WORD</name>
<description>the transfer size is set to 32-bit width</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>DWORD</name>
<description>the transfer size is set to 64-bit width</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DONE</name>
<description>Current Descriptor Stop Command and Transfer Completed Memory Indicator</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>CTRLB1</name>
<description>DMAC Channel Control B Register (ch_num = 1)</description>
<addressOffset>0x00000074</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SIF</name>
<description>Source Interface Selection Field</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>AHB_IF0</name>
<description>The source transfer is done via AHB_Lite Interface 0</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF1</name>
<description>The source transfer is done via AHB_Lite Interface 1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF2</name>
<description>The source transfer is done via AHB_Lite Interface 2</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DIF</name>
<description>Destination Interface Selection Field</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>AHB_IF0</name>
<description>The destination transfer is done via AHB_Lite Interface 0</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF1</name>
<description>The destination transfer is done via AHB_Lite Interface 1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF2</name>
<description>The destination transfer is done via AHB_Lite Interface 2</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_PIP</name>
<description>Source Picture-in-Picture Mode</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>Picture-in-Picture mode is disabled. The source data area is contiguous.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ENABLE</name>
<description>Picture-in-Picture mode is enabled. When the source PIP counter reaches the programmable boundary, the address is automatically incremented by a user defined amount.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_PIP</name>
<description>Destination Picture-in-Picture Mode</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>Picture-in-Picture mode is disabled. The Destination data area is contiguous.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ENABLE</name>
<description>Picture-in-Picture mode is enabled. When the Destination PIP counter reaches the programmable boundary the address is automatically incremented by a user-defined amount.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_DSCR</name>
<description>Source Address Descriptor</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>FETCH_FROM_MEM</name>
<description>Source address is updated when the descriptor is fetched from the memory.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>FETCH_DISABLE</name>
<description>Buffer Descriptor Fetch operation is disabled for the source.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_DSCR</name>
<description>Destination Address Descriptor</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>FETCH_FROM_MEM</name>
<description>Destination address is updated when the descriptor is fetched from the memory.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>FETCH_DISABLE</name>
<description>Buffer Descriptor Fetch operation is disabled for the destination.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>FC</name>
<description>Flow Control</description>
<bitOffset>21</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>MEM2MEM_DMA_FC</name>
<description>Memory-to-Memory Transfer DMAC is flow controller</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>MEM2PER_DMA_FC</name>
<description>Memory-to-Peripheral Transfer DMAC is flow controller</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>PER2MEM_DMA_FC</name>
<description>Peripheral-to-Memory Transfer DMAC is flow controller</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>PER2PER_DMA_FC</name>
<description>Peripheral-to-Peripheral Transfer DMAC is flow controller</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_INCR</name>
<description>Incrementing, Decrementing or Fixed Address for the Source</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>INCREMENTING</name>
<description>The source address is incremented</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>DECREMENTING</name>
<description>The source address is decremented</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>FIXED</name>
<description>The source address remains unchanged</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_INCR</name>
<description>Incrementing, Decrementing or Fixed Address for the Destination</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>INCREMENTING</name>
<description>The destination address is incremented</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>DECREMENTING</name>
<description>The destination address is decremented</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>FIXED</name>
<description>The destination address remains unchanged</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>IEN</name>
<description>Interrupt Enable Not</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>AUTO</name>
<description>Automatic Multiple Buffer Transfer</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>Automatic multiple buffer transfer is disabled.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ENABLE</name>
<description>Automatic multiple buffer transfer is enabled. This bit enables replay mode or contiguous mode when several buffers are transferred.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>CFG1</name>
<description>DMAC Channel Configuration Register (ch_num = 1)</description>
<addressOffset>0x00000078</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x01000000</resetValue>
<fields>
<field>
<name>SRC_PER</name>
<description>Source with Peripheral identifier</description>
<bitOffset>0</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DST_PER</name>
<description>Destination with Peripheral identifier</description>
<bitOffset>4</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SRC_REP</name>
<description>Source Reloaded from Previous</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CONTIGUOUS_ADDR</name>
<description>When automatic mode is activated, source address is contiguous between two buffers.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>RELOAD_ADDR</name>
<description>When automatic mode is activated, the source address and the control register are reloaded from previous transfer.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_H2SEL</name>
<description>Software or Hardware Selection for the Source</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>SW</name>
<description>Software handshaking interface is used to trigger a transfer request.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>HW</name>
<description>Hardware handshaking interface is used to trigger a transfer request.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_PER_MSB</name>
<description>SRC_PER Most Significant Bits</description>
<bitOffset>10</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DST_REP</name>
<description>Destination Reloaded from Previous</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CONTIGUOUS_ADDR</name>
<description>When automatic mode is activated, destination address is contiguous between two buffers.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>RELOAD_ADDR</name>
<description>When automatic mode is activated, the destination and the control register are reloaded from the pre-vious transfer.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_H2SEL</name>
<description>Software or Hardware Selection for the Destination</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>SW</name>
<description>Software handshaking interface is used to trigger a transfer request.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>HW</name>
<description>Hardware handshaking interface is used to trigger a transfer request.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_PER_MSB</name>
<description>DST_PER Most Significant Bits</description>
<bitOffset>14</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SOD</name>
<description>Stop On Done</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>STOP ON DONE disabled, the descriptor fetch operation ignores DONE Field of CTRLA register.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ENABLE</name>
<description>STOP ON DONE activated, the DMAC module is automatically disabled if DONE FIELD is set to 1.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LOCK_IF</name>
<description>Interface Lock</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>Interface Lock capability is disabled</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ENABLE</name>
<description>Interface Lock capability is enabled</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LOCK_B</name>
<description>Bus Lock</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>AHB Bus Locking capability is disabled.</description>
<value>0</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LOCK_IF_L</name>
<description>Master Interface Arbiter Lock</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CHUNK</name>
<description>The Master Interface Arbiter is locked by the channel x for a chunk transfer.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>BUFFER</name>
<description>The Master Interface Arbiter is locked by the channel x for a buffer transfer.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>AHB_PROT</name>
<description>AHB Protection</description>
<bitOffset>24</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
</field>
<field>
<name>FIFOCFG</name>
<description>FIFO Configuration</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>ALAP_CFG</name>
<description>The largest defined length AHB burst is performed on the destination AHB interface.</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>HALF_CFG</name>
<description>When half FIFO size is available/filled, a source/destination request is serviced.</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>ASAP_CFG</name>
<description>When there is enough space/data available to perform a single AHB access, then the request is serviced.</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>SPIP1</name>
<description>DMAC Channel Source Picture-in-Picture Configuration Register (ch_num = 1)</description>
<addressOffset>0x0000007C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SPIP_HOLE</name>
<description>Source Picture-in-Picture Hole</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SPIP_BOUNDARY</name>
<description>Source Picture-in-Picture Boundary</description>
<bitOffset>16</bitOffset>
<bitWidth>10</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DPIP1</name>
<description>DMAC Channel Destination Picture-in-Picture Configuration Register (ch_num = 1)</description>
<addressOffset>0x00000080</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DPIP_HOLE</name>
<description>Destination Picture-in-Picture Hole</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DPIP_BOUNDARY</name>
<description>Destination Picture-in-Picture Boundary</description>
<bitOffset>16</bitOffset>
<bitWidth>10</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>SADDR2</name>
<description>DMAC Channel Source Address Register (ch_num = 2)</description>
<addressOffset>0x0000008C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SADDR</name>
<description>Channel x Source Address</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DADDR2</name>
<description>DMAC Channel Destination Address Register (ch_num = 2)</description>
<addressOffset>0x00000090</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DADDR</name>
<description>Channel x Destination Address</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DSCR2</name>
<description>DMAC Channel Descriptor Address Register (ch_num = 2)</description>
<addressOffset>0x00000094</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DSCR_IF</name>
<description>Descriptor Interface Selection</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>AHB_IF0</name>
<description>The buffer transfer descriptor is fetched via AHB-Lite Interface 0</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF1</name>
<description>The buffer transfer descriptor is fetched via AHB-Lite Interface 1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF2</name>
<description>The buffer transfer descriptor is fetched via AHB-Lite Interface 2</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DSCR</name>
<description>Buffer Transfer Descriptor Address</description>
<bitOffset>2</bitOffset>
<bitWidth>30</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>CTRLA2</name>
<description>DMAC Channel Control A Register (ch_num = 2)</description>
<addressOffset>0x00000098</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>BTSIZE</name>
<description>Buffer Transfer Size</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCSIZE</name>
<description>Source Chunk Transfer Size.</description>
<bitOffset>16</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CHK_1</name>
<description>1 data transferred</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_4</name>
<description>4 data transferred</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_8</name>
<description>8 data transferred</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_16</name>
<description>16 data transferred</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DCSIZE</name>
<description>Destination Chunk Transfer Size</description>
<bitOffset>20</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CHK_1</name>
<description>1 data transferred</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_4</name>
<description>4 data transferred</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_8</name>
<description>8 data transferred</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_16</name>
<description>16 data transferred</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_WIDTH</name>
<description>Transfer Width for the Source</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>BYTE</name>
<description>the transfer size is set to 8-bit width</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>HALF_WORD</name>
<description>the transfer size is set to 16-bit width</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>WORD</name>
<description>the transfer size is set to 32-bit width</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>DWORD</name>
<description>the transfer size is set to 64-bit width</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_WIDTH</name>
<description>Transfer Width for the Destination</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>BYTE</name>
<description>the transfer size is set to 8-bit width</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>HALF_WORD</name>
<description>the transfer size is set to 16-bit width</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>WORD</name>
<description>the transfer size is set to 32-bit width</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>DWORD</name>
<description>the transfer size is set to 64-bit width</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DONE</name>
<description>Current Descriptor Stop Command and Transfer Completed Memory Indicator</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>CTRLB2</name>
<description>DMAC Channel Control B Register (ch_num = 2)</description>
<addressOffset>0x0000009C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SIF</name>
<description>Source Interface Selection Field</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>AHB_IF0</name>
<description>The source transfer is done via AHB_Lite Interface 0</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF1</name>
<description>The source transfer is done via AHB_Lite Interface 1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF2</name>
<description>The source transfer is done via AHB_Lite Interface 2</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DIF</name>
<description>Destination Interface Selection Field</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>AHB_IF0</name>
<description>The destination transfer is done via AHB_Lite Interface 0</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF1</name>
<description>The destination transfer is done via AHB_Lite Interface 1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF2</name>
<description>The destination transfer is done via AHB_Lite Interface 2</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_PIP</name>
<description>Source Picture-in-Picture Mode</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>Picture-in-Picture mode is disabled. The source data area is contiguous.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ENABLE</name>
<description>Picture-in-Picture mode is enabled. When the source PIP counter reaches the programmable boundary, the address is automatically incremented by a user defined amount.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_PIP</name>
<description>Destination Picture-in-Picture Mode</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>Picture-in-Picture mode is disabled. The Destination data area is contiguous.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ENABLE</name>
<description>Picture-in-Picture mode is enabled. When the Destination PIP counter reaches the programmable boundary the address is automatically incremented by a user-defined amount.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_DSCR</name>
<description>Source Address Descriptor</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>FETCH_FROM_MEM</name>
<description>Source address is updated when the descriptor is fetched from the memory.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>FETCH_DISABLE</name>
<description>Buffer Descriptor Fetch operation is disabled for the source.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_DSCR</name>
<description>Destination Address Descriptor</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>FETCH_FROM_MEM</name>
<description>Destination address is updated when the descriptor is fetched from the memory.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>FETCH_DISABLE</name>
<description>Buffer Descriptor Fetch operation is disabled for the destination.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>FC</name>
<description>Flow Control</description>
<bitOffset>21</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>MEM2MEM_DMA_FC</name>
<description>Memory-to-Memory Transfer DMAC is flow controller</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>MEM2PER_DMA_FC</name>
<description>Memory-to-Peripheral Transfer DMAC is flow controller</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>PER2MEM_DMA_FC</name>
<description>Peripheral-to-Memory Transfer DMAC is flow controller</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>PER2PER_DMA_FC</name>
<description>Peripheral-to-Peripheral Transfer DMAC is flow controller</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_INCR</name>
<description>Incrementing, Decrementing or Fixed Address for the Source</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>INCREMENTING</name>
<description>The source address is incremented</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>DECREMENTING</name>
<description>The source address is decremented</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>FIXED</name>
<description>The source address remains unchanged</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_INCR</name>
<description>Incrementing, Decrementing or Fixed Address for the Destination</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>INCREMENTING</name>
<description>The destination address is incremented</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>DECREMENTING</name>
<description>The destination address is decremented</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>FIXED</name>
<description>The destination address remains unchanged</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>IEN</name>
<description>Interrupt Enable Not</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>AUTO</name>
<description>Automatic Multiple Buffer Transfer</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>Automatic multiple buffer transfer is disabled.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ENABLE</name>
<description>Automatic multiple buffer transfer is enabled. This bit enables replay mode or contiguous mode when several buffers are transferred.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>CFG2</name>
<description>DMAC Channel Configuration Register (ch_num = 2)</description>
<addressOffset>0x000000A0</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x01000000</resetValue>
<fields>
<field>
<name>SRC_PER</name>
<description>Source with Peripheral identifier</description>
<bitOffset>0</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DST_PER</name>
<description>Destination with Peripheral identifier</description>
<bitOffset>4</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SRC_REP</name>
<description>Source Reloaded from Previous</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CONTIGUOUS_ADDR</name>
<description>When automatic mode is activated, source address is contiguous between two buffers.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>RELOAD_ADDR</name>
<description>When automatic mode is activated, the source address and the control register are reloaded from previous transfer.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_H2SEL</name>
<description>Software or Hardware Selection for the Source</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>SW</name>
<description>Software handshaking interface is used to trigger a transfer request.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>HW</name>
<description>Hardware handshaking interface is used to trigger a transfer request.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_PER_MSB</name>
<description>SRC_PER Most Significant Bits</description>
<bitOffset>10</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DST_REP</name>
<description>Destination Reloaded from Previous</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CONTIGUOUS_ADDR</name>
<description>When automatic mode is activated, destination address is contiguous between two buffers.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>RELOAD_ADDR</name>
<description>When automatic mode is activated, the destination and the control register are reloaded from the pre-vious transfer.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_H2SEL</name>
<description>Software or Hardware Selection for the Destination</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>SW</name>
<description>Software handshaking interface is used to trigger a transfer request.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>HW</name>
<description>Hardware handshaking interface is used to trigger a transfer request.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_PER_MSB</name>
<description>DST_PER Most Significant Bits</description>
<bitOffset>14</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SOD</name>
<description>Stop On Done</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>STOP ON DONE disabled, the descriptor fetch operation ignores DONE Field of CTRLA register.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ENABLE</name>
<description>STOP ON DONE activated, the DMAC module is automatically disabled if DONE FIELD is set to 1.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LOCK_IF</name>
<description>Interface Lock</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>Interface Lock capability is disabled</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ENABLE</name>
<description>Interface Lock capability is enabled</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LOCK_B</name>
<description>Bus Lock</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>AHB Bus Locking capability is disabled.</description>
<value>0</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LOCK_IF_L</name>
<description>Master Interface Arbiter Lock</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CHUNK</name>
<description>The Master Interface Arbiter is locked by the channel x for a chunk transfer.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>BUFFER</name>
<description>The Master Interface Arbiter is locked by the channel x for a buffer transfer.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>AHB_PROT</name>
<description>AHB Protection</description>
<bitOffset>24</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
</field>
<field>
<name>FIFOCFG</name>
<description>FIFO Configuration</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>ALAP_CFG</name>
<description>The largest defined length AHB burst is performed on the destination AHB interface.</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>HALF_CFG</name>
<description>When half FIFO size is available/filled, a source/destination request is serviced.</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>ASAP_CFG</name>
<description>When there is enough space/data available to perform a single AHB access, then the request is serviced.</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>SPIP2</name>
<description>DMAC Channel Source Picture-in-Picture Configuration Register (ch_num = 2)</description>
<addressOffset>0x000000A4</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SPIP_HOLE</name>
<description>Source Picture-in-Picture Hole</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SPIP_BOUNDARY</name>
<description>Source Picture-in-Picture Boundary</description>
<bitOffset>16</bitOffset>
<bitWidth>10</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DPIP2</name>
<description>DMAC Channel Destination Picture-in-Picture Configuration Register (ch_num = 2)</description>
<addressOffset>0x000000A8</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DPIP_HOLE</name>
<description>Destination Picture-in-Picture Hole</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DPIP_BOUNDARY</name>
<description>Destination Picture-in-Picture Boundary</description>
<bitOffset>16</bitOffset>
<bitWidth>10</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>SADDR3</name>
<description>DMAC Channel Source Address Register (ch_num = 3)</description>
<addressOffset>0x000000B4</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SADDR</name>
<description>Channel x Source Address</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DADDR3</name>
<description>DMAC Channel Destination Address Register (ch_num = 3)</description>
<addressOffset>0x000000B8</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DADDR</name>
<description>Channel x Destination Address</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DSCR3</name>
<description>DMAC Channel Descriptor Address Register (ch_num = 3)</description>
<addressOffset>0x000000BC</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DSCR_IF</name>
<description>Descriptor Interface Selection</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>AHB_IF0</name>
<description>The buffer transfer descriptor is fetched via AHB-Lite Interface 0</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF1</name>
<description>The buffer transfer descriptor is fetched via AHB-Lite Interface 1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF2</name>
<description>The buffer transfer descriptor is fetched via AHB-Lite Interface 2</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DSCR</name>
<description>Buffer Transfer Descriptor Address</description>
<bitOffset>2</bitOffset>
<bitWidth>30</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>CTRLA3</name>
<description>DMAC Channel Control A Register (ch_num = 3)</description>
<addressOffset>0x000000C0</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>BTSIZE</name>
<description>Buffer Transfer Size</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCSIZE</name>
<description>Source Chunk Transfer Size.</description>
<bitOffset>16</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CHK_1</name>
<description>1 data transferred</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_4</name>
<description>4 data transferred</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_8</name>
<description>8 data transferred</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_16</name>
<description>16 data transferred</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DCSIZE</name>
<description>Destination Chunk Transfer Size</description>
<bitOffset>20</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CHK_1</name>
<description>1 data transferred</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_4</name>
<description>4 data transferred</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_8</name>
<description>8 data transferred</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_16</name>
<description>16 data transferred</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_WIDTH</name>
<description>Transfer Width for the Source</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>BYTE</name>
<description>the transfer size is set to 8-bit width</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>HALF_WORD</name>
<description>the transfer size is set to 16-bit width</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>WORD</name>
<description>the transfer size is set to 32-bit width</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>DWORD</name>
<description>the transfer size is set to 64-bit width</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_WIDTH</name>
<description>Transfer Width for the Destination</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>BYTE</name>
<description>the transfer size is set to 8-bit width</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>HALF_WORD</name>
<description>the transfer size is set to 16-bit width</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>WORD</name>
<description>the transfer size is set to 32-bit width</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>DWORD</name>
<description>the transfer size is set to 64-bit width</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DONE</name>
<description>Current Descriptor Stop Command and Transfer Completed Memory Indicator</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>CTRLB3</name>
<description>DMAC Channel Control B Register (ch_num = 3)</description>
<addressOffset>0x000000C4</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SIF</name>
<description>Source Interface Selection Field</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>AHB_IF0</name>
<description>The source transfer is done via AHB_Lite Interface 0</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF1</name>
<description>The source transfer is done via AHB_Lite Interface 1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF2</name>
<description>The source transfer is done via AHB_Lite Interface 2</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DIF</name>
<description>Destination Interface Selection Field</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>AHB_IF0</name>
<description>The destination transfer is done via AHB_Lite Interface 0</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF1</name>
<description>The destination transfer is done via AHB_Lite Interface 1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF2</name>
<description>The destination transfer is done via AHB_Lite Interface 2</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_PIP</name>
<description>Source Picture-in-Picture Mode</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>Picture-in-Picture mode is disabled. The source data area is contiguous.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ENABLE</name>
<description>Picture-in-Picture mode is enabled. When the source PIP counter reaches the programmable boundary, the address is automatically incremented by a user defined amount.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_PIP</name>
<description>Destination Picture-in-Picture Mode</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>Picture-in-Picture mode is disabled. The Destination data area is contiguous.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ENABLE</name>
<description>Picture-in-Picture mode is enabled. When the Destination PIP counter reaches the programmable boundary the address is automatically incremented by a user-defined amount.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_DSCR</name>
<description>Source Address Descriptor</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>FETCH_FROM_MEM</name>
<description>Source address is updated when the descriptor is fetched from the memory.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>FETCH_DISABLE</name>
<description>Buffer Descriptor Fetch operation is disabled for the source.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_DSCR</name>
<description>Destination Address Descriptor</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>FETCH_FROM_MEM</name>
<description>Destination address is updated when the descriptor is fetched from the memory.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>FETCH_DISABLE</name>
<description>Buffer Descriptor Fetch operation is disabled for the destination.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>FC</name>
<description>Flow Control</description>
<bitOffset>21</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>MEM2MEM_DMA_FC</name>
<description>Memory-to-Memory Transfer DMAC is flow controller</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>MEM2PER_DMA_FC</name>
<description>Memory-to-Peripheral Transfer DMAC is flow controller</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>PER2MEM_DMA_FC</name>
<description>Peripheral-to-Memory Transfer DMAC is flow controller</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>PER2PER_DMA_FC</name>
<description>Peripheral-to-Peripheral Transfer DMAC is flow controller</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_INCR</name>
<description>Incrementing, Decrementing or Fixed Address for the Source</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>INCREMENTING</name>
<description>The source address is incremented</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>DECREMENTING</name>
<description>The source address is decremented</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>FIXED</name>
<description>The source address remains unchanged</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_INCR</name>
<description>Incrementing, Decrementing or Fixed Address for the Destination</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>INCREMENTING</name>
<description>The destination address is incremented</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>DECREMENTING</name>
<description>The destination address is decremented</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>FIXED</name>
<description>The destination address remains unchanged</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>IEN</name>
<description>Interrupt Enable Not</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>AUTO</name>
<description>Automatic Multiple Buffer Transfer</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>Automatic multiple buffer transfer is disabled.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ENABLE</name>
<description>Automatic multiple buffer transfer is enabled. This bit enables replay mode or contiguous mode when several buffers are transferred.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>CFG3</name>
<description>DMAC Channel Configuration Register (ch_num = 3)</description>
<addressOffset>0x000000C8</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x01000000</resetValue>
<fields>
<field>
<name>SRC_PER</name>
<description>Source with Peripheral identifier</description>
<bitOffset>0</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DST_PER</name>
<description>Destination with Peripheral identifier</description>
<bitOffset>4</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SRC_REP</name>
<description>Source Reloaded from Previous</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CONTIGUOUS_ADDR</name>
<description>When automatic mode is activated, source address is contiguous between two buffers.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>RELOAD_ADDR</name>
<description>When automatic mode is activated, the source address and the control register are reloaded from previous transfer.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_H2SEL</name>
<description>Software or Hardware Selection for the Source</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>SW</name>
<description>Software handshaking interface is used to trigger a transfer request.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>HW</name>
<description>Hardware handshaking interface is used to trigger a transfer request.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_PER_MSB</name>
<description>SRC_PER Most Significant Bits</description>
<bitOffset>10</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DST_REP</name>
<description>Destination Reloaded from Previous</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CONTIGUOUS_ADDR</name>
<description>When automatic mode is activated, destination address is contiguous between two buffers.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>RELOAD_ADDR</name>
<description>When automatic mode is activated, the destination and the control register are reloaded from the pre-vious transfer.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_H2SEL</name>
<description>Software or Hardware Selection for the Destination</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>SW</name>
<description>Software handshaking interface is used to trigger a transfer request.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>HW</name>
<description>Hardware handshaking interface is used to trigger a transfer request.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_PER_MSB</name>
<description>DST_PER Most Significant Bits</description>
<bitOffset>14</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SOD</name>
<description>Stop On Done</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>STOP ON DONE disabled, the descriptor fetch operation ignores DONE Field of CTRLA register.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ENABLE</name>
<description>STOP ON DONE activated, the DMAC module is automatically disabled if DONE FIELD is set to 1.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LOCK_IF</name>
<description>Interface Lock</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>Interface Lock capability is disabled</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ENABLE</name>
<description>Interface Lock capability is enabled</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LOCK_B</name>
<description>Bus Lock</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>AHB Bus Locking capability is disabled.</description>
<value>0</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LOCK_IF_L</name>
<description>Master Interface Arbiter Lock</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CHUNK</name>
<description>The Master Interface Arbiter is locked by the channel x for a chunk transfer.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>BUFFER</name>
<description>The Master Interface Arbiter is locked by the channel x for a buffer transfer.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>AHB_PROT</name>
<description>AHB Protection</description>
<bitOffset>24</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
</field>
<field>
<name>FIFOCFG</name>
<description>FIFO Configuration</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>ALAP_CFG</name>
<description>The largest defined length AHB burst is performed on the destination AHB interface.</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>HALF_CFG</name>
<description>When half FIFO size is available/filled, a source/destination request is serviced.</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>ASAP_CFG</name>
<description>When there is enough space/data available to perform a single AHB access, then the request is serviced.</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>SPIP3</name>
<description>DMAC Channel Source Picture-in-Picture Configuration Register (ch_num = 3)</description>
<addressOffset>0x000000CC</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SPIP_HOLE</name>
<description>Source Picture-in-Picture Hole</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SPIP_BOUNDARY</name>
<description>Source Picture-in-Picture Boundary</description>
<bitOffset>16</bitOffset>
<bitWidth>10</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DPIP3</name>
<description>DMAC Channel Destination Picture-in-Picture Configuration Register (ch_num = 3)</description>
<addressOffset>0x000000D0</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DPIP_HOLE</name>
<description>Destination Picture-in-Picture Hole</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DPIP_BOUNDARY</name>
<description>Destination Picture-in-Picture Boundary</description>
<bitOffset>16</bitOffset>
<bitWidth>10</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>SADDR4</name>
<description>DMAC Channel Source Address Register (ch_num = 4)</description>
<addressOffset>0x000000DC</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SADDR</name>
<description>Channel x Source Address</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DADDR4</name>
<description>DMAC Channel Destination Address Register (ch_num = 4)</description>
<addressOffset>0x000000E0</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DADDR</name>
<description>Channel x Destination Address</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DSCR4</name>
<description>DMAC Channel Descriptor Address Register (ch_num = 4)</description>
<addressOffset>0x000000E4</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DSCR_IF</name>
<description>Descriptor Interface Selection</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>AHB_IF0</name>
<description>The buffer transfer descriptor is fetched via AHB-Lite Interface 0</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF1</name>
<description>The buffer transfer descriptor is fetched via AHB-Lite Interface 1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF2</name>
<description>The buffer transfer descriptor is fetched via AHB-Lite Interface 2</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DSCR</name>
<description>Buffer Transfer Descriptor Address</description>
<bitOffset>2</bitOffset>
<bitWidth>30</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>CTRLA4</name>
<description>DMAC Channel Control A Register (ch_num = 4)</description>
<addressOffset>0x000000E8</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>BTSIZE</name>
<description>Buffer Transfer Size</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCSIZE</name>
<description>Source Chunk Transfer Size.</description>
<bitOffset>16</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CHK_1</name>
<description>1 data transferred</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_4</name>
<description>4 data transferred</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_8</name>
<description>8 data transferred</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_16</name>
<description>16 data transferred</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DCSIZE</name>
<description>Destination Chunk Transfer Size</description>
<bitOffset>20</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CHK_1</name>
<description>1 data transferred</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_4</name>
<description>4 data transferred</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_8</name>
<description>8 data transferred</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_16</name>
<description>16 data transferred</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_WIDTH</name>
<description>Transfer Width for the Source</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>BYTE</name>
<description>the transfer size is set to 8-bit width</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>HALF_WORD</name>
<description>the transfer size is set to 16-bit width</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>WORD</name>
<description>the transfer size is set to 32-bit width</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>DWORD</name>
<description>the transfer size is set to 64-bit width</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_WIDTH</name>
<description>Transfer Width for the Destination</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>BYTE</name>
<description>the transfer size is set to 8-bit width</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>HALF_WORD</name>
<description>the transfer size is set to 16-bit width</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>WORD</name>
<description>the transfer size is set to 32-bit width</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>DWORD</name>
<description>the transfer size is set to 64-bit width</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DONE</name>
<description>Current Descriptor Stop Command and Transfer Completed Memory Indicator</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>CTRLB4</name>
<description>DMAC Channel Control B Register (ch_num = 4)</description>
<addressOffset>0x000000EC</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SIF</name>
<description>Source Interface Selection Field</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>AHB_IF0</name>
<description>The source transfer is done via AHB_Lite Interface 0</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF1</name>
<description>The source transfer is done via AHB_Lite Interface 1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF2</name>
<description>The source transfer is done via AHB_Lite Interface 2</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DIF</name>
<description>Destination Interface Selection Field</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>AHB_IF0</name>
<description>The destination transfer is done via AHB_Lite Interface 0</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF1</name>
<description>The destination transfer is done via AHB_Lite Interface 1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF2</name>
<description>The destination transfer is done via AHB_Lite Interface 2</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_PIP</name>
<description>Source Picture-in-Picture Mode</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>Picture-in-Picture mode is disabled. The source data area is contiguous.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ENABLE</name>
<description>Picture-in-Picture mode is enabled. When the source PIP counter reaches the programmable boundary, the address is automatically incremented by a user defined amount.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_PIP</name>
<description>Destination Picture-in-Picture Mode</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>Picture-in-Picture mode is disabled. The Destination data area is contiguous.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ENABLE</name>
<description>Picture-in-Picture mode is enabled. When the Destination PIP counter reaches the programmable boundary the address is automatically incremented by a user-defined amount.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_DSCR</name>
<description>Source Address Descriptor</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>FETCH_FROM_MEM</name>
<description>Source address is updated when the descriptor is fetched from the memory.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>FETCH_DISABLE</name>
<description>Buffer Descriptor Fetch operation is disabled for the source.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_DSCR</name>
<description>Destination Address Descriptor</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>FETCH_FROM_MEM</name>
<description>Destination address is updated when the descriptor is fetched from the memory.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>FETCH_DISABLE</name>
<description>Buffer Descriptor Fetch operation is disabled for the destination.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>FC</name>
<description>Flow Control</description>
<bitOffset>21</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>MEM2MEM_DMA_FC</name>
<description>Memory-to-Memory Transfer DMAC is flow controller</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>MEM2PER_DMA_FC</name>
<description>Memory-to-Peripheral Transfer DMAC is flow controller</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>PER2MEM_DMA_FC</name>
<description>Peripheral-to-Memory Transfer DMAC is flow controller</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>PER2PER_DMA_FC</name>
<description>Peripheral-to-Peripheral Transfer DMAC is flow controller</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_INCR</name>
<description>Incrementing, Decrementing or Fixed Address for the Source</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>INCREMENTING</name>
<description>The source address is incremented</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>DECREMENTING</name>
<description>The source address is decremented</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>FIXED</name>
<description>The source address remains unchanged</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_INCR</name>
<description>Incrementing, Decrementing or Fixed Address for the Destination</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>INCREMENTING</name>
<description>The destination address is incremented</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>DECREMENTING</name>
<description>The destination address is decremented</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>FIXED</name>
<description>The destination address remains unchanged</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>IEN</name>
<description>Interrupt Enable Not</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>AUTO</name>
<description>Automatic Multiple Buffer Transfer</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>Automatic multiple buffer transfer is disabled.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ENABLE</name>
<description>Automatic multiple buffer transfer is enabled. This bit enables replay mode or contiguous mode when several buffers are transferred.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>CFG4</name>
<description>DMAC Channel Configuration Register (ch_num = 4)</description>
<addressOffset>0x000000F0</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x01000000</resetValue>
<fields>
<field>
<name>SRC_PER</name>
<description>Source with Peripheral identifier</description>
<bitOffset>0</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DST_PER</name>
<description>Destination with Peripheral identifier</description>
<bitOffset>4</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SRC_REP</name>
<description>Source Reloaded from Previous</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CONTIGUOUS_ADDR</name>
<description>When automatic mode is activated, source address is contiguous between two buffers.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>RELOAD_ADDR</name>
<description>When automatic mode is activated, the source address and the control register are reloaded from previous transfer.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_H2SEL</name>
<description>Software or Hardware Selection for the Source</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>SW</name>
<description>Software handshaking interface is used to trigger a transfer request.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>HW</name>
<description>Hardware handshaking interface is used to trigger a transfer request.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_PER_MSB</name>
<description>SRC_PER Most Significant Bits</description>
<bitOffset>10</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DST_REP</name>
<description>Destination Reloaded from Previous</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CONTIGUOUS_ADDR</name>
<description>When automatic mode is activated, destination address is contiguous between two buffers.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>RELOAD_ADDR</name>
<description>When automatic mode is activated, the destination and the control register are reloaded from the pre-vious transfer.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_H2SEL</name>
<description>Software or Hardware Selection for the Destination</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>SW</name>
<description>Software handshaking interface is used to trigger a transfer request.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>HW</name>
<description>Hardware handshaking interface is used to trigger a transfer request.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_PER_MSB</name>
<description>DST_PER Most Significant Bits</description>
<bitOffset>14</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SOD</name>
<description>Stop On Done</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>STOP ON DONE disabled, the descriptor fetch operation ignores DONE Field of CTRLA register.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ENABLE</name>
<description>STOP ON DONE activated, the DMAC module is automatically disabled if DONE FIELD is set to 1.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LOCK_IF</name>
<description>Interface Lock</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>Interface Lock capability is disabled</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ENABLE</name>
<description>Interface Lock capability is enabled</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LOCK_B</name>
<description>Bus Lock</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>AHB Bus Locking capability is disabled.</description>
<value>0</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LOCK_IF_L</name>
<description>Master Interface Arbiter Lock</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CHUNK</name>
<description>The Master Interface Arbiter is locked by the channel x for a chunk transfer.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>BUFFER</name>
<description>The Master Interface Arbiter is locked by the channel x for a buffer transfer.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>AHB_PROT</name>
<description>AHB Protection</description>
<bitOffset>24</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
</field>
<field>
<name>FIFOCFG</name>
<description>FIFO Configuration</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>ALAP_CFG</name>
<description>The largest defined length AHB burst is performed on the destination AHB interface.</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>HALF_CFG</name>
<description>When half FIFO size is available/filled, a source/destination request is serviced.</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>ASAP_CFG</name>
<description>When there is enough space/data available to perform a single AHB access, then the request is serviced.</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>SPIP4</name>
<description>DMAC Channel Source Picture-in-Picture Configuration Register (ch_num = 4)</description>
<addressOffset>0x000000F4</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SPIP_HOLE</name>
<description>Source Picture-in-Picture Hole</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SPIP_BOUNDARY</name>
<description>Source Picture-in-Picture Boundary</description>
<bitOffset>16</bitOffset>
<bitWidth>10</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DPIP4</name>
<description>DMAC Channel Destination Picture-in-Picture Configuration Register (ch_num = 4)</description>
<addressOffset>0x000000F8</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DPIP_HOLE</name>
<description>Destination Picture-in-Picture Hole</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DPIP_BOUNDARY</name>
<description>Destination Picture-in-Picture Boundary</description>
<bitOffset>16</bitOffset>
<bitWidth>10</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>SADDR5</name>
<description>DMAC Channel Source Address Register (ch_num = 5)</description>
<addressOffset>0x00000104</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SADDR</name>
<description>Channel x Source Address</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DADDR5</name>
<description>DMAC Channel Destination Address Register (ch_num = 5)</description>
<addressOffset>0x00000108</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DADDR</name>
<description>Channel x Destination Address</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DSCR5</name>
<description>DMAC Channel Descriptor Address Register (ch_num = 5)</description>
<addressOffset>0x0000010C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DSCR_IF</name>
<description>Descriptor Interface Selection</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>AHB_IF0</name>
<description>The buffer transfer descriptor is fetched via AHB-Lite Interface 0</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF1</name>
<description>The buffer transfer descriptor is fetched via AHB-Lite Interface 1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF2</name>
<description>The buffer transfer descriptor is fetched via AHB-Lite Interface 2</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DSCR</name>
<description>Buffer Transfer Descriptor Address</description>
<bitOffset>2</bitOffset>
<bitWidth>30</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>CTRLA5</name>
<description>DMAC Channel Control A Register (ch_num = 5)</description>
<addressOffset>0x00000110</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>BTSIZE</name>
<description>Buffer Transfer Size</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCSIZE</name>
<description>Source Chunk Transfer Size.</description>
<bitOffset>16</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CHK_1</name>
<description>1 data transferred</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_4</name>
<description>4 data transferred</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_8</name>
<description>8 data transferred</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_16</name>
<description>16 data transferred</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DCSIZE</name>
<description>Destination Chunk Transfer Size</description>
<bitOffset>20</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CHK_1</name>
<description>1 data transferred</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_4</name>
<description>4 data transferred</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_8</name>
<description>8 data transferred</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_16</name>
<description>16 data transferred</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_WIDTH</name>
<description>Transfer Width for the Source</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>BYTE</name>
<description>the transfer size is set to 8-bit width</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>HALF_WORD</name>
<description>the transfer size is set to 16-bit width</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>WORD</name>
<description>the transfer size is set to 32-bit width</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>DWORD</name>
<description>the transfer size is set to 64-bit width</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_WIDTH</name>
<description>Transfer Width for the Destination</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>BYTE</name>
<description>the transfer size is set to 8-bit width</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>HALF_WORD</name>
<description>the transfer size is set to 16-bit width</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>WORD</name>
<description>the transfer size is set to 32-bit width</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>DWORD</name>
<description>the transfer size is set to 64-bit width</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DONE</name>
<description>Current Descriptor Stop Command and Transfer Completed Memory Indicator</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>CTRLB5</name>
<description>DMAC Channel Control B Register (ch_num = 5)</description>
<addressOffset>0x00000114</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SIF</name>
<description>Source Interface Selection Field</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>AHB_IF0</name>
<description>The source transfer is done via AHB_Lite Interface 0</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF1</name>
<description>The source transfer is done via AHB_Lite Interface 1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF2</name>
<description>The source transfer is done via AHB_Lite Interface 2</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DIF</name>
<description>Destination Interface Selection Field</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>AHB_IF0</name>
<description>The destination transfer is done via AHB_Lite Interface 0</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF1</name>
<description>The destination transfer is done via AHB_Lite Interface 1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF2</name>
<description>The destination transfer is done via AHB_Lite Interface 2</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_PIP</name>
<description>Source Picture-in-Picture Mode</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>Picture-in-Picture mode is disabled. The source data area is contiguous.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ENABLE</name>
<description>Picture-in-Picture mode is enabled. When the source PIP counter reaches the programmable boundary, the address is automatically incremented by a user defined amount.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_PIP</name>
<description>Destination Picture-in-Picture Mode</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>Picture-in-Picture mode is disabled. The Destination data area is contiguous.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ENABLE</name>
<description>Picture-in-Picture mode is enabled. When the Destination PIP counter reaches the programmable boundary the address is automatically incremented by a user-defined amount.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_DSCR</name>
<description>Source Address Descriptor</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>FETCH_FROM_MEM</name>
<description>Source address is updated when the descriptor is fetched from the memory.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>FETCH_DISABLE</name>
<description>Buffer Descriptor Fetch operation is disabled for the source.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_DSCR</name>
<description>Destination Address Descriptor</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>FETCH_FROM_MEM</name>
<description>Destination address is updated when the descriptor is fetched from the memory.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>FETCH_DISABLE</name>
<description>Buffer Descriptor Fetch operation is disabled for the destination.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>FC</name>
<description>Flow Control</description>
<bitOffset>21</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>MEM2MEM_DMA_FC</name>
<description>Memory-to-Memory Transfer DMAC is flow controller</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>MEM2PER_DMA_FC</name>
<description>Memory-to-Peripheral Transfer DMAC is flow controller</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>PER2MEM_DMA_FC</name>
<description>Peripheral-to-Memory Transfer DMAC is flow controller</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>PER2PER_DMA_FC</name>
<description>Peripheral-to-Peripheral Transfer DMAC is flow controller</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_INCR</name>
<description>Incrementing, Decrementing or Fixed Address for the Source</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>INCREMENTING</name>
<description>The source address is incremented</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>DECREMENTING</name>
<description>The source address is decremented</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>FIXED</name>
<description>The source address remains unchanged</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_INCR</name>
<description>Incrementing, Decrementing or Fixed Address for the Destination</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>INCREMENTING</name>
<description>The destination address is incremented</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>DECREMENTING</name>
<description>The destination address is decremented</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>FIXED</name>
<description>The destination address remains unchanged</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>IEN</name>
<description>Interrupt Enable Not</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>AUTO</name>
<description>Automatic Multiple Buffer Transfer</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>Automatic multiple buffer transfer is disabled.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ENABLE</name>
<description>Automatic multiple buffer transfer is enabled. This bit enables replay mode or contiguous mode when several buffers are transferred.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>CFG5</name>
<description>DMAC Channel Configuration Register (ch_num = 5)</description>
<addressOffset>0x00000118</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x01000000</resetValue>
<fields>
<field>
<name>SRC_PER</name>
<description>Source with Peripheral identifier</description>
<bitOffset>0</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DST_PER</name>
<description>Destination with Peripheral identifier</description>
<bitOffset>4</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SRC_REP</name>
<description>Source Reloaded from Previous</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CONTIGUOUS_ADDR</name>
<description>When automatic mode is activated, source address is contiguous between two buffers.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>RELOAD_ADDR</name>
<description>When automatic mode is activated, the source address and the control register are reloaded from previous transfer.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_H2SEL</name>
<description>Software or Hardware Selection for the Source</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>SW</name>
<description>Software handshaking interface is used to trigger a transfer request.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>HW</name>
<description>Hardware handshaking interface is used to trigger a transfer request.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_PER_MSB</name>
<description>SRC_PER Most Significant Bits</description>
<bitOffset>10</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DST_REP</name>
<description>Destination Reloaded from Previous</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CONTIGUOUS_ADDR</name>
<description>When automatic mode is activated, destination address is contiguous between two buffers.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>RELOAD_ADDR</name>
<description>When automatic mode is activated, the destination and the control register are reloaded from the pre-vious transfer.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_H2SEL</name>
<description>Software or Hardware Selection for the Destination</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>SW</name>
<description>Software handshaking interface is used to trigger a transfer request.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>HW</name>
<description>Hardware handshaking interface is used to trigger a transfer request.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_PER_MSB</name>
<description>DST_PER Most Significant Bits</description>
<bitOffset>14</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SOD</name>
<description>Stop On Done</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>STOP ON DONE disabled, the descriptor fetch operation ignores DONE Field of CTRLA register.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ENABLE</name>
<description>STOP ON DONE activated, the DMAC module is automatically disabled if DONE FIELD is set to 1.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LOCK_IF</name>
<description>Interface Lock</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>Interface Lock capability is disabled</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ENABLE</name>
<description>Interface Lock capability is enabled</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LOCK_B</name>
<description>Bus Lock</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>AHB Bus Locking capability is disabled.</description>
<value>0</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LOCK_IF_L</name>
<description>Master Interface Arbiter Lock</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CHUNK</name>
<description>The Master Interface Arbiter is locked by the channel x for a chunk transfer.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>BUFFER</name>
<description>The Master Interface Arbiter is locked by the channel x for a buffer transfer.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>AHB_PROT</name>
<description>AHB Protection</description>
<bitOffset>24</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
</field>
<field>
<name>FIFOCFG</name>
<description>FIFO Configuration</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>ALAP_CFG</name>
<description>The largest defined length AHB burst is performed on the destination AHB interface.</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>HALF_CFG</name>
<description>When half FIFO size is available/filled, a source/destination request is serviced.</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>ASAP_CFG</name>
<description>When there is enough space/data available to perform a single AHB access, then the request is serviced.</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>SPIP5</name>
<description>DMAC Channel Source Picture-in-Picture Configuration Register (ch_num = 5)</description>
<addressOffset>0x0000011C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SPIP_HOLE</name>
<description>Source Picture-in-Picture Hole</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SPIP_BOUNDARY</name>
<description>Source Picture-in-Picture Boundary</description>
<bitOffset>16</bitOffset>
<bitWidth>10</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DPIP5</name>
<description>DMAC Channel Destination Picture-in-Picture Configuration Register (ch_num = 5)</description>
<addressOffset>0x00000120</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DPIP_HOLE</name>
<description>Destination Picture-in-Picture Hole</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DPIP_BOUNDARY</name>
<description>Destination Picture-in-Picture Boundary</description>
<bitOffset>16</bitOffset>
<bitWidth>10</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>SADDR6</name>
<description>DMAC Channel Source Address Register (ch_num = 6)</description>
<addressOffset>0x0000012C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SADDR</name>
<description>Channel x Source Address</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DADDR6</name>
<description>DMAC Channel Destination Address Register (ch_num = 6)</description>
<addressOffset>0x00000130</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DADDR</name>
<description>Channel x Destination Address</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DSCR6</name>
<description>DMAC Channel Descriptor Address Register (ch_num = 6)</description>
<addressOffset>0x00000134</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DSCR_IF</name>
<description>Descriptor Interface Selection</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>AHB_IF0</name>
<description>The buffer transfer descriptor is fetched via AHB-Lite Interface 0</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF1</name>
<description>The buffer transfer descriptor is fetched via AHB-Lite Interface 1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF2</name>
<description>The buffer transfer descriptor is fetched via AHB-Lite Interface 2</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DSCR</name>
<description>Buffer Transfer Descriptor Address</description>
<bitOffset>2</bitOffset>
<bitWidth>30</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>CTRLA6</name>
<description>DMAC Channel Control A Register (ch_num = 6)</description>
<addressOffset>0x00000138</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>BTSIZE</name>
<description>Buffer Transfer Size</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCSIZE</name>
<description>Source Chunk Transfer Size.</description>
<bitOffset>16</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CHK_1</name>
<description>1 data transferred</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_4</name>
<description>4 data transferred</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_8</name>
<description>8 data transferred</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_16</name>
<description>16 data transferred</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DCSIZE</name>
<description>Destination Chunk Transfer Size</description>
<bitOffset>20</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CHK_1</name>
<description>1 data transferred</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_4</name>
<description>4 data transferred</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_8</name>
<description>8 data transferred</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_16</name>
<description>16 data transferred</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_WIDTH</name>
<description>Transfer Width for the Source</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>BYTE</name>
<description>the transfer size is set to 8-bit width</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>HALF_WORD</name>
<description>the transfer size is set to 16-bit width</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>WORD</name>
<description>the transfer size is set to 32-bit width</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>DWORD</name>
<description>the transfer size is set to 64-bit width</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_WIDTH</name>
<description>Transfer Width for the Destination</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>BYTE</name>
<description>the transfer size is set to 8-bit width</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>HALF_WORD</name>
<description>the transfer size is set to 16-bit width</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>WORD</name>
<description>the transfer size is set to 32-bit width</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>DWORD</name>
<description>the transfer size is set to 64-bit width</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DONE</name>
<description>Current Descriptor Stop Command and Transfer Completed Memory Indicator</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>CTRLB6</name>
<description>DMAC Channel Control B Register (ch_num = 6)</description>
<addressOffset>0x0000013C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SIF</name>
<description>Source Interface Selection Field</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>AHB_IF0</name>
<description>The source transfer is done via AHB_Lite Interface 0</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF1</name>
<description>The source transfer is done via AHB_Lite Interface 1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF2</name>
<description>The source transfer is done via AHB_Lite Interface 2</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DIF</name>
<description>Destination Interface Selection Field</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>AHB_IF0</name>
<description>The destination transfer is done via AHB_Lite Interface 0</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF1</name>
<description>The destination transfer is done via AHB_Lite Interface 1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF2</name>
<description>The destination transfer is done via AHB_Lite Interface 2</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_PIP</name>
<description>Source Picture-in-Picture Mode</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>Picture-in-Picture mode is disabled. The source data area is contiguous.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ENABLE</name>
<description>Picture-in-Picture mode is enabled. When the source PIP counter reaches the programmable boundary, the address is automatically incremented by a user defined amount.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_PIP</name>
<description>Destination Picture-in-Picture Mode</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>Picture-in-Picture mode is disabled. The Destination data area is contiguous.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ENABLE</name>
<description>Picture-in-Picture mode is enabled. When the Destination PIP counter reaches the programmable boundary the address is automatically incremented by a user-defined amount.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_DSCR</name>
<description>Source Address Descriptor</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>FETCH_FROM_MEM</name>
<description>Source address is updated when the descriptor is fetched from the memory.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>FETCH_DISABLE</name>
<description>Buffer Descriptor Fetch operation is disabled for the source.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_DSCR</name>
<description>Destination Address Descriptor</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>FETCH_FROM_MEM</name>
<description>Destination address is updated when the descriptor is fetched from the memory.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>FETCH_DISABLE</name>
<description>Buffer Descriptor Fetch operation is disabled for the destination.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>FC</name>
<description>Flow Control</description>
<bitOffset>21</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>MEM2MEM_DMA_FC</name>
<description>Memory-to-Memory Transfer DMAC is flow controller</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>MEM2PER_DMA_FC</name>
<description>Memory-to-Peripheral Transfer DMAC is flow controller</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>PER2MEM_DMA_FC</name>
<description>Peripheral-to-Memory Transfer DMAC is flow controller</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>PER2PER_DMA_FC</name>
<description>Peripheral-to-Peripheral Transfer DMAC is flow controller</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_INCR</name>
<description>Incrementing, Decrementing or Fixed Address for the Source</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>INCREMENTING</name>
<description>The source address is incremented</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>DECREMENTING</name>
<description>The source address is decremented</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>FIXED</name>
<description>The source address remains unchanged</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_INCR</name>
<description>Incrementing, Decrementing or Fixed Address for the Destination</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>INCREMENTING</name>
<description>The destination address is incremented</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>DECREMENTING</name>
<description>The destination address is decremented</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>FIXED</name>
<description>The destination address remains unchanged</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>IEN</name>
<description>Interrupt Enable Not</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>AUTO</name>
<description>Automatic Multiple Buffer Transfer</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>Automatic multiple buffer transfer is disabled.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ENABLE</name>
<description>Automatic multiple buffer transfer is enabled. This bit enables replay mode or contiguous mode when several buffers are transferred.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>CFG6</name>
<description>DMAC Channel Configuration Register (ch_num = 6)</description>
<addressOffset>0x00000140</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x01000000</resetValue>
<fields>
<field>
<name>SRC_PER</name>
<description>Source with Peripheral identifier</description>
<bitOffset>0</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DST_PER</name>
<description>Destination with Peripheral identifier</description>
<bitOffset>4</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SRC_REP</name>
<description>Source Reloaded from Previous</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CONTIGUOUS_ADDR</name>
<description>When automatic mode is activated, source address is contiguous between two buffers.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>RELOAD_ADDR</name>
<description>When automatic mode is activated, the source address and the control register are reloaded from previous transfer.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_H2SEL</name>
<description>Software or Hardware Selection for the Source</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>SW</name>
<description>Software handshaking interface is used to trigger a transfer request.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>HW</name>
<description>Hardware handshaking interface is used to trigger a transfer request.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_PER_MSB</name>
<description>SRC_PER Most Significant Bits</description>
<bitOffset>10</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DST_REP</name>
<description>Destination Reloaded from Previous</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CONTIGUOUS_ADDR</name>
<description>When automatic mode is activated, destination address is contiguous between two buffers.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>RELOAD_ADDR</name>
<description>When automatic mode is activated, the destination and the control register are reloaded from the pre-vious transfer.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_H2SEL</name>
<description>Software or Hardware Selection for the Destination</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>SW</name>
<description>Software handshaking interface is used to trigger a transfer request.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>HW</name>
<description>Hardware handshaking interface is used to trigger a transfer request.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_PER_MSB</name>
<description>DST_PER Most Significant Bits</description>
<bitOffset>14</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SOD</name>
<description>Stop On Done</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>STOP ON DONE disabled, the descriptor fetch operation ignores DONE Field of CTRLA register.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ENABLE</name>
<description>STOP ON DONE activated, the DMAC module is automatically disabled if DONE FIELD is set to 1.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LOCK_IF</name>
<description>Interface Lock</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>Interface Lock capability is disabled</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ENABLE</name>
<description>Interface Lock capability is enabled</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LOCK_B</name>
<description>Bus Lock</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>AHB Bus Locking capability is disabled.</description>
<value>0</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LOCK_IF_L</name>
<description>Master Interface Arbiter Lock</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CHUNK</name>
<description>The Master Interface Arbiter is locked by the channel x for a chunk transfer.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>BUFFER</name>
<description>The Master Interface Arbiter is locked by the channel x for a buffer transfer.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>AHB_PROT</name>
<description>AHB Protection</description>
<bitOffset>24</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
</field>
<field>
<name>FIFOCFG</name>
<description>FIFO Configuration</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>ALAP_CFG</name>
<description>The largest defined length AHB burst is performed on the destination AHB interface.</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>HALF_CFG</name>
<description>When half FIFO size is available/filled, a source/destination request is serviced.</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>ASAP_CFG</name>
<description>When there is enough space/data available to perform a single AHB access, then the request is serviced.</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>SPIP6</name>
<description>DMAC Channel Source Picture-in-Picture Configuration Register (ch_num = 6)</description>
<addressOffset>0x00000144</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SPIP_HOLE</name>
<description>Source Picture-in-Picture Hole</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SPIP_BOUNDARY</name>
<description>Source Picture-in-Picture Boundary</description>
<bitOffset>16</bitOffset>
<bitWidth>10</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DPIP6</name>
<description>DMAC Channel Destination Picture-in-Picture Configuration Register (ch_num = 6)</description>
<addressOffset>0x00000148</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DPIP_HOLE</name>
<description>Destination Picture-in-Picture Hole</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DPIP_BOUNDARY</name>
<description>Destination Picture-in-Picture Boundary</description>
<bitOffset>16</bitOffset>
<bitWidth>10</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>SADDR7</name>
<description>DMAC Channel Source Address Register (ch_num = 7)</description>
<addressOffset>0x00000154</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SADDR</name>
<description>Channel x Source Address</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DADDR7</name>
<description>DMAC Channel Destination Address Register (ch_num = 7)</description>
<addressOffset>0x00000158</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DADDR</name>
<description>Channel x Destination Address</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DSCR7</name>
<description>DMAC Channel Descriptor Address Register (ch_num = 7)</description>
<addressOffset>0x0000015C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DSCR_IF</name>
<description>Descriptor Interface Selection</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>AHB_IF0</name>
<description>The buffer transfer descriptor is fetched via AHB-Lite Interface 0</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF1</name>
<description>The buffer transfer descriptor is fetched via AHB-Lite Interface 1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF2</name>
<description>The buffer transfer descriptor is fetched via AHB-Lite Interface 2</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DSCR</name>
<description>Buffer Transfer Descriptor Address</description>
<bitOffset>2</bitOffset>
<bitWidth>30</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>CTRLA7</name>
<description>DMAC Channel Control A Register (ch_num = 7)</description>
<addressOffset>0x00000160</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>BTSIZE</name>
<description>Buffer Transfer Size</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCSIZE</name>
<description>Source Chunk Transfer Size.</description>
<bitOffset>16</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CHK_1</name>
<description>1 data transferred</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_4</name>
<description>4 data transferred</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_8</name>
<description>8 data transferred</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_16</name>
<description>16 data transferred</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DCSIZE</name>
<description>Destination Chunk Transfer Size</description>
<bitOffset>20</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CHK_1</name>
<description>1 data transferred</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_4</name>
<description>4 data transferred</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_8</name>
<description>8 data transferred</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_16</name>
<description>16 data transferred</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_WIDTH</name>
<description>Transfer Width for the Source</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>BYTE</name>
<description>the transfer size is set to 8-bit width</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>HALF_WORD</name>
<description>the transfer size is set to 16-bit width</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>WORD</name>
<description>the transfer size is set to 32-bit width</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>DWORD</name>
<description>the transfer size is set to 64-bit width</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_WIDTH</name>
<description>Transfer Width for the Destination</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>BYTE</name>
<description>the transfer size is set to 8-bit width</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>HALF_WORD</name>
<description>the transfer size is set to 16-bit width</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>WORD</name>
<description>the transfer size is set to 32-bit width</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>DWORD</name>
<description>the transfer size is set to 64-bit width</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DONE</name>
<description>Current Descriptor Stop Command and Transfer Completed Memory Indicator</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>CTRLB7</name>
<description>DMAC Channel Control B Register (ch_num = 7)</description>
<addressOffset>0x00000164</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SIF</name>
<description>Source Interface Selection Field</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>AHB_IF0</name>
<description>The source transfer is done via AHB_Lite Interface 0</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF1</name>
<description>The source transfer is done via AHB_Lite Interface 1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF2</name>
<description>The source transfer is done via AHB_Lite Interface 2</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DIF</name>
<description>Destination Interface Selection Field</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>AHB_IF0</name>
<description>The destination transfer is done via AHB_Lite Interface 0</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF1</name>
<description>The destination transfer is done via AHB_Lite Interface 1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF2</name>
<description>The destination transfer is done via AHB_Lite Interface 2</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_PIP</name>
<description>Source Picture-in-Picture Mode</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>Picture-in-Picture mode is disabled. The source data area is contiguous.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ENABLE</name>
<description>Picture-in-Picture mode is enabled. When the source PIP counter reaches the programmable boundary, the address is automatically incremented by a user defined amount.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_PIP</name>
<description>Destination Picture-in-Picture Mode</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>Picture-in-Picture mode is disabled. The Destination data area is contiguous.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ENABLE</name>
<description>Picture-in-Picture mode is enabled. When the Destination PIP counter reaches the programmable boundary the address is automatically incremented by a user-defined amount.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_DSCR</name>
<description>Source Address Descriptor</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>FETCH_FROM_MEM</name>
<description>Source address is updated when the descriptor is fetched from the memory.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>FETCH_DISABLE</name>
<description>Buffer Descriptor Fetch operation is disabled for the source.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_DSCR</name>
<description>Destination Address Descriptor</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>FETCH_FROM_MEM</name>
<description>Destination address is updated when the descriptor is fetched from the memory.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>FETCH_DISABLE</name>
<description>Buffer Descriptor Fetch operation is disabled for the destination.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>FC</name>
<description>Flow Control</description>
<bitOffset>21</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>MEM2MEM_DMA_FC</name>
<description>Memory-to-Memory Transfer DMAC is flow controller</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>MEM2PER_DMA_FC</name>
<description>Memory-to-Peripheral Transfer DMAC is flow controller</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>PER2MEM_DMA_FC</name>
<description>Peripheral-to-Memory Transfer DMAC is flow controller</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>PER2PER_DMA_FC</name>
<description>Peripheral-to-Peripheral Transfer DMAC is flow controller</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_INCR</name>
<description>Incrementing, Decrementing or Fixed Address for the Source</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>INCREMENTING</name>
<description>The source address is incremented</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>DECREMENTING</name>
<description>The source address is decremented</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>FIXED</name>
<description>The source address remains unchanged</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_INCR</name>
<description>Incrementing, Decrementing or Fixed Address for the Destination</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>INCREMENTING</name>
<description>The destination address is incremented</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>DECREMENTING</name>
<description>The destination address is decremented</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>FIXED</name>
<description>The destination address remains unchanged</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>IEN</name>
<description>Interrupt Enable Not</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>AUTO</name>
<description>Automatic Multiple Buffer Transfer</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>Automatic multiple buffer transfer is disabled.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ENABLE</name>
<description>Automatic multiple buffer transfer is enabled. This bit enables replay mode or contiguous mode when several buffers are transferred.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>CFG7</name>
<description>DMAC Channel Configuration Register (ch_num = 7)</description>
<addressOffset>0x00000168</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x01000000</resetValue>
<fields>
<field>
<name>SRC_PER</name>
<description>Source with Peripheral identifier</description>
<bitOffset>0</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DST_PER</name>
<description>Destination with Peripheral identifier</description>
<bitOffset>4</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SRC_REP</name>
<description>Source Reloaded from Previous</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CONTIGUOUS_ADDR</name>
<description>When automatic mode is activated, source address is contiguous between two buffers.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>RELOAD_ADDR</name>
<description>When automatic mode is activated, the source address and the control register are reloaded from previous transfer.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_H2SEL</name>
<description>Software or Hardware Selection for the Source</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>SW</name>
<description>Software handshaking interface is used to trigger a transfer request.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>HW</name>
<description>Hardware handshaking interface is used to trigger a transfer request.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_PER_MSB</name>
<description>SRC_PER Most Significant Bits</description>
<bitOffset>10</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DST_REP</name>
<description>Destination Reloaded from Previous</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CONTIGUOUS_ADDR</name>
<description>When automatic mode is activated, destination address is contiguous between two buffers.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>RELOAD_ADDR</name>
<description>When automatic mode is activated, the destination and the control register are reloaded from the pre-vious transfer.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_H2SEL</name>
<description>Software or Hardware Selection for the Destination</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>SW</name>
<description>Software handshaking interface is used to trigger a transfer request.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>HW</name>
<description>Hardware handshaking interface is used to trigger a transfer request.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_PER_MSB</name>
<description>DST_PER Most Significant Bits</description>
<bitOffset>14</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SOD</name>
<description>Stop On Done</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>STOP ON DONE disabled, the descriptor fetch operation ignores DONE Field of CTRLA register.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ENABLE</name>
<description>STOP ON DONE activated, the DMAC module is automatically disabled if DONE FIELD is set to 1.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LOCK_IF</name>
<description>Interface Lock</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>Interface Lock capability is disabled</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ENABLE</name>
<description>Interface Lock capability is enabled</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LOCK_B</name>
<description>Bus Lock</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>AHB Bus Locking capability is disabled.</description>
<value>0</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LOCK_IF_L</name>
<description>Master Interface Arbiter Lock</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CHUNK</name>
<description>The Master Interface Arbiter is locked by the channel x for a chunk transfer.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>BUFFER</name>
<description>The Master Interface Arbiter is locked by the channel x for a buffer transfer.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>AHB_PROT</name>
<description>AHB Protection</description>
<bitOffset>24</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
</field>
<field>
<name>FIFOCFG</name>
<description>FIFO Configuration</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>ALAP_CFG</name>
<description>The largest defined length AHB burst is performed on the destination AHB interface.</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>HALF_CFG</name>
<description>When half FIFO size is available/filled, a source/destination request is serviced.</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>ASAP_CFG</name>
<description>When there is enough space/data available to perform a single AHB access, then the request is serviced.</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>SPIP7</name>
<description>DMAC Channel Source Picture-in-Picture Configuration Register (ch_num = 7)</description>
<addressOffset>0x0000016C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SPIP_HOLE</name>
<description>Source Picture-in-Picture Hole</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SPIP_BOUNDARY</name>
<description>Source Picture-in-Picture Boundary</description>
<bitOffset>16</bitOffset>
<bitWidth>10</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DPIP7</name>
<description>DMAC Channel Destination Picture-in-Picture Configuration Register (ch_num = 7)</description>
<addressOffset>0x00000170</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DPIP_HOLE</name>
<description>Destination Picture-in-Picture Hole</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DPIP_BOUNDARY</name>
<description>Destination Picture-in-Picture Boundary</description>
<bitOffset>16</bitOffset>
<bitWidth>10</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>WPMR</name>
<description>DMAC Write Protect Mode Register</description>
<addressOffset>0x000001E4</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>WPEN</name>
<description>Write Protect Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>WPKEY</name>
<description>Write Protect KEY</description>
<bitOffset>8</bitOffset>
<bitWidth>24</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>WPSR</name>
<description>DMAC Write Protect Status Register</description>
<addressOffset>0x000001E8</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>WPVS</name>
<description>Write Protect Violation Status</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>WPVSRC</name>
<description>Write Protect Violation Source</description>
<bitOffset>8</bitOffset>
<bitWidth>16</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>DMAC1</name>
<version>6233O</version>
<description>DMA Controller 1</description>
<groupName>DMAC</groupName>
<prependToName>DMAC1_</prependToName>
<baseAddress>0xFFFFE800</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x200</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>DMAC1</name>
<value>31</value>
</interrupt>
<registers>
<register>
<name>GCFG</name>
<description>DMAC Global Configuration Register</description>
<addressOffset>0x00000000</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000010</resetValue>
<fields>
<field>
<name>ARB_CFG</name>
<description>Arbiter Configuration</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>FIXED</name>
<description>Fixed priority arbiter.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ROUND_ROBIN</name>
<description>Modified round robin arbiter.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DICEN</name>
<description>Descriptor Integrity Check</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>EN</name>
<description>DMAC Enable Register</description>
<addressOffset>0x00000004</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>ENABLE</name>
<description>General Enable of DMA</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>SREQ</name>
<description>DMAC Software Single Request Register</description>
<addressOffset>0x00000008</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SSREQ0</name>
<description>Source Request</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DSREQ0</name>
<description>Destination Request</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SSREQ1</name>
<description>Source Request</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DSREQ1</name>
<description>Destination Request</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SSREQ2</name>
<description>Source Request</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DSREQ2</name>
<description>Destination Request</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SSREQ3</name>
<description>Source Request</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DSREQ3</name>
<description>Destination Request</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SSREQ4</name>
<description>Source Request</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DSREQ4</name>
<description>Destination Request</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SSREQ5</name>
<description>Source Request</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DSREQ5</name>
<description>Destination Request</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SSREQ6</name>
<description>Source Request</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DSREQ6</name>
<description>Destination Request</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SSREQ7</name>
<description>Source Request</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DSREQ7</name>
<description>Destination Request</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>CREQ</name>
<description>DMAC Software Chunk Transfer Request Register</description>
<addressOffset>0x0000000C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SCREQ0</name>
<description>Source Chunk Request</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DCREQ0</name>
<description>Destination Chunk Request</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCREQ1</name>
<description>Source Chunk Request</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DCREQ1</name>
<description>Destination Chunk Request</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCREQ2</name>
<description>Source Chunk Request</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DCREQ2</name>
<description>Destination Chunk Request</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCREQ3</name>
<description>Source Chunk Request</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DCREQ3</name>
<description>Destination Chunk Request</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCREQ4</name>
<description>Source Chunk Request</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DCREQ4</name>
<description>Destination Chunk Request</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCREQ5</name>
<description>Source Chunk Request</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DCREQ5</name>
<description>Destination Chunk Request</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCREQ6</name>
<description>Source Chunk Request</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DCREQ6</name>
<description>Destination Chunk Request</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCREQ7</name>
<description>Source Chunk Request</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DCREQ7</name>
<description>Destination Chunk Request</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>LAST</name>
<description>DMAC Software Last Transfer Flag Register</description>
<addressOffset>0x00000010</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SLAST0</name>
<description>Source Last</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DLAST0</name>
<description>Destination Last</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SLAST1</name>
<description>Source Last</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DLAST1</name>
<description>Destination Last</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SLAST2</name>
<description>Source Last</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DLAST2</name>
<description>Destination Last</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SLAST3</name>
<description>Source Last</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DLAST3</name>
<description>Destination Last</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SLAST4</name>
<description>Source Last</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DLAST4</name>
<description>Destination Last</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SLAST5</name>
<description>Source Last</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DLAST5</name>
<description>Destination Last</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SLAST6</name>
<description>Source Last</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DLAST6</name>
<description>Destination Last</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SLAST7</name>
<description>Source Last</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DLAST7</name>
<description>Destination Last</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>EBCIER</name>
<description>DMAC Error, Chained Buffer Transfer Completed Interrupt and Buffer Transfer Completed Interrupt Enable register.</description>
<addressOffset>0x00000018</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>BTC0</name>
<description>Buffer Transfer Completed [7:0]</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BTC1</name>
<description>Buffer Transfer Completed [7:0]</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BTC2</name>
<description>Buffer Transfer Completed [7:0]</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BTC3</name>
<description>Buffer Transfer Completed [7:0]</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BTC4</name>
<description>Buffer Transfer Completed [7:0]</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BTC5</name>
<description>Buffer Transfer Completed [7:0]</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BTC6</name>
<description>Buffer Transfer Completed [7:0]</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BTC7</name>
<description>Buffer Transfer Completed [7:0]</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CBTC0</name>
<description>Chained Buffer Transfer Completed [7:0]</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CBTC1</name>
<description>Chained Buffer Transfer Completed [7:0]</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CBTC2</name>
<description>Chained Buffer Transfer Completed [7:0]</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CBTC3</name>
<description>Chained Buffer Transfer Completed [7:0]</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CBTC4</name>
<description>Chained Buffer Transfer Completed [7:0]</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CBTC5</name>
<description>Chained Buffer Transfer Completed [7:0]</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CBTC6</name>
<description>Chained Buffer Transfer Completed [7:0]</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CBTC7</name>
<description>Chained Buffer Transfer Completed [7:0]</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR0</name>
<description>Access Error [7:0]</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR1</name>
<description>Access Error [7:0]</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR2</name>
<description>Access Error [7:0]</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR3</name>
<description>Access Error [7:0]</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR4</name>
<description>Access Error [7:0]</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR5</name>
<description>Access Error [7:0]</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR6</name>
<description>Access Error [7:0]</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR7</name>
<description>Access Error [7:0]</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DICERR0</name>
<description>Descriptor Integrity Check Error [7:0]</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DICERR1</name>
<description>Descriptor Integrity Check Error [7:0]</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DICERR2</name>
<description>Descriptor Integrity Check Error [7:0]</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DICERR3</name>
<description>Descriptor Integrity Check Error [7:0]</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DICERR4</name>
<description>Descriptor Integrity Check Error [7:0]</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DICERR5</name>
<description>Descriptor Integrity Check Error [7:0]</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DICERR6</name>
<description>Descriptor Integrity Check Error [7:0]</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DICERR7</name>
<description>Descriptor Integrity Check Error [7:0]</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EBCIDR</name>
<description>DMAC Error, Chained Buffer Transfer Completed Interrupt and Buffer Transfer Completed Interrupt Disable register.</description>
<addressOffset>0x0000001C</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>BTC0</name>
<description>Buffer Transfer Completed [7:0]</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BTC1</name>
<description>Buffer Transfer Completed [7:0]</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BTC2</name>
<description>Buffer Transfer Completed [7:0]</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BTC3</name>
<description>Buffer Transfer Completed [7:0]</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BTC4</name>
<description>Buffer Transfer Completed [7:0]</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BTC5</name>
<description>Buffer Transfer Completed [7:0]</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BTC6</name>
<description>Buffer Transfer Completed [7:0]</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>BTC7</name>
<description>Buffer Transfer Completed [7:0]</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CBTC0</name>
<description>Chained Buffer Transfer Completed [7:0]</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CBTC1</name>
<description>Chained Buffer Transfer Completed [7:0]</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CBTC2</name>
<description>Chained Buffer Transfer Completed [7:0]</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CBTC3</name>
<description>Chained Buffer Transfer Completed [7:0]</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CBTC4</name>
<description>Chained Buffer Transfer Completed [7:0]</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CBTC5</name>
<description>Chained Buffer Transfer Completed [7:0]</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CBTC6</name>
<description>Chained Buffer Transfer Completed [7:0]</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CBTC7</name>
<description>Chained Buffer Transfer Completed [7:0]</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR0</name>
<description>Access Error [7:0]</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR1</name>
<description>Access Error [7:0]</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR2</name>
<description>Access Error [7:0]</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR3</name>
<description>Access Error [7:0]</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR4</name>
<description>Access Error [7:0]</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR5</name>
<description>Access Error [7:0]</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR6</name>
<description>Access Error [7:0]</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ERR7</name>
<description>Access Error [7:0]</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DICERR0</name>
<description>Descriptor Integrity Check Error [7:0]</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DICERR1</name>
<description>Descriptor Integrity Check Error [7:0]</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DICERR2</name>
<description>Descriptor Integrity Check Error [7:0]</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DICERR3</name>
<description>Descriptor Integrity Check Error [7:0]</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DICERR4</name>
<description>Descriptor Integrity Check Error [7:0]</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DICERR5</name>
<description>Descriptor Integrity Check Error [7:0]</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DICERR6</name>
<description>Descriptor Integrity Check Error [7:0]</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DICERR7</name>
<description>Descriptor Integrity Check Error [7:0]</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>EBCIMR</name>
<description>DMAC Error, Chained Buffer Transfer Completed Interrupt and Buffer transfer completed Mask Register.</description>
<addressOffset>0x00000020</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>BTC0</name>
<description>Buffer Transfer Completed [7:0]</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BTC1</name>
<description>Buffer Transfer Completed [7:0]</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BTC2</name>
<description>Buffer Transfer Completed [7:0]</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BTC3</name>
<description>Buffer Transfer Completed [7:0]</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BTC4</name>
<description>Buffer Transfer Completed [7:0]</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BTC5</name>
<description>Buffer Transfer Completed [7:0]</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BTC6</name>
<description>Buffer Transfer Completed [7:0]</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BTC7</name>
<description>Buffer Transfer Completed [7:0]</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CBTC0</name>
<description>Chained Buffer Transfer Completed [7:0]</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CBTC1</name>
<description>Chained Buffer Transfer Completed [7:0]</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CBTC2</name>
<description>Chained Buffer Transfer Completed [7:0]</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CBTC3</name>
<description>Chained Buffer Transfer Completed [7:0]</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CBTC4</name>
<description>Chained Buffer Transfer Completed [7:0]</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CBTC5</name>
<description>Chained Buffer Transfer Completed [7:0]</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CBTC6</name>
<description>Chained Buffer Transfer Completed [7:0]</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CBTC7</name>
<description>Chained Buffer Transfer Completed [7:0]</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR0</name>
<description>Access Error [7:0]</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR1</name>
<description>Access Error [7:0]</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR2</name>
<description>Access Error [7:0]</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR3</name>
<description>Access Error [7:0]</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR4</name>
<description>Access Error [7:0]</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR5</name>
<description>Access Error [7:0]</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR6</name>
<description>Access Error [7:0]</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR7</name>
<description>Access Error [7:0]</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DICERR0</name>
<description>Descriptor Integrity Check Error [7:0]</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DICERR1</name>
<description>Descriptor Integrity Check Error [7:0]</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DICERR2</name>
<description>Descriptor Integrity Check Error [7:0]</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DICERR3</name>
<description>Descriptor Integrity Check Error [7:0]</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DICERR4</name>
<description>Descriptor Integrity Check Error [7:0]</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DICERR5</name>
<description>Descriptor Integrity Check Error [7:0]</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DICERR6</name>
<description>Descriptor Integrity Check Error [7:0]</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DICERR7</name>
<description>Descriptor Integrity Check Error [7:0]</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>EBCISR</name>
<description>DMAC Error, Chained Buffer Transfer Completed Interrupt and Buffer transfer completed Status Register.</description>
<addressOffset>0x00000024</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>BTC0</name>
<description>Buffer Transfer Completed [7:0]</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BTC1</name>
<description>Buffer Transfer Completed [7:0]</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BTC2</name>
<description>Buffer Transfer Completed [7:0]</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BTC3</name>
<description>Buffer Transfer Completed [7:0]</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BTC4</name>
<description>Buffer Transfer Completed [7:0]</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BTC5</name>
<description>Buffer Transfer Completed [7:0]</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BTC6</name>
<description>Buffer Transfer Completed [7:0]</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>BTC7</name>
<description>Buffer Transfer Completed [7:0]</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CBTC0</name>
<description>Chained Buffer Transfer Completed [7:0]</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CBTC1</name>
<description>Chained Buffer Transfer Completed [7:0]</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CBTC2</name>
<description>Chained Buffer Transfer Completed [7:0]</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CBTC3</name>
<description>Chained Buffer Transfer Completed [7:0]</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CBTC4</name>
<description>Chained Buffer Transfer Completed [7:0]</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CBTC5</name>
<description>Chained Buffer Transfer Completed [7:0]</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CBTC6</name>
<description>Chained Buffer Transfer Completed [7:0]</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CBTC7</name>
<description>Chained Buffer Transfer Completed [7:0]</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR0</name>
<description>Access Error [7:0]</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR1</name>
<description>Access Error [7:0]</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR2</name>
<description>Access Error [7:0]</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR3</name>
<description>Access Error [7:0]</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR4</name>
<description>Access Error [7:0]</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR5</name>
<description>Access Error [7:0]</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR6</name>
<description>Access Error [7:0]</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ERR7</name>
<description>Access Error [7:0]</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DICERR0</name>
<description>Descriptor Integrity Check Error [7:0]</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DICERR1</name>
<description>Descriptor Integrity Check Error [7:0]</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DICERR2</name>
<description>Descriptor Integrity Check Error [7:0]</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DICERR3</name>
<description>Descriptor Integrity Check Error [7:0]</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DICERR4</name>
<description>Descriptor Integrity Check Error [7:0]</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DICERR5</name>
<description>Descriptor Integrity Check Error [7:0]</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DICERR6</name>
<description>Descriptor Integrity Check Error [7:0]</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DICERR7</name>
<description>Descriptor Integrity Check Error [7:0]</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>CHER</name>
<description>DMAC Channel Handler Enable Register</description>
<addressOffset>0x00000028</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>ENA0</name>
<description>Enable [7:0]</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ENA1</name>
<description>Enable [7:0]</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ENA2</name>
<description>Enable [7:0]</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ENA3</name>
<description>Enable [7:0]</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ENA4</name>
<description>Enable [7:0]</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ENA5</name>
<description>Enable [7:0]</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ENA6</name>
<description>Enable [7:0]</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ENA7</name>
<description>Enable [7:0]</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SUSP0</name>
<description>Suspend [7:0]</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SUSP1</name>
<description>Suspend [7:0]</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SUSP2</name>
<description>Suspend [7:0]</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SUSP3</name>
<description>Suspend [7:0]</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SUSP4</name>
<description>Suspend [7:0]</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SUSP5</name>
<description>Suspend [7:0]</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SUSP6</name>
<description>Suspend [7:0]</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SUSP7</name>
<description>Suspend [7:0]</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>KEEP0</name>
<description>Keep on [7:0]</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>KEEP1</name>
<description>Keep on [7:0]</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>KEEP2</name>
<description>Keep on [7:0]</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>KEEP3</name>
<description>Keep on [7:0]</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>KEEP4</name>
<description>Keep on [7:0]</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>KEEP5</name>
<description>Keep on [7:0]</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>KEEP6</name>
<description>Keep on [7:0]</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>KEEP7</name>
<description>Keep on [7:0]</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>CHDR</name>
<description>DMAC Channel Handler Disable Register</description>
<addressOffset>0x0000002C</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>DIS0</name>
<description>Disable [7:0]</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DIS1</name>
<description>Disable [7:0]</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DIS2</name>
<description>Disable [7:0]</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DIS3</name>
<description>Disable [7:0]</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DIS4</name>
<description>Disable [7:0]</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DIS5</name>
<description>Disable [7:0]</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DIS6</name>
<description>Disable [7:0]</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DIS7</name>
<description>Disable [7:0]</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RES0</name>
<description>Resume [7:0]</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RES1</name>
<description>Resume [7:0]</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RES2</name>
<description>Resume [7:0]</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RES3</name>
<description>Resume [7:0]</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RES4</name>
<description>Resume [7:0]</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RES5</name>
<description>Resume [7:0]</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RES6</name>
<description>Resume [7:0]</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RES7</name>
<description>Resume [7:0]</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>CHSR</name>
<description>DMAC Channel Handler Status Register</description>
<addressOffset>0x00000030</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00FF0000</resetValue>
<fields>
<field>
<name>ENA0</name>
<description>Enable [7:0]</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ENA1</name>
<description>Enable [7:0]</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ENA2</name>
<description>Enable [7:0]</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ENA3</name>
<description>Enable [7:0]</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ENA4</name>
<description>Enable [7:0]</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ENA5</name>
<description>Enable [7:0]</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ENA6</name>
<description>Enable [7:0]</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ENA7</name>
<description>Enable [7:0]</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SUSP0</name>
<description>Suspend [7:0]</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SUSP1</name>
<description>Suspend [7:0]</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SUSP2</name>
<description>Suspend [7:0]</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SUSP3</name>
<description>Suspend [7:0]</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SUSP4</name>
<description>Suspend [7:0]</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SUSP5</name>
<description>Suspend [7:0]</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SUSP6</name>
<description>Suspend [7:0]</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SUSP7</name>
<description>Suspend [7:0]</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>EMPT0</name>
<description>Empty [7:0]</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>EMPT1</name>
<description>Empty [7:0]</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>EMPT2</name>
<description>Empty [7:0]</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>EMPT3</name>
<description>Empty [7:0]</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>EMPT4</name>
<description>Empty [7:0]</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>EMPT5</name>
<description>Empty [7:0]</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>EMPT6</name>
<description>Empty [7:0]</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>EMPT7</name>
<description>Empty [7:0]</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>STAL0</name>
<description>Stalled [7:0]</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>STAL1</name>
<description>Stalled [7:0]</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>STAL2</name>
<description>Stalled [7:0]</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>STAL3</name>
<description>Stalled [7:0]</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>STAL4</name>
<description>Stalled [7:0]</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>STAL5</name>
<description>Stalled [7:0]</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>STAL6</name>
<description>Stalled [7:0]</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>STAL7</name>
<description>Stalled [7:0]</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>SADDR0</name>
<description>DMAC Channel Source Address Register (ch_num = 0)</description>
<addressOffset>0x0000003C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SADDR</name>
<description>Channel x Source Address</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DADDR0</name>
<description>DMAC Channel Destination Address Register (ch_num = 0)</description>
<addressOffset>0x00000040</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DADDR</name>
<description>Channel x Destination Address</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DSCR0</name>
<description>DMAC Channel Descriptor Address Register (ch_num = 0)</description>
<addressOffset>0x00000044</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DSCR_IF</name>
<description>Descriptor Interface Selection</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>AHB_IF0</name>
<description>The buffer transfer descriptor is fetched via AHB-Lite Interface 0</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF1</name>
<description>The buffer transfer descriptor is fetched via AHB-Lite Interface 1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF2</name>
<description>The buffer transfer descriptor is fetched via AHB-Lite Interface 2</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DSCR</name>
<description>Buffer Transfer Descriptor Address</description>
<bitOffset>2</bitOffset>
<bitWidth>30</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>CTRLA0</name>
<description>DMAC Channel Control A Register (ch_num = 0)</description>
<addressOffset>0x00000048</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>BTSIZE</name>
<description>Buffer Transfer Size</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCSIZE</name>
<description>Source Chunk Transfer Size.</description>
<bitOffset>16</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CHK_1</name>
<description>1 data transferred</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_4</name>
<description>4 data transferred</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_8</name>
<description>8 data transferred</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_16</name>
<description>16 data transferred</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DCSIZE</name>
<description>Destination Chunk Transfer Size</description>
<bitOffset>20</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CHK_1</name>
<description>1 data transferred</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_4</name>
<description>4 data transferred</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_8</name>
<description>8 data transferred</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_16</name>
<description>16 data transferred</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_WIDTH</name>
<description>Transfer Width for the Source</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>BYTE</name>
<description>the transfer size is set to 8-bit width</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>HALF_WORD</name>
<description>the transfer size is set to 16-bit width</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>WORD</name>
<description>the transfer size is set to 32-bit width</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>DWORD</name>
<description>the transfer size is set to 64-bit width</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_WIDTH</name>
<description>Transfer Width for the Destination</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>BYTE</name>
<description>the transfer size is set to 8-bit width</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>HALF_WORD</name>
<description>the transfer size is set to 16-bit width</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>WORD</name>
<description>the transfer size is set to 32-bit width</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>DWORD</name>
<description>the transfer size is set to 64-bit width</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DONE</name>
<description>Current Descriptor Stop Command and Transfer Completed Memory Indicator</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>CTRLB0</name>
<description>DMAC Channel Control B Register (ch_num = 0)</description>
<addressOffset>0x0000004C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SIF</name>
<description>Source Interface Selection Field</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>AHB_IF0</name>
<description>The source transfer is done via AHB_Lite Interface 0</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF1</name>
<description>The source transfer is done via AHB_Lite Interface 1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF2</name>
<description>The source transfer is done via AHB_Lite Interface 2</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DIF</name>
<description>Destination Interface Selection Field</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>AHB_IF0</name>
<description>The destination transfer is done via AHB_Lite Interface 0</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF1</name>
<description>The destination transfer is done via AHB_Lite Interface 1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF2</name>
<description>The destination transfer is done via AHB_Lite Interface 2</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_PIP</name>
<description>Source Picture-in-Picture Mode</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>Picture-in-Picture mode is disabled. The source data area is contiguous.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ENABLE</name>
<description>Picture-in-Picture mode is enabled. When the source PIP counter reaches the programmable boundary, the address is automatically incremented by a user defined amount.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_PIP</name>
<description>Destination Picture-in-Picture Mode</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>Picture-in-Picture mode is disabled. The Destination data area is contiguous.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ENABLE</name>
<description>Picture-in-Picture mode is enabled. When the Destination PIP counter reaches the programmable boundary the address is automatically incremented by a user-defined amount.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_DSCR</name>
<description>Source Address Descriptor</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>FETCH_FROM_MEM</name>
<description>Source address is updated when the descriptor is fetched from the memory.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>FETCH_DISABLE</name>
<description>Buffer Descriptor Fetch operation is disabled for the source.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_DSCR</name>
<description>Destination Address Descriptor</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>FETCH_FROM_MEM</name>
<description>Destination address is updated when the descriptor is fetched from the memory.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>FETCH_DISABLE</name>
<description>Buffer Descriptor Fetch operation is disabled for the destination.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>FC</name>
<description>Flow Control</description>
<bitOffset>21</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>MEM2MEM_DMA_FC</name>
<description>Memory-to-Memory Transfer DMAC is flow controller</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>MEM2PER_DMA_FC</name>
<description>Memory-to-Peripheral Transfer DMAC is flow controller</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>PER2MEM_DMA_FC</name>
<description>Peripheral-to-Memory Transfer DMAC is flow controller</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>PER2PER_DMA_FC</name>
<description>Peripheral-to-Peripheral Transfer DMAC is flow controller</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_INCR</name>
<description>Incrementing, Decrementing or Fixed Address for the Source</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>INCREMENTING</name>
<description>The source address is incremented</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>DECREMENTING</name>
<description>The source address is decremented</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>FIXED</name>
<description>The source address remains unchanged</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_INCR</name>
<description>Incrementing, Decrementing or Fixed Address for the Destination</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>INCREMENTING</name>
<description>The destination address is incremented</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>DECREMENTING</name>
<description>The destination address is decremented</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>FIXED</name>
<description>The destination address remains unchanged</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>IEN</name>
<description>Interrupt Enable Not</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>AUTO</name>
<description>Automatic Multiple Buffer Transfer</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>Automatic multiple buffer transfer is disabled.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ENABLE</name>
<description>Automatic multiple buffer transfer is enabled. This bit enables replay mode or contiguous mode when several buffers are transferred.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>CFG0</name>
<description>DMAC Channel Configuration Register (ch_num = 0)</description>
<addressOffset>0x00000050</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x01000000</resetValue>
<fields>
<field>
<name>SRC_PER</name>
<description>Source with Peripheral identifier</description>
<bitOffset>0</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DST_PER</name>
<description>Destination with Peripheral identifier</description>
<bitOffset>4</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SRC_REP</name>
<description>Source Reloaded from Previous</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CONTIGUOUS_ADDR</name>
<description>When automatic mode is activated, source address is contiguous between two buffers.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>RELOAD_ADDR</name>
<description>When automatic mode is activated, the source address and the control register are reloaded from previous transfer.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_H2SEL</name>
<description>Software or Hardware Selection for the Source</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>SW</name>
<description>Software handshaking interface is used to trigger a transfer request.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>HW</name>
<description>Hardware handshaking interface is used to trigger a transfer request.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_PER_MSB</name>
<description>SRC_PER Most Significant Bits</description>
<bitOffset>10</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DST_REP</name>
<description>Destination Reloaded from Previous</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CONTIGUOUS_ADDR</name>
<description>When automatic mode is activated, destination address is contiguous between two buffers.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>RELOAD_ADDR</name>
<description>When automatic mode is activated, the destination and the control register are reloaded from the pre-vious transfer.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_H2SEL</name>
<description>Software or Hardware Selection for the Destination</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>SW</name>
<description>Software handshaking interface is used to trigger a transfer request.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>HW</name>
<description>Hardware handshaking interface is used to trigger a transfer request.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_PER_MSB</name>
<description>DST_PER Most Significant Bits</description>
<bitOffset>14</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SOD</name>
<description>Stop On Done</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>STOP ON DONE disabled, the descriptor fetch operation ignores DONE Field of CTRLA register.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ENABLE</name>
<description>STOP ON DONE activated, the DMAC module is automatically disabled if DONE FIELD is set to 1.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LOCK_IF</name>
<description>Interface Lock</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>Interface Lock capability is disabled</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ENABLE</name>
<description>Interface Lock capability is enabled</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LOCK_B</name>
<description>Bus Lock</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>AHB Bus Locking capability is disabled.</description>
<value>0</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LOCK_IF_L</name>
<description>Master Interface Arbiter Lock</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CHUNK</name>
<description>The Master Interface Arbiter is locked by the channel x for a chunk transfer.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>BUFFER</name>
<description>The Master Interface Arbiter is locked by the channel x for a buffer transfer.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>AHB_PROT</name>
<description>AHB Protection</description>
<bitOffset>24</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
</field>
<field>
<name>FIFOCFG</name>
<description>FIFO Configuration</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>ALAP_CFG</name>
<description>The largest defined length AHB burst is performed on the destination AHB interface.</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>HALF_CFG</name>
<description>When half FIFO size is available/filled, a source/destination request is serviced.</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>ASAP_CFG</name>
<description>When there is enough space/data available to perform a single AHB access, then the request is serviced.</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>SPIP0</name>
<description>DMAC Channel Source Picture-in-Picture Configuration Register (ch_num = 0)</description>
<addressOffset>0x00000054</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SPIP_HOLE</name>
<description>Source Picture-in-Picture Hole</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SPIP_BOUNDARY</name>
<description>Source Picture-in-Picture Boundary</description>
<bitOffset>16</bitOffset>
<bitWidth>10</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DPIP0</name>
<description>DMAC Channel Destination Picture-in-Picture Configuration Register (ch_num = 0)</description>
<addressOffset>0x00000058</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DPIP_HOLE</name>
<description>Destination Picture-in-Picture Hole</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DPIP_BOUNDARY</name>
<description>Destination Picture-in-Picture Boundary</description>
<bitOffset>16</bitOffset>
<bitWidth>10</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>SADDR1</name>
<description>DMAC Channel Source Address Register (ch_num = 1)</description>
<addressOffset>0x00000064</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SADDR</name>
<description>Channel x Source Address</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DADDR1</name>
<description>DMAC Channel Destination Address Register (ch_num = 1)</description>
<addressOffset>0x00000068</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DADDR</name>
<description>Channel x Destination Address</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DSCR1</name>
<description>DMAC Channel Descriptor Address Register (ch_num = 1)</description>
<addressOffset>0x0000006C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DSCR_IF</name>
<description>Descriptor Interface Selection</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>AHB_IF0</name>
<description>The buffer transfer descriptor is fetched via AHB-Lite Interface 0</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF1</name>
<description>The buffer transfer descriptor is fetched via AHB-Lite Interface 1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF2</name>
<description>The buffer transfer descriptor is fetched via AHB-Lite Interface 2</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DSCR</name>
<description>Buffer Transfer Descriptor Address</description>
<bitOffset>2</bitOffset>
<bitWidth>30</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>CTRLA1</name>
<description>DMAC Channel Control A Register (ch_num = 1)</description>
<addressOffset>0x00000070</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>BTSIZE</name>
<description>Buffer Transfer Size</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCSIZE</name>
<description>Source Chunk Transfer Size.</description>
<bitOffset>16</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CHK_1</name>
<description>1 data transferred</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_4</name>
<description>4 data transferred</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_8</name>
<description>8 data transferred</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_16</name>
<description>16 data transferred</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DCSIZE</name>
<description>Destination Chunk Transfer Size</description>
<bitOffset>20</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CHK_1</name>
<description>1 data transferred</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_4</name>
<description>4 data transferred</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_8</name>
<description>8 data transferred</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_16</name>
<description>16 data transferred</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_WIDTH</name>
<description>Transfer Width for the Source</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>BYTE</name>
<description>the transfer size is set to 8-bit width</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>HALF_WORD</name>
<description>the transfer size is set to 16-bit width</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>WORD</name>
<description>the transfer size is set to 32-bit width</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>DWORD</name>
<description>the transfer size is set to 64-bit width</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_WIDTH</name>
<description>Transfer Width for the Destination</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>BYTE</name>
<description>the transfer size is set to 8-bit width</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>HALF_WORD</name>
<description>the transfer size is set to 16-bit width</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>WORD</name>
<description>the transfer size is set to 32-bit width</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>DWORD</name>
<description>the transfer size is set to 64-bit width</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DONE</name>
<description>Current Descriptor Stop Command and Transfer Completed Memory Indicator</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>CTRLB1</name>
<description>DMAC Channel Control B Register (ch_num = 1)</description>
<addressOffset>0x00000074</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SIF</name>
<description>Source Interface Selection Field</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>AHB_IF0</name>
<description>The source transfer is done via AHB_Lite Interface 0</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF1</name>
<description>The source transfer is done via AHB_Lite Interface 1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF2</name>
<description>The source transfer is done via AHB_Lite Interface 2</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DIF</name>
<description>Destination Interface Selection Field</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>AHB_IF0</name>
<description>The destination transfer is done via AHB_Lite Interface 0</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF1</name>
<description>The destination transfer is done via AHB_Lite Interface 1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF2</name>
<description>The destination transfer is done via AHB_Lite Interface 2</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_PIP</name>
<description>Source Picture-in-Picture Mode</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>Picture-in-Picture mode is disabled. The source data area is contiguous.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ENABLE</name>
<description>Picture-in-Picture mode is enabled. When the source PIP counter reaches the programmable boundary, the address is automatically incremented by a user defined amount.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_PIP</name>
<description>Destination Picture-in-Picture Mode</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>Picture-in-Picture mode is disabled. The Destination data area is contiguous.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ENABLE</name>
<description>Picture-in-Picture mode is enabled. When the Destination PIP counter reaches the programmable boundary the address is automatically incremented by a user-defined amount.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_DSCR</name>
<description>Source Address Descriptor</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>FETCH_FROM_MEM</name>
<description>Source address is updated when the descriptor is fetched from the memory.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>FETCH_DISABLE</name>
<description>Buffer Descriptor Fetch operation is disabled for the source.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_DSCR</name>
<description>Destination Address Descriptor</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>FETCH_FROM_MEM</name>
<description>Destination address is updated when the descriptor is fetched from the memory.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>FETCH_DISABLE</name>
<description>Buffer Descriptor Fetch operation is disabled for the destination.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>FC</name>
<description>Flow Control</description>
<bitOffset>21</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>MEM2MEM_DMA_FC</name>
<description>Memory-to-Memory Transfer DMAC is flow controller</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>MEM2PER_DMA_FC</name>
<description>Memory-to-Peripheral Transfer DMAC is flow controller</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>PER2MEM_DMA_FC</name>
<description>Peripheral-to-Memory Transfer DMAC is flow controller</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>PER2PER_DMA_FC</name>
<description>Peripheral-to-Peripheral Transfer DMAC is flow controller</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_INCR</name>
<description>Incrementing, Decrementing or Fixed Address for the Source</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>INCREMENTING</name>
<description>The source address is incremented</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>DECREMENTING</name>
<description>The source address is decremented</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>FIXED</name>
<description>The source address remains unchanged</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_INCR</name>
<description>Incrementing, Decrementing or Fixed Address for the Destination</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>INCREMENTING</name>
<description>The destination address is incremented</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>DECREMENTING</name>
<description>The destination address is decremented</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>FIXED</name>
<description>The destination address remains unchanged</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>IEN</name>
<description>Interrupt Enable Not</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>AUTO</name>
<description>Automatic Multiple Buffer Transfer</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>Automatic multiple buffer transfer is disabled.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ENABLE</name>
<description>Automatic multiple buffer transfer is enabled. This bit enables replay mode or contiguous mode when several buffers are transferred.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>CFG1</name>
<description>DMAC Channel Configuration Register (ch_num = 1)</description>
<addressOffset>0x00000078</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x01000000</resetValue>
<fields>
<field>
<name>SRC_PER</name>
<description>Source with Peripheral identifier</description>
<bitOffset>0</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DST_PER</name>
<description>Destination with Peripheral identifier</description>
<bitOffset>4</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SRC_REP</name>
<description>Source Reloaded from Previous</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CONTIGUOUS_ADDR</name>
<description>When automatic mode is activated, source address is contiguous between two buffers.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>RELOAD_ADDR</name>
<description>When automatic mode is activated, the source address and the control register are reloaded from previous transfer.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_H2SEL</name>
<description>Software or Hardware Selection for the Source</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>SW</name>
<description>Software handshaking interface is used to trigger a transfer request.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>HW</name>
<description>Hardware handshaking interface is used to trigger a transfer request.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_PER_MSB</name>
<description>SRC_PER Most Significant Bits</description>
<bitOffset>10</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DST_REP</name>
<description>Destination Reloaded from Previous</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CONTIGUOUS_ADDR</name>
<description>When automatic mode is activated, destination address is contiguous between two buffers.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>RELOAD_ADDR</name>
<description>When automatic mode is activated, the destination and the control register are reloaded from the pre-vious transfer.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_H2SEL</name>
<description>Software or Hardware Selection for the Destination</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>SW</name>
<description>Software handshaking interface is used to trigger a transfer request.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>HW</name>
<description>Hardware handshaking interface is used to trigger a transfer request.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_PER_MSB</name>
<description>DST_PER Most Significant Bits</description>
<bitOffset>14</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SOD</name>
<description>Stop On Done</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>STOP ON DONE disabled, the descriptor fetch operation ignores DONE Field of CTRLA register.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ENABLE</name>
<description>STOP ON DONE activated, the DMAC module is automatically disabled if DONE FIELD is set to 1.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LOCK_IF</name>
<description>Interface Lock</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>Interface Lock capability is disabled</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ENABLE</name>
<description>Interface Lock capability is enabled</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LOCK_B</name>
<description>Bus Lock</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>AHB Bus Locking capability is disabled.</description>
<value>0</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LOCK_IF_L</name>
<description>Master Interface Arbiter Lock</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CHUNK</name>
<description>The Master Interface Arbiter is locked by the channel x for a chunk transfer.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>BUFFER</name>
<description>The Master Interface Arbiter is locked by the channel x for a buffer transfer.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>AHB_PROT</name>
<description>AHB Protection</description>
<bitOffset>24</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
</field>
<field>
<name>FIFOCFG</name>
<description>FIFO Configuration</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>ALAP_CFG</name>
<description>The largest defined length AHB burst is performed on the destination AHB interface.</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>HALF_CFG</name>
<description>When half FIFO size is available/filled, a source/destination request is serviced.</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>ASAP_CFG</name>
<description>When there is enough space/data available to perform a single AHB access, then the request is serviced.</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>SPIP1</name>
<description>DMAC Channel Source Picture-in-Picture Configuration Register (ch_num = 1)</description>
<addressOffset>0x0000007C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SPIP_HOLE</name>
<description>Source Picture-in-Picture Hole</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SPIP_BOUNDARY</name>
<description>Source Picture-in-Picture Boundary</description>
<bitOffset>16</bitOffset>
<bitWidth>10</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DPIP1</name>
<description>DMAC Channel Destination Picture-in-Picture Configuration Register (ch_num = 1)</description>
<addressOffset>0x00000080</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DPIP_HOLE</name>
<description>Destination Picture-in-Picture Hole</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DPIP_BOUNDARY</name>
<description>Destination Picture-in-Picture Boundary</description>
<bitOffset>16</bitOffset>
<bitWidth>10</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>SADDR2</name>
<description>DMAC Channel Source Address Register (ch_num = 2)</description>
<addressOffset>0x0000008C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SADDR</name>
<description>Channel x Source Address</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DADDR2</name>
<description>DMAC Channel Destination Address Register (ch_num = 2)</description>
<addressOffset>0x00000090</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DADDR</name>
<description>Channel x Destination Address</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DSCR2</name>
<description>DMAC Channel Descriptor Address Register (ch_num = 2)</description>
<addressOffset>0x00000094</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DSCR_IF</name>
<description>Descriptor Interface Selection</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>AHB_IF0</name>
<description>The buffer transfer descriptor is fetched via AHB-Lite Interface 0</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF1</name>
<description>The buffer transfer descriptor is fetched via AHB-Lite Interface 1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF2</name>
<description>The buffer transfer descriptor is fetched via AHB-Lite Interface 2</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DSCR</name>
<description>Buffer Transfer Descriptor Address</description>
<bitOffset>2</bitOffset>
<bitWidth>30</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>CTRLA2</name>
<description>DMAC Channel Control A Register (ch_num = 2)</description>
<addressOffset>0x00000098</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>BTSIZE</name>
<description>Buffer Transfer Size</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCSIZE</name>
<description>Source Chunk Transfer Size.</description>
<bitOffset>16</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CHK_1</name>
<description>1 data transferred</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_4</name>
<description>4 data transferred</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_8</name>
<description>8 data transferred</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_16</name>
<description>16 data transferred</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DCSIZE</name>
<description>Destination Chunk Transfer Size</description>
<bitOffset>20</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CHK_1</name>
<description>1 data transferred</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_4</name>
<description>4 data transferred</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_8</name>
<description>8 data transferred</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_16</name>
<description>16 data transferred</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_WIDTH</name>
<description>Transfer Width for the Source</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>BYTE</name>
<description>the transfer size is set to 8-bit width</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>HALF_WORD</name>
<description>the transfer size is set to 16-bit width</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>WORD</name>
<description>the transfer size is set to 32-bit width</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>DWORD</name>
<description>the transfer size is set to 64-bit width</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_WIDTH</name>
<description>Transfer Width for the Destination</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>BYTE</name>
<description>the transfer size is set to 8-bit width</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>HALF_WORD</name>
<description>the transfer size is set to 16-bit width</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>WORD</name>
<description>the transfer size is set to 32-bit width</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>DWORD</name>
<description>the transfer size is set to 64-bit width</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DONE</name>
<description>Current Descriptor Stop Command and Transfer Completed Memory Indicator</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>CTRLB2</name>
<description>DMAC Channel Control B Register (ch_num = 2)</description>
<addressOffset>0x0000009C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SIF</name>
<description>Source Interface Selection Field</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>AHB_IF0</name>
<description>The source transfer is done via AHB_Lite Interface 0</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF1</name>
<description>The source transfer is done via AHB_Lite Interface 1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF2</name>
<description>The source transfer is done via AHB_Lite Interface 2</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DIF</name>
<description>Destination Interface Selection Field</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>AHB_IF0</name>
<description>The destination transfer is done via AHB_Lite Interface 0</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF1</name>
<description>The destination transfer is done via AHB_Lite Interface 1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF2</name>
<description>The destination transfer is done via AHB_Lite Interface 2</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_PIP</name>
<description>Source Picture-in-Picture Mode</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>Picture-in-Picture mode is disabled. The source data area is contiguous.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ENABLE</name>
<description>Picture-in-Picture mode is enabled. When the source PIP counter reaches the programmable boundary, the address is automatically incremented by a user defined amount.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_PIP</name>
<description>Destination Picture-in-Picture Mode</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>Picture-in-Picture mode is disabled. The Destination data area is contiguous.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ENABLE</name>
<description>Picture-in-Picture mode is enabled. When the Destination PIP counter reaches the programmable boundary the address is automatically incremented by a user-defined amount.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_DSCR</name>
<description>Source Address Descriptor</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>FETCH_FROM_MEM</name>
<description>Source address is updated when the descriptor is fetched from the memory.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>FETCH_DISABLE</name>
<description>Buffer Descriptor Fetch operation is disabled for the source.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_DSCR</name>
<description>Destination Address Descriptor</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>FETCH_FROM_MEM</name>
<description>Destination address is updated when the descriptor is fetched from the memory.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>FETCH_DISABLE</name>
<description>Buffer Descriptor Fetch operation is disabled for the destination.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>FC</name>
<description>Flow Control</description>
<bitOffset>21</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>MEM2MEM_DMA_FC</name>
<description>Memory-to-Memory Transfer DMAC is flow controller</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>MEM2PER_DMA_FC</name>
<description>Memory-to-Peripheral Transfer DMAC is flow controller</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>PER2MEM_DMA_FC</name>
<description>Peripheral-to-Memory Transfer DMAC is flow controller</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>PER2PER_DMA_FC</name>
<description>Peripheral-to-Peripheral Transfer DMAC is flow controller</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_INCR</name>
<description>Incrementing, Decrementing or Fixed Address for the Source</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>INCREMENTING</name>
<description>The source address is incremented</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>DECREMENTING</name>
<description>The source address is decremented</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>FIXED</name>
<description>The source address remains unchanged</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_INCR</name>
<description>Incrementing, Decrementing or Fixed Address for the Destination</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>INCREMENTING</name>
<description>The destination address is incremented</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>DECREMENTING</name>
<description>The destination address is decremented</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>FIXED</name>
<description>The destination address remains unchanged</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>IEN</name>
<description>Interrupt Enable Not</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>AUTO</name>
<description>Automatic Multiple Buffer Transfer</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>Automatic multiple buffer transfer is disabled.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ENABLE</name>
<description>Automatic multiple buffer transfer is enabled. This bit enables replay mode or contiguous mode when several buffers are transferred.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>CFG2</name>
<description>DMAC Channel Configuration Register (ch_num = 2)</description>
<addressOffset>0x000000A0</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x01000000</resetValue>
<fields>
<field>
<name>SRC_PER</name>
<description>Source with Peripheral identifier</description>
<bitOffset>0</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DST_PER</name>
<description>Destination with Peripheral identifier</description>
<bitOffset>4</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SRC_REP</name>
<description>Source Reloaded from Previous</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CONTIGUOUS_ADDR</name>
<description>When automatic mode is activated, source address is contiguous between two buffers.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>RELOAD_ADDR</name>
<description>When automatic mode is activated, the source address and the control register are reloaded from previous transfer.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_H2SEL</name>
<description>Software or Hardware Selection for the Source</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>SW</name>
<description>Software handshaking interface is used to trigger a transfer request.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>HW</name>
<description>Hardware handshaking interface is used to trigger a transfer request.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_PER_MSB</name>
<description>SRC_PER Most Significant Bits</description>
<bitOffset>10</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DST_REP</name>
<description>Destination Reloaded from Previous</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CONTIGUOUS_ADDR</name>
<description>When automatic mode is activated, destination address is contiguous between two buffers.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>RELOAD_ADDR</name>
<description>When automatic mode is activated, the destination and the control register are reloaded from the pre-vious transfer.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_H2SEL</name>
<description>Software or Hardware Selection for the Destination</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>SW</name>
<description>Software handshaking interface is used to trigger a transfer request.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>HW</name>
<description>Hardware handshaking interface is used to trigger a transfer request.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_PER_MSB</name>
<description>DST_PER Most Significant Bits</description>
<bitOffset>14</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SOD</name>
<description>Stop On Done</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>STOP ON DONE disabled, the descriptor fetch operation ignores DONE Field of CTRLA register.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ENABLE</name>
<description>STOP ON DONE activated, the DMAC module is automatically disabled if DONE FIELD is set to 1.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LOCK_IF</name>
<description>Interface Lock</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>Interface Lock capability is disabled</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ENABLE</name>
<description>Interface Lock capability is enabled</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LOCK_B</name>
<description>Bus Lock</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>AHB Bus Locking capability is disabled.</description>
<value>0</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LOCK_IF_L</name>
<description>Master Interface Arbiter Lock</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CHUNK</name>
<description>The Master Interface Arbiter is locked by the channel x for a chunk transfer.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>BUFFER</name>
<description>The Master Interface Arbiter is locked by the channel x for a buffer transfer.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>AHB_PROT</name>
<description>AHB Protection</description>
<bitOffset>24</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
</field>
<field>
<name>FIFOCFG</name>
<description>FIFO Configuration</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>ALAP_CFG</name>
<description>The largest defined length AHB burst is performed on the destination AHB interface.</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>HALF_CFG</name>
<description>When half FIFO size is available/filled, a source/destination request is serviced.</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>ASAP_CFG</name>
<description>When there is enough space/data available to perform a single AHB access, then the request is serviced.</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>SPIP2</name>
<description>DMAC Channel Source Picture-in-Picture Configuration Register (ch_num = 2)</description>
<addressOffset>0x000000A4</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SPIP_HOLE</name>
<description>Source Picture-in-Picture Hole</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SPIP_BOUNDARY</name>
<description>Source Picture-in-Picture Boundary</description>
<bitOffset>16</bitOffset>
<bitWidth>10</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DPIP2</name>
<description>DMAC Channel Destination Picture-in-Picture Configuration Register (ch_num = 2)</description>
<addressOffset>0x000000A8</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DPIP_HOLE</name>
<description>Destination Picture-in-Picture Hole</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DPIP_BOUNDARY</name>
<description>Destination Picture-in-Picture Boundary</description>
<bitOffset>16</bitOffset>
<bitWidth>10</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>SADDR3</name>
<description>DMAC Channel Source Address Register (ch_num = 3)</description>
<addressOffset>0x000000B4</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SADDR</name>
<description>Channel x Source Address</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DADDR3</name>
<description>DMAC Channel Destination Address Register (ch_num = 3)</description>
<addressOffset>0x000000B8</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DADDR</name>
<description>Channel x Destination Address</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DSCR3</name>
<description>DMAC Channel Descriptor Address Register (ch_num = 3)</description>
<addressOffset>0x000000BC</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DSCR_IF</name>
<description>Descriptor Interface Selection</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>AHB_IF0</name>
<description>The buffer transfer descriptor is fetched via AHB-Lite Interface 0</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF1</name>
<description>The buffer transfer descriptor is fetched via AHB-Lite Interface 1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF2</name>
<description>The buffer transfer descriptor is fetched via AHB-Lite Interface 2</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DSCR</name>
<description>Buffer Transfer Descriptor Address</description>
<bitOffset>2</bitOffset>
<bitWidth>30</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>CTRLA3</name>
<description>DMAC Channel Control A Register (ch_num = 3)</description>
<addressOffset>0x000000C0</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>BTSIZE</name>
<description>Buffer Transfer Size</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCSIZE</name>
<description>Source Chunk Transfer Size.</description>
<bitOffset>16</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CHK_1</name>
<description>1 data transferred</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_4</name>
<description>4 data transferred</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_8</name>
<description>8 data transferred</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_16</name>
<description>16 data transferred</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DCSIZE</name>
<description>Destination Chunk Transfer Size</description>
<bitOffset>20</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CHK_1</name>
<description>1 data transferred</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_4</name>
<description>4 data transferred</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_8</name>
<description>8 data transferred</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_16</name>
<description>16 data transferred</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_WIDTH</name>
<description>Transfer Width for the Source</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>BYTE</name>
<description>the transfer size is set to 8-bit width</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>HALF_WORD</name>
<description>the transfer size is set to 16-bit width</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>WORD</name>
<description>the transfer size is set to 32-bit width</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>DWORD</name>
<description>the transfer size is set to 64-bit width</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_WIDTH</name>
<description>Transfer Width for the Destination</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>BYTE</name>
<description>the transfer size is set to 8-bit width</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>HALF_WORD</name>
<description>the transfer size is set to 16-bit width</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>WORD</name>
<description>the transfer size is set to 32-bit width</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>DWORD</name>
<description>the transfer size is set to 64-bit width</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DONE</name>
<description>Current Descriptor Stop Command and Transfer Completed Memory Indicator</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>CTRLB3</name>
<description>DMAC Channel Control B Register (ch_num = 3)</description>
<addressOffset>0x000000C4</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SIF</name>
<description>Source Interface Selection Field</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>AHB_IF0</name>
<description>The source transfer is done via AHB_Lite Interface 0</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF1</name>
<description>The source transfer is done via AHB_Lite Interface 1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF2</name>
<description>The source transfer is done via AHB_Lite Interface 2</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DIF</name>
<description>Destination Interface Selection Field</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>AHB_IF0</name>
<description>The destination transfer is done via AHB_Lite Interface 0</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF1</name>
<description>The destination transfer is done via AHB_Lite Interface 1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF2</name>
<description>The destination transfer is done via AHB_Lite Interface 2</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_PIP</name>
<description>Source Picture-in-Picture Mode</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>Picture-in-Picture mode is disabled. The source data area is contiguous.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ENABLE</name>
<description>Picture-in-Picture mode is enabled. When the source PIP counter reaches the programmable boundary, the address is automatically incremented by a user defined amount.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_PIP</name>
<description>Destination Picture-in-Picture Mode</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>Picture-in-Picture mode is disabled. The Destination data area is contiguous.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ENABLE</name>
<description>Picture-in-Picture mode is enabled. When the Destination PIP counter reaches the programmable boundary the address is automatically incremented by a user-defined amount.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_DSCR</name>
<description>Source Address Descriptor</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>FETCH_FROM_MEM</name>
<description>Source address is updated when the descriptor is fetched from the memory.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>FETCH_DISABLE</name>
<description>Buffer Descriptor Fetch operation is disabled for the source.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_DSCR</name>
<description>Destination Address Descriptor</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>FETCH_FROM_MEM</name>
<description>Destination address is updated when the descriptor is fetched from the memory.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>FETCH_DISABLE</name>
<description>Buffer Descriptor Fetch operation is disabled for the destination.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>FC</name>
<description>Flow Control</description>
<bitOffset>21</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>MEM2MEM_DMA_FC</name>
<description>Memory-to-Memory Transfer DMAC is flow controller</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>MEM2PER_DMA_FC</name>
<description>Memory-to-Peripheral Transfer DMAC is flow controller</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>PER2MEM_DMA_FC</name>
<description>Peripheral-to-Memory Transfer DMAC is flow controller</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>PER2PER_DMA_FC</name>
<description>Peripheral-to-Peripheral Transfer DMAC is flow controller</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_INCR</name>
<description>Incrementing, Decrementing or Fixed Address for the Source</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>INCREMENTING</name>
<description>The source address is incremented</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>DECREMENTING</name>
<description>The source address is decremented</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>FIXED</name>
<description>The source address remains unchanged</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_INCR</name>
<description>Incrementing, Decrementing or Fixed Address for the Destination</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>INCREMENTING</name>
<description>The destination address is incremented</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>DECREMENTING</name>
<description>The destination address is decremented</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>FIXED</name>
<description>The destination address remains unchanged</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>IEN</name>
<description>Interrupt Enable Not</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>AUTO</name>
<description>Automatic Multiple Buffer Transfer</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>Automatic multiple buffer transfer is disabled.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ENABLE</name>
<description>Automatic multiple buffer transfer is enabled. This bit enables replay mode or contiguous mode when several buffers are transferred.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>CFG3</name>
<description>DMAC Channel Configuration Register (ch_num = 3)</description>
<addressOffset>0x000000C8</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x01000000</resetValue>
<fields>
<field>
<name>SRC_PER</name>
<description>Source with Peripheral identifier</description>
<bitOffset>0</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DST_PER</name>
<description>Destination with Peripheral identifier</description>
<bitOffset>4</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SRC_REP</name>
<description>Source Reloaded from Previous</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CONTIGUOUS_ADDR</name>
<description>When automatic mode is activated, source address is contiguous between two buffers.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>RELOAD_ADDR</name>
<description>When automatic mode is activated, the source address and the control register are reloaded from previous transfer.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_H2SEL</name>
<description>Software or Hardware Selection for the Source</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>SW</name>
<description>Software handshaking interface is used to trigger a transfer request.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>HW</name>
<description>Hardware handshaking interface is used to trigger a transfer request.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_PER_MSB</name>
<description>SRC_PER Most Significant Bits</description>
<bitOffset>10</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DST_REP</name>
<description>Destination Reloaded from Previous</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CONTIGUOUS_ADDR</name>
<description>When automatic mode is activated, destination address is contiguous between two buffers.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>RELOAD_ADDR</name>
<description>When automatic mode is activated, the destination and the control register are reloaded from the pre-vious transfer.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_H2SEL</name>
<description>Software or Hardware Selection for the Destination</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>SW</name>
<description>Software handshaking interface is used to trigger a transfer request.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>HW</name>
<description>Hardware handshaking interface is used to trigger a transfer request.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_PER_MSB</name>
<description>DST_PER Most Significant Bits</description>
<bitOffset>14</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SOD</name>
<description>Stop On Done</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>STOP ON DONE disabled, the descriptor fetch operation ignores DONE Field of CTRLA register.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ENABLE</name>
<description>STOP ON DONE activated, the DMAC module is automatically disabled if DONE FIELD is set to 1.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LOCK_IF</name>
<description>Interface Lock</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>Interface Lock capability is disabled</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ENABLE</name>
<description>Interface Lock capability is enabled</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LOCK_B</name>
<description>Bus Lock</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>AHB Bus Locking capability is disabled.</description>
<value>0</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LOCK_IF_L</name>
<description>Master Interface Arbiter Lock</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CHUNK</name>
<description>The Master Interface Arbiter is locked by the channel x for a chunk transfer.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>BUFFER</name>
<description>The Master Interface Arbiter is locked by the channel x for a buffer transfer.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>AHB_PROT</name>
<description>AHB Protection</description>
<bitOffset>24</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
</field>
<field>
<name>FIFOCFG</name>
<description>FIFO Configuration</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>ALAP_CFG</name>
<description>The largest defined length AHB burst is performed on the destination AHB interface.</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>HALF_CFG</name>
<description>When half FIFO size is available/filled, a source/destination request is serviced.</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>ASAP_CFG</name>
<description>When there is enough space/data available to perform a single AHB access, then the request is serviced.</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>SPIP3</name>
<description>DMAC Channel Source Picture-in-Picture Configuration Register (ch_num = 3)</description>
<addressOffset>0x000000CC</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SPIP_HOLE</name>
<description>Source Picture-in-Picture Hole</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SPIP_BOUNDARY</name>
<description>Source Picture-in-Picture Boundary</description>
<bitOffset>16</bitOffset>
<bitWidth>10</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DPIP3</name>
<description>DMAC Channel Destination Picture-in-Picture Configuration Register (ch_num = 3)</description>
<addressOffset>0x000000D0</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DPIP_HOLE</name>
<description>Destination Picture-in-Picture Hole</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DPIP_BOUNDARY</name>
<description>Destination Picture-in-Picture Boundary</description>
<bitOffset>16</bitOffset>
<bitWidth>10</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>SADDR4</name>
<description>DMAC Channel Source Address Register (ch_num = 4)</description>
<addressOffset>0x000000DC</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SADDR</name>
<description>Channel x Source Address</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DADDR4</name>
<description>DMAC Channel Destination Address Register (ch_num = 4)</description>
<addressOffset>0x000000E0</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DADDR</name>
<description>Channel x Destination Address</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DSCR4</name>
<description>DMAC Channel Descriptor Address Register (ch_num = 4)</description>
<addressOffset>0x000000E4</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DSCR_IF</name>
<description>Descriptor Interface Selection</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>AHB_IF0</name>
<description>The buffer transfer descriptor is fetched via AHB-Lite Interface 0</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF1</name>
<description>The buffer transfer descriptor is fetched via AHB-Lite Interface 1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF2</name>
<description>The buffer transfer descriptor is fetched via AHB-Lite Interface 2</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DSCR</name>
<description>Buffer Transfer Descriptor Address</description>
<bitOffset>2</bitOffset>
<bitWidth>30</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>CTRLA4</name>
<description>DMAC Channel Control A Register (ch_num = 4)</description>
<addressOffset>0x000000E8</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>BTSIZE</name>
<description>Buffer Transfer Size</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCSIZE</name>
<description>Source Chunk Transfer Size.</description>
<bitOffset>16</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CHK_1</name>
<description>1 data transferred</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_4</name>
<description>4 data transferred</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_8</name>
<description>8 data transferred</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_16</name>
<description>16 data transferred</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DCSIZE</name>
<description>Destination Chunk Transfer Size</description>
<bitOffset>20</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CHK_1</name>
<description>1 data transferred</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_4</name>
<description>4 data transferred</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_8</name>
<description>8 data transferred</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_16</name>
<description>16 data transferred</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_WIDTH</name>
<description>Transfer Width for the Source</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>BYTE</name>
<description>the transfer size is set to 8-bit width</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>HALF_WORD</name>
<description>the transfer size is set to 16-bit width</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>WORD</name>
<description>the transfer size is set to 32-bit width</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>DWORD</name>
<description>the transfer size is set to 64-bit width</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_WIDTH</name>
<description>Transfer Width for the Destination</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>BYTE</name>
<description>the transfer size is set to 8-bit width</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>HALF_WORD</name>
<description>the transfer size is set to 16-bit width</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>WORD</name>
<description>the transfer size is set to 32-bit width</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>DWORD</name>
<description>the transfer size is set to 64-bit width</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DONE</name>
<description>Current Descriptor Stop Command and Transfer Completed Memory Indicator</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>CTRLB4</name>
<description>DMAC Channel Control B Register (ch_num = 4)</description>
<addressOffset>0x000000EC</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SIF</name>
<description>Source Interface Selection Field</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>AHB_IF0</name>
<description>The source transfer is done via AHB_Lite Interface 0</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF1</name>
<description>The source transfer is done via AHB_Lite Interface 1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF2</name>
<description>The source transfer is done via AHB_Lite Interface 2</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DIF</name>
<description>Destination Interface Selection Field</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>AHB_IF0</name>
<description>The destination transfer is done via AHB_Lite Interface 0</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF1</name>
<description>The destination transfer is done via AHB_Lite Interface 1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF2</name>
<description>The destination transfer is done via AHB_Lite Interface 2</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_PIP</name>
<description>Source Picture-in-Picture Mode</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>Picture-in-Picture mode is disabled. The source data area is contiguous.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ENABLE</name>
<description>Picture-in-Picture mode is enabled. When the source PIP counter reaches the programmable boundary, the address is automatically incremented by a user defined amount.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_PIP</name>
<description>Destination Picture-in-Picture Mode</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>Picture-in-Picture mode is disabled. The Destination data area is contiguous.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ENABLE</name>
<description>Picture-in-Picture mode is enabled. When the Destination PIP counter reaches the programmable boundary the address is automatically incremented by a user-defined amount.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_DSCR</name>
<description>Source Address Descriptor</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>FETCH_FROM_MEM</name>
<description>Source address is updated when the descriptor is fetched from the memory.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>FETCH_DISABLE</name>
<description>Buffer Descriptor Fetch operation is disabled for the source.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_DSCR</name>
<description>Destination Address Descriptor</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>FETCH_FROM_MEM</name>
<description>Destination address is updated when the descriptor is fetched from the memory.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>FETCH_DISABLE</name>
<description>Buffer Descriptor Fetch operation is disabled for the destination.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>FC</name>
<description>Flow Control</description>
<bitOffset>21</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>MEM2MEM_DMA_FC</name>
<description>Memory-to-Memory Transfer DMAC is flow controller</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>MEM2PER_DMA_FC</name>
<description>Memory-to-Peripheral Transfer DMAC is flow controller</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>PER2MEM_DMA_FC</name>
<description>Peripheral-to-Memory Transfer DMAC is flow controller</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>PER2PER_DMA_FC</name>
<description>Peripheral-to-Peripheral Transfer DMAC is flow controller</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_INCR</name>
<description>Incrementing, Decrementing or Fixed Address for the Source</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>INCREMENTING</name>
<description>The source address is incremented</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>DECREMENTING</name>
<description>The source address is decremented</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>FIXED</name>
<description>The source address remains unchanged</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_INCR</name>
<description>Incrementing, Decrementing or Fixed Address for the Destination</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>INCREMENTING</name>
<description>The destination address is incremented</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>DECREMENTING</name>
<description>The destination address is decremented</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>FIXED</name>
<description>The destination address remains unchanged</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>IEN</name>
<description>Interrupt Enable Not</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>AUTO</name>
<description>Automatic Multiple Buffer Transfer</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>Automatic multiple buffer transfer is disabled.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ENABLE</name>
<description>Automatic multiple buffer transfer is enabled. This bit enables replay mode or contiguous mode when several buffers are transferred.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>CFG4</name>
<description>DMAC Channel Configuration Register (ch_num = 4)</description>
<addressOffset>0x000000F0</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x01000000</resetValue>
<fields>
<field>
<name>SRC_PER</name>
<description>Source with Peripheral identifier</description>
<bitOffset>0</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DST_PER</name>
<description>Destination with Peripheral identifier</description>
<bitOffset>4</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SRC_REP</name>
<description>Source Reloaded from Previous</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CONTIGUOUS_ADDR</name>
<description>When automatic mode is activated, source address is contiguous between two buffers.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>RELOAD_ADDR</name>
<description>When automatic mode is activated, the source address and the control register are reloaded from previous transfer.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_H2SEL</name>
<description>Software or Hardware Selection for the Source</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>SW</name>
<description>Software handshaking interface is used to trigger a transfer request.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>HW</name>
<description>Hardware handshaking interface is used to trigger a transfer request.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_PER_MSB</name>
<description>SRC_PER Most Significant Bits</description>
<bitOffset>10</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DST_REP</name>
<description>Destination Reloaded from Previous</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CONTIGUOUS_ADDR</name>
<description>When automatic mode is activated, destination address is contiguous between two buffers.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>RELOAD_ADDR</name>
<description>When automatic mode is activated, the destination and the control register are reloaded from the pre-vious transfer.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_H2SEL</name>
<description>Software or Hardware Selection for the Destination</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>SW</name>
<description>Software handshaking interface is used to trigger a transfer request.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>HW</name>
<description>Hardware handshaking interface is used to trigger a transfer request.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_PER_MSB</name>
<description>DST_PER Most Significant Bits</description>
<bitOffset>14</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SOD</name>
<description>Stop On Done</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>STOP ON DONE disabled, the descriptor fetch operation ignores DONE Field of CTRLA register.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ENABLE</name>
<description>STOP ON DONE activated, the DMAC module is automatically disabled if DONE FIELD is set to 1.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LOCK_IF</name>
<description>Interface Lock</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>Interface Lock capability is disabled</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ENABLE</name>
<description>Interface Lock capability is enabled</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LOCK_B</name>
<description>Bus Lock</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>AHB Bus Locking capability is disabled.</description>
<value>0</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LOCK_IF_L</name>
<description>Master Interface Arbiter Lock</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CHUNK</name>
<description>The Master Interface Arbiter is locked by the channel x for a chunk transfer.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>BUFFER</name>
<description>The Master Interface Arbiter is locked by the channel x for a buffer transfer.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>AHB_PROT</name>
<description>AHB Protection</description>
<bitOffset>24</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
</field>
<field>
<name>FIFOCFG</name>
<description>FIFO Configuration</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>ALAP_CFG</name>
<description>The largest defined length AHB burst is performed on the destination AHB interface.</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>HALF_CFG</name>
<description>When half FIFO size is available/filled, a source/destination request is serviced.</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>ASAP_CFG</name>
<description>When there is enough space/data available to perform a single AHB access, then the request is serviced.</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>SPIP4</name>
<description>DMAC Channel Source Picture-in-Picture Configuration Register (ch_num = 4)</description>
<addressOffset>0x000000F4</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SPIP_HOLE</name>
<description>Source Picture-in-Picture Hole</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SPIP_BOUNDARY</name>
<description>Source Picture-in-Picture Boundary</description>
<bitOffset>16</bitOffset>
<bitWidth>10</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DPIP4</name>
<description>DMAC Channel Destination Picture-in-Picture Configuration Register (ch_num = 4)</description>
<addressOffset>0x000000F8</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DPIP_HOLE</name>
<description>Destination Picture-in-Picture Hole</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DPIP_BOUNDARY</name>
<description>Destination Picture-in-Picture Boundary</description>
<bitOffset>16</bitOffset>
<bitWidth>10</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>SADDR5</name>
<description>DMAC Channel Source Address Register (ch_num = 5)</description>
<addressOffset>0x00000104</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SADDR</name>
<description>Channel x Source Address</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DADDR5</name>
<description>DMAC Channel Destination Address Register (ch_num = 5)</description>
<addressOffset>0x00000108</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DADDR</name>
<description>Channel x Destination Address</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DSCR5</name>
<description>DMAC Channel Descriptor Address Register (ch_num = 5)</description>
<addressOffset>0x0000010C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DSCR_IF</name>
<description>Descriptor Interface Selection</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>AHB_IF0</name>
<description>The buffer transfer descriptor is fetched via AHB-Lite Interface 0</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF1</name>
<description>The buffer transfer descriptor is fetched via AHB-Lite Interface 1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF2</name>
<description>The buffer transfer descriptor is fetched via AHB-Lite Interface 2</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DSCR</name>
<description>Buffer Transfer Descriptor Address</description>
<bitOffset>2</bitOffset>
<bitWidth>30</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>CTRLA5</name>
<description>DMAC Channel Control A Register (ch_num = 5)</description>
<addressOffset>0x00000110</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>BTSIZE</name>
<description>Buffer Transfer Size</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCSIZE</name>
<description>Source Chunk Transfer Size.</description>
<bitOffset>16</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CHK_1</name>
<description>1 data transferred</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_4</name>
<description>4 data transferred</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_8</name>
<description>8 data transferred</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_16</name>
<description>16 data transferred</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DCSIZE</name>
<description>Destination Chunk Transfer Size</description>
<bitOffset>20</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CHK_1</name>
<description>1 data transferred</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_4</name>
<description>4 data transferred</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_8</name>
<description>8 data transferred</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_16</name>
<description>16 data transferred</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_WIDTH</name>
<description>Transfer Width for the Source</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>BYTE</name>
<description>the transfer size is set to 8-bit width</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>HALF_WORD</name>
<description>the transfer size is set to 16-bit width</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>WORD</name>
<description>the transfer size is set to 32-bit width</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>DWORD</name>
<description>the transfer size is set to 64-bit width</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_WIDTH</name>
<description>Transfer Width for the Destination</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>BYTE</name>
<description>the transfer size is set to 8-bit width</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>HALF_WORD</name>
<description>the transfer size is set to 16-bit width</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>WORD</name>
<description>the transfer size is set to 32-bit width</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>DWORD</name>
<description>the transfer size is set to 64-bit width</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DONE</name>
<description>Current Descriptor Stop Command and Transfer Completed Memory Indicator</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>CTRLB5</name>
<description>DMAC Channel Control B Register (ch_num = 5)</description>
<addressOffset>0x00000114</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SIF</name>
<description>Source Interface Selection Field</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>AHB_IF0</name>
<description>The source transfer is done via AHB_Lite Interface 0</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF1</name>
<description>The source transfer is done via AHB_Lite Interface 1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF2</name>
<description>The source transfer is done via AHB_Lite Interface 2</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DIF</name>
<description>Destination Interface Selection Field</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>AHB_IF0</name>
<description>The destination transfer is done via AHB_Lite Interface 0</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF1</name>
<description>The destination transfer is done via AHB_Lite Interface 1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF2</name>
<description>The destination transfer is done via AHB_Lite Interface 2</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_PIP</name>
<description>Source Picture-in-Picture Mode</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>Picture-in-Picture mode is disabled. The source data area is contiguous.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ENABLE</name>
<description>Picture-in-Picture mode is enabled. When the source PIP counter reaches the programmable boundary, the address is automatically incremented by a user defined amount.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_PIP</name>
<description>Destination Picture-in-Picture Mode</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>Picture-in-Picture mode is disabled. The Destination data area is contiguous.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ENABLE</name>
<description>Picture-in-Picture mode is enabled. When the Destination PIP counter reaches the programmable boundary the address is automatically incremented by a user-defined amount.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_DSCR</name>
<description>Source Address Descriptor</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>FETCH_FROM_MEM</name>
<description>Source address is updated when the descriptor is fetched from the memory.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>FETCH_DISABLE</name>
<description>Buffer Descriptor Fetch operation is disabled for the source.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_DSCR</name>
<description>Destination Address Descriptor</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>FETCH_FROM_MEM</name>
<description>Destination address is updated when the descriptor is fetched from the memory.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>FETCH_DISABLE</name>
<description>Buffer Descriptor Fetch operation is disabled for the destination.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>FC</name>
<description>Flow Control</description>
<bitOffset>21</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>MEM2MEM_DMA_FC</name>
<description>Memory-to-Memory Transfer DMAC is flow controller</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>MEM2PER_DMA_FC</name>
<description>Memory-to-Peripheral Transfer DMAC is flow controller</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>PER2MEM_DMA_FC</name>
<description>Peripheral-to-Memory Transfer DMAC is flow controller</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>PER2PER_DMA_FC</name>
<description>Peripheral-to-Peripheral Transfer DMAC is flow controller</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_INCR</name>
<description>Incrementing, Decrementing or Fixed Address for the Source</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>INCREMENTING</name>
<description>The source address is incremented</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>DECREMENTING</name>
<description>The source address is decremented</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>FIXED</name>
<description>The source address remains unchanged</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_INCR</name>
<description>Incrementing, Decrementing or Fixed Address for the Destination</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>INCREMENTING</name>
<description>The destination address is incremented</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>DECREMENTING</name>
<description>The destination address is decremented</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>FIXED</name>
<description>The destination address remains unchanged</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>IEN</name>
<description>Interrupt Enable Not</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>AUTO</name>
<description>Automatic Multiple Buffer Transfer</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>Automatic multiple buffer transfer is disabled.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ENABLE</name>
<description>Automatic multiple buffer transfer is enabled. This bit enables replay mode or contiguous mode when several buffers are transferred.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>CFG5</name>
<description>DMAC Channel Configuration Register (ch_num = 5)</description>
<addressOffset>0x00000118</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x01000000</resetValue>
<fields>
<field>
<name>SRC_PER</name>
<description>Source with Peripheral identifier</description>
<bitOffset>0</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DST_PER</name>
<description>Destination with Peripheral identifier</description>
<bitOffset>4</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SRC_REP</name>
<description>Source Reloaded from Previous</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CONTIGUOUS_ADDR</name>
<description>When automatic mode is activated, source address is contiguous between two buffers.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>RELOAD_ADDR</name>
<description>When automatic mode is activated, the source address and the control register are reloaded from previous transfer.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_H2SEL</name>
<description>Software or Hardware Selection for the Source</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>SW</name>
<description>Software handshaking interface is used to trigger a transfer request.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>HW</name>
<description>Hardware handshaking interface is used to trigger a transfer request.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_PER_MSB</name>
<description>SRC_PER Most Significant Bits</description>
<bitOffset>10</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DST_REP</name>
<description>Destination Reloaded from Previous</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CONTIGUOUS_ADDR</name>
<description>When automatic mode is activated, destination address is contiguous between two buffers.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>RELOAD_ADDR</name>
<description>When automatic mode is activated, the destination and the control register are reloaded from the pre-vious transfer.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_H2SEL</name>
<description>Software or Hardware Selection for the Destination</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>SW</name>
<description>Software handshaking interface is used to trigger a transfer request.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>HW</name>
<description>Hardware handshaking interface is used to trigger a transfer request.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_PER_MSB</name>
<description>DST_PER Most Significant Bits</description>
<bitOffset>14</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SOD</name>
<description>Stop On Done</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>STOP ON DONE disabled, the descriptor fetch operation ignores DONE Field of CTRLA register.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ENABLE</name>
<description>STOP ON DONE activated, the DMAC module is automatically disabled if DONE FIELD is set to 1.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LOCK_IF</name>
<description>Interface Lock</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>Interface Lock capability is disabled</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ENABLE</name>
<description>Interface Lock capability is enabled</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LOCK_B</name>
<description>Bus Lock</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>AHB Bus Locking capability is disabled.</description>
<value>0</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LOCK_IF_L</name>
<description>Master Interface Arbiter Lock</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CHUNK</name>
<description>The Master Interface Arbiter is locked by the channel x for a chunk transfer.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>BUFFER</name>
<description>The Master Interface Arbiter is locked by the channel x for a buffer transfer.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>AHB_PROT</name>
<description>AHB Protection</description>
<bitOffset>24</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
</field>
<field>
<name>FIFOCFG</name>
<description>FIFO Configuration</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>ALAP_CFG</name>
<description>The largest defined length AHB burst is performed on the destination AHB interface.</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>HALF_CFG</name>
<description>When half FIFO size is available/filled, a source/destination request is serviced.</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>ASAP_CFG</name>
<description>When there is enough space/data available to perform a single AHB access, then the request is serviced.</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>SPIP5</name>
<description>DMAC Channel Source Picture-in-Picture Configuration Register (ch_num = 5)</description>
<addressOffset>0x0000011C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SPIP_HOLE</name>
<description>Source Picture-in-Picture Hole</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SPIP_BOUNDARY</name>
<description>Source Picture-in-Picture Boundary</description>
<bitOffset>16</bitOffset>
<bitWidth>10</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DPIP5</name>
<description>DMAC Channel Destination Picture-in-Picture Configuration Register (ch_num = 5)</description>
<addressOffset>0x00000120</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DPIP_HOLE</name>
<description>Destination Picture-in-Picture Hole</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DPIP_BOUNDARY</name>
<description>Destination Picture-in-Picture Boundary</description>
<bitOffset>16</bitOffset>
<bitWidth>10</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>SADDR6</name>
<description>DMAC Channel Source Address Register (ch_num = 6)</description>
<addressOffset>0x0000012C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SADDR</name>
<description>Channel x Source Address</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DADDR6</name>
<description>DMAC Channel Destination Address Register (ch_num = 6)</description>
<addressOffset>0x00000130</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DADDR</name>
<description>Channel x Destination Address</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DSCR6</name>
<description>DMAC Channel Descriptor Address Register (ch_num = 6)</description>
<addressOffset>0x00000134</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DSCR_IF</name>
<description>Descriptor Interface Selection</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>AHB_IF0</name>
<description>The buffer transfer descriptor is fetched via AHB-Lite Interface 0</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF1</name>
<description>The buffer transfer descriptor is fetched via AHB-Lite Interface 1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF2</name>
<description>The buffer transfer descriptor is fetched via AHB-Lite Interface 2</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DSCR</name>
<description>Buffer Transfer Descriptor Address</description>
<bitOffset>2</bitOffset>
<bitWidth>30</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>CTRLA6</name>
<description>DMAC Channel Control A Register (ch_num = 6)</description>
<addressOffset>0x00000138</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>BTSIZE</name>
<description>Buffer Transfer Size</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCSIZE</name>
<description>Source Chunk Transfer Size.</description>
<bitOffset>16</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CHK_1</name>
<description>1 data transferred</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_4</name>
<description>4 data transferred</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_8</name>
<description>8 data transferred</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_16</name>
<description>16 data transferred</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DCSIZE</name>
<description>Destination Chunk Transfer Size</description>
<bitOffset>20</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CHK_1</name>
<description>1 data transferred</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_4</name>
<description>4 data transferred</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_8</name>
<description>8 data transferred</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_16</name>
<description>16 data transferred</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_WIDTH</name>
<description>Transfer Width for the Source</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>BYTE</name>
<description>the transfer size is set to 8-bit width</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>HALF_WORD</name>
<description>the transfer size is set to 16-bit width</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>WORD</name>
<description>the transfer size is set to 32-bit width</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>DWORD</name>
<description>the transfer size is set to 64-bit width</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_WIDTH</name>
<description>Transfer Width for the Destination</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>BYTE</name>
<description>the transfer size is set to 8-bit width</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>HALF_WORD</name>
<description>the transfer size is set to 16-bit width</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>WORD</name>
<description>the transfer size is set to 32-bit width</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>DWORD</name>
<description>the transfer size is set to 64-bit width</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DONE</name>
<description>Current Descriptor Stop Command and Transfer Completed Memory Indicator</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>CTRLB6</name>
<description>DMAC Channel Control B Register (ch_num = 6)</description>
<addressOffset>0x0000013C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SIF</name>
<description>Source Interface Selection Field</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>AHB_IF0</name>
<description>The source transfer is done via AHB_Lite Interface 0</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF1</name>
<description>The source transfer is done via AHB_Lite Interface 1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF2</name>
<description>The source transfer is done via AHB_Lite Interface 2</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DIF</name>
<description>Destination Interface Selection Field</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>AHB_IF0</name>
<description>The destination transfer is done via AHB_Lite Interface 0</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF1</name>
<description>The destination transfer is done via AHB_Lite Interface 1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF2</name>
<description>The destination transfer is done via AHB_Lite Interface 2</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_PIP</name>
<description>Source Picture-in-Picture Mode</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>Picture-in-Picture mode is disabled. The source data area is contiguous.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ENABLE</name>
<description>Picture-in-Picture mode is enabled. When the source PIP counter reaches the programmable boundary, the address is automatically incremented by a user defined amount.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_PIP</name>
<description>Destination Picture-in-Picture Mode</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>Picture-in-Picture mode is disabled. The Destination data area is contiguous.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ENABLE</name>
<description>Picture-in-Picture mode is enabled. When the Destination PIP counter reaches the programmable boundary the address is automatically incremented by a user-defined amount.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_DSCR</name>
<description>Source Address Descriptor</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>FETCH_FROM_MEM</name>
<description>Source address is updated when the descriptor is fetched from the memory.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>FETCH_DISABLE</name>
<description>Buffer Descriptor Fetch operation is disabled for the source.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_DSCR</name>
<description>Destination Address Descriptor</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>FETCH_FROM_MEM</name>
<description>Destination address is updated when the descriptor is fetched from the memory.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>FETCH_DISABLE</name>
<description>Buffer Descriptor Fetch operation is disabled for the destination.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>FC</name>
<description>Flow Control</description>
<bitOffset>21</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>MEM2MEM_DMA_FC</name>
<description>Memory-to-Memory Transfer DMAC is flow controller</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>MEM2PER_DMA_FC</name>
<description>Memory-to-Peripheral Transfer DMAC is flow controller</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>PER2MEM_DMA_FC</name>
<description>Peripheral-to-Memory Transfer DMAC is flow controller</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>PER2PER_DMA_FC</name>
<description>Peripheral-to-Peripheral Transfer DMAC is flow controller</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_INCR</name>
<description>Incrementing, Decrementing or Fixed Address for the Source</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>INCREMENTING</name>
<description>The source address is incremented</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>DECREMENTING</name>
<description>The source address is decremented</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>FIXED</name>
<description>The source address remains unchanged</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_INCR</name>
<description>Incrementing, Decrementing or Fixed Address for the Destination</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>INCREMENTING</name>
<description>The destination address is incremented</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>DECREMENTING</name>
<description>The destination address is decremented</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>FIXED</name>
<description>The destination address remains unchanged</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>IEN</name>
<description>Interrupt Enable Not</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>AUTO</name>
<description>Automatic Multiple Buffer Transfer</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>Automatic multiple buffer transfer is disabled.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ENABLE</name>
<description>Automatic multiple buffer transfer is enabled. This bit enables replay mode or contiguous mode when several buffers are transferred.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>CFG6</name>
<description>DMAC Channel Configuration Register (ch_num = 6)</description>
<addressOffset>0x00000140</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x01000000</resetValue>
<fields>
<field>
<name>SRC_PER</name>
<description>Source with Peripheral identifier</description>
<bitOffset>0</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DST_PER</name>
<description>Destination with Peripheral identifier</description>
<bitOffset>4</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SRC_REP</name>
<description>Source Reloaded from Previous</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CONTIGUOUS_ADDR</name>
<description>When automatic mode is activated, source address is contiguous between two buffers.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>RELOAD_ADDR</name>
<description>When automatic mode is activated, the source address and the control register are reloaded from previous transfer.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_H2SEL</name>
<description>Software or Hardware Selection for the Source</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>SW</name>
<description>Software handshaking interface is used to trigger a transfer request.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>HW</name>
<description>Hardware handshaking interface is used to trigger a transfer request.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_PER_MSB</name>
<description>SRC_PER Most Significant Bits</description>
<bitOffset>10</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DST_REP</name>
<description>Destination Reloaded from Previous</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CONTIGUOUS_ADDR</name>
<description>When automatic mode is activated, destination address is contiguous between two buffers.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>RELOAD_ADDR</name>
<description>When automatic mode is activated, the destination and the control register are reloaded from the pre-vious transfer.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_H2SEL</name>
<description>Software or Hardware Selection for the Destination</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>SW</name>
<description>Software handshaking interface is used to trigger a transfer request.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>HW</name>
<description>Hardware handshaking interface is used to trigger a transfer request.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_PER_MSB</name>
<description>DST_PER Most Significant Bits</description>
<bitOffset>14</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SOD</name>
<description>Stop On Done</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>STOP ON DONE disabled, the descriptor fetch operation ignores DONE Field of CTRLA register.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ENABLE</name>
<description>STOP ON DONE activated, the DMAC module is automatically disabled if DONE FIELD is set to 1.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LOCK_IF</name>
<description>Interface Lock</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>Interface Lock capability is disabled</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ENABLE</name>
<description>Interface Lock capability is enabled</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LOCK_B</name>
<description>Bus Lock</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>AHB Bus Locking capability is disabled.</description>
<value>0</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LOCK_IF_L</name>
<description>Master Interface Arbiter Lock</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CHUNK</name>
<description>The Master Interface Arbiter is locked by the channel x for a chunk transfer.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>BUFFER</name>
<description>The Master Interface Arbiter is locked by the channel x for a buffer transfer.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>AHB_PROT</name>
<description>AHB Protection</description>
<bitOffset>24</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
</field>
<field>
<name>FIFOCFG</name>
<description>FIFO Configuration</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>ALAP_CFG</name>
<description>The largest defined length AHB burst is performed on the destination AHB interface.</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>HALF_CFG</name>
<description>When half FIFO size is available/filled, a source/destination request is serviced.</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>ASAP_CFG</name>
<description>When there is enough space/data available to perform a single AHB access, then the request is serviced.</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>SPIP6</name>
<description>DMAC Channel Source Picture-in-Picture Configuration Register (ch_num = 6)</description>
<addressOffset>0x00000144</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SPIP_HOLE</name>
<description>Source Picture-in-Picture Hole</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SPIP_BOUNDARY</name>
<description>Source Picture-in-Picture Boundary</description>
<bitOffset>16</bitOffset>
<bitWidth>10</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DPIP6</name>
<description>DMAC Channel Destination Picture-in-Picture Configuration Register (ch_num = 6)</description>
<addressOffset>0x00000148</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DPIP_HOLE</name>
<description>Destination Picture-in-Picture Hole</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DPIP_BOUNDARY</name>
<description>Destination Picture-in-Picture Boundary</description>
<bitOffset>16</bitOffset>
<bitWidth>10</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>SADDR7</name>
<description>DMAC Channel Source Address Register (ch_num = 7)</description>
<addressOffset>0x00000154</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SADDR</name>
<description>Channel x Source Address</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DADDR7</name>
<description>DMAC Channel Destination Address Register (ch_num = 7)</description>
<addressOffset>0x00000158</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DADDR</name>
<description>Channel x Destination Address</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DSCR7</name>
<description>DMAC Channel Descriptor Address Register (ch_num = 7)</description>
<addressOffset>0x0000015C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DSCR_IF</name>
<description>Descriptor Interface Selection</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>AHB_IF0</name>
<description>The buffer transfer descriptor is fetched via AHB-Lite Interface 0</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF1</name>
<description>The buffer transfer descriptor is fetched via AHB-Lite Interface 1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF2</name>
<description>The buffer transfer descriptor is fetched via AHB-Lite Interface 2</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DSCR</name>
<description>Buffer Transfer Descriptor Address</description>
<bitOffset>2</bitOffset>
<bitWidth>30</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>CTRLA7</name>
<description>DMAC Channel Control A Register (ch_num = 7)</description>
<addressOffset>0x00000160</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>BTSIZE</name>
<description>Buffer Transfer Size</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCSIZE</name>
<description>Source Chunk Transfer Size.</description>
<bitOffset>16</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CHK_1</name>
<description>1 data transferred</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_4</name>
<description>4 data transferred</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_8</name>
<description>8 data transferred</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_16</name>
<description>16 data transferred</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DCSIZE</name>
<description>Destination Chunk Transfer Size</description>
<bitOffset>20</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CHK_1</name>
<description>1 data transferred</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_4</name>
<description>4 data transferred</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_8</name>
<description>8 data transferred</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>CHK_16</name>
<description>16 data transferred</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_WIDTH</name>
<description>Transfer Width for the Source</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>BYTE</name>
<description>the transfer size is set to 8-bit width</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>HALF_WORD</name>
<description>the transfer size is set to 16-bit width</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>WORD</name>
<description>the transfer size is set to 32-bit width</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>DWORD</name>
<description>the transfer size is set to 64-bit width</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_WIDTH</name>
<description>Transfer Width for the Destination</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>BYTE</name>
<description>the transfer size is set to 8-bit width</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>HALF_WORD</name>
<description>the transfer size is set to 16-bit width</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>WORD</name>
<description>the transfer size is set to 32-bit width</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>DWORD</name>
<description>the transfer size is set to 64-bit width</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DONE</name>
<description>Current Descriptor Stop Command and Transfer Completed Memory Indicator</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>CTRLB7</name>
<description>DMAC Channel Control B Register (ch_num = 7)</description>
<addressOffset>0x00000164</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SIF</name>
<description>Source Interface Selection Field</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>AHB_IF0</name>
<description>The source transfer is done via AHB_Lite Interface 0</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF1</name>
<description>The source transfer is done via AHB_Lite Interface 1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF2</name>
<description>The source transfer is done via AHB_Lite Interface 2</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DIF</name>
<description>Destination Interface Selection Field</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>AHB_IF0</name>
<description>The destination transfer is done via AHB_Lite Interface 0</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF1</name>
<description>The destination transfer is done via AHB_Lite Interface 1</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>AHB_IF2</name>
<description>The destination transfer is done via AHB_Lite Interface 2</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_PIP</name>
<description>Source Picture-in-Picture Mode</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>Picture-in-Picture mode is disabled. The source data area is contiguous.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ENABLE</name>
<description>Picture-in-Picture mode is enabled. When the source PIP counter reaches the programmable boundary, the address is automatically incremented by a user defined amount.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_PIP</name>
<description>Destination Picture-in-Picture Mode</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>Picture-in-Picture mode is disabled. The Destination data area is contiguous.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ENABLE</name>
<description>Picture-in-Picture mode is enabled. When the Destination PIP counter reaches the programmable boundary the address is automatically incremented by a user-defined amount.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_DSCR</name>
<description>Source Address Descriptor</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>FETCH_FROM_MEM</name>
<description>Source address is updated when the descriptor is fetched from the memory.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>FETCH_DISABLE</name>
<description>Buffer Descriptor Fetch operation is disabled for the source.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_DSCR</name>
<description>Destination Address Descriptor</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>FETCH_FROM_MEM</name>
<description>Destination address is updated when the descriptor is fetched from the memory.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>FETCH_DISABLE</name>
<description>Buffer Descriptor Fetch operation is disabled for the destination.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>FC</name>
<description>Flow Control</description>
<bitOffset>21</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>MEM2MEM_DMA_FC</name>
<description>Memory-to-Memory Transfer DMAC is flow controller</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>MEM2PER_DMA_FC</name>
<description>Memory-to-Peripheral Transfer DMAC is flow controller</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>PER2MEM_DMA_FC</name>
<description>Peripheral-to-Memory Transfer DMAC is flow controller</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>PER2PER_DMA_FC</name>
<description>Peripheral-to-Peripheral Transfer DMAC is flow controller</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_INCR</name>
<description>Incrementing, Decrementing or Fixed Address for the Source</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>INCREMENTING</name>
<description>The source address is incremented</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>DECREMENTING</name>
<description>The source address is decremented</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>FIXED</name>
<description>The source address remains unchanged</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_INCR</name>
<description>Incrementing, Decrementing or Fixed Address for the Destination</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>INCREMENTING</name>
<description>The destination address is incremented</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>DECREMENTING</name>
<description>The destination address is decremented</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>FIXED</name>
<description>The destination address remains unchanged</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>IEN</name>
<description>Interrupt Enable Not</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>AUTO</name>
<description>Automatic Multiple Buffer Transfer</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>Automatic multiple buffer transfer is disabled.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ENABLE</name>
<description>Automatic multiple buffer transfer is enabled. This bit enables replay mode or contiguous mode when several buffers are transferred.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>CFG7</name>
<description>DMAC Channel Configuration Register (ch_num = 7)</description>
<addressOffset>0x00000168</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x01000000</resetValue>
<fields>
<field>
<name>SRC_PER</name>
<description>Source with Peripheral identifier</description>
<bitOffset>0</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DST_PER</name>
<description>Destination with Peripheral identifier</description>
<bitOffset>4</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SRC_REP</name>
<description>Source Reloaded from Previous</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CONTIGUOUS_ADDR</name>
<description>When automatic mode is activated, source address is contiguous between two buffers.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>RELOAD_ADDR</name>
<description>When automatic mode is activated, the source address and the control register are reloaded from previous transfer.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_H2SEL</name>
<description>Software or Hardware Selection for the Source</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>SW</name>
<description>Software handshaking interface is used to trigger a transfer request.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>HW</name>
<description>Hardware handshaking interface is used to trigger a transfer request.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRC_PER_MSB</name>
<description>SRC_PER Most Significant Bits</description>
<bitOffset>10</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DST_REP</name>
<description>Destination Reloaded from Previous</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CONTIGUOUS_ADDR</name>
<description>When automatic mode is activated, destination address is contiguous between two buffers.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>RELOAD_ADDR</name>
<description>When automatic mode is activated, the destination and the control register are reloaded from the pre-vious transfer.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_H2SEL</name>
<description>Software or Hardware Selection for the Destination</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>SW</name>
<description>Software handshaking interface is used to trigger a transfer request.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>HW</name>
<description>Hardware handshaking interface is used to trigger a transfer request.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DST_PER_MSB</name>
<description>DST_PER Most Significant Bits</description>
<bitOffset>14</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SOD</name>
<description>Stop On Done</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>STOP ON DONE disabled, the descriptor fetch operation ignores DONE Field of CTRLA register.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ENABLE</name>
<description>STOP ON DONE activated, the DMAC module is automatically disabled if DONE FIELD is set to 1.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LOCK_IF</name>
<description>Interface Lock</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>Interface Lock capability is disabled</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ENABLE</name>
<description>Interface Lock capability is enabled</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LOCK_B</name>
<description>Bus Lock</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLE</name>
<description>AHB Bus Locking capability is disabled.</description>
<value>0</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LOCK_IF_L</name>
<description>Master Interface Arbiter Lock</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CHUNK</name>
<description>The Master Interface Arbiter is locked by the channel x for a chunk transfer.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>BUFFER</name>
<description>The Master Interface Arbiter is locked by the channel x for a buffer transfer.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>AHB_PROT</name>
<description>AHB Protection</description>
<bitOffset>24</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
</field>
<field>
<name>FIFOCFG</name>
<description>FIFO Configuration</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>ALAP_CFG</name>
<description>The largest defined length AHB burst is performed on the destination AHB interface.</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>HALF_CFG</name>
<description>When half FIFO size is available/filled, a source/destination request is serviced.</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>ASAP_CFG</name>
<description>When there is enough space/data available to perform a single AHB access, then the request is serviced.</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>SPIP7</name>
<description>DMAC Channel Source Picture-in-Picture Configuration Register (ch_num = 7)</description>
<addressOffset>0x0000016C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SPIP_HOLE</name>
<description>Source Picture-in-Picture Hole</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SPIP_BOUNDARY</name>
<description>Source Picture-in-Picture Boundary</description>
<bitOffset>16</bitOffset>
<bitWidth>10</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DPIP7</name>
<description>DMAC Channel Destination Picture-in-Picture Configuration Register (ch_num = 7)</description>
<addressOffset>0x00000170</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DPIP_HOLE</name>
<description>Destination Picture-in-Picture Hole</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DPIP_BOUNDARY</name>
<description>Destination Picture-in-Picture Boundary</description>
<bitOffset>16</bitOffset>
<bitWidth>10</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>WPMR</name>
<description>DMAC Write Protect Mode Register</description>
<addressOffset>0x000001E4</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>WPEN</name>
<description>Write Protect Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>WPKEY</name>
<description>Write Protect KEY</description>
<bitOffset>8</bitOffset>
<bitWidth>24</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>WPSR</name>
<description>DMAC Write Protect Status Register</description>
<addressOffset>0x000001E8</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>WPVS</name>
<description>Write Protect Violation Status</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>WPVSRC</name>
<description>Write Protect Violation Source</description>
<bitOffset>8</bitOffset>
<bitWidth>16</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>MPDDRC</name>
<version>11043D</version>
<description>AHB Multi-port DDR-SDRAM Controller</description>
<groupName>EBI</groupName>
<prependToName>MPDDRC_</prependToName>
<baseAddress>0xFFFFEA00</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x200</size>
<usage>registers</usage>
</addressBlock>
<registers>
<register>
<name>MR</name>
<description>MPDDRC Mode Register</description>
<addressOffset>0x00000000</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>MODE</name>
<description>MPDDRC Command Mode</description>
<bitOffset>0</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>NORMAL_CMD</name>
<description>Normal Mode. Any access to the MPDDRC will be decoded normally. To activate this mode, the command must be followed by a write to the DDR-SDRAM.</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>NOP_CMD</name>
<description>The MPDDRC issues a NOP command when the DDR-SDRAM device is accessed regardless of the cycle. To activate this mode, the command must be followed by a write to the DDR-SDRAM.</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>PRCGALL_CMD</name>
<description>The MPDDRC issues an "All Banks Precharge" command when the DDR-SDRAM device is accessed regardless of the cycle. To activate this mode, the command must be followed by a write to the SDRAM.</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>LMR_CMD</name>
<description>The MPDDRC issues a "Load Mode Register" command when the DDR-SDRAM device is accessed regardless of the cycle. To activate this mode, the command must be followed by a write to the DDR-SDRAM.</description>
<value>0x3</value>
</enumeratedValue>
<enumeratedValue>
<name>RFSH_CMD</name>
<description>The MPDDRC issues an "Auto-Refresh" Command when the DDR-SDRAM device is accessed regardless of the cycle. Previously, an "All Banks Precharge" command must be issued. To activate this mode, the command must be followed by a write to the DDR-SDRAM.</description>
<value>0x4</value>
</enumeratedValue>
<enumeratedValue>
<name>EXT_LMR_CMD</name>
<description>The MPDDRC issues an "Extended Load Mode Register" command when the SDRAM device is accessed regardless of the cycle. To activate this mode, the command must be followed by a write to the DDR-SDRAM. The write in the DDR-SDRAM must be done in the appropriate bank.</description>
<value>0x5</value>
</enumeratedValue>
<enumeratedValue>
<name>DEEP_CMD</name>
<description>Deep power mode: Access to deep power-down mode</description>
<value>0x6</value>
</enumeratedValue>
<enumeratedValue>
<name>LPDDR2_CMD</name>
<description>The MPDDRC issues an "LPDDR2 Mode Register" command when the Low-power DDR2-SDRAM device is accessed regardless of the cycle. To activate this mode, the "Mode Register" command must be followed by a write to the Low-power DDR2-SDRAM.</description>
<value>0x7</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>MRS</name>
<description>Mode Register Select LPDDR2</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>RTR</name>
<description>MPDDRC Refresh Timer Register</description>
<addressOffset>0x00000004</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>COUNT</name>
<description>MPDDRC Refresh Timer Count</description>
<bitOffset>0</bitOffset>
<bitWidth>12</bitWidth>
<access>read-write</access>
</field>
<field>
<name>ADJ_REF</name>
<description>Adjust Refresh Rate</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>REF_PB</name>
<description>Refresh Per Bank</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>MR4_VALUE</name>
<description>Content of MR4 Register</description>
<bitOffset>20</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>CR</name>
<description>MPDDRC Configuration Register</description>
<addressOffset>0x00000008</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000024</resetValue>
<fields>
<field>
<name>NC</name>
<description>Number of Column Bits.</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>COL_9</name>
<description>9 DDR column bits</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>COL_10</name>
<description>10 DDR column bits</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>COL_11</name>
<description>11 DDR column bits</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>COL_12</name>
<description>12 DDR column bits</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>NR</name>
<description>Number of Row Bits</description>
<bitOffset>2</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>ROW_11</name>
<description>11 row bits</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ROW_12</name>
<description>12 row bits</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>ROW_13</name>
<description>13 row bits</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>ROW_14</name>
<description>14 row bits</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CAS</name>
<description>CAS Latency</description>
<bitOffset>4</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DDR_CAS2</name>
<description>LPDDR1 CAS Latency 2</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>DDR_CAS3</name>
<description>DDR2/LPDDR2/LPDDR1 CAS Latency 3</description>
<value>0x3</value>
</enumeratedValue>
<enumeratedValue>
<name>DDR_CAS4</name>
<description>DDR2/LPDDR2 CAS Latency 4</description>
<value>0x4</value>
</enumeratedValue>
<enumeratedValue>
<name>DDR_CAS5</name>
<description>DDR2/LPDDR2 CAS Latency 5</description>
<value>0x5</value>
</enumeratedValue>
<enumeratedValue>
<name>DDR_CAS6</name>
<description>DDR2 CAS Latency 6</description>
<value>0x6</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DLL</name>
<description>Reset DLL</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>RESET_DISABLED</name>
<description>Disable DLL reset.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>RESET_ENABLED</name>
<description>Enable DLL reset.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DIC_DS</name>
<description>Output Driver Impedance Control (Drive Strength)</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DIS_DLL</name>
<description>DISABLE DLL</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>ZQ</name>
<description>ZQ Calibration</description>
<bitOffset>10</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>INIT</name>
<description>Calibration command after initialization</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>LONG</name>
<description>Long calibration</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>SHORT</name>
<description>Short calibration</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>RESET</name>
<description>ZQ Reset</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>OCD</name>
<description>Off-chip Driver</description>
<bitOffset>12</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DQMS</name>
<description>Mask Data is Shared</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>NOT_SHARED</name>
<description>DQM is not shared with another controller.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>SHARED</name>
<description>DQM is shared with another controller.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>ENRDM</name>
<description>Enable Read Measure</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>OFF</name>
<description>DQS/DDR_DATA phase error correction is disabled.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ON</name>
<description>DQS/DDR_DATA phase error correction is enabled.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>NB</name>
<description>Number of Banks.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>4</name>
<description>4 banks</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>8</name>
<description>8 banks</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>NDQS</name>
<description>Not DQS:</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>ENABLED</name>
<description>Not DQS is enabled.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>DISABLED</name>
<description>Not DQS is disabled.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DECOD</name>
<description>Type of Decoding</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>UNAL</name>
<description>Support Unaligned Access</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>UNSUPPORTED</name>
<description>Unaligned access is not supported.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>SUPPORTED</name>
<description>Unaligned access is supported.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>TPR0</name>
<description>MPDDRC Timing Parameter 0 Register</description>
<addressOffset>0x0000000C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x20227225</resetValue>
<fields>
<field>
<name>TRAS</name>
<description>Active to Precharge Delay</description>
<bitOffset>0</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>TRCD</name>
<description>Row to Column Delay</description>
<bitOffset>4</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>TWR</name>
<description>Write Recovery Delay</description>
<bitOffset>8</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>TRC</name>
<description>Row Cycle Delay</description>
<bitOffset>12</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>TRP</name>
<description>Row Precharge Delay</description>
<bitOffset>16</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>TRRD</name>
<description>Active BankA to Active BankB</description>
<bitOffset>20</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>TWTR</name>
<description>Internal Write to Read Delay</description>
<bitOffset>24</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
</field>
<field>
<name>RDC_WRRD</name>
<description>Reduce Write to Read Delay</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>TMRD</name>
<description>Load Mode Register Command to Activate or Refresh Command</description>
<bitOffset>28</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>TPR1</name>
<description>MPDDRC Timing Parameter 1 Register</description>
<addressOffset>0x00000010</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x03C80808</resetValue>
<fields>
<field>
<name>TRFC</name>
<description>Row Cycle Delay</description>
<bitOffset>0</bitOffset>
<bitWidth>7</bitWidth>
<access>read-write</access>
</field>
<field>
<name>TXSNR</name>
<description>Exit Self Refresh Delay to Non Read Command</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>TXSRD</name>
<description>Exit Self Refresh Delay to Read Command</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>TXP</name>
<description>Exit Power-down Delay to First Command</description>
<bitOffset>24</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>TPR2</name>
<description>MPDDRC Timing Parameter 2 Register</description>
<addressOffset>0x00000014</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00042062</resetValue>
<fields>
<field>
<name>TXARD</name>
<description>Exit Active Power Down Delay to Read Command in Mode "Fast Exit".</description>
<bitOffset>0</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>TXARDS</name>
<description>Exit Active Power Down Delay to Read Command in Mode "Slow Exit".</description>
<bitOffset>4</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>TRPA</name>
<description>Row Precharge All Delay</description>
<bitOffset>8</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>TRTP</name>
<description>Read to Precharge</description>
<bitOffset>12</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
</field>
<field>
<name>TFAW</name>
<description>Four Active Windows</description>
<bitOffset>16</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>LPR</name>
<description>MPDDRC Low-power Register</description>
<addressOffset>0x0000001C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>LPCB</name>
<description>Low-power Command Bit</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLED</name>
<description>Low-power Feature is inhibited. No power-down, self refresh and deep-power modes are issued to the DDR-SDRAM device.</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>SELFREFRESH</name>
<description>The MPDDRC issues a Self Refresh command to the DDR-SDRAM device, the clock(s) is/are de-activated and the CKE signal is set low. The DDR-SDRAM device leaves the self refresh mode when accessed and reenters it after the access.</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>POWERDOWN</name>
<description>The MPDDRC issues a Power-down Command to the DDR-SDRAM device after each access, the CKE signal is set low. The DDR-SDRAM device leaves the power-down mode when accessed and reenters it after the access.</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>DEEP_PWD</name>
<description>The MPDDRC issues a Deep Power-down command to the Low-power DDR-SDRAM device.</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CLK_FR</name>
<description>Clock Frozen Command Bit</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLED</name>
<description>Clock(s) is/are not frozen.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ENABLED</name>
<description>Clock(s) is/are frozen.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LPDDR2_PWOFF</name>
<description>LPDDR2 Power Off Bit</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLED</name>
<description>No power off sequence applied to LPDDR2.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ENABLED</name>
<description>A power off sequence is applied to the LPDDR2 device. CKE is forced low.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PASR</name>
<description>Partial Array Self Refresh</description>
<bitOffset>4</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DS</name>
<description>Drive Strength</description>
<bitOffset>8</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
</field>
<field>
<name>TIMEOUT</name>
<description>Enter Low-power Mode</description>
<bitOffset>12</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>0</name>
<description>The SDRAM controller activates the SDRAM low-power mode immediately after the end of the last transfer.</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>64</name>
<description>The SDRAM controller activates the SDRAM low-power mode 64 clock cycles after the end of the last transfer.</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>128</name>
<description>The SDRAM controller activates the SDRAM low-power mode 128 clock cycles after the end of the last transfer.</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>APDE</name>
<description>Active Power Down Exit Time</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>FAST</name>
<description>Fast Exit.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>SLOW</name>
<description>Low Exit.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>UPD_MR</name>
<description>Update Load Mode Register and Extended Mode Register</description>
<bitOffset>20</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLED</name>
<description>Update is disabled.</description>
<value>00</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>MD</name>
<description>MPDDRC Memory Device Register</description>
<addressOffset>0x00000020</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000010</resetValue>
<fields>
<field>
<name>MD</name>
<description>Memory Device</description>
<bitOffset>0</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LPDDR_SDRAM</name>
<description>Low-power DDR1-SDRAM</description>
<value>0x3</value>
</enumeratedValue>
<enumeratedValue>
<name>DDR2_SDRAM</name>
<description>DDR2-SDRAM</description>
<value>0x6</value>
</enumeratedValue>
<enumeratedValue>
<name>LPDDR2_SDRAM</name>
<description>Low-Power DDR2-SDRAM</description>
<value>0x7</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DBW</name>
<description>Data Bus Width</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DBW_32_BITS</name>
<description>Data bus width is 32 bits.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>DBW_16_BITS</name>
<description>Data bus width is 16 bits.(1)</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>HS</name>
<description>MPDDRC High Speed Register</description>
<addressOffset>0x00000024</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DIS_ANTICIP_READ</name>
<description>Disable Anticip Read Access</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>LPDDR2_LPR</name>
<description>MPDDRC LPDDR2 Low-power Register</description>
<addressOffset>0x00000028</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>BK_MASK_PASR</name>
<description>Bank Mask Bit/PASR</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SEG_MASK</name>
<description>Segment Mask Bit</description>
<bitOffset>8</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DS</name>
<description>Drive strength</description>
<bitOffset>24</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>LPDDR2_CAL_MR4</name>
<description>MPDDRC LPDDR2 Calibration and MR4 Register</description>
<addressOffset>0x0000002C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>COUNT_CAL</name>
<description>LPDDR2 Calibration Timer Count</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
<field>
<name>MR4_READ</name>
<description>Mode Register 4 Read Interval</description>
<bitOffset>16</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>LPDDR2_TIM_CAL</name>
<description>MPDDRC LPDDR2 Timing Calibration Register</description>
<addressOffset>0x00000030</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000040</resetValue>
<fields>
<field>
<name>ZQCS</name>
<description>ZQ Calibration Short</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>IO_CALIBR</name>
<description>MPDDRC IO Calibration</description>
<addressOffset>0x00000034</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00870002</resetValue>
<fields>
<field>
<name>RDIV</name>
<description>Resistor Divider, output driver impedance</description>
<bitOffset>0</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>RZQ_34</name>
<description>LPDDR2 RZQ = 34,3 Ohm, DDR2/LPDDR1: Not applicable</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>RZQ_40_RZQ_33_3</name>
<description>LPDDR2:RZQ = 40 Ohm, DDR2/LPDDR1: RZQ = 33,3 Ohm</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>RZQ_48_RZQ_40</name>
<description>LPDDR2:RZQ =48 Ohm, DDR2/LPDDR1: RZQ =40 Ohm</description>
<value>0x3</value>
</enumeratedValue>
<enumeratedValue>
<name>RZQ_60_RZQ_50</name>
<description>LPDDR2:RZQ =60 Ohm, DDR2/LPDDR1: RZQ =50 Ohm</description>
<value>0x4</value>
</enumeratedValue>
<enumeratedValue>
<name>RZQ_80_RZQ_66_7</name>
<description>LPDDR2: RZQ = 80 Ohm, DDR2/LPDDR1: RZQ = 66,7 Ohm</description>
<value>0x6</value>
</enumeratedValue>
<enumeratedValue>
<name>RZQ_120_RZQ_100</name>
<description>LPDDR2:RZQ = 120 Ohm, DDR2/LPDDR1: RZQ = 100 Ohm</description>
<value>0x7</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>TZQIO</name>
<description>IO Calibration</description>
<bitOffset>8</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CALCODEP</name>
<description>Number of Transistor P</description>
<bitOffset>16</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CALCODEN</name>
<description>Number of Transistor N</description>
<bitOffset>20</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<dim>4</dim>
<dimIncrement>4</dimIncrement>
<dimIndex>0-3</dimIndex>
<name>SAW[%s]</name>
<description>MPDDRC Smart Adaptation Wrapper 0 Register</description>
<addressOffset>0x00000044</addressOffset>
<size>32</size>
<access>read-write</access>
<fields>
<field>
<name>FLUSH_MAX</name>
<description>Clears FIFO Content</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>INCR_THRESH</name>
<description>Incremental Threshold</description>
<bitOffset>8</bitOffset>
<bitWidth>6</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>1</name>
<description>1 word/dword max</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>2</name>
<description>2 word/dword max</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>4</name>
<description>4 word/dword max</description>
<value>0x4</value>
</enumeratedValue>
<enumeratedValue>
<name>8</name>
<description>8 word/dword max</description>
<value>0x8</value>
</enumeratedValue>
<enumeratedValue>
<name>16</name>
<description>16 word/dword max</description>
<value>0x10</value>
</enumeratedValue>
<enumeratedValue>
<name>32</name>
<description>32 word/dword max</description>
<value>0x20</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PFCH_THRESH</name>
<description>Prefetch Threshold</description>
<bitOffset>16</bitOffset>
<bitWidth>6</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>2</name>
<description>2 word/dword max</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>4</name>
<description>4 word/dword max</description>
<value>0x4</value>
</enumeratedValue>
<enumeratedValue>
<name>8</name>
<description>8 word/dword max</description>
<value>0x8</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>DLL_MO</name>
<description>MPDDRC DLL Master Offset Register</description>
<addressOffset>0x00000074</addressOffset>
<size>32</size>
<access>read-write</access>
<fields>
<field>
<name>MOFF</name>
<description>DLL Master Delay Line Offset</description>
<bitOffset>0</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CLK90OFF</name>
<description>DLL CLK90 Delay Line Offset</description>
<bitOffset>8</bitOffset>
<bitWidth>5</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SELOFF</name>
<description>DLL Offset Selection</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DLL_SOF</name>
<description>MPDDRC DLL Slave Offset Register</description>
<addressOffset>0x00000078</addressOffset>
<size>32</size>
<access>read-write</access>
<fields>
<field>
<name>S0OFF</name>
<description>DLL Slave 0 Delay Line Offset ([x=0..3])</description>
<bitOffset>0</bitOffset>
<bitWidth>5</bitWidth>
<access>read-write</access>
</field>
<field>
<name>S1OFF</name>
<description>DLL Slave 1 Delay Line Offset ([x=0..3])</description>
<bitOffset>8</bitOffset>
<bitWidth>5</bitWidth>
<access>read-write</access>
</field>
<field>
<name>S2OFF</name>
<description>DLL Slave 2 Delay Line Offset ([x=0..3])</description>
<bitOffset>16</bitOffset>
<bitWidth>5</bitWidth>
<access>read-write</access>
</field>
<field>
<name>S3OFF</name>
<description>DLL Slave 3 Delay Line Offset ([x=0..3])</description>
<bitOffset>24</bitOffset>
<bitWidth>5</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DLL_MS</name>
<description>MPDDRC DLL Status Master Register</description>
<addressOffset>0x0000007C</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>MDINC</name>
<description>DLL Master Delay Increment</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>MDDEC</name>
<description>DLL Master Delay Decrement</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>MDOVF</name>
<description>DLL Master Delay Overflow Flag</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>MDVAL</name>
<description>DLL Master Delay Value</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<dim>4</dim>
<dimIncrement>4</dimIncrement>
<dimIndex>0-3</dimIndex>
<name>DLL_SS[%s]</name>
<description>MPDDRC DLL Status Slave 0 Register</description>
<addressOffset>0x00000080</addressOffset>
<size>32</size>
<access>read-only</access>
<fields>
<field>
<name>SDCOVF</name>
<description>DLL Slave x Delay Correction Overflow Flag</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SDCUDF</name>
<description>DLL Slave x Delay Correction Underflow Flag</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SDERF</name>
<description>DLL Slave x Delay Correction Error Flag</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SDVAL</name>
<description>DLL Slave x Delay Value</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SDCVAL</name>
<description>DLL Slave x Delay Correction Value</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>WPCR</name>
<description>MPDDRC Write Protect Control Register</description>
<addressOffset>0x000000E4</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>WPEN</name>
<description>Write Protection Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>WPKEY</name>
<description>Write Protection KEY</description>
<bitOffset>8</bitOffset>
<bitWidth>24</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>WPSR</name>
<description>MPDDRC Write Protect Status Register</description>
<addressOffset>0x000000E8</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>WPVS</name>
<description>Write Protection Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>WPVSRC</name>
<description>Write Protection Violation Source</description>
<bitOffset>8</bitOffset>
<bitWidth>16</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>MATRIX</name>
<version>6342C</version>
<description>AHB Bus Matrix</description>
<prependToName>MATRIX_</prependToName>
<baseAddress>0xFFFFEC00</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x200</size>
<usage>registers</usage>
</addressBlock>
<registers>
<register>
<dim>16</dim>
<dimIncrement>4</dimIncrement>
<dimIndex>0-15</dimIndex>
<name>MCFG[%s]</name>
<description>Master Configuration Register</description>
<addressOffset>0x00000000</addressOffset>
<size>32</size>
<access>read-write</access>
<fields>
<field>
<name>ULBT</name>
<description>Undefined Length Burst Type</description>
<bitOffset>0</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<dim>16</dim>
<dimIncrement>4</dimIncrement>
<dimIndex>0-15</dimIndex>
<name>SCFG[%s]</name>
<description>Slave Configuration Register</description>
<addressOffset>0x00000040</addressOffset>
<size>32</size>
<access>read-write</access>
<fields>
<field>
<name>SLOT_CYCLE</name>
<description>Maximum Bus Grant Duration for Masters</description>
<bitOffset>0</bitOffset>
<bitWidth>9</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DEFMSTR_TYPE</name>
<description>Default Master Type</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>FIXED_DEFMSTR</name>
<description>Fixed Default Master</description>
<bitOffset>18</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>PRAS0</name>
<description>Priority Register A for Slave 0</description>
<addressOffset>0x00000080</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x33333333</resetValue>
<fields>
<field>
<name>M0PR</name>
<description>Master 0 Priority</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M1PR</name>
<description>Master 1 Priority</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M2PR</name>
<description>Master 2 Priority</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M3PR</name>
<description>Master 3 Priority</description>
<bitOffset>12</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M4PR</name>
<description>Master 4 Priority</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M5PR</name>
<description>Master 5 Priority</description>
<bitOffset>20</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M6PR</name>
<description>Master 6 Priority</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M7PR</name>
<description>Master 7 Priority</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>PRBS0</name>
<description>Priority Register B for Slave 0</description>
<addressOffset>0x00000084</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x33333333</resetValue>
<fields>
<field>
<name>M8PR</name>
<description>Master 8 Priority</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M9PR</name>
<description>Master 9 Priority</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M10PR</name>
<description>Master 10 Priority</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M11PR</name>
<description>Master 11 Priority</description>
<bitOffset>12</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M12PR</name>
<description>Master 12 Priority</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M13PR</name>
<description>Master 13 Priority</description>
<bitOffset>20</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M14PR</name>
<description>Master 14 Priority</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M15PR</name>
<description>Master 15 Priority</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>PRAS1</name>
<description>Priority Register A for Slave 1</description>
<addressOffset>0x00000088</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x33333333</resetValue>
<fields>
<field>
<name>M0PR</name>
<description>Master 0 Priority</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M1PR</name>
<description>Master 1 Priority</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M2PR</name>
<description>Master 2 Priority</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M3PR</name>
<description>Master 3 Priority</description>
<bitOffset>12</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M4PR</name>
<description>Master 4 Priority</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M5PR</name>
<description>Master 5 Priority</description>
<bitOffset>20</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M6PR</name>
<description>Master 6 Priority</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M7PR</name>
<description>Master 7 Priority</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>PRBS1</name>
<description>Priority Register B for Slave 1</description>
<addressOffset>0x0000008C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x33333333</resetValue>
<fields>
<field>
<name>M8PR</name>
<description>Master 8 Priority</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M9PR</name>
<description>Master 9 Priority</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M10PR</name>
<description>Master 10 Priority</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M11PR</name>
<description>Master 11 Priority</description>
<bitOffset>12</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M12PR</name>
<description>Master 12 Priority</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M13PR</name>
<description>Master 13 Priority</description>
<bitOffset>20</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M14PR</name>
<description>Master 14 Priority</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M15PR</name>
<description>Master 15 Priority</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>PRAS2</name>
<description>Priority Register A for Slave 2</description>
<addressOffset>0x00000090</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x33333333</resetValue>
<fields>
<field>
<name>M0PR</name>
<description>Master 0 Priority</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M1PR</name>
<description>Master 1 Priority</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M2PR</name>
<description>Master 2 Priority</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M3PR</name>
<description>Master 3 Priority</description>
<bitOffset>12</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M4PR</name>
<description>Master 4 Priority</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M5PR</name>
<description>Master 5 Priority</description>
<bitOffset>20</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M6PR</name>
<description>Master 6 Priority</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M7PR</name>
<description>Master 7 Priority</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>PRBS2</name>
<description>Priority Register B for Slave 2</description>
<addressOffset>0x00000094</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x33333333</resetValue>
<fields>
<field>
<name>M8PR</name>
<description>Master 8 Priority</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M9PR</name>
<description>Master 9 Priority</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M10PR</name>
<description>Master 10 Priority</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M11PR</name>
<description>Master 11 Priority</description>
<bitOffset>12</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M12PR</name>
<description>Master 12 Priority</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M13PR</name>
<description>Master 13 Priority</description>
<bitOffset>20</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M14PR</name>
<description>Master 14 Priority</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M15PR</name>
<description>Master 15 Priority</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>PRAS3</name>
<description>Priority Register A for Slave 3</description>
<addressOffset>0x00000098</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x33333333</resetValue>
<fields>
<field>
<name>M0PR</name>
<description>Master 0 Priority</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M1PR</name>
<description>Master 1 Priority</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M2PR</name>
<description>Master 2 Priority</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M3PR</name>
<description>Master 3 Priority</description>
<bitOffset>12</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M4PR</name>
<description>Master 4 Priority</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M5PR</name>
<description>Master 5 Priority</description>
<bitOffset>20</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M6PR</name>
<description>Master 6 Priority</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M7PR</name>
<description>Master 7 Priority</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>PRBS3</name>
<description>Priority Register B for Slave 3</description>
<addressOffset>0x0000009C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x33333333</resetValue>
<fields>
<field>
<name>M8PR</name>
<description>Master 8 Priority</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M9PR</name>
<description>Master 9 Priority</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M10PR</name>
<description>Master 10 Priority</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M11PR</name>
<description>Master 11 Priority</description>
<bitOffset>12</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M12PR</name>
<description>Master 12 Priority</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M13PR</name>
<description>Master 13 Priority</description>
<bitOffset>20</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M14PR</name>
<description>Master 14 Priority</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M15PR</name>
<description>Master 15 Priority</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>PRAS4</name>
<description>Priority Register A for Slave 4</description>
<addressOffset>0x000000A0</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x33333333</resetValue>
<fields>
<field>
<name>M0PR</name>
<description>Master 0 Priority</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M1PR</name>
<description>Master 1 Priority</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M2PR</name>
<description>Master 2 Priority</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M3PR</name>
<description>Master 3 Priority</description>
<bitOffset>12</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M4PR</name>
<description>Master 4 Priority</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M5PR</name>
<description>Master 5 Priority</description>
<bitOffset>20</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M6PR</name>
<description>Master 6 Priority</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M7PR</name>
<description>Master 7 Priority</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>PRBS4</name>
<description>Priority Register B for Slave 4</description>
<addressOffset>0x000000A4</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x33333333</resetValue>
<fields>
<field>
<name>M8PR</name>
<description>Master 8 Priority</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M9PR</name>
<description>Master 9 Priority</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M10PR</name>
<description>Master 10 Priority</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M11PR</name>
<description>Master 11 Priority</description>
<bitOffset>12</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M12PR</name>
<description>Master 12 Priority</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M13PR</name>
<description>Master 13 Priority</description>
<bitOffset>20</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M14PR</name>
<description>Master 14 Priority</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M15PR</name>
<description>Master 15 Priority</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>PRAS5</name>
<description>Priority Register A for Slave 5</description>
<addressOffset>0x000000A8</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x33333333</resetValue>
<fields>
<field>
<name>M0PR</name>
<description>Master 0 Priority</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M1PR</name>
<description>Master 1 Priority</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M2PR</name>
<description>Master 2 Priority</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M3PR</name>
<description>Master 3 Priority</description>
<bitOffset>12</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M4PR</name>
<description>Master 4 Priority</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M5PR</name>
<description>Master 5 Priority</description>
<bitOffset>20</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M6PR</name>
<description>Master 6 Priority</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M7PR</name>
<description>Master 7 Priority</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>PRBS5</name>
<description>Priority Register B for Slave 5</description>
<addressOffset>0x000000AC</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x33333333</resetValue>
<fields>
<field>
<name>M8PR</name>
<description>Master 8 Priority</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M9PR</name>
<description>Master 9 Priority</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M10PR</name>
<description>Master 10 Priority</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M11PR</name>
<description>Master 11 Priority</description>
<bitOffset>12</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M12PR</name>
<description>Master 12 Priority</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M13PR</name>
<description>Master 13 Priority</description>
<bitOffset>20</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M14PR</name>
<description>Master 14 Priority</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M15PR</name>
<description>Master 15 Priority</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>PRAS6</name>
<description>Priority Register A for Slave 6</description>
<addressOffset>0x000000B0</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x33333333</resetValue>
<fields>
<field>
<name>M0PR</name>
<description>Master 0 Priority</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M1PR</name>
<description>Master 1 Priority</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M2PR</name>
<description>Master 2 Priority</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M3PR</name>
<description>Master 3 Priority</description>
<bitOffset>12</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M4PR</name>
<description>Master 4 Priority</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M5PR</name>
<description>Master 5 Priority</description>
<bitOffset>20</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M6PR</name>
<description>Master 6 Priority</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M7PR</name>
<description>Master 7 Priority</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>PRBS6</name>
<description>Priority Register B for Slave 6</description>
<addressOffset>0x000000B4</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x33333333</resetValue>
<fields>
<field>
<name>M8PR</name>
<description>Master 8 Priority</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M9PR</name>
<description>Master 9 Priority</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M10PR</name>
<description>Master 10 Priority</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M11PR</name>
<description>Master 11 Priority</description>
<bitOffset>12</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M12PR</name>
<description>Master 12 Priority</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M13PR</name>
<description>Master 13 Priority</description>
<bitOffset>20</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M14PR</name>
<description>Master 14 Priority</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M15PR</name>
<description>Master 15 Priority</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>PRAS7</name>
<description>Priority Register A for Slave 7</description>
<addressOffset>0x000000B8</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x33333333</resetValue>
<fields>
<field>
<name>M0PR</name>
<description>Master 0 Priority</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M1PR</name>
<description>Master 1 Priority</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M2PR</name>
<description>Master 2 Priority</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M3PR</name>
<description>Master 3 Priority</description>
<bitOffset>12</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M4PR</name>
<description>Master 4 Priority</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M5PR</name>
<description>Master 5 Priority</description>
<bitOffset>20</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M6PR</name>
<description>Master 6 Priority</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M7PR</name>
<description>Master 7 Priority</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>PRBS7</name>
<description>Priority Register B for Slave 7</description>
<addressOffset>0x000000BC</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x33333333</resetValue>
<fields>
<field>
<name>M8PR</name>
<description>Master 8 Priority</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M9PR</name>
<description>Master 9 Priority</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M10PR</name>
<description>Master 10 Priority</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M11PR</name>
<description>Master 11 Priority</description>
<bitOffset>12</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M12PR</name>
<description>Master 12 Priority</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M13PR</name>
<description>Master 13 Priority</description>
<bitOffset>20</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M14PR</name>
<description>Master 14 Priority</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M15PR</name>
<description>Master 15 Priority</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>PRAS8</name>
<description>Priority Register A for Slave 8</description>
<addressOffset>0x000000C0</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x33333333</resetValue>
<fields>
<field>
<name>M0PR</name>
<description>Master 0 Priority</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M1PR</name>
<description>Master 1 Priority</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M2PR</name>
<description>Master 2 Priority</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M3PR</name>
<description>Master 3 Priority</description>
<bitOffset>12</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M4PR</name>
<description>Master 4 Priority</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M5PR</name>
<description>Master 5 Priority</description>
<bitOffset>20</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M6PR</name>
<description>Master 6 Priority</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M7PR</name>
<description>Master 7 Priority</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>PRBS8</name>
<description>Priority Register B for Slave 8</description>
<addressOffset>0x000000C4</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x33333333</resetValue>
<fields>
<field>
<name>M8PR</name>
<description>Master 8 Priority</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M9PR</name>
<description>Master 9 Priority</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M10PR</name>
<description>Master 10 Priority</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M11PR</name>
<description>Master 11 Priority</description>
<bitOffset>12</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M12PR</name>
<description>Master 12 Priority</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M13PR</name>
<description>Master 13 Priority</description>
<bitOffset>20</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M14PR</name>
<description>Master 14 Priority</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M15PR</name>
<description>Master 15 Priority</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>PRAS9</name>
<description>Priority Register A for Slave 9</description>
<addressOffset>0x000000C8</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x33333333</resetValue>
<fields>
<field>
<name>M0PR</name>
<description>Master 0 Priority</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M1PR</name>
<description>Master 1 Priority</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M2PR</name>
<description>Master 2 Priority</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M3PR</name>
<description>Master 3 Priority</description>
<bitOffset>12</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M4PR</name>
<description>Master 4 Priority</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M5PR</name>
<description>Master 5 Priority</description>
<bitOffset>20</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M6PR</name>
<description>Master 6 Priority</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M7PR</name>
<description>Master 7 Priority</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>PRBS9</name>
<description>Priority Register B for Slave 9</description>
<addressOffset>0x000000CC</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x33333333</resetValue>
<fields>
<field>
<name>M8PR</name>
<description>Master 8 Priority</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M9PR</name>
<description>Master 9 Priority</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M10PR</name>
<description>Master 10 Priority</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M11PR</name>
<description>Master 11 Priority</description>
<bitOffset>12</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M12PR</name>
<description>Master 12 Priority</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M13PR</name>
<description>Master 13 Priority</description>
<bitOffset>20</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M14PR</name>
<description>Master 14 Priority</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M15PR</name>
<description>Master 15 Priority</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>PRAS10</name>
<description>Priority Register A for Slave 10</description>
<addressOffset>0x000000D0</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x33333333</resetValue>
<fields>
<field>
<name>M0PR</name>
<description>Master 0 Priority</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M1PR</name>
<description>Master 1 Priority</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M2PR</name>
<description>Master 2 Priority</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M3PR</name>
<description>Master 3 Priority</description>
<bitOffset>12</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M4PR</name>
<description>Master 4 Priority</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M5PR</name>
<description>Master 5 Priority</description>
<bitOffset>20</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M6PR</name>
<description>Master 6 Priority</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M7PR</name>
<description>Master 7 Priority</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>PRBS10</name>
<description>Priority Register B for Slave 10</description>
<addressOffset>0x000000D4</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x33333333</resetValue>
<fields>
<field>
<name>M8PR</name>
<description>Master 8 Priority</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M9PR</name>
<description>Master 9 Priority</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M10PR</name>
<description>Master 10 Priority</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M11PR</name>
<description>Master 11 Priority</description>
<bitOffset>12</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M12PR</name>
<description>Master 12 Priority</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M13PR</name>
<description>Master 13 Priority</description>
<bitOffset>20</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M14PR</name>
<description>Master 14 Priority</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M15PR</name>
<description>Master 15 Priority</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>PRAS11</name>
<description>Priority Register A for Slave 11</description>
<addressOffset>0x000000D8</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x33333333</resetValue>
<fields>
<field>
<name>M0PR</name>
<description>Master 0 Priority</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M1PR</name>
<description>Master 1 Priority</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M2PR</name>
<description>Master 2 Priority</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M3PR</name>
<description>Master 3 Priority</description>
<bitOffset>12</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M4PR</name>
<description>Master 4 Priority</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M5PR</name>
<description>Master 5 Priority</description>
<bitOffset>20</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M6PR</name>
<description>Master 6 Priority</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M7PR</name>
<description>Master 7 Priority</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>PRBS11</name>
<description>Priority Register B for Slave 11</description>
<addressOffset>0x000000DC</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x33333333</resetValue>
<fields>
<field>
<name>M8PR</name>
<description>Master 8 Priority</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M9PR</name>
<description>Master 9 Priority</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M10PR</name>
<description>Master 10 Priority</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M11PR</name>
<description>Master 11 Priority</description>
<bitOffset>12</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M12PR</name>
<description>Master 12 Priority</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M13PR</name>
<description>Master 13 Priority</description>
<bitOffset>20</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M14PR</name>
<description>Master 14 Priority</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M15PR</name>
<description>Master 15 Priority</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>PRAS12</name>
<description>Priority Register A for Slave 12</description>
<addressOffset>0x000000E0</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x33333333</resetValue>
<fields>
<field>
<name>M0PR</name>
<description>Master 0 Priority</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M1PR</name>
<description>Master 1 Priority</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M2PR</name>
<description>Master 2 Priority</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M3PR</name>
<description>Master 3 Priority</description>
<bitOffset>12</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M4PR</name>
<description>Master 4 Priority</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M5PR</name>
<description>Master 5 Priority</description>
<bitOffset>20</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M6PR</name>
<description>Master 6 Priority</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M7PR</name>
<description>Master 7 Priority</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>PRBS12</name>
<description>Priority Register B for Slave 12</description>
<addressOffset>0x000000E4</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x33333333</resetValue>
<fields>
<field>
<name>M8PR</name>
<description>Master 8 Priority</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M9PR</name>
<description>Master 9 Priority</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M10PR</name>
<description>Master 10 Priority</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M11PR</name>
<description>Master 11 Priority</description>
<bitOffset>12</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M12PR</name>
<description>Master 12 Priority</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M13PR</name>
<description>Master 13 Priority</description>
<bitOffset>20</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M14PR</name>
<description>Master 14 Priority</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M15PR</name>
<description>Master 15 Priority</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>PRAS13</name>
<description>Priority Register A for Slave 13</description>
<addressOffset>0x000000E8</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x33333333</resetValue>
<fields>
<field>
<name>M0PR</name>
<description>Master 0 Priority</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M1PR</name>
<description>Master 1 Priority</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M2PR</name>
<description>Master 2 Priority</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M3PR</name>
<description>Master 3 Priority</description>
<bitOffset>12</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M4PR</name>
<description>Master 4 Priority</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M5PR</name>
<description>Master 5 Priority</description>
<bitOffset>20</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M6PR</name>
<description>Master 6 Priority</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M7PR</name>
<description>Master 7 Priority</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>PRBS13</name>
<description>Priority Register B for Slave 13</description>
<addressOffset>0x000000EC</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x33333333</resetValue>
<fields>
<field>
<name>M8PR</name>
<description>Master 8 Priority</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M9PR</name>
<description>Master 9 Priority</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M10PR</name>
<description>Master 10 Priority</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M11PR</name>
<description>Master 11 Priority</description>
<bitOffset>12</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M12PR</name>
<description>Master 12 Priority</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M13PR</name>
<description>Master 13 Priority</description>
<bitOffset>20</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M14PR</name>
<description>Master 14 Priority</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M15PR</name>
<description>Master 15 Priority</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>PRAS14</name>
<description>Priority Register A for Slave 14</description>
<addressOffset>0x000000F0</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x33333333</resetValue>
<fields>
<field>
<name>M0PR</name>
<description>Master 0 Priority</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M1PR</name>
<description>Master 1 Priority</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M2PR</name>
<description>Master 2 Priority</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M3PR</name>
<description>Master 3 Priority</description>
<bitOffset>12</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M4PR</name>
<description>Master 4 Priority</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M5PR</name>
<description>Master 5 Priority</description>
<bitOffset>20</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M6PR</name>
<description>Master 6 Priority</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M7PR</name>
<description>Master 7 Priority</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>PRBS14</name>
<description>Priority Register B for Slave 14</description>
<addressOffset>0x000000F4</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x33333333</resetValue>
<fields>
<field>
<name>M8PR</name>
<description>Master 8 Priority</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M9PR</name>
<description>Master 9 Priority</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M10PR</name>
<description>Master 10 Priority</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M11PR</name>
<description>Master 11 Priority</description>
<bitOffset>12</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M12PR</name>
<description>Master 12 Priority</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M13PR</name>
<description>Master 13 Priority</description>
<bitOffset>20</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M14PR</name>
<description>Master 14 Priority</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M15PR</name>
<description>Master 15 Priority</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>PRAS15</name>
<description>Priority Register A for Slave 15</description>
<addressOffset>0x000000F8</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x33333333</resetValue>
<fields>
<field>
<name>M0PR</name>
<description>Master 0 Priority</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M1PR</name>
<description>Master 1 Priority</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M2PR</name>
<description>Master 2 Priority</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M3PR</name>
<description>Master 3 Priority</description>
<bitOffset>12</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M4PR</name>
<description>Master 4 Priority</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M5PR</name>
<description>Master 5 Priority</description>
<bitOffset>20</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M6PR</name>
<description>Master 6 Priority</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M7PR</name>
<description>Master 7 Priority</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>PRBS15</name>
<description>Priority Register B for Slave 15</description>
<addressOffset>0x000000FC</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x33333333</resetValue>
<fields>
<field>
<name>M8PR</name>
<description>Master 8 Priority</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M9PR</name>
<description>Master 9 Priority</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M10PR</name>
<description>Master 10 Priority</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M11PR</name>
<description>Master 11 Priority</description>
<bitOffset>12</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M12PR</name>
<description>Master 12 Priority</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M13PR</name>
<description>Master 13 Priority</description>
<bitOffset>20</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M14PR</name>
<description>Master 14 Priority</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>M15PR</name>
<description>Master 15 Priority</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>MRCR</name>
<description>Master Remap Control Register</description>
<addressOffset>0x00000100</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>RCB0</name>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>RCB1</name>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>RCB2</name>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>RCB3</name>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>RCB4</name>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>RCB5</name>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>RCB6</name>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>RCB7</name>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>RCB8</name>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>RCB9</name>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>RCB10</name>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>RCB11</name>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>RCB12</name>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>RCB13</name>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>RCB14</name>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>RCB15</name>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<dim>16</dim>
<dimIncrement>4</dimIncrement>
<dimIndex>0-15</dimIndex>
<name>SFR[%s]</name>
<description>Special Function Register</description>
<addressOffset>0x00000110</addressOffset>
<size>32</size>
<access>read-write</access>
<fields>
<field>
<name>SFR</name>
<description>Special Function Register Fields</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>WPMR</name>
<description>Write Protect Mode Register</description>
<addressOffset>0x000001E4</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>WPEN</name>
<description>Write Protect Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>WPKEY</name>
<description>Write Protect KEY (Write-only)</description>
<bitOffset>8</bitOffset>
<bitWidth>24</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>WPSR</name>
<description>Write Protect Status Register</description>
<addressOffset>0x000001E8</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>WPVS</name>
<description>Write Protect Violation Status</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>WPVSRC</name>
<description>Write Protect Violation Source</description>
<bitOffset>8</bitOffset>
<bitWidth>16</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>DBGU</name>
<version>6059M</version>
<description>Debug Unit</description>
<prependToName>DBGU_</prependToName>
<baseAddress>0xFFFFEE00</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x200</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>DBGU</name>
<value>2</value>
</interrupt>
<registers>
<register>
<name>CR</name>
<description>Control Register</description>
<addressOffset>0x00000000</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>RSTRX</name>
<description>Reset Receiver</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RSTTX</name>
<description>Reset Transmitter</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXEN</name>
<description>Receiver Enable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RXDIS</name>
<description>Receiver Disable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXEN</name>
<description>Transmitter Enable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXDIS</name>
<description>Transmitter Disable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>RSTSTA</name>
<description>Reset Status Bits</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>MR</name>
<description>Mode Register</description>
<addressOffset>0x00000004</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>PAR</name>
<description>Parity Type</description>
<bitOffset>9</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>EVEN</name>
<description>Even Parity</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ODD</name>
<description>Odd Parity</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>SPACE</name>
<description>Space: Parity forced to 0</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>MARK</name>
<description>Mark: Parity forced to 1</description>
<value>0x3</value>
</enumeratedValue>
<enumeratedValue>
<name>NONE</name>
<description>No Parity</description>
<value>0x4</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CHMODE</name>
<description>Channel Mode</description>
<bitOffset>14</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>NORM</name>
<description>Normal Mode</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>AUTO</name>
<description>Automatic Echo</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>LOCLOOP</name>
<description>Local Loopback</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>REMLOOP</name>
<description>Remote Loopback</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>IER</name>
<description>Interrupt Enable Register</description>
<addressOffset>0x00000008</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>RXRDY</name>
<description>Enable RXRDY Interrupt</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY</name>
<description>Enable TXRDY Interrupt</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>OVRE</name>
<description>Enable Overrun Error Interrupt</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>FRAME</name>
<description>Enable Framing Error Interrupt</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PARE</name>
<description>Enable Parity Error Interrupt</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXEMPTY</name>
<description>Enable TXEMPTY Interrupt</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>COMMTX</name>
<description>Enable COMMTX (from ARM) Interrupt</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>COMMRX</name>
<description>Enable COMMRX (from ARM) Interrupt</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IDR</name>
<description>Interrupt Disable Register</description>
<addressOffset>0x0000000C</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>RXRDY</name>
<description>Disable RXRDY Interrupt</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXRDY</name>
<description>Disable TXRDY Interrupt</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>OVRE</name>
<description>Disable Overrun Error Interrupt</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>FRAME</name>
<description>Disable Framing Error Interrupt</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PARE</name>
<description>Disable Parity Error Interrupt</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TXEMPTY</name>
<description>Disable TXEMPTY Interrupt</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>COMMTX</name>
<description>Disable COMMTX (from ARM) Interrupt</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>COMMRX</name>
<description>Disable COMMRX (from ARM) Interrupt</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IMR</name>
<description>Interrupt Mask Register</description>
<addressOffset>0x00000010</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>RXRDY</name>
<description>Mask RXRDY Interrupt</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY</name>
<description>Disable TXRDY Interrupt</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>OVRE</name>
<description>Mask Overrun Error Interrupt</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>FRAME</name>
<description>Mask Framing Error Interrupt</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PARE</name>
<description>Mask Parity Error Interrupt</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXEMPTY</name>
<description>Mask TXEMPTY Interrupt</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>COMMTX</name>
<description>Mask COMMTX Interrupt</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>COMMRX</name>
<description>Mask COMMRX Interrupt</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>SR</name>
<description>Status Register</description>
<addressOffset>0x00000014</addressOffset>
<size>32</size>
<access>read-only</access>
<fields>
<field>
<name>RXRDY</name>
<description>Receiver Ready</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXRDY</name>
<description>Transmitter Ready</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>OVRE</name>
<description>Overrun Error</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>FRAME</name>
<description>Framing Error</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PARE</name>
<description>Parity Error</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TXEMPTY</name>
<description>Transmitter Empty</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>COMMTX</name>
<description>Debug Communication Channel Write Status</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>COMMRX</name>
<description>Debug Communication Channel Read Status</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>RHR</name>
<description>Receive Holding Register</description>
<addressOffset>0x00000018</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>RXCHR</name>
<description>Received Character</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>THR</name>
<description>Transmit Holding Register</description>
<addressOffset>0x0000001C</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>TXCHR</name>
<description>Character to be Transmitted</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>BRGR</name>
<description>Baud Rate Generator Register</description>
<addressOffset>0x00000020</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CD</name>
<description>Clock Divisor</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>DISABLED</name>
<description>DBGU Disabled</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>MCK</name>
<description>MCK</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>CIDR</name>
<description>Chip ID Register</description>
<addressOffset>0x00000040</addressOffset>
<size>32</size>
<access>read-only</access>
<fields>
<field>
<name>VERSION</name>
<description>Version of the Device</description>
<bitOffset>0</bitOffset>
<bitWidth>5</bitWidth>
<access>read-only</access>
</field>
<field>
<name>EPROC</name>
<description>Embedded Processor</description>
<bitOffset>5</bitOffset>
<bitWidth>3</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>ARM946ES</name>
<description>ARM946ES</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>ARM7TDMI</name>
<description>ARM7TDMI</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>CM3</name>
<description>Cortex-M3</description>
<value>0x3</value>
</enumeratedValue>
<enumeratedValue>
<name>ARM920T</name>
<description>ARM920T</description>
<value>0x4</value>
</enumeratedValue>
<enumeratedValue>
<name>ARM926EJS</name>
<description>ARM926EJS</description>
<value>0x5</value>
</enumeratedValue>
<enumeratedValue>
<name>CA5</name>
<description>Cortex-A5</description>
<value>0x6</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>NVPSIZ</name>
<description>Nonvolatile Program Memory Size</description>
<bitOffset>8</bitOffset>
<bitWidth>4</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>NONE</name>
<description>None</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>8K</name>
<description>8K bytes</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>16K</name>
<description>16K bytes</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>32K</name>
<description>32K bytes</description>
<value>0x3</value>
</enumeratedValue>
<enumeratedValue>
<name>64K</name>
<description>64K bytes</description>
<value>0x5</value>
</enumeratedValue>
<enumeratedValue>
<name>128K</name>
<description>128K bytes</description>
<value>0x7</value>
</enumeratedValue>
<enumeratedValue>
<name>256K</name>
<description>256K bytes</description>
<value>0x9</value>
</enumeratedValue>
<enumeratedValue>
<name>512K</name>
<description>512K bytes</description>
<value>0xA</value>
</enumeratedValue>
<enumeratedValue>
<name>1024K</name>
<description>1024K bytes</description>
<value>0xC</value>
</enumeratedValue>
<enumeratedValue>
<name>2048K</name>
<description>2048K bytes</description>
<value>0xE</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>NVPSIZ2</name>
<bitOffset>12</bitOffset>
<bitWidth>4</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>NONE</name>
<description>None</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>8K</name>
<description>8K bytes</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>16K</name>
<description>16K bytes</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>32K</name>
<description>32K bytes</description>
<value>0x3</value>
</enumeratedValue>
<enumeratedValue>
<name>64K</name>
<description>64K bytes</description>
<value>0x5</value>
</enumeratedValue>
<enumeratedValue>
<name>128K</name>
<description>128K bytes</description>
<value>0x7</value>
</enumeratedValue>
<enumeratedValue>
<name>256K</name>
<description>256K bytes</description>
<value>0x9</value>
</enumeratedValue>
<enumeratedValue>
<name>512K</name>
<description>512K bytes</description>
<value>0xA</value>
</enumeratedValue>
<enumeratedValue>
<name>1024K</name>
<description>1024K bytes</description>
<value>0xC</value>
</enumeratedValue>
<enumeratedValue>
<name>2048K</name>
<description>2048K bytes</description>
<value>0xE</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SRAMSIZ</name>
<description>Internal SRAM Size</description>
<bitOffset>16</bitOffset>
<bitWidth>4</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>1K</name>
<description>1K bytes</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>2K</name>
<description>2K bytes</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>6K</name>
<description>6K bytes</description>
<value>0x3</value>
</enumeratedValue>
<enumeratedValue>
<name>112K</name>
<description>112K bytes</description>
<value>0x4</value>
</enumeratedValue>
<enumeratedValue>
<name>4K</name>
<description>4K bytes</description>
<value>0x5</value>
</enumeratedValue>
<enumeratedValue>
<name>80K</name>
<description>80K bytes</description>
<value>0x6</value>
</enumeratedValue>
<enumeratedValue>
<name>160K</name>
<description>160K bytes</description>
<value>0x7</value>
</enumeratedValue>
<enumeratedValue>
<name>8K</name>
<description>8K bytes</description>
<value>0x8</value>
</enumeratedValue>
<enumeratedValue>
<name>16K</name>
<description>16K bytes</description>
<value>0x9</value>
</enumeratedValue>
<enumeratedValue>
<name>32K</name>
<description>32K bytes</description>
<value>0xA</value>
</enumeratedValue>
<enumeratedValue>
<name>64K</name>
<description>64K bytes</description>
<value>0xB</value>
</enumeratedValue>
<enumeratedValue>
<name>128K</name>
<description>128K bytes</description>
<value>0xC</value>
</enumeratedValue>
<enumeratedValue>
<name>256K</name>
<description>256K bytes</description>
<value>0xD</value>
</enumeratedValue>
<enumeratedValue>
<name>96K</name>
<description>96K bytes</description>
<value>0xE</value>
</enumeratedValue>
<enumeratedValue>
<name>512K</name>
<description>512K bytes</description>
<value>0xF</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>ARCH</name>
<description>Architecture Identifier</description>
<bitOffset>20</bitOffset>
<bitWidth>8</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>AT91SAM9xx</name>
<description>AT91SAM9xx Series</description>
<value>0x19</value>
</enumeratedValue>
<enumeratedValue>
<name>AT91SAM9XExx</name>
<description>AT91SAM9XExx Series</description>
<value>0x29</value>
</enumeratedValue>
<enumeratedValue>
<name>AT91x34</name>
<description>AT91x34 Series</description>
<value>0x34</value>
</enumeratedValue>
<enumeratedValue>
<name>CAP7</name>
<description>CAP7 Series</description>
<value>0x37</value>
</enumeratedValue>
<enumeratedValue>
<name>CAP9</name>
<description>CAP9 Series</description>
<value>0x39</value>
</enumeratedValue>
<enumeratedValue>
<name>CAP11</name>
<description>CAP11 Series</description>
<value>0x3B</value>
</enumeratedValue>
<enumeratedValue>
<name>AT91x40</name>
<description>AT91x40 Series</description>
<value>0x40</value>
</enumeratedValue>
<enumeratedValue>
<name>AT91x42</name>
<description>AT91x42 Series</description>
<value>0x42</value>
</enumeratedValue>
<enumeratedValue>
<name>AT91x55</name>
<description>AT91x55 Series</description>
<value>0x55</value>
</enumeratedValue>
<enumeratedValue>
<name>AT91SAM7Axx</name>
<description>AT91SAM7Axx Series</description>
<value>0x60</value>
</enumeratedValue>
<enumeratedValue>
<name>AT91SAM7AQxx</name>
<description>AT91SAM7AQxx Series</description>
<value>0x61</value>
</enumeratedValue>
<enumeratedValue>
<name>AT91x63</name>
<description>AT91x63 Series</description>
<value>0x63</value>
</enumeratedValue>
<enumeratedValue>
<name>AT91SAM7Sxx</name>
<description>AT91SAM7Sxx Series</description>
<value>0x70</value>
</enumeratedValue>
<enumeratedValue>
<name>AT91SAM7XCxx</name>
<description>AT91SAM7XCxx Series</description>
<value>0x71</value>
</enumeratedValue>
<enumeratedValue>
<name>AT91SAM7SExx</name>
<description>AT91SAM7SExx Series</description>
<value>0x72</value>
</enumeratedValue>
<enumeratedValue>
<name>AT91SAM7Lxx</name>
<description>AT91SAM7Lxx Series</description>
<value>0x73</value>
</enumeratedValue>
<enumeratedValue>
<name>AT91SAM7Xxx</name>
<description>AT91SAM7Xxx Series</description>
<value>0x75</value>
</enumeratedValue>
<enumeratedValue>
<name>AT91SAM7SLxx</name>
<description>AT91SAM7SLxx Series</description>
<value>0x76</value>
</enumeratedValue>
<enumeratedValue>
<name>ATSAM3UxC</name>
<description>ATSAM3UxC Series (100-pin version)</description>
<value>0x80</value>
</enumeratedValue>
<enumeratedValue>
<name>ATSAM3UxE</name>
<description>ATSAM3UxE Series (144-pin version)</description>
<value>0x81</value>
</enumeratedValue>
<enumeratedValue>
<name>ATSAM3AxC</name>
<description>ATSAM3AxC Series (100-pin version)</description>
<value>0x83</value>
</enumeratedValue>
<enumeratedValue>
<name>ATSAM3XxC</name>
<description>ATSAM3XxC Series (100-pin version)</description>
<value>0x84</value>
</enumeratedValue>
<enumeratedValue>
<name>ATSAM3XxE</name>
<description>ATSAM3XxE Series (144-pin version)</description>
<value>0x85</value>
</enumeratedValue>
<enumeratedValue>
<name>ATSAM3XxG</name>
<description>ATSAM3XxG Series (208/217-pin version)</description>
<value>0x86</value>
</enumeratedValue>
<enumeratedValue>
<name>ATSAM3SxA</name>
<description>ATSAM3SxA Series (48-pin version)</description>
<value>0x88</value>
</enumeratedValue>
<enumeratedValue>
<name>ATSAM3SxB</name>
<description>ATSAM3SxB Series (64-pin version)</description>
<value>0x89</value>
</enumeratedValue>
<enumeratedValue>
<name>ATSAM3SxC</name>
<description>ATSAM3SxC Series (100-pin version)</description>
<value>0x8A</value>
</enumeratedValue>
<enumeratedValue>
<name>AT91x92</name>
<description>AT91x92 Series</description>
<value>0x92</value>
</enumeratedValue>
<enumeratedValue>
<name>ATSAM3NxA</name>
<description>ATSAM3NxA Series (48-pin version)</description>
<value>0x93</value>
</enumeratedValue>
<enumeratedValue>
<name>ATSAM3NxB</name>
<description>ATSAM3NxB Series (64-pin version)</description>
<value>0x94</value>
</enumeratedValue>
<enumeratedValue>
<name>ATSAM3NxC</name>
<description>ATSAM3NxC Series (100-pin version)</description>
<value>0x95</value>
</enumeratedValue>
<enumeratedValue>
<name>ATSAM3SDxA</name>
<description>ATSAM3SDxA Series (48-pin version)</description>
<value>0x98</value>
</enumeratedValue>
<enumeratedValue>
<name>ATSAM3SDxB</name>
<description>ATSAM3SDxB Series (64-pin version)</description>
<value>0x99</value>
</enumeratedValue>
<enumeratedValue>
<name>ATSAM3SDxC</name>
<description>ATSAM3SDxC Series (100-pin version)</description>
<value>0x9A</value>
</enumeratedValue>
<enumeratedValue>
<name>AT75Cxx</name>
<description>AT75Cxx Series</description>
<value>0xF0</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>NVPTYP</name>
<description>Nonvolatile Program Memory Type</description>
<bitOffset>28</bitOffset>
<bitWidth>3</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>ROM</name>
<description>ROM</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ROMLESS</name>
<description>ROMless or on-chip Flash</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>FLASH</name>
<description>Embedded Flash Memory</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>ROM_FLASH</name>
<description>ROM and Embedded Flash MemoryNVPSIZ is ROM size NVPSIZ2 is Flash size</description>
<value>0x3</value>
</enumeratedValue>
<enumeratedValue>
<name>SRAM</name>
<description>SRAM emulating ROM</description>
<value>0x4</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>EXT</name>
<description>Extension Flag</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>EXID</name>
<description>Chip ID Extension Register</description>
<addressOffset>0x00000044</addressOffset>
<size>32</size>
<access>read-only</access>
<fields>
<field>
<name>EXID</name>
<description>Chip ID Extension</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>FNR</name>
<description>Force NTRST Register</description>
<addressOffset>0x00000048</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>FNTRST</name>
<description>Force NTRST</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>AIC</name>
<version>11051C</version>
<description>Advanced Interrupt Controller</description>
<prependToName>AIC_</prependToName>
<baseAddress>0xFFFFF000</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x200</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>FIQ</name>
<value>0</value>
</interrupt>
<interrupt>
<name>IRQ</name>
<value>47</value>
</interrupt>
<registers>
<register>
<name>SSR</name>
<description>Source Select Register</description>
<addressOffset>0x00000000</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>INTSEL</name>
<description>Interrupt line Selection</description>
<bitOffset>0</bitOffset>
<bitWidth>7</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>SMR</name>
<description>Source Mode Register</description>
<addressOffset>0x00000004</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>PRIOR</name>
<description>Priority Level</description>
<bitOffset>0</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SRCTYPE</name>
<description>Interrupt Source Type</description>
<bitOffset>5</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>INT_LEVEL_SENSITIVE</name>
<description>High level Sensitive for internal sourceLow level Sensitive for external source</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>INT_EDGE_TRIGGERED</name>
<description>Positive edge triggered for internal sourceNegative edge triggered for external source</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>EXT_HIGH_LEVEL</name>
<description>High level Sensitive for internal sourceHigh level Sensitive for external source</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>EXT_POSITIVE_EDGE</name>
<description>Positive edge triggered for internal sourcePositive edge triggered for external source</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>SVR</name>
<description>Source Vector Register</description>
<addressOffset>0x00000008</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>VECTOR</name>
<description>Source Vector</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>IVR</name>
<description>Interrupt Vector Register</description>
<addressOffset>0x00000010</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>IRQV</name>
<description>Interrupt Vector Register</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>FVR</name>
<description>FIQ Interrupt Vector Register</description>
<addressOffset>0x00000014</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>FIQV</name>
<description>FIQ Vector Register</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>ISR</name>
<description>Interrupt Status Register</description>
<addressOffset>0x00000018</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>IRQID</name>
<description>Current Interrupt Identifier</description>
<bitOffset>0</bitOffset>
<bitWidth>7</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>IPR0</name>
<description>Interrupt Pending Register 0</description>
<addressOffset>0x00000020</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>FIQ</name>
<description>Interrupt Pending</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SYS</name>
<description>Interrupt Pending</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID2</name>
<description>Interrupt Pending</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID3</name>
<description>Interrupt Pending</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID4</name>
<description>Interrupt Pending</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID5</name>
<description>Interrupt Pending</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID6</name>
<description>Interrupt Pending</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID7</name>
<description>Interrupt Pending</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID8</name>
<description>Interrupt Pending</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID9</name>
<description>Interrupt Pending</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID10</name>
<description>Interrupt Pending</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID11</name>
<description>Interrupt Pending</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID12</name>
<description>Interrupt Pending</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID13</name>
<description>Interrupt Pending</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID14</name>
<description>Interrupt Pending</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID15</name>
<description>Interrupt Pending</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID16</name>
<description>Interrupt Pending</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID17</name>
<description>Interrupt Pending</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID18</name>
<description>Interrupt Pending</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID19</name>
<description>Interrupt Pending</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID20</name>
<description>Interrupt Pending</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID21</name>
<description>Interrupt Pending</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID22</name>
<description>Interrupt Pending</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID23</name>
<description>Interrupt Pending</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID24</name>
<description>Interrupt Pending</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID25</name>
<description>Interrupt Pending</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID26</name>
<description>Interrupt Pending</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID27</name>
<description>Interrupt Pending</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID28</name>
<description>Interrupt Pending</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID29</name>
<description>Interrupt Pending</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID30</name>
<description>Interrupt Pending</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID31</name>
<description>Interrupt Pending</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>IPR1</name>
<description>Interrupt Pending Register 1</description>
<addressOffset>0x00000024</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>PID32</name>
<description>Interrupt Pending</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID33</name>
<description>Interrupt Pending</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID34</name>
<description>Interrupt Pending</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID35</name>
<description>Interrupt Pending</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID36</name>
<description>Interrupt Pending</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID37</name>
<description>Interrupt Pending</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID38</name>
<description>Interrupt Pending</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID39</name>
<description>Interrupt Pending</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID40</name>
<description>Interrupt Pending</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID41</name>
<description>Interrupt Pending</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID42</name>
<description>Interrupt Pending</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID43</name>
<description>Interrupt Pending</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID44</name>
<description>Interrupt Pending</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID45</name>
<description>Interrupt Pending</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID46</name>
<description>Interrupt Pending</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID47</name>
<description>Interrupt Pending</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID48</name>
<description>Interrupt Pending</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID49</name>
<description>Interrupt Pending</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID50</name>
<description>Interrupt Pending</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID51</name>
<description>Interrupt Pending</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID52</name>
<description>Interrupt Pending</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID53</name>
<description>Interrupt Pending</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID54</name>
<description>Interrupt Pending</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID55</name>
<description>Interrupt Pending</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID56</name>
<description>Interrupt Pending</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID57</name>
<description>Interrupt Pending</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID58</name>
<description>Interrupt Pending</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID59</name>
<description>Interrupt Pending</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID60</name>
<description>Interrupt Pending</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID61</name>
<description>Interrupt Pending</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID62</name>
<description>Interrupt Pending</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID63</name>
<description>Interrupt Pending</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>IPR2</name>
<description>Interrupt Pending Register 2</description>
<addressOffset>0x00000028</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>PID64</name>
<description>Interrupt Pending</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID65</name>
<description>Interrupt Pending</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID66</name>
<description>Interrupt Pending</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID67</name>
<description>Interrupt Pending</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID68</name>
<description>Interrupt Pending</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID69</name>
<description>Interrupt Pending</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID70</name>
<description>Interrupt Pending</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID71</name>
<description>Interrupt Pending</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID72</name>
<description>Interrupt Pending</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID73</name>
<description>Interrupt Pending</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID74</name>
<description>Interrupt Pending</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID75</name>
<description>Interrupt Pending</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID76</name>
<description>Interrupt Pending</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID77</name>
<description>Interrupt Pending</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID78</name>
<description>Interrupt Pending</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID79</name>
<description>Interrupt Pending</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID80</name>
<description>Interrupt Pending</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID81</name>
<description>Interrupt Pending</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID82</name>
<description>Interrupt Pending</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID83</name>
<description>Interrupt Pending</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID84</name>
<description>Interrupt Pending</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID85</name>
<description>Interrupt Pending</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID86</name>
<description>Interrupt Pending</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID87</name>
<description>Interrupt Pending</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID88</name>
<description>Interrupt Pending</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID89</name>
<description>Interrupt Pending</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID90</name>
<description>Interrupt Pending</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID91</name>
<description>Interrupt Pending</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID92</name>
<description>Interrupt Pending</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID93</name>
<description>Interrupt Pending</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID94</name>
<description>Interrupt Pending</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID95</name>
<description>Interrupt Pending</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>IPR3</name>
<description>Interrupt Pending Register 3</description>
<addressOffset>0x0000002C</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>PID96</name>
<description>Interrupt Pending</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID97</name>
<description>Interrupt Pending</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID98</name>
<description>Interrupt Pending</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID99</name>
<description>Interrupt Pending</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID100</name>
<description>Interrupt Pending</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID101</name>
<description>Interrupt Pending</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID102</name>
<description>Interrupt Pending</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID103</name>
<description>Interrupt Pending</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID104</name>
<description>Interrupt Pending</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID105</name>
<description>Interrupt Pending</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID106</name>
<description>Interrupt Pending</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID107</name>
<description>Interrupt Pending</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID108</name>
<description>Interrupt Pending</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID109</name>
<description>Interrupt Pending</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID110</name>
<description>Interrupt Pending</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID111</name>
<description>Interrupt Pending</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID112</name>
<description>Interrupt Pending</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID113</name>
<description>Interrupt Pending</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID114</name>
<description>Interrupt Pending</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID115</name>
<description>Interrupt Pending</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID116</name>
<description>Interrupt Pending</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID117</name>
<description>Interrupt Pending</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID118</name>
<description>Interrupt Pending</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID119</name>
<description>Interrupt Pending</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID120</name>
<description>Interrupt Pending</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID121</name>
<description>Interrupt Pending</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID122</name>
<description>Interrupt Pending</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID123</name>
<description>Interrupt Pending</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID124</name>
<description>Interrupt Pending</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID125</name>
<description>Interrupt Pending</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID126</name>
<description>Interrupt Pending</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID127</name>
<description>Interrupt Pending</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>IMR</name>
<description>Interrupt Mask Register</description>
<addressOffset>0x00000030</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>INTM</name>
<description>Interrupt Mask</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>CISR</name>
<description>Core Interrupt Status Register</description>
<addressOffset>0x00000034</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>NFIQ</name>
<description>NFIQ Status</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NIRQ</name>
<description>NIRQ Status</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>EOICR</name>
<description>End of Interrupt Command Register</description>
<addressOffset>0x00000038</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>ENDIT</name>
<description>Interrupt Processing Complete Command</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>SPU</name>
<description>Spurious Interrupt Vector Register</description>
<addressOffset>0x0000003C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SIVR</name>
<description>Spurious Interrupt Vector Register</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>IECR</name>
<description>Interrupt Enable Command Register</description>
<addressOffset>0x00000040</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>INTEN</name>
<description>Interrupt Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IDCR</name>
<description>Interrupt Disable Command Register</description>
<addressOffset>0x00000044</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>INTD</name>
<description>Interrupt Disable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>ICCR</name>
<description>Interrupt Clear Command Register</description>
<addressOffset>0x00000048</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>INTCLR</name>
<description>Interrupt Clear</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>ISCR</name>
<description>Interrupt Set Command Register</description>
<addressOffset>0x0000004C</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>INTSET</name>
<description>Interrupt Set</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>FFER</name>
<description>Fast Forcing Enable Register</description>
<addressOffset>0x00000050</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>FFEN</name>
<description>Fast Forcing Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>FFDR</name>
<description>Fast Forcing Disable Register</description>
<addressOffset>0x00000054</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>FFDIS</name>
<description>Fast Forcing Disable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>FFSR</name>
<description>Fast Forcing Status Register</description>
<addressOffset>0x00000058</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>FFS</name>
<description>Fast Forcing Status</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>DCR</name>
<description>Debug Control Register</description>
<addressOffset>0x0000006C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>PROT</name>
<description>Protection Mode</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>GMSK</name>
<description>General Mask</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>WPMR</name>
<description>Write Protect Mode Register</description>
<addressOffset>0x000000E4</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>WPEN</name>
<description>Write Protect Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>WPKEY</name>
<description>Write Protect KEY</description>
<bitOffset>8</bitOffset>
<bitWidth>24</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>WPSR</name>
<description>Write Protect Status Register</description>
<addressOffset>0x000000E8</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>WPVS</name>
<description>Write Protect Violation Status</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>WPVSRC</name>
<description>Write Protect Violation Source</description>
<bitOffset>8</bitOffset>
<bitWidth>16</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>PIOA</name>
<version>11004H</version>
<description>Parallel Input/Output Controller A</description>
<groupName>PIO</groupName>
<prependToName>PIOA_</prependToName>
<baseAddress>0xFFFFF200</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x200</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>PIOA</name>
<value>6</value>
</interrupt>
<registers>
<register>
<name>PER</name>
<description>PIO Enable Register</description>
<addressOffset>0x00000000</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>PIO Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>PIO Enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>PIO Enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>PIO Enable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>PIO Enable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>PIO Enable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>PIO Enable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>PIO Enable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>PIO Enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>PIO Enable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>PIO Enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>PIO Enable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>PIO Enable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>PIO Enable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>PIO Enable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>PIO Enable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>PIO Enable</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>PIO Enable</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>PIO Enable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>PIO Enable</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>PIO Enable</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>PIO Enable</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>PIO Enable</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>PIO Enable</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>PIO Enable</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>PIO Enable</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>PIO Enable</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>PIO Enable</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>PIO Enable</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>PIO Enable</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>PIO Enable</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>PIO Enable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>PDR</name>
<description>PIO Disable Register</description>
<addressOffset>0x00000004</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>PIO Disable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>PIO Disable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>PIO Disable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>PIO Disable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>PIO Disable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>PIO Disable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>PIO Disable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>PIO Disable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>PIO Disable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>PIO Disable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>PIO Disable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>PIO Disable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>PIO Disable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>PIO Disable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>PIO Disable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>PIO Disable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>PIO Disable</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>PIO Disable</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>PIO Disable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>PIO Disable</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>PIO Disable</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>PIO Disable</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>PIO Disable</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>PIO Disable</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>PIO Disable</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>PIO Disable</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>PIO Disable</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>PIO Disable</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>PIO Disable</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>PIO Disable</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>PIO Disable</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>PIO Disable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>PSR</name>
<description>PIO Status Register</description>
<addressOffset>0x00000008</addressOffset>
<size>32</size>
<access>read-only</access>
<fields>
<field>
<name>P0</name>
<description>PIO Status</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P1</name>
<description>PIO Status</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P2</name>
<description>PIO Status</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P3</name>
<description>PIO Status</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P4</name>
<description>PIO Status</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P5</name>
<description>PIO Status</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P6</name>
<description>PIO Status</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P7</name>
<description>PIO Status</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P8</name>
<description>PIO Status</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P9</name>
<description>PIO Status</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P10</name>
<description>PIO Status</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P11</name>
<description>PIO Status</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P12</name>
<description>PIO Status</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P13</name>
<description>PIO Status</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P14</name>
<description>PIO Status</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P15</name>
<description>PIO Status</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P16</name>
<description>PIO Status</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P17</name>
<description>PIO Status</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P18</name>
<description>PIO Status</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P19</name>
<description>PIO Status</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P20</name>
<description>PIO Status</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P21</name>
<description>PIO Status</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P22</name>
<description>PIO Status</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P23</name>
<description>PIO Status</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P24</name>
<description>PIO Status</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P25</name>
<description>PIO Status</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P26</name>
<description>PIO Status</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P27</name>
<description>PIO Status</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P28</name>
<description>PIO Status</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P29</name>
<description>PIO Status</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P30</name>
<description>PIO Status</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P31</name>
<description>PIO Status</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>OER</name>
<description>Output Enable Register</description>
<addressOffset>0x00000010</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Output Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Output Enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Output Enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Output Enable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Output Enable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Output Enable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Output Enable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Output Enable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Output Enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Output Enable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Output Enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Output Enable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Output Enable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Output Enable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Output Enable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Output Enable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Output Enable</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Output Enable</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Output Enable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Output Enable</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Output Enable</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Output Enable</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Output Enable</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Output Enable</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Output Enable</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Output Enable</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Output Enable</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Output Enable</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Output Enable</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Output Enable</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Output Enable</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Output Enable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>ODR</name>
<description>Output Disable Register</description>
<addressOffset>0x00000014</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Output Disable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Output Disable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Output Disable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Output Disable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Output Disable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Output Disable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Output Disable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Output Disable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Output Disable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Output Disable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Output Disable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Output Disable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Output Disable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Output Disable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Output Disable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Output Disable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Output Disable</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Output Disable</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Output Disable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Output Disable</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Output Disable</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Output Disable</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Output Disable</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Output Disable</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Output Disable</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Output Disable</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Output Disable</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Output Disable</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Output Disable</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Output Disable</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Output Disable</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Output Disable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>OSR</name>
<description>Output Status Register</description>
<addressOffset>0x00000018</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>P0</name>
<description>Output Status</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P1</name>
<description>Output Status</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P2</name>
<description>Output Status</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P3</name>
<description>Output Status</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P4</name>
<description>Output Status</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P5</name>
<description>Output Status</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P6</name>
<description>Output Status</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P7</name>
<description>Output Status</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P8</name>
<description>Output Status</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P9</name>
<description>Output Status</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P10</name>
<description>Output Status</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P11</name>
<description>Output Status</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P12</name>
<description>Output Status</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P13</name>
<description>Output Status</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P14</name>
<description>Output Status</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P15</name>
<description>Output Status</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P16</name>
<description>Output Status</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P17</name>
<description>Output Status</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P18</name>
<description>Output Status</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P19</name>
<description>Output Status</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P20</name>
<description>Output Status</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P21</name>
<description>Output Status</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P22</name>
<description>Output Status</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P23</name>
<description>Output Status</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P24</name>
<description>Output Status</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P25</name>
<description>Output Status</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P26</name>
<description>Output Status</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P27</name>
<description>Output Status</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P28</name>
<description>Output Status</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P29</name>
<description>Output Status</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P30</name>
<description>Output Status</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P31</name>
<description>Output Status</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>IFER</name>
<description>Glitch Input Filter Enable Register</description>
<addressOffset>0x00000020</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Input Filter Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Input Filter Enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Input Filter Enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Input Filter Enable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Input Filter Enable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Input Filter Enable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Input Filter Enable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Input Filter Enable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Input Filter Enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Input Filter Enable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Input Filter Enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Input Filter Enable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Input Filter Enable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Input Filter Enable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Input Filter Enable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Input Filter Enable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Input Filter Enable</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Input Filter Enable</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Input Filter Enable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Input Filter Enable</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Input Filter Enable</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Input Filter Enable</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Input Filter Enable</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Input Filter Enable</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Input Filter Enable</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Input Filter Enable</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Input Filter Enable</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Input Filter Enable</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Input Filter Enable</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Input Filter Enable</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Input Filter Enable</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Input Filter Enable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IFDR</name>
<description>Glitch Input Filter Disable Register</description>
<addressOffset>0x00000024</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Input Filter Disable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Input Filter Disable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Input Filter Disable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Input Filter Disable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Input Filter Disable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Input Filter Disable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Input Filter Disable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Input Filter Disable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Input Filter Disable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Input Filter Disable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Input Filter Disable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Input Filter Disable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Input Filter Disable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Input Filter Disable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Input Filter Disable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Input Filter Disable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Input Filter Disable</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Input Filter Disable</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Input Filter Disable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Input Filter Disable</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Input Filter Disable</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Input Filter Disable</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Input Filter Disable</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Input Filter Disable</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Input Filter Disable</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Input Filter Disable</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Input Filter Disable</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Input Filter Disable</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Input Filter Disable</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Input Filter Disable</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Input Filter Disable</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Input Filter Disable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IFSR</name>
<description>Glitch Input Filter Status Register</description>
<addressOffset>0x00000028</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>P0</name>
<description>Input Filer Status</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P1</name>
<description>Input Filer Status</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P2</name>
<description>Input Filer Status</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P3</name>
<description>Input Filer Status</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P4</name>
<description>Input Filer Status</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P5</name>
<description>Input Filer Status</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P6</name>
<description>Input Filer Status</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P7</name>
<description>Input Filer Status</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P8</name>
<description>Input Filer Status</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P9</name>
<description>Input Filer Status</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P10</name>
<description>Input Filer Status</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P11</name>
<description>Input Filer Status</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P12</name>
<description>Input Filer Status</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P13</name>
<description>Input Filer Status</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P14</name>
<description>Input Filer Status</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P15</name>
<description>Input Filer Status</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P16</name>
<description>Input Filer Status</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P17</name>
<description>Input Filer Status</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P18</name>
<description>Input Filer Status</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P19</name>
<description>Input Filer Status</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P20</name>
<description>Input Filer Status</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P21</name>
<description>Input Filer Status</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P22</name>
<description>Input Filer Status</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P23</name>
<description>Input Filer Status</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P24</name>
<description>Input Filer Status</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P25</name>
<description>Input Filer Status</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P26</name>
<description>Input Filer Status</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P27</name>
<description>Input Filer Status</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P28</name>
<description>Input Filer Status</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P29</name>
<description>Input Filer Status</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P30</name>
<description>Input Filer Status</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P31</name>
<description>Input Filer Status</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>SODR</name>
<description>Set Output Data Register</description>
<addressOffset>0x00000030</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Set Output Data</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Set Output Data</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Set Output Data</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Set Output Data</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Set Output Data</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Set Output Data</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Set Output Data</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Set Output Data</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Set Output Data</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Set Output Data</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Set Output Data</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Set Output Data</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Set Output Data</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Set Output Data</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Set Output Data</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Set Output Data</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Set Output Data</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Set Output Data</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Set Output Data</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Set Output Data</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Set Output Data</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Set Output Data</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Set Output Data</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Set Output Data</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Set Output Data</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Set Output Data</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Set Output Data</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Set Output Data</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Set Output Data</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Set Output Data</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Set Output Data</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Set Output Data</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>CODR</name>
<description>Clear Output Data Register</description>
<addressOffset>0x00000034</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Clear Output Data</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Clear Output Data</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Clear Output Data</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Clear Output Data</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Clear Output Data</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Clear Output Data</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Clear Output Data</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Clear Output Data</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Clear Output Data</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Clear Output Data</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Clear Output Data</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Clear Output Data</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Clear Output Data</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Clear Output Data</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Clear Output Data</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Clear Output Data</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Clear Output Data</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Clear Output Data</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Clear Output Data</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Clear Output Data</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Clear Output Data</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Clear Output Data</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Clear Output Data</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Clear Output Data</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Clear Output Data</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Clear Output Data</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Clear Output Data</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Clear Output Data</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Clear Output Data</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Clear Output Data</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Clear Output Data</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Clear Output Data</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>ODSR</name>
<description>Output Data Status Register</description>
<addressOffset>0x00000038</addressOffset>
<size>32</size>
<access>read-write</access>
<fields>
<field>
<name>P0</name>
<description>Output Data Status</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P1</name>
<description>Output Data Status</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P2</name>
<description>Output Data Status</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P3</name>
<description>Output Data Status</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P4</name>
<description>Output Data Status</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P5</name>
<description>Output Data Status</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P6</name>
<description>Output Data Status</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P7</name>
<description>Output Data Status</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P8</name>
<description>Output Data Status</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P9</name>
<description>Output Data Status</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P10</name>
<description>Output Data Status</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P11</name>
<description>Output Data Status</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P12</name>
<description>Output Data Status</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P13</name>
<description>Output Data Status</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P14</name>
<description>Output Data Status</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P15</name>
<description>Output Data Status</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P16</name>
<description>Output Data Status</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P17</name>
<description>Output Data Status</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P18</name>
<description>Output Data Status</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P19</name>
<description>Output Data Status</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P20</name>
<description>Output Data Status</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P21</name>
<description>Output Data Status</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P22</name>
<description>Output Data Status</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P23</name>
<description>Output Data Status</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P24</name>
<description>Output Data Status</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P25</name>
<description>Output Data Status</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P26</name>
<description>Output Data Status</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P27</name>
<description>Output Data Status</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P28</name>
<description>Output Data Status</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P29</name>
<description>Output Data Status</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P30</name>
<description>Output Data Status</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P31</name>
<description>Output Data Status</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>PDSR</name>
<description>Pin Data Status Register</description>
<addressOffset>0x0000003C</addressOffset>
<size>32</size>
<access>read-only</access>
<fields>
<field>
<name>P0</name>
<description>Output Data Status</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P1</name>
<description>Output Data Status</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P2</name>
<description>Output Data Status</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P3</name>
<description>Output Data Status</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P4</name>
<description>Output Data Status</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P5</name>
<description>Output Data Status</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P6</name>
<description>Output Data Status</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P7</name>
<description>Output Data Status</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P8</name>
<description>Output Data Status</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P9</name>
<description>Output Data Status</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P10</name>
<description>Output Data Status</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P11</name>
<description>Output Data Status</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P12</name>
<description>Output Data Status</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P13</name>
<description>Output Data Status</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P14</name>
<description>Output Data Status</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P15</name>
<description>Output Data Status</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P16</name>
<description>Output Data Status</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P17</name>
<description>Output Data Status</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P18</name>
<description>Output Data Status</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P19</name>
<description>Output Data Status</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P20</name>
<description>Output Data Status</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P21</name>
<description>Output Data Status</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P22</name>
<description>Output Data Status</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P23</name>
<description>Output Data Status</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P24</name>
<description>Output Data Status</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P25</name>
<description>Output Data Status</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P26</name>
<description>Output Data Status</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P27</name>
<description>Output Data Status</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P28</name>
<description>Output Data Status</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P29</name>
<description>Output Data Status</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P30</name>
<description>Output Data Status</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P31</name>
<description>Output Data Status</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>IER</name>
<description>Interrupt Enable Register</description>
<addressOffset>0x00000040</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IDR</name>
<description>Interrupt Disable Register</description>
<addressOffset>0x00000044</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IMR</name>
<description>Interrupt Mask Register</description>
<addressOffset>0x00000048</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>P0</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P1</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P2</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P3</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P4</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P5</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P6</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P7</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P8</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P9</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P10</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P11</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P12</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P13</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P14</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P15</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P16</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P17</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P18</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P19</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P20</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P21</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P22</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P23</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P24</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P25</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P26</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P27</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P28</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P29</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P30</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P31</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>ISR</name>
<description>Interrupt Status Register</description>
<addressOffset>0x0000004C</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>P0</name>
<description>Input Change Interrupt Status</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P1</name>
<description>Input Change Interrupt Status</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P2</name>
<description>Input Change Interrupt Status</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P3</name>
<description>Input Change Interrupt Status</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P4</name>
<description>Input Change Interrupt Status</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P5</name>
<description>Input Change Interrupt Status</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P6</name>
<description>Input Change Interrupt Status</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P7</name>
<description>Input Change Interrupt Status</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P8</name>
<description>Input Change Interrupt Status</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P9</name>
<description>Input Change Interrupt Status</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P10</name>
<description>Input Change Interrupt Status</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P11</name>
<description>Input Change Interrupt Status</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P12</name>
<description>Input Change Interrupt Status</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P13</name>
<description>Input Change Interrupt Status</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P14</name>
<description>Input Change Interrupt Status</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P15</name>
<description>Input Change Interrupt Status</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P16</name>
<description>Input Change Interrupt Status</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P17</name>
<description>Input Change Interrupt Status</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P18</name>
<description>Input Change Interrupt Status</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P19</name>
<description>Input Change Interrupt Status</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P20</name>
<description>Input Change Interrupt Status</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P21</name>
<description>Input Change Interrupt Status</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P22</name>
<description>Input Change Interrupt Status</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P23</name>
<description>Input Change Interrupt Status</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P24</name>
<description>Input Change Interrupt Status</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P25</name>
<description>Input Change Interrupt Status</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P26</name>
<description>Input Change Interrupt Status</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P27</name>
<description>Input Change Interrupt Status</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P28</name>
<description>Input Change Interrupt Status</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P29</name>
<description>Input Change Interrupt Status</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P30</name>
<description>Input Change Interrupt Status</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P31</name>
<description>Input Change Interrupt Status</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>MDER</name>
<description>Multi-driver Enable Register</description>
<addressOffset>0x00000050</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Multi Drive Enable.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Multi Drive Enable.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Multi Drive Enable.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Multi Drive Enable.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Multi Drive Enable.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Multi Drive Enable.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Multi Drive Enable.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Multi Drive Enable.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Multi Drive Enable.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Multi Drive Enable.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Multi Drive Enable.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Multi Drive Enable.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Multi Drive Enable.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Multi Drive Enable.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Multi Drive Enable.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Multi Drive Enable.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Multi Drive Enable.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Multi Drive Enable.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Multi Drive Enable.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Multi Drive Enable.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Multi Drive Enable.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Multi Drive Enable.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Multi Drive Enable.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Multi Drive Enable.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Multi Drive Enable.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Multi Drive Enable.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Multi Drive Enable.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Multi Drive Enable.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Multi Drive Enable.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Multi Drive Enable.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Multi Drive Enable.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Multi Drive Enable.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>MDDR</name>
<description>Multi-driver Disable Register</description>
<addressOffset>0x00000054</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Multi Drive Disable.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Multi Drive Disable.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Multi Drive Disable.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Multi Drive Disable.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Multi Drive Disable.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Multi Drive Disable.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Multi Drive Disable.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Multi Drive Disable.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Multi Drive Disable.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Multi Drive Disable.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Multi Drive Disable.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Multi Drive Disable.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Multi Drive Disable.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Multi Drive Disable.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Multi Drive Disable.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Multi Drive Disable.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Multi Drive Disable.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Multi Drive Disable.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Multi Drive Disable.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Multi Drive Disable.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Multi Drive Disable.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Multi Drive Disable.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Multi Drive Disable.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Multi Drive Disable.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Multi Drive Disable.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Multi Drive Disable.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Multi Drive Disable.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Multi Drive Disable.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Multi Drive Disable.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Multi Drive Disable.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Multi Drive Disable.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Multi Drive Disable.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>MDSR</name>
<description>Multi-driver Status Register</description>
<addressOffset>0x00000058</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>P0</name>
<description>Multi Drive Status.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P1</name>
<description>Multi Drive Status.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P2</name>
<description>Multi Drive Status.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P3</name>
<description>Multi Drive Status.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P4</name>
<description>Multi Drive Status.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P5</name>
<description>Multi Drive Status.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P6</name>
<description>Multi Drive Status.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P7</name>
<description>Multi Drive Status.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P8</name>
<description>Multi Drive Status.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P9</name>
<description>Multi Drive Status.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P10</name>
<description>Multi Drive Status.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P11</name>
<description>Multi Drive Status.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P12</name>
<description>Multi Drive Status.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P13</name>
<description>Multi Drive Status.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P14</name>
<description>Multi Drive Status.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P15</name>
<description>Multi Drive Status.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P16</name>
<description>Multi Drive Status.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P17</name>
<description>Multi Drive Status.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P18</name>
<description>Multi Drive Status.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P19</name>
<description>Multi Drive Status.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P20</name>
<description>Multi Drive Status.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P21</name>
<description>Multi Drive Status.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P22</name>
<description>Multi Drive Status.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P23</name>
<description>Multi Drive Status.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P24</name>
<description>Multi Drive Status.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P25</name>
<description>Multi Drive Status.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P26</name>
<description>Multi Drive Status.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P27</name>
<description>Multi Drive Status.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P28</name>
<description>Multi Drive Status.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P29</name>
<description>Multi Drive Status.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P30</name>
<description>Multi Drive Status.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P31</name>
<description>Multi Drive Status.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>PUDR</name>
<description>Pull-up Disable Register</description>
<addressOffset>0x00000060</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Pull Up Disable.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Pull Up Disable.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Pull Up Disable.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Pull Up Disable.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Pull Up Disable.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Pull Up Disable.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Pull Up Disable.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Pull Up Disable.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Pull Up Disable.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Pull Up Disable.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Pull Up Disable.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Pull Up Disable.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Pull Up Disable.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Pull Up Disable.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Pull Up Disable.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Pull Up Disable.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Pull Up Disable.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Pull Up Disable.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Pull Up Disable.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Pull Up Disable.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Pull Up Disable.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Pull Up Disable.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Pull Up Disable.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Pull Up Disable.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Pull Up Disable.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Pull Up Disable.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Pull Up Disable.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Pull Up Disable.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Pull Up Disable.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Pull Up Disable.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Pull Up Disable.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Pull Up Disable.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>PUER</name>
<description>Pull-up Enable Register</description>
<addressOffset>0x00000064</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Pull Up Enable.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Pull Up Enable.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Pull Up Enable.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Pull Up Enable.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Pull Up Enable.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Pull Up Enable.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Pull Up Enable.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Pull Up Enable.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Pull Up Enable.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Pull Up Enable.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Pull Up Enable.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Pull Up Enable.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Pull Up Enable.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Pull Up Enable.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Pull Up Enable.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Pull Up Enable.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Pull Up Enable.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Pull Up Enable.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Pull Up Enable.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Pull Up Enable.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Pull Up Enable.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Pull Up Enable.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Pull Up Enable.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Pull Up Enable.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Pull Up Enable.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Pull Up Enable.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Pull Up Enable.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Pull Up Enable.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Pull Up Enable.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Pull Up Enable.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Pull Up Enable.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Pull Up Enable.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>PUSR</name>
<description>Pad Pull-up Status Register</description>
<addressOffset>0x00000068</addressOffset>
<size>32</size>
<access>read-only</access>
<fields>
<field>
<name>P0</name>
<description>Pull Up Status.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P1</name>
<description>Pull Up Status.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P2</name>
<description>Pull Up Status.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P3</name>
<description>Pull Up Status.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P4</name>
<description>Pull Up Status.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P5</name>
<description>Pull Up Status.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P6</name>
<description>Pull Up Status.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P7</name>
<description>Pull Up Status.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P8</name>
<description>Pull Up Status.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P9</name>
<description>Pull Up Status.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P10</name>
<description>Pull Up Status.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P11</name>
<description>Pull Up Status.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P12</name>
<description>Pull Up Status.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P13</name>
<description>Pull Up Status.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P14</name>
<description>Pull Up Status.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P15</name>
<description>Pull Up Status.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P16</name>
<description>Pull Up Status.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P17</name>
<description>Pull Up Status.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P18</name>
<description>Pull Up Status.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P19</name>
<description>Pull Up Status.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P20</name>
<description>Pull Up Status.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P21</name>
<description>Pull Up Status.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P22</name>
<description>Pull Up Status.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P23</name>
<description>Pull Up Status.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P24</name>
<description>Pull Up Status.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P25</name>
<description>Pull Up Status.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P26</name>
<description>Pull Up Status.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P27</name>
<description>Pull Up Status.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P28</name>
<description>Pull Up Status.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P29</name>
<description>Pull Up Status.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P30</name>
<description>Pull Up Status.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P31</name>
<description>Pull Up Status.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<dim>2</dim>
<dimIncrement>4</dimIncrement>
<dimIndex>0-1</dimIndex>
<name>ABCDSR[%s]</name>
<description>Peripheral Select Register</description>
<addressOffset>0x00000070</addressOffset>
<size>32</size>
<access>read-write</access>
<fields>
<field>
<name>P0</name>
<description>Peripheral Select.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P1</name>
<description>Peripheral Select.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P2</name>
<description>Peripheral Select.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P3</name>
<description>Peripheral Select.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P4</name>
<description>Peripheral Select.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P5</name>
<description>Peripheral Select.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P6</name>
<description>Peripheral Select.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P7</name>
<description>Peripheral Select.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P8</name>
<description>Peripheral Select.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P9</name>
<description>Peripheral Select.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P10</name>
<description>Peripheral Select.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P11</name>
<description>Peripheral Select.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P12</name>
<description>Peripheral Select.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P13</name>
<description>Peripheral Select.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P14</name>
<description>Peripheral Select.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P15</name>
<description>Peripheral Select.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P16</name>
<description>Peripheral Select.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P17</name>
<description>Peripheral Select.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P18</name>
<description>Peripheral Select.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P19</name>
<description>Peripheral Select.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P20</name>
<description>Peripheral Select.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P21</name>
<description>Peripheral Select.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P22</name>
<description>Peripheral Select.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P23</name>
<description>Peripheral Select.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P24</name>
<description>Peripheral Select.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P25</name>
<description>Peripheral Select.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P26</name>
<description>Peripheral Select.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P27</name>
<description>Peripheral Select.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P28</name>
<description>Peripheral Select.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P29</name>
<description>Peripheral Select.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P30</name>
<description>Peripheral Select.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P31</name>
<description>Peripheral Select.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>IFSCDR</name>
<description>Input Filter Slow Clock Disable Register</description>
<addressOffset>0x00000080</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IFSCER</name>
<description>Input Filter Slow Clock Enable Register</description>
<addressOffset>0x00000084</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IFSCSR</name>
<description>Input Filter Slow Clock Status Register</description>
<addressOffset>0x00000088</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>P0</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P1</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P2</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P3</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P4</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P5</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P6</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P7</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P8</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P9</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P10</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P11</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P12</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P13</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P14</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P15</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P16</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P17</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P18</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P19</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P20</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P21</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P22</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P23</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P24</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P25</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P26</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P27</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P28</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P29</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P30</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P31</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>SCDR</name>
<description>Slow Clock Divider Debouncing Register</description>
<addressOffset>0x0000008C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DIV</name>
<bitOffset>0</bitOffset>
<bitWidth>14</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>PPDDR</name>
<description>Pad Pull-down Disable Register</description>
<addressOffset>0x00000090</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Pull Down Disable.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Pull Down Disable.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Pull Down Disable.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Pull Down Disable.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Pull Down Disable.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Pull Down Disable.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Pull Down Disable.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Pull Down Disable.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Pull Down Disable.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Pull Down Disable.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Pull Down Disable.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Pull Down Disable.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Pull Down Disable.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Pull Down Disable.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Pull Down Disable.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Pull Down Disable.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Pull Down Disable.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Pull Down Disable.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Pull Down Disable.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Pull Down Disable.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Pull Down Disable.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Pull Down Disable.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Pull Down Disable.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Pull Down Disable.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Pull Down Disable.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Pull Down Disable.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Pull Down Disable.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Pull Down Disable.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Pull Down Disable.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Pull Down Disable.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Pull Down Disable.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Pull Down Disable.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>PPDER</name>
<description>Pad Pull-down Enable Register</description>
<addressOffset>0x00000094</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Pull Down Enable.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Pull Down Enable.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Pull Down Enable.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Pull Down Enable.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Pull Down Enable.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Pull Down Enable.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Pull Down Enable.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Pull Down Enable.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Pull Down Enable.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Pull Down Enable.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Pull Down Enable.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Pull Down Enable.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Pull Down Enable.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Pull Down Enable.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Pull Down Enable.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Pull Down Enable.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Pull Down Enable.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Pull Down Enable.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Pull Down Enable.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Pull Down Enable.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Pull Down Enable.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Pull Down Enable.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Pull Down Enable.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Pull Down Enable.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Pull Down Enable.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Pull Down Enable.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Pull Down Enable.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Pull Down Enable.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Pull Down Enable.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Pull Down Enable.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Pull Down Enable.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Pull Down Enable.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>PPDSR</name>
<description>Pad Pull-down Status Register</description>
<addressOffset>0x00000098</addressOffset>
<size>32</size>
<access>read-only</access>
<fields>
<field>
<name>P0</name>
<description>Pull Down Status.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P1</name>
<description>Pull Down Status.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P2</name>
<description>Pull Down Status.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P3</name>
<description>Pull Down Status.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P4</name>
<description>Pull Down Status.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P5</name>
<description>Pull Down Status.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P6</name>
<description>Pull Down Status.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P7</name>
<description>Pull Down Status.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P8</name>
<description>Pull Down Status.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P9</name>
<description>Pull Down Status.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P10</name>
<description>Pull Down Status.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P11</name>
<description>Pull Down Status.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P12</name>
<description>Pull Down Status.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P13</name>
<description>Pull Down Status.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P14</name>
<description>Pull Down Status.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P15</name>
<description>Pull Down Status.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P16</name>
<description>Pull Down Status.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P17</name>
<description>Pull Down Status.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P18</name>
<description>Pull Down Status.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P19</name>
<description>Pull Down Status.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P20</name>
<description>Pull Down Status.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P21</name>
<description>Pull Down Status.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P22</name>
<description>Pull Down Status.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P23</name>
<description>Pull Down Status.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P24</name>
<description>Pull Down Status.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P25</name>
<description>Pull Down Status.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P26</name>
<description>Pull Down Status.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P27</name>
<description>Pull Down Status.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P28</name>
<description>Pull Down Status.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P29</name>
<description>Pull Down Status.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P30</name>
<description>Pull Down Status.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P31</name>
<description>Pull Down Status.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>OWER</name>
<description>Output Write Enable</description>
<addressOffset>0x000000A0</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Output Write Enable.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Output Write Enable.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Output Write Enable.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Output Write Enable.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Output Write Enable.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Output Write Enable.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Output Write Enable.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Output Write Enable.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Output Write Enable.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Output Write Enable.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Output Write Enable.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Output Write Enable.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Output Write Enable.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Output Write Enable.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Output Write Enable.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Output Write Enable.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Output Write Enable.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Output Write Enable.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Output Write Enable.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Output Write Enable.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Output Write Enable.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Output Write Enable.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Output Write Enable.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Output Write Enable.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Output Write Enable.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Output Write Enable.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Output Write Enable.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Output Write Enable.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Output Write Enable.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Output Write Enable.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Output Write Enable.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Output Write Enable.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>OWDR</name>
<description>Output Write Disable</description>
<addressOffset>0x000000A4</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Output Write Disable.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Output Write Disable.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Output Write Disable.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Output Write Disable.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Output Write Disable.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Output Write Disable.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Output Write Disable.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Output Write Disable.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Output Write Disable.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Output Write Disable.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Output Write Disable.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Output Write Disable.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Output Write Disable.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Output Write Disable.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Output Write Disable.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Output Write Disable.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Output Write Disable.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Output Write Disable.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Output Write Disable.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Output Write Disable.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Output Write Disable.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Output Write Disable.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Output Write Disable.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Output Write Disable.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Output Write Disable.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Output Write Disable.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Output Write Disable.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Output Write Disable.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Output Write Disable.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Output Write Disable.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Output Write Disable.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Output Write Disable.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>OWSR</name>
<description>Output Write Status Register</description>
<addressOffset>0x000000A8</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>P0</name>
<description>Output Write Status.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P1</name>
<description>Output Write Status.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P2</name>
<description>Output Write Status.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P3</name>
<description>Output Write Status.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P4</name>
<description>Output Write Status.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P5</name>
<description>Output Write Status.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P6</name>
<description>Output Write Status.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P7</name>
<description>Output Write Status.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P8</name>
<description>Output Write Status.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P9</name>
<description>Output Write Status.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P10</name>
<description>Output Write Status.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P11</name>
<description>Output Write Status.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P12</name>
<description>Output Write Status.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P13</name>
<description>Output Write Status.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P14</name>
<description>Output Write Status.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P15</name>
<description>Output Write Status.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P16</name>
<description>Output Write Status.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P17</name>
<description>Output Write Status.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P18</name>
<description>Output Write Status.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P19</name>
<description>Output Write Status.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P20</name>
<description>Output Write Status.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P21</name>
<description>Output Write Status.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P22</name>
<description>Output Write Status.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P23</name>
<description>Output Write Status.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P24</name>
<description>Output Write Status.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P25</name>
<description>Output Write Status.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P26</name>
<description>Output Write Status.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P27</name>
<description>Output Write Status.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P28</name>
<description>Output Write Status.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P29</name>
<description>Output Write Status.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P30</name>
<description>Output Write Status.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P31</name>
<description>Output Write Status.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>AIMER</name>
<description>Additional Interrupt Modes Enable Register</description>
<addressOffset>0x000000B0</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>AIMDR</name>
<description>Additional Interrupt Modes Disables Register</description>
<addressOffset>0x000000B4</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>AIMMR</name>
<description>Additional Interrupt Modes Mask Register</description>
<addressOffset>0x000000B8</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>P0</name>
<description>Peripheral CD Status.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P1</name>
<description>Peripheral CD Status.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P2</name>
<description>Peripheral CD Status.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P3</name>
<description>Peripheral CD Status.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P4</name>
<description>Peripheral CD Status.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P5</name>
<description>Peripheral CD Status.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P6</name>
<description>Peripheral CD Status.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P7</name>
<description>Peripheral CD Status.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P8</name>
<description>Peripheral CD Status.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P9</name>
<description>Peripheral CD Status.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P10</name>
<description>Peripheral CD Status.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P11</name>
<description>Peripheral CD Status.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P12</name>
<description>Peripheral CD Status.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P13</name>
<description>Peripheral CD Status.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P14</name>
<description>Peripheral CD Status.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P15</name>
<description>Peripheral CD Status.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P16</name>
<description>Peripheral CD Status.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P17</name>
<description>Peripheral CD Status.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P18</name>
<description>Peripheral CD Status.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P19</name>
<description>Peripheral CD Status.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P20</name>
<description>Peripheral CD Status.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P21</name>
<description>Peripheral CD Status.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P22</name>
<description>Peripheral CD Status.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P23</name>
<description>Peripheral CD Status.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P24</name>
<description>Peripheral CD Status.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P25</name>
<description>Peripheral CD Status.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P26</name>
<description>Peripheral CD Status.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P27</name>
<description>Peripheral CD Status.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P28</name>
<description>Peripheral CD Status.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P29</name>
<description>Peripheral CD Status.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P30</name>
<description>Peripheral CD Status.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P31</name>
<description>Peripheral CD Status.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>ESR</name>
<description>Edge Select Register</description>
<addressOffset>0x000000C0</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>LSR</name>
<description>Level Select Register</description>
<addressOffset>0x000000C4</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Level Interrupt Selection.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Level Interrupt Selection.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Level Interrupt Selection.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Level Interrupt Selection.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Level Interrupt Selection.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Level Interrupt Selection.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Level Interrupt Selection.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Level Interrupt Selection.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Level Interrupt Selection.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Level Interrupt Selection.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Level Interrupt Selection.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Level Interrupt Selection.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Level Interrupt Selection.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Level Interrupt Selection.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Level Interrupt Selection.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Level Interrupt Selection.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Level Interrupt Selection.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Level Interrupt Selection.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Level Interrupt Selection.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Level Interrupt Selection.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Level Interrupt Selection.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Level Interrupt Selection.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Level Interrupt Selection.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Level Interrupt Selection.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Level Interrupt Selection.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Level Interrupt Selection.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Level Interrupt Selection.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Level Interrupt Selection.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Level Interrupt Selection.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Level Interrupt Selection.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Level Interrupt Selection.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Level Interrupt Selection.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>ELSR</name>
<description>Edge/Level Status Register</description>
<addressOffset>0x000000C8</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>P0</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P1</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P2</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P3</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P4</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P5</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P6</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P7</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P8</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P9</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P10</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P11</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P12</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P13</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P14</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P15</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P16</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P17</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P18</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P19</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P20</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P21</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P22</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P23</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P24</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P25</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P26</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P27</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P28</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P29</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P30</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P31</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>FELLSR</name>
<description>Falling Edge/Low Level Select Register</description>
<addressOffset>0x000000D0</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>REHLSR</name>
<description>Rising Edge/ High Level Select Register</description>
<addressOffset>0x000000D4</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>FRLHSR</name>
<description>Fall/Rise - Low/High Status Register</description>
<addressOffset>0x000000D8</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>P0</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P1</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P2</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P3</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P4</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P5</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P6</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P7</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P8</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P9</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P10</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P11</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P12</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P13</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P14</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P15</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P16</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P17</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P18</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P19</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P20</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P21</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P22</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P23</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P24</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P25</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P26</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P27</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P28</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P29</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P30</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P31</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>LOCKSR</name>
<description>Lock Status</description>
<addressOffset>0x000000E0</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>P0</name>
<description>Lock Status.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P1</name>
<description>Lock Status.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P2</name>
<description>Lock Status.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P3</name>
<description>Lock Status.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P4</name>
<description>Lock Status.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P5</name>
<description>Lock Status.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P6</name>
<description>Lock Status.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P7</name>
<description>Lock Status.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P8</name>
<description>Lock Status.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P9</name>
<description>Lock Status.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P10</name>
<description>Lock Status.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P11</name>
<description>Lock Status.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P12</name>
<description>Lock Status.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P13</name>
<description>Lock Status.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P14</name>
<description>Lock Status.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P15</name>
<description>Lock Status.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P16</name>
<description>Lock Status.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P17</name>
<description>Lock Status.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P18</name>
<description>Lock Status.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P19</name>
<description>Lock Status.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P20</name>
<description>Lock Status.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P21</name>
<description>Lock Status.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P22</name>
<description>Lock Status.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P23</name>
<description>Lock Status.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P24</name>
<description>Lock Status.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P25</name>
<description>Lock Status.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P26</name>
<description>Lock Status.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P27</name>
<description>Lock Status.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P28</name>
<description>Lock Status.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P29</name>
<description>Lock Status.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P30</name>
<description>Lock Status.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P31</name>
<description>Lock Status.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>WPMR</name>
<description>Write Protect Mode Register</description>
<addressOffset>0x000000E4</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>WPEN</name>
<description>Write Protect Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>WPKEY</name>
<description>Write Protect KEY</description>
<bitOffset>8</bitOffset>
<bitWidth>24</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>WPSR</name>
<description>Write Protect Status Register</description>
<addressOffset>0x000000E8</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>WPVS</name>
<description>Write Protect Violation Status</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>WPVSRC</name>
<description>Write Protect Violation Source</description>
<bitOffset>8</bitOffset>
<bitWidth>16</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>SCHMITT</name>
<description>Schmitt Trigger Register</description>
<addressOffset>0x00000100</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SCHMITT0</name>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT1</name>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT2</name>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT3</name>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT4</name>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT5</name>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT6</name>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT7</name>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT8</name>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT9</name>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT10</name>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT11</name>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT12</name>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT13</name>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT14</name>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT15</name>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT16</name>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT17</name>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT18</name>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT19</name>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT20</name>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT21</name>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT22</name>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT23</name>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT24</name>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT25</name>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT26</name>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT27</name>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT28</name>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT29</name>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT30</name>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT31</name>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DRIVER1</name>
<description>I/O Drive Register 1</description>
<addressOffset>0x00000118</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>LINE0</name>
<description>Drive of PIO Line 0</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE1</name>
<description>Drive of PIO Line 1</description>
<bitOffset>2</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE2</name>
<description>Drive of PIO Line 2</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE3</name>
<description>Drive of PIO Line 3</description>
<bitOffset>6</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE4</name>
<description>Drive of PIO Line 4</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE5</name>
<description>Drive of PIO Line 5</description>
<bitOffset>10</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE6</name>
<description>Drive of PIO Line 6</description>
<bitOffset>12</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE7</name>
<description>Drive of PIO Line 7</description>
<bitOffset>14</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE8</name>
<description>Drive of PIO Line 8</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE9</name>
<description>Drive of PIO Line 9</description>
<bitOffset>18</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE10</name>
<description>Drive of PIO Line 10</description>
<bitOffset>20</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE11</name>
<description>Drive of PIO Line 11</description>
<bitOffset>22</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE12</name>
<description>Drive of PIO Line 12</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE13</name>
<description>Drive of PIO Line 13</description>
<bitOffset>26</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE14</name>
<description>Drive of PIO Line 14</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE15</name>
<description>Drive of PIO Line 15</description>
<bitOffset>30</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>DRIVER2</name>
<description>I/O Drive Register 2</description>
<addressOffset>0x0000011C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>LINE16</name>
<description>Drive of PIO line 16</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE17</name>
<description>Drive of PIO line 17</description>
<bitOffset>2</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE18</name>
<description>Drive of PIO line 18</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE19</name>
<description>Drive of PIO line 19</description>
<bitOffset>6</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE20</name>
<description>Drive of PIO line 20</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE21</name>
<description>Drive of PIO line 21</description>
<bitOffset>10</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE22</name>
<description>Drive of PIO line 22</description>
<bitOffset>12</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE23</name>
<description>Drive of PIO line 23</description>
<bitOffset>14</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE24</name>
<description>Drive of PIO line 24</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE25</name>
<description>Drive of PIO line 25</description>
<bitOffset>18</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE26</name>
<description>Drive of PIO line 26</description>
<bitOffset>20</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE27</name>
<description>Drive of PIO line 27</description>
<bitOffset>22</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE28</name>
<description>Drive of PIO line 28</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE29</name>
<description>Drive of PIO line 29</description>
<bitOffset>26</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE30</name>
<description>Drive of PIO line 30</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE31</name>
<description>Drive of PIO line 31</description>
<bitOffset>30</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>PIOB</name>
<version>11004H</version>
<description>Parallel Input/Output Controller B</description>
<groupName>PIO</groupName>
<prependToName>PIOB_</prependToName>
<baseAddress>0xFFFFF400</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x200</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>PIOB</name>
<value>7</value>
</interrupt>
<registers>
<register>
<name>PER</name>
<description>PIO Enable Register</description>
<addressOffset>0x00000000</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>PIO Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>PIO Enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>PIO Enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>PIO Enable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>PIO Enable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>PIO Enable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>PIO Enable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>PIO Enable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>PIO Enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>PIO Enable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>PIO Enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>PIO Enable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>PIO Enable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>PIO Enable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>PIO Enable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>PIO Enable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>PIO Enable</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>PIO Enable</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>PIO Enable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>PIO Enable</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>PIO Enable</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>PIO Enable</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>PIO Enable</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>PIO Enable</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>PIO Enable</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>PIO Enable</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>PIO Enable</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>PIO Enable</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>PIO Enable</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>PIO Enable</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>PIO Enable</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>PIO Enable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>PDR</name>
<description>PIO Disable Register</description>
<addressOffset>0x00000004</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>PIO Disable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>PIO Disable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>PIO Disable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>PIO Disable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>PIO Disable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>PIO Disable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>PIO Disable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>PIO Disable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>PIO Disable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>PIO Disable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>PIO Disable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>PIO Disable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>PIO Disable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>PIO Disable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>PIO Disable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>PIO Disable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>PIO Disable</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>PIO Disable</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>PIO Disable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>PIO Disable</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>PIO Disable</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>PIO Disable</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>PIO Disable</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>PIO Disable</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>PIO Disable</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>PIO Disable</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>PIO Disable</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>PIO Disable</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>PIO Disable</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>PIO Disable</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>PIO Disable</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>PIO Disable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>PSR</name>
<description>PIO Status Register</description>
<addressOffset>0x00000008</addressOffset>
<size>32</size>
<access>read-only</access>
<fields>
<field>
<name>P0</name>
<description>PIO Status</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P1</name>
<description>PIO Status</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P2</name>
<description>PIO Status</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P3</name>
<description>PIO Status</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P4</name>
<description>PIO Status</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P5</name>
<description>PIO Status</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P6</name>
<description>PIO Status</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P7</name>
<description>PIO Status</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P8</name>
<description>PIO Status</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P9</name>
<description>PIO Status</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P10</name>
<description>PIO Status</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P11</name>
<description>PIO Status</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P12</name>
<description>PIO Status</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P13</name>
<description>PIO Status</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P14</name>
<description>PIO Status</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P15</name>
<description>PIO Status</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P16</name>
<description>PIO Status</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P17</name>
<description>PIO Status</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P18</name>
<description>PIO Status</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P19</name>
<description>PIO Status</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P20</name>
<description>PIO Status</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P21</name>
<description>PIO Status</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P22</name>
<description>PIO Status</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P23</name>
<description>PIO Status</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P24</name>
<description>PIO Status</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P25</name>
<description>PIO Status</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P26</name>
<description>PIO Status</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P27</name>
<description>PIO Status</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P28</name>
<description>PIO Status</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P29</name>
<description>PIO Status</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P30</name>
<description>PIO Status</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P31</name>
<description>PIO Status</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>OER</name>
<description>Output Enable Register</description>
<addressOffset>0x00000010</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Output Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Output Enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Output Enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Output Enable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Output Enable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Output Enable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Output Enable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Output Enable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Output Enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Output Enable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Output Enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Output Enable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Output Enable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Output Enable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Output Enable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Output Enable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Output Enable</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Output Enable</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Output Enable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Output Enable</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Output Enable</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Output Enable</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Output Enable</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Output Enable</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Output Enable</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Output Enable</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Output Enable</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Output Enable</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Output Enable</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Output Enable</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Output Enable</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Output Enable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>ODR</name>
<description>Output Disable Register</description>
<addressOffset>0x00000014</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Output Disable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Output Disable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Output Disable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Output Disable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Output Disable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Output Disable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Output Disable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Output Disable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Output Disable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Output Disable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Output Disable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Output Disable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Output Disable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Output Disable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Output Disable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Output Disable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Output Disable</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Output Disable</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Output Disable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Output Disable</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Output Disable</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Output Disable</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Output Disable</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Output Disable</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Output Disable</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Output Disable</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Output Disable</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Output Disable</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Output Disable</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Output Disable</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Output Disable</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Output Disable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>OSR</name>
<description>Output Status Register</description>
<addressOffset>0x00000018</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>P0</name>
<description>Output Status</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P1</name>
<description>Output Status</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P2</name>
<description>Output Status</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P3</name>
<description>Output Status</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P4</name>
<description>Output Status</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P5</name>
<description>Output Status</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P6</name>
<description>Output Status</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P7</name>
<description>Output Status</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P8</name>
<description>Output Status</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P9</name>
<description>Output Status</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P10</name>
<description>Output Status</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P11</name>
<description>Output Status</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P12</name>
<description>Output Status</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P13</name>
<description>Output Status</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P14</name>
<description>Output Status</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P15</name>
<description>Output Status</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P16</name>
<description>Output Status</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P17</name>
<description>Output Status</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P18</name>
<description>Output Status</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P19</name>
<description>Output Status</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P20</name>
<description>Output Status</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P21</name>
<description>Output Status</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P22</name>
<description>Output Status</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P23</name>
<description>Output Status</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P24</name>
<description>Output Status</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P25</name>
<description>Output Status</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P26</name>
<description>Output Status</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P27</name>
<description>Output Status</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P28</name>
<description>Output Status</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P29</name>
<description>Output Status</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P30</name>
<description>Output Status</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P31</name>
<description>Output Status</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>IFER</name>
<description>Glitch Input Filter Enable Register</description>
<addressOffset>0x00000020</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Input Filter Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Input Filter Enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Input Filter Enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Input Filter Enable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Input Filter Enable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Input Filter Enable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Input Filter Enable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Input Filter Enable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Input Filter Enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Input Filter Enable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Input Filter Enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Input Filter Enable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Input Filter Enable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Input Filter Enable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Input Filter Enable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Input Filter Enable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Input Filter Enable</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Input Filter Enable</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Input Filter Enable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Input Filter Enable</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Input Filter Enable</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Input Filter Enable</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Input Filter Enable</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Input Filter Enable</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Input Filter Enable</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Input Filter Enable</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Input Filter Enable</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Input Filter Enable</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Input Filter Enable</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Input Filter Enable</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Input Filter Enable</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Input Filter Enable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IFDR</name>
<description>Glitch Input Filter Disable Register</description>
<addressOffset>0x00000024</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Input Filter Disable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Input Filter Disable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Input Filter Disable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Input Filter Disable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Input Filter Disable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Input Filter Disable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Input Filter Disable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Input Filter Disable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Input Filter Disable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Input Filter Disable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Input Filter Disable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Input Filter Disable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Input Filter Disable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Input Filter Disable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Input Filter Disable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Input Filter Disable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Input Filter Disable</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Input Filter Disable</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Input Filter Disable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Input Filter Disable</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Input Filter Disable</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Input Filter Disable</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Input Filter Disable</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Input Filter Disable</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Input Filter Disable</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Input Filter Disable</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Input Filter Disable</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Input Filter Disable</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Input Filter Disable</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Input Filter Disable</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Input Filter Disable</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Input Filter Disable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IFSR</name>
<description>Glitch Input Filter Status Register</description>
<addressOffset>0x00000028</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>P0</name>
<description>Input Filer Status</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P1</name>
<description>Input Filer Status</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P2</name>
<description>Input Filer Status</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P3</name>
<description>Input Filer Status</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P4</name>
<description>Input Filer Status</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P5</name>
<description>Input Filer Status</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P6</name>
<description>Input Filer Status</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P7</name>
<description>Input Filer Status</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P8</name>
<description>Input Filer Status</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P9</name>
<description>Input Filer Status</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P10</name>
<description>Input Filer Status</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P11</name>
<description>Input Filer Status</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P12</name>
<description>Input Filer Status</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P13</name>
<description>Input Filer Status</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P14</name>
<description>Input Filer Status</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P15</name>
<description>Input Filer Status</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P16</name>
<description>Input Filer Status</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P17</name>
<description>Input Filer Status</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P18</name>
<description>Input Filer Status</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P19</name>
<description>Input Filer Status</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P20</name>
<description>Input Filer Status</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P21</name>
<description>Input Filer Status</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P22</name>
<description>Input Filer Status</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P23</name>
<description>Input Filer Status</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P24</name>
<description>Input Filer Status</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P25</name>
<description>Input Filer Status</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P26</name>
<description>Input Filer Status</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P27</name>
<description>Input Filer Status</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P28</name>
<description>Input Filer Status</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P29</name>
<description>Input Filer Status</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P30</name>
<description>Input Filer Status</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P31</name>
<description>Input Filer Status</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>SODR</name>
<description>Set Output Data Register</description>
<addressOffset>0x00000030</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Set Output Data</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Set Output Data</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Set Output Data</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Set Output Data</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Set Output Data</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Set Output Data</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Set Output Data</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Set Output Data</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Set Output Data</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Set Output Data</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Set Output Data</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Set Output Data</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Set Output Data</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Set Output Data</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Set Output Data</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Set Output Data</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Set Output Data</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Set Output Data</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Set Output Data</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Set Output Data</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Set Output Data</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Set Output Data</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Set Output Data</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Set Output Data</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Set Output Data</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Set Output Data</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Set Output Data</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Set Output Data</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Set Output Data</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Set Output Data</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Set Output Data</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Set Output Data</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>CODR</name>
<description>Clear Output Data Register</description>
<addressOffset>0x00000034</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Clear Output Data</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Clear Output Data</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Clear Output Data</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Clear Output Data</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Clear Output Data</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Clear Output Data</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Clear Output Data</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Clear Output Data</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Clear Output Data</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Clear Output Data</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Clear Output Data</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Clear Output Data</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Clear Output Data</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Clear Output Data</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Clear Output Data</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Clear Output Data</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Clear Output Data</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Clear Output Data</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Clear Output Data</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Clear Output Data</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Clear Output Data</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Clear Output Data</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Clear Output Data</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Clear Output Data</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Clear Output Data</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Clear Output Data</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Clear Output Data</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Clear Output Data</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Clear Output Data</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Clear Output Data</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Clear Output Data</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Clear Output Data</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>ODSR</name>
<description>Output Data Status Register</description>
<addressOffset>0x00000038</addressOffset>
<size>32</size>
<access>read-write</access>
<fields>
<field>
<name>P0</name>
<description>Output Data Status</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P1</name>
<description>Output Data Status</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P2</name>
<description>Output Data Status</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P3</name>
<description>Output Data Status</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P4</name>
<description>Output Data Status</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P5</name>
<description>Output Data Status</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P6</name>
<description>Output Data Status</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P7</name>
<description>Output Data Status</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P8</name>
<description>Output Data Status</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P9</name>
<description>Output Data Status</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P10</name>
<description>Output Data Status</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P11</name>
<description>Output Data Status</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P12</name>
<description>Output Data Status</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P13</name>
<description>Output Data Status</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P14</name>
<description>Output Data Status</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P15</name>
<description>Output Data Status</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P16</name>
<description>Output Data Status</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P17</name>
<description>Output Data Status</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P18</name>
<description>Output Data Status</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P19</name>
<description>Output Data Status</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P20</name>
<description>Output Data Status</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P21</name>
<description>Output Data Status</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P22</name>
<description>Output Data Status</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P23</name>
<description>Output Data Status</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P24</name>
<description>Output Data Status</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P25</name>
<description>Output Data Status</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P26</name>
<description>Output Data Status</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P27</name>
<description>Output Data Status</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P28</name>
<description>Output Data Status</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P29</name>
<description>Output Data Status</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P30</name>
<description>Output Data Status</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P31</name>
<description>Output Data Status</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>PDSR</name>
<description>Pin Data Status Register</description>
<addressOffset>0x0000003C</addressOffset>
<size>32</size>
<access>read-only</access>
<fields>
<field>
<name>P0</name>
<description>Output Data Status</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P1</name>
<description>Output Data Status</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P2</name>
<description>Output Data Status</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P3</name>
<description>Output Data Status</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P4</name>
<description>Output Data Status</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P5</name>
<description>Output Data Status</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P6</name>
<description>Output Data Status</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P7</name>
<description>Output Data Status</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P8</name>
<description>Output Data Status</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P9</name>
<description>Output Data Status</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P10</name>
<description>Output Data Status</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P11</name>
<description>Output Data Status</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P12</name>
<description>Output Data Status</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P13</name>
<description>Output Data Status</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P14</name>
<description>Output Data Status</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P15</name>
<description>Output Data Status</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P16</name>
<description>Output Data Status</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P17</name>
<description>Output Data Status</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P18</name>
<description>Output Data Status</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P19</name>
<description>Output Data Status</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P20</name>
<description>Output Data Status</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P21</name>
<description>Output Data Status</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P22</name>
<description>Output Data Status</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P23</name>
<description>Output Data Status</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P24</name>
<description>Output Data Status</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P25</name>
<description>Output Data Status</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P26</name>
<description>Output Data Status</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P27</name>
<description>Output Data Status</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P28</name>
<description>Output Data Status</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P29</name>
<description>Output Data Status</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P30</name>
<description>Output Data Status</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P31</name>
<description>Output Data Status</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>IER</name>
<description>Interrupt Enable Register</description>
<addressOffset>0x00000040</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IDR</name>
<description>Interrupt Disable Register</description>
<addressOffset>0x00000044</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IMR</name>
<description>Interrupt Mask Register</description>
<addressOffset>0x00000048</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>P0</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P1</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P2</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P3</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P4</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P5</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P6</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P7</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P8</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P9</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P10</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P11</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P12</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P13</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P14</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P15</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P16</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P17</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P18</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P19</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P20</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P21</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P22</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P23</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P24</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P25</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P26</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P27</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P28</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P29</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P30</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P31</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>ISR</name>
<description>Interrupt Status Register</description>
<addressOffset>0x0000004C</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>P0</name>
<description>Input Change Interrupt Status</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P1</name>
<description>Input Change Interrupt Status</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P2</name>
<description>Input Change Interrupt Status</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P3</name>
<description>Input Change Interrupt Status</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P4</name>
<description>Input Change Interrupt Status</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P5</name>
<description>Input Change Interrupt Status</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P6</name>
<description>Input Change Interrupt Status</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P7</name>
<description>Input Change Interrupt Status</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P8</name>
<description>Input Change Interrupt Status</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P9</name>
<description>Input Change Interrupt Status</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P10</name>
<description>Input Change Interrupt Status</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P11</name>
<description>Input Change Interrupt Status</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P12</name>
<description>Input Change Interrupt Status</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P13</name>
<description>Input Change Interrupt Status</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P14</name>
<description>Input Change Interrupt Status</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P15</name>
<description>Input Change Interrupt Status</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P16</name>
<description>Input Change Interrupt Status</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P17</name>
<description>Input Change Interrupt Status</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P18</name>
<description>Input Change Interrupt Status</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P19</name>
<description>Input Change Interrupt Status</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P20</name>
<description>Input Change Interrupt Status</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P21</name>
<description>Input Change Interrupt Status</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P22</name>
<description>Input Change Interrupt Status</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P23</name>
<description>Input Change Interrupt Status</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P24</name>
<description>Input Change Interrupt Status</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P25</name>
<description>Input Change Interrupt Status</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P26</name>
<description>Input Change Interrupt Status</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P27</name>
<description>Input Change Interrupt Status</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P28</name>
<description>Input Change Interrupt Status</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P29</name>
<description>Input Change Interrupt Status</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P30</name>
<description>Input Change Interrupt Status</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P31</name>
<description>Input Change Interrupt Status</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>MDER</name>
<description>Multi-driver Enable Register</description>
<addressOffset>0x00000050</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Multi Drive Enable.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Multi Drive Enable.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Multi Drive Enable.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Multi Drive Enable.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Multi Drive Enable.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Multi Drive Enable.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Multi Drive Enable.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Multi Drive Enable.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Multi Drive Enable.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Multi Drive Enable.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Multi Drive Enable.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Multi Drive Enable.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Multi Drive Enable.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Multi Drive Enable.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Multi Drive Enable.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Multi Drive Enable.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Multi Drive Enable.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Multi Drive Enable.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Multi Drive Enable.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Multi Drive Enable.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Multi Drive Enable.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Multi Drive Enable.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Multi Drive Enable.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Multi Drive Enable.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Multi Drive Enable.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Multi Drive Enable.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Multi Drive Enable.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Multi Drive Enable.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Multi Drive Enable.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Multi Drive Enable.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Multi Drive Enable.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Multi Drive Enable.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>MDDR</name>
<description>Multi-driver Disable Register</description>
<addressOffset>0x00000054</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Multi Drive Disable.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Multi Drive Disable.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Multi Drive Disable.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Multi Drive Disable.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Multi Drive Disable.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Multi Drive Disable.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Multi Drive Disable.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Multi Drive Disable.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Multi Drive Disable.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Multi Drive Disable.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Multi Drive Disable.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Multi Drive Disable.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Multi Drive Disable.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Multi Drive Disable.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Multi Drive Disable.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Multi Drive Disable.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Multi Drive Disable.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Multi Drive Disable.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Multi Drive Disable.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Multi Drive Disable.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Multi Drive Disable.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Multi Drive Disable.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Multi Drive Disable.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Multi Drive Disable.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Multi Drive Disable.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Multi Drive Disable.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Multi Drive Disable.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Multi Drive Disable.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Multi Drive Disable.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Multi Drive Disable.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Multi Drive Disable.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Multi Drive Disable.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>MDSR</name>
<description>Multi-driver Status Register</description>
<addressOffset>0x00000058</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>P0</name>
<description>Multi Drive Status.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P1</name>
<description>Multi Drive Status.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P2</name>
<description>Multi Drive Status.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P3</name>
<description>Multi Drive Status.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P4</name>
<description>Multi Drive Status.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P5</name>
<description>Multi Drive Status.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P6</name>
<description>Multi Drive Status.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P7</name>
<description>Multi Drive Status.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P8</name>
<description>Multi Drive Status.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P9</name>
<description>Multi Drive Status.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P10</name>
<description>Multi Drive Status.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P11</name>
<description>Multi Drive Status.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P12</name>
<description>Multi Drive Status.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P13</name>
<description>Multi Drive Status.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P14</name>
<description>Multi Drive Status.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P15</name>
<description>Multi Drive Status.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P16</name>
<description>Multi Drive Status.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P17</name>
<description>Multi Drive Status.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P18</name>
<description>Multi Drive Status.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P19</name>
<description>Multi Drive Status.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P20</name>
<description>Multi Drive Status.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P21</name>
<description>Multi Drive Status.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P22</name>
<description>Multi Drive Status.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P23</name>
<description>Multi Drive Status.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P24</name>
<description>Multi Drive Status.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P25</name>
<description>Multi Drive Status.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P26</name>
<description>Multi Drive Status.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P27</name>
<description>Multi Drive Status.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P28</name>
<description>Multi Drive Status.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P29</name>
<description>Multi Drive Status.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P30</name>
<description>Multi Drive Status.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P31</name>
<description>Multi Drive Status.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>PUDR</name>
<description>Pull-up Disable Register</description>
<addressOffset>0x00000060</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Pull Up Disable.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Pull Up Disable.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Pull Up Disable.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Pull Up Disable.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Pull Up Disable.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Pull Up Disable.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Pull Up Disable.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Pull Up Disable.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Pull Up Disable.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Pull Up Disable.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Pull Up Disable.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Pull Up Disable.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Pull Up Disable.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Pull Up Disable.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Pull Up Disable.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Pull Up Disable.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Pull Up Disable.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Pull Up Disable.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Pull Up Disable.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Pull Up Disable.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Pull Up Disable.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Pull Up Disable.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Pull Up Disable.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Pull Up Disable.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Pull Up Disable.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Pull Up Disable.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Pull Up Disable.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Pull Up Disable.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Pull Up Disable.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Pull Up Disable.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Pull Up Disable.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Pull Up Disable.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>PUER</name>
<description>Pull-up Enable Register</description>
<addressOffset>0x00000064</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Pull Up Enable.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Pull Up Enable.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Pull Up Enable.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Pull Up Enable.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Pull Up Enable.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Pull Up Enable.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Pull Up Enable.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Pull Up Enable.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Pull Up Enable.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Pull Up Enable.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Pull Up Enable.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Pull Up Enable.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Pull Up Enable.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Pull Up Enable.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Pull Up Enable.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Pull Up Enable.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Pull Up Enable.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Pull Up Enable.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Pull Up Enable.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Pull Up Enable.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Pull Up Enable.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Pull Up Enable.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Pull Up Enable.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Pull Up Enable.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Pull Up Enable.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Pull Up Enable.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Pull Up Enable.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Pull Up Enable.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Pull Up Enable.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Pull Up Enable.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Pull Up Enable.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Pull Up Enable.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>PUSR</name>
<description>Pad Pull-up Status Register</description>
<addressOffset>0x00000068</addressOffset>
<size>32</size>
<access>read-only</access>
<fields>
<field>
<name>P0</name>
<description>Pull Up Status.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P1</name>
<description>Pull Up Status.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P2</name>
<description>Pull Up Status.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P3</name>
<description>Pull Up Status.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P4</name>
<description>Pull Up Status.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P5</name>
<description>Pull Up Status.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P6</name>
<description>Pull Up Status.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P7</name>
<description>Pull Up Status.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P8</name>
<description>Pull Up Status.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P9</name>
<description>Pull Up Status.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P10</name>
<description>Pull Up Status.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P11</name>
<description>Pull Up Status.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P12</name>
<description>Pull Up Status.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P13</name>
<description>Pull Up Status.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P14</name>
<description>Pull Up Status.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P15</name>
<description>Pull Up Status.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P16</name>
<description>Pull Up Status.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P17</name>
<description>Pull Up Status.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P18</name>
<description>Pull Up Status.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P19</name>
<description>Pull Up Status.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P20</name>
<description>Pull Up Status.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P21</name>
<description>Pull Up Status.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P22</name>
<description>Pull Up Status.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P23</name>
<description>Pull Up Status.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P24</name>
<description>Pull Up Status.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P25</name>
<description>Pull Up Status.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P26</name>
<description>Pull Up Status.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P27</name>
<description>Pull Up Status.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P28</name>
<description>Pull Up Status.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P29</name>
<description>Pull Up Status.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P30</name>
<description>Pull Up Status.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P31</name>
<description>Pull Up Status.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<dim>2</dim>
<dimIncrement>4</dimIncrement>
<dimIndex>0-1</dimIndex>
<name>ABCDSR[%s]</name>
<description>Peripheral Select Register</description>
<addressOffset>0x00000070</addressOffset>
<size>32</size>
<access>read-write</access>
<fields>
<field>
<name>P0</name>
<description>Peripheral Select.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P1</name>
<description>Peripheral Select.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P2</name>
<description>Peripheral Select.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P3</name>
<description>Peripheral Select.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P4</name>
<description>Peripheral Select.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P5</name>
<description>Peripheral Select.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P6</name>
<description>Peripheral Select.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P7</name>
<description>Peripheral Select.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P8</name>
<description>Peripheral Select.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P9</name>
<description>Peripheral Select.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P10</name>
<description>Peripheral Select.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P11</name>
<description>Peripheral Select.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P12</name>
<description>Peripheral Select.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P13</name>
<description>Peripheral Select.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P14</name>
<description>Peripheral Select.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P15</name>
<description>Peripheral Select.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P16</name>
<description>Peripheral Select.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P17</name>
<description>Peripheral Select.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P18</name>
<description>Peripheral Select.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P19</name>
<description>Peripheral Select.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P20</name>
<description>Peripheral Select.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P21</name>
<description>Peripheral Select.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P22</name>
<description>Peripheral Select.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P23</name>
<description>Peripheral Select.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P24</name>
<description>Peripheral Select.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P25</name>
<description>Peripheral Select.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P26</name>
<description>Peripheral Select.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P27</name>
<description>Peripheral Select.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P28</name>
<description>Peripheral Select.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P29</name>
<description>Peripheral Select.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P30</name>
<description>Peripheral Select.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P31</name>
<description>Peripheral Select.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>IFSCDR</name>
<description>Input Filter Slow Clock Disable Register</description>
<addressOffset>0x00000080</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IFSCER</name>
<description>Input Filter Slow Clock Enable Register</description>
<addressOffset>0x00000084</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IFSCSR</name>
<description>Input Filter Slow Clock Status Register</description>
<addressOffset>0x00000088</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>P0</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P1</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P2</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P3</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P4</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P5</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P6</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P7</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P8</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P9</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P10</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P11</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P12</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P13</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P14</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P15</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P16</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P17</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P18</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P19</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P20</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P21</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P22</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P23</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P24</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P25</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P26</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P27</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P28</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P29</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P30</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P31</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>SCDR</name>
<description>Slow Clock Divider Debouncing Register</description>
<addressOffset>0x0000008C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DIV</name>
<bitOffset>0</bitOffset>
<bitWidth>14</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>PPDDR</name>
<description>Pad Pull-down Disable Register</description>
<addressOffset>0x00000090</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Pull Down Disable.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Pull Down Disable.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Pull Down Disable.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Pull Down Disable.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Pull Down Disable.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Pull Down Disable.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Pull Down Disable.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Pull Down Disable.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Pull Down Disable.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Pull Down Disable.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Pull Down Disable.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Pull Down Disable.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Pull Down Disable.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Pull Down Disable.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Pull Down Disable.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Pull Down Disable.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Pull Down Disable.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Pull Down Disable.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Pull Down Disable.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Pull Down Disable.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Pull Down Disable.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Pull Down Disable.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Pull Down Disable.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Pull Down Disable.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Pull Down Disable.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Pull Down Disable.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Pull Down Disable.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Pull Down Disable.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Pull Down Disable.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Pull Down Disable.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Pull Down Disable.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Pull Down Disable.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>PPDER</name>
<description>Pad Pull-down Enable Register</description>
<addressOffset>0x00000094</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Pull Down Enable.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Pull Down Enable.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Pull Down Enable.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Pull Down Enable.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Pull Down Enable.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Pull Down Enable.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Pull Down Enable.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Pull Down Enable.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Pull Down Enable.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Pull Down Enable.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Pull Down Enable.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Pull Down Enable.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Pull Down Enable.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Pull Down Enable.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Pull Down Enable.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Pull Down Enable.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Pull Down Enable.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Pull Down Enable.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Pull Down Enable.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Pull Down Enable.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Pull Down Enable.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Pull Down Enable.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Pull Down Enable.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Pull Down Enable.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Pull Down Enable.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Pull Down Enable.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Pull Down Enable.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Pull Down Enable.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Pull Down Enable.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Pull Down Enable.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Pull Down Enable.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Pull Down Enable.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>PPDSR</name>
<description>Pad Pull-down Status Register</description>
<addressOffset>0x00000098</addressOffset>
<size>32</size>
<access>read-only</access>
<fields>
<field>
<name>P0</name>
<description>Pull Down Status.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P1</name>
<description>Pull Down Status.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P2</name>
<description>Pull Down Status.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P3</name>
<description>Pull Down Status.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P4</name>
<description>Pull Down Status.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P5</name>
<description>Pull Down Status.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P6</name>
<description>Pull Down Status.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P7</name>
<description>Pull Down Status.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P8</name>
<description>Pull Down Status.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P9</name>
<description>Pull Down Status.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P10</name>
<description>Pull Down Status.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P11</name>
<description>Pull Down Status.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P12</name>
<description>Pull Down Status.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P13</name>
<description>Pull Down Status.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P14</name>
<description>Pull Down Status.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P15</name>
<description>Pull Down Status.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P16</name>
<description>Pull Down Status.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P17</name>
<description>Pull Down Status.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P18</name>
<description>Pull Down Status.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P19</name>
<description>Pull Down Status.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P20</name>
<description>Pull Down Status.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P21</name>
<description>Pull Down Status.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P22</name>
<description>Pull Down Status.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P23</name>
<description>Pull Down Status.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P24</name>
<description>Pull Down Status.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P25</name>
<description>Pull Down Status.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P26</name>
<description>Pull Down Status.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P27</name>
<description>Pull Down Status.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P28</name>
<description>Pull Down Status.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P29</name>
<description>Pull Down Status.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P30</name>
<description>Pull Down Status.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P31</name>
<description>Pull Down Status.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>OWER</name>
<description>Output Write Enable</description>
<addressOffset>0x000000A0</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Output Write Enable.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Output Write Enable.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Output Write Enable.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Output Write Enable.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Output Write Enable.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Output Write Enable.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Output Write Enable.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Output Write Enable.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Output Write Enable.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Output Write Enable.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Output Write Enable.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Output Write Enable.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Output Write Enable.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Output Write Enable.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Output Write Enable.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Output Write Enable.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Output Write Enable.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Output Write Enable.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Output Write Enable.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Output Write Enable.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Output Write Enable.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Output Write Enable.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Output Write Enable.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Output Write Enable.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Output Write Enable.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Output Write Enable.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Output Write Enable.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Output Write Enable.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Output Write Enable.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Output Write Enable.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Output Write Enable.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Output Write Enable.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>OWDR</name>
<description>Output Write Disable</description>
<addressOffset>0x000000A4</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Output Write Disable.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Output Write Disable.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Output Write Disable.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Output Write Disable.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Output Write Disable.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Output Write Disable.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Output Write Disable.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Output Write Disable.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Output Write Disable.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Output Write Disable.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Output Write Disable.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Output Write Disable.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Output Write Disable.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Output Write Disable.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Output Write Disable.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Output Write Disable.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Output Write Disable.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Output Write Disable.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Output Write Disable.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Output Write Disable.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Output Write Disable.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Output Write Disable.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Output Write Disable.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Output Write Disable.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Output Write Disable.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Output Write Disable.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Output Write Disable.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Output Write Disable.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Output Write Disable.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Output Write Disable.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Output Write Disable.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Output Write Disable.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>OWSR</name>
<description>Output Write Status Register</description>
<addressOffset>0x000000A8</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>P0</name>
<description>Output Write Status.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P1</name>
<description>Output Write Status.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P2</name>
<description>Output Write Status.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P3</name>
<description>Output Write Status.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P4</name>
<description>Output Write Status.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P5</name>
<description>Output Write Status.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P6</name>
<description>Output Write Status.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P7</name>
<description>Output Write Status.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P8</name>
<description>Output Write Status.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P9</name>
<description>Output Write Status.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P10</name>
<description>Output Write Status.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P11</name>
<description>Output Write Status.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P12</name>
<description>Output Write Status.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P13</name>
<description>Output Write Status.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P14</name>
<description>Output Write Status.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P15</name>
<description>Output Write Status.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P16</name>
<description>Output Write Status.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P17</name>
<description>Output Write Status.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P18</name>
<description>Output Write Status.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P19</name>
<description>Output Write Status.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P20</name>
<description>Output Write Status.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P21</name>
<description>Output Write Status.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P22</name>
<description>Output Write Status.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P23</name>
<description>Output Write Status.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P24</name>
<description>Output Write Status.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P25</name>
<description>Output Write Status.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P26</name>
<description>Output Write Status.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P27</name>
<description>Output Write Status.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P28</name>
<description>Output Write Status.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P29</name>
<description>Output Write Status.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P30</name>
<description>Output Write Status.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P31</name>
<description>Output Write Status.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>AIMER</name>
<description>Additional Interrupt Modes Enable Register</description>
<addressOffset>0x000000B0</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>AIMDR</name>
<description>Additional Interrupt Modes Disables Register</description>
<addressOffset>0x000000B4</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>AIMMR</name>
<description>Additional Interrupt Modes Mask Register</description>
<addressOffset>0x000000B8</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>P0</name>
<description>Peripheral CD Status.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P1</name>
<description>Peripheral CD Status.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P2</name>
<description>Peripheral CD Status.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P3</name>
<description>Peripheral CD Status.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P4</name>
<description>Peripheral CD Status.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P5</name>
<description>Peripheral CD Status.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P6</name>
<description>Peripheral CD Status.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P7</name>
<description>Peripheral CD Status.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P8</name>
<description>Peripheral CD Status.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P9</name>
<description>Peripheral CD Status.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P10</name>
<description>Peripheral CD Status.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P11</name>
<description>Peripheral CD Status.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P12</name>
<description>Peripheral CD Status.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P13</name>
<description>Peripheral CD Status.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P14</name>
<description>Peripheral CD Status.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P15</name>
<description>Peripheral CD Status.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P16</name>
<description>Peripheral CD Status.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P17</name>
<description>Peripheral CD Status.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P18</name>
<description>Peripheral CD Status.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P19</name>
<description>Peripheral CD Status.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P20</name>
<description>Peripheral CD Status.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P21</name>
<description>Peripheral CD Status.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P22</name>
<description>Peripheral CD Status.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P23</name>
<description>Peripheral CD Status.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P24</name>
<description>Peripheral CD Status.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P25</name>
<description>Peripheral CD Status.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P26</name>
<description>Peripheral CD Status.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P27</name>
<description>Peripheral CD Status.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P28</name>
<description>Peripheral CD Status.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P29</name>
<description>Peripheral CD Status.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P30</name>
<description>Peripheral CD Status.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P31</name>
<description>Peripheral CD Status.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>ESR</name>
<description>Edge Select Register</description>
<addressOffset>0x000000C0</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>LSR</name>
<description>Level Select Register</description>
<addressOffset>0x000000C4</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Level Interrupt Selection.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Level Interrupt Selection.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Level Interrupt Selection.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Level Interrupt Selection.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Level Interrupt Selection.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Level Interrupt Selection.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Level Interrupt Selection.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Level Interrupt Selection.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Level Interrupt Selection.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Level Interrupt Selection.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Level Interrupt Selection.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Level Interrupt Selection.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Level Interrupt Selection.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Level Interrupt Selection.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Level Interrupt Selection.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Level Interrupt Selection.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Level Interrupt Selection.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Level Interrupt Selection.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Level Interrupt Selection.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Level Interrupt Selection.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Level Interrupt Selection.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Level Interrupt Selection.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Level Interrupt Selection.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Level Interrupt Selection.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Level Interrupt Selection.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Level Interrupt Selection.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Level Interrupt Selection.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Level Interrupt Selection.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Level Interrupt Selection.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Level Interrupt Selection.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Level Interrupt Selection.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Level Interrupt Selection.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>ELSR</name>
<description>Edge/Level Status Register</description>
<addressOffset>0x000000C8</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>P0</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P1</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P2</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P3</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P4</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P5</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P6</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P7</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P8</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P9</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P10</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P11</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P12</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P13</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P14</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P15</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P16</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P17</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P18</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P19</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P20</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P21</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P22</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P23</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P24</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P25</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P26</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P27</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P28</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P29</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P30</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P31</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>FELLSR</name>
<description>Falling Edge/Low Level Select Register</description>
<addressOffset>0x000000D0</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>REHLSR</name>
<description>Rising Edge/ High Level Select Register</description>
<addressOffset>0x000000D4</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>FRLHSR</name>
<description>Fall/Rise - Low/High Status Register</description>
<addressOffset>0x000000D8</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>P0</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P1</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P2</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P3</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P4</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P5</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P6</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P7</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P8</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P9</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P10</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P11</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P12</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P13</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P14</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P15</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P16</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P17</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P18</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P19</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P20</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P21</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P22</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P23</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P24</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P25</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P26</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P27</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P28</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P29</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P30</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P31</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>LOCKSR</name>
<description>Lock Status</description>
<addressOffset>0x000000E0</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>P0</name>
<description>Lock Status.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P1</name>
<description>Lock Status.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P2</name>
<description>Lock Status.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P3</name>
<description>Lock Status.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P4</name>
<description>Lock Status.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P5</name>
<description>Lock Status.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P6</name>
<description>Lock Status.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P7</name>
<description>Lock Status.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P8</name>
<description>Lock Status.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P9</name>
<description>Lock Status.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P10</name>
<description>Lock Status.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P11</name>
<description>Lock Status.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P12</name>
<description>Lock Status.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P13</name>
<description>Lock Status.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P14</name>
<description>Lock Status.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P15</name>
<description>Lock Status.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P16</name>
<description>Lock Status.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P17</name>
<description>Lock Status.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P18</name>
<description>Lock Status.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P19</name>
<description>Lock Status.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P20</name>
<description>Lock Status.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P21</name>
<description>Lock Status.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P22</name>
<description>Lock Status.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P23</name>
<description>Lock Status.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P24</name>
<description>Lock Status.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P25</name>
<description>Lock Status.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P26</name>
<description>Lock Status.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P27</name>
<description>Lock Status.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P28</name>
<description>Lock Status.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P29</name>
<description>Lock Status.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P30</name>
<description>Lock Status.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P31</name>
<description>Lock Status.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>WPMR</name>
<description>Write Protect Mode Register</description>
<addressOffset>0x000000E4</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>WPEN</name>
<description>Write Protect Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>WPKEY</name>
<description>Write Protect KEY</description>
<bitOffset>8</bitOffset>
<bitWidth>24</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>WPSR</name>
<description>Write Protect Status Register</description>
<addressOffset>0x000000E8</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>WPVS</name>
<description>Write Protect Violation Status</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>WPVSRC</name>
<description>Write Protect Violation Source</description>
<bitOffset>8</bitOffset>
<bitWidth>16</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>SCHMITT</name>
<description>Schmitt Trigger Register</description>
<addressOffset>0x00000100</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SCHMITT0</name>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT1</name>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT2</name>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT3</name>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT4</name>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT5</name>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT6</name>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT7</name>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT8</name>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT9</name>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT10</name>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT11</name>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT12</name>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT13</name>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT14</name>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT15</name>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT16</name>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT17</name>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT18</name>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT19</name>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT20</name>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT21</name>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT22</name>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT23</name>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT24</name>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT25</name>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT26</name>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT27</name>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT28</name>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT29</name>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT30</name>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT31</name>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DRIVER1</name>
<description>I/O Drive Register 1</description>
<addressOffset>0x00000118</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>LINE0</name>
<description>Drive of PIO Line 0</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE1</name>
<description>Drive of PIO Line 1</description>
<bitOffset>2</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE2</name>
<description>Drive of PIO Line 2</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE3</name>
<description>Drive of PIO Line 3</description>
<bitOffset>6</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE4</name>
<description>Drive of PIO Line 4</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE5</name>
<description>Drive of PIO Line 5</description>
<bitOffset>10</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE6</name>
<description>Drive of PIO Line 6</description>
<bitOffset>12</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE7</name>
<description>Drive of PIO Line 7</description>
<bitOffset>14</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE8</name>
<description>Drive of PIO Line 8</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE9</name>
<description>Drive of PIO Line 9</description>
<bitOffset>18</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE10</name>
<description>Drive of PIO Line 10</description>
<bitOffset>20</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE11</name>
<description>Drive of PIO Line 11</description>
<bitOffset>22</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE12</name>
<description>Drive of PIO Line 12</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE13</name>
<description>Drive of PIO Line 13</description>
<bitOffset>26</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE14</name>
<description>Drive of PIO Line 14</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE15</name>
<description>Drive of PIO Line 15</description>
<bitOffset>30</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>DRIVER2</name>
<description>I/O Drive Register 2</description>
<addressOffset>0x0000011C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>LINE16</name>
<description>Drive of PIO line 16</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE17</name>
<description>Drive of PIO line 17</description>
<bitOffset>2</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE18</name>
<description>Drive of PIO line 18</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE19</name>
<description>Drive of PIO line 19</description>
<bitOffset>6</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE20</name>
<description>Drive of PIO line 20</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE21</name>
<description>Drive of PIO line 21</description>
<bitOffset>10</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE22</name>
<description>Drive of PIO line 22</description>
<bitOffset>12</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE23</name>
<description>Drive of PIO line 23</description>
<bitOffset>14</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE24</name>
<description>Drive of PIO line 24</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE25</name>
<description>Drive of PIO line 25</description>
<bitOffset>18</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE26</name>
<description>Drive of PIO line 26</description>
<bitOffset>20</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE27</name>
<description>Drive of PIO line 27</description>
<bitOffset>22</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE28</name>
<description>Drive of PIO line 28</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE29</name>
<description>Drive of PIO line 29</description>
<bitOffset>26</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE30</name>
<description>Drive of PIO line 30</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE31</name>
<description>Drive of PIO line 31</description>
<bitOffset>30</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>PIOC</name>
<version>11004H</version>
<description>Parallel Input/Output Controller C</description>
<groupName>PIO</groupName>
<prependToName>PIOC_</prependToName>
<baseAddress>0xFFFFF600</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x200</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>PIOC</name>
<value>8</value>
</interrupt>
<registers>
<register>
<name>PER</name>
<description>PIO Enable Register</description>
<addressOffset>0x00000000</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>PIO Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>PIO Enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>PIO Enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>PIO Enable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>PIO Enable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>PIO Enable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>PIO Enable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>PIO Enable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>PIO Enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>PIO Enable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>PIO Enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>PIO Enable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>PIO Enable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>PIO Enable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>PIO Enable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>PIO Enable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>PIO Enable</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>PIO Enable</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>PIO Enable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>PIO Enable</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>PIO Enable</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>PIO Enable</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>PIO Enable</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>PIO Enable</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>PIO Enable</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>PIO Enable</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>PIO Enable</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>PIO Enable</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>PIO Enable</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>PIO Enable</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>PIO Enable</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>PIO Enable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>PDR</name>
<description>PIO Disable Register</description>
<addressOffset>0x00000004</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>PIO Disable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>PIO Disable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>PIO Disable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>PIO Disable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>PIO Disable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>PIO Disable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>PIO Disable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>PIO Disable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>PIO Disable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>PIO Disable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>PIO Disable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>PIO Disable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>PIO Disable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>PIO Disable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>PIO Disable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>PIO Disable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>PIO Disable</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>PIO Disable</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>PIO Disable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>PIO Disable</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>PIO Disable</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>PIO Disable</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>PIO Disable</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>PIO Disable</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>PIO Disable</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>PIO Disable</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>PIO Disable</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>PIO Disable</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>PIO Disable</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>PIO Disable</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>PIO Disable</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>PIO Disable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>PSR</name>
<description>PIO Status Register</description>
<addressOffset>0x00000008</addressOffset>
<size>32</size>
<access>read-only</access>
<fields>
<field>
<name>P0</name>
<description>PIO Status</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P1</name>
<description>PIO Status</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P2</name>
<description>PIO Status</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P3</name>
<description>PIO Status</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P4</name>
<description>PIO Status</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P5</name>
<description>PIO Status</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P6</name>
<description>PIO Status</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P7</name>
<description>PIO Status</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P8</name>
<description>PIO Status</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P9</name>
<description>PIO Status</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P10</name>
<description>PIO Status</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P11</name>
<description>PIO Status</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P12</name>
<description>PIO Status</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P13</name>
<description>PIO Status</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P14</name>
<description>PIO Status</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P15</name>
<description>PIO Status</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P16</name>
<description>PIO Status</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P17</name>
<description>PIO Status</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P18</name>
<description>PIO Status</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P19</name>
<description>PIO Status</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P20</name>
<description>PIO Status</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P21</name>
<description>PIO Status</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P22</name>
<description>PIO Status</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P23</name>
<description>PIO Status</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P24</name>
<description>PIO Status</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P25</name>
<description>PIO Status</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P26</name>
<description>PIO Status</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P27</name>
<description>PIO Status</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P28</name>
<description>PIO Status</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P29</name>
<description>PIO Status</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P30</name>
<description>PIO Status</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P31</name>
<description>PIO Status</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>OER</name>
<description>Output Enable Register</description>
<addressOffset>0x00000010</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Output Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Output Enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Output Enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Output Enable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Output Enable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Output Enable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Output Enable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Output Enable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Output Enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Output Enable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Output Enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Output Enable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Output Enable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Output Enable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Output Enable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Output Enable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Output Enable</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Output Enable</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Output Enable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Output Enable</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Output Enable</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Output Enable</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Output Enable</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Output Enable</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Output Enable</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Output Enable</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Output Enable</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Output Enable</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Output Enable</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Output Enable</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Output Enable</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Output Enable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>ODR</name>
<description>Output Disable Register</description>
<addressOffset>0x00000014</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Output Disable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Output Disable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Output Disable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Output Disable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Output Disable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Output Disable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Output Disable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Output Disable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Output Disable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Output Disable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Output Disable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Output Disable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Output Disable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Output Disable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Output Disable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Output Disable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Output Disable</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Output Disable</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Output Disable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Output Disable</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Output Disable</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Output Disable</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Output Disable</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Output Disable</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Output Disable</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Output Disable</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Output Disable</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Output Disable</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Output Disable</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Output Disable</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Output Disable</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Output Disable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>OSR</name>
<description>Output Status Register</description>
<addressOffset>0x00000018</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>P0</name>
<description>Output Status</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P1</name>
<description>Output Status</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P2</name>
<description>Output Status</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P3</name>
<description>Output Status</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P4</name>
<description>Output Status</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P5</name>
<description>Output Status</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P6</name>
<description>Output Status</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P7</name>
<description>Output Status</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P8</name>
<description>Output Status</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P9</name>
<description>Output Status</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P10</name>
<description>Output Status</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P11</name>
<description>Output Status</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P12</name>
<description>Output Status</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P13</name>
<description>Output Status</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P14</name>
<description>Output Status</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P15</name>
<description>Output Status</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P16</name>
<description>Output Status</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P17</name>
<description>Output Status</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P18</name>
<description>Output Status</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P19</name>
<description>Output Status</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P20</name>
<description>Output Status</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P21</name>
<description>Output Status</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P22</name>
<description>Output Status</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P23</name>
<description>Output Status</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P24</name>
<description>Output Status</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P25</name>
<description>Output Status</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P26</name>
<description>Output Status</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P27</name>
<description>Output Status</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P28</name>
<description>Output Status</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P29</name>
<description>Output Status</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P30</name>
<description>Output Status</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P31</name>
<description>Output Status</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>IFER</name>
<description>Glitch Input Filter Enable Register</description>
<addressOffset>0x00000020</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Input Filter Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Input Filter Enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Input Filter Enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Input Filter Enable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Input Filter Enable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Input Filter Enable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Input Filter Enable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Input Filter Enable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Input Filter Enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Input Filter Enable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Input Filter Enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Input Filter Enable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Input Filter Enable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Input Filter Enable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Input Filter Enable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Input Filter Enable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Input Filter Enable</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Input Filter Enable</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Input Filter Enable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Input Filter Enable</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Input Filter Enable</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Input Filter Enable</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Input Filter Enable</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Input Filter Enable</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Input Filter Enable</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Input Filter Enable</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Input Filter Enable</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Input Filter Enable</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Input Filter Enable</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Input Filter Enable</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Input Filter Enable</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Input Filter Enable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IFDR</name>
<description>Glitch Input Filter Disable Register</description>
<addressOffset>0x00000024</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Input Filter Disable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Input Filter Disable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Input Filter Disable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Input Filter Disable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Input Filter Disable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Input Filter Disable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Input Filter Disable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Input Filter Disable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Input Filter Disable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Input Filter Disable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Input Filter Disable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Input Filter Disable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Input Filter Disable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Input Filter Disable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Input Filter Disable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Input Filter Disable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Input Filter Disable</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Input Filter Disable</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Input Filter Disable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Input Filter Disable</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Input Filter Disable</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Input Filter Disable</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Input Filter Disable</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Input Filter Disable</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Input Filter Disable</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Input Filter Disable</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Input Filter Disable</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Input Filter Disable</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Input Filter Disable</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Input Filter Disable</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Input Filter Disable</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Input Filter Disable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IFSR</name>
<description>Glitch Input Filter Status Register</description>
<addressOffset>0x00000028</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>P0</name>
<description>Input Filer Status</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P1</name>
<description>Input Filer Status</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P2</name>
<description>Input Filer Status</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P3</name>
<description>Input Filer Status</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P4</name>
<description>Input Filer Status</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P5</name>
<description>Input Filer Status</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P6</name>
<description>Input Filer Status</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P7</name>
<description>Input Filer Status</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P8</name>
<description>Input Filer Status</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P9</name>
<description>Input Filer Status</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P10</name>
<description>Input Filer Status</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P11</name>
<description>Input Filer Status</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P12</name>
<description>Input Filer Status</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P13</name>
<description>Input Filer Status</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P14</name>
<description>Input Filer Status</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P15</name>
<description>Input Filer Status</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P16</name>
<description>Input Filer Status</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P17</name>
<description>Input Filer Status</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P18</name>
<description>Input Filer Status</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P19</name>
<description>Input Filer Status</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P20</name>
<description>Input Filer Status</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P21</name>
<description>Input Filer Status</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P22</name>
<description>Input Filer Status</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P23</name>
<description>Input Filer Status</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P24</name>
<description>Input Filer Status</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P25</name>
<description>Input Filer Status</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P26</name>
<description>Input Filer Status</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P27</name>
<description>Input Filer Status</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P28</name>
<description>Input Filer Status</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P29</name>
<description>Input Filer Status</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P30</name>
<description>Input Filer Status</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P31</name>
<description>Input Filer Status</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>SODR</name>
<description>Set Output Data Register</description>
<addressOffset>0x00000030</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Set Output Data</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Set Output Data</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Set Output Data</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Set Output Data</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Set Output Data</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Set Output Data</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Set Output Data</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Set Output Data</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Set Output Data</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Set Output Data</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Set Output Data</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Set Output Data</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Set Output Data</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Set Output Data</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Set Output Data</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Set Output Data</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Set Output Data</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Set Output Data</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Set Output Data</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Set Output Data</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Set Output Data</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Set Output Data</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Set Output Data</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Set Output Data</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Set Output Data</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Set Output Data</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Set Output Data</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Set Output Data</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Set Output Data</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Set Output Data</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Set Output Data</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Set Output Data</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>CODR</name>
<description>Clear Output Data Register</description>
<addressOffset>0x00000034</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Clear Output Data</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Clear Output Data</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Clear Output Data</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Clear Output Data</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Clear Output Data</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Clear Output Data</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Clear Output Data</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Clear Output Data</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Clear Output Data</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Clear Output Data</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Clear Output Data</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Clear Output Data</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Clear Output Data</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Clear Output Data</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Clear Output Data</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Clear Output Data</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Clear Output Data</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Clear Output Data</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Clear Output Data</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Clear Output Data</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Clear Output Data</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Clear Output Data</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Clear Output Data</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Clear Output Data</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Clear Output Data</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Clear Output Data</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Clear Output Data</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Clear Output Data</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Clear Output Data</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Clear Output Data</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Clear Output Data</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Clear Output Data</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>ODSR</name>
<description>Output Data Status Register</description>
<addressOffset>0x00000038</addressOffset>
<size>32</size>
<access>read-write</access>
<fields>
<field>
<name>P0</name>
<description>Output Data Status</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P1</name>
<description>Output Data Status</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P2</name>
<description>Output Data Status</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P3</name>
<description>Output Data Status</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P4</name>
<description>Output Data Status</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P5</name>
<description>Output Data Status</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P6</name>
<description>Output Data Status</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P7</name>
<description>Output Data Status</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P8</name>
<description>Output Data Status</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P9</name>
<description>Output Data Status</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P10</name>
<description>Output Data Status</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P11</name>
<description>Output Data Status</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P12</name>
<description>Output Data Status</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P13</name>
<description>Output Data Status</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P14</name>
<description>Output Data Status</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P15</name>
<description>Output Data Status</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P16</name>
<description>Output Data Status</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P17</name>
<description>Output Data Status</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P18</name>
<description>Output Data Status</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P19</name>
<description>Output Data Status</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P20</name>
<description>Output Data Status</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P21</name>
<description>Output Data Status</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P22</name>
<description>Output Data Status</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P23</name>
<description>Output Data Status</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P24</name>
<description>Output Data Status</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P25</name>
<description>Output Data Status</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P26</name>
<description>Output Data Status</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P27</name>
<description>Output Data Status</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P28</name>
<description>Output Data Status</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P29</name>
<description>Output Data Status</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P30</name>
<description>Output Data Status</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P31</name>
<description>Output Data Status</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>PDSR</name>
<description>Pin Data Status Register</description>
<addressOffset>0x0000003C</addressOffset>
<size>32</size>
<access>read-only</access>
<fields>
<field>
<name>P0</name>
<description>Output Data Status</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P1</name>
<description>Output Data Status</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P2</name>
<description>Output Data Status</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P3</name>
<description>Output Data Status</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P4</name>
<description>Output Data Status</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P5</name>
<description>Output Data Status</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P6</name>
<description>Output Data Status</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P7</name>
<description>Output Data Status</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P8</name>
<description>Output Data Status</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P9</name>
<description>Output Data Status</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P10</name>
<description>Output Data Status</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P11</name>
<description>Output Data Status</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P12</name>
<description>Output Data Status</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P13</name>
<description>Output Data Status</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P14</name>
<description>Output Data Status</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P15</name>
<description>Output Data Status</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P16</name>
<description>Output Data Status</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P17</name>
<description>Output Data Status</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P18</name>
<description>Output Data Status</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P19</name>
<description>Output Data Status</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P20</name>
<description>Output Data Status</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P21</name>
<description>Output Data Status</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P22</name>
<description>Output Data Status</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P23</name>
<description>Output Data Status</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P24</name>
<description>Output Data Status</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P25</name>
<description>Output Data Status</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P26</name>
<description>Output Data Status</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P27</name>
<description>Output Data Status</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P28</name>
<description>Output Data Status</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P29</name>
<description>Output Data Status</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P30</name>
<description>Output Data Status</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P31</name>
<description>Output Data Status</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>IER</name>
<description>Interrupt Enable Register</description>
<addressOffset>0x00000040</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IDR</name>
<description>Interrupt Disable Register</description>
<addressOffset>0x00000044</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IMR</name>
<description>Interrupt Mask Register</description>
<addressOffset>0x00000048</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>P0</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P1</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P2</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P3</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P4</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P5</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P6</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P7</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P8</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P9</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P10</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P11</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P12</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P13</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P14</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P15</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P16</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P17</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P18</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P19</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P20</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P21</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P22</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P23</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P24</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P25</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P26</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P27</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P28</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P29</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P30</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P31</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>ISR</name>
<description>Interrupt Status Register</description>
<addressOffset>0x0000004C</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>P0</name>
<description>Input Change Interrupt Status</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P1</name>
<description>Input Change Interrupt Status</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P2</name>
<description>Input Change Interrupt Status</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P3</name>
<description>Input Change Interrupt Status</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P4</name>
<description>Input Change Interrupt Status</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P5</name>
<description>Input Change Interrupt Status</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P6</name>
<description>Input Change Interrupt Status</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P7</name>
<description>Input Change Interrupt Status</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P8</name>
<description>Input Change Interrupt Status</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P9</name>
<description>Input Change Interrupt Status</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P10</name>
<description>Input Change Interrupt Status</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P11</name>
<description>Input Change Interrupt Status</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P12</name>
<description>Input Change Interrupt Status</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P13</name>
<description>Input Change Interrupt Status</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P14</name>
<description>Input Change Interrupt Status</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P15</name>
<description>Input Change Interrupt Status</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P16</name>
<description>Input Change Interrupt Status</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P17</name>
<description>Input Change Interrupt Status</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P18</name>
<description>Input Change Interrupt Status</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P19</name>
<description>Input Change Interrupt Status</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P20</name>
<description>Input Change Interrupt Status</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P21</name>
<description>Input Change Interrupt Status</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P22</name>
<description>Input Change Interrupt Status</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P23</name>
<description>Input Change Interrupt Status</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P24</name>
<description>Input Change Interrupt Status</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P25</name>
<description>Input Change Interrupt Status</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P26</name>
<description>Input Change Interrupt Status</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P27</name>
<description>Input Change Interrupt Status</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P28</name>
<description>Input Change Interrupt Status</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P29</name>
<description>Input Change Interrupt Status</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P30</name>
<description>Input Change Interrupt Status</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P31</name>
<description>Input Change Interrupt Status</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>MDER</name>
<description>Multi-driver Enable Register</description>
<addressOffset>0x00000050</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Multi Drive Enable.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Multi Drive Enable.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Multi Drive Enable.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Multi Drive Enable.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Multi Drive Enable.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Multi Drive Enable.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Multi Drive Enable.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Multi Drive Enable.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Multi Drive Enable.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Multi Drive Enable.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Multi Drive Enable.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Multi Drive Enable.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Multi Drive Enable.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Multi Drive Enable.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Multi Drive Enable.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Multi Drive Enable.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Multi Drive Enable.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Multi Drive Enable.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Multi Drive Enable.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Multi Drive Enable.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Multi Drive Enable.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Multi Drive Enable.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Multi Drive Enable.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Multi Drive Enable.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Multi Drive Enable.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Multi Drive Enable.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Multi Drive Enable.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Multi Drive Enable.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Multi Drive Enable.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Multi Drive Enable.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Multi Drive Enable.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Multi Drive Enable.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>MDDR</name>
<description>Multi-driver Disable Register</description>
<addressOffset>0x00000054</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Multi Drive Disable.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Multi Drive Disable.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Multi Drive Disable.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Multi Drive Disable.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Multi Drive Disable.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Multi Drive Disable.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Multi Drive Disable.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Multi Drive Disable.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Multi Drive Disable.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Multi Drive Disable.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Multi Drive Disable.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Multi Drive Disable.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Multi Drive Disable.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Multi Drive Disable.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Multi Drive Disable.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Multi Drive Disable.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Multi Drive Disable.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Multi Drive Disable.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Multi Drive Disable.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Multi Drive Disable.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Multi Drive Disable.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Multi Drive Disable.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Multi Drive Disable.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Multi Drive Disable.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Multi Drive Disable.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Multi Drive Disable.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Multi Drive Disable.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Multi Drive Disable.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Multi Drive Disable.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Multi Drive Disable.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Multi Drive Disable.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Multi Drive Disable.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>MDSR</name>
<description>Multi-driver Status Register</description>
<addressOffset>0x00000058</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>P0</name>
<description>Multi Drive Status.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P1</name>
<description>Multi Drive Status.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P2</name>
<description>Multi Drive Status.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P3</name>
<description>Multi Drive Status.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P4</name>
<description>Multi Drive Status.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P5</name>
<description>Multi Drive Status.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P6</name>
<description>Multi Drive Status.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P7</name>
<description>Multi Drive Status.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P8</name>
<description>Multi Drive Status.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P9</name>
<description>Multi Drive Status.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P10</name>
<description>Multi Drive Status.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P11</name>
<description>Multi Drive Status.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P12</name>
<description>Multi Drive Status.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P13</name>
<description>Multi Drive Status.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P14</name>
<description>Multi Drive Status.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P15</name>
<description>Multi Drive Status.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P16</name>
<description>Multi Drive Status.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P17</name>
<description>Multi Drive Status.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P18</name>
<description>Multi Drive Status.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P19</name>
<description>Multi Drive Status.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P20</name>
<description>Multi Drive Status.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P21</name>
<description>Multi Drive Status.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P22</name>
<description>Multi Drive Status.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P23</name>
<description>Multi Drive Status.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P24</name>
<description>Multi Drive Status.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P25</name>
<description>Multi Drive Status.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P26</name>
<description>Multi Drive Status.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P27</name>
<description>Multi Drive Status.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P28</name>
<description>Multi Drive Status.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P29</name>
<description>Multi Drive Status.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P30</name>
<description>Multi Drive Status.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P31</name>
<description>Multi Drive Status.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>PUDR</name>
<description>Pull-up Disable Register</description>
<addressOffset>0x00000060</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Pull Up Disable.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Pull Up Disable.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Pull Up Disable.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Pull Up Disable.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Pull Up Disable.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Pull Up Disable.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Pull Up Disable.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Pull Up Disable.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Pull Up Disable.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Pull Up Disable.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Pull Up Disable.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Pull Up Disable.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Pull Up Disable.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Pull Up Disable.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Pull Up Disable.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Pull Up Disable.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Pull Up Disable.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Pull Up Disable.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Pull Up Disable.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Pull Up Disable.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Pull Up Disable.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Pull Up Disable.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Pull Up Disable.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Pull Up Disable.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Pull Up Disable.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Pull Up Disable.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Pull Up Disable.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Pull Up Disable.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Pull Up Disable.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Pull Up Disable.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Pull Up Disable.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Pull Up Disable.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>PUER</name>
<description>Pull-up Enable Register</description>
<addressOffset>0x00000064</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Pull Up Enable.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Pull Up Enable.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Pull Up Enable.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Pull Up Enable.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Pull Up Enable.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Pull Up Enable.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Pull Up Enable.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Pull Up Enable.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Pull Up Enable.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Pull Up Enable.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Pull Up Enable.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Pull Up Enable.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Pull Up Enable.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Pull Up Enable.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Pull Up Enable.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Pull Up Enable.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Pull Up Enable.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Pull Up Enable.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Pull Up Enable.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Pull Up Enable.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Pull Up Enable.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Pull Up Enable.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Pull Up Enable.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Pull Up Enable.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Pull Up Enable.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Pull Up Enable.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Pull Up Enable.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Pull Up Enable.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Pull Up Enable.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Pull Up Enable.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Pull Up Enable.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Pull Up Enable.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>PUSR</name>
<description>Pad Pull-up Status Register</description>
<addressOffset>0x00000068</addressOffset>
<size>32</size>
<access>read-only</access>
<fields>
<field>
<name>P0</name>
<description>Pull Up Status.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P1</name>
<description>Pull Up Status.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P2</name>
<description>Pull Up Status.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P3</name>
<description>Pull Up Status.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P4</name>
<description>Pull Up Status.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P5</name>
<description>Pull Up Status.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P6</name>
<description>Pull Up Status.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P7</name>
<description>Pull Up Status.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P8</name>
<description>Pull Up Status.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P9</name>
<description>Pull Up Status.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P10</name>
<description>Pull Up Status.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P11</name>
<description>Pull Up Status.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P12</name>
<description>Pull Up Status.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P13</name>
<description>Pull Up Status.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P14</name>
<description>Pull Up Status.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P15</name>
<description>Pull Up Status.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P16</name>
<description>Pull Up Status.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P17</name>
<description>Pull Up Status.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P18</name>
<description>Pull Up Status.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P19</name>
<description>Pull Up Status.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P20</name>
<description>Pull Up Status.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P21</name>
<description>Pull Up Status.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P22</name>
<description>Pull Up Status.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P23</name>
<description>Pull Up Status.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P24</name>
<description>Pull Up Status.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P25</name>
<description>Pull Up Status.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P26</name>
<description>Pull Up Status.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P27</name>
<description>Pull Up Status.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P28</name>
<description>Pull Up Status.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P29</name>
<description>Pull Up Status.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P30</name>
<description>Pull Up Status.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P31</name>
<description>Pull Up Status.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<dim>2</dim>
<dimIncrement>4</dimIncrement>
<dimIndex>0-1</dimIndex>
<name>ABCDSR[%s]</name>
<description>Peripheral Select Register</description>
<addressOffset>0x00000070</addressOffset>
<size>32</size>
<access>read-write</access>
<fields>
<field>
<name>P0</name>
<description>Peripheral Select.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P1</name>
<description>Peripheral Select.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P2</name>
<description>Peripheral Select.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P3</name>
<description>Peripheral Select.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P4</name>
<description>Peripheral Select.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P5</name>
<description>Peripheral Select.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P6</name>
<description>Peripheral Select.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P7</name>
<description>Peripheral Select.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P8</name>
<description>Peripheral Select.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P9</name>
<description>Peripheral Select.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P10</name>
<description>Peripheral Select.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P11</name>
<description>Peripheral Select.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P12</name>
<description>Peripheral Select.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P13</name>
<description>Peripheral Select.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P14</name>
<description>Peripheral Select.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P15</name>
<description>Peripheral Select.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P16</name>
<description>Peripheral Select.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P17</name>
<description>Peripheral Select.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P18</name>
<description>Peripheral Select.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P19</name>
<description>Peripheral Select.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P20</name>
<description>Peripheral Select.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P21</name>
<description>Peripheral Select.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P22</name>
<description>Peripheral Select.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P23</name>
<description>Peripheral Select.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P24</name>
<description>Peripheral Select.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P25</name>
<description>Peripheral Select.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P26</name>
<description>Peripheral Select.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P27</name>
<description>Peripheral Select.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P28</name>
<description>Peripheral Select.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P29</name>
<description>Peripheral Select.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P30</name>
<description>Peripheral Select.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P31</name>
<description>Peripheral Select.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>IFSCDR</name>
<description>Input Filter Slow Clock Disable Register</description>
<addressOffset>0x00000080</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IFSCER</name>
<description>Input Filter Slow Clock Enable Register</description>
<addressOffset>0x00000084</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IFSCSR</name>
<description>Input Filter Slow Clock Status Register</description>
<addressOffset>0x00000088</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>P0</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P1</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P2</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P3</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P4</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P5</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P6</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P7</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P8</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P9</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P10</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P11</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P12</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P13</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P14</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P15</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P16</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P17</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P18</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P19</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P20</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P21</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P22</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P23</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P24</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P25</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P26</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P27</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P28</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P29</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P30</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P31</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>SCDR</name>
<description>Slow Clock Divider Debouncing Register</description>
<addressOffset>0x0000008C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DIV</name>
<bitOffset>0</bitOffset>
<bitWidth>14</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>PPDDR</name>
<description>Pad Pull-down Disable Register</description>
<addressOffset>0x00000090</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Pull Down Disable.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Pull Down Disable.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Pull Down Disable.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Pull Down Disable.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Pull Down Disable.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Pull Down Disable.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Pull Down Disable.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Pull Down Disable.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Pull Down Disable.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Pull Down Disable.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Pull Down Disable.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Pull Down Disable.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Pull Down Disable.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Pull Down Disable.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Pull Down Disable.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Pull Down Disable.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Pull Down Disable.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Pull Down Disable.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Pull Down Disable.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Pull Down Disable.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Pull Down Disable.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Pull Down Disable.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Pull Down Disable.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Pull Down Disable.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Pull Down Disable.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Pull Down Disable.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Pull Down Disable.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Pull Down Disable.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Pull Down Disable.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Pull Down Disable.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Pull Down Disable.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Pull Down Disable.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>PPDER</name>
<description>Pad Pull-down Enable Register</description>
<addressOffset>0x00000094</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Pull Down Enable.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Pull Down Enable.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Pull Down Enable.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Pull Down Enable.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Pull Down Enable.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Pull Down Enable.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Pull Down Enable.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Pull Down Enable.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Pull Down Enable.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Pull Down Enable.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Pull Down Enable.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Pull Down Enable.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Pull Down Enable.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Pull Down Enable.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Pull Down Enable.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Pull Down Enable.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Pull Down Enable.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Pull Down Enable.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Pull Down Enable.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Pull Down Enable.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Pull Down Enable.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Pull Down Enable.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Pull Down Enable.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Pull Down Enable.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Pull Down Enable.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Pull Down Enable.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Pull Down Enable.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Pull Down Enable.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Pull Down Enable.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Pull Down Enable.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Pull Down Enable.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Pull Down Enable.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>PPDSR</name>
<description>Pad Pull-down Status Register</description>
<addressOffset>0x00000098</addressOffset>
<size>32</size>
<access>read-only</access>
<fields>
<field>
<name>P0</name>
<description>Pull Down Status.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P1</name>
<description>Pull Down Status.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P2</name>
<description>Pull Down Status.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P3</name>
<description>Pull Down Status.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P4</name>
<description>Pull Down Status.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P5</name>
<description>Pull Down Status.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P6</name>
<description>Pull Down Status.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P7</name>
<description>Pull Down Status.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P8</name>
<description>Pull Down Status.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P9</name>
<description>Pull Down Status.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P10</name>
<description>Pull Down Status.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P11</name>
<description>Pull Down Status.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P12</name>
<description>Pull Down Status.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P13</name>
<description>Pull Down Status.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P14</name>
<description>Pull Down Status.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P15</name>
<description>Pull Down Status.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P16</name>
<description>Pull Down Status.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P17</name>
<description>Pull Down Status.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P18</name>
<description>Pull Down Status.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P19</name>
<description>Pull Down Status.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P20</name>
<description>Pull Down Status.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P21</name>
<description>Pull Down Status.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P22</name>
<description>Pull Down Status.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P23</name>
<description>Pull Down Status.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P24</name>
<description>Pull Down Status.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P25</name>
<description>Pull Down Status.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P26</name>
<description>Pull Down Status.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P27</name>
<description>Pull Down Status.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P28</name>
<description>Pull Down Status.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P29</name>
<description>Pull Down Status.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P30</name>
<description>Pull Down Status.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P31</name>
<description>Pull Down Status.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>OWER</name>
<description>Output Write Enable</description>
<addressOffset>0x000000A0</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Output Write Enable.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Output Write Enable.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Output Write Enable.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Output Write Enable.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Output Write Enable.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Output Write Enable.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Output Write Enable.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Output Write Enable.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Output Write Enable.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Output Write Enable.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Output Write Enable.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Output Write Enable.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Output Write Enable.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Output Write Enable.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Output Write Enable.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Output Write Enable.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Output Write Enable.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Output Write Enable.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Output Write Enable.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Output Write Enable.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Output Write Enable.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Output Write Enable.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Output Write Enable.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Output Write Enable.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Output Write Enable.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Output Write Enable.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Output Write Enable.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Output Write Enable.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Output Write Enable.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Output Write Enable.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Output Write Enable.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Output Write Enable.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>OWDR</name>
<description>Output Write Disable</description>
<addressOffset>0x000000A4</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Output Write Disable.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Output Write Disable.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Output Write Disable.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Output Write Disable.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Output Write Disable.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Output Write Disable.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Output Write Disable.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Output Write Disable.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Output Write Disable.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Output Write Disable.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Output Write Disable.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Output Write Disable.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Output Write Disable.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Output Write Disable.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Output Write Disable.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Output Write Disable.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Output Write Disable.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Output Write Disable.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Output Write Disable.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Output Write Disable.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Output Write Disable.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Output Write Disable.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Output Write Disable.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Output Write Disable.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Output Write Disable.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Output Write Disable.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Output Write Disable.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Output Write Disable.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Output Write Disable.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Output Write Disable.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Output Write Disable.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Output Write Disable.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>OWSR</name>
<description>Output Write Status Register</description>
<addressOffset>0x000000A8</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>P0</name>
<description>Output Write Status.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P1</name>
<description>Output Write Status.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P2</name>
<description>Output Write Status.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P3</name>
<description>Output Write Status.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P4</name>
<description>Output Write Status.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P5</name>
<description>Output Write Status.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P6</name>
<description>Output Write Status.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P7</name>
<description>Output Write Status.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P8</name>
<description>Output Write Status.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P9</name>
<description>Output Write Status.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P10</name>
<description>Output Write Status.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P11</name>
<description>Output Write Status.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P12</name>
<description>Output Write Status.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P13</name>
<description>Output Write Status.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P14</name>
<description>Output Write Status.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P15</name>
<description>Output Write Status.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P16</name>
<description>Output Write Status.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P17</name>
<description>Output Write Status.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P18</name>
<description>Output Write Status.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P19</name>
<description>Output Write Status.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P20</name>
<description>Output Write Status.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P21</name>
<description>Output Write Status.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P22</name>
<description>Output Write Status.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P23</name>
<description>Output Write Status.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P24</name>
<description>Output Write Status.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P25</name>
<description>Output Write Status.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P26</name>
<description>Output Write Status.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P27</name>
<description>Output Write Status.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P28</name>
<description>Output Write Status.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P29</name>
<description>Output Write Status.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P30</name>
<description>Output Write Status.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P31</name>
<description>Output Write Status.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>AIMER</name>
<description>Additional Interrupt Modes Enable Register</description>
<addressOffset>0x000000B0</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>AIMDR</name>
<description>Additional Interrupt Modes Disables Register</description>
<addressOffset>0x000000B4</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>AIMMR</name>
<description>Additional Interrupt Modes Mask Register</description>
<addressOffset>0x000000B8</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>P0</name>
<description>Peripheral CD Status.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P1</name>
<description>Peripheral CD Status.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P2</name>
<description>Peripheral CD Status.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P3</name>
<description>Peripheral CD Status.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P4</name>
<description>Peripheral CD Status.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P5</name>
<description>Peripheral CD Status.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P6</name>
<description>Peripheral CD Status.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P7</name>
<description>Peripheral CD Status.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P8</name>
<description>Peripheral CD Status.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P9</name>
<description>Peripheral CD Status.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P10</name>
<description>Peripheral CD Status.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P11</name>
<description>Peripheral CD Status.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P12</name>
<description>Peripheral CD Status.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P13</name>
<description>Peripheral CD Status.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P14</name>
<description>Peripheral CD Status.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P15</name>
<description>Peripheral CD Status.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P16</name>
<description>Peripheral CD Status.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P17</name>
<description>Peripheral CD Status.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P18</name>
<description>Peripheral CD Status.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P19</name>
<description>Peripheral CD Status.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P20</name>
<description>Peripheral CD Status.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P21</name>
<description>Peripheral CD Status.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P22</name>
<description>Peripheral CD Status.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P23</name>
<description>Peripheral CD Status.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P24</name>
<description>Peripheral CD Status.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P25</name>
<description>Peripheral CD Status.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P26</name>
<description>Peripheral CD Status.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P27</name>
<description>Peripheral CD Status.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P28</name>
<description>Peripheral CD Status.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P29</name>
<description>Peripheral CD Status.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P30</name>
<description>Peripheral CD Status.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P31</name>
<description>Peripheral CD Status.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>ESR</name>
<description>Edge Select Register</description>
<addressOffset>0x000000C0</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>LSR</name>
<description>Level Select Register</description>
<addressOffset>0x000000C4</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Level Interrupt Selection.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Level Interrupt Selection.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Level Interrupt Selection.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Level Interrupt Selection.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Level Interrupt Selection.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Level Interrupt Selection.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Level Interrupt Selection.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Level Interrupt Selection.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Level Interrupt Selection.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Level Interrupt Selection.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Level Interrupt Selection.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Level Interrupt Selection.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Level Interrupt Selection.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Level Interrupt Selection.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Level Interrupt Selection.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Level Interrupt Selection.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Level Interrupt Selection.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Level Interrupt Selection.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Level Interrupt Selection.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Level Interrupt Selection.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Level Interrupt Selection.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Level Interrupt Selection.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Level Interrupt Selection.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Level Interrupt Selection.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Level Interrupt Selection.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Level Interrupt Selection.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Level Interrupt Selection.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Level Interrupt Selection.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Level Interrupt Selection.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Level Interrupt Selection.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Level Interrupt Selection.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Level Interrupt Selection.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>ELSR</name>
<description>Edge/Level Status Register</description>
<addressOffset>0x000000C8</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>P0</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P1</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P2</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P3</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P4</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P5</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P6</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P7</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P8</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P9</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P10</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P11</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P12</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P13</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P14</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P15</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P16</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P17</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P18</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P19</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P20</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P21</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P22</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P23</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P24</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P25</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P26</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P27</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P28</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P29</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P30</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P31</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>FELLSR</name>
<description>Falling Edge/Low Level Select Register</description>
<addressOffset>0x000000D0</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>REHLSR</name>
<description>Rising Edge/ High Level Select Register</description>
<addressOffset>0x000000D4</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>FRLHSR</name>
<description>Fall/Rise - Low/High Status Register</description>
<addressOffset>0x000000D8</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>P0</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P1</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P2</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P3</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P4</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P5</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P6</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P7</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P8</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P9</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P10</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P11</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P12</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P13</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P14</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P15</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P16</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P17</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P18</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P19</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P20</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P21</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P22</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P23</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P24</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P25</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P26</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P27</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P28</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P29</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P30</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P31</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>LOCKSR</name>
<description>Lock Status</description>
<addressOffset>0x000000E0</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>P0</name>
<description>Lock Status.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P1</name>
<description>Lock Status.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P2</name>
<description>Lock Status.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P3</name>
<description>Lock Status.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P4</name>
<description>Lock Status.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P5</name>
<description>Lock Status.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P6</name>
<description>Lock Status.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P7</name>
<description>Lock Status.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P8</name>
<description>Lock Status.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P9</name>
<description>Lock Status.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P10</name>
<description>Lock Status.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P11</name>
<description>Lock Status.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P12</name>
<description>Lock Status.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P13</name>
<description>Lock Status.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P14</name>
<description>Lock Status.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P15</name>
<description>Lock Status.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P16</name>
<description>Lock Status.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P17</name>
<description>Lock Status.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P18</name>
<description>Lock Status.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P19</name>
<description>Lock Status.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P20</name>
<description>Lock Status.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P21</name>
<description>Lock Status.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P22</name>
<description>Lock Status.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P23</name>
<description>Lock Status.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P24</name>
<description>Lock Status.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P25</name>
<description>Lock Status.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P26</name>
<description>Lock Status.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P27</name>
<description>Lock Status.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P28</name>
<description>Lock Status.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P29</name>
<description>Lock Status.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P30</name>
<description>Lock Status.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P31</name>
<description>Lock Status.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>WPMR</name>
<description>Write Protect Mode Register</description>
<addressOffset>0x000000E4</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>WPEN</name>
<description>Write Protect Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>WPKEY</name>
<description>Write Protect KEY</description>
<bitOffset>8</bitOffset>
<bitWidth>24</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>WPSR</name>
<description>Write Protect Status Register</description>
<addressOffset>0x000000E8</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>WPVS</name>
<description>Write Protect Violation Status</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>WPVSRC</name>
<description>Write Protect Violation Source</description>
<bitOffset>8</bitOffset>
<bitWidth>16</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>SCHMITT</name>
<description>Schmitt Trigger Register</description>
<addressOffset>0x00000100</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SCHMITT0</name>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT1</name>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT2</name>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT3</name>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT4</name>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT5</name>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT6</name>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT7</name>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT8</name>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT9</name>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT10</name>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT11</name>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT12</name>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT13</name>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT14</name>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT15</name>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT16</name>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT17</name>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT18</name>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT19</name>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT20</name>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT21</name>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT22</name>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT23</name>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT24</name>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT25</name>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT26</name>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT27</name>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT28</name>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT29</name>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT30</name>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT31</name>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DRIVER1</name>
<description>I/O Drive Register 1</description>
<addressOffset>0x00000118</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>LINE0</name>
<description>Drive of PIO Line 0</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE1</name>
<description>Drive of PIO Line 1</description>
<bitOffset>2</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE2</name>
<description>Drive of PIO Line 2</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE3</name>
<description>Drive of PIO Line 3</description>
<bitOffset>6</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE4</name>
<description>Drive of PIO Line 4</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE5</name>
<description>Drive of PIO Line 5</description>
<bitOffset>10</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE6</name>
<description>Drive of PIO Line 6</description>
<bitOffset>12</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE7</name>
<description>Drive of PIO Line 7</description>
<bitOffset>14</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE8</name>
<description>Drive of PIO Line 8</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE9</name>
<description>Drive of PIO Line 9</description>
<bitOffset>18</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE10</name>
<description>Drive of PIO Line 10</description>
<bitOffset>20</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE11</name>
<description>Drive of PIO Line 11</description>
<bitOffset>22</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE12</name>
<description>Drive of PIO Line 12</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE13</name>
<description>Drive of PIO Line 13</description>
<bitOffset>26</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE14</name>
<description>Drive of PIO Line 14</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE15</name>
<description>Drive of PIO Line 15</description>
<bitOffset>30</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>DRIVER2</name>
<description>I/O Drive Register 2</description>
<addressOffset>0x0000011C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>LINE16</name>
<description>Drive of PIO line 16</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE17</name>
<description>Drive of PIO line 17</description>
<bitOffset>2</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE18</name>
<description>Drive of PIO line 18</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE19</name>
<description>Drive of PIO line 19</description>
<bitOffset>6</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE20</name>
<description>Drive of PIO line 20</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE21</name>
<description>Drive of PIO line 21</description>
<bitOffset>10</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE22</name>
<description>Drive of PIO line 22</description>
<bitOffset>12</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE23</name>
<description>Drive of PIO line 23</description>
<bitOffset>14</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE24</name>
<description>Drive of PIO line 24</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE25</name>
<description>Drive of PIO line 25</description>
<bitOffset>18</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE26</name>
<description>Drive of PIO line 26</description>
<bitOffset>20</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE27</name>
<description>Drive of PIO line 27</description>
<bitOffset>22</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE28</name>
<description>Drive of PIO line 28</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE29</name>
<description>Drive of PIO line 29</description>
<bitOffset>26</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE30</name>
<description>Drive of PIO line 30</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE31</name>
<description>Drive of PIO line 31</description>
<bitOffset>30</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>PIOD</name>
<version>11004H</version>
<description>Parallel Input/Output Controller D</description>
<groupName>PIO</groupName>
<prependToName>PIOD_</prependToName>
<baseAddress>0xFFFFF800</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x200</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>PIOD</name>
<value>9</value>
</interrupt>
<registers>
<register>
<name>PER</name>
<description>PIO Enable Register</description>
<addressOffset>0x00000000</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>PIO Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>PIO Enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>PIO Enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>PIO Enable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>PIO Enable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>PIO Enable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>PIO Enable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>PIO Enable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>PIO Enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>PIO Enable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>PIO Enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>PIO Enable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>PIO Enable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>PIO Enable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>PIO Enable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>PIO Enable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>PIO Enable</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>PIO Enable</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>PIO Enable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>PIO Enable</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>PIO Enable</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>PIO Enable</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>PIO Enable</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>PIO Enable</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>PIO Enable</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>PIO Enable</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>PIO Enable</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>PIO Enable</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>PIO Enable</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>PIO Enable</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>PIO Enable</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>PIO Enable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>PDR</name>
<description>PIO Disable Register</description>
<addressOffset>0x00000004</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>PIO Disable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>PIO Disable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>PIO Disable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>PIO Disable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>PIO Disable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>PIO Disable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>PIO Disable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>PIO Disable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>PIO Disable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>PIO Disable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>PIO Disable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>PIO Disable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>PIO Disable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>PIO Disable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>PIO Disable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>PIO Disable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>PIO Disable</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>PIO Disable</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>PIO Disable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>PIO Disable</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>PIO Disable</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>PIO Disable</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>PIO Disable</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>PIO Disable</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>PIO Disable</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>PIO Disable</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>PIO Disable</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>PIO Disable</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>PIO Disable</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>PIO Disable</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>PIO Disable</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>PIO Disable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>PSR</name>
<description>PIO Status Register</description>
<addressOffset>0x00000008</addressOffset>
<size>32</size>
<access>read-only</access>
<fields>
<field>
<name>P0</name>
<description>PIO Status</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P1</name>
<description>PIO Status</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P2</name>
<description>PIO Status</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P3</name>
<description>PIO Status</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P4</name>
<description>PIO Status</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P5</name>
<description>PIO Status</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P6</name>
<description>PIO Status</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P7</name>
<description>PIO Status</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P8</name>
<description>PIO Status</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P9</name>
<description>PIO Status</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P10</name>
<description>PIO Status</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P11</name>
<description>PIO Status</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P12</name>
<description>PIO Status</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P13</name>
<description>PIO Status</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P14</name>
<description>PIO Status</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P15</name>
<description>PIO Status</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P16</name>
<description>PIO Status</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P17</name>
<description>PIO Status</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P18</name>
<description>PIO Status</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P19</name>
<description>PIO Status</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P20</name>
<description>PIO Status</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P21</name>
<description>PIO Status</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P22</name>
<description>PIO Status</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P23</name>
<description>PIO Status</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P24</name>
<description>PIO Status</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P25</name>
<description>PIO Status</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P26</name>
<description>PIO Status</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P27</name>
<description>PIO Status</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P28</name>
<description>PIO Status</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P29</name>
<description>PIO Status</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P30</name>
<description>PIO Status</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P31</name>
<description>PIO Status</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>OER</name>
<description>Output Enable Register</description>
<addressOffset>0x00000010</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Output Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Output Enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Output Enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Output Enable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Output Enable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Output Enable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Output Enable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Output Enable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Output Enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Output Enable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Output Enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Output Enable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Output Enable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Output Enable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Output Enable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Output Enable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Output Enable</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Output Enable</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Output Enable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Output Enable</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Output Enable</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Output Enable</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Output Enable</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Output Enable</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Output Enable</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Output Enable</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Output Enable</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Output Enable</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Output Enable</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Output Enable</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Output Enable</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Output Enable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>ODR</name>
<description>Output Disable Register</description>
<addressOffset>0x00000014</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Output Disable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Output Disable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Output Disable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Output Disable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Output Disable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Output Disable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Output Disable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Output Disable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Output Disable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Output Disable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Output Disable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Output Disable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Output Disable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Output Disable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Output Disable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Output Disable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Output Disable</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Output Disable</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Output Disable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Output Disable</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Output Disable</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Output Disable</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Output Disable</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Output Disable</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Output Disable</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Output Disable</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Output Disable</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Output Disable</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Output Disable</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Output Disable</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Output Disable</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Output Disable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>OSR</name>
<description>Output Status Register</description>
<addressOffset>0x00000018</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>P0</name>
<description>Output Status</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P1</name>
<description>Output Status</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P2</name>
<description>Output Status</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P3</name>
<description>Output Status</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P4</name>
<description>Output Status</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P5</name>
<description>Output Status</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P6</name>
<description>Output Status</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P7</name>
<description>Output Status</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P8</name>
<description>Output Status</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P9</name>
<description>Output Status</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P10</name>
<description>Output Status</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P11</name>
<description>Output Status</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P12</name>
<description>Output Status</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P13</name>
<description>Output Status</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P14</name>
<description>Output Status</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P15</name>
<description>Output Status</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P16</name>
<description>Output Status</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P17</name>
<description>Output Status</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P18</name>
<description>Output Status</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P19</name>
<description>Output Status</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P20</name>
<description>Output Status</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P21</name>
<description>Output Status</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P22</name>
<description>Output Status</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P23</name>
<description>Output Status</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P24</name>
<description>Output Status</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P25</name>
<description>Output Status</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P26</name>
<description>Output Status</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P27</name>
<description>Output Status</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P28</name>
<description>Output Status</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P29</name>
<description>Output Status</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P30</name>
<description>Output Status</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P31</name>
<description>Output Status</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>IFER</name>
<description>Glitch Input Filter Enable Register</description>
<addressOffset>0x00000020</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Input Filter Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Input Filter Enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Input Filter Enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Input Filter Enable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Input Filter Enable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Input Filter Enable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Input Filter Enable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Input Filter Enable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Input Filter Enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Input Filter Enable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Input Filter Enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Input Filter Enable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Input Filter Enable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Input Filter Enable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Input Filter Enable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Input Filter Enable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Input Filter Enable</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Input Filter Enable</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Input Filter Enable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Input Filter Enable</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Input Filter Enable</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Input Filter Enable</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Input Filter Enable</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Input Filter Enable</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Input Filter Enable</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Input Filter Enable</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Input Filter Enable</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Input Filter Enable</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Input Filter Enable</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Input Filter Enable</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Input Filter Enable</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Input Filter Enable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IFDR</name>
<description>Glitch Input Filter Disable Register</description>
<addressOffset>0x00000024</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Input Filter Disable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Input Filter Disable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Input Filter Disable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Input Filter Disable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Input Filter Disable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Input Filter Disable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Input Filter Disable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Input Filter Disable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Input Filter Disable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Input Filter Disable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Input Filter Disable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Input Filter Disable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Input Filter Disable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Input Filter Disable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Input Filter Disable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Input Filter Disable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Input Filter Disable</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Input Filter Disable</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Input Filter Disable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Input Filter Disable</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Input Filter Disable</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Input Filter Disable</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Input Filter Disable</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Input Filter Disable</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Input Filter Disable</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Input Filter Disable</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Input Filter Disable</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Input Filter Disable</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Input Filter Disable</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Input Filter Disable</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Input Filter Disable</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Input Filter Disable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IFSR</name>
<description>Glitch Input Filter Status Register</description>
<addressOffset>0x00000028</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>P0</name>
<description>Input Filer Status</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P1</name>
<description>Input Filer Status</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P2</name>
<description>Input Filer Status</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P3</name>
<description>Input Filer Status</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P4</name>
<description>Input Filer Status</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P5</name>
<description>Input Filer Status</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P6</name>
<description>Input Filer Status</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P7</name>
<description>Input Filer Status</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P8</name>
<description>Input Filer Status</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P9</name>
<description>Input Filer Status</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P10</name>
<description>Input Filer Status</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P11</name>
<description>Input Filer Status</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P12</name>
<description>Input Filer Status</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P13</name>
<description>Input Filer Status</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P14</name>
<description>Input Filer Status</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P15</name>
<description>Input Filer Status</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P16</name>
<description>Input Filer Status</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P17</name>
<description>Input Filer Status</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P18</name>
<description>Input Filer Status</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P19</name>
<description>Input Filer Status</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P20</name>
<description>Input Filer Status</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P21</name>
<description>Input Filer Status</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P22</name>
<description>Input Filer Status</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P23</name>
<description>Input Filer Status</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P24</name>
<description>Input Filer Status</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P25</name>
<description>Input Filer Status</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P26</name>
<description>Input Filer Status</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P27</name>
<description>Input Filer Status</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P28</name>
<description>Input Filer Status</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P29</name>
<description>Input Filer Status</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P30</name>
<description>Input Filer Status</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P31</name>
<description>Input Filer Status</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>SODR</name>
<description>Set Output Data Register</description>
<addressOffset>0x00000030</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Set Output Data</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Set Output Data</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Set Output Data</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Set Output Data</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Set Output Data</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Set Output Data</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Set Output Data</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Set Output Data</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Set Output Data</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Set Output Data</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Set Output Data</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Set Output Data</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Set Output Data</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Set Output Data</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Set Output Data</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Set Output Data</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Set Output Data</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Set Output Data</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Set Output Data</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Set Output Data</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Set Output Data</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Set Output Data</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Set Output Data</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Set Output Data</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Set Output Data</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Set Output Data</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Set Output Data</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Set Output Data</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Set Output Data</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Set Output Data</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Set Output Data</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Set Output Data</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>CODR</name>
<description>Clear Output Data Register</description>
<addressOffset>0x00000034</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Clear Output Data</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Clear Output Data</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Clear Output Data</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Clear Output Data</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Clear Output Data</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Clear Output Data</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Clear Output Data</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Clear Output Data</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Clear Output Data</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Clear Output Data</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Clear Output Data</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Clear Output Data</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Clear Output Data</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Clear Output Data</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Clear Output Data</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Clear Output Data</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Clear Output Data</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Clear Output Data</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Clear Output Data</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Clear Output Data</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Clear Output Data</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Clear Output Data</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Clear Output Data</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Clear Output Data</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Clear Output Data</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Clear Output Data</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Clear Output Data</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Clear Output Data</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Clear Output Data</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Clear Output Data</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Clear Output Data</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Clear Output Data</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>ODSR</name>
<description>Output Data Status Register</description>
<addressOffset>0x00000038</addressOffset>
<size>32</size>
<access>read-write</access>
<fields>
<field>
<name>P0</name>
<description>Output Data Status</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P1</name>
<description>Output Data Status</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P2</name>
<description>Output Data Status</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P3</name>
<description>Output Data Status</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P4</name>
<description>Output Data Status</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P5</name>
<description>Output Data Status</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P6</name>
<description>Output Data Status</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P7</name>
<description>Output Data Status</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P8</name>
<description>Output Data Status</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P9</name>
<description>Output Data Status</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P10</name>
<description>Output Data Status</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P11</name>
<description>Output Data Status</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P12</name>
<description>Output Data Status</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P13</name>
<description>Output Data Status</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P14</name>
<description>Output Data Status</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P15</name>
<description>Output Data Status</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P16</name>
<description>Output Data Status</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P17</name>
<description>Output Data Status</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P18</name>
<description>Output Data Status</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P19</name>
<description>Output Data Status</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P20</name>
<description>Output Data Status</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P21</name>
<description>Output Data Status</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P22</name>
<description>Output Data Status</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P23</name>
<description>Output Data Status</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P24</name>
<description>Output Data Status</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P25</name>
<description>Output Data Status</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P26</name>
<description>Output Data Status</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P27</name>
<description>Output Data Status</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P28</name>
<description>Output Data Status</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P29</name>
<description>Output Data Status</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P30</name>
<description>Output Data Status</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P31</name>
<description>Output Data Status</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>PDSR</name>
<description>Pin Data Status Register</description>
<addressOffset>0x0000003C</addressOffset>
<size>32</size>
<access>read-only</access>
<fields>
<field>
<name>P0</name>
<description>Output Data Status</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P1</name>
<description>Output Data Status</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P2</name>
<description>Output Data Status</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P3</name>
<description>Output Data Status</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P4</name>
<description>Output Data Status</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P5</name>
<description>Output Data Status</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P6</name>
<description>Output Data Status</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P7</name>
<description>Output Data Status</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P8</name>
<description>Output Data Status</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P9</name>
<description>Output Data Status</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P10</name>
<description>Output Data Status</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P11</name>
<description>Output Data Status</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P12</name>
<description>Output Data Status</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P13</name>
<description>Output Data Status</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P14</name>
<description>Output Data Status</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P15</name>
<description>Output Data Status</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P16</name>
<description>Output Data Status</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P17</name>
<description>Output Data Status</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P18</name>
<description>Output Data Status</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P19</name>
<description>Output Data Status</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P20</name>
<description>Output Data Status</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P21</name>
<description>Output Data Status</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P22</name>
<description>Output Data Status</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P23</name>
<description>Output Data Status</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P24</name>
<description>Output Data Status</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P25</name>
<description>Output Data Status</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P26</name>
<description>Output Data Status</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P27</name>
<description>Output Data Status</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P28</name>
<description>Output Data Status</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P29</name>
<description>Output Data Status</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P30</name>
<description>Output Data Status</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P31</name>
<description>Output Data Status</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>IER</name>
<description>Interrupt Enable Register</description>
<addressOffset>0x00000040</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IDR</name>
<description>Interrupt Disable Register</description>
<addressOffset>0x00000044</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IMR</name>
<description>Interrupt Mask Register</description>
<addressOffset>0x00000048</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>P0</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P1</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P2</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P3</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P4</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P5</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P6</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P7</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P8</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P9</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P10</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P11</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P12</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P13</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P14</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P15</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P16</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P17</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P18</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P19</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P20</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P21</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P22</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P23</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P24</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P25</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P26</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P27</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P28</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P29</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P30</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P31</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>ISR</name>
<description>Interrupt Status Register</description>
<addressOffset>0x0000004C</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>P0</name>
<description>Input Change Interrupt Status</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P1</name>
<description>Input Change Interrupt Status</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P2</name>
<description>Input Change Interrupt Status</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P3</name>
<description>Input Change Interrupt Status</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P4</name>
<description>Input Change Interrupt Status</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P5</name>
<description>Input Change Interrupt Status</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P6</name>
<description>Input Change Interrupt Status</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P7</name>
<description>Input Change Interrupt Status</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P8</name>
<description>Input Change Interrupt Status</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P9</name>
<description>Input Change Interrupt Status</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P10</name>
<description>Input Change Interrupt Status</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P11</name>
<description>Input Change Interrupt Status</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P12</name>
<description>Input Change Interrupt Status</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P13</name>
<description>Input Change Interrupt Status</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P14</name>
<description>Input Change Interrupt Status</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P15</name>
<description>Input Change Interrupt Status</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P16</name>
<description>Input Change Interrupt Status</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P17</name>
<description>Input Change Interrupt Status</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P18</name>
<description>Input Change Interrupt Status</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P19</name>
<description>Input Change Interrupt Status</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P20</name>
<description>Input Change Interrupt Status</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P21</name>
<description>Input Change Interrupt Status</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P22</name>
<description>Input Change Interrupt Status</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P23</name>
<description>Input Change Interrupt Status</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P24</name>
<description>Input Change Interrupt Status</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P25</name>
<description>Input Change Interrupt Status</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P26</name>
<description>Input Change Interrupt Status</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P27</name>
<description>Input Change Interrupt Status</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P28</name>
<description>Input Change Interrupt Status</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P29</name>
<description>Input Change Interrupt Status</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P30</name>
<description>Input Change Interrupt Status</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P31</name>
<description>Input Change Interrupt Status</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>MDER</name>
<description>Multi-driver Enable Register</description>
<addressOffset>0x00000050</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Multi Drive Enable.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Multi Drive Enable.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Multi Drive Enable.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Multi Drive Enable.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Multi Drive Enable.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Multi Drive Enable.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Multi Drive Enable.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Multi Drive Enable.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Multi Drive Enable.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Multi Drive Enable.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Multi Drive Enable.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Multi Drive Enable.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Multi Drive Enable.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Multi Drive Enable.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Multi Drive Enable.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Multi Drive Enable.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Multi Drive Enable.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Multi Drive Enable.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Multi Drive Enable.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Multi Drive Enable.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Multi Drive Enable.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Multi Drive Enable.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Multi Drive Enable.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Multi Drive Enable.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Multi Drive Enable.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Multi Drive Enable.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Multi Drive Enable.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Multi Drive Enable.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Multi Drive Enable.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Multi Drive Enable.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Multi Drive Enable.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Multi Drive Enable.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>MDDR</name>
<description>Multi-driver Disable Register</description>
<addressOffset>0x00000054</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Multi Drive Disable.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Multi Drive Disable.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Multi Drive Disable.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Multi Drive Disable.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Multi Drive Disable.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Multi Drive Disable.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Multi Drive Disable.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Multi Drive Disable.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Multi Drive Disable.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Multi Drive Disable.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Multi Drive Disable.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Multi Drive Disable.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Multi Drive Disable.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Multi Drive Disable.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Multi Drive Disable.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Multi Drive Disable.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Multi Drive Disable.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Multi Drive Disable.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Multi Drive Disable.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Multi Drive Disable.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Multi Drive Disable.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Multi Drive Disable.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Multi Drive Disable.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Multi Drive Disable.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Multi Drive Disable.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Multi Drive Disable.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Multi Drive Disable.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Multi Drive Disable.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Multi Drive Disable.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Multi Drive Disable.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Multi Drive Disable.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Multi Drive Disable.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>MDSR</name>
<description>Multi-driver Status Register</description>
<addressOffset>0x00000058</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>P0</name>
<description>Multi Drive Status.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P1</name>
<description>Multi Drive Status.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P2</name>
<description>Multi Drive Status.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P3</name>
<description>Multi Drive Status.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P4</name>
<description>Multi Drive Status.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P5</name>
<description>Multi Drive Status.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P6</name>
<description>Multi Drive Status.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P7</name>
<description>Multi Drive Status.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P8</name>
<description>Multi Drive Status.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P9</name>
<description>Multi Drive Status.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P10</name>
<description>Multi Drive Status.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P11</name>
<description>Multi Drive Status.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P12</name>
<description>Multi Drive Status.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P13</name>
<description>Multi Drive Status.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P14</name>
<description>Multi Drive Status.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P15</name>
<description>Multi Drive Status.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P16</name>
<description>Multi Drive Status.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P17</name>
<description>Multi Drive Status.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P18</name>
<description>Multi Drive Status.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P19</name>
<description>Multi Drive Status.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P20</name>
<description>Multi Drive Status.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P21</name>
<description>Multi Drive Status.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P22</name>
<description>Multi Drive Status.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P23</name>
<description>Multi Drive Status.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P24</name>
<description>Multi Drive Status.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P25</name>
<description>Multi Drive Status.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P26</name>
<description>Multi Drive Status.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P27</name>
<description>Multi Drive Status.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P28</name>
<description>Multi Drive Status.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P29</name>
<description>Multi Drive Status.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P30</name>
<description>Multi Drive Status.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P31</name>
<description>Multi Drive Status.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>PUDR</name>
<description>Pull-up Disable Register</description>
<addressOffset>0x00000060</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Pull Up Disable.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Pull Up Disable.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Pull Up Disable.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Pull Up Disable.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Pull Up Disable.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Pull Up Disable.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Pull Up Disable.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Pull Up Disable.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Pull Up Disable.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Pull Up Disable.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Pull Up Disable.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Pull Up Disable.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Pull Up Disable.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Pull Up Disable.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Pull Up Disable.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Pull Up Disable.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Pull Up Disable.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Pull Up Disable.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Pull Up Disable.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Pull Up Disable.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Pull Up Disable.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Pull Up Disable.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Pull Up Disable.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Pull Up Disable.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Pull Up Disable.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Pull Up Disable.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Pull Up Disable.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Pull Up Disable.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Pull Up Disable.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Pull Up Disable.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Pull Up Disable.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Pull Up Disable.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>PUER</name>
<description>Pull-up Enable Register</description>
<addressOffset>0x00000064</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Pull Up Enable.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Pull Up Enable.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Pull Up Enable.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Pull Up Enable.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Pull Up Enable.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Pull Up Enable.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Pull Up Enable.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Pull Up Enable.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Pull Up Enable.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Pull Up Enable.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Pull Up Enable.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Pull Up Enable.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Pull Up Enable.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Pull Up Enable.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Pull Up Enable.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Pull Up Enable.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Pull Up Enable.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Pull Up Enable.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Pull Up Enable.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Pull Up Enable.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Pull Up Enable.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Pull Up Enable.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Pull Up Enable.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Pull Up Enable.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Pull Up Enable.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Pull Up Enable.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Pull Up Enable.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Pull Up Enable.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Pull Up Enable.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Pull Up Enable.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Pull Up Enable.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Pull Up Enable.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>PUSR</name>
<description>Pad Pull-up Status Register</description>
<addressOffset>0x00000068</addressOffset>
<size>32</size>
<access>read-only</access>
<fields>
<field>
<name>P0</name>
<description>Pull Up Status.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P1</name>
<description>Pull Up Status.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P2</name>
<description>Pull Up Status.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P3</name>
<description>Pull Up Status.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P4</name>
<description>Pull Up Status.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P5</name>
<description>Pull Up Status.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P6</name>
<description>Pull Up Status.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P7</name>
<description>Pull Up Status.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P8</name>
<description>Pull Up Status.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P9</name>
<description>Pull Up Status.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P10</name>
<description>Pull Up Status.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P11</name>
<description>Pull Up Status.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P12</name>
<description>Pull Up Status.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P13</name>
<description>Pull Up Status.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P14</name>
<description>Pull Up Status.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P15</name>
<description>Pull Up Status.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P16</name>
<description>Pull Up Status.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P17</name>
<description>Pull Up Status.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P18</name>
<description>Pull Up Status.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P19</name>
<description>Pull Up Status.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P20</name>
<description>Pull Up Status.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P21</name>
<description>Pull Up Status.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P22</name>
<description>Pull Up Status.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P23</name>
<description>Pull Up Status.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P24</name>
<description>Pull Up Status.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P25</name>
<description>Pull Up Status.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P26</name>
<description>Pull Up Status.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P27</name>
<description>Pull Up Status.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P28</name>
<description>Pull Up Status.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P29</name>
<description>Pull Up Status.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P30</name>
<description>Pull Up Status.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P31</name>
<description>Pull Up Status.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<dim>2</dim>
<dimIncrement>4</dimIncrement>
<dimIndex>0-1</dimIndex>
<name>ABCDSR[%s]</name>
<description>Peripheral Select Register</description>
<addressOffset>0x00000070</addressOffset>
<size>32</size>
<access>read-write</access>
<fields>
<field>
<name>P0</name>
<description>Peripheral Select.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P1</name>
<description>Peripheral Select.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P2</name>
<description>Peripheral Select.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P3</name>
<description>Peripheral Select.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P4</name>
<description>Peripheral Select.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P5</name>
<description>Peripheral Select.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P6</name>
<description>Peripheral Select.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P7</name>
<description>Peripheral Select.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P8</name>
<description>Peripheral Select.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P9</name>
<description>Peripheral Select.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P10</name>
<description>Peripheral Select.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P11</name>
<description>Peripheral Select.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P12</name>
<description>Peripheral Select.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P13</name>
<description>Peripheral Select.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P14</name>
<description>Peripheral Select.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P15</name>
<description>Peripheral Select.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P16</name>
<description>Peripheral Select.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P17</name>
<description>Peripheral Select.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P18</name>
<description>Peripheral Select.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P19</name>
<description>Peripheral Select.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P20</name>
<description>Peripheral Select.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P21</name>
<description>Peripheral Select.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P22</name>
<description>Peripheral Select.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P23</name>
<description>Peripheral Select.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P24</name>
<description>Peripheral Select.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P25</name>
<description>Peripheral Select.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P26</name>
<description>Peripheral Select.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P27</name>
<description>Peripheral Select.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P28</name>
<description>Peripheral Select.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P29</name>
<description>Peripheral Select.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P30</name>
<description>Peripheral Select.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P31</name>
<description>Peripheral Select.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>IFSCDR</name>
<description>Input Filter Slow Clock Disable Register</description>
<addressOffset>0x00000080</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IFSCER</name>
<description>Input Filter Slow Clock Enable Register</description>
<addressOffset>0x00000084</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IFSCSR</name>
<description>Input Filter Slow Clock Status Register</description>
<addressOffset>0x00000088</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>P0</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P1</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P2</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P3</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P4</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P5</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P6</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P7</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P8</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P9</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P10</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P11</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P12</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P13</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P14</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P15</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P16</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P17</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P18</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P19</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P20</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P21</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P22</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P23</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P24</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P25</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P26</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P27</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P28</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P29</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P30</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P31</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>SCDR</name>
<description>Slow Clock Divider Debouncing Register</description>
<addressOffset>0x0000008C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DIV</name>
<bitOffset>0</bitOffset>
<bitWidth>14</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>PPDDR</name>
<description>Pad Pull-down Disable Register</description>
<addressOffset>0x00000090</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Pull Down Disable.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Pull Down Disable.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Pull Down Disable.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Pull Down Disable.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Pull Down Disable.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Pull Down Disable.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Pull Down Disable.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Pull Down Disable.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Pull Down Disable.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Pull Down Disable.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Pull Down Disable.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Pull Down Disable.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Pull Down Disable.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Pull Down Disable.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Pull Down Disable.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Pull Down Disable.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Pull Down Disable.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Pull Down Disable.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Pull Down Disable.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Pull Down Disable.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Pull Down Disable.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Pull Down Disable.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Pull Down Disable.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Pull Down Disable.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Pull Down Disable.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Pull Down Disable.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Pull Down Disable.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Pull Down Disable.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Pull Down Disable.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Pull Down Disable.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Pull Down Disable.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Pull Down Disable.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>PPDER</name>
<description>Pad Pull-down Enable Register</description>
<addressOffset>0x00000094</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Pull Down Enable.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Pull Down Enable.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Pull Down Enable.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Pull Down Enable.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Pull Down Enable.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Pull Down Enable.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Pull Down Enable.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Pull Down Enable.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Pull Down Enable.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Pull Down Enable.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Pull Down Enable.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Pull Down Enable.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Pull Down Enable.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Pull Down Enable.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Pull Down Enable.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Pull Down Enable.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Pull Down Enable.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Pull Down Enable.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Pull Down Enable.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Pull Down Enable.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Pull Down Enable.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Pull Down Enable.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Pull Down Enable.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Pull Down Enable.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Pull Down Enable.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Pull Down Enable.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Pull Down Enable.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Pull Down Enable.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Pull Down Enable.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Pull Down Enable.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Pull Down Enable.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Pull Down Enable.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>PPDSR</name>
<description>Pad Pull-down Status Register</description>
<addressOffset>0x00000098</addressOffset>
<size>32</size>
<access>read-only</access>
<fields>
<field>
<name>P0</name>
<description>Pull Down Status.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P1</name>
<description>Pull Down Status.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P2</name>
<description>Pull Down Status.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P3</name>
<description>Pull Down Status.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P4</name>
<description>Pull Down Status.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P5</name>
<description>Pull Down Status.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P6</name>
<description>Pull Down Status.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P7</name>
<description>Pull Down Status.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P8</name>
<description>Pull Down Status.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P9</name>
<description>Pull Down Status.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P10</name>
<description>Pull Down Status.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P11</name>
<description>Pull Down Status.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P12</name>
<description>Pull Down Status.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P13</name>
<description>Pull Down Status.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P14</name>
<description>Pull Down Status.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P15</name>
<description>Pull Down Status.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P16</name>
<description>Pull Down Status.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P17</name>
<description>Pull Down Status.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P18</name>
<description>Pull Down Status.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P19</name>
<description>Pull Down Status.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P20</name>
<description>Pull Down Status.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P21</name>
<description>Pull Down Status.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P22</name>
<description>Pull Down Status.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P23</name>
<description>Pull Down Status.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P24</name>
<description>Pull Down Status.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P25</name>
<description>Pull Down Status.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P26</name>
<description>Pull Down Status.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P27</name>
<description>Pull Down Status.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P28</name>
<description>Pull Down Status.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P29</name>
<description>Pull Down Status.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P30</name>
<description>Pull Down Status.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P31</name>
<description>Pull Down Status.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>OWER</name>
<description>Output Write Enable</description>
<addressOffset>0x000000A0</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Output Write Enable.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Output Write Enable.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Output Write Enable.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Output Write Enable.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Output Write Enable.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Output Write Enable.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Output Write Enable.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Output Write Enable.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Output Write Enable.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Output Write Enable.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Output Write Enable.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Output Write Enable.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Output Write Enable.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Output Write Enable.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Output Write Enable.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Output Write Enable.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Output Write Enable.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Output Write Enable.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Output Write Enable.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Output Write Enable.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Output Write Enable.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Output Write Enable.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Output Write Enable.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Output Write Enable.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Output Write Enable.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Output Write Enable.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Output Write Enable.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Output Write Enable.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Output Write Enable.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Output Write Enable.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Output Write Enable.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Output Write Enable.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>OWDR</name>
<description>Output Write Disable</description>
<addressOffset>0x000000A4</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Output Write Disable.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Output Write Disable.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Output Write Disable.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Output Write Disable.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Output Write Disable.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Output Write Disable.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Output Write Disable.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Output Write Disable.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Output Write Disable.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Output Write Disable.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Output Write Disable.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Output Write Disable.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Output Write Disable.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Output Write Disable.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Output Write Disable.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Output Write Disable.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Output Write Disable.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Output Write Disable.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Output Write Disable.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Output Write Disable.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Output Write Disable.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Output Write Disable.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Output Write Disable.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Output Write Disable.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Output Write Disable.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Output Write Disable.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Output Write Disable.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Output Write Disable.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Output Write Disable.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Output Write Disable.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Output Write Disable.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Output Write Disable.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>OWSR</name>
<description>Output Write Status Register</description>
<addressOffset>0x000000A8</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>P0</name>
<description>Output Write Status.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P1</name>
<description>Output Write Status.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P2</name>
<description>Output Write Status.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P3</name>
<description>Output Write Status.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P4</name>
<description>Output Write Status.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P5</name>
<description>Output Write Status.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P6</name>
<description>Output Write Status.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P7</name>
<description>Output Write Status.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P8</name>
<description>Output Write Status.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P9</name>
<description>Output Write Status.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P10</name>
<description>Output Write Status.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P11</name>
<description>Output Write Status.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P12</name>
<description>Output Write Status.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P13</name>
<description>Output Write Status.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P14</name>
<description>Output Write Status.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P15</name>
<description>Output Write Status.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P16</name>
<description>Output Write Status.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P17</name>
<description>Output Write Status.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P18</name>
<description>Output Write Status.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P19</name>
<description>Output Write Status.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P20</name>
<description>Output Write Status.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P21</name>
<description>Output Write Status.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P22</name>
<description>Output Write Status.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P23</name>
<description>Output Write Status.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P24</name>
<description>Output Write Status.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P25</name>
<description>Output Write Status.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P26</name>
<description>Output Write Status.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P27</name>
<description>Output Write Status.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P28</name>
<description>Output Write Status.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P29</name>
<description>Output Write Status.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P30</name>
<description>Output Write Status.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P31</name>
<description>Output Write Status.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>AIMER</name>
<description>Additional Interrupt Modes Enable Register</description>
<addressOffset>0x000000B0</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>AIMDR</name>
<description>Additional Interrupt Modes Disables Register</description>
<addressOffset>0x000000B4</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>AIMMR</name>
<description>Additional Interrupt Modes Mask Register</description>
<addressOffset>0x000000B8</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>P0</name>
<description>Peripheral CD Status.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P1</name>
<description>Peripheral CD Status.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P2</name>
<description>Peripheral CD Status.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P3</name>
<description>Peripheral CD Status.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P4</name>
<description>Peripheral CD Status.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P5</name>
<description>Peripheral CD Status.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P6</name>
<description>Peripheral CD Status.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P7</name>
<description>Peripheral CD Status.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P8</name>
<description>Peripheral CD Status.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P9</name>
<description>Peripheral CD Status.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P10</name>
<description>Peripheral CD Status.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P11</name>
<description>Peripheral CD Status.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P12</name>
<description>Peripheral CD Status.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P13</name>
<description>Peripheral CD Status.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P14</name>
<description>Peripheral CD Status.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P15</name>
<description>Peripheral CD Status.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P16</name>
<description>Peripheral CD Status.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P17</name>
<description>Peripheral CD Status.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P18</name>
<description>Peripheral CD Status.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P19</name>
<description>Peripheral CD Status.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P20</name>
<description>Peripheral CD Status.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P21</name>
<description>Peripheral CD Status.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P22</name>
<description>Peripheral CD Status.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P23</name>
<description>Peripheral CD Status.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P24</name>
<description>Peripheral CD Status.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P25</name>
<description>Peripheral CD Status.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P26</name>
<description>Peripheral CD Status.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P27</name>
<description>Peripheral CD Status.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P28</name>
<description>Peripheral CD Status.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P29</name>
<description>Peripheral CD Status.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P30</name>
<description>Peripheral CD Status.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P31</name>
<description>Peripheral CD Status.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>ESR</name>
<description>Edge Select Register</description>
<addressOffset>0x000000C0</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>LSR</name>
<description>Level Select Register</description>
<addressOffset>0x000000C4</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Level Interrupt Selection.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Level Interrupt Selection.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Level Interrupt Selection.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Level Interrupt Selection.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Level Interrupt Selection.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Level Interrupt Selection.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Level Interrupt Selection.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Level Interrupt Selection.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Level Interrupt Selection.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Level Interrupt Selection.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Level Interrupt Selection.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Level Interrupt Selection.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Level Interrupt Selection.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Level Interrupt Selection.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Level Interrupt Selection.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Level Interrupt Selection.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Level Interrupt Selection.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Level Interrupt Selection.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Level Interrupt Selection.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Level Interrupt Selection.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Level Interrupt Selection.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Level Interrupt Selection.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Level Interrupt Selection.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Level Interrupt Selection.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Level Interrupt Selection.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Level Interrupt Selection.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Level Interrupt Selection.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Level Interrupt Selection.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Level Interrupt Selection.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Level Interrupt Selection.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Level Interrupt Selection.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Level Interrupt Selection.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>ELSR</name>
<description>Edge/Level Status Register</description>
<addressOffset>0x000000C8</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>P0</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P1</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P2</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P3</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P4</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P5</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P6</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P7</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P8</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P9</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P10</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P11</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P12</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P13</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P14</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P15</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P16</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P17</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P18</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P19</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P20</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P21</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P22</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P23</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P24</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P25</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P26</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P27</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P28</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P29</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P30</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P31</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>FELLSR</name>
<description>Falling Edge/Low Level Select Register</description>
<addressOffset>0x000000D0</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>REHLSR</name>
<description>Rising Edge/ High Level Select Register</description>
<addressOffset>0x000000D4</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>FRLHSR</name>
<description>Fall/Rise - Low/High Status Register</description>
<addressOffset>0x000000D8</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>P0</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P1</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P2</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P3</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P4</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P5</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P6</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P7</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P8</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P9</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P10</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P11</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P12</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P13</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P14</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P15</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P16</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P17</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P18</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P19</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P20</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P21</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P22</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P23</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P24</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P25</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P26</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P27</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P28</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P29</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P30</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P31</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>LOCKSR</name>
<description>Lock Status</description>
<addressOffset>0x000000E0</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>P0</name>
<description>Lock Status.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P1</name>
<description>Lock Status.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P2</name>
<description>Lock Status.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P3</name>
<description>Lock Status.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P4</name>
<description>Lock Status.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P5</name>
<description>Lock Status.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P6</name>
<description>Lock Status.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P7</name>
<description>Lock Status.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P8</name>
<description>Lock Status.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P9</name>
<description>Lock Status.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P10</name>
<description>Lock Status.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P11</name>
<description>Lock Status.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P12</name>
<description>Lock Status.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P13</name>
<description>Lock Status.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P14</name>
<description>Lock Status.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P15</name>
<description>Lock Status.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P16</name>
<description>Lock Status.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P17</name>
<description>Lock Status.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P18</name>
<description>Lock Status.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P19</name>
<description>Lock Status.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P20</name>
<description>Lock Status.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P21</name>
<description>Lock Status.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P22</name>
<description>Lock Status.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P23</name>
<description>Lock Status.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P24</name>
<description>Lock Status.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P25</name>
<description>Lock Status.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P26</name>
<description>Lock Status.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P27</name>
<description>Lock Status.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P28</name>
<description>Lock Status.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P29</name>
<description>Lock Status.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P30</name>
<description>Lock Status.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P31</name>
<description>Lock Status.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>WPMR</name>
<description>Write Protect Mode Register</description>
<addressOffset>0x000000E4</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>WPEN</name>
<description>Write Protect Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>WPKEY</name>
<description>Write Protect KEY</description>
<bitOffset>8</bitOffset>
<bitWidth>24</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>WPSR</name>
<description>Write Protect Status Register</description>
<addressOffset>0x000000E8</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>WPVS</name>
<description>Write Protect Violation Status</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>WPVSRC</name>
<description>Write Protect Violation Source</description>
<bitOffset>8</bitOffset>
<bitWidth>16</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>SCHMITT</name>
<description>Schmitt Trigger Register</description>
<addressOffset>0x00000100</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SCHMITT0</name>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT1</name>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT2</name>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT3</name>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT4</name>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT5</name>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT6</name>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT7</name>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT8</name>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT9</name>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT10</name>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT11</name>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT12</name>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT13</name>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT14</name>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT15</name>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT16</name>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT17</name>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT18</name>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT19</name>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT20</name>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT21</name>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT22</name>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT23</name>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT24</name>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT25</name>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT26</name>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT27</name>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT28</name>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT29</name>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT30</name>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT31</name>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DRIVER1</name>
<description>I/O Drive Register 1</description>
<addressOffset>0x00000118</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>LINE0</name>
<description>Drive of PIO Line 0</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE1</name>
<description>Drive of PIO Line 1</description>
<bitOffset>2</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE2</name>
<description>Drive of PIO Line 2</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE3</name>
<description>Drive of PIO Line 3</description>
<bitOffset>6</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE4</name>
<description>Drive of PIO Line 4</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE5</name>
<description>Drive of PIO Line 5</description>
<bitOffset>10</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE6</name>
<description>Drive of PIO Line 6</description>
<bitOffset>12</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE7</name>
<description>Drive of PIO Line 7</description>
<bitOffset>14</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE8</name>
<description>Drive of PIO Line 8</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE9</name>
<description>Drive of PIO Line 9</description>
<bitOffset>18</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE10</name>
<description>Drive of PIO Line 10</description>
<bitOffset>20</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE11</name>
<description>Drive of PIO Line 11</description>
<bitOffset>22</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE12</name>
<description>Drive of PIO Line 12</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE13</name>
<description>Drive of PIO Line 13</description>
<bitOffset>26</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE14</name>
<description>Drive of PIO Line 14</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE15</name>
<description>Drive of PIO Line 15</description>
<bitOffset>30</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>DRIVER2</name>
<description>I/O Drive Register 2</description>
<addressOffset>0x0000011C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>LINE16</name>
<description>Drive of PIO line 16</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE17</name>
<description>Drive of PIO line 17</description>
<bitOffset>2</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE18</name>
<description>Drive of PIO line 18</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE19</name>
<description>Drive of PIO line 19</description>
<bitOffset>6</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE20</name>
<description>Drive of PIO line 20</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE21</name>
<description>Drive of PIO line 21</description>
<bitOffset>10</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE22</name>
<description>Drive of PIO line 22</description>
<bitOffset>12</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE23</name>
<description>Drive of PIO line 23</description>
<bitOffset>14</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE24</name>
<description>Drive of PIO line 24</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE25</name>
<description>Drive of PIO line 25</description>
<bitOffset>18</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE26</name>
<description>Drive of PIO line 26</description>
<bitOffset>20</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE27</name>
<description>Drive of PIO line 27</description>
<bitOffset>22</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE28</name>
<description>Drive of PIO line 28</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE29</name>
<description>Drive of PIO line 29</description>
<bitOffset>26</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE30</name>
<description>Drive of PIO line 30</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE31</name>
<description>Drive of PIO line 31</description>
<bitOffset>30</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>PIOE</name>
<version>11004H</version>
<description>Parallel Input/Output Controller E</description>
<groupName>PIO</groupName>
<prependToName>PIOE_</prependToName>
<baseAddress>0xFFFFFA00</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x200</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>PIOE</name>
<value>10</value>
</interrupt>
<registers>
<register>
<name>PER</name>
<description>PIO Enable Register</description>
<addressOffset>0x00000000</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>PIO Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>PIO Enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>PIO Enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>PIO Enable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>PIO Enable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>PIO Enable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>PIO Enable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>PIO Enable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>PIO Enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>PIO Enable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>PIO Enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>PIO Enable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>PIO Enable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>PIO Enable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>PIO Enable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>PIO Enable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>PIO Enable</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>PIO Enable</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>PIO Enable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>PIO Enable</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>PIO Enable</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>PIO Enable</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>PIO Enable</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>PIO Enable</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>PIO Enable</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>PIO Enable</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>PIO Enable</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>PIO Enable</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>PIO Enable</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>PIO Enable</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>PIO Enable</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>PIO Enable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>PDR</name>
<description>PIO Disable Register</description>
<addressOffset>0x00000004</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>PIO Disable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>PIO Disable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>PIO Disable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>PIO Disable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>PIO Disable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>PIO Disable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>PIO Disable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>PIO Disable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>PIO Disable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>PIO Disable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>PIO Disable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>PIO Disable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>PIO Disable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>PIO Disable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>PIO Disable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>PIO Disable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>PIO Disable</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>PIO Disable</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>PIO Disable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>PIO Disable</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>PIO Disable</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>PIO Disable</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>PIO Disable</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>PIO Disable</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>PIO Disable</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>PIO Disable</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>PIO Disable</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>PIO Disable</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>PIO Disable</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>PIO Disable</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>PIO Disable</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>PIO Disable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>PSR</name>
<description>PIO Status Register</description>
<addressOffset>0x00000008</addressOffset>
<size>32</size>
<access>read-only</access>
<fields>
<field>
<name>P0</name>
<description>PIO Status</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P1</name>
<description>PIO Status</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P2</name>
<description>PIO Status</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P3</name>
<description>PIO Status</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P4</name>
<description>PIO Status</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P5</name>
<description>PIO Status</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P6</name>
<description>PIO Status</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P7</name>
<description>PIO Status</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P8</name>
<description>PIO Status</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P9</name>
<description>PIO Status</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P10</name>
<description>PIO Status</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P11</name>
<description>PIO Status</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P12</name>
<description>PIO Status</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P13</name>
<description>PIO Status</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P14</name>
<description>PIO Status</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P15</name>
<description>PIO Status</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P16</name>
<description>PIO Status</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P17</name>
<description>PIO Status</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P18</name>
<description>PIO Status</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P19</name>
<description>PIO Status</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P20</name>
<description>PIO Status</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P21</name>
<description>PIO Status</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P22</name>
<description>PIO Status</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P23</name>
<description>PIO Status</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P24</name>
<description>PIO Status</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P25</name>
<description>PIO Status</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P26</name>
<description>PIO Status</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P27</name>
<description>PIO Status</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P28</name>
<description>PIO Status</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P29</name>
<description>PIO Status</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P30</name>
<description>PIO Status</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P31</name>
<description>PIO Status</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>OER</name>
<description>Output Enable Register</description>
<addressOffset>0x00000010</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Output Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Output Enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Output Enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Output Enable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Output Enable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Output Enable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Output Enable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Output Enable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Output Enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Output Enable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Output Enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Output Enable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Output Enable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Output Enable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Output Enable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Output Enable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Output Enable</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Output Enable</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Output Enable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Output Enable</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Output Enable</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Output Enable</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Output Enable</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Output Enable</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Output Enable</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Output Enable</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Output Enable</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Output Enable</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Output Enable</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Output Enable</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Output Enable</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Output Enable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>ODR</name>
<description>Output Disable Register</description>
<addressOffset>0x00000014</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Output Disable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Output Disable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Output Disable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Output Disable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Output Disable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Output Disable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Output Disable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Output Disable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Output Disable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Output Disable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Output Disable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Output Disable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Output Disable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Output Disable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Output Disable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Output Disable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Output Disable</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Output Disable</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Output Disable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Output Disable</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Output Disable</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Output Disable</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Output Disable</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Output Disable</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Output Disable</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Output Disable</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Output Disable</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Output Disable</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Output Disable</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Output Disable</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Output Disable</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Output Disable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>OSR</name>
<description>Output Status Register</description>
<addressOffset>0x00000018</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>P0</name>
<description>Output Status</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P1</name>
<description>Output Status</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P2</name>
<description>Output Status</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P3</name>
<description>Output Status</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P4</name>
<description>Output Status</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P5</name>
<description>Output Status</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P6</name>
<description>Output Status</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P7</name>
<description>Output Status</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P8</name>
<description>Output Status</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P9</name>
<description>Output Status</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P10</name>
<description>Output Status</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P11</name>
<description>Output Status</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P12</name>
<description>Output Status</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P13</name>
<description>Output Status</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P14</name>
<description>Output Status</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P15</name>
<description>Output Status</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P16</name>
<description>Output Status</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P17</name>
<description>Output Status</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P18</name>
<description>Output Status</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P19</name>
<description>Output Status</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P20</name>
<description>Output Status</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P21</name>
<description>Output Status</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P22</name>
<description>Output Status</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P23</name>
<description>Output Status</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P24</name>
<description>Output Status</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P25</name>
<description>Output Status</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P26</name>
<description>Output Status</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P27</name>
<description>Output Status</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P28</name>
<description>Output Status</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P29</name>
<description>Output Status</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P30</name>
<description>Output Status</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P31</name>
<description>Output Status</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>IFER</name>
<description>Glitch Input Filter Enable Register</description>
<addressOffset>0x00000020</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Input Filter Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Input Filter Enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Input Filter Enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Input Filter Enable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Input Filter Enable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Input Filter Enable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Input Filter Enable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Input Filter Enable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Input Filter Enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Input Filter Enable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Input Filter Enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Input Filter Enable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Input Filter Enable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Input Filter Enable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Input Filter Enable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Input Filter Enable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Input Filter Enable</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Input Filter Enable</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Input Filter Enable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Input Filter Enable</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Input Filter Enable</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Input Filter Enable</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Input Filter Enable</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Input Filter Enable</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Input Filter Enable</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Input Filter Enable</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Input Filter Enable</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Input Filter Enable</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Input Filter Enable</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Input Filter Enable</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Input Filter Enable</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Input Filter Enable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IFDR</name>
<description>Glitch Input Filter Disable Register</description>
<addressOffset>0x00000024</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Input Filter Disable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Input Filter Disable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Input Filter Disable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Input Filter Disable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Input Filter Disable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Input Filter Disable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Input Filter Disable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Input Filter Disable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Input Filter Disable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Input Filter Disable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Input Filter Disable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Input Filter Disable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Input Filter Disable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Input Filter Disable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Input Filter Disable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Input Filter Disable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Input Filter Disable</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Input Filter Disable</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Input Filter Disable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Input Filter Disable</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Input Filter Disable</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Input Filter Disable</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Input Filter Disable</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Input Filter Disable</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Input Filter Disable</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Input Filter Disable</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Input Filter Disable</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Input Filter Disable</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Input Filter Disable</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Input Filter Disable</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Input Filter Disable</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Input Filter Disable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IFSR</name>
<description>Glitch Input Filter Status Register</description>
<addressOffset>0x00000028</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>P0</name>
<description>Input Filer Status</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P1</name>
<description>Input Filer Status</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P2</name>
<description>Input Filer Status</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P3</name>
<description>Input Filer Status</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P4</name>
<description>Input Filer Status</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P5</name>
<description>Input Filer Status</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P6</name>
<description>Input Filer Status</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P7</name>
<description>Input Filer Status</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P8</name>
<description>Input Filer Status</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P9</name>
<description>Input Filer Status</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P10</name>
<description>Input Filer Status</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P11</name>
<description>Input Filer Status</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P12</name>
<description>Input Filer Status</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P13</name>
<description>Input Filer Status</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P14</name>
<description>Input Filer Status</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P15</name>
<description>Input Filer Status</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P16</name>
<description>Input Filer Status</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P17</name>
<description>Input Filer Status</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P18</name>
<description>Input Filer Status</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P19</name>
<description>Input Filer Status</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P20</name>
<description>Input Filer Status</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P21</name>
<description>Input Filer Status</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P22</name>
<description>Input Filer Status</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P23</name>
<description>Input Filer Status</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P24</name>
<description>Input Filer Status</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P25</name>
<description>Input Filer Status</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P26</name>
<description>Input Filer Status</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P27</name>
<description>Input Filer Status</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P28</name>
<description>Input Filer Status</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P29</name>
<description>Input Filer Status</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P30</name>
<description>Input Filer Status</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P31</name>
<description>Input Filer Status</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>SODR</name>
<description>Set Output Data Register</description>
<addressOffset>0x00000030</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Set Output Data</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Set Output Data</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Set Output Data</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Set Output Data</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Set Output Data</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Set Output Data</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Set Output Data</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Set Output Data</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Set Output Data</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Set Output Data</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Set Output Data</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Set Output Data</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Set Output Data</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Set Output Data</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Set Output Data</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Set Output Data</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Set Output Data</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Set Output Data</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Set Output Data</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Set Output Data</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Set Output Data</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Set Output Data</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Set Output Data</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Set Output Data</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Set Output Data</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Set Output Data</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Set Output Data</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Set Output Data</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Set Output Data</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Set Output Data</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Set Output Data</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Set Output Data</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>CODR</name>
<description>Clear Output Data Register</description>
<addressOffset>0x00000034</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Clear Output Data</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Clear Output Data</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Clear Output Data</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Clear Output Data</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Clear Output Data</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Clear Output Data</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Clear Output Data</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Clear Output Data</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Clear Output Data</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Clear Output Data</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Clear Output Data</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Clear Output Data</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Clear Output Data</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Clear Output Data</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Clear Output Data</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Clear Output Data</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Clear Output Data</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Clear Output Data</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Clear Output Data</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Clear Output Data</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Clear Output Data</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Clear Output Data</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Clear Output Data</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Clear Output Data</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Clear Output Data</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Clear Output Data</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Clear Output Data</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Clear Output Data</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Clear Output Data</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Clear Output Data</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Clear Output Data</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Clear Output Data</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>ODSR</name>
<description>Output Data Status Register</description>
<addressOffset>0x00000038</addressOffset>
<size>32</size>
<access>read-write</access>
<fields>
<field>
<name>P0</name>
<description>Output Data Status</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P1</name>
<description>Output Data Status</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P2</name>
<description>Output Data Status</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P3</name>
<description>Output Data Status</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P4</name>
<description>Output Data Status</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P5</name>
<description>Output Data Status</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P6</name>
<description>Output Data Status</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P7</name>
<description>Output Data Status</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P8</name>
<description>Output Data Status</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P9</name>
<description>Output Data Status</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P10</name>
<description>Output Data Status</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P11</name>
<description>Output Data Status</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P12</name>
<description>Output Data Status</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P13</name>
<description>Output Data Status</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P14</name>
<description>Output Data Status</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P15</name>
<description>Output Data Status</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P16</name>
<description>Output Data Status</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P17</name>
<description>Output Data Status</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P18</name>
<description>Output Data Status</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P19</name>
<description>Output Data Status</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P20</name>
<description>Output Data Status</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P21</name>
<description>Output Data Status</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P22</name>
<description>Output Data Status</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P23</name>
<description>Output Data Status</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P24</name>
<description>Output Data Status</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P25</name>
<description>Output Data Status</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P26</name>
<description>Output Data Status</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P27</name>
<description>Output Data Status</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P28</name>
<description>Output Data Status</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P29</name>
<description>Output Data Status</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P30</name>
<description>Output Data Status</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P31</name>
<description>Output Data Status</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>PDSR</name>
<description>Pin Data Status Register</description>
<addressOffset>0x0000003C</addressOffset>
<size>32</size>
<access>read-only</access>
<fields>
<field>
<name>P0</name>
<description>Output Data Status</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P1</name>
<description>Output Data Status</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P2</name>
<description>Output Data Status</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P3</name>
<description>Output Data Status</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P4</name>
<description>Output Data Status</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P5</name>
<description>Output Data Status</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P6</name>
<description>Output Data Status</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P7</name>
<description>Output Data Status</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P8</name>
<description>Output Data Status</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P9</name>
<description>Output Data Status</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P10</name>
<description>Output Data Status</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P11</name>
<description>Output Data Status</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P12</name>
<description>Output Data Status</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P13</name>
<description>Output Data Status</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P14</name>
<description>Output Data Status</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P15</name>
<description>Output Data Status</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P16</name>
<description>Output Data Status</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P17</name>
<description>Output Data Status</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P18</name>
<description>Output Data Status</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P19</name>
<description>Output Data Status</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P20</name>
<description>Output Data Status</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P21</name>
<description>Output Data Status</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P22</name>
<description>Output Data Status</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P23</name>
<description>Output Data Status</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P24</name>
<description>Output Data Status</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P25</name>
<description>Output Data Status</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P26</name>
<description>Output Data Status</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P27</name>
<description>Output Data Status</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P28</name>
<description>Output Data Status</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P29</name>
<description>Output Data Status</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P30</name>
<description>Output Data Status</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P31</name>
<description>Output Data Status</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>IER</name>
<description>Interrupt Enable Register</description>
<addressOffset>0x00000040</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Input Change Interrupt Enable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IDR</name>
<description>Interrupt Disable Register</description>
<addressOffset>0x00000044</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Input Change Interrupt Disable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IMR</name>
<description>Interrupt Mask Register</description>
<addressOffset>0x00000048</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>P0</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P1</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P2</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P3</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P4</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P5</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P6</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P7</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P8</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P9</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P10</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P11</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P12</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P13</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P14</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P15</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P16</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P17</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P18</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P19</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P20</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P21</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P22</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P23</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P24</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P25</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P26</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P27</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P28</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P29</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P30</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P31</name>
<description>Input Change Interrupt Mask</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>ISR</name>
<description>Interrupt Status Register</description>
<addressOffset>0x0000004C</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>P0</name>
<description>Input Change Interrupt Status</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P1</name>
<description>Input Change Interrupt Status</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P2</name>
<description>Input Change Interrupt Status</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P3</name>
<description>Input Change Interrupt Status</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P4</name>
<description>Input Change Interrupt Status</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P5</name>
<description>Input Change Interrupt Status</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P6</name>
<description>Input Change Interrupt Status</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P7</name>
<description>Input Change Interrupt Status</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P8</name>
<description>Input Change Interrupt Status</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P9</name>
<description>Input Change Interrupt Status</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P10</name>
<description>Input Change Interrupt Status</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P11</name>
<description>Input Change Interrupt Status</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P12</name>
<description>Input Change Interrupt Status</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P13</name>
<description>Input Change Interrupt Status</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P14</name>
<description>Input Change Interrupt Status</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P15</name>
<description>Input Change Interrupt Status</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P16</name>
<description>Input Change Interrupt Status</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P17</name>
<description>Input Change Interrupt Status</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P18</name>
<description>Input Change Interrupt Status</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P19</name>
<description>Input Change Interrupt Status</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P20</name>
<description>Input Change Interrupt Status</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P21</name>
<description>Input Change Interrupt Status</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P22</name>
<description>Input Change Interrupt Status</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P23</name>
<description>Input Change Interrupt Status</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P24</name>
<description>Input Change Interrupt Status</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P25</name>
<description>Input Change Interrupt Status</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P26</name>
<description>Input Change Interrupt Status</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P27</name>
<description>Input Change Interrupt Status</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P28</name>
<description>Input Change Interrupt Status</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P29</name>
<description>Input Change Interrupt Status</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P30</name>
<description>Input Change Interrupt Status</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P31</name>
<description>Input Change Interrupt Status</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>MDER</name>
<description>Multi-driver Enable Register</description>
<addressOffset>0x00000050</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Multi Drive Enable.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Multi Drive Enable.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Multi Drive Enable.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Multi Drive Enable.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Multi Drive Enable.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Multi Drive Enable.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Multi Drive Enable.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Multi Drive Enable.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Multi Drive Enable.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Multi Drive Enable.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Multi Drive Enable.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Multi Drive Enable.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Multi Drive Enable.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Multi Drive Enable.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Multi Drive Enable.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Multi Drive Enable.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Multi Drive Enable.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Multi Drive Enable.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Multi Drive Enable.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Multi Drive Enable.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Multi Drive Enable.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Multi Drive Enable.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Multi Drive Enable.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Multi Drive Enable.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Multi Drive Enable.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Multi Drive Enable.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Multi Drive Enable.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Multi Drive Enable.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Multi Drive Enable.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Multi Drive Enable.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Multi Drive Enable.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Multi Drive Enable.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>MDDR</name>
<description>Multi-driver Disable Register</description>
<addressOffset>0x00000054</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Multi Drive Disable.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Multi Drive Disable.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Multi Drive Disable.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Multi Drive Disable.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Multi Drive Disable.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Multi Drive Disable.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Multi Drive Disable.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Multi Drive Disable.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Multi Drive Disable.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Multi Drive Disable.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Multi Drive Disable.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Multi Drive Disable.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Multi Drive Disable.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Multi Drive Disable.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Multi Drive Disable.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Multi Drive Disable.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Multi Drive Disable.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Multi Drive Disable.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Multi Drive Disable.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Multi Drive Disable.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Multi Drive Disable.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Multi Drive Disable.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Multi Drive Disable.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Multi Drive Disable.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Multi Drive Disable.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Multi Drive Disable.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Multi Drive Disable.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Multi Drive Disable.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Multi Drive Disable.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Multi Drive Disable.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Multi Drive Disable.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Multi Drive Disable.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>MDSR</name>
<description>Multi-driver Status Register</description>
<addressOffset>0x00000058</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>P0</name>
<description>Multi Drive Status.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P1</name>
<description>Multi Drive Status.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P2</name>
<description>Multi Drive Status.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P3</name>
<description>Multi Drive Status.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P4</name>
<description>Multi Drive Status.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P5</name>
<description>Multi Drive Status.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P6</name>
<description>Multi Drive Status.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P7</name>
<description>Multi Drive Status.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P8</name>
<description>Multi Drive Status.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P9</name>
<description>Multi Drive Status.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P10</name>
<description>Multi Drive Status.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P11</name>
<description>Multi Drive Status.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P12</name>
<description>Multi Drive Status.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P13</name>
<description>Multi Drive Status.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P14</name>
<description>Multi Drive Status.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P15</name>
<description>Multi Drive Status.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P16</name>
<description>Multi Drive Status.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P17</name>
<description>Multi Drive Status.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P18</name>
<description>Multi Drive Status.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P19</name>
<description>Multi Drive Status.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P20</name>
<description>Multi Drive Status.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P21</name>
<description>Multi Drive Status.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P22</name>
<description>Multi Drive Status.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P23</name>
<description>Multi Drive Status.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P24</name>
<description>Multi Drive Status.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P25</name>
<description>Multi Drive Status.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P26</name>
<description>Multi Drive Status.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P27</name>
<description>Multi Drive Status.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P28</name>
<description>Multi Drive Status.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P29</name>
<description>Multi Drive Status.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P30</name>
<description>Multi Drive Status.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P31</name>
<description>Multi Drive Status.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>PUDR</name>
<description>Pull-up Disable Register</description>
<addressOffset>0x00000060</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Pull Up Disable.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Pull Up Disable.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Pull Up Disable.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Pull Up Disable.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Pull Up Disable.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Pull Up Disable.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Pull Up Disable.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Pull Up Disable.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Pull Up Disable.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Pull Up Disable.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Pull Up Disable.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Pull Up Disable.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Pull Up Disable.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Pull Up Disable.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Pull Up Disable.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Pull Up Disable.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Pull Up Disable.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Pull Up Disable.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Pull Up Disable.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Pull Up Disable.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Pull Up Disable.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Pull Up Disable.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Pull Up Disable.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Pull Up Disable.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Pull Up Disable.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Pull Up Disable.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Pull Up Disable.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Pull Up Disable.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Pull Up Disable.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Pull Up Disable.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Pull Up Disable.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Pull Up Disable.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>PUER</name>
<description>Pull-up Enable Register</description>
<addressOffset>0x00000064</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Pull Up Enable.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Pull Up Enable.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Pull Up Enable.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Pull Up Enable.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Pull Up Enable.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Pull Up Enable.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Pull Up Enable.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Pull Up Enable.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Pull Up Enable.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Pull Up Enable.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Pull Up Enable.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Pull Up Enable.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Pull Up Enable.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Pull Up Enable.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Pull Up Enable.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Pull Up Enable.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Pull Up Enable.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Pull Up Enable.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Pull Up Enable.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Pull Up Enable.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Pull Up Enable.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Pull Up Enable.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Pull Up Enable.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Pull Up Enable.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Pull Up Enable.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Pull Up Enable.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Pull Up Enable.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Pull Up Enable.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Pull Up Enable.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Pull Up Enable.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Pull Up Enable.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Pull Up Enable.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>PUSR</name>
<description>Pad Pull-up Status Register</description>
<addressOffset>0x00000068</addressOffset>
<size>32</size>
<access>read-only</access>
<fields>
<field>
<name>P0</name>
<description>Pull Up Status.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P1</name>
<description>Pull Up Status.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P2</name>
<description>Pull Up Status.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P3</name>
<description>Pull Up Status.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P4</name>
<description>Pull Up Status.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P5</name>
<description>Pull Up Status.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P6</name>
<description>Pull Up Status.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P7</name>
<description>Pull Up Status.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P8</name>
<description>Pull Up Status.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P9</name>
<description>Pull Up Status.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P10</name>
<description>Pull Up Status.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P11</name>
<description>Pull Up Status.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P12</name>
<description>Pull Up Status.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P13</name>
<description>Pull Up Status.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P14</name>
<description>Pull Up Status.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P15</name>
<description>Pull Up Status.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P16</name>
<description>Pull Up Status.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P17</name>
<description>Pull Up Status.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P18</name>
<description>Pull Up Status.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P19</name>
<description>Pull Up Status.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P20</name>
<description>Pull Up Status.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P21</name>
<description>Pull Up Status.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P22</name>
<description>Pull Up Status.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P23</name>
<description>Pull Up Status.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P24</name>
<description>Pull Up Status.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P25</name>
<description>Pull Up Status.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P26</name>
<description>Pull Up Status.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P27</name>
<description>Pull Up Status.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P28</name>
<description>Pull Up Status.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P29</name>
<description>Pull Up Status.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P30</name>
<description>Pull Up Status.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P31</name>
<description>Pull Up Status.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<dim>2</dim>
<dimIncrement>4</dimIncrement>
<dimIndex>0-1</dimIndex>
<name>ABCDSR[%s]</name>
<description>Peripheral Select Register</description>
<addressOffset>0x00000070</addressOffset>
<size>32</size>
<access>read-write</access>
<fields>
<field>
<name>P0</name>
<description>Peripheral Select.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P1</name>
<description>Peripheral Select.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P2</name>
<description>Peripheral Select.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P3</name>
<description>Peripheral Select.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P4</name>
<description>Peripheral Select.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P5</name>
<description>Peripheral Select.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P6</name>
<description>Peripheral Select.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P7</name>
<description>Peripheral Select.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P8</name>
<description>Peripheral Select.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P9</name>
<description>Peripheral Select.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P10</name>
<description>Peripheral Select.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P11</name>
<description>Peripheral Select.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P12</name>
<description>Peripheral Select.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P13</name>
<description>Peripheral Select.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P14</name>
<description>Peripheral Select.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P15</name>
<description>Peripheral Select.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P16</name>
<description>Peripheral Select.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P17</name>
<description>Peripheral Select.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P18</name>
<description>Peripheral Select.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P19</name>
<description>Peripheral Select.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P20</name>
<description>Peripheral Select.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P21</name>
<description>Peripheral Select.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P22</name>
<description>Peripheral Select.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P23</name>
<description>Peripheral Select.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P24</name>
<description>Peripheral Select.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P25</name>
<description>Peripheral Select.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P26</name>
<description>Peripheral Select.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P27</name>
<description>Peripheral Select.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P28</name>
<description>Peripheral Select.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P29</name>
<description>Peripheral Select.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P30</name>
<description>Peripheral Select.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>P31</name>
<description>Peripheral Select.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>IFSCDR</name>
<description>Input Filter Slow Clock Disable Register</description>
<addressOffset>0x00000080</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>PIO Clock Glitch Filtering Select.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IFSCER</name>
<description>Input Filter Slow Clock Enable Register</description>
<addressOffset>0x00000084</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Debouncing Filtering Select.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IFSCSR</name>
<description>Input Filter Slow Clock Status Register</description>
<addressOffset>0x00000088</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>P0</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P1</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P2</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P3</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P4</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P5</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P6</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P7</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P8</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P9</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P10</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P11</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P12</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P13</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P14</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P15</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P16</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P17</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P18</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P19</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P20</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P21</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P22</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P23</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P24</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P25</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P26</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P27</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P28</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P29</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P30</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P31</name>
<description>Glitch or Debouncing Filter Selection Status</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>SCDR</name>
<description>Slow Clock Divider Debouncing Register</description>
<addressOffset>0x0000008C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>DIV</name>
<bitOffset>0</bitOffset>
<bitWidth>14</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>PPDDR</name>
<description>Pad Pull-down Disable Register</description>
<addressOffset>0x00000090</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Pull Down Disable.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Pull Down Disable.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Pull Down Disable.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Pull Down Disable.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Pull Down Disable.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Pull Down Disable.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Pull Down Disable.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Pull Down Disable.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Pull Down Disable.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Pull Down Disable.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Pull Down Disable.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Pull Down Disable.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Pull Down Disable.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Pull Down Disable.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Pull Down Disable.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Pull Down Disable.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Pull Down Disable.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Pull Down Disable.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Pull Down Disable.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Pull Down Disable.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Pull Down Disable.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Pull Down Disable.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Pull Down Disable.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Pull Down Disable.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Pull Down Disable.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Pull Down Disable.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Pull Down Disable.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Pull Down Disable.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Pull Down Disable.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Pull Down Disable.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Pull Down Disable.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Pull Down Disable.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>PPDER</name>
<description>Pad Pull-down Enable Register</description>
<addressOffset>0x00000094</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Pull Down Enable.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Pull Down Enable.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Pull Down Enable.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Pull Down Enable.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Pull Down Enable.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Pull Down Enable.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Pull Down Enable.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Pull Down Enable.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Pull Down Enable.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Pull Down Enable.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Pull Down Enable.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Pull Down Enable.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Pull Down Enable.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Pull Down Enable.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Pull Down Enable.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Pull Down Enable.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Pull Down Enable.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Pull Down Enable.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Pull Down Enable.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Pull Down Enable.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Pull Down Enable.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Pull Down Enable.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Pull Down Enable.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Pull Down Enable.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Pull Down Enable.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Pull Down Enable.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Pull Down Enable.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Pull Down Enable.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Pull Down Enable.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Pull Down Enable.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Pull Down Enable.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Pull Down Enable.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>PPDSR</name>
<description>Pad Pull-down Status Register</description>
<addressOffset>0x00000098</addressOffset>
<size>32</size>
<access>read-only</access>
<fields>
<field>
<name>P0</name>
<description>Pull Down Status.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P1</name>
<description>Pull Down Status.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P2</name>
<description>Pull Down Status.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P3</name>
<description>Pull Down Status.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P4</name>
<description>Pull Down Status.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P5</name>
<description>Pull Down Status.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P6</name>
<description>Pull Down Status.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P7</name>
<description>Pull Down Status.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P8</name>
<description>Pull Down Status.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P9</name>
<description>Pull Down Status.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P10</name>
<description>Pull Down Status.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P11</name>
<description>Pull Down Status.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P12</name>
<description>Pull Down Status.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P13</name>
<description>Pull Down Status.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P14</name>
<description>Pull Down Status.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P15</name>
<description>Pull Down Status.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P16</name>
<description>Pull Down Status.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P17</name>
<description>Pull Down Status.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P18</name>
<description>Pull Down Status.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P19</name>
<description>Pull Down Status.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P20</name>
<description>Pull Down Status.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P21</name>
<description>Pull Down Status.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P22</name>
<description>Pull Down Status.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P23</name>
<description>Pull Down Status.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P24</name>
<description>Pull Down Status.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P25</name>
<description>Pull Down Status.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P26</name>
<description>Pull Down Status.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P27</name>
<description>Pull Down Status.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P28</name>
<description>Pull Down Status.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P29</name>
<description>Pull Down Status.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P30</name>
<description>Pull Down Status.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P31</name>
<description>Pull Down Status.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>OWER</name>
<description>Output Write Enable</description>
<addressOffset>0x000000A0</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Output Write Enable.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Output Write Enable.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Output Write Enable.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Output Write Enable.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Output Write Enable.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Output Write Enable.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Output Write Enable.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Output Write Enable.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Output Write Enable.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Output Write Enable.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Output Write Enable.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Output Write Enable.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Output Write Enable.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Output Write Enable.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Output Write Enable.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Output Write Enable.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Output Write Enable.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Output Write Enable.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Output Write Enable.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Output Write Enable.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Output Write Enable.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Output Write Enable.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Output Write Enable.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Output Write Enable.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Output Write Enable.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Output Write Enable.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Output Write Enable.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Output Write Enable.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Output Write Enable.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Output Write Enable.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Output Write Enable.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Output Write Enable.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>OWDR</name>
<description>Output Write Disable</description>
<addressOffset>0x000000A4</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Output Write Disable.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Output Write Disable.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Output Write Disable.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Output Write Disable.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Output Write Disable.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Output Write Disable.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Output Write Disable.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Output Write Disable.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Output Write Disable.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Output Write Disable.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Output Write Disable.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Output Write Disable.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Output Write Disable.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Output Write Disable.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Output Write Disable.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Output Write Disable.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Output Write Disable.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Output Write Disable.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Output Write Disable.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Output Write Disable.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Output Write Disable.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Output Write Disable.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Output Write Disable.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Output Write Disable.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Output Write Disable.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Output Write Disable.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Output Write Disable.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Output Write Disable.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Output Write Disable.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Output Write Disable.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Output Write Disable.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Output Write Disable.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>OWSR</name>
<description>Output Write Status Register</description>
<addressOffset>0x000000A8</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>P0</name>
<description>Output Write Status.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P1</name>
<description>Output Write Status.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P2</name>
<description>Output Write Status.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P3</name>
<description>Output Write Status.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P4</name>
<description>Output Write Status.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P5</name>
<description>Output Write Status.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P6</name>
<description>Output Write Status.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P7</name>
<description>Output Write Status.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P8</name>
<description>Output Write Status.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P9</name>
<description>Output Write Status.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P10</name>
<description>Output Write Status.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P11</name>
<description>Output Write Status.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P12</name>
<description>Output Write Status.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P13</name>
<description>Output Write Status.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P14</name>
<description>Output Write Status.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P15</name>
<description>Output Write Status.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P16</name>
<description>Output Write Status.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P17</name>
<description>Output Write Status.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P18</name>
<description>Output Write Status.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P19</name>
<description>Output Write Status.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P20</name>
<description>Output Write Status.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P21</name>
<description>Output Write Status.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P22</name>
<description>Output Write Status.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P23</name>
<description>Output Write Status.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P24</name>
<description>Output Write Status.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P25</name>
<description>Output Write Status.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P26</name>
<description>Output Write Status.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P27</name>
<description>Output Write Status.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P28</name>
<description>Output Write Status.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P29</name>
<description>Output Write Status.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P30</name>
<description>Output Write Status.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P31</name>
<description>Output Write Status.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>AIMER</name>
<description>Additional Interrupt Modes Enable Register</description>
<addressOffset>0x000000B0</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Additional Interrupt Modes Enable.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>AIMDR</name>
<description>Additional Interrupt Modes Disables Register</description>
<addressOffset>0x000000B4</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Additional Interrupt Modes Disable.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>AIMMR</name>
<description>Additional Interrupt Modes Mask Register</description>
<addressOffset>0x000000B8</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>P0</name>
<description>Peripheral CD Status.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P1</name>
<description>Peripheral CD Status.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P2</name>
<description>Peripheral CD Status.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P3</name>
<description>Peripheral CD Status.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P4</name>
<description>Peripheral CD Status.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P5</name>
<description>Peripheral CD Status.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P6</name>
<description>Peripheral CD Status.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P7</name>
<description>Peripheral CD Status.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P8</name>
<description>Peripheral CD Status.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P9</name>
<description>Peripheral CD Status.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P10</name>
<description>Peripheral CD Status.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P11</name>
<description>Peripheral CD Status.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P12</name>
<description>Peripheral CD Status.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P13</name>
<description>Peripheral CD Status.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P14</name>
<description>Peripheral CD Status.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P15</name>
<description>Peripheral CD Status.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P16</name>
<description>Peripheral CD Status.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P17</name>
<description>Peripheral CD Status.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P18</name>
<description>Peripheral CD Status.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P19</name>
<description>Peripheral CD Status.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P20</name>
<description>Peripheral CD Status.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P21</name>
<description>Peripheral CD Status.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P22</name>
<description>Peripheral CD Status.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P23</name>
<description>Peripheral CD Status.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P24</name>
<description>Peripheral CD Status.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P25</name>
<description>Peripheral CD Status.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P26</name>
<description>Peripheral CD Status.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P27</name>
<description>Peripheral CD Status.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P28</name>
<description>Peripheral CD Status.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P29</name>
<description>Peripheral CD Status.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P30</name>
<description>Peripheral CD Status.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P31</name>
<description>Peripheral CD Status.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>ESR</name>
<description>Edge Select Register</description>
<addressOffset>0x000000C0</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Edge Interrupt Selection.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>LSR</name>
<description>Level Select Register</description>
<addressOffset>0x000000C4</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Level Interrupt Selection.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Level Interrupt Selection.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Level Interrupt Selection.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Level Interrupt Selection.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Level Interrupt Selection.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Level Interrupt Selection.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Level Interrupt Selection.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Level Interrupt Selection.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Level Interrupt Selection.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Level Interrupt Selection.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Level Interrupt Selection.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Level Interrupt Selection.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Level Interrupt Selection.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Level Interrupt Selection.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Level Interrupt Selection.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Level Interrupt Selection.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Level Interrupt Selection.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Level Interrupt Selection.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Level Interrupt Selection.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Level Interrupt Selection.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Level Interrupt Selection.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Level Interrupt Selection.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Level Interrupt Selection.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Level Interrupt Selection.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Level Interrupt Selection.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Level Interrupt Selection.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Level Interrupt Selection.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Level Interrupt Selection.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Level Interrupt Selection.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Level Interrupt Selection.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Level Interrupt Selection.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Level Interrupt Selection.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>ELSR</name>
<description>Edge/Level Status Register</description>
<addressOffset>0x000000C8</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>P0</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P1</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P2</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P3</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P4</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P5</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P6</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P7</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P8</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P9</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P10</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P11</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P12</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P13</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P14</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P15</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P16</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P17</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P18</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P19</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P20</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P21</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P22</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P23</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P24</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P25</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P26</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P27</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P28</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P29</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P30</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P31</name>
<description>Edge/Level Interrupt source selection.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>FELLSR</name>
<description>Falling Edge/Low Level Select Register</description>
<addressOffset>0x000000D0</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Falling Edge/Low Level Interrupt Selection.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>REHLSR</name>
<description>Rising Edge/ High Level Select Register</description>
<addressOffset>0x000000D4</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>P0</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P1</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P2</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P3</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P4</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P5</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P6</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P7</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P8</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P9</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P10</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P11</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P12</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P13</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P14</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P15</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P16</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P17</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P18</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P19</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P20</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P21</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P22</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P23</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P24</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P25</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P26</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P27</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P28</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P29</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P30</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>P31</name>
<description>Rising Edge /High Level Interrupt Selection.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>FRLHSR</name>
<description>Fall/Rise - Low/High Status Register</description>
<addressOffset>0x000000D8</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>P0</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P1</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P2</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P3</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P4</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P5</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P6</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P7</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P8</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P9</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P10</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P11</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P12</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P13</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P14</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P15</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P16</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P17</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P18</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P19</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P20</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P21</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P22</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P23</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P24</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P25</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P26</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P27</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P28</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P29</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P30</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P31</name>
<description>Edge /Level Interrupt Source Selection.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>LOCKSR</name>
<description>Lock Status</description>
<addressOffset>0x000000E0</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>P0</name>
<description>Lock Status.</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P1</name>
<description>Lock Status.</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P2</name>
<description>Lock Status.</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P3</name>
<description>Lock Status.</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P4</name>
<description>Lock Status.</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P5</name>
<description>Lock Status.</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P6</name>
<description>Lock Status.</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P7</name>
<description>Lock Status.</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P8</name>
<description>Lock Status.</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P9</name>
<description>Lock Status.</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P10</name>
<description>Lock Status.</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P11</name>
<description>Lock Status.</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P12</name>
<description>Lock Status.</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P13</name>
<description>Lock Status.</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P14</name>
<description>Lock Status.</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P15</name>
<description>Lock Status.</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P16</name>
<description>Lock Status.</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P17</name>
<description>Lock Status.</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P18</name>
<description>Lock Status.</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P19</name>
<description>Lock Status.</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P20</name>
<description>Lock Status.</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P21</name>
<description>Lock Status.</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P22</name>
<description>Lock Status.</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P23</name>
<description>Lock Status.</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P24</name>
<description>Lock Status.</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P25</name>
<description>Lock Status.</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P26</name>
<description>Lock Status.</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P27</name>
<description>Lock Status.</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P28</name>
<description>Lock Status.</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P29</name>
<description>Lock Status.</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P30</name>
<description>Lock Status.</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>P31</name>
<description>Lock Status.</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>WPMR</name>
<description>Write Protect Mode Register</description>
<addressOffset>0x000000E4</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>WPEN</name>
<description>Write Protect Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>WPKEY</name>
<description>Write Protect KEY</description>
<bitOffset>8</bitOffset>
<bitWidth>24</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>WPSR</name>
<description>Write Protect Status Register</description>
<addressOffset>0x000000E8</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>WPVS</name>
<description>Write Protect Violation Status</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>WPVSRC</name>
<description>Write Protect Violation Source</description>
<bitOffset>8</bitOffset>
<bitWidth>16</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>SCHMITT</name>
<description>Schmitt Trigger Register</description>
<addressOffset>0x00000100</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SCHMITT0</name>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT1</name>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT2</name>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT3</name>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT4</name>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT5</name>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT6</name>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT7</name>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT8</name>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT9</name>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT10</name>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT11</name>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT12</name>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT13</name>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT14</name>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT15</name>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT16</name>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT17</name>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT18</name>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT19</name>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT20</name>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT21</name>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT22</name>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT23</name>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT24</name>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT25</name>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT26</name>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT27</name>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT28</name>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT29</name>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT30</name>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SCHMITT31</name>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>DRIVER1</name>
<description>I/O Drive Register 1</description>
<addressOffset>0x00000118</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>LINE0</name>
<description>Drive of PIO Line 0</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE1</name>
<description>Drive of PIO Line 1</description>
<bitOffset>2</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE2</name>
<description>Drive of PIO Line 2</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE3</name>
<description>Drive of PIO Line 3</description>
<bitOffset>6</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE4</name>
<description>Drive of PIO Line 4</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE5</name>
<description>Drive of PIO Line 5</description>
<bitOffset>10</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE6</name>
<description>Drive of PIO Line 6</description>
<bitOffset>12</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE7</name>
<description>Drive of PIO Line 7</description>
<bitOffset>14</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE8</name>
<description>Drive of PIO Line 8</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE9</name>
<description>Drive of PIO Line 9</description>
<bitOffset>18</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE10</name>
<description>Drive of PIO Line 10</description>
<bitOffset>20</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE11</name>
<description>Drive of PIO Line 11</description>
<bitOffset>22</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE12</name>
<description>Drive of PIO Line 12</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE13</name>
<description>Drive of PIO Line 13</description>
<bitOffset>26</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE14</name>
<description>Drive of PIO Line 14</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE15</name>
<description>Drive of PIO Line 15</description>
<bitOffset>30</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>DRIVER2</name>
<description>I/O Drive Register 2</description>
<addressOffset>0x0000011C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>LINE16</name>
<description>Drive of PIO line 16</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE17</name>
<description>Drive of PIO line 17</description>
<bitOffset>2</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE18</name>
<description>Drive of PIO line 18</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE19</name>
<description>Drive of PIO line 19</description>
<bitOffset>6</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE20</name>
<description>Drive of PIO line 20</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE21</name>
<description>Drive of PIO line 21</description>
<bitOffset>10</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE22</name>
<description>Drive of PIO line 22</description>
<bitOffset>12</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE23</name>
<description>Drive of PIO line 23</description>
<bitOffset>14</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE24</name>
<description>Drive of PIO line 24</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE25</name>
<description>Drive of PIO line 25</description>
<bitOffset>18</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE26</name>
<description>Drive of PIO line 26</description>
<bitOffset>20</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE27</name>
<description>Drive of PIO line 27</description>
<bitOffset>22</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE28</name>
<description>Drive of PIO line 28</description>
<bitOffset>24</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE29</name>
<description>Drive of PIO line 29</description>
<bitOffset>26</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE30</name>
<description>Drive of PIO line 30</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>LINE31</name>
<description>Drive of PIO line 31</description>
<bitOffset>30</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>LO_DRIVE</name>
<description>Low drive</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>ME_DRIVE</name>
<description>Medium drive</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>HI_DRIVE</name>
<description>High drive</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>PMC</name>
<version>11041A</version>
<description>Power Management Controller</description>
<baseAddress>0xFFFFFC00</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x200</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>PMC</name>
<value>1</value>
</interrupt>
<registers>
<register>
<name>PMC_SCER</name>
<description>System Clock Enable Register</description>
<addressOffset>0x00000000</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>DDRCK</name>
<description>DDR Clock Enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SMDCK</name>
<description>SMD Clock Enable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>UHP</name>
<description>USB Host OHCI Clocks Enable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>UDP</name>
<description>USB Device Clock Enable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PCK0</name>
<description>Programmable Clock 0 Output Enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PCK1</name>
<description>Programmable Clock 1 Output Enable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PCK2</name>
<description>Programmable Clock 2 Output Enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>PMC_SCDR</name>
<description>System Clock Disable Register</description>
<addressOffset>0x00000004</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>PCK</name>
<description>Processor Clock Disable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>DDRCK</name>
<description>DDR Clock Disable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SMDCK</name>
<description>SMD Clock Disable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>UHP</name>
<description>USB Host OHCI Clock Disable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>UDP</name>
<description>USB Device Clock Enable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PCK0</name>
<description>Programmable Clock 0 Output Disable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PCK1</name>
<description>Programmable Clock 1 Output Disable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PCK2</name>
<description>Programmable Clock 2 Output Disable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>PMC_SCSR</name>
<description>System Clock Status Register</description>
<addressOffset>0x00000008</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000005</resetValue>
<fields>
<field>
<name>PCK</name>
<description>Processor Clock Status</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>DDRCK</name>
<description>DDR Clock Status</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SMDCK</name>
<description>SMD Clock Status</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>UHP</name>
<description>USB Host Port Clock Status</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>UDP</name>
<description>USB Device Port Clock Status</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PCK0</name>
<description>Programmable Clock 0 Output Status</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PCK1</name>
<description>Programmable Clock 1 Output Status</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PCK2</name>
<description>Programmable Clock 2 Output Status</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>PMC_PCER0</name>
<description>Peripheral Clock Enable Register 0</description>
<addressOffset>0x00000010</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>PID2</name>
<description>Peripheral Clock 2 Enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID3</name>
<description>Peripheral Clock 3 Enable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID4</name>
<description>Peripheral Clock 4 Enable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID5</name>
<description>Peripheral Clock 5 Enable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID6</name>
<description>Peripheral Clock 6 Enable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID7</name>
<description>Peripheral Clock 7 Enable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID8</name>
<description>Peripheral Clock 8 Enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID9</name>
<description>Peripheral Clock 9 Enable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID10</name>
<description>Peripheral Clock 10 Enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID11</name>
<description>Peripheral Clock 11 Enable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID12</name>
<description>Peripheral Clock 12 Enable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID13</name>
<description>Peripheral Clock 13 Enable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID14</name>
<description>Peripheral Clock 14 Enable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID15</name>
<description>Peripheral Clock 15 Enable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID16</name>
<description>Peripheral Clock 16 Enable</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID17</name>
<description>Peripheral Clock 17 Enable</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID18</name>
<description>Peripheral Clock 18 Enable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID19</name>
<description>Peripheral Clock 19 Enable</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID20</name>
<description>Peripheral Clock 20 Enable</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID21</name>
<description>Peripheral Clock 21 Enable</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID22</name>
<description>Peripheral Clock 22 Enable</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID23</name>
<description>Peripheral Clock 23 Enable</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID24</name>
<description>Peripheral Clock 24 Enable</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID25</name>
<description>Peripheral Clock 25 Enable</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID26</name>
<description>Peripheral Clock 26 Enable</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID27</name>
<description>Peripheral Clock 27 Enable</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID28</name>
<description>Peripheral Clock 28 Enable</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID29</name>
<description>Peripheral Clock 29 Enable</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID30</name>
<description>Peripheral Clock 30 Enable</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID31</name>
<description>Peripheral Clock 31 Enable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>PMC_PCDR0</name>
<description>Peripheral Clock Disable Register 0</description>
<addressOffset>0x00000014</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>PID2</name>
<description>Peripheral Clock 2 Disable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID3</name>
<description>Peripheral Clock 3 Disable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID4</name>
<description>Peripheral Clock 4 Disable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID5</name>
<description>Peripheral Clock 5 Disable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID6</name>
<description>Peripheral Clock 6 Disable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID7</name>
<description>Peripheral Clock 7 Disable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID8</name>
<description>Peripheral Clock 8 Disable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID9</name>
<description>Peripheral Clock 9 Disable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID10</name>
<description>Peripheral Clock 10 Disable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID11</name>
<description>Peripheral Clock 11 Disable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID12</name>
<description>Peripheral Clock 12 Disable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID13</name>
<description>Peripheral Clock 13 Disable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID14</name>
<description>Peripheral Clock 14 Disable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID15</name>
<description>Peripheral Clock 15 Disable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID16</name>
<description>Peripheral Clock 16 Disable</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID17</name>
<description>Peripheral Clock 17 Disable</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID18</name>
<description>Peripheral Clock 18 Disable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID19</name>
<description>Peripheral Clock 19 Disable</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID20</name>
<description>Peripheral Clock 20 Disable</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID21</name>
<description>Peripheral Clock 21 Disable</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID22</name>
<description>Peripheral Clock 22 Disable</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID23</name>
<description>Peripheral Clock 23 Disable</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID24</name>
<description>Peripheral Clock 24 Disable</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID25</name>
<description>Peripheral Clock 25 Disable</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID26</name>
<description>Peripheral Clock 26 Disable</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID27</name>
<description>Peripheral Clock 27 Disable</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID28</name>
<description>Peripheral Clock 28 Disable</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID29</name>
<description>Peripheral Clock 29 Disable</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID30</name>
<description>Peripheral Clock 30 Disable</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID31</name>
<description>Peripheral Clock 31 Disable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>PMC_PCSR0</name>
<description>Peripheral Clock Status Register 0</description>
<addressOffset>0x00000018</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>PID2</name>
<description>Peripheral Clock 2 Status</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID3</name>
<description>Peripheral Clock 3 Status</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID4</name>
<description>Peripheral Clock 4 Status</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID5</name>
<description>Peripheral Clock 5 Status</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID6</name>
<description>Peripheral Clock 6 Status</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID7</name>
<description>Peripheral Clock 7 Status</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID8</name>
<description>Peripheral Clock 8 Status</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID9</name>
<description>Peripheral Clock 9 Status</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID10</name>
<description>Peripheral Clock 10 Status</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID11</name>
<description>Peripheral Clock 11 Status</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID12</name>
<description>Peripheral Clock 12 Status</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID13</name>
<description>Peripheral Clock 13 Status</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID14</name>
<description>Peripheral Clock 14 Status</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID15</name>
<description>Peripheral Clock 15 Status</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID16</name>
<description>Peripheral Clock 16 Status</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID17</name>
<description>Peripheral Clock 17 Status</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID18</name>
<description>Peripheral Clock 18 Status</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID19</name>
<description>Peripheral Clock 19 Status</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID20</name>
<description>Peripheral Clock 20 Status</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID21</name>
<description>Peripheral Clock 21 Status</description>
<bitOffset>21</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID22</name>
<description>Peripheral Clock 22 Status</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID23</name>
<description>Peripheral Clock 23 Status</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID24</name>
<description>Peripheral Clock 24 Status</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID25</name>
<description>Peripheral Clock 25 Status</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID26</name>
<description>Peripheral Clock 26 Status</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID27</name>
<description>Peripheral Clock 27 Status</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID28</name>
<description>Peripheral Clock 28 Status</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID29</name>
<description>Peripheral Clock 29 Status</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID30</name>
<description>Peripheral Clock 30 Status</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID31</name>
<description>Peripheral Clock 31 Status</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>CKGR_UCKR</name>
<description>UTMI Clock Register</description>
<addressOffset>0x0000001C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x10200000</resetValue>
<fields>
<field>
<name>UPLLEN</name>
<description>UTMI PLL Enable</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>UPLLCOUNT</name>
<description>UTMI PLL Start-up Time</description>
<bitOffset>20</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>BIASEN</name>
<description>UTMI BIAS Enable</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>BIASCOUNT</name>
<description>UTMI BIAS Start-up Time</description>
<bitOffset>28</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>CKGR_MOR</name>
<description>Main Oscillator Register</description>
<addressOffset>0x00000020</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x01000008</resetValue>
<fields>
<field>
<name>MOSCXTEN</name>
<description>Main Crystal Oscillator Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>MOSCXTBY</name>
<description>Main Crystal Oscillator Bypass</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>MOSCRCEN</name>
<description>Main On-Chip RC Oscillator Enable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>MOSCXTST</name>
<description>Main Crystal Oscillator Start-up Time</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>KEY</name>
<description>Password</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>MOSCSEL</name>
<description>Main Oscillator Selection</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CFDEN</name>
<description>Clock Failure Detector Enable</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>CKGR_MCFR</name>
<description>Main Clock Frequency Register</description>
<addressOffset>0x00000024</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>MAINF</name>
<description>Main Clock Frequency</description>
<bitOffset>0</bitOffset>
<bitWidth>16</bitWidth>
<access>read-only</access>
</field>
<field>
<name>MAINFRDY</name>
<description>Main Clock Ready</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>CKGR_PLLAR</name>
<description>PLLA Register</description>
<addressOffset>0x00000028</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00003F00</resetValue>
<fields>
<field>
<name>DIVA</name>
<description>Divider A</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>PLLACOUNT</name>
<description>PLLA Counter</description>
<bitOffset>8</bitOffset>
<bitWidth>6</bitWidth>
<access>read-write</access>
</field>
<field>
<name>OUTA</name>
<description>PLLA Clock Frequency Range</description>
<bitOffset>14</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>MULA</name>
<description>PLLA Multiplier</description>
<bitOffset>16</bitOffset>
<bitWidth>11</bitWidth>
<access>read-write</access>
</field>
<field>
<name>STUCKTO1</name>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>PMC_MCKR</name>
<description>Master Clock Register</description>
<addressOffset>0x00000030</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000001</resetValue>
<fields>
<field>
<name>CSS</name>
<description>Master/Processor Clock Source Selection</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>SLOW_CLK</name>
<description>Slow Clock is selected</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>MAIN_CLK</name>
<description>Main Clock is selected</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>PLLA_CLK</name>
<description>PLLACK/PLLADIV2 is selected</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>UPLL_CLK</name>
<description>UPLL Clock is selected</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PRES</name>
<description>Master/Processor Clock Prescaler</description>
<bitOffset>4</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CLOCK</name>
<description>Selected clock</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>CLOCK_DIV2</name>
<description>Selected clock divided by 2</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>CLOCK_DIV4</name>
<description>Selected clock divided by 4</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>CLOCK_DIV8</name>
<description>Selected clock divided by 8</description>
<value>0x3</value>
</enumeratedValue>
<enumeratedValue>
<name>CLOCK_DIV16</name>
<description>Selected clock divided by 16</description>
<value>0x4</value>
</enumeratedValue>
<enumeratedValue>
<name>CLOCK_DIV32</name>
<description>Selected clock divided by 32</description>
<value>0x5</value>
</enumeratedValue>
<enumeratedValue>
<name>CLOCK_DIV64</name>
<description>Selected clock divided by 64</description>
<value>0x6</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>MDIV</name>
<description>Master Clock Division</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>EQ_PCK</name>
<description>Master Clock is Prescaler Output Clock divided by 1.Warning: SysClk DDR and DDRCK are not available.</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>PCK_DIV2</name>
<description>Master Clock is Prescaler Output Clock divided by 2.SysClk DDR is equal to 2 x MCK. DDRCK is equal to MCK.</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>PCK_DIV4</name>
<description>Master Clock is Prescaler Output Clock divided by 4.SysClk DDR is equal to 2 x MCK. DDRCK is equal to MCK.</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>PCK_DIV3</name>
<description>Master Clock is Prescaler Output Clock divided by 3.SysClk DDR is equal to 2 x MCK. DDRCK is equal to MCK.</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PLLADIV2</name>
<description>PLLA divisor by 2</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>NOT_DIV2</name>
<description>PLLA clock frequency is divided by 1.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>DIV2</name>
<description>PLLA clock frequency is divided by 2.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>PMC_USB</name>
<description>USB Clock Register</description>
<addressOffset>0x00000038</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>USBS</name>
<description>USB OHCI Input Clock Selection</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>USBDIV</name>
<description>Divider for USB OHCI Clock.</description>
<bitOffset>8</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>PMC_SMD</name>
<description>Soft Modem Clock Register</description>
<addressOffset>0x0000003C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SMDS</name>
<description>SMD input clock selection</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SMDDIV</name>
<description>Divider for SMD Clock.</description>
<bitOffset>8</bitOffset>
<bitWidth>5</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<dim>3</dim>
<dimIncrement>4</dimIncrement>
<dimIndex>0-2</dimIndex>
<name>PMC_PCK[%s]</name>
<description>Programmable Clock 0 Register</description>
<addressOffset>0x00000040</addressOffset>
<size>32</size>
<access>read-write</access>
<fields>
<field>
<name>CSS</name>
<description>Master Clock Source Selection</description>
<bitOffset>0</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>SLOW_CLK</name>
<description>Slow Clock is selected</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>MAIN_CLK</name>
<description>Main Clock is selected</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>PLLA_CLK</name>
<description>PLLACK/PLLADIV2 is selected</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>UPLL_CLK</name>
<description>UPLL Clock is selected</description>
<value>0x3</value>
</enumeratedValue>
<enumeratedValue>
<name>MCK_CLK</name>
<description>Master Clock is selected</description>
<value>0x4</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PRES</name>
<description>Programmable Clock Prescaler</description>
<bitOffset>4</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>CLOCK</name>
<description>Selected clock</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>CLOCK_DIV2</name>
<description>Selected clock divided by 2</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>CLOCK_DIV4</name>
<description>Selected clock divided by 4</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>CLOCK_DIV8</name>
<description>Selected clock divided by 8</description>
<value>0x3</value>
</enumeratedValue>
<enumeratedValue>
<name>CLOCK_DIV16</name>
<description>Selected clock divided by 16</description>
<value>0x4</value>
</enumeratedValue>
<enumeratedValue>
<name>CLOCK_DIV32</name>
<description>Selected clock divided by 32</description>
<value>0x5</value>
</enumeratedValue>
<enumeratedValue>
<name>CLOCK_DIV64</name>
<description>Selected clock divided by 64</description>
<value>0x6</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>PMC_IER</name>
<description>Interrupt Enable Register</description>
<addressOffset>0x00000060</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>MOSCXTS</name>
<description>Main Crystal Oscillator Status Interrupt Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>LOCKA</name>
<description>PLLA Lock Interrupt Enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>MCKRDY</name>
<description>Master Clock Ready Interrupt Enable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>LOCKU</name>
<description>UTMI PLL Lock Interrupt Enable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PCKRDY0</name>
<description>Programmable Clock Ready 0 Interrupt Enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PCKRDY1</name>
<description>Programmable Clock Ready 1 Interrupt Enable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>MOSCSELS</name>
<description>Main Oscillator Selection Status Interrupt Enable</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>MOSCRCS</name>
<description>Main On-Chip RC Status Interrupt Enable</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CFDEV</name>
<description>Clock Failure Detector Event Interrupt Enable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>PMC_IDR</name>
<description>Interrupt Disable Register</description>
<addressOffset>0x00000064</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>MOSCXTS</name>
<description>Main Crystal Oscillator Status Interrupt Disable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>LOCKA</name>
<description>PLLA Lock Interrupt Disable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>MCKRDY</name>
<description>Master Clock Ready Interrupt Disable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>LOCKU</name>
<description>UTMI PLL Lock Interrupt Enable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PCKRDY0</name>
<description>Programmable Clock Ready 0 Interrupt Disable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PCKRDY1</name>
<description>Programmable Clock Ready 1 Interrupt Disable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>MOSCSELS</name>
<description>Main Oscillator Selection Status Interrupt Disable</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>MOSCRCS</name>
<description>Main On-Chip RC Status Interrupt Disable</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CFDEV</name>
<description>Clock Failure Detector Event Interrupt Disable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>PMC_SR</name>
<description>Status Register</description>
<addressOffset>0x00000068</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00010008</resetValue>
<fields>
<field>
<name>MOSCXTS</name>
<description>Main XTAL Oscillator Status</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>LOCKA</name>
<description>PLLA Lock Status</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>MCKRDY</name>
<description>Master Clock Status</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>LOCKU</name>
<description>UPLL Clock Status</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>OSCSELS</name>
<description>Slow Clock Oscillator Selection</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PCKRDY0</name>
<description>Programmable Clock Ready Status</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PCKRDY1</name>
<description>Programmable Clock Ready Status</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>MOSCSELS</name>
<description>Main Oscillator Selection Status</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>MOSCRCS</name>
<description>Main On-Chip RC Oscillator Status</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CFDEV</name>
<description>Clock Failure Detector Event</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CFDS</name>
<description>Clock Failure Detector Status</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>FOS</name>
<description>Clock Failure Detector Fault Output Status</description>
<bitOffset>20</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>PMC_IMR</name>
<description>Interrupt Mask Register</description>
<addressOffset>0x0000006C</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>MOSCXTS</name>
<description>Main Crystal Oscillator Status Interrupt Mask</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>LOCKA</name>
<description>PLLA Lock Interrupt Mask</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>MCKRDY</name>
<description>Master Clock Ready Interrupt Mask</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PCKRDY0</name>
<description>Programmable Clock Ready 0 Interrupt Mask</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PCKRDY1</name>
<description>Programmable Clock Ready 1 Interrupt Mask</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>MOSCSELS</name>
<description>Main Oscillator Selection Status Interrupt Mask</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>MOSCRCS</name>
<description>Main On-Chip RC Status Interrupt Mask</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CFDEV</name>
<description>Clock Failure Detector Event Interrupt Mask</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>PMC_PLLICPR</name>
<description>PLL Charge Pump Current Register</description>
<addressOffset>0x00000080</addressOffset>
<size>32</size>
<access>write-only</access>
<resetValue>0x01000100</resetValue>
<fields>
<field>
<name>ICPLLA</name>
<description>Charge Pump Current</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>PMC_WPMR</name>
<description>Write Protect Mode Register</description>
<addressOffset>0x000000E4</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>WPEN</name>
<description>Write Protect Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>WPKEY</name>
<description>Write Protect KEY</description>
<bitOffset>8</bitOffset>
<bitWidth>24</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>PMC_WPSR</name>
<description>Write Protect Status Register</description>
<addressOffset>0x000000E8</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>WPVS</name>
<description>Write Protect Violation Status</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>WPVSRC</name>
<description>Write Protect Violation Source</description>
<bitOffset>8</bitOffset>
<bitWidth>16</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>PMC_PCER1</name>
<description>Peripheral Clock Enable Register 1</description>
<addressOffset>0x00000100</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>PID32</name>
<description>Peripheral Clock 32 Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID33</name>
<description>Peripheral Clock 33 Enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID34</name>
<description>Peripheral Clock 34 Enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID35</name>
<description>Peripheral Clock 35 Enable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID36</name>
<description>Peripheral Clock 36 Enable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID37</name>
<description>Peripheral Clock 37 Enable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID38</name>
<description>Peripheral Clock 38 Enable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID39</name>
<description>Peripheral Clock 39 Enable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID40</name>
<description>Peripheral Clock 40 Enable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID41</name>
<description>Peripheral Clock 41 Enable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID42</name>
<description>Peripheral Clock 42 Enable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID43</name>
<description>Peripheral Clock 43 Enable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID44</name>
<description>Peripheral Clock 44 Enable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID45</name>
<description>Peripheral Clock 45 Enable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID46</name>
<description>Peripheral Clock 46 Enable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID47</name>
<description>Peripheral Clock 47 Enable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID48</name>
<description>Peripheral Clock 48 Enable</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID49</name>
<description>Peripheral Clock 49 Enable</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID50</name>
<description>Peripheral Clock 50 Enable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID51</name>
<description>Peripheral Clock 51 Enable</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID53</name>
<description>Peripheral Clock 53 Enable</description>
<bitOffset>20</bitOffset>
<bitWidth>2</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID54</name>
<description>Peripheral Clock 54 Enable</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID55</name>
<description>Peripheral Clock 55 Enable</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID56</name>
<description>Peripheral Clock 56 Enable</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID57</name>
<description>Peripheral Clock 57 Enable</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID58</name>
<description>Peripheral Clock 58 Enable</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID59</name>
<description>Peripheral Clock 59 Enable</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID60</name>
<description>Peripheral Clock 60 Enable</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID61</name>
<description>Peripheral Clock 61 Enable</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID62</name>
<description>Peripheral Clock 62 Enable</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID63</name>
<description>Peripheral Clock 63 Enable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>PMC_PCDR1</name>
<description>Peripheral Clock Disable Register 1</description>
<addressOffset>0x00000104</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>PID32</name>
<description>Peripheral Clock 32 Disable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID33</name>
<description>Peripheral Clock 33 Disable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID34</name>
<description>Peripheral Clock 34 Disable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID35</name>
<description>Peripheral Clock 35 Disable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID36</name>
<description>Peripheral Clock 36 Disable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID37</name>
<description>Peripheral Clock 37 Disable</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID38</name>
<description>Peripheral Clock 38 Disable</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID39</name>
<description>Peripheral Clock 39 Disable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID40</name>
<description>Peripheral Clock 40 Disable</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID41</name>
<description>Peripheral Clock 41 Disable</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID42</name>
<description>Peripheral Clock 42 Disable</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID43</name>
<description>Peripheral Clock 43 Disable</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID44</name>
<description>Peripheral Clock 44 Disable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID45</name>
<description>Peripheral Clock 45 Disable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID46</name>
<description>Peripheral Clock 46 Disable</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID47</name>
<description>Peripheral Clock 47 Disable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID48</name>
<description>Peripheral Clock 48 Disable</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID49</name>
<description>Peripheral Clock 49 Disable</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID50</name>
<description>Peripheral Clock 50 Disable</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID51</name>
<description>Peripheral Clock 51 Disable</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID53</name>
<description>Peripheral Clock 53 Disable</description>
<bitOffset>20</bitOffset>
<bitWidth>2</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID54</name>
<description>Peripheral Clock 54 Disable</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID55</name>
<description>Peripheral Clock 55 Disable</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID56</name>
<description>Peripheral Clock 56 Disable</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID57</name>
<description>Peripheral Clock 57 Disable</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID58</name>
<description>Peripheral Clock 58 Disable</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID59</name>
<description>Peripheral Clock 59 Disable</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID60</name>
<description>Peripheral Clock 60 Disable</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID61</name>
<description>Peripheral Clock 61 Disable</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID62</name>
<description>Peripheral Clock 62 Disable</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PID63</name>
<description>Peripheral Clock 63 Disable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>PMC_PCSR1</name>
<description>Peripheral Clock Status Register 1</description>
<addressOffset>0x00000108</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>PID32</name>
<description>Peripheral Clock 32 Status</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID33</name>
<description>Peripheral Clock 33 Status</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID34</name>
<description>Peripheral Clock 34 Status</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID35</name>
<description>Peripheral Clock 35 Status</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID36</name>
<description>Peripheral Clock 36 Status</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID37</name>
<description>Peripheral Clock 37 Status</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID38</name>
<description>Peripheral Clock 38 Status</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID39</name>
<description>Peripheral Clock 39 Status</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID40</name>
<description>Peripheral Clock 40 Status</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID41</name>
<description>Peripheral Clock 41 Status</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID42</name>
<description>Peripheral Clock 42 Status</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID43</name>
<description>Peripheral Clock 43 Status</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID44</name>
<description>Peripheral Clock 44 Status</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID45</name>
<description>Peripheral Clock 45 Status</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID46</name>
<description>Peripheral Clock 46 Status</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID47</name>
<description>Peripheral Clock 47 Status</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID48</name>
<description>Peripheral Clock 48 Status</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID49</name>
<description>Peripheral Clock 49 Status</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID50</name>
<description>Peripheral Clock 50 Status</description>
<bitOffset>18</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID51</name>
<description>Peripheral Clock 51 Status</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID53</name>
<description>Peripheral Clock 53 Status</description>
<bitOffset>20</bitOffset>
<bitWidth>2</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID54</name>
<description>Peripheral Clock 54 Status</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID55</name>
<description>Peripheral Clock 55 Status</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID56</name>
<description>Peripheral Clock 56 Status</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID57</name>
<description>Peripheral Clock 57 Status</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID58</name>
<description>Peripheral Clock 58 Status</description>
<bitOffset>26</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID59</name>
<description>Peripheral Clock 59 Status</description>
<bitOffset>27</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID60</name>
<description>Peripheral Clock 60 Status</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID61</name>
<description>Peripheral Clock 61 Status</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID62</name>
<description>Peripheral Clock 62 Status</description>
<bitOffset>30</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PID63</name>
<description>Peripheral Clock 63 Status</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>PMC_PCR</name>
<description>Peripheral Control Register</description>
<addressOffset>0x0000010C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>PID</name>
<description>Peripheral ID</description>
<bitOffset>0</bitOffset>
<bitWidth>6</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CMD</name>
<description>Command</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DIV</name>
<description>Divisor Value</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>PERIPH_DIV_MCK</name>
<description>Peripheral clock is MCK</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>PERIPH_DIV2_MCK</name>
<description>Peripheral clock is MCK/2</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>PERIPH_DIV4_MCK</name>
<description>Peripheral clock is MCK/4</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>PERIPH_DIV8_MCK</name>
<description>Peripheral clock is MCK/8</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>EN</name>
<description>Enable</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>RSTC</name>
<version>6098J</version>
<description>Reset Controller</description>
<groupName>SYSC</groupName>
<prependToName>RSTC_</prependToName>
<baseAddress>0xFFFFFE00</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0xC</size>
<usage>registers</usage>
</addressBlock>
<registers>
<register>
<name>CR</name>
<description>Control Register</description>
<addressOffset>0x00000000</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>PROCRST</name>
<description>Processor Reset</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>PERRST</name>
<description>Peripheral Reset</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>EXTRST</name>
<description>External Reset</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>KEY</name>
<description>Password</description>
<bitOffset>24</bitOffset>
<bitWidth>8</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>SR</name>
<description>Status Register</description>
<addressOffset>0x00000004</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000001</resetValue>
<fields>
<field>
<name>URSTS</name>
<description>User Reset Status</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RSTTYP</name>
<description>Reset Type</description>
<bitOffset>8</bitOffset>
<bitWidth>3</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NRSTL</name>
<description>NRST Pin Level</description>
<bitOffset>16</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SRCMP</name>
<description>Software Reset Command in Progress</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>MR</name>
<description>Mode Register</description>
<addressOffset>0x00000008</addressOffset>
<size>32</size>
<access>read-write</access>
<fields>
<field>
<name>ERSTL</name>
<description>External Reset Length</description>
<bitOffset>8</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>KEY</name>
<description>Password</description>
<bitOffset>24</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>SHDWC</name>
<version>6122L</version>
<description>Shutdown Controller</description>
<groupName>SYSC</groupName>
<prependToName>SHDWC_</prependToName>
<baseAddress>0xFFFFFE10</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0xC</size>
<usage>registers</usage>
</addressBlock>
<registers>
<register>
<name>CR</name>
<description>Shutdown Control Register</description>
<addressOffset>0x00000000</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>SHDW</name>
<description>Shutdown Command</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>KEY</name>
<description>Password</description>
<bitOffset>24</bitOffset>
<bitWidth>8</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>MR</name>
<description>Shutdown Mode Register</description>
<addressOffset>0x00000004</addressOffset>
<size>32</size>
<access>read-write</access>
<fields>
<field>
<name>WKMODE0</name>
<description>Wake-up Mode 0</description>
<bitOffset>0</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
</field>
<field>
<name>CPTWK0</name>
<description>Counter on Wake-up 0</description>
<bitOffset>4</bitOffset>
<bitWidth>4</bitWidth>
<access>read-write</access>
</field>
<field>
<name>RTCWKEN</name>
<description>Real-time Clock Wake-up Enable</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>SR</name>
<description>Shutdown Status Register</description>
<addressOffset>0x00000008</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>WAKEUP0</name>
<description>Wake-up 0 Status</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>RTCWK</name>
<description>Real-time Clock Wake-up</description>
<bitOffset>17</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>PIT</name>
<version>6079B</version>
<description>Periodic Interval Timer</description>
<groupName>SYSC</groupName>
<prependToName>PIT_</prependToName>
<baseAddress>0xFFFFFE30</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x10</size>
<usage>registers</usage>
</addressBlock>
<registers>
<register>
<name>MR</name>
<description>Mode Register</description>
<addressOffset>0x00000000</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x000FFFFF</resetValue>
<fields>
<field>
<name>PIV</name>
<description>Periodic Interval Value</description>
<bitOffset>0</bitOffset>
<bitWidth>20</bitWidth>
<access>read-write</access>
</field>
<field>
<name>PITEN</name>
<description>Period Interval Timer Enabled</description>
<bitOffset>24</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>PITIEN</name>
<description>Periodic Interval Timer Interrupt Enable</description>
<bitOffset>25</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>SR</name>
<description>Status Register</description>
<addressOffset>0x00000004</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>PITS</name>
<description>Periodic Interval Timer Status</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>PIVR</name>
<description>Periodic Interval Value Register</description>
<addressOffset>0x00000008</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CPIV</name>
<description>Current Periodic Interval Value</description>
<bitOffset>0</bitOffset>
<bitWidth>20</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PICNT</name>
<description>Periodic Interval Counter</description>
<bitOffset>20</bitOffset>
<bitWidth>12</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>PIIR</name>
<description>Periodic Interval Image Register</description>
<addressOffset>0x0000000C</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CPIV</name>
<description>Current Periodic Interval Value</description>
<bitOffset>0</bitOffset>
<bitWidth>20</bitWidth>
<access>read-only</access>
</field>
<field>
<name>PICNT</name>
<description>Periodic Interval Counter</description>
<bitOffset>20</bitOffset>
<bitWidth>12</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>WDT</name>
<version>6080C</version>
<description>Watchdog Timer</description>
<groupName>SYSC</groupName>
<prependToName>WDT_</prependToName>
<baseAddress>0xFFFFFE40</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0xC</size>
<usage>registers</usage>
</addressBlock>
<registers>
<register>
<name>CR</name>
<description>Control Register</description>
<addressOffset>0x00000000</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>WDRSTT</name>
<description>Watchdog Restart</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>KEY</name>
<description>Password</description>
<bitOffset>24</bitOffset>
<bitWidth>8</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>MR</name>
<description>Mode Register</description>
<addressOffset>0x00000004</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x3FFF2FFF</resetValue>
<fields>
<field>
<name>WDV</name>
<description>Watchdog Counter Value</description>
<bitOffset>0</bitOffset>
<bitWidth>12</bitWidth>
<access>read-write</access>
</field>
<field>
<name>WDFIEN</name>
<description>Watchdog Fault Interrupt Enable</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>WDRSTEN</name>
<description>Watchdog Reset Enable</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>WDRPROC</name>
<description>Watchdog Reset Processor</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>WDDIS</name>
<description>Watchdog Disable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>WDD</name>
<description>Watchdog Delta Value</description>
<bitOffset>16</bitOffset>
<bitWidth>12</bitWidth>
<access>read-write</access>
</field>
<field>
<name>WDDBGHLT</name>
<description>Watchdog Debug Halt</description>
<bitOffset>28</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>WDIDLEHLT</name>
<description>Watchdog Idle Halt</description>
<bitOffset>29</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>SR</name>
<description>Status Register</description>
<addressOffset>0x00000008</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>WDUNF</name>
<description>Watchdog Underflow</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>WDERR</name>
<description>Watchdog Error</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>SCKC</name>
<version>11073C</version>
<description>Slow Clock Controller</description>
<groupName>SYSC</groupName>
<prependToName>SCKC_</prependToName>
<baseAddress>0xFFFFFE50</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x4</size>
<usage>registers</usage>
</addressBlock>
<registers>
<register>
<name>CR</name>
<description>Slow Clock Configuration Register</description>
<addressOffset>0x00000000</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000001</resetValue>
<fields>
<field>
<name>RCEN</name>
<description>Internal 32 kHz RC Oscillator</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>OSC32EN</name>
<description>32768 Hz Oscillator</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>OSC32BYP</name>
<description>32768Hz Oscillator Bypass</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>OSCSEL</name>
<description>Slow Clock Selector</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>RC</name>
<description>Slow clock is internal 32 kHz RC oscillator.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>XTAL</name>
<description>Slow clock is 32768 Hz oscillator.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>BSC</name>
<version>11072B</version>
<description>Boot Sequence Controller</description>
<groupName>SYSC</groupName>
<prependToName>BSC_</prependToName>
<baseAddress>0xFFFFFE54</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x4</size>
<usage>registers</usage>
</addressBlock>
<registers>
<register>
<name>CR</name>
<description>Boot Sequence Configuration Register</description>
<addressOffset>0x00000000</addressOffset>
<size>32</size>
<access>read-write</access>
<fields>
<field>
<name>BOOT</name>
<description>Boot media sequence</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>BOOTKEY</name>
<bitOffset>16</bitOffset>
<bitWidth>16</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>BSC_KEY</name>
<description>valid key to write BSC_CR register; it needs to be written at the same time as the BOOT field.</description>
<value>0x6683</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>GPBR</name>
<version>6378D</version>
<description>General Purpose Backup Register</description>
<groupName>SYSC</groupName>
<prependToName>GPBR_</prependToName>
<baseAddress>0xFFFFFE60</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x10</size>
<usage>registers</usage>
</addressBlock>
<registers>
<register>
<dim>4</dim>
<dimIncrement>4</dimIncrement>
<dimIndex>0-3</dimIndex>
<name>GPBR[%s]</name>
<description>General Purpose Backup Register</description>
<addressOffset>0x00000000</addressOffset>
<size>32</size>
<access>read-write</access>
<fields>
<field>
<name>GPBR_VALUE</name>
<description>Value of GPBR x</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
</registers>
</peripheral>
<peripheral>
<name>RTC</name>
<version>6056L</version>
<description>Real-time Clock</description>
<groupName>SYSC</groupName>
<prependToName>RTC_</prependToName>
<baseAddress>0xFFFFFEB0</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x30</size>
<usage>registers</usage>
</addressBlock>
<registers>
<register>
<name>CR</name>
<description>Control Register</description>
<addressOffset>0x00000000</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>UPDTIM</name>
<description>Update Request Time Register</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>UPDCAL</name>
<description>Update Request Calendar Register</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>TIMEVSEL</name>
<description>Time Event Selection</description>
<bitOffset>8</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>MINUTE</name>
<description>Minute change</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>HOUR</name>
<description>Hour change</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>MIDNIGHT</name>
<description>Every day at midnight</description>
<value>0x2</value>
</enumeratedValue>
<enumeratedValue>
<name>NOON</name>
<description>Every day at noon</description>
<value>0x3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CALEVSEL</name>
<description>Calendar Event Selection</description>
<bitOffset>16</bitOffset>
<bitWidth>2</bitWidth>
<access>read-write</access>
<enumeratedValues>
<enumeratedValue>
<name>WEEK</name>
<description>Week change (every Monday at time 00:00:00)</description>
<value>0x0</value>
</enumeratedValue>
<enumeratedValue>
<name>MONTH</name>
<description>Month change (every 01 of each month at time 00:00:00)</description>
<value>0x1</value>
</enumeratedValue>
<enumeratedValue>
<name>YEAR</name>
<description>Year change (every January 1 at time 00:00:00)</description>
<value>0x2</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>MR</name>
<description>Mode Register</description>
<addressOffset>0x00000004</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>HRMOD</name>
<description>12-/24-hour Mode</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>TIMR</name>
<description>Time Register</description>
<addressOffset>0x00000008</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SEC</name>
<description>Current Second</description>
<bitOffset>0</bitOffset>
<bitWidth>7</bitWidth>
<access>read-write</access>
</field>
<field>
<name>MIN</name>
<description>Current Minute</description>
<bitOffset>8</bitOffset>
<bitWidth>7</bitWidth>
<access>read-write</access>
</field>
<field>
<name>HOUR</name>
<description>Current Hour</description>
<bitOffset>16</bitOffset>
<bitWidth>6</bitWidth>
<access>read-write</access>
</field>
<field>
<name>AMPM</name>
<description>Ante Meridiem Post Meridiem Indicator</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>CALR</name>
<description>Calendar Register</description>
<addressOffset>0x0000000C</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x01810720</resetValue>
<fields>
<field>
<name>CENT</name>
<description>Current Century</description>
<bitOffset>0</bitOffset>
<bitWidth>7</bitWidth>
<access>read-write</access>
</field>
<field>
<name>YEAR</name>
<description>Current Year</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
<access>read-write</access>
</field>
<field>
<name>MONTH</name>
<description>Current Month</description>
<bitOffset>16</bitOffset>
<bitWidth>5</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DAY</name>
<description>Current Day in Current Week</description>
<bitOffset>21</bitOffset>
<bitWidth>3</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DATE</name>
<description>Current Day in Current Month</description>
<bitOffset>24</bitOffset>
<bitWidth>6</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>TIMALR</name>
<description>Time Alarm Register</description>
<addressOffset>0x00000010</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>SEC</name>
<description>Second Alarm</description>
<bitOffset>0</bitOffset>
<bitWidth>7</bitWidth>
<access>read-write</access>
</field>
<field>
<name>SECEN</name>
<description>Second Alarm Enable</description>
<bitOffset>7</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>MIN</name>
<description>Minute Alarm</description>
<bitOffset>8</bitOffset>
<bitWidth>7</bitWidth>
<access>read-write</access>
</field>
<field>
<name>MINEN</name>
<description>Minute Alarm Enable</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>HOUR</name>
<description>Hour Alarm</description>
<bitOffset>16</bitOffset>
<bitWidth>6</bitWidth>
<access>read-write</access>
</field>
<field>
<name>AMPM</name>
<description>AM/PM Indicator</description>
<bitOffset>22</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>HOUREN</name>
<description>Hour Alarm Enable</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>CALALR</name>
<description>Calendar Alarm Register</description>
<addressOffset>0x00000014</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x01010000</resetValue>
<fields>
<field>
<name>MONTH</name>
<description>Month Alarm</description>
<bitOffset>16</bitOffset>
<bitWidth>5</bitWidth>
<access>read-write</access>
</field>
<field>
<name>MTHEN</name>
<description>Month Alarm Enable</description>
<bitOffset>23</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DATE</name>
<description>Date Alarm</description>
<bitOffset>24</bitOffset>
<bitWidth>6</bitWidth>
<access>read-write</access>
</field>
<field>
<name>DATEEN</name>
<description>Date Alarm Enable</description>
<bitOffset>31</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>SR</name>
<description>Status Register</description>
<addressOffset>0x00000018</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>ACKUPD</name>
<description>Acknowledge for Update</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>FREERUN</name>
<description>Time and calendar registers cannot be updated.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>UPDATE</name>
<description>Time and calendar registers can be updated.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>ALARM</name>
<description>Alarm Flag</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>NO_ALARMEVENT</name>
<description>No alarm matching condition occurred.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>ALARMEVENT</name>
<description>An alarm matching condition has occurred.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>SEC</name>
<description>Second Event</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>NO_SECEVENT</name>
<description>No second event has occurred since the last clear.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>SECEVENT</name>
<description>At least one second event has occurred since the last clear.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>TIMEV</name>
<description>Time Event</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>NO_TIMEVENT</name>
<description>No time event has occurred since the last clear.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>TIMEVENT</name>
<description>At least one time event has occurred since the last clear.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CALEV</name>
<description>Calendar Event</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
<enumeratedValues>
<enumeratedValue>
<name>NO_CALEVENT</name>
<description>No calendar event has occurred since the last clear.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>CALEVENT</name>
<description>At least one calendar event has occurred since the last clear.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
<name>SCCR</name>
<description>Status Clear Command Register</description>
<addressOffset>0x0000001C</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>ACKCLR</name>
<description>Acknowledge Clear</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ALRCLR</name>
<description>Alarm Clear</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SECCLR</name>
<description>Second Clear</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TIMCLR</name>
<description>Time Clear</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CALCLR</name>
<description>Calendar Clear</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IER</name>
<description>Interrupt Enable Register</description>
<addressOffset>0x00000020</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>ACKEN</name>
<description>Acknowledge Update Interrupt Enable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ALREN</name>
<description>Alarm Interrupt Enable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SECEN</name>
<description>Second Event Interrupt Enable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TIMEN</name>
<description>Time Event Interrupt Enable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CALEN</name>
<description>Calendar Event Interrupt Enable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IDR</name>
<description>Interrupt Disable Register</description>
<addressOffset>0x00000024</addressOffset>
<size>32</size>
<access>write-only</access>
<fields>
<field>
<name>ACKDIS</name>
<description>Acknowledge Update Interrupt Disable</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>ALRDIS</name>
<description>Alarm Interrupt Disable</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>SECDIS</name>
<description>Second Event Interrupt Disable</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>TIMDIS</name>
<description>Time Event Interrupt Disable</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
<field>
<name>CALDIS</name>
<description>Calendar Event Interrupt Disable</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>write-only</access>
</field>
</fields>
</register>
<register>
<name>IMR</name>
<description>Interrupt Mask Register</description>
<addressOffset>0x00000028</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>ACK</name>
<description>Acknowledge Update Interrupt Mask</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>ALR</name>
<description>Alarm Interrupt Mask</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>SEC</name>
<description>Second Event Interrupt Mask</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>TIM</name>
<description>Time Event Interrupt Mask</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>CAL</name>
<description>Calendar Event Interrupt Mask</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
<register>
<name>VER</name>
<description>Valid Entry Register</description>
<addressOffset>0x0000002C</addressOffset>
<size>32</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>NVTIM</name>
<description>Non-valid Time</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NVCAL</name>
<description>Non-valid Calendar</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NVTIMALR</name>
<description>Non-valid Time Alarm</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>NVCALALR</name>
<description>Non-valid Calendar Alarm</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
</fields>
</register>
</registers>
</peripheral>
</peripherals>
</device>
<!-- Generated by : SOCK v3.91.0_08 -->
<!-- Source SCM revision : 3557 -->
<!-- Source SHA sum : 9acbb306b1da9ac944b432f110478b47815641d5 -->
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