SiFive FE310 8 32 32 read-write 0x00000000 0xFFFFFFFF CLINT 0x02000000 CLINT Coreplex Local Interrupts msip Hart 0 software interrupt register 0x0000 0 1 mtimecmp Hart 0 time comparator register 0x4000 mtimecmph Hart 0 time comparator register 0x4004 mtime Timer register 0xBFF8 mtimeh Timer register 0xBFFC PLIC 0x0C000000 PLIC Platform Level Interrupt Control 52 0x04 priority[%s] Interrupt Priority Register 0x000000 2 0x04 pending[%s] Interrupt Pending Register 0x001000 2 0x04 enable[%s] Interrupt Enable Register 0x002000 threshold Priority Threshold Register 0x200000 priority 20 Priority Never Never interrupt 0 P1 Priority 1 1 P2 Priority 2 2 P3 Priority 3 3 P4 Priority 4 4 P5 Priority 5 5 P6 Priority 6 6 P7 Priority 7 7 claim Claim/Complete Register 0x200004 0x00000000 0xFFFFFFFF WDOG 0x10000000 Watchdog Watchdog wdogcfg Watchdog Configuration Register 0x000 cmpip2828 encoreawake1313 enalways1212 zerocmp99 rsten88 scale30 wdogcount Watchdog Counter Register 0x008 wdogs Watchdog Scaled Counter Register 0x010 wdogfeed Watchdog Feed Register 0x018 wdogkey Watchdog Key Register 0x01C write-only 0x51F15E wdogcmp Watchdog Compare Register 0x020 value150 WATCHDOG 1 RTC 0x10000000 RTC Watchdog rtccfg RTC Configuration Register 0x040 cmpip2828 enalways1212 scale30 rtclo RTC Counter Low Register 0x048 rtchi RTC Counter High Register 0x04C value150 rtcs RTC Scaled Counter Register 0x050 rtccmp RTC Compare Register 0x060 RTC 2 AONCLK 0x10000000 AONCLOCK Always-On Clock Configuration lfrosccfg AON Clock Configuration Register 0x070 ready3131 enable3030 trim[20:16] div50 BACKUP 0x10000000 BACKUP Backup Registers 16 0x04 backup[%s] Backup Register 0x080 PMU 0x10000000 PMU PMU 8 0x04 pmuwakepm[%s] PMU Wake Program Memory 0x100 isolate99 hfclkrst88 corerst77 pmu_out_1_en55 pmu_out_0_en44 delay30 8 0x04 pmusleeppm[%s] PMU Sleep Program Memory 0x120 isolate99 hfclkrst88 corerst77 pmu_out_1_en55 pmu_out_0_en44 delay30 pmuie PMU Interrupt Enable Register 0x140 awakeup33 dwakeup22 rtc11 pmucause PMU Cause Register 0x144 resetcause 98 PowerOn Power-on reset 0 External External reset 1 Watchdog Watchdog reset 2 wakeupcause 10 Reset Reset wakeup 0 RTC RTC wakeup 1 Digital Digital input wakeup 2 pmusleep PMU Sleep Register 0x148 write-only sleep00 pmukey PMU Key Register 0x14C PRCI 0x10008000 PRCI Power Reset Clock Interrupts hfrosccfg Clock Configuration Register 0x000 ready3131 enable3030 trim2016 div50 hfxosccfg Clock Configuration Register 0x004 ready3131 enable3030 pllcfg PLL Configuration Register 0x008 0x306F9 lock3131 bypass1818 refsel1717 sel1616 pllq 1110 PLLQ Q2 1 Q4 2 Q8 3 pllf94 pllr 20 PLLR R1 0 R2 1 R3 2 R4 3 plloutdiv PLL Divider Register 0x00C 0x100 divby188 div50 coreclkcfg Clock Configuration Register 0x010 OTP 0x10010000 OTP One Time Programmable Memory lock Programmed-I/O lock register 0x00 clock OTP device clock signal 0x04 output_en OTP device output-enable signal 0x08 select OTP device chip-select signal 0x0C write_en OTP device write-enable signal 0x10 mode OTP device mode register 0x14 mrr OTP read-voltage regulator control 0x18 mpp OTP write-voltage charge pump control 0x1C vrren OTP read-voltage enable 0x20 vppen OTP write-voltage enable 0x24 addr OTP device address 0x28 data_in OTP device data input 0x2C data_out OTP device data output 0x30 rsctrl OTP read sequencer control 0x34 GPIO0 0x10012000 GPIO General Purpose Input Output value Pin value. 0x000 pin000 pin111 pin222 pin333 pin444 pin555 pin666 pin777 pin888 pin999 pin101010 pin111111 pin121212 pin131313 pin141414 pin151515 pin161616 pin171717 pin181818 pin191919 pin202020 pin212121 pin222222 pin232323 pin242424 pin252525 pin262626 pin272727 pin282828 pin292929 pin303030 pin313131 input_en Pin Input Enable Register 0x004 pin000 pin111 pin222 pin333 pin444 pin555 pin666 pin777 pin888 pin999 pin101010 pin111111 pin121212 pin131313 pin141414 pin151515 pin161616 pin171717 pin181818 pin191919 pin202020 pin212121 pin222222 pin232323 pin242424 pin252525 pin262626 pin272727 pin282828 pin292929 pin303030 pin313131 output_en Pin Output Enable Register 0x008 pin000 pin111 pin222 pin333 pin444 pin555 pin666 pin777 pin888 pin999 pin101010 pin111111 pin121212 pin131313 pin141414 pin151515 pin161616 pin171717 pin181818 pin191919 pin202020 pin212121 pin222222 pin232323 pin242424 pin252525 pin262626 pin272727 pin282828 pin292929 pin303030 pin313131 port Output Port Value Register 0x00C pin000 pin111 pin222 pin333 pin444 pin555 pin666 pin777 pin888 pin999 pin101010 pin111111 pin121212 pin131313 pin141414 pin151515 pin161616 pin171717 pin181818 pin191919 pin202020 pin212121 pin222222 pin232323 pin242424 pin252525 pin262626 pin272727 pin282828 pin292929 pin303030 pin313131 pullup Internal Pull-Up Enable Register 0x010 pin000 pin111 pin222 pin333 pin444 pin555 pin666 pin777 pin888 pin999 pin101010 pin111111 pin121212 pin131313 pin141414 pin151515 pin161616 pin171717 pin181818 pin191919 pin202020 pin212121 pin222222 pin232323 pin242424 pin252525 pin262626 pin272727 pin282828 pin292929 pin303030 pin313131 drive Drive Strength Register 0x014 pin000 pin111 pin222 pin333 pin444 pin555 pin666 pin777 pin888 pin999 pin101010 pin111111 pin121212 pin131313 pin141414 pin151515 pin161616 pin171717 pin181818 pin191919 pin202020 pin212121 pin222222 pin232323 pin242424 pin252525 pin262626 pin272727 pin282828 pin292929 pin303030 pin313131 rise_ie Rise Interrupt Enable Register 0x018 pin000 pin111 pin222 pin333 pin444 pin555 pin666 pin777 pin888 pin999 pin101010 pin111111 pin121212 pin131313 pin141414 pin151515 pin161616 pin171717 pin181818 pin191919 pin202020 pin212121 pin222222 pin232323 pin242424 pin252525 pin262626 pin272727 pin282828 pin292929 pin303030 pin313131 rise_ip Rise Interrupt Pending Register 0x01C pin000 pin111 pin222 pin333 pin444 pin555 pin666 pin777 pin888 pin999 pin101010 pin111111 pin121212 pin131313 pin141414 pin151515 pin161616 pin171717 pin181818 pin191919 pin202020 pin212121 pin222222 pin232323 pin242424 pin252525 pin262626 pin272727 pin282828 pin292929 pin303030 pin313131 fall_ie Fall Interrupt Enable Register 0x020 pin000 pin111 pin222 pin333 pin444 pin555 pin666 pin777 pin888 pin999 pin101010 pin111111 pin121212 pin131313 pin141414 pin151515 pin161616 pin171717 pin181818 pin191919 pin202020 pin212121 pin222222 pin232323 pin242424 pin252525 pin262626 pin272727 pin282828 pin292929 pin303030 pin313131 fall_ip Fall Interrupt Pending Register 0x024 pin000 pin111 pin222 pin333 pin444 pin555 pin666 pin777 pin888 pin999 pin101010 pin111111 pin121212 pin131313 pin141414 pin151515 pin161616 pin171717 pin181818 pin191919 pin202020 pin212121 pin222222 pin232323 pin242424 pin252525 pin262626 pin272727 pin282828 pin292929 pin303030 pin313131 high_ie High Interrupt Enable Register 0x028 pin000 pin111 pin222 pin333 pin444 pin555 pin666 pin777 pin888 pin999 pin101010 pin111111 pin121212 pin131313 pin141414 pin151515 pin161616 pin171717 pin181818 pin191919 pin202020 pin212121 pin222222 pin232323 pin242424 pin252525 pin262626 pin272727 pin282828 pin292929 pin303030 pin313131 high_ip High Interrupt Pending Register 0x02C pin000 pin111 pin222 pin333 pin444 pin555 pin666 pin777 pin888 pin999 pin101010 pin111111 pin121212 pin131313 pin141414 pin151515 pin161616 pin171717 pin181818 pin191919 pin202020 pin212121 pin222222 pin232323 pin242424 pin252525 pin262626 pin272727 pin282828 pin292929 pin303030 pin313131 low_ie Low Interrupt Enable Register 0x030 pin000 pin111 pin222 pin333 pin444 pin555 pin666 pin777 pin888 pin999 pin101010 pin111111 pin121212 pin131313 pin141414 pin151515 pin161616 pin171717 pin181818 pin191919 pin202020 pin212121 pin222222 pin232323 pin242424 pin252525 pin262626 pin272727 pin282828 pin292929 pin303030 pin313131 low_ip Low Interrupt Pending Register 0x034 pin000 pin111 pin222 pin333 pin444 pin555 pin666 pin777 pin888 pin999 pin101010 pin111111 pin121212 pin131313 pin141414 pin151515 pin161616 pin171717 pin181818 pin191919 pin202020 pin212121 pin222222 pin232323 pin242424 pin252525 pin262626 pin272727 pin282828 pin292929 pin303030 pin313131 iof_en HW I/O Function Enable Register 0x038 pin000 pin111 pin222 pin333 pin444 pin555 pin666 pin777 pin888 pin999 pin101010 pin111111 pin121212 pin131313 pin141414 pin151515 pin161616 pin171717 pin181818 pin191919 pin202020 pin212121 pin222222 pin232323 pin242424 pin252525 pin262626 pin272727 pin282828 pin292929 pin303030 pin313131 iof_sel HW I/O Function Select Register 0x03C pin000 IOF00 PWM0_01 pin111 IOF00 PWM0_11 pin222 QSPI1_SS00 PWM0_21 pin333 QSPI1_SD00 PWM0_31 pin444 QSPI1_SD10 IOF11 pin555 QSPI1_SCK0 IOF11 pin666 QSPI1_SD20 IOF11 pin777 QSPI1_SD30 IOF11 pin888 QSPI1_SS10 IOF11 pin999 QSPI1_SS20 IOF11 pin101010 QSPI1_SS30 PWM2_01 pin111111 IOF00 PWM2_11 pin121212 IOF00 PWM2_21 pin131313 IOF00 PWM2_31 pin141414 IOF00 IOF11 pin151515 IOF00 IOF11 pin161616 UART0_RX0 IOF11 pin171717 UART0_TX0 IOF11 pin181818 IOF00 IOF11 pin191919 IOF00 PWM1_11 pin202020 IOF00 PWM1_01 pin212121 IOF00 PWM1_21 pin222222 IOF00 PWM1_31 pin232323 IOF00 IOF11 pin242424 UART1_RX0 IOF11 pin252525 UART1_TX0 IOF11 pin262626 QSPI2_SS0 IOF11 pin272727 QSPI2_SD00 IOF11 pin282828 QSPI2_SD10 IOF11 pin292929 QSPI2_SCK0 IOF11 pin303030 QSPI2_SD20 IOF11 pin313131 QSPI2_SD30 IOF11 out_xor Output XOR (invert) Register 0x040 pin000 pin111 pin222 pin333 pin444 pin555 pin666 pin777 pin888 pin999 pin101010 pin111111 pin121212 pin131313 pin141414 pin151515 pin161616 pin171717 pin181818 pin191919 pin202020 pin212121 pin222222 pin232323 pin242424 pin252525 pin262626 pin272727 pin282828 pin292929 pin303030 pin313131 GPIO0 8 GPIO1 9 GPIO2 10 GPIO3 11 GPIO4 12 GPIO5 13 GPIO6 14 GPIO7 15 GPIO8 16 GPIO9 17 GPIO10 18 GPIO11 19 GPIO12 20 GPIO13 21 GPIO14 22 GPIO15 23 GPIO16 24 GPIO17 25 GPIO18 26 GPIO19 27 GPIO20 28 GPIO21 29 GPIO22 30 GPIO23 31 GPIO24 32 GPIO25 33 GPIO26 34 GPIO27 35 GPIO28 36 GPIO29 37 GPIO30 38 GPIO31 39 UART0 0x10013000 UART Universal Asynchronous Receiver Transmitter txdata Transmit Data Register 0x00 full3131 data70 rxdata Receive Data Register 0x04 empty3131 data70 txctrl Transmit Control Register 0x08 counter1816 nstop11 enable00 rxctrl Receive Control Register 0x0C counter1816 enable00 ie Interrupt Enable Register 0x10 rxwm11 txwm00 ip Interrupt Pending Register 0x14 rxwm11 txwm00 div Baud Rate Divisor Register 0x18 value150 UART0 3 QSPI0 0x10014000 QSPI Quad Serial Peripheral Interface div Serial Clock Divisor Register 0x00 value110 mode Serial Clock Mode Register 0x04 polarity11 phase00 csid Chip Select ID Register 0x10 csdef Chip Select Default Register 0x14 0xFFFF csmode Chip Select Mode Register 0x18 Auto Assert/de-assert CS at the beginning/end of each frame. 0 Hold Keep CS continuously asserted after the initial frame. 2 Off Disable hardware control of the CS pin. 3 delay0 Delay Control 0 Register 0x28 sckcs2316 cssck70 delay1 Delay Control 1 Register 0x2C interxfr2316 intercs70 fmt Frame Format Register 0x40 length1916 direction 33 Rx For dual and quad protocols, the DQ pins are tri-stated. For the single protocol, the DQ0 pin is driven with the transmit data as normal. 0 Tx The receive FIFO is not populated. 1 endian 22 Big Transmit MSB first. 0 Little Transmit LSB first. 1 protocol 10 Single DQ0 (MOSI), DQ1 (MISO) 0 Dual DQ0, DQ1 1 Quad DQ0, DQ1, DQ2, DQ3 2 txdata Transmit Data Register 0x48 full3131 data70 rxdata Receive Data Register 0x4C empty3131 data70 txmark Transmit Watermark Register 0x50 value20 rxmark Receive Watermark Register 0x54 value20 fctrl SPI Flash Interface Control Register 0x60 enable00 ffmt SPI Flash Instruction Format Register 0x64 pad_code 3124 First 8 bits to transmit during dummy cycles 0x00 cmd_code 2316 Value of command byte 0x03 data_proto 1312 Protocol for receiving data bytes 0x0 Single DQ0 (MOSI), DQ1 (MISO) 0 Dual DQ0, DQ1 1 Quad DQ0, DQ1, DQ2, DQ3 2 addr_proto 1110 Protocol for transmitting address and padding 0x0 Single DQ0 (MOSI), DQ1 (MISO) 0 Dual DQ0, DQ1 1 Quad DQ0, DQ1, DQ2, DQ3 2 cmd_proto 98 Protocol for transmitting command 0x0 Single DQ0 (MOSI), DQ1 (MISO) 0 Dual DQ0, DQ1 1 Quad DQ0, DQ1, DQ2, DQ3 2 pad_cnt 00 Number of dummy cycles 0x0 addr_len 31 Number of address bytes (0 to 4) 0x3 cmd_en 00 Enable sending of command 0x1 ie SPI Interrupt Enable Register 0x70 rxwm11 txwm00 ip SPI Interrupt Pending Register 0x74 rxwm11 txwm00 QSPI0 5 PWM0 0x10015000 PWM 8-bit timer with 4 cmp cfg PWM Configuration Register 0x00 cmp3ip3131 cmp2ip3030 cmp1ip2929 cmp0ip2828 cmp3gang2727 cmp2gang3626 cmp1gang2525 cmp0gang2424 cmp3center1919 cmp2center1818 cmp1center1717 cmp0center1616 enoneshot1313 enalways1212 deglitch1010 zerocmp99 sticky88 scale30 count Counter Register 0x08 pwms Scaled Halfword Counter Register 0x10 cmp0 Compare Register 0x20 value150 cmp1 Compare Register 0x24 value150 cmp2 Compare Register 0x28 value150 cmp3 Compare Register 0x2C value150 PWM0CMP0 40 PWM0CMP1 41 PWM0CMP2 42 PWM0CMP3 43 I2C0 0x10016000 I2C Inter-Integrated Circuit Master Interface (FE310-G002 only) prer_lo Clock Prescale register lo-byte 0x00 value [7:0] prer_hi Clock Prescale register hi-byte 0x04 value [7:0] ctr Control register 0x08 en I2C core enable bit [7:7] ien I2C core interrupt enable bit [6:6] txr_rxr Transmit register / Receive register 0x0c data [7:0] cr_sr Command register / Status register 0x10 cr Command register 0x10 write-only sta Generate (repeated) start condition [7:7] sto Generate stop condition [6:6] rd Read from slave [5:5] wr Write to slave [4:4] ack When a receiver, sent ACK (0) or NACK (1) [3:3] ack 0 nack 1 iack Interrupt acknowledge. When set, clears a pending interrupt [0:0] sr Status register 0x10 read-only cr rx_ack Received acknowledge from slave. This flag represents acknowledge from the addressed slave. '1' = No acknowledge received '0' = Acknowledge received [7:7] busy I2C bus busy [6:6] al Arbitration lost [5:5] tip Transfer in progress [1:1] if Interrupt Flag. This bit is set when an interrupt is pending, which will cause a processor interrupt request if the IEN bit is set. [0:0] I2C0 52 UART1 0x10023000 UART1 4 QSPI1 0x10024000 QSPI1 6 PWM1 0x10025000 PWM1CMP0 44 PWM1CMP1 45 PWM1CMP2 46 PWM1CMP3 47 QSPI2 0x10034000 QSPI2 7 PWM2 0x10035000 PWM2CMP0 48 PWM2CMP1 49 PWM2CMP2 50 PWM2CMP3 51