STM32F373 1.4 STM32F373 CM4 r1p0 little false false 3 false 8 32 0x20 0x0 0xFFFFFFFF GPIOA General-purpose I/Os GPIO 0x48000000 0x0 0x400 registers MODER MODER GPIO port mode register 0x0 0x20 read-write 0x28000000 MODER15 Port x configuration bits (y = 0..15) 30 2 MODER14 Port x configuration bits (y = 0..15) 28 2 MODER13 Port x configuration bits (y = 0..15) 26 2 MODER12 Port x configuration bits (y = 0..15) 24 2 MODER11 Port x configuration bits (y = 0..15) 22 2 MODER10 Port x configuration bits (y = 0..15) 20 2 MODER9 Port x configuration bits (y = 0..15) 18 2 MODER8 Port x configuration bits (y = 0..15) 16 2 MODER7 Port x configuration bits (y = 0..15) 14 2 MODER6 Port x configuration bits (y = 0..15) 12 2 MODER5 Port x configuration bits (y = 0..15) 10 2 MODER4 Port x configuration bits (y = 0..15) 8 2 MODER3 Port x configuration bits (y = 0..15) 6 2 MODER2 Port x configuration bits (y = 0..15) 4 2 MODER1 Port x configuration bits (y = 0..15) 2 2 MODER0 Port x configuration bits (y = 0..15) 0 2 OTYPER OTYPER GPIO port output type register 0x4 0x20 read-write 0x00000000 OT15 Port x configuration bits (y = 0..15) 15 1 OT14 Port x configuration bits (y = 0..15) 14 1 OT13 Port x configuration bits (y = 0..15) 13 1 OT12 Port x configuration bits (y = 0..15) 12 1 OT11 Port x configuration bits (y = 0..15) 11 1 OT10 Port x configuration bits (y = 0..15) 10 1 OT9 Port x configuration bits (y = 0..15) 9 1 OT8 Port x configuration bits (y = 0..15) 8 1 OT7 Port x configuration bits (y = 0..15) 7 1 OT6 Port x configuration bits (y = 0..15) 6 1 OT5 Port x configuration bits (y = 0..15) 5 1 OT4 Port x configuration bits (y = 0..15) 4 1 OT3 Port x configuration bits (y = 0..15) 3 1 OT2 Port x configuration bits (y = 0..15) 2 1 OT1 Port x configuration bits (y = 0..15) 1 1 OT0 Port x configuration bits (y = 0..15) 0 1 OSPEEDR OSPEEDR GPIO port output speed register 0x8 0x20 read-write 0x00000000 OSPEEDR15 Port x configuration bits (y = 0..15) 30 2 OSPEEDR14 Port x configuration bits (y = 0..15) 28 2 OSPEEDR13 Port x configuration bits (y = 0..15) 26 2 OSPEEDR12 Port x configuration bits (y = 0..15) 24 2 OSPEEDR11 Port x configuration bits (y = 0..15) 22 2 OSPEEDR10 Port x configuration bits (y = 0..15) 20 2 OSPEEDR9 Port x configuration bits (y = 0..15) 18 2 OSPEEDR8 Port x configuration bits (y = 0..15) 16 2 OSPEEDR7 Port x configuration bits (y = 0..15) 14 2 OSPEEDR6 Port x configuration bits (y = 0..15) 12 2 OSPEEDR5 Port x configuration bits (y = 0..15) 10 2 OSPEEDR4 Port x configuration bits (y = 0..15) 8 2 OSPEEDR3 Port x configuration bits (y = 0..15) 6 2 OSPEEDR2 Port x configuration bits (y = 0..15) 4 2 OSPEEDR1 Port x configuration bits (y = 0..15) 2 2 OSPEEDR0 Port x configuration bits (y = 0..15) 0 2 PUPDR PUPDR GPIO port pull-up/pull-down register 0xC 0x20 read-write 0x24000000 PUPDR15 Port x configuration bits (y = 0..15) 30 2 PUPDR14 Port x configuration bits (y = 0..15) 28 2 PUPDR13 Port x configuration bits (y = 0..15) 26 2 PUPDR12 Port x configuration bits (y = 0..15) 24 2 PUPDR11 Port x configuration bits (y = 0..15) 22 2 PUPDR10 Port x configuration bits (y = 0..15) 20 2 PUPDR9 Port x configuration bits (y = 0..15) 18 2 PUPDR8 Port x configuration bits (y = 0..15) 16 2 PUPDR7 Port x configuration bits (y = 0..15) 14 2 PUPDR6 Port x configuration bits (y = 0..15) 12 2 PUPDR5 Port x configuration bits (y = 0..15) 10 2 PUPDR4 Port x configuration bits (y = 0..15) 8 2 PUPDR3 Port x configuration bits (y = 0..15) 6 2 PUPDR2 Port x configuration bits (y = 0..15) 4 2 PUPDR1 Port x configuration bits (y = 0..15) 2 2 PUPDR0 Port x configuration bits (y = 0..15) 0 2 IDR IDR GPIO port input data register 0x10 0x20 read-only 0x00000000 IDR15 Port input data (y = 0..15) 15 1 IDR14 Port input data (y = 0..15) 14 1 IDR13 Port input data (y = 0..15) 13 1 IDR12 Port input data (y = 0..15) 12 1 IDR11 Port input data (y = 0..15) 11 1 IDR10 Port input data (y = 0..15) 10 1 IDR9 Port input data (y = 0..15) 9 1 IDR8 Port input data (y = 0..15) 8 1 IDR7 Port input data (y = 0..15) 7 1 IDR6 Port input data (y = 0..15) 6 1 IDR5 Port input data (y = 0..15) 5 1 IDR4 Port input data (y = 0..15) 4 1 IDR3 Port input data (y = 0..15) 3 1 IDR2 Port input data (y = 0..15) 2 1 IDR1 Port input data (y = 0..15) 1 1 IDR0 Port input data (y = 0..15) 0 1 ODR ODR GPIO port output data register 0x14 0x20 read-write 0x00000000 ODR15 Port output data (y = 0..15) 15 1 ODR14 Port output data (y = 0..15) 14 1 ODR13 Port output data (y = 0..15) 13 1 ODR12 Port output data (y = 0..15) 12 1 ODR11 Port output data (y = 0..15) 11 1 ODR10 Port output data (y = 0..15) 10 1 ODR9 Port output data (y = 0..15) 9 1 ODR8 Port output data (y = 0..15) 8 1 ODR7 Port output data (y = 0..15) 7 1 ODR6 Port output data (y = 0..15) 6 1 ODR5 Port output data (y = 0..15) 5 1 ODR4 Port output data (y = 0..15) 4 1 ODR3 Port output data (y = 0..15) 3 1 ODR2 Port output data (y = 0..15) 2 1 ODR1 Port output data (y = 0..15) 1 1 ODR0 Port output data (y = 0..15) 0 1 BSRR BSRR GPIO port bit set/reset register 0x18 0x20 write-only 0x00000000 BR15 Port x reset bit y (y = 0..15) 31 1 BR14 Port x reset bit y (y = 0..15) 30 1 BR13 Port x reset bit y (y = 0..15) 29 1 BR12 Port x reset bit y (y = 0..15) 28 1 BR11 Port x reset bit y (y = 0..15) 27 1 BR10 Port x reset bit y (y = 0..15) 26 1 BR9 Port x reset bit y (y = 0..15) 25 1 BR8 Port x reset bit y (y = 0..15) 24 1 BR7 Port x reset bit y (y = 0..15) 23 1 BR6 Port x reset bit y (y = 0..15) 22 1 BR5 Port x reset bit y (y = 0..15) 21 1 BR4 Port x reset bit y (y = 0..15) 20 1 BR3 Port x reset bit y (y = 0..15) 19 1 BR2 Port x reset bit y (y = 0..15) 18 1 BR1 Port x reset bit y (y = 0..15) 17 1 BR0 Port x set bit y (y= 0..15) 16 1 BS15 Port x set bit y (y= 0..15) 15 1 BS14 Port x set bit y (y= 0..15) 14 1 BS13 Port x set bit y (y= 0..15) 13 1 BS12 Port x set bit y (y= 0..15) 12 1 BS11 Port x set bit y (y= 0..15) 11 1 BS10 Port x set bit y (y= 0..15) 10 1 BS9 Port x set bit y (y= 0..15) 9 1 BS8 Port x set bit y (y= 0..15) 8 1 BS7 Port x set bit y (y= 0..15) 7 1 BS6 Port x set bit y (y= 0..15) 6 1 BS5 Port x set bit y (y= 0..15) 5 1 BS4 Port x set bit y (y= 0..15) 4 1 BS3 Port x set bit y (y= 0..15) 3 1 BS2 Port x set bit y (y= 0..15) 2 1 BS1 Port x set bit y (y= 0..15) 1 1 BS0 Port x set bit y (y= 0..15) 0 1 LCKR LCKR GPIO port configuration lock register 0x1C 0x20 read-write 0x00000000 LCKK Lok Key 16 1 LCK15 Port x lock bit y (y= 0..15) 15 1 LCK14 Port x lock bit y (y= 0..15) 14 1 LCK13 Port x lock bit y (y= 0..15) 13 1 LCK12 Port x lock bit y (y= 0..15) 12 1 LCK11 Port x lock bit y (y= 0..15) 11 1 LCK10 Port x lock bit y (y= 0..15) 10 1 LCK9 Port x lock bit y (y= 0..15) 9 1 LCK8 Port x lock bit y (y= 0..15) 8 1 LCK7 Port x lock bit y (y= 0..15) 7 1 LCK6 Port x lock bit y (y= 0..15) 6 1 LCK5 Port x lock bit y (y= 0..15) 5 1 LCK4 Port x lock bit y (y= 0..15) 4 1 LCK3 Port x lock bit y (y= 0..15) 3 1 LCK2 Port x lock bit y (y= 0..15) 2 1 LCK1 Port x lock bit y (y= 0..15) 1 1 LCK0 Port x lock bit y (y= 0..15) 0 1 AFRL AFRL GPIO alternate function low register 0x20 0x20 read-write 0x00000000 AFRL7 Alternate function selection for port x bit y (y = 0..7) 28 4 AFRL6 Alternate function selection for port x bit y (y = 0..7) 24 4 AFRL5 Alternate function selection for port x bit y (y = 0..7) 20 4 AFRL4 Alternate function selection for port x bit y (y = 0..7) 16 4 AFRL3 Alternate function selection for port x bit y (y = 0..7) 12 4 AFRL2 Alternate function selection for port x bit y (y = 0..7) 8 4 AFRL1 Alternate function selection for port x bit y (y = 0..7) 4 4 AFRL0 Alternate function selection for port x bit y (y = 0..7) 0 4 AFRH AFRH GPIO alternate function high register 0x24 0x20 read-write 0x00000000 AFRH15 Alternate function selection for port x bit y (y = 8..15) 28 4 AFRH14 Alternate function selection for port x bit y (y = 8..15) 24 4 AFRH13 Alternate function selection for port x bit y (y = 8..15) 20 4 AFRH12 Alternate function selection for port x bit y (y = 8..15) 16 4 AFRH11 Alternate function selection for port x bit y (y = 8..15) 12 4 AFRH10 Alternate function selection for port x bit y (y = 8..15) 8 4 AFRH9 Alternate function selection for port x bit y (y = 8..15) 4 4 AFRH8 Alternate function selection for port x bit y (y = 8..15) 0 4 BRR BRR Port bit reset register 0x28 0x20 write-only 0x00000000 BR0 Port x Reset bit y 0 1 BR1 Port x Reset bit y 1 1 BR2 Port x Reset bit y 2 1 BR3 Port x Reset bit y 3 1 BR4 Port x Reset bit y 4 1 BR5 Port x Reset bit y 5 1 BR6 Port x Reset bit y 6 1 BR7 Port x Reset bit y 7 1 BR8 Port x Reset bit y 8 1 BR9 Port x Reset bit y 9 1 BR10 Port x Reset bit y 10 1 BR11 Port x Reset bit y 11 1 BR12 Port x Reset bit y 12 1 BR13 Port x Reset bit y 13 1 BR14 Port x Reset bit y 14 1 BR15 Port x Reset bit y 15 1 GPIOB General-purpose I/Os GPIO 0x48000400 0x0 0x400 registers MODER MODER GPIO port mode register 0x0 0x20 read-write 0x00000000 MODER15 Port x configuration bits (y = 0..15) 30 2 MODER14 Port x configuration bits (y = 0..15) 28 2 MODER13 Port x configuration bits (y = 0..15) 26 2 MODER12 Port x configuration bits (y = 0..15) 24 2 MODER11 Port x configuration bits (y = 0..15) 22 2 MODER10 Port x configuration bits (y = 0..15) 20 2 MODER9 Port x configuration bits (y = 0..15) 18 2 MODER8 Port x configuration bits (y = 0..15) 16 2 MODER7 Port x configuration bits (y = 0..15) 14 2 MODER6 Port x configuration bits (y = 0..15) 12 2 MODER5 Port x configuration bits (y = 0..15) 10 2 MODER4 Port x configuration bits (y = 0..15) 8 2 MODER3 Port x configuration bits (y = 0..15) 6 2 MODER2 Port x configuration bits (y = 0..15) 4 2 MODER1 Port x configuration bits (y = 0..15) 2 2 MODER0 Port x configuration bits (y = 0..15) 0 2 OTYPER OTYPER GPIO port output type register 0x4 0x20 read-write 0x00000000 OT15 Port x configuration bit 15 15 1 OT14 Port x configuration bit 14 14 1 OT13 Port x configuration bit 13 13 1 OT12 Port x configuration bit 12 12 1 OT11 Port x configuration bit 11 11 1 OT10 Port x configuration bit 10 10 1 OT9 Port x configuration bit 9 9 1 OT8 Port x configuration bit 8 8 1 OT7 Port x configuration bit 7 7 1 OT6 Port x configuration bit 6 6 1 OT5 Port x configuration bit 5 5 1 OT4 Port x configuration bit 4 4 1 OT3 Port x configuration bit 3 3 1 OT2 Port x configuration bit 2 2 1 OT1 Port x configuration bit 1 1 1 OT0 Port x configuration bit 0 0 1 OSPEEDR OSPEEDR GPIO port output speed register 0x8 0x20 read-write 0x00000000 OSPEEDR15 Port x configuration bits (y = 0..15) 30 2 OSPEEDR14 Port x configuration bits (y = 0..15) 28 2 OSPEEDR13 Port x configuration bits (y = 0..15) 26 2 OSPEEDR12 Port x configuration bits (y = 0..15) 24 2 OSPEEDR11 Port x configuration bits (y = 0..15) 22 2 OSPEEDR10 Port x configuration bits (y = 0..15) 20 2 OSPEEDR9 Port x configuration bits (y = 0..15) 18 2 OSPEEDR8 Port x configuration bits (y = 0..15) 16 2 OSPEEDR7 Port x configuration bits (y = 0..15) 14 2 OSPEEDR6 Port x configuration bits (y = 0..15) 12 2 OSPEEDR5 Port x configuration bits (y = 0..15) 10 2 OSPEEDR4 Port x configuration bits (y = 0..15) 8 2 OSPEEDR3 Port x configuration bits (y = 0..15) 6 2 OSPEEDR2 Port x configuration bits (y = 0..15) 4 2 OSPEEDR1 Port x configuration bits (y = 0..15) 2 2 OSPEEDR0 Port x configuration bits (y = 0..15) 0 2 PUPDR PUPDR GPIO port pull-up/pull-down register 0xC 0x20 read-write 0x00000000 PUPDR15 Port x configuration bits (y = 0..15) 30 2 PUPDR14 Port x configuration bits (y = 0..15) 28 2 PUPDR13 Port x configuration bits (y = 0..15) 26 2 PUPDR12 Port x configuration bits (y = 0..15) 24 2 PUPDR11 Port x configuration bits (y = 0..15) 22 2 PUPDR10 Port x configuration bits (y = 0..15) 20 2 PUPDR9 Port x configuration bits (y = 0..15) 18 2 PUPDR8 Port x configuration bits (y = 0..15) 16 2 PUPDR7 Port x configuration bits (y = 0..15) 14 2 PUPDR6 Port x configuration bits (y = 0..15) 12 2 PUPDR5 Port x configuration bits (y = 0..15) 10 2 PUPDR4 Port x configuration bits (y = 0..15) 8 2 PUPDR3 Port x configuration bits (y = 0..15) 6 2 PUPDR2 Port x configuration bits (y = 0..15) 4 2 PUPDR1 Port x configuration bits (y = 0..15) 2 2 PUPDR0 Port x configuration bits (y = 0..15) 0 2 IDR IDR GPIO port input data register 0x10 0x20 read-only 0x00000000 IDR15 Port input data (y = 0..15) 15 1 IDR14 Port input data (y = 0..15) 14 1 IDR13 Port input data (y = 0..15) 13 1 IDR12 Port input data (y = 0..15) 12 1 IDR11 Port input data (y = 0..15) 11 1 IDR10 Port input data (y = 0..15) 10 1 IDR9 Port input data (y = 0..15) 9 1 IDR8 Port input data (y = 0..15) 8 1 IDR7 Port input data (y = 0..15) 7 1 IDR6 Port input data (y = 0..15) 6 1 IDR5 Port input data (y = 0..15) 5 1 IDR4 Port input data (y = 0..15) 4 1 IDR3 Port input data (y = 0..15) 3 1 IDR2 Port input data (y = 0..15) 2 1 IDR1 Port input data (y = 0..15) 1 1 IDR0 Port input data (y = 0..15) 0 1 ODR ODR GPIO port output data register 0x14 0x20 read-write 0x00000000 ODR15 Port output data (y = 0..15) 15 1 ODR14 Port output data (y = 0..15) 14 1 ODR13 Port output data (y = 0..15) 13 1 ODR12 Port output data (y = 0..15) 12 1 ODR11 Port output data (y = 0..15) 11 1 ODR10 Port output data (y = 0..15) 10 1 ODR9 Port output data (y = 0..15) 9 1 ODR8 Port output data (y = 0..15) 8 1 ODR7 Port output data (y = 0..15) 7 1 ODR6 Port output data (y = 0..15) 6 1 ODR5 Port output data (y = 0..15) 5 1 ODR4 Port output data (y = 0..15) 4 1 ODR3 Port output data (y = 0..15) 3 1 ODR2 Port output data (y = 0..15) 2 1 ODR1 Port output data (y = 0..15) 1 1 ODR0 Port output data (y = 0..15) 0 1 BSRR BSRR GPIO port bit set/reset register 0x18 0x20 write-only 0x00000000 BR15 Port x reset bit y (y = 0..15) 31 1 BR14 Port x reset bit y (y = 0..15) 30 1 BR13 Port x reset bit y (y = 0..15) 29 1 BR12 Port x reset bit y (y = 0..15) 28 1 BR11 Port x reset bit y (y = 0..15) 27 1 BR10 Port x reset bit y (y = 0..15) 26 1 BR9 Port x reset bit y (y = 0..15) 25 1 BR8 Port x reset bit y (y = 0..15) 24 1 BR7 Port x reset bit y (y = 0..15) 23 1 BR6 Port x reset bit y (y = 0..15) 22 1 BR5 Port x reset bit y (y = 0..15) 21 1 BR4 Port x reset bit y (y = 0..15) 20 1 BR3 Port x reset bit y (y = 0..15) 19 1 BR2 Port x reset bit y (y = 0..15) 18 1 BR1 Port x reset bit y (y = 0..15) 17 1 BR0 Port x set bit y (y= 0..15) 16 1 BS15 Port x set bit y (y= 0..15) 15 1 BS14 Port x set bit y (y= 0..15) 14 1 BS13 Port x set bit y (y= 0..15) 13 1 BS12 Port x set bit y (y= 0..15) 12 1 BS11 Port x set bit y (y= 0..15) 11 1 BS10 Port x set bit y (y= 0..15) 10 1 BS9 Port x set bit y (y= 0..15) 9 1 BS8 Port x set bit y (y= 0..15) 8 1 BS7 Port x set bit y (y= 0..15) 7 1 BS6 Port x set bit y (y= 0..15) 6 1 BS5 Port x set bit y (y= 0..15) 5 1 BS4 Port x set bit y (y= 0..15) 4 1 BS3 Port x set bit y (y= 0..15) 3 1 BS2 Port x set bit y (y= 0..15) 2 1 BS1 Port x set bit y (y= 0..15) 1 1 BS0 Port x set bit y (y= 0..15) 0 1 LCKR LCKR GPIO port configuration lock register 0x1C 0x20 read-write 0x00000000 LCKK Lok Key 16 1 LCK15 Port x lock bit y (y= 0..15) 15 1 LCK14 Port x lock bit y (y= 0..15) 14 1 LCK13 Port x lock bit y (y= 0..15) 13 1 LCK12 Port x lock bit y (y= 0..15) 12 1 LCK11 Port x lock bit y (y= 0..15) 11 1 LCK10 Port x lock bit y (y= 0..15) 10 1 LCK9 Port x lock bit y (y= 0..15) 9 1 LCK8 Port x lock bit y (y= 0..15) 8 1 LCK7 Port x lock bit y (y= 0..15) 7 1 LCK6 Port x lock bit y (y= 0..15) 6 1 LCK5 Port x lock bit y (y= 0..15) 5 1 LCK4 Port x lock bit y (y= 0..15) 4 1 LCK3 Port x lock bit y (y= 0..15) 3 1 LCK2 Port x lock bit y (y= 0..15) 2 1 LCK1 Port x lock bit y (y= 0..15) 1 1 LCK0 Port x lock bit y (y= 0..15) 0 1 AFRL AFRL GPIO alternate function low register 0x20 0x20 read-write 0x00000000 AFRL7 Alternate function selection for port x bit y (y = 0..7) 28 4 AFRL6 Alternate function selection for port x bit y (y = 0..7) 24 4 AFRL5 Alternate function selection for port x bit y (y = 0..7) 20 4 AFRL4 Alternate function selection for port x bit y (y = 0..7) 16 4 AFRL3 Alternate function selection for port x bit y (y = 0..7) 12 4 AFRL2 Alternate function selection for port x bit y (y = 0..7) 8 4 AFRL1 Alternate function selection for port x bit y (y = 0..7) 4 4 AFRL0 Alternate function selection for port x bit y (y = 0..7) 0 4 AFRH AFRH GPIO alternate function high register 0x24 0x20 read-write 0x00000000 AFRH15 Alternate function selection for port x bit y (y = 8..15) 28 4 AFRH14 Alternate function selection for port x bit y (y = 8..15) 24 4 AFRH13 Alternate function selection for port x bit y (y = 8..15) 20 4 AFRH12 Alternate function selection for port x bit y (y = 8..15) 16 4 AFRH11 Alternate function selection for port x bit y (y = 8..15) 12 4 AFRH10 Alternate function selection for port x bit y (y = 8..15) 8 4 AFRH9 Alternate function selection for port x bit y (y = 8..15) 4 4 AFRH8 Alternate function selection for port x bit y (y = 8..15) 0 4 BRR BRR Port bit reset register 0x28 0x20 write-only 0x00000000 BR0 Port x Reset bit y 0 1 BR1 Port x Reset bit y 1 1 BR2 Port x Reset bit y 2 1 BR3 Port x Reset bit y 3 1 BR4 Port x Reset bit y 4 1 BR5 Port x Reset bit y 5 1 BR6 Port x Reset bit y 6 1 BR7 Port x Reset bit y 7 1 BR8 Port x Reset bit y 8 1 BR9 Port x Reset bit y 9 1 BR10 Port x Reset bit y 10 1 BR11 Port x Reset bit y 11 1 BR12 Port x Reset bit y 12 1 BR13 Port x Reset bit y 13 1 BR14 Port x Reset bit y 14 1 BR15 Port x Reset bit y 15 1 GPIOD 0x48000C00 GPIOC General-purpose I/Os GPIO 0x48000800 0x0 0x400 registers MODER MODER GPIO port mode register 0x0 0x20 read-write 0x00000000 MODER15 Port x configuration bits (y = 0..15) 30 2 MODER14 Port x configuration bits (y = 0..15) 28 2 MODER13 Port x configuration bits (y = 0..15) 26 2 MODER12 Port x configuration bits (y = 0..15) 24 2 MODER11 Port x configuration bits (y = 0..15) 22 2 MODER10 Port x configuration bits (y = 0..15) 20 2 MODER9 Port x configuration bits (y = 0..15) 18 2 MODER8 Port x configuration bits (y = 0..15) 16 2 MODER7 Port x configuration bits (y = 0..15) 14 2 MODER6 Port x configuration bits (y = 0..15) 12 2 MODER5 Port x configuration bits (y = 0..15) 10 2 MODER4 Port x configuration bits (y = 0..15) 8 2 MODER3 Port x configuration bits (y = 0..15) 6 2 MODER2 Port x configuration bits (y = 0..15) 4 2 MODER1 Port x configuration bits (y = 0..15) 2 2 MODER0 Port x configuration bits (y = 0..15) 0 2 OTYPER OTYPER GPIO port output type register 0x4 0x20 read-write 0x00000000 OT15 Port x configuration bit 15 15 1 OT14 Port x configuration bit 14 14 1 OT13 Port x configuration bit 13 13 1 OT12 Port x configuration bit 12 12 1 OT11 Port x configuration bit 11 11 1 OT10 Port x configuration bit 10 10 1 OT9 Port x configuration bit 9 9 1 OT8 Port x configuration bit 8 8 1 OT7 Port x configuration bit 7 7 1 OT6 Port x configuration bit 6 6 1 OT5 Port x configuration bit 5 5 1 OT4 Port x configuration bit 4 4 1 OT3 Port x configuration bit 3 3 1 OT2 Port x configuration bit 2 2 1 OT1 Port x configuration bit 1 1 1 OT0 Port x configuration bit 0 0 1 OSPEEDR OSPEEDR GPIO port output speed register 0x8 0x20 read-write 0x00000000 OSPEEDR15 Port x configuration bits (y = 0..15) 30 2 OSPEEDR14 Port x configuration bits (y = 0..15) 28 2 OSPEEDR13 Port x configuration bits (y = 0..15) 26 2 OSPEEDR12 Port x configuration bits (y = 0..15) 24 2 OSPEEDR11 Port x configuration bits (y = 0..15) 22 2 OSPEEDR10 Port x configuration bits (y = 0..15) 20 2 OSPEEDR9 Port x configuration bits (y = 0..15) 18 2 OSPEEDR8 Port x configuration bits (y = 0..15) 16 2 OSPEEDR7 Port x configuration bits (y = 0..15) 14 2 OSPEEDR6 Port x configuration bits (y = 0..15) 12 2 OSPEEDR5 Port x configuration bits (y = 0..15) 10 2 OSPEEDR4 Port x configuration bits (y = 0..15) 8 2 OSPEEDR3 Port x configuration bits (y = 0..15) 6 2 OSPEEDR2 Port x configuration bits (y = 0..15) 4 2 OSPEEDR1 Port x configuration bits (y = 0..15) 2 2 OSPEEDR0 Port x configuration bits (y = 0..15) 0 2 PUPDR PUPDR GPIO port pull-up/pull-down register 0xC 0x20 read-write 0x00000000 PUPDR15 Port x configuration bits (y = 0..15) 30 2 PUPDR14 Port x configuration bits (y = 0..15) 28 2 PUPDR13 Port x configuration bits (y = 0..15) 26 2 PUPDR12 Port x configuration bits (y = 0..15) 24 2 PUPDR11 Port x configuration bits (y = 0..15) 22 2 PUPDR10 Port x configuration bits (y = 0..15) 20 2 PUPDR9 Port x configuration bits (y = 0..15) 18 2 PUPDR8 Port x configuration bits (y = 0..15) 16 2 PUPDR7 Port x configuration bits (y = 0..15) 14 2 PUPDR6 Port x configuration bits (y = 0..15) 12 2 PUPDR5 Port x configuration bits (y = 0..15) 10 2 PUPDR4 Port x configuration bits (y = 0..15) 8 2 PUPDR3 Port x configuration bits (y = 0..15) 6 2 PUPDR2 Port x configuration bits (y = 0..15) 4 2 PUPDR1 Port x configuration bits (y = 0..15) 2 2 PUPDR0 Port x configuration bits (y = 0..15) 0 2 IDR IDR GPIO port input data register 0x10 0x20 read-only 0x00000000 IDR15 Port input data (y = 0..15) 15 1 IDR14 Port input data (y = 0..15) 14 1 IDR13 Port input data (y = 0..15) 13 1 IDR12 Port input data (y = 0..15) 12 1 IDR11 Port input data (y = 0..15) 11 1 IDR10 Port input data (y = 0..15) 10 1 IDR9 Port input data (y = 0..15) 9 1 IDR8 Port input data (y = 0..15) 8 1 IDR7 Port input data (y = 0..15) 7 1 IDR6 Port input data (y = 0..15) 6 1 IDR5 Port input data (y = 0..15) 5 1 IDR4 Port input data (y = 0..15) 4 1 IDR3 Port input data (y = 0..15) 3 1 IDR2 Port input data (y = 0..15) 2 1 IDR1 Port input data (y = 0..15) 1 1 IDR0 Port input data (y = 0..15) 0 1 ODR ODR GPIO port output data register 0x14 0x20 read-write 0x00000000 ODR15 Port output data (y = 0..15) 15 1 ODR14 Port output data (y = 0..15) 14 1 ODR13 Port output data (y = 0..15) 13 1 ODR12 Port output data (y = 0..15) 12 1 ODR11 Port output data (y = 0..15) 11 1 ODR10 Port output data (y = 0..15) 10 1 ODR9 Port output data (y = 0..15) 9 1 ODR8 Port output data (y = 0..15) 8 1 ODR7 Port output data (y = 0..15) 7 1 ODR6 Port output data (y = 0..15) 6 1 ODR5 Port output data (y = 0..15) 5 1 ODR4 Port output data (y = 0..15) 4 1 ODR3 Port output data (y = 0..15) 3 1 ODR2 Port output data (y = 0..15) 2 1 ODR1 Port output data (y = 0..15) 1 1 ODR0 Port output data (y = 0..15) 0 1 BSRR BSRR GPIO port bit set/reset register 0x18 0x20 write-only 0x00000000 BR15 Port x reset bit y (y = 0..15) 31 1 BR14 Port x reset bit y (y = 0..15) 30 1 BR13 Port x reset bit y (y = 0..15) 29 1 BR12 Port x reset bit y (y = 0..15) 28 1 BR11 Port x reset bit y (y = 0..15) 27 1 BR10 Port x reset bit y (y = 0..15) 26 1 BR9 Port x reset bit y (y = 0..15) 25 1 BR8 Port x reset bit y (y = 0..15) 24 1 BR7 Port x reset bit y (y = 0..15) 23 1 BR6 Port x reset bit y (y = 0..15) 22 1 BR5 Port x reset bit y (y = 0..15) 21 1 BR4 Port x reset bit y (y = 0..15) 20 1 BR3 Port x reset bit y (y = 0..15) 19 1 BR2 Port x reset bit y (y = 0..15) 18 1 BR1 Port x reset bit y (y = 0..15) 17 1 BR0 Port x set bit y (y= 0..15) 16 1 BS15 Port x set bit y (y= 0..15) 15 1 BS14 Port x set bit y (y= 0..15) 14 1 BS13 Port x set bit y (y= 0..15) 13 1 BS12 Port x set bit y (y= 0..15) 12 1 BS11 Port x set bit y (y= 0..15) 11 1 BS10 Port x set bit y (y= 0..15) 10 1 BS9 Port x set bit y (y= 0..15) 9 1 BS8 Port x set bit y (y= 0..15) 8 1 BS7 Port x set bit y (y= 0..15) 7 1 BS6 Port x set bit y (y= 0..15) 6 1 BS5 Port x set bit y (y= 0..15) 5 1 BS4 Port x set bit y (y= 0..15) 4 1 BS3 Port x set bit y (y= 0..15) 3 1 BS2 Port x set bit y (y= 0..15) 2 1 BS1 Port x set bit y (y= 0..15) 1 1 BS0 Port x set bit y (y= 0..15) 0 1 AFRL AFRL GPIO alternate function low register 0x20 0x20 read-write 0x00000000 AFRL7 Alternate function selection for port x bit y (y = 0..7) 28 4 AFRL6 Alternate function selection for port x bit y (y = 0..7) 24 4 AFRL5 Alternate function selection for port x bit y (y = 0..7) 20 4 AFRL4 Alternate function selection for port x bit y (y = 0..7) 16 4 AFRL3 Alternate function selection for port x bit y (y = 0..7) 12 4 AFRL2 Alternate function selection for port x bit y (y = 0..7) 8 4 AFRL1 Alternate function selection for port x bit y (y = 0..7) 4 4 AFRL0 Alternate function selection for port x bit y (y = 0..7) 0 4 AFRH AFRH GPIO alternate function high register 0x24 0x20 read-write 0x00000000 AFRH15 Alternate function selection for port x bit y (y = 8..15) 28 4 AFRH14 Alternate function selection for port x bit y (y = 8..15) 24 4 AFRH13 Alternate function selection for port x bit y (y = 8..15) 20 4 AFRH12 Alternate function selection for port x bit y (y = 8..15) 16 4 AFRH11 Alternate function selection for port x bit y (y = 8..15) 12 4 AFRH10 Alternate function selection for port x bit y (y = 8..15) 8 4 AFRH9 Alternate function selection for port x bit y (y = 8..15) 4 4 AFRH8 Alternate function selection for port x bit y (y = 8..15) 0 4 BRR BRR Port bit reset register 0x28 0x20 write-only 0x00000000 BR0 Port x Reset bit y 0 1 BR1 Port x Reset bit y 1 1 BR2 Port x Reset bit y 2 1 BR3 Port x Reset bit y 3 1 BR4 Port x Reset bit y 4 1 BR5 Port x Reset bit y 5 1 BR6 Port x Reset bit y 6 1 BR7 Port x Reset bit y 7 1 BR8 Port x Reset bit y 8 1 BR9 Port x Reset bit y 9 1 BR10 Port x Reset bit y 10 1 BR11 Port x Reset bit y 11 1 BR12 Port x Reset bit y 12 1 BR13 Port x Reset bit y 13 1 BR14 Port x Reset bit y 14 1 BR15 Port x Reset bit y 15 1 GPIOE 0x48001000 GPIOF 0x48001400 TSC Touch sensing controller TSC 0x40024000 0x0 0x400 registers CR CR control register 0x0 0x20 read-write 0x00000000 CTPH Charge transfer pulse high 28 4 CTPL Charge transfer pulse low 24 4 SSD Spread spectrum deviation 17 7 SSE Spread spectrum enable 16 1 SSPSC Spread spectrum prescaler 15 1 PGPSC pulse generator prescaler 12 3 MCV Max count value 5 3 IODEF I/O Default mode 4 1 SYNCPOL Synchronization pin polarity 3 1 AM Acquisition mode 2 1 START Start a new acquisition 1 1 TSCE Touch sensing controller enable 0 1 IER IER interrupt enable register 0x4 0x20 read-write 0x00000000 MCEIE Max count error interrupt enable 1 1 EOAIE End of acquisition interrupt enable 0 1 ICR ICR interrupt clear register 0x8 0x20 read-write 0x00000000 MCEIC Max count error interrupt clear 1 1 EOAIC End of acquisition interrupt clear 0 1 ISR ISR interrupt status register 0xC 0x20 read-write 0x00000000 MCEF Max count error flag 1 1 EOAF End of acquisition flag 0 1 IOHCR IOHCR I/O hysteresis control register 0x10 0x20 read-write 0xFFFFFFFF G1_IO1 G1_IO1 Schmitt trigger hysteresis mode 0 1 G1_IO2 G1_IO2 Schmitt trigger hysteresis mode 1 1 G1_IO3 G1_IO3 Schmitt trigger hysteresis mode 2 1 G1_IO4 G1_IO4 Schmitt trigger hysteresis mode 3 1 G2_IO1 G2_IO1 Schmitt trigger hysteresis mode 4 1 G2_IO2 G2_IO2 Schmitt trigger hysteresis mode 5 1 G2_IO3 G2_IO3 Schmitt trigger hysteresis mode 6 1 G2_IO4 G2_IO4 Schmitt trigger hysteresis mode 7 1 G3_IO1 G3_IO1 Schmitt trigger hysteresis mode 8 1 G3_IO2 G3_IO2 Schmitt trigger hysteresis mode 9 1 G3_IO3 G3_IO3 Schmitt trigger hysteresis mode 10 1 G3_IO4 G3_IO4 Schmitt trigger hysteresis mode 11 1 G4_IO1 G4_IO1 Schmitt trigger hysteresis mode 12 1 G4_IO2 G4_IO2 Schmitt trigger hysteresis mode 13 1 G4_IO3 G4_IO3 Schmitt trigger hysteresis mode 14 1 G4_IO4 G4_IO4 Schmitt trigger hysteresis mode 15 1 G5_IO1 G5_IO1 Schmitt trigger hysteresis mode 16 1 G5_IO2 G5_IO2 Schmitt trigger hysteresis mode 17 1 G5_IO3 G5_IO3 Schmitt trigger hysteresis mode 18 1 G5_IO4 G5_IO4 Schmitt trigger hysteresis mode 19 1 G6_IO1 G6_IO1 Schmitt trigger hysteresis mode 20 1 G6_IO2 G6_IO2 Schmitt trigger hysteresis mode 21 1 G6_IO3 G6_IO3 Schmitt trigger hysteresis mode 22 1 G6_IO4 G6_IO4 Schmitt trigger hysteresis mode 23 1 G7_IO1 G7_IO1 Schmitt trigger hysteresis mode 24 1 G7_IO2 G7_IO2 Schmitt trigger hysteresis mode 25 1 G7_IO3 G7_IO3 Schmitt trigger hysteresis mode 26 1 G7_IO4 G7_IO4 Schmitt trigger hysteresis mode 27 1 G8_IO1 G8_IO1 Schmitt trigger hysteresis mode 28 1 G8_IO2 G8_IO2 Schmitt trigger hysteresis mode 29 1 G8_IO3 G8_IO3 Schmitt trigger hysteresis mode 30 1 G8_IO4 G8_IO4 Schmitt trigger hysteresis mode 31 1 IOASCR IOASCR I/O analog switch control register 0x18 0x20 read-write 0x00000000 G1_IO1 G1_IO1 analog switch enable 0 1 G1_IO2 G1_IO2 analog switch enable 1 1 G1_IO3 G1_IO3 analog switch enable 2 1 G1_IO4 G1_IO4 analog switch enable 3 1 G2_IO1 G2_IO1 analog switch enable 4 1 G2_IO2 G2_IO2 analog switch enable 5 1 G2_IO3 G2_IO3 analog switch enable 6 1 G2_IO4 G2_IO4 analog switch enable 7 1 G3_IO1 G3_IO1 analog switch enable 8 1 G3_IO2 G3_IO2 analog switch enable 9 1 G3_IO3 G3_IO3 analog switch enable 10 1 G3_IO4 G3_IO4 analog switch enable 11 1 G4_IO1 G4_IO1 analog switch enable 12 1 G4_IO2 G4_IO2 analog switch enable 13 1 G4_IO3 G4_IO3 analog switch enable 14 1 G4_IO4 G4_IO4 analog switch enable 15 1 G5_IO1 G5_IO1 analog switch enable 16 1 G5_IO2 G5_IO2 analog switch enable 17 1 G5_IO3 G5_IO3 analog switch enable 18 1 G5_IO4 G5_IO4 analog switch enable 19 1 G6_IO1 G6_IO1 analog switch enable 20 1 G6_IO2 G6_IO2 analog switch enable 21 1 G6_IO3 G6_IO3 analog switch enable 22 1 G6_IO4 G6_IO4 analog switch enable 23 1 G7_IO1 G7_IO1 analog switch enable 24 1 G7_IO2 G7_IO2 analog switch enable 25 1 G7_IO3 G7_IO3 analog switch enable 26 1 G7_IO4 G7_IO4 analog switch enable 27 1 G8_IO1 G8_IO1 analog switch enable 28 1 G8_IO2 G8_IO2 analog switch enable 29 1 G8_IO3 G8_IO3 analog switch enable 30 1 G8_IO4 G8_IO4 analog switch enable 31 1 IOSCR IOSCR I/O sampling control register 0x20 0x20 read-write 0x00000000 G1_IO1 G1_IO1 sampling mode 0 1 G1_IO2 G1_IO2 sampling mode 1 1 G1_IO3 G1_IO3 sampling mode 2 1 G1_IO4 G1_IO4 sampling mode 3 1 G2_IO1 G2_IO1 sampling mode 4 1 G2_IO2 G2_IO2 sampling mode 5 1 G2_IO3 G2_IO3 sampling mode 6 1 G2_IO4 G2_IO4 sampling mode 7 1 G3_IO1 G3_IO1 sampling mode 8 1 G3_IO2 G3_IO2 sampling mode 9 1 G3_IO3 G3_IO3 sampling mode 10 1 G3_IO4 G3_IO4 sampling mode 11 1 G4_IO1 G4_IO1 sampling mode 12 1 G4_IO2 G4_IO2 sampling mode 13 1 G4_IO3 G4_IO3 sampling mode 14 1 G4_IO4 G4_IO4 sampling mode 15 1 G5_IO1 G5_IO1 sampling mode 16 1 G5_IO2 G5_IO2 sampling mode 17 1 G5_IO3 G5_IO3 sampling mode 18 1 G5_IO4 G5_IO4 sampling mode 19 1 G6_IO1 G6_IO1 sampling mode 20 1 G6_IO2 G6_IO2 sampling mode 21 1 G6_IO3 G6_IO3 sampling mode 22 1 G6_IO4 G6_IO4 sampling mode 23 1 G7_IO1 G7_IO1 sampling mode 24 1 G7_IO2 G7_IO2 sampling mode 25 1 G7_IO3 G7_IO3 sampling mode 26 1 G7_IO4 G7_IO4 sampling mode 27 1 G8_IO1 G8_IO1 sampling mode 28 1 G8_IO2 G8_IO2 sampling mode 29 1 G8_IO3 G8_IO3 sampling mode 30 1 G8_IO4 G8_IO4 sampling mode 31 1 IOCCR IOCCR I/O channel control register 0x28 0x20 read-write 0x00000000 G1_IO1 G1_IO1 channel mode 0 1 G1_IO2 G1_IO2 channel mode 1 1 G1_IO3 G1_IO3 channel mode 2 1 G1_IO4 G1_IO4 channel mode 3 1 G2_IO1 G2_IO1 channel mode 4 1 G2_IO2 G2_IO2 channel mode 5 1 G2_IO3 G2_IO3 channel mode 6 1 G2_IO4 G2_IO4 channel mode 7 1 G3_IO1 G3_IO1 channel mode 8 1 G3_IO2 G3_IO2 channel mode 9 1 G3_IO3 G3_IO3 channel mode 10 1 G3_IO4 G3_IO4 channel mode 11 1 G4_IO1 G4_IO1 channel mode 12 1 G4_IO2 G4_IO2 channel mode 13 1 G4_IO3 G4_IO3 channel mode 14 1 G4_IO4 G4_IO4 channel mode 15 1 G5_IO1 G5_IO1 channel mode 16 1 G5_IO2 G5_IO2 channel mode 17 1 G5_IO3 G5_IO3 channel mode 18 1 G5_IO4 G5_IO4 channel mode 19 1 G6_IO1 G6_IO1 channel mode 20 1 G6_IO2 G6_IO2 channel mode 21 1 G6_IO3 G6_IO3 channel mode 22 1 G6_IO4 G6_IO4 channel mode 23 1 G7_IO1 G7_IO1 channel mode 24 1 G7_IO2 G7_IO2 channel mode 25 1 G7_IO3 G7_IO3 channel mode 26 1 G7_IO4 G7_IO4 channel mode 27 1 G8_IO1 G8_IO1 channel mode 28 1 G8_IO2 G8_IO2 channel mode 29 1 G8_IO3 G8_IO3 channel mode 30 1 G8_IO4 G8_IO4 channel mode 31 1 IOGCSR IOGCSR I/O group control status register 0x30 0x20 0x00000000 G8S Analog I/O group x status 23 1 read-write G7S Analog I/O group x status 22 1 read-write G6S Analog I/O group x status 21 1 read-only G5S Analog I/O group x status 20 1 read-only G4S Analog I/O group x status 19 1 read-only G3S Analog I/O group x status 18 1 read-only G2S Analog I/O group x status 17 1 read-only G1S Analog I/O group x status 16 1 read-only G8E Analog I/O group x enable 7 1 read-write G7E Analog I/O group x enable 6 1 read-write G6E Analog I/O group x enable 5 1 read-write G5E Analog I/O group x enable 4 1 read-write G4E Analog I/O group x enable 3 1 read-write G3E Analog I/O group x enable 2 1 read-write G2E Analog I/O group x enable 1 1 read-write G1E Analog I/O group x enable 0 1 read-write IOG1CR IOG1CR I/O group x counter register 0x34 0x20 read-only 0x00000000 CNT Counter value 0 14 IOG2CR IOG2CR I/O group x counter register 0x38 0x20 read-only 0x00000000 CNT Counter value 0 14 IOG3CR IOG3CR I/O group x counter register 0x3C 0x20 read-only 0x00000000 CNT Counter value 0 14 IOG4CR IOG4CR I/O group x counter register 0x40 0x20 read-only 0x00000000 CNT Counter value 0 14 IOG5CR IOG5CR I/O group x counter register 0x44 0x20 read-only 0x00000000 CNT Counter value 0 14 IOG6CR IOG6CR I/O group x counter register 0x48 0x20 read-only 0x00000000 CNT Counter value 0 14 IOG7CR IOG7CR I/O group x counter register 0x4C 0x20 read-only 0x00000000 CNT Counter value 0 14 IOG8CR IOG8CR I/O group x counter register 0x50 0x20 read-only 0x00000000 CNT Counter value 0 14 CRC cyclic redundancy check calculation unit CRC 0x40023000 0x0 0x400 registers DR DR Data register 0x0 0x20 read-write 0xFFFFFFFF DR Data register bits 0 32 IDR IDR Independent data register 0x4 0x20 read-write 0x00000000 IDR General-purpose 8-bit data register bits 0 8 CR CR Control register 0x8 0x20 read-write 0x00000000 RESET reset bit 0 1 REV_IN Reverse input data 5 2 REV_OUT Reverse output data 7 1 POLYSIZE Polynomial size 3 2 INIT INIT Initial CRC value 0x10 0x20 read-write 0xFFFFFFFF INIT Programmable initial CRC value 0 32 POL POL CRC polynomial 0x14 0x20 read-write 0x04C11DB7 POL Programmable polynomial 0 32 Flash Flash Flash 0x40022000 0x0 0x400 registers FLASH Flash global interrupt 4 ACR ACR Flash access control register 0x0 0x20 0x00000030 LATENCY LATENCY 0 3 read-write PRFTBE PRFTBE 4 1 read-write PRFTBS PRFTBS 5 1 read-only KEYR KEYR Flash key register 0x4 0x20 write-only 0x00000000 FKEYR Flash Key 0 32 OPTKEYR OPTKEYR Flash option key register 0x8 0x20 write-only 0x00000000 OPTKEYR Option byte key 0 32 SR SR Flash status register 0xC 0x20 0x00000000 EOP End of operation 5 1 read-write WRPRT Write protection error 4 1 read-write PGERR Programming error 2 1 read-write BSY Busy 0 1 read-only CR CR Flash control register 0x10 0x20 read-write 0x00000080 FORCE_OPTLOAD Force option byte loading 13 1 EOPIE End of operation interrupt enable 12 1 ERRIE Error interrupt enable 10 1 OPTWRE Option bytes write enable 9 1 LOCK Lock 7 1 STRT Start 6 1 OPTER Option byte erase 5 1 OPTPG Option byte programming 4 1 MER Mass erase 2 1 PER Page erase 1 1 PG Programming 0 1 AR AR Flash address register 0x14 0x20 write-only 0x00000000 FAR Flash address 0 32 OBR OBR Option byte register 0x1C 0x20 read-only 0xFFFFFF02 OPTERR Option byte error 0 1 LEVEL1_PROT Level 1 protection status 1 1 LEVEL2_PROT Level 2 protection status 2 1 WDG_SW WDG_SW 8 1 nRST_STOP nRST_STOP 9 1 nRST_STDBY nRST_STDBY 10 1 BOOT1 BOOT1 12 1 VDDA_MONITOR VDDA_MONITOR 13 1 SRAM_PARITY_CHECK SRAM_PARITY_CHECK 14 1 SDADC12_VDD_MONITOR SDADC12_VDD_MONITOR 15 1 Data0 Data0 16 8 Data1 Data1 24 8 WRPR WRPR Write protection register 0x20 0x20 read-only 0xFFFFFFFF WRP Write protect 0 32 RCC Reset and clock control RCC 0x40021000 0x0 0x400 registers RCC RCC global interrupt 5 CR CR Clock control register 0x0 0x20 0x00000083 HSION Internal High Speed clock enable 0 1 read-write HSIRDY Internal High Speed clock ready flag 1 1 read-only HSITRIM Internal High Speed clock trimming 3 5 read-write HSICAL Internal High Speed clock Calibration 8 8 read-only HSEON External High Speed clock enable 16 1 read-write HSERDY External High Speed clock ready flag 17 1 read-only HSEBYP External High Speed clock Bypass 18 1 read-write CSSON Clock Security System enable 19 1 read-write PLLON PLL enable 24 1 read-write PLLRDY PLL clock ready flag 25 1 read-only CFGR CFGR Clock configuration register (RCC_CFGR) 0x4 0x20 0x00000000 SW System clock Switch 0 2 read-write SWS System Clock Switch Status 2 2 read-only HPRE AHB prescaler 4 4 read-write PPRE1 APB Low speed prescaler (APB1) 8 3 read-write PPRE2 APB high speed prescaler (APB2) 11 3 read-write ADCPRE ADC prescaler 14 2 read-write PLLSRC PLL entry clock source 16 1 read-write PLLXTPRE HSE divider for PLL entry 17 1 read-write PLLMUL PLL Multiplication Factor 18 4 read-write USBPRE USB prescaler 22 1 read-write MCO Microcontroller clock output 24 3 read-write SDPRE SDADC prescaler 27 5 read-write CIR CIR Clock interrupt register (RCC_CIR) 0x8 0x20 0x00000000 LSIRDYF LSI Ready Interrupt flag 0 1 read-only LSERDYF LSE Ready Interrupt flag 1 1 read-only HSIRDYF HSI Ready Interrupt flag 2 1 read-only HSERDYF HSE Ready Interrupt flag 3 1 read-only PLLRDYF PLL Ready Interrupt flag 4 1 read-only CSSF Clock Security System Interrupt flag 7 1 read-only LSIRDYIE LSI Ready Interrupt Enable 8 1 read-write LSERDYIE LSE Ready Interrupt Enable 9 1 read-write HSIRDYIE HSI Ready Interrupt Enable 10 1 read-write HSERDYIE HSE Ready Interrupt Enable 11 1 read-write PLLRDYIE PLL Ready Interrupt Enable 12 1 read-write LSIRDYC LSI Ready Interrupt Clear 16 1 write-only LSERDYC LSE Ready Interrupt Clear 17 1 write-only HSIRDYC HSI Ready Interrupt Clear 18 1 write-only HSERDYC HSE Ready Interrupt Clear 19 1 write-only PLLRDYC PLL Ready Interrupt Clear 20 1 write-only CSSC Clock security system interrupt clear 23 1 write-only APB2RSTR APB2RSTR APB2 peripheral reset register (RCC_APB2RSTR) 0xC 0x20 read-write 0x00000000 SYSCFGRST SYSCFG and COMP reset 0 1 ADCRST ADC interface reset 9 1 SPI1RST SPI 1 reset 12 1 USART1RST USART1 reset 14 1 TIM15RST TIM15 timer reset 16 1 TIM16RST TIM16 timer reset 17 1 TIM17RST TIM17 timer reset 18 1 TIM19RST TIM19 timer reset 19 1 SDAD1RST SDADC1 (Sigma delta ADC 1) reset 24 1 SDAD2RST SDADC2 (Sigma delta ADC 2) reset 25 1 SDAD3RST SDADC3 (Sigma delta ADC 3) reset 26 1 APB1RSTR APB1RSTR APB1 peripheral reset register (RCC_APB1RSTR) 0x10 0x20 read-write 0x00000000 TIM2RST Timer 2 reset 0 1 TIM3RST Timer 3 reset 1 1 TIM4RST Timer 14 reset 2 1 TIM5RST Timer 5 reset 3 1 TIM6RST Timer 6 reset 4 1 TIM7RST Timer 7 reset 5 1 TIM12RST Timer 12 reset 6 1 TIM13RST Timer 13 reset 7 1 TIM14RST Timer 14 reset 8 1 TIM18RST Timer 18 reset 9 1 WWDGRST Window watchdog reset 11 1 SPI2RST SPI2 reset 14 1 SPI3RST SPI3 reset 15 1 USART2RST USART 2 reset 17 1 USART3RST USART3 reset 18 1 I2C1RST I2C1 reset 21 1 I2C2RST I2C2 reset 22 1 USBRST USB reset 23 1 CANRST CAN reset 25 1 DAC3RST DAC3 reset 26 1 PWRRST Power interface reset 28 1 DACRST DAC interface reset 29 1 CECRST HDMI CEC reset 30 1 AHBENR AHBENR AHB Peripheral Clock enable register (RCC_AHBENR) 0x14 0x20 read-write 0x00000014 DMAEN DMA1 clock enable 0 1 DMA2EN DMA2 clock enable 1 1 SRAMEN SRAM interface clock enable 2 1 FLITFEN FLITF clock enable 4 1 CRCEN CRC clock enable 6 1 IOPAEN I/O port A clock enable 17 1 IOPBEN I/O port B clock enable 18 1 IOPCEN I/O port C clock enable 19 1 IOPDEN I/O port D clock enable 20 1 IOPEEN I/O port E clock enable 21 1 IOPFEN I/O port F clock enable 22 1 TSCEN Touch sensing controller clock enable 24 1 APB2ENR APB2ENR APB2 peripheral clock enable register (RCC_APB2ENR) 0x18 0x20 read-write 0x00000000 SYSCFGEN SYSCFG clock enable 0 1 ADCEN ADC 1 interface clock enable 9 1 TIM1EN TIM1 Timer clock enable 11 1 SPI1EN SPI 1 clock enable 12 1 USART1EN USART1 clock enable 14 1 TIM15EN TIM15 timer clock enable 16 1 TIM16EN TIM16 timer clock enable 17 1 TIM17EN TIM17 timer clock enable 18 1 TIM19EN TIM19 timer clock enable 19 1 DBGMCUEN MCU debug module clock enable 22 1 SDAD1EN SDADC1 (Sigma Delta ADC 1) clock enable 24 1 SDAD2EN SDADC2 (Sigma Delta ADC 2) clock enable 25 1 SDAD3EN SDADC3 (Sigma Delta ADC 3) clock enable 26 1 APB1ENR APB1ENR APB1 peripheral clock enable register (RCC_APB1ENR) 0x1C 0x20 read-write 0x00000000 TIM2EN Timer 2 clock enable 0 1 TIM3EN Timer 3 clock enable 1 1 TIM4EN Timer 4 clock enable 2 1 TIM5EN Timer 5 clock enable 3 1 TIM6EN Timer 6 clock enable 4 1 TIM7EN Timer 7 clock enable 5 1 TIM12EN Timer 12 clock enable 6 1 TIM13EN Timer 13 clock enable 7 1 TIM14EN Timer 14 clock enable 8 1 TIM18EN Timer 18 clock enable 9 1 WWDGEN Window watchdog clock enable 11 1 SPI2EN SPI 2 clock enable 14 1 SPI3EN SPI 3 clock enable 15 1 USART2EN USART 2 clock enable 17 1 USART3EN USART 3 clock enable 18 1 I2C1EN I2C 1 clock enable 21 1 I2C2EN I2C 2 clock enable 22 1 USBEN USB clock enable 23 1 CANEN CAN clock enable 25 1 DAC3EN DAC3 interface clock enable 26 1 PWREN Power interface clock enable 28 1 DACEN DAC interface clock enable 29 1 CECEN HDMI CEC interface clock enable 30 1 BDCR BDCR Backup domain control register (RCC_BDCR) 0x20 0x20 0x00000000 LSEON External Low Speed oscillator enable 0 1 read-write LSERDY External Low Speed oscillator ready 1 1 read-only LSEBYP External Low Speed oscillator bypass 2 1 read-write LSEDRV LSE oscillator drive capability 3 2 read-write RTCSEL RTC clock source selection 8 2 read-write RTCEN RTC clock enable 15 1 read-write BDRST Backup domain software reset 16 1 read-write CSR CSR Control/status register (RCC_CSR) 0x24 0x20 0x0C000000 LSION Internal low speed oscillator enable 0 1 read-write LSIRDY Internal low speed oscillator ready 1 1 read-only RMVF Remove reset flag 24 1 read-write OBLRSTF Option byte loader reset flag 25 1 read-write PINRSTF PIN reset flag 26 1 read-write PORRSTF POR/PDR reset flag 27 1 read-write SFTRSTF Software reset flag 28 1 read-write IWDGRSTF Independent watchdog reset flag 29 1 read-write WWDGRSTF Window watchdog reset flag 30 1 read-write LPWRRSTF Low-power reset flag 31 1 read-write AHBRSTR AHBRSTR AHB peripheral reset register 0x28 0x20 read-write 0x00000000 IOPARST I/O port A reset 17 1 IOPBRST I/O port B reset 18 1 IOPCRST I/O port C reset 19 1 IOPDRST I/O port D reset 20 1 IOPERST I/O port E reset 21 1 IOPFRST I/O port F reset 22 1 TSCRST Touch sensing controller reset 24 1 CFGR2 CFGR2 Clock configuration register 2 0x2C 0x20 read-write 0x00000000 PREDIV PREDIV division factor 0 4 CFGR3 CFGR3 Clock configuration register 3 0x30 0x20 read-write 0x00000000 USART1SW USART1 clock source selection 0 2 I2C1SW I2C1 clock source selection 4 1 I2C2SW I2C2 clock source selection 5 1 CECSW HDMI CEC clock source selection 6 1 USART2SW USART2 clock source selection 16 2 USART3SW USART3 clock source selection 18 2 DMA1 DMA controller 1 DMA 0x40020000 0x0 0x400 registers DMA1_CH1 DMA1 channel 1 interrupt 11 DMA1_CH2 DMA1 channel 2 interrupt 12 DMA1_CH3 DMA1 channel 3 interrupt 13 DMA1_CH4 DMA1 channel 4 interrupt 14 DMA1_CH5 DMA1 channel 5 interrupt 15 DMA1_CH6 DMA1 channel 6 interrupt 16 DMA1_CH7 DMA1 channel 7 interrupt 17 ISR ISR DMA interrupt status register (DMA_ISR) 0x0 0x20 read-only 0x00000000 GIF1 Channel 1 Global interrupt flag 0 1 TCIF1 Channel 1 Transfer Complete flag 1 1 HTIF1 Channel 1 Half Transfer Complete flag 2 1 TEIF1 Channel 1 Transfer Error flag 3 1 GIF2 Channel 2 Global interrupt flag 4 1 TCIF2 Channel 2 Transfer Complete flag 5 1 HTIF2 Channel 2 Half Transfer Complete flag 6 1 TEIF2 Channel 2 Transfer Error flag 7 1 GIF3 Channel 3 Global interrupt flag 8 1 TCIF3 Channel 3 Transfer Complete flag 9 1 HTIF3 Channel 3 Half Transfer Complete flag 10 1 TEIF3 Channel 3 Transfer Error flag 11 1 GIF4 Channel 4 Global interrupt flag 12 1 TCIF4 Channel 4 Transfer Complete flag 13 1 HTIF4 Channel 4 Half Transfer Complete flag 14 1 TEIF4 Channel 4 Transfer Error flag 15 1 GIF5 Channel 5 Global interrupt flag 16 1 TCIF5 Channel 5 Transfer Complete flag 17 1 HTIF5 Channel 5 Half Transfer Complete flag 18 1 TEIF5 Channel 5 Transfer Error flag 19 1 GIF6 Channel 6 Global interrupt flag 20 1 TCIF6 Channel 6 Transfer Complete flag 21 1 HTIF6 Channel 6 Half Transfer Complete flag 22 1 TEIF6 Channel 6 Transfer Error flag 23 1 GIF7 Channel 7 Global interrupt flag 24 1 TCIF7 Channel 7 Transfer Complete flag 25 1 HTIF7 Channel 7 Half Transfer Complete flag 26 1 TEIF7 Channel 7 Transfer Error flag 27 1 IFCR IFCR DMA interrupt flag clear register (DMA_IFCR) 0x4 0x20 write-only 0x00000000 CGIF1 Channel 1 Global interrupt clear 0 1 CTCIF1 Channel 1 Transfer Complete clear 1 1 CHTIF1 Channel 1 Half Transfer clear 2 1 CTEIF1 Channel 1 Transfer Error clear 3 1 CGIF2 Channel 2 Global interrupt clear 4 1 CTCIF2 Channel 2 Transfer Complete clear 5 1 CHTIF2 Channel 2 Half Transfer clear 6 1 CTEIF2 Channel 2 Transfer Error clear 7 1 CGIF3 Channel 3 Global interrupt clear 8 1 CTCIF3 Channel 3 Transfer Complete clear 9 1 CHTIF3 Channel 3 Half Transfer clear 10 1 CTEIF3 Channel 3 Transfer Error clear 11 1 CGIF4 Channel 4 Global interrupt clear 12 1 CTCIF4 Channel 4 Transfer Complete clear 13 1 CHTIF4 Channel 4 Half Transfer clear 14 1 CTEIF4 Channel 4 Transfer Error clear 15 1 CGIF5 Channel 5 Global interrupt clear 16 1 CTCIF5 Channel 5 Transfer Complete clear 17 1 CHTIF5 Channel 5 Half Transfer clear 18 1 CTEIF5 Channel 5 Transfer Error clear 19 1 CGIF6 Channel 6 Global interrupt clear 20 1 CTCIF6 Channel 6 Transfer Complete clear 21 1 CHTIF6 Channel 6 Half Transfer clear 22 1 CTEIF6 Channel 6 Transfer Error clear 23 1 CGIF7 Channel 7 Global interrupt clear 24 1 CTCIF7 Channel 7 Transfer Complete clear 25 1 CHTIF7 Channel 7 Half Transfer clear 26 1 CTEIF7 Channel 7 Transfer Error clear 27 1 CCR1 CCR1 DMA channel configuration register (DMA_CCR) 0x8 0x20 read-write 0x00000000 EN Channel enable 0 1 TCIE Transfer complete interrupt enable 1 1 HTIE Half Transfer interrupt enable 2 1 TEIE Transfer error interrupt enable 3 1 DIR Data transfer direction 4 1 CIRC Circular mode 5 1 PINC Peripheral increment mode 6 1 MINC Memory increment mode 7 1 PSIZE Peripheral size 8 2 MSIZE Memory size 10 2 PL Channel Priority level 12 2 MEM2MEM Memory to memory mode 14 1 CNDTR1 CNDTR1 DMA channel 1 number of data register 0xC 0x20 read-write 0x00000000 NDT Number of data to transfer 0 16 CPAR1 CPAR1 DMA channel 1 peripheral address register 0x10 0x20 read-write 0x00000000 PA Peripheral address 0 32 CMAR1 CMAR1 DMA channel 1 memory address register 0x14 0x20 read-write 0x00000000 MA Memory address 0 32 CCR2 CCR2 DMA channel configuration register (DMA_CCR) 0x1C 0x20 read-write 0x00000000 EN Channel enable 0 1 TCIE Transfer complete interrupt enable 1 1 HTIE Half Transfer interrupt enable 2 1 TEIE Transfer error interrupt enable 3 1 DIR Data transfer direction 4 1 CIRC Circular mode 5 1 PINC Peripheral increment mode 6 1 MINC Memory increment mode 7 1 PSIZE Peripheral size 8 2 MSIZE Memory size 10 2 PL Channel Priority level 12 2 MEM2MEM Memory to memory mode 14 1 CNDTR2 CNDTR2 DMA channel 2 number of data register 0x20 0x20 read-write 0x00000000 NDT Number of data to transfer 0 16 CPAR2 CPAR2 DMA channel 2 peripheral address register 0x24 0x20 read-write 0x00000000 PA Peripheral address 0 32 CMAR2 CMAR2 DMA channel 2 memory address register 0x28 0x20 read-write 0x00000000 MA Memory address 0 32 CCR3 CCR3 DMA channel configuration register (DMA_CCR) 0x30 0x20 read-write 0x00000000 EN Channel enable 0 1 TCIE Transfer complete interrupt enable 1 1 HTIE Half Transfer interrupt enable 2 1 TEIE Transfer error interrupt enable 3 1 DIR Data transfer direction 4 1 CIRC Circular mode 5 1 PINC Peripheral increment mode 6 1 MINC Memory increment mode 7 1 PSIZE Peripheral size 8 2 MSIZE Memory size 10 2 PL Channel Priority level 12 2 MEM2MEM Memory to memory mode 14 1 CNDTR3 CNDTR3 DMA channel 3 number of data register 0x34 0x20 read-write 0x00000000 NDT Number of data to transfer 0 16 CPAR3 CPAR3 DMA channel 3 peripheral address register 0x38 0x20 read-write 0x00000000 PA Peripheral address 0 32 CMAR3 CMAR3 DMA channel 3 memory address register 0x3C 0x20 read-write 0x00000000 MA Memory address 0 32 CCR4 CCR4 DMA channel configuration register (DMA_CCR) 0x44 0x20 read-write 0x00000000 EN Channel enable 0 1 TCIE Transfer complete interrupt enable 1 1 HTIE Half Transfer interrupt enable 2 1 TEIE Transfer error interrupt enable 3 1 DIR Data transfer direction 4 1 CIRC Circular mode 5 1 PINC Peripheral increment mode 6 1 MINC Memory increment mode 7 1 PSIZE Peripheral size 8 2 MSIZE Memory size 10 2 PL Channel Priority level 12 2 MEM2MEM Memory to memory mode 14 1 CNDTR4 CNDTR4 DMA channel 4 number of data register 0x48 0x20 read-write 0x00000000 NDT Number of data to transfer 0 16 CPAR4 CPAR4 DMA channel 4 peripheral address register 0x4C 0x20 read-write 0x00000000 PA Peripheral address 0 32 CMAR4 CMAR4 DMA channel 4 memory address register 0x50 0x20 read-write 0x00000000 MA Memory address 0 32 CCR5 CCR5 DMA channel configuration register (DMA_CCR) 0x58 0x20 read-write 0x00000000 EN Channel enable 0 1 TCIE Transfer complete interrupt enable 1 1 HTIE Half Transfer interrupt enable 2 1 TEIE Transfer error interrupt enable 3 1 DIR Data transfer direction 4 1 CIRC Circular mode 5 1 PINC Peripheral increment mode 6 1 MINC Memory increment mode 7 1 PSIZE Peripheral size 8 2 MSIZE Memory size 10 2 PL Channel Priority level 12 2 MEM2MEM Memory to memory mode 14 1 CNDTR5 CNDTR5 DMA channel 5 number of data register 0x5C 0x20 read-write 0x00000000 NDT Number of data to transfer 0 16 CPAR5 CPAR5 DMA channel 5 peripheral address register 0x60 0x20 read-write 0x00000000 PA Peripheral address 0 32 CMAR5 CMAR5 DMA channel 5 memory address register 0x64 0x20 read-write 0x00000000 MA Memory address 0 32 CCR6 CCR6 DMA channel configuration register (DMA_CCR) 0x6C 0x20 read-write 0x00000000 EN Channel enable 0 1 TCIE Transfer complete interrupt enable 1 1 HTIE Half Transfer interrupt enable 2 1 TEIE Transfer error interrupt enable 3 1 DIR Data transfer direction 4 1 CIRC Circular mode 5 1 PINC Peripheral increment mode 6 1 MINC Memory increment mode 7 1 PSIZE Peripheral size 8 2 MSIZE Memory size 10 2 PL Channel Priority level 12 2 MEM2MEM Memory to memory mode 14 1 CNDTR6 CNDTR6 DMA channel 6 number of data register 0x70 0x20 read-write 0x00000000 NDT Number of data to transfer 0 16 CPAR6 CPAR6 DMA channel 6 peripheral address register 0x74 0x20 read-write 0x00000000 PA Peripheral address 0 32 CMAR6 CMAR6 DMA channel 6 memory address register 0x78 0x20 read-write 0x00000000 MA Memory address 0 32 CCR7 CCR7 DMA channel configuration register (DMA_CCR) 0x80 0x20 read-write 0x00000000 EN Channel enable 0 1 TCIE Transfer complete interrupt enable 1 1 HTIE Half Transfer interrupt enable 2 1 TEIE Transfer error interrupt enable 3 1 DIR Data transfer direction 4 1 CIRC Circular mode 5 1 PINC Peripheral increment mode 6 1 MINC Memory increment mode 7 1 PSIZE Peripheral size 8 2 MSIZE Memory size 10 2 PL Channel Priority level 12 2 MEM2MEM Memory to memory mode 14 1 CNDTR7 CNDTR7 DMA channel 7 number of data register 0x84 0x20 read-write 0x00000000 NDT Number of data to transfer 0 16 CPAR7 CPAR7 DMA channel 7 peripheral address register 0x88 0x20 read-write 0x00000000 PA Peripheral address 0 32 CMAR7 CMAR7 DMA channel 7 memory address register 0x8C 0x20 read-write 0x00000000 MA Memory address 0 32 DMA2 0x40020400 DMA2_CH1 DMA2 channel interrupt 56 DMA2_CH2 DMA2 channel interrupt 57 DMA2_CH3 DMA2 channel interrupt 58 DMA2_CH4 DMA2 channel interrupt 59 DMA2_CH5 DMA2 channel interrupt 60 TIM2 General purpose timer TIM 0x40000000 0x0 0x400 registers TIM2 Timer 2 global interrupt 28 CR1 CR1 control register 1 0x0 0x20 read-write 0x0000 CKD Clock division 8 2 ARPE Auto-reload preload enable 7 1 CMS Center-aligned mode selection 5 2 DIR Direction 4 1 OPM One-pulse mode 3 1 URS Update request source 2 1 UDIS Update disable 1 1 CEN Counter enable 0 1 CR2 CR2 control register 2 0x4 0x20 read-write 0x0000 TI1S TI1 selection 7 1 MMS Master mode selection 4 3 CCDS Capture/compare DMA selection 3 1 SMCR SMCR slave mode control register 0x8 0x20 read-write 0x0000 ETP External trigger polarity 15 1 ECE External clock enable 14 1 ETPS External trigger prescaler 12 2 ETF External trigger filter 8 4 MSM Master/Slave mode 7 1 TS Trigger selection 4 3 SMS Slave mode selection 0 3 DIER DIER DMA/Interrupt enable register 0xC 0x20 read-write 0x0000 TDE Trigger DMA request enable 14 1 CC4DE Capture/Compare 4 DMA request enable 12 1 CC3DE Capture/Compare 3 DMA request enable 11 1 CC2DE Capture/Compare 2 DMA request enable 10 1 CC1DE Capture/Compare 1 DMA request enable 9 1 UDE Update DMA request enable 8 1 TIE Trigger interrupt enable 6 1 CC4IE Capture/Compare 4 interrupt enable 4 1 CC3IE Capture/Compare 3 interrupt enable 3 1 CC2IE Capture/Compare 2 interrupt enable 2 1 CC1IE Capture/Compare 1 interrupt enable 1 1 UIE Update interrupt enable 0 1 SR SR status register 0x10 0x20 read-write 0x0000 CC4OF Capture/Compare 4 overcapture flag 12 1 CC3OF Capture/Compare 3 overcapture flag 11 1 CC2OF Capture/compare 2 overcapture flag 10 1 CC1OF Capture/Compare 1 overcapture flag 9 1 TIF Trigger interrupt flag 6 1 CC4IF Capture/Compare 4 interrupt flag 4 1 CC3IF Capture/Compare 3 interrupt flag 3 1 CC2IF Capture/Compare 2 interrupt flag 2 1 CC1IF Capture/compare 1 interrupt flag 1 1 UIF Update interrupt flag 0 1 EGR EGR event generation register 0x14 0x20 write-only 0x0000 TG Trigger generation 6 1 CC4G Capture/compare 4 generation 4 1 CC3G Capture/compare 3 generation 3 1 CC2G Capture/compare 2 generation 2 1 CC1G Capture/compare 1 generation 1 1 UG Update generation 0 1 CCMR1_Output CCMR1_Output capture/compare mode register 1 (output mode) 0x18 0x20 read-write 0x00000000 OC2CE Output compare 2 clear enable 15 1 OC2M Output compare 2 mode 12 3 OC2PE Output compare 2 preload enable 11 1 OC2FE Output compare 2 fast enable 10 1 CC2S Capture/Compare 2 selection 8 2 OC1CE Output compare 1 clear enable 7 1 OC1M Output compare 1 mode 4 3 OC1PE Output compare 1 preload enable 3 1 OC1FE Output compare 1 fast enable 2 1 CC1S Capture/Compare 1 selection 0 2 CCMR1_Input CCMR1_Input capture/compare mode register 1 (input mode) CCMR1_Output 0x18 0x20 read-write 0x00000000 IC2F Input capture 2 filter 12 4 IC2PSC Input capture 2 prescaler 10 2 CC2S Capture/compare 2 selection 8 2 IC1F Input capture 1 filter 4 4 IC1PSC Input capture 1 prescaler 2 2 CC1S Capture/Compare 1 selection 0 2 CCMR2_Output CCMR2_Output capture/compare mode register 2 (output mode) 0x1C 0x20 read-write 0x00000000 O24CE Output compare 4 clear enable 15 1 OC4M Output compare 4 mode 12 3 OC4PE Output compare 4 preload enable 11 1 OC4FE Output compare 4 fast enable 10 1 CC4S Capture/Compare 4 selection 8 2 OC3CE Output compare 3 clear enable 7 1 OC3M Output compare 3 mode 4 3 OC3PE Output compare 3 preload enable 3 1 OC3FE Output compare 3 fast enable 2 1 CC3S Capture/Compare 3 selection 0 2 CCMR2_Input CCMR2_Input capture/compare mode register 2 (input mode) CCMR2_Output 0x1C 0x20 read-write 0x00000000 IC4F Input capture 4 filter 12 4 IC4PSC Input capture 4 prescaler 10 2 CC4S Capture/Compare 4 selection 8 2 IC3F Input capture 3 filter 4 4 IC3PSC Input capture 3 prescaler 2 2 CC3S Capture/Compare 3 selection 0 2 CCER CCER capture/compare enable register 0x20 0x20 read-write 0x0000 CC1E Capture/Compare 1 output enable 0 1 CC1P Capture/Compare 1 output Polarity 1 1 CC1NP Capture/Compare 1 output Polarity 3 1 CC2E Capture/Compare 2 output enable 4 1 CC2P Capture/Compare 2 output Polarity 5 1 CC2NP Capture/Compare 2 output Polarity 7 1 CC3E Capture/Compare 3 output enable 8 1 CC3P Capture/Compare 3 output Polarity 9 1 CC3NP Capture/Compare 3 output Polarity 11 1 CC4E Capture/Compare 4 output enable 12 1 CC4P Capture/Compare 3 output Polarity 13 1 CC4NP Capture/Compare 3 output Polarity 15 1 CNT CNT counter 0x24 0x20 read-write 0x00000000 CNTL Low counter value 0 16 CNTH High counter value 16 16 PSC PSC prescaler 0x28 0x20 read-write 0x0000 PSC Prescaler value 0 16 ARR ARR auto-reload register 0x2C 0x20 read-write 0x00000000 ARRL Low Auto-reload value 0 16 ARRH High Auto-reload value 16 16 CCR1 CCR1 capture/compare register 1 0x34 0x20 read-write 0x00000000 CCR1L Low Capture/Compare 1 value 0 16 CCR1H High Capture/Compare 1 value 16 16 CCR2 CCR2 capture/compare register 2 0x38 0x20 read-write 0x00000000 CCR2L Low Capture/Compare 2 value 0 16 CCR2H High Capture/Compare 2 value 16 16 CCR3 CCR3 capture/compare register 3 0x3C 0x20 read-write 0x00000000 CCR3L Low Capture/Compare value 0 16 CCR3H High Capture/Compare value 16 16 CCR4 CCR4 capture/compare register 4 0x40 0x20 read-write 0x00000000 CCR4L Low Capture/Compare value 0 16 CCR4H High Capture/Compare value 16 16 DCR DCR DMA control register 0x48 0x20 read-write 0x0000 DBL DMA burst length 8 5 DBA DMA base address 0 5 DMAR DMAR DMA address for full transfer 0x4C 0x20 read-write 0x0000 DMAB DMA register for burst accesses 0 16 OR OR option register 0x50 0x20 read-write 0x0000 ITR1_RMP Internal trigger 1 remap 10 2 TIM5 General purpose timer TIM 0x40000C00 0x0 0x400 registers TIM5 Timer 5 global interrupt 50 CR1 CR1 control register 1 0x0 0x20 read-write 0x0000 CKD Clock division 8 2 ARPE Auto-reload preload enable 7 1 CMS Center-aligned mode selection 5 2 DIR Direction 4 1 OPM One-pulse mode 3 1 URS Update request source 2 1 UDIS Update disable 1 1 CEN Counter enable 0 1 CR2 CR2 control register 2 0x4 0x20 read-write 0x0000 TI1S TI1 selection 7 1 MMS Master mode selection 4 3 CCDS Capture/compare DMA selection 3 1 SMCR SMCR slave mode control register 0x8 0x20 read-write 0x0000 ETP External trigger polarity 15 1 ECE External clock enable 14 1 ETPS External trigger prescaler 12 2 ETF External trigger filter 8 4 MSM Master/Slave mode 7 1 TS Trigger selection 4 3 SMS Slave mode selection 0 3 DIER DIER DMA/Interrupt enable register 0xC 0x20 read-write 0x0000 TDE Trigger DMA request enable 14 1 CC4DE Capture/Compare 4 DMA request enable 12 1 CC3DE Capture/Compare 3 DMA request enable 11 1 CC2DE Capture/Compare 2 DMA request enable 10 1 CC1DE Capture/Compare 1 DMA request enable 9 1 UDE Update DMA request enable 8 1 TIE Trigger interrupt enable 6 1 CC4IE Capture/Compare 4 interrupt enable 4 1 CC3IE Capture/Compare 3 interrupt enable 3 1 CC2IE Capture/Compare 2 interrupt enable 2 1 CC1IE Capture/Compare 1 interrupt enable 1 1 UIE Update interrupt enable 0 1 SR SR status register 0x10 0x20 read-write 0x0000 CC4OF Capture/Compare 4 overcapture flag 12 1 CC3OF Capture/Compare 3 overcapture flag 11 1 CC2OF Capture/compare 2 overcapture flag 10 1 CC1OF Capture/Compare 1 overcapture flag 9 1 TIF Trigger interrupt flag 6 1 CC4IF Capture/Compare 4 interrupt flag 4 1 CC3IF Capture/Compare 3 interrupt flag 3 1 CC2IF Capture/Compare 2 interrupt flag 2 1 CC1IF Capture/compare 1 interrupt flag 1 1 UIF Update interrupt flag 0 1 EGR EGR event generation register 0x14 0x20 write-only 0x0000 TG Trigger generation 6 1 CC4G Capture/compare 4 generation 4 1 CC3G Capture/compare 3 generation 3 1 CC2G Capture/compare 2 generation 2 1 CC1G Capture/compare 1 generation 1 1 UG Update generation 0 1 CCMR1_Output CCMR1_Output capture/compare mode register 1 (output mode) 0x18 0x20 read-write 0x00000000 OC2CE Output compare 2 clear enable 15 1 OC2M Output compare 2 mode 12 3 OC2PE Output compare 2 preload enable 11 1 OC2FE Output compare 2 fast enable 10 1 CC2S Capture/Compare 2 selection 8 2 OC1CE Output compare 1 clear enable 7 1 OC1M Output compare 1 mode 4 3 OC1PE Output compare 1 preload enable 3 1 OC1FE Output compare 1 fast enable 2 1 CC1S Capture/Compare 1 selection 0 2 CCMR1_Input CCMR1_Input capture/compare mode register 1 (input mode) CCMR1_Output 0x18 0x20 read-write 0x00000000 IC2F Input capture 2 filter 12 4 IC2PSC Input capture 2 prescaler 10 2 CC2S Capture/compare 2 selection 8 2 IC1F Input capture 1 filter 4 4 IC1PSC Input capture 1 prescaler 2 2 CC1S Capture/Compare 1 selection 0 2 CCMR2_Output CCMR2_Output capture/compare mode register 2 (output mode) 0x1C 0x20 read-write 0x00000000 O24CE Output compare 4 clear enable 15 1 OC4M Output compare 4 mode 12 3 OC4PE Output compare 4 preload enable 11 1 OC4FE Output compare 4 fast enable 10 1 CC4S Capture/Compare 4 selection 8 2 OC3CE Output compare 3 clear enable 7 1 OC3M Output compare 3 mode 4 3 OC3PE Output compare 3 preload enable 3 1 OC3FE Output compare 3 fast enable 2 1 CC3S Capture/Compare 3 selection 0 2 CCMR2_Input CCMR2_Input capture/compare mode register 2 (input mode) CCMR2_Output 0x1C 0x20 read-write 0x00000000 IC4F Input capture 4 filter 12 4 IC4PSC Input capture 4 prescaler 10 2 CC4S Capture/Compare 4 selection 8 2 IC3F Input capture 3 filter 4 4 IC3PSC Input capture 3 prescaler 2 2 CC3S Capture/Compare 3 selection 0 2 CCER CCER capture/compare enable register 0x20 0x20 read-write 0x0000 CC1E Capture/Compare 1 output enable 0 1 CC1P Capture/Compare 1 output Polarity 1 1 CC1NP Capture/Compare 1 output Polarity 3 1 CC2E Capture/Compare 2 output enable 4 1 CC2P Capture/Compare 2 output Polarity 5 1 CC2NP Capture/Compare 2 output Polarity 7 1 CC3E Capture/Compare 3 output enable 8 1 CC3P Capture/Compare 3 output Polarity 9 1 CC3NP Capture/Compare 3 output Polarity 11 1 CC4E Capture/Compare 4 output enable 12 1 CC4P Capture/Compare 3 output Polarity 13 1 CC4NP Capture/Compare 3 output Polarity 15 1 CNT CNT counter 0x24 0x20 read-write 0x00000000 CNTL Low counter value 0 16 CNTH High counter value 16 16 PSC PSC prescaler 0x28 0x20 read-write 0x0000 PSC Prescaler value 0 16 ARR ARR auto-reload register 0x2C 0x20 read-write 0x00000000 ARRL Low Auto-reload value 0 16 ARRH High Auto-reload value 16 16 CCR1 CCR1 capture/compare register 1 0x34 0x20 read-write 0x00000000 CCR1L Low Capture/Compare 1 value 0 16 CCR1H High Capture/Compare 1 value 16 16 CCR2 CCR2 capture/compare register 2 0x38 0x20 read-write 0x00000000 CCR2L Low Capture/Compare 2 value 0 16 CCR2H High Capture/Compare 2 value 16 16 CCR3 CCR3 capture/compare register 3 0x3C 0x20 read-write 0x00000000 CCR3L Low Capture/Compare value 0 16 CCR3H High Capture/Compare value 16 16 CCR4 CCR4 capture/compare register 4 0x40 0x20 read-write 0x00000000 CCR4L Low Capture/Compare value 0 16 CCR4H High Capture/Compare value 16 16 DCR DCR DMA control register 0x48 0x20 read-write 0x0000 DBL DMA burst length 8 5 DBA DMA base address 0 5 DMAR DMAR DMA address for full transfer 0x4C 0x20 read-write 0x0000 DMAB DMA register for burst accesses 0 16 OR OR option register 0x50 0x20 read-write 0x0000 IT4_RMP Timer Input 4 remap 6 2 TIM3 General purpose timer TIM 0x40000400 0x0 0x400 registers TIM3 Timer 3 global interrupt 29 CR1 CR1 control register 1 0x0 0x20 read-write 0x0000 CKD Clock division 8 2 ARPE Auto-reload preload enable 7 1 CMS Center-aligned mode selection 5 2 DIR Direction 4 1 OPM One-pulse mode 3 1 URS Update request source 2 1 UDIS Update disable 1 1 CEN Counter enable 0 1 CR2 CR2 control register 2 0x4 0x20 read-write 0x0000 TI1S TI1 selection 7 1 MMS Master mode selection 4 3 CCDS Capture/compare DMA selection 3 1 SMCR SMCR slave mode control register 0x8 0x20 read-write 0x0000 ETP External trigger polarity 15 1 ECE External clock enable 14 1 ETPS External trigger prescaler 12 2 ETF External trigger filter 8 4 MSM Master/Slave mode 7 1 TS Trigger selection 4 3 SMS Slave mode selection 0 3 DIER DIER DMA/Interrupt enable register 0xC 0x20 read-write 0x0000 TDE Trigger DMA request enable 14 1 CC4DE Capture/Compare 4 DMA request enable 12 1 CC3DE Capture/Compare 3 DMA request enable 11 1 CC2DE Capture/Compare 2 DMA request enable 10 1 CC1DE Capture/Compare 1 DMA request enable 9 1 UDE Update DMA request enable 8 1 TIE Trigger interrupt enable 6 1 CC4IE Capture/Compare 4 interrupt enable 4 1 CC3IE Capture/Compare 3 interrupt enable 3 1 CC2IE Capture/Compare 2 interrupt enable 2 1 CC1IE Capture/Compare 1 interrupt enable 1 1 UIE Update interrupt enable 0 1 SR SR status register 0x10 0x20 read-write 0x0000 CC4OF Capture/Compare 4 overcapture flag 12 1 CC3OF Capture/Compare 3 overcapture flag 11 1 CC2OF Capture/compare 2 overcapture flag 10 1 CC1OF Capture/Compare 1 overcapture flag 9 1 TIF Trigger interrupt flag 6 1 CC4IF Capture/Compare 4 interrupt flag 4 1 CC3IF Capture/Compare 3 interrupt flag 3 1 CC2IF Capture/Compare 2 interrupt flag 2 1 CC1IF Capture/compare 1 interrupt flag 1 1 UIF Update interrupt flag 0 1 EGR EGR event generation register 0x14 0x20 write-only 0x0000 TG Trigger generation 6 1 CC4G Capture/compare 4 generation 4 1 CC3G Capture/compare 3 generation 3 1 CC2G Capture/compare 2 generation 2 1 CC1G Capture/compare 1 generation 1 1 UG Update generation 0 1 CCMR1_Output CCMR1_Output capture/compare mode register 1 (output mode) 0x18 0x20 read-write 0x00000000 OC2CE Output compare 2 clear enable 15 1 OC2M Output compare 2 mode 12 3 OC2PE Output compare 2 preload enable 11 1 OC2FE Output compare 2 fast enable 10 1 CC2S Capture/Compare 2 selection 8 2 OC1CE Output compare 1 clear enable 7 1 OC1M Output compare 1 mode 4 3 OC1PE Output compare 1 preload enable 3 1 OC1FE Output compare 1 fast enable 2 1 CC1S Capture/Compare 1 selection 0 2 CCMR1_Input CCMR1_Input capture/compare mode register 1 (input mode) CCMR1_Output 0x18 0x20 read-write 0x00000000 IC2F Input capture 2 filter 12 4 IC2PSC Input capture 2 prescaler 10 2 CC2S Capture/compare 2 selection 8 2 IC1F Input capture 1 filter 4 4 IC1PSC Input capture 1 prescaler 2 2 CC1S Capture/Compare 1 selection 0 2 CCMR2_Output CCMR2_Output capture/compare mode register 2 (output mode) 0x1C 0x20 read-write 0x00000000 O24CE Output compare 4 clear enable 15 1 OC4M Output compare 4 mode 12 3 OC4PE Output compare 4 preload enable 11 1 OC4FE Output compare 4 fast enable 10 1 CC4S Capture/Compare 4 selection 8 2 OC3CE Output compare 3 clear enable 7 1 OC3M Output compare 3 mode 4 3 OC3PE Output compare 3 preload enable 3 1 OC3FE Output compare 3 fast enable 2 1 CC3S Capture/Compare 3 selection 0 2 CCMR2_Input CCMR2_Input capture/compare mode register 2 (input mode) CCMR2_Output 0x1C 0x20 read-write 0x00000000 IC4F Input capture 4 filter 12 4 IC4PSC Input capture 4 prescaler 10 2 CC4S Capture/Compare 4 selection 8 2 IC3F Input capture 3 filter 4 4 IC3PSC Input capture 3 prescaler 2 2 CC3S Capture/Compare 3 selection 0 2 CCER CCER capture/compare enable register 0x20 0x20 read-write 0x0000 CC1E Capture/Compare 1 output enable 0 1 CC1P Capture/Compare 1 output Polarity 1 1 CC1NP Capture/Compare 1 output Polarity 3 1 CC2E Capture/Compare 2 output enable 4 1 CC2P Capture/Compare 2 output Polarity 5 1 CC2NP Capture/Compare 2 output Polarity 7 1 CC3E Capture/Compare 3 output enable 8 1 CC3P Capture/Compare 3 output Polarity 9 1 CC3NP Capture/Compare 3 output Polarity 11 1 CC4E Capture/Compare 4 output enable 12 1 CC4P Capture/Compare 3 output Polarity 13 1 CC4NP Capture/Compare 3 output Polarity 15 1 CNT CNT counter 0x24 0x20 read-write 0x00000000 CNT counter value 0 16 PSC PSC prescaler 0x28 0x20 read-write 0x0000 PSC Prescaler value 0 16 ARR ARR auto-reload register 0x2C 0x20 read-write 0x00000000 ARR Auto-reload value 0 16 CCR1 CCR1 capture/compare register 1 0x34 0x20 read-write 0x00000000 CCR1 Capture/Compare 1 value 0 16 CCR2 CCR2 capture/compare register 2 0x38 0x20 read-write 0x00000000 CCR2 Capture/Compare 2 value 0 16 CCR3 CCR3 capture/compare register 3 0x3C 0x20 read-write 0x00000000 CCR3 Capture/Compare value 0 16 CCR4 CCR4 capture/compare register 4 0x40 0x20 read-write 0x00000000 CCR4 Capture/Compare value 0 16 DCR DCR DMA control register 0x48 0x20 read-write 0x0000 DBL DMA burst length 8 5 DBA DMA base address 0 5 DMAR DMAR DMA address for full transfer 0x4C 0x20 read-write 0x0000 DMAB DMA register for burst accesses 0 16 TIM4 0x40000800 TIM4 Timer 4 global interrupt 30 TIM19 0x40015C00 TIM19 Timer 19 global interrupt 78 TIM15 General purpose timers TIM 0x40014000 0x0 0x400 registers TIM15 Timer 15 global interrupt 24 CR1 CR1 control register 1 0x0 0x20 read-write 0x0000 CKD Clock division 8 2 ARPE Auto-reload preload enable 7 1 OPM One-pulse mode 3 1 URS Update request source 2 1 UDIS Update disable 1 1 CEN Counter enable 0 1 CR2 CR2 control register 2 0x4 0x20 read-write 0x0000 OIS2 Output Idle state 2 10 1 OIS1N Output Idle state 1 9 1 OIS1 Output Idle state 1 8 1 MMS Master mode selection 4 3 CCDS Capture/compare DMA selection 3 1 CCUS Capture/compare control update selection 2 1 CCPC Capture/compare preloaded control 0 1 SMCR SMCR slave mode control register 0x8 0x20 read-write 0x0000 MSM Master/Slave mode 7 1 TS Trigger selection 4 3 SMS Slave mode selection 0 3 DIER DIER DMA/Interrupt enable register 0xC 0x20 read-write 0x0000 TDE Trigger DMA request enable 14 1 CC2DE Capture/Compare 2 DMA request enable 10 1 CC1DE Capture/Compare 1 DMA request enable 9 1 UDE Update DMA request enable 8 1 BIE Break interrupt enable 7 1 TIE Trigger interrupt enable 6 1 COMIE COM interrupt enable 5 1 CC2IE Capture/Compare 2 interrupt enable 2 1 CC1IE Capture/Compare 1 interrupt enable 1 1 UIE Update interrupt enable 0 1 SR SR status register 0x10 0x20 read-write 0x0000 CC2OF Capture/compare 2 overcapture flag 10 1 CC1OF Capture/Compare 1 overcapture flag 9 1 BIF Break interrupt flag 7 1 TIF Trigger interrupt flag 6 1 COMIF COM interrupt flag 5 1 CC2IF Capture/Compare 2 interrupt flag 2 1 CC1IF Capture/compare 1 interrupt flag 1 1 UIF Update interrupt flag 0 1 EGR EGR event generation register 0x14 0x20 write-only 0x0000 BG Break generation 7 1 TG Trigger generation 6 1 COMG Capture/Compare control update generation 5 1 CC2G Capture/compare 2 generation 2 1 CC1G Capture/compare 1 generation 1 1 UG Update generation 0 1 CCMR1_Output CCMR1_Output capture/compare mode register (output mode) 0x18 0x20 read-write 0x00000000 OC2M Output Compare 2 mode 12 3 OC2PE Output Compare 2 preload enable 11 1 OC2FE Output Compare 2 fast enable 10 1 CC2S Capture/Compare 2 selection 8 2 OC1M Output Compare 1 mode 4 3 OC1PE Output Compare 1 preload enable 3 1 OC1FE Output Compare 1 fast enable 2 1 CC1S Capture/Compare 1 selection 0 2 CCMR1_Input CCMR1_Input capture/compare mode register 1 (input mode) CCMR1_Output 0x18 0x20 read-write 0x00000000 IC2F Input capture 2 filter 12 4 IC2PSC Input capture 2 prescaler 10 2 CC2S Capture/Compare 2 selection 8 2 IC1F Input capture 1 filter 4 4 IC1PSC Input capture 1 prescaler 2 2 CC1S Capture/Compare 1 selection 0 2 CCER CCER capture/compare enable register 0x20 0x20 read-write 0x0000 CC2NP Capture/Compare 2 output Polarity 7 1 CC2P Capture/Compare 2 output Polarity 5 1 CC2E Capture/Compare 2 output enable 4 1 CC1NP Capture/Compare 1 output Polarity 3 1 CC1NE Capture/Compare 1 complementary output enable 2 1 CC1P Capture/Compare 1 output Polarity 1 1 CC1E Capture/Compare 1 output enable 0 1 CNT CNT counter 0x24 0x20 read-write 0x00000000 CNT counter value 0 16 PSC PSC prescaler 0x28 0x20 read-write 0x0000 PSC Prescaler value 0 16 ARR ARR auto-reload register 0x2C 0x20 read-write 0x00000000 ARR Auto-reload value 0 16 RCR RCR repetition counter register 0x30 0x20 read-write 0x0000 REP Repetition counter value 0 8 CCR1 CCR1 capture/compare register 1 0x34 0x20 read-write 0x00000000 CCR1 Capture/Compare 1 value 0 16 CCR2 CCR2 capture/compare register 2 0x38 0x20 read-write 0x00000000 CCR2 Capture/Compare 2 value 0 16 BDTR BDTR break and dead-time register 0x44 0x20 read-write 0x0000 MOE Main output enable 15 1 AOE Automatic output enable 14 1 BKP Break polarity 13 1 BKE Break enable 12 1 OSSR Off-state selection for Run mode 11 1 OSSI Off-state selection for Idle mode 10 1 LOCK Lock configuration 8 2 DTG Dead-time generator setup 0 8 DCR DCR DMA control register 0x48 0x20 read-write 0x0000 DBL DMA burst length 8 5 DBA DMA base address 0 5 DMAR DMAR DMA address for full transfer 0x4C 0x20 read-write 0x0000 DMAB DMA register for burst accesses 0 16 TIM16 General-purpose-timers TIM 0x40014400 0x0 0x400 registers TIM16 Timer 16 global interrupt 25 CR1 CR1 control register 1 0x0 0x20 read-write 0x0000 CKD Clock division 8 2 ARPE Auto-reload preload enable 7 1 OPM One-pulse mode 3 1 URS Update request source 2 1 UDIS Update disable 1 1 CEN Counter enable 0 1 CR2 CR2 control register 2 0x4 0x20 read-write 0x0000 OIS1N Output Idle state 1 9 1 OIS1 Output Idle state 1 8 1 CCDS Capture/compare DMA selection 3 1 CCUS Capture/compare control update selection 2 1 CCPC Capture/compare preloaded control 0 1 DIER DIER DMA/Interrupt enable register 0xC 0x20 read-write 0x0000 TDE Trigger DMA request enable 14 1 CC1DE Capture/Compare 1 DMA request enable 9 1 UDE Update DMA request enable 8 1 BIE Break interrupt enable 7 1 TIE Trigger interrupt enable 6 1 COMIE COM interrupt enable 5 1 CC1IE Capture/Compare 1 interrupt enable 1 1 UIE Update interrupt enable 0 1 SR SR status register 0x10 0x20 read-write 0x0000 CC1OF Capture/Compare 1 overcapture flag 9 1 BIF Break interrupt flag 7 1 TIF Trigger interrupt flag 6 1 COMIF COM interrupt flag 5 1 CC1IF Capture/compare 1 interrupt flag 1 1 UIF Update interrupt flag 0 1 EGR EGR event generation register 0x14 0x20 write-only 0x0000 BG Break generation 7 1 TG Trigger generation 6 1 COMG Capture/Compare control update generation 5 1 CC1G Capture/compare 1 generation 1 1 UG Update generation 0 1 CCMR1_Output CCMR1_Output capture/compare mode register (output mode) 0x18 0x20 read-write 0x00000000 OC1M Output Compare 1 mode 4 3 OC1PE Output Compare 1 preload enable 3 1 OC1FE Output Compare 1 fast enable 2 1 CC1S Capture/Compare 1 selection 0 2 CCMR1_Input CCMR1_Input capture/compare mode register 1 (input mode) CCMR1_Output 0x18 0x20 read-write 0x00000000 IC1F Input capture 1 filter 4 4 IC1PSC Input capture 1 prescaler 2 2 CC1S Capture/Compare 1 selection 0 2 CCER CCER capture/compare enable register 0x20 0x20 read-write 0x0000 CC1NP Capture/Compare 1 output Polarity 3 1 CC1NE Capture/Compare 1 complementary output enable 2 1 CC1P Capture/Compare 1 output Polarity 1 1 CC1E Capture/Compare 1 output enable 0 1 CNT CNT counter 0x24 0x20 read-write 0x00000000 CNT counter value 0 16 PSC PSC prescaler 0x28 0x20 read-write 0x0000 PSC Prescaler value 0 16 ARR ARR auto-reload register 0x2C 0x20 read-write 0x00000000 ARR Auto-reload value 0 16 RCR RCR repetition counter register 0x30 0x20 read-write 0x0000 REP Repetition counter value 0 8 CCR1 CCR1 capture/compare register 1 0x34 0x20 read-write 0x00000000 CCR1 Capture/Compare 1 value 0 16 BDTR BDTR break and dead-time register 0x44 0x20 read-write 0x0000 MOE Main output enable 15 1 AOE Automatic output enable 14 1 BKP Break polarity 13 1 BKE Break enable 12 1 OSSR Off-state selection for Run mode 11 1 OSSI Off-state selection for Idle mode 10 1 LOCK Lock configuration 8 2 DTG Dead-time generator setup 0 8 DCR DCR DMA control register 0x48 0x20 read-write 0x0000 DBL DMA burst length 8 5 DBA DMA base address 0 5 DMAR DMAR DMA address for full transfer 0x4C 0x20 read-write 0x0000 DMAB DMA register for burst accesses 0 16 TIM17 0x40014800 TIM17 Timer 17 global interrupt 26 USART1 Universal synchronous asynchronous receiver transmitter USART 0x40013800 0x0 0x400 registers USART1 USART1 global interrupt/EXTI25 (USART1 wakeup event) 37 CR1 CR1 Control register 1 0x0 0x20 read-write 0x0000 EOBIE End of Block interrupt enable 27 1 RTOIE Receiver timeout interrupt enable 26 1 DEAT Driver Enable assertion time 21 5 DEDT Driver Enable deassertion time 16 5 OVER8 Oversampling mode 15 1 CMIE Character match interrupt enable 14 1 MME Mute mode enable 13 1 M Word length 12 1 WAKE Receiver wakeup method 11 1 PCE Parity control enable 10 1 PS Parity selection 9 1 PEIE PE interrupt enable 8 1 TXEIE interrupt enable 7 1 TCIE Transmission complete interrupt enable 6 1 RXNEIE RXNE interrupt enable 5 1 IDLEIE IDLE interrupt enable 4 1 TE Transmitter enable 3 1 RE Receiver enable 2 1 UESM USART enable in Stop mode 1 1 UE USART enable 0 1 CR2 CR2 Control register 2 0x4 0x20 read-write 0x0000 ADD4 Address of the USART node 28 4 ADD0 Address of the USART node 24 4 RTOEN Receiver timeout enable 23 1 ABRMOD Auto baud rate mode 21 2 ABREN Auto baud rate enable 20 1 MSBFIRST Most significant bit first 19 1 DATAINV Binary data inversion 18 1 TXINV TX pin active level inversion 17 1 RXINV RX pin active level inversion 16 1 SWAP Swap TX/RX pins 15 1 LINEN LIN mode enable 14 1 STOP STOP bits 12 2 CLKEN Clock enable 11 1 CPOL Clock polarity 10 1 CPHA Clock phase 9 1 LBCL Last bit clock pulse 8 1 LBDIE LIN break detection interrupt enable 6 1 LBDL LIN break detection length 5 1 ADDM7 7-bit Address Detection/4-bit Address Detection 4 1 CR3 CR3 Control register 3 0x8 0x20 read-write 0x0000 WUFIE Wakeup from Stop mode interrupt enable 22 1 WUS Wakeup from Stop mode interrupt flag selection 20 2 SCARCNT Smartcard auto-retry count 17 3 DEP Driver enable polarity selection 15 1 DEM Driver enable mode 14 1 DDRE DMA Disable on Reception Error 13 1 OVRDIS Overrun Disable 12 1 ONEBIT One sample bit method enable 11 1 CTSIE CTS interrupt enable 10 1 CTSE CTS enable 9 1 RTSE RTS enable 8 1 DMAT DMA enable transmitter 7 1 DMAR DMA enable receiver 6 1 SCEN Smartcard mode enable 5 1 NACK Smartcard NACK enable 4 1 HDSEL Half-duplex selection 3 1 IRLP IrDA low-power 2 1 IREN IrDA mode enable 1 1 EIE Error interrupt enable 0 1 BRR BRR Baud rate register 0xC 0x20 read-write 0x0000 DIV_Mantissa mantissa of USARTDIV 4 12 DIV_Fraction fraction of USARTDIV 0 4 GTPR GTPR Guard time and prescaler register 0x10 0x20 read-write 0x0000 GT Guard time value 8 8 PSC Prescaler value 0 8 RTOR RTOR Receiver timeout register 0x14 0x20 read-write 0x0000 BLEN Block Length 24 8 RTO Receiver timeout value 0 24 RQR RQR Request register 0x18 0x20 read-write 0x0000 TXFRQ Transmit data flush request 4 1 RXFRQ Receive data flush request 3 1 MMRQ Mute mode request 2 1 SBKRQ Send break request 1 1 ABRRQ Auto baud rate request 0 1 ISR ISR Interrupt & status register 0x1C 0x20 read-only 0x00C0 REACK Receive enable acknowledge flag 22 1 TEACK Transmit enable acknowledge flag 21 1 WUF Wakeup from Stop mode flag 20 1 RWU Receiver wakeup from Mute mode 19 1 SBKF Send break flag 18 1 CMF character match flag 17 1 BUSY Busy flag 16 1 ABRF Auto baud rate flag 15 1 ABRE Auto baud rate error 14 1 EOBF End of block flag 12 1 RTOF Receiver timeout 11 1 CTS CTS flag 10 1 CTSIF CTS interrupt flag 9 1 LBDF LIN break detection flag 8 1 TXE Transmit data register empty 7 1 TC Transmission complete 6 1 RXNE Read data register not empty 5 1 IDLE Idle line detected 4 1 ORE Overrun error 3 1 NF Noise detected flag 2 1 FE Framing error 1 1 PE Parity error 0 1 ICR ICR Interrupt flag clear register 0x20 0x20 read-write 0x0000 WUCF Wakeup from Stop mode clear flag 20 1 CMCF Character match clear flag 17 1 EOBCF End of timeout clear flag 12 1 RTOCF Receiver timeout clear flag 11 1 CTSCF CTS clear flag 9 1 LBDCF LIN break detection clear flag 8 1 TCCF Transmission complete clear flag 6 1 IDLECF Idle line detected clear flag 4 1 ORECF Overrun error clear flag 3 1 NCF Noise detected clear flag 2 1 FECF Framing error clear flag 1 1 PECF Parity error clear flag 0 1 RDR RDR Receive data register 0x24 0x20 read-only 0x0000 RDR Receive data value 0 9 TDR TDR Transmit data register 0x28 0x20 read-write 0x0000 TDR Transmit data value 0 9 USART2 0x40004400 USART2 USART2 global interrupt/EXTI26 (USART1 wakeup event) 38 USART3 0x40004800 USART3 USART3 global interrupt/EXTI28 (USART1 wakeup event) 39 SPI1 Serial peripheral interface/Inter-IC sound SPI 0x40013000 0x0 0x400 registers SPI1 SPI1 global interrupt 35 CR1 CR1 control register 1 0x0 0x20 read-write 0x0000 BIDIMODE Bidirectional data mode enable 15 1 BIDIOE Output enable in bidirectional mode 14 1 CRCEN Hardware CRC calculation enable 13 1 CRCNEXT CRC transfer next 12 1 CRCL CRC length 11 1 RXONLY Receive only 10 1 SSM Software slave management 9 1 SSI Internal slave select 8 1 LSBFIRST Frame format 7 1 SPE SPI enable 6 1 BR Baud rate control 3 3 MSTR Master selection 2 1 CPOL Clock polarity 1 1 CPHA Clock phase 0 1 CR2 CR2 control register 2 0x4 0x20 read-write 0x0000 RXDMAEN Rx buffer DMA enable 0 1 TXDMAEN Tx buffer DMA enable 1 1 SSOE SS output enable 2 1 NSSP NSS pulse management 3 1 FRF Frame format 4 1 ERRIE Error interrupt enable 5 1 RXNEIE RX buffer not empty interrupt enable 6 1 TXEIE Tx buffer empty interrupt enable 7 1 DS Data size 8 4 FRXTH FIFO reception threshold 12 1 LDMA_RX Last DMA transfer for reception 13 1 LDMA_TX Last DMA transfer for transmission 14 1 SR SR status register 0x8 0x20 0x0002 RXNE Receive buffer not empty 0 1 read-only TXE Transmit buffer empty 1 1 read-only CHSIDE Channel side 2 1 read-only UDR Underrun flag 3 1 read-only CRCERR CRC error flag 4 1 read-write MODF Mode fault 5 1 read-only OVR Overrun flag 6 1 read-only BSY Busy flag 7 1 read-only TIFRFE TI frame format error 8 1 read-only FRLVL FIFO reception level 9 2 read-only FTLVL FIFO transmission level 11 2 read-only DR DR data register 0xC 0x20 read-write 0x0000 DR Data register 0 16 CRCPR CRCPR CRC polynomial register 0x10 0x20 read-write 0x0007 CRCPOLY CRC polynomial register 0 16 RXCRCR RXCRCR RX CRC register 0x14 0x20 read-only 0x0000 RxCRC Rx CRC register 0 16 TXCRCR TXCRCR TX CRC register 0x18 0x20 read-only 0x0000 TxCRC Tx CRC register 0 16 I2SCFGR I2SCFGR I2S configuration register 0x1C 0x20 read-write 0x0000 I2SMOD I2S mode selection 11 1 I2SE I2S Enable 10 1 I2SCFG I2S configuration mode 8 2 PCMSYNC PCM frame synchronization 7 1 I2SSTD I2S standard selection 4 2 CKPOL Steady state clock polarity 3 1 DATLEN Data length to be transferred 1 2 CHLEN Channel length (number of bits per audio channel) 0 1 I2SPR I2SPR I2S prescaler register 0x20 0x20 read-write 0x00000010 MCKOE Master clock output enable 9 1 ODD Odd factor for the prescaler 8 1 I2SDIV I2S Linear prescaler 0 8 SPI2 0x40003800 SPI2 SPI2 global interrupt 36 SPI3 0x40003C00 SPI3 SPI3 global interrupt 51 I2S2ext 0x40003400 I2S3ext 0x40004000 ADC Analog to digital converter ADC 0x40012400 0x0 0x400 registers ADC1 ADC1 interrupt 18 SR SR status register 0x0 0x20 read-write 0x00000000 STRT Regular channel start flag 4 1 JSTRT Injected channel start flag 3 1 JEOC Injected channel end of conversion 2 1 EOC Regular channel end of conversion 1 1 AWD Analog watchdog flag 0 1 CR1 CR1 control register 1 0x4 0x20 read-write 0x00000000 AWDEN Analog watchdog enable on regular channels 23 1 JAWDEN Analog watchdog enable on injected channels 22 1 DISCNUM Discontinuous mode channel count 13 3 JDISCEN Discontinuous mode on injected channels 12 1 DISCEN Discontinuous mode on regular channels 11 1 JAUTO Automatic injected group conversion 10 1 AWDSGL Enable the watchdog on a single channel in scan mode 9 1 SCAN Scan mode 8 1 JEOCIE Interrupt enable for injected channels 7 1 AWDIE Analog watchdog interrupt enable 6 1 EOCIE Interrupt enable for EOC 5 1 AWDCH Analog watchdog channel select bits 0 5 CR2 CR2 control register 2 0x8 0x20 read-write 0x00000000 TSVREFE Temperature sensor and VREFINT enable 23 1 SWSTART Start conversion of regular channels 22 1 JSWSTART Start conversion of injected channels 21 1 EXTTRIG External trigger conversion mode for regular channels 20 1 EXTSEL External event select for regular group 17 3 JEXTTRIG External trigger conversion mode for injected channels 15 1 JEXTSEL External event select for injected group 12 3 ALIGN Data alignment 11 1 DMA Direct memory access mode 8 1 RSTCAL Reset calibration 3 1 CAL A/D calibration 2 1 CONT Continuous conversion 1 1 ADON A/D converter ON / OFF 0 1 SMPR1 SMPR1 sample time register 1 0xC 0x20 read-write 0x00000000 SMP10 Channel 10 sampling time selection 0 3 SMP11 Channel 11 sampling time selection 3 3 SMP12 Channel 12 sampling time selection 6 3 SMP13 Channel 13 sampling time selection 9 3 SMP14 Channel 14 sampling time selection 12 3 SMP15 Channel 15 sampling time selection 15 3 SMP16 Channel 16 sampling time selection 18 3 SMP17 Channel 17 sampling time selection 21 3 SMPR2 SMPR2 sample time register 2 0x10 0x20 read-write 0x00000000 SMP0 Channel 0 sampling time selection 0 3 SMP1 Channel 1 sampling time selection 3 3 SMP2 Channel 2 sampling time selection 6 3 SMP3 Channel 3 sampling time selection 9 3 SMP4 Channel 4 sampling time selection 12 3 SMP5 Channel 5 sampling time selection 15 3 SMP6 Channel 6 sampling time selection 18 3 SMP7 Channel 7 sampling time selection 21 3 SMP8 Channel 8 sampling time selection 24 3 SMP9 Channel 9 sampling time selection 27 3 JOFR1 JOFR1 injected channel data offset register x 0x14 0x20 read-write 0x00000000 JOFFSET1 Data offset for injected channel x 0 12 JOFR2 JOFR2 injected channel data offset register x 0x18 0x20 read-write 0x00000000 JOFFSET2 Data offset for injected channel x 0 12 JOFR3 JOFR3 injected channel data offset register x 0x1C 0x20 read-write 0x00000000 JOFFSET3 Data offset for injected channel x 0 12 JOFR4 JOFR4 injected channel data offset register x 0x20 0x20 read-write 0x00000000 JOFFSET4 Data offset for injected channel x 0 12 HTR HTR watchdog higher threshold register 0x24 0x20 read-write 0x00000FFF HT Analog watchdog higher threshold 0 12 LTR LTR watchdog lower threshold register 0x28 0x20 read-write 0x00000000 LT Analog watchdog lower threshold 0 12 SQR1 SQR1 regular sequence register 1 0x2C 0x20 read-write 0x00000000 L Regular channel sequence length 20 4 SQ16 16th conversion in regular sequence 15 5 SQ15 15th conversion in regular sequence 10 5 SQ14 14th conversion in regular sequence 5 5 SQ13 13th conversion in regular sequence 0 5 SQR2 SQR2 regular sequence register 2 0x30 0x20 read-write 0x00000000 SQ12 12th conversion in regular sequence 25 5 SQ11 11th conversion in regular sequence 20 5 SQ10 10th conversion in regular sequence 15 5 SQ9 9th conversion in regular sequence 10 5 SQ8 8th conversion in regular sequence 5 5 SQ7 7th conversion in regular sequence 0 5 SQR3 SQR3 regular sequence register 3 0x34 0x20 read-write 0x00000000 SQ6 6th conversion in regular sequence 25 5 SQ5 5th conversion in regular sequence 20 5 SQ4 4th conversion in regular sequence 15 5 SQ3 3rd conversion in regular sequence 10 5 SQ2 2nd conversion in regular sequence 5 5 SQ1 1st conversion in regular sequence 0 5 JSQR JSQR injected sequence register 0x38 0x20 read-write 0x00000000 JL Injected sequence length 20 2 JSQ4 4th conversion in injected sequence 15 5 JSQ3 3rd conversion in injected sequence 10 5 JSQ2 2nd conversion in injected sequence 5 5 JSQ1 1st conversion in injected sequence 0 5 JDR1 JDR1 injected data register x 0x3C 0x20 read-only 0x00000000 JDATA Injected data 0 16 JDR2 JDR2 injected data register x 0x40 0x20 read-only 0x00000000 JDATA Injected data 0 16 JDR3 JDR3 injected data register x 0x44 0x20 read-only 0x00000000 JDATA Injected data 0 16 JDR4 JDR4 injected data register x 0x48 0x20 read-only 0x00000000 JDATA Injected data 0 16 DR DR regular data register 0x4C 0x20 read-only 0x00000000 DATA Regular data 0 16 EXTI External interrupt/event controller EXTI 0x40010400 0x0 0x400 registers PVD Power voltage detector through EXTI line detection interrupt 1 TAMP Tamper and timestamp through EXTI19 line 2 EXTI0 EXTI Line 0 interrupt 6 EXTI1 EXTI Line1 interrupt 7 EXTI2_TS EXTI Line 2 and routing interface interrupt 8 EXTI3 EXTI Line1 interrupt 9 EXTI4 EXTI Line4 interrupt 10 EXTI5_9 EXTI Line[9:5] interrupts 23 I2C1_EV I2C1_EV global interrupt/EXTI Line[3:2] interrupts 31 I2C2_EV I2C2_EV global interrupt/EXTI Line[4:2] interrupts 33 USART1 USART1 global interrupt/EXTI25 (USART1 wakeup event) 37 USART2 USART2 global interrupt/EXTI26 (USART1 wakeup event) 38 USART3 USART3 global interrupt/EXTI28 (USART1 wakeup event) 39 EXTI15_10 EXTI Line[15:10] interrupts 40 IMR IMR Interrupt mask register (EXTI_IMR) 0x0 0x20 read-write 0x1F800000 MR0 Interrupt Mask on line 0 0 1 MR1 Interrupt Mask on line 1 1 1 MR2 Interrupt Mask on line 2 2 1 MR3 Interrupt Mask on line 3 3 1 MR4 Interrupt Mask on line 4 4 1 MR5 Interrupt Mask on line 5 5 1 MR6 Interrupt Mask on line 6 6 1 MR7 Interrupt Mask on line 7 7 1 MR8 Interrupt Mask on line 8 8 1 MR9 Interrupt Mask on line 9 9 1 MR10 Interrupt Mask on line 10 10 1 MR11 Interrupt Mask on line 11 11 1 MR12 Interrupt Mask on line 12 12 1 MR13 Interrupt Mask on line 13 13 1 MR14 Interrupt Mask on line 14 14 1 MR15 Interrupt Mask on line 15 15 1 MR16 Interrupt Mask on line 16 16 1 MR17 Interrupt Mask on line 17 17 1 MR18 Interrupt Mask on line 18 18 1 MR19 Interrupt Mask on line 19 19 1 MR20 Interrupt Mask on line 20 20 1 MR21 Interrupt Mask on line 21 21 1 MR22 Interrupt Mask on line 22 22 1 MR23 Interrupt Mask on line 23 23 1 MR24 Interrupt Mask on line 24 24 1 MR25 Interrupt Mask on line 25 25 1 MR26 Interrupt Mask on line 26 26 1 MR27 Interrupt Mask on line 27 27 1 MR28 Interrupt Mask on line 28 28 1 EMR EMR Event mask register (EXTI_EMR) 0x4 0x20 read-write 0x00000000 MR0 Event Mask on line 0 0 1 MR1 Event Mask on line 1 1 1 MR2 Event Mask on line 2 2 1 MR3 Event Mask on line 3 3 1 MR4 Event Mask on line 4 4 1 MR5 Event Mask on line 5 5 1 MR6 Event Mask on line 6 6 1 MR7 Event Mask on line 7 7 1 MR8 Event Mask on line 8 8 1 MR9 Event Mask on line 9 9 1 MR10 Event Mask on line 10 10 1 MR11 Event Mask on line 11 11 1 MR12 Event Mask on line 12 12 1 MR13 Event Mask on line 13 13 1 MR14 Event Mask on line 14 14 1 MR15 Event Mask on line 15 15 1 MR16 Event Mask on line 16 16 1 MR17 Event Mask on line 17 17 1 MR18 Event Mask on line 18 18 1 MR19 Event Mask on line 19 19 1 MR20 Event Mask on line 20 20 1 MR21 Event Mask on line 21 21 1 MR22 Event Mask on line 22 22 1 MR23 Event Mask on line 23 23 1 MR24 Event Mask on line 24 24 1 MR25 Event Mask on line 25 25 1 MR26 Event Mask on line 26 26 1 MR27 Event Mask on line 27 27 1 MR28 Event Mask on line 28 28 1 RTSR RTSR Rising Trigger selection register (EXTI_RTSR) 0x8 0x20 read-write 0x00000000 TR0 Rising trigger event configuration of line 0 0 1 TR1 Rising trigger event configuration of line 1 1 1 TR2 Rising trigger event configuration of line 2 2 1 TR3 Rising trigger event configuration of line 3 3 1 TR4 Rising trigger event configuration of line 4 4 1 TR5 Rising trigger event configuration of line 5 5 1 TR6 Rising trigger event configuration of line 6 6 1 TR7 Rising trigger event configuration of line 7 7 1 TR8 Rising trigger event configuration of line 8 8 1 TR9 Rising trigger event configuration of line 9 9 1 TR10 Rising trigger event configuration of line 10 10 1 TR11 Rising trigger event configuration of line 11 11 1 TR12 Rising trigger event configuration of line 12 12 1 TR13 Rising trigger event configuration of line 13 13 1 TR14 Rising trigger event configuration of line 14 14 1 TR15 Rising trigger event configuration of line 15 15 1 TR16 Rising trigger event configuration of line 16 16 1 TR17 Rising trigger event configuration of line 17 17 1 TR18 Rising trigger event configuration of line 18 18 1 TR19 Rising trigger event configuration of line 19 19 1 TR20 Rising trigger event configuration of line 20 20 1 TR21 Rising trigger event configuration of line 21 21 1 TR22 Rising trigger event configuration of line 22 22 1 FTSR FTSR Falling Trigger selection register (EXTI_FTSR) 0xC 0x20 read-write 0x00000000 TR0 Falling trigger event configuration of line 0 0 1 TR1 Falling trigger event configuration of line 1 1 1 TR2 Falling trigger event configuration of line 2 2 1 TR3 Falling trigger event configuration of line 3 3 1 TR4 Falling trigger event configuration of line 4 4 1 TR5 Falling trigger event configuration of line 5 5 1 TR6 Falling trigger event configuration of line 6 6 1 TR7 Falling trigger event configuration of line 7 7 1 TR8 Falling trigger event configuration of line 8 8 1 TR9 Falling trigger event configuration of line 9 9 1 TR10 Falling trigger event configuration of line 10 10 1 TR11 Falling trigger event configuration of line 11 11 1 TR12 Falling trigger event configuration of line 12 12 1 TR13 Falling trigger event configuration of line 13 13 1 TR14 Falling trigger event configuration of line 14 14 1 TR15 Falling trigger event configuration of line 15 15 1 TR16 Falling trigger event configuration of line 16 16 1 TR17 Falling trigger event configuration of line 17 17 1 TR18 Rising trigger event configuration of line 18 18 1 TR19 Rising trigger event configuration of line 19 19 1 TR20 Rising trigger event configuration of line 20 20 1 TR21 Rising trigger event configuration of line 21 21 1 TR22 Rising trigger event configuration of line 22 22 1 SWIER SWIER Software interrupt event register (EXTI_SWIER) 0x10 0x20 read-write 0x00000000 SWIER0 Software Interrupt on line 0 0 1 SWIER1 Software Interrupt on line 1 1 1 SWIER2 Software Interrupt on line 2 2 1 SWIER3 Software Interrupt on line 3 3 1 SWIER4 Software Interrupt on line 4 4 1 SWIER5 Software Interrupt on line 5 5 1 SWIER6 Software Interrupt on line 6 6 1 SWIER7 Software Interrupt on line 7 7 1 SWIER8 Software Interrupt on line 8 8 1 SWIER9 Software Interrupt on line 9 9 1 SWIER10 Software Interrupt on line 10 10 1 SWIER11 Software Interrupt on line 11 11 1 SWIER12 Software Interrupt on line 12 12 1 SWIER13 Software Interrupt on line 13 13 1 SWIER14 Software Interrupt on line 14 14 1 SWIER15 Software Interrupt on line 15 15 1 SWIER16 Software Interrupt on line 16 16 1 SWIER17 Software Interrupt on line 17 17 1 SWIER18 Software Interrupt on line 18 18 1 SWIER19 Software Interrupt on line 19 19 1 SWIER20 Software Interrupt on line 20 20 1 SWIER21 Software Interrupt on line 21 21 1 SWIER22 Software Interrupt on line 22 22 1 PR PR Pending register (EXTI_PR) 0x14 0x20 read-write 0x00000000 PR0 Pending bit 0 0 1 PR1 Pending bit 1 1 1 PR2 Pending bit 2 2 1 PR3 Pending bit 3 3 1 PR4 Pending bit 4 4 1 PR5 Pending bit 5 5 1 PR6 Pending bit 6 6 1 PR7 Pending bit 7 7 1 PR8 Pending bit 8 8 1 PR9 Pending bit 9 9 1 PR10 Pending bit 10 10 1 PR11 Pending bit 11 11 1 PR12 Pending bit 12 12 1 PR13 Pending bit 13 13 1 PR14 Pending bit 14 14 1 PR15 Pending bit 15 15 1 PR16 Pending bit 16 16 1 PR17 Pending bit 17 17 1 PR18 Pending bit 18 18 1 PR19 Pending bit 19 19 1 PR20 Pending bit 20 20 1 PR21 Pending bit 21 21 1 PR22 Pending bit 22 22 1 CEC HDMI-CEC controller CEC 0x40007800 0x0 0x400 registers CEC CEC interrupt 42 CR CR control register 0x0 0x20 read-write 0x00000000 TXEOM Tx End Of Message 2 1 TXSOM Tx start of message 1 1 CECEN CEC Enable 0 1 CFGR CFGR configuration register 0x4 0x20 read-write 0x00000000 LBPEGEN Generate Error-Bit on Long Bit Period Error 11 1 BREGEN Generate error-bit on bit rising error 10 1 BRESTP Rx-stop on bit rising error 9 1 RXTOL Rx-Tolerance 8 1 SFT Signal Free Time 5 3 LSTN Listen mode 4 1 OAR Own Address 0 4 TXDR TXDR Tx data register 0x8 0x20 write-only 0x00000000 TXD Tx Data register 0 8 RXDR RXDR Rx Data Register 0xC 0x20 read-only 0x00000000 RXDR CEC Rx Data Register 0 8 ISR ISR Interrupt and Status Register 0x10 0x20 read-write 0x00000000 TXACKE Tx-Missing acknowledge error 12 1 TXERR Tx-Error 11 1 TXUDR Tx-Buffer Underrun 10 1 TXEND End of Transmission 9 1 TXBR Tx-Byte Request 8 1 ARBLST Arbitration Lost 7 1 RXACKE Rx-Missing Acknowledge 6 1 LBPE Rx-Long Bit Period Error 5 1 SBPE Rx-Short Bit period error 4 1 BRE Rx-Bit rising error 3 1 RXOVR Rx-Overrun 2 1 RXEND End Of Reception 1 1 RXBR Rx-Byte Received 0 1 IER IER interrupt enable register 0x14 0x20 read-write 0x00000000 TXACKIE Tx-Missing Acknowledge Error Interrupt Enable 12 1 TXERRIE Tx-Error Interrupt Enable 11 1 TXUDRIE Tx-Underrun interrupt enable 10 1 TXENDIE Tx-End of message interrupt enable 9 1 TXBRIE Tx-Byte Request Interrupt Enable 8 1 ARBLSTIE Arbitration Lost Interrupt Enable 7 1 RXACKIE Rx-Missing Acknowledge Error Interrupt Enable 6 1 LBPEIE Long Bit Period Error Interrupt Enable 5 1 SBPEIE Short Bit Period Error Interrupt Enable 4 1 BREIE Bit Rising Error Interrupt Enable 3 1 RXOVRIE Rx-Buffer Overrun Interrupt Enable 2 1 RXENDIE End Of Reception Interrupt Enable 1 1 RXBRIE Rx-Byte Received Interrupt Enable 0 1 PWR Power control PWR 0x40007000 0x0 0x400 registers CR CR power control register 0x0 0x20 read-write 0x00000000 LPDS Low-power deep sleep 0 1 PDDS Power down deepsleep 1 1 CWUF Clear wakeup flag 2 1 CSBF Clear standby flag 3 1 PVDE Power voltage detector enable 4 1 PLS PVD level selection 5 3 DBP Disable backup domain write protection 8 1 ENSD1 ENable SD1 ADC 9 1 ENSD2 ENable SD2 ADC 10 1 ENSD3 ENable SD3 ADC 11 1 CSR CSR power control/status register 0x4 0x20 0x00000000 WUF Wakeup flag 0 1 read-only SBF Standby flag 1 1 read-only PVDO PVD output 2 1 read-only EWUP1 Enable WKUP1 pin 8 1 read-write EWUP2 Enable WKUP2 pin 9 1 read-write EWUP3 Enable WKUP3 pin 10 1 read-write CAN Controller area network CAN 0x40006400 0x0 0x400 registers CAN_TX USB high priority/CAN_TX interrupt 19 CAN_RXD USB low priority/CAN_RXD interrupt 20 CAN_RXI CAN_RXI interrupt 21 CAN_SCE CAN_SCE interrupt 22 COMP1_2 Comparator 1/comparator 2 global 64 MCR MCR master control register 0x0 0x20 read-write 0x00010002 DBF DBF 16 1 RESET RESET 15 1 TTCM TTCM 7 1 ABOM ABOM 6 1 AWUM AWUM 5 1 NART NART 4 1 RFLM RFLM 3 1 TXFP TXFP 2 1 SLEEP SLEEP 1 1 INRQ INRQ 0 1 MSR MSR master status register 0x4 0x20 0x00000C02 RX RX 11 1 read-only SAMP SAMP 10 1 read-only RXM RXM 9 1 read-only TXM TXM 8 1 read-only SLAKI SLAKI 4 1 read-write WKUI WKUI 3 1 read-write ERRI ERRI 2 1 read-write SLAK SLAK 1 1 read-only INAK INAK 0 1 read-only TSR TSR transmit status register 0x8 0x20 0x1C000000 LOW2 Lowest priority flag for mailbox 2 31 1 read-only LOW1 Lowest priority flag for mailbox 1 30 1 read-only LOW0 Lowest priority flag for mailbox 0 29 1 read-only TME2 Lowest priority flag for mailbox 2 28 1 read-only TME1 Lowest priority flag for mailbox 1 27 1 read-only TME0 Lowest priority flag for mailbox 0 26 1 read-only CODE CODE 24 2 read-only ABRQ2 ABRQ2 23 1 read-write TERR2 TERR2 19 1 read-write ALST2 ALST2 18 1 read-write TXOK2 TXOK2 17 1 read-write RQCP2 RQCP2 16 1 read-write ABRQ1 ABRQ1 15 1 read-write TERR1 TERR1 11 1 read-write ALST1 ALST1 10 1 read-write TXOK1 TXOK1 9 1 read-write RQCP1 RQCP1 8 1 read-write ABRQ0 ABRQ0 7 1 read-write TERR0 TERR0 3 1 read-write ALST0 ALST0 2 1 read-write TXOK0 TXOK0 1 1 read-write RQCP0 RQCP0 0 1 read-write RF0R RF0R receive FIFO 0 register 0xC 0x20 0x00000000 RFOM0 RFOM0 5 1 read-write FOVR0 FOVR0 4 1 read-write FULL0 FULL0 3 1 read-write FMP0 FMP0 0 2 read-only RF1R RF1R receive FIFO 1 register 0x10 0x20 0x00000000 RFOM1 RFOM1 5 1 read-write FOVR1 FOVR1 4 1 read-write FULL1 FULL1 3 1 read-write FMP1 FMP1 0 2 read-only IER IER interrupt enable register 0x14 0x20 read-write 0x00000000 SLKIE SLKIE 17 1 WKUIE WKUIE 16 1 ERRIE ERRIE 15 1 LECIE LECIE 11 1 BOFIE BOFIE 10 1 EPVIE EPVIE 9 1 EWGIE EWGIE 8 1 FOVIE1 FOVIE1 6 1 FFIE1 FFIE1 5 1 FMPIE1 FMPIE1 4 1 FOVIE0 FOVIE0 3 1 FFIE0 FFIE0 2 1 FMPIE0 FMPIE0 1 1 TMEIE TMEIE 0 1 ESR ESR error status register 0x18 0x20 0x00000000 REC REC 24 8 read-only TEC TEC 16 8 read-only LEC LEC 4 3 read-write BOFF BOFF 2 1 read-only EPVF EPVF 1 1 read-only EWGF EWGF 0 1 read-only BTR BTR bit timing register 0x1C 0x20 read-write 0x01230000 SILM SILM 31 1 LBKM LBKM 30 1 SJW SJW 24 2 TS2 TS2 20 3 TS1 TS1 16 4 BRP BRP 0 10 TI0R TI0R TX mailbox identifier register 0x180 0x20 read-write 0x00000000 STID STID 21 11 EXID EXID 3 18 IDE IDE 2 1 RTR RTR 1 1 TXRQ TXRQ 0 1 TDT0R TDT0R mailbox data length control and time stamp register 0x184 0x20 read-write 0x00000000 TIME TIME 16 16 TGT TGT 8 1 DLC DLC 0 4 TDL0R TDL0R mailbox data low register 0x188 0x20 read-write 0x00000000 DATA3 DATA3 24 8 DATA2 DATA2 16 8 DATA1 DATA1 8 8 DATA0 DATA0 0 8 TDH0R TDH0R mailbox data high register 0x18C 0x20 read-write 0x00000000 DATA7 DATA7 24 8 DATA6 DATA6 16 8 DATA5 DATA5 8 8 DATA4 DATA4 0 8 TI1R TI1R TX mailbox identifier register 0x190 0x20 read-write 0x00000000 STID STID 21 11 EXID EXID 3 18 IDE IDE 2 1 RTR RTR 1 1 TXRQ TXRQ 0 1 TDT1R TDT1R mailbox data length control and time stamp register 0x194 0x20 read-write 0x00000000 TIME TIME 16 16 TGT TGT 8 1 DLC DLC 0 4 TDL1R TDL1R mailbox data low register 0x198 0x20 read-write 0x00000000 DATA3 DATA3 24 8 DATA2 DATA2 16 8 DATA1 DATA1 8 8 DATA0 DATA0 0 8 TDH1R TDH1R mailbox data high register 0x19C 0x20 read-write 0x00000000 DATA7 DATA7 24 8 DATA6 DATA6 16 8 DATA5 DATA5 8 8 DATA4 DATA4 0 8 TI2R TI2R TX mailbox identifier register 0x1A0 0x20 read-write 0x00000000 STID STID 21 11 EXID EXID 3 18 IDE IDE 2 1 RTR RTR 1 1 TXRQ TXRQ 0 1 TDT2R TDT2R mailbox data length control and time stamp register 0x1A4 0x20 read-write 0x00000000 TIME TIME 16 16 TGT TGT 8 1 DLC DLC 0 4 TDL2R TDL2R mailbox data low register 0x1A8 0x20 read-write 0x00000000 DATA3 DATA3 24 8 DATA2 DATA2 16 8 DATA1 DATA1 8 8 DATA0 DATA0 0 8 TDH2R TDH2R mailbox data high register 0x1AC 0x20 read-write 0x00000000 DATA7 DATA7 24 8 DATA6 DATA6 16 8 DATA5 DATA5 8 8 DATA4 DATA4 0 8 RI0R RI0R receive FIFO mailbox identifier register 0x1B0 0x20 read-only 0x00000000 STID STID 21 11 EXID EXID 3 18 IDE IDE 2 1 RTR RTR 1 1 RDT0R RDT0R receive FIFO mailbox data length control and time stamp register 0x1B4 0x20 read-only 0x00000000 TIME TIME 16 16 FMI FMI 8 8 DLC DLC 0 4 RDL0R RDL0R receive FIFO mailbox data low register 0x1B8 0x20 read-only 0x00000000 DATA3 DATA3 24 8 DATA2 DATA2 16 8 DATA1 DATA1 8 8 DATA0 DATA0 0 8 RDH0R RDH0R receive FIFO mailbox data high register 0x1BC 0x20 read-only 0x00000000 DATA7 DATA7 24 8 DATA6 DATA6 16 8 DATA5 DATA5 8 8 DATA4 DATA4 0 8 RI1R RI1R receive FIFO mailbox identifier register 0x1C0 0x20 read-only 0x00000000 STID STID 21 11 EXID EXID 3 18 IDE IDE 2 1 RTR RTR 1 1 RDT1R RDT1R receive FIFO mailbox data length control and time stamp register 0x1C4 0x20 read-only 0x00000000 TIME TIME 16 16 FMI FMI 8 8 DLC DLC 0 4 RDL1R RDL1R receive FIFO mailbox data low register 0x1C8 0x20 read-only 0x00000000 DATA3 DATA3 24 8 DATA2 DATA2 16 8 DATA1 DATA1 8 8 DATA0 DATA0 0 8 RDH1R RDH1R receive FIFO mailbox data high register 0x1CC 0x20 read-only 0x00000000 DATA7 DATA7 24 8 DATA6 DATA6 16 8 DATA5 DATA5 8 8 DATA4 DATA4 0 8 FMR FMR filter master register 0x200 0x20 read-write 0x2A1C0E01 CAN2SB CAN2SB 8 6 FINIT FINIT 0 1 FM1R FM1R filter mode register 0x204 0x20 read-write 0x00000000 FBM0 Filter mode 0 1 FBM1 Filter mode 1 1 FBM2 Filter mode 2 1 FBM3 Filter mode 3 1 FBM4 Filter mode 4 1 FBM5 Filter mode 5 1 FBM6 Filter mode 6 1 FBM7 Filter mode 7 1 FBM8 Filter mode 8 1 FBM9 Filter mode 9 1 FBM10 Filter mode 10 1 FBM11 Filter mode 11 1 FBM12 Filter mode 12 1 FBM13 Filter mode 13 1 FBM14 Filter mode 14 1 FBM15 Filter mode 15 1 FBM16 Filter mode 16 1 FBM17 Filter mode 17 1 FBM18 Filter mode 18 1 FBM19 Filter mode 19 1 FBM20 Filter mode 20 1 FBM21 Filter mode 21 1 FBM22 Filter mode 22 1 FBM23 Filter mode 23 1 FBM24 Filter mode 24 1 FBM25 Filter mode 25 1 FBM26 Filter mode 26 1 FBM27 Filter mode 27 1 FS1R FS1R filter scale register 0x20C 0x20 read-write 0x00000000 FSC0 Filter scale configuration 0 1 FSC1 Filter scale configuration 1 1 FSC2 Filter scale configuration 2 1 FSC3 Filter scale configuration 3 1 FSC4 Filter scale configuration 4 1 FSC5 Filter scale configuration 5 1 FSC6 Filter scale configuration 6 1 FSC7 Filter scale configuration 7 1 FSC8 Filter scale configuration 8 1 FSC9 Filter scale configuration 9 1 FSC10 Filter scale configuration 10 1 FSC11 Filter scale configuration 11 1 FSC12 Filter scale configuration 12 1 FSC13 Filter scale configuration 13 1 FSC14 Filter scale configuration 14 1 FSC15 Filter scale configuration 15 1 FSC16 Filter scale configuration 16 1 FSC17 Filter scale configuration 17 1 FSC18 Filter scale configuration 18 1 FSC19 Filter scale configuration 19 1 FSC20 Filter scale configuration 20 1 FSC21 Filter scale configuration 21 1 FSC22 Filter scale configuration 22 1 FSC23 Filter scale configuration 23 1 FSC24 Filter scale configuration 24 1 FSC25 Filter scale configuration 25 1 FSC26 Filter scale configuration 26 1 FSC27 Filter scale configuration 27 1 FFA1R FFA1R filter FIFO assignment register 0x214 0x20 read-write 0x00000000 FFA0 Filter FIFO assignment for filter 0 0 1 FFA1 Filter FIFO assignment for filter 1 1 1 FFA2 Filter FIFO assignment for filter 2 2 1 FFA3 Filter FIFO assignment for filter 3 3 1 FFA4 Filter FIFO assignment for filter 4 4 1 FFA5 Filter FIFO assignment for filter 5 5 1 FFA6 Filter FIFO assignment for filter 6 6 1 FFA7 Filter FIFO assignment for filter 7 7 1 FFA8 Filter FIFO assignment for filter 8 8 1 FFA9 Filter FIFO assignment for filter 9 9 1 FFA10 Filter FIFO assignment for filter 10 10 1 FFA11 Filter FIFO assignment for filter 11 11 1 FFA12 Filter FIFO assignment for filter 12 12 1 FFA13 Filter FIFO assignment for filter 13 13 1 FFA14 Filter FIFO assignment for filter 14 14 1 FFA15 Filter FIFO assignment for filter 15 15 1 FFA16 Filter FIFO assignment for filter 16 16 1 FFA17 Filter FIFO assignment for filter 17 17 1 FFA18 Filter FIFO assignment for filter 18 18 1 FFA19 Filter FIFO assignment for filter 19 19 1 FFA20 Filter FIFO assignment for filter 20 20 1 FFA21 Filter FIFO assignment for filter 21 21 1 FFA22 Filter FIFO assignment for filter 22 22 1 FFA23 Filter FIFO assignment for filter 23 23 1 FFA24 Filter FIFO assignment for filter 24 24 1 FFA25 Filter FIFO assignment for filter 25 25 1 FFA26 Filter FIFO assignment for filter 26 26 1 FFA27 Filter FIFO assignment for filter 27 27 1 FA1R FA1R CAN filter activation register 0x21C 0x20 read-write 0x00000000 FACT0 Filter active 0 1 FACT1 Filter active 1 1 FACT2 Filter active 2 1 FACT3 Filter active 3 1 FACT4 Filter active 4 1 FACT5 Filter active 5 1 FACT6 Filter active 6 1 FACT7 Filter active 7 1 FACT8 Filter active 8 1 FACT9 Filter active 9 1 FACT10 Filter active 10 1 FACT11 Filter active 11 1 FACT12 Filter active 12 1 FACT13 Filter active 13 1 FACT14 Filter active 14 1 FACT15 Filter active 15 1 FACT16 Filter active 16 1 FACT17 Filter active 17 1 FACT18 Filter active 18 1 FACT19 Filter active 19 1 FACT20 Filter active 20 1 FACT21 Filter active 21 1 FACT22 Filter active 22 1 FACT23 Filter active 23 1 FACT24 Filter active 24 1 FACT25 Filter active 25 1 FACT26 Filter active 26 1 FACT27 Filter active 27 1 F0R1 F0R1 Filter bank 0 register 1 0x240 0x20 read-write 0x00000000 FB0 Filter bits 0 1 FB1 Filter bits 1 1 FB2 Filter bits 2 1 FB3 Filter bits 3 1 FB4 Filter bits 4 1 FB5 Filter bits 5 1 FB6 Filter bits 6 1 FB7 Filter bits 7 1 FB8 Filter bits 8 1 FB9 Filter bits 9 1 FB10 Filter bits 10 1 FB11 Filter bits 11 1 FB12 Filter bits 12 1 FB13 Filter bits 13 1 FB14 Filter bits 14 1 FB15 Filter bits 15 1 FB16 Filter bits 16 1 FB17 Filter bits 17 1 FB18 Filter bits 18 1 FB19 Filter bits 19 1 FB20 Filter bits 20 1 FB21 Filter bits 21 1 FB22 Filter bits 22 1 FB23 Filter bits 23 1 FB24 Filter bits 24 1 FB25 Filter bits 25 1 FB26 Filter bits 26 1 FB27 Filter bits 27 1 FB28 Filter bits 28 1 FB29 Filter bits 29 1 FB30 Filter bits 30 1 FB31 Filter bits 31 1 F0R2 F0R2 Filter bank 0 register 2 0x244 0x20 read-write 0x00000000 FB0 Filter bits 0 1 FB1 Filter bits 1 1 FB2 Filter bits 2 1 FB3 Filter bits 3 1 FB4 Filter bits 4 1 FB5 Filter bits 5 1 FB6 Filter bits 6 1 FB7 Filter bits 7 1 FB8 Filter bits 8 1 FB9 Filter bits 9 1 FB10 Filter bits 10 1 FB11 Filter bits 11 1 FB12 Filter bits 12 1 FB13 Filter bits 13 1 FB14 Filter bits 14 1 FB15 Filter bits 15 1 FB16 Filter bits 16 1 FB17 Filter bits 17 1 FB18 Filter bits 18 1 FB19 Filter bits 19 1 FB20 Filter bits 20 1 FB21 Filter bits 21 1 FB22 Filter bits 22 1 FB23 Filter bits 23 1 FB24 Filter bits 24 1 FB25 Filter bits 25 1 FB26 Filter bits 26 1 FB27 Filter bits 27 1 FB28 Filter bits 28 1 FB29 Filter bits 29 1 FB30 Filter bits 30 1 FB31 Filter bits 31 1 F1R1 F1R1 Filter bank 1 register 1 0x248 0x20 read-write 0x00000000 FB0 Filter bits 0 1 FB1 Filter bits 1 1 FB2 Filter bits 2 1 FB3 Filter bits 3 1 FB4 Filter bits 4 1 FB5 Filter bits 5 1 FB6 Filter bits 6 1 FB7 Filter bits 7 1 FB8 Filter bits 8 1 FB9 Filter bits 9 1 FB10 Filter bits 10 1 FB11 Filter bits 11 1 FB12 Filter bits 12 1 FB13 Filter bits 13 1 FB14 Filter bits 14 1 FB15 Filter bits 15 1 FB16 Filter bits 16 1 FB17 Filter bits 17 1 FB18 Filter bits 18 1 FB19 Filter bits 19 1 FB20 Filter bits 20 1 FB21 Filter bits 21 1 FB22 Filter bits 22 1 FB23 Filter bits 23 1 FB24 Filter bits 24 1 FB25 Filter bits 25 1 FB26 Filter bits 26 1 FB27 Filter bits 27 1 FB28 Filter bits 28 1 FB29 Filter bits 29 1 FB30 Filter bits 30 1 FB31 Filter bits 31 1 F1R2 F1R2 Filter bank 1 register 2 0x24C 0x20 read-write 0x00000000 FB0 Filter bits 0 1 FB1 Filter bits 1 1 FB2 Filter bits 2 1 FB3 Filter bits 3 1 FB4 Filter bits 4 1 FB5 Filter bits 5 1 FB6 Filter bits 6 1 FB7 Filter bits 7 1 FB8 Filter bits 8 1 FB9 Filter bits 9 1 FB10 Filter bits 10 1 FB11 Filter bits 11 1 FB12 Filter bits 12 1 FB13 Filter bits 13 1 FB14 Filter bits 14 1 FB15 Filter bits 15 1 FB16 Filter bits 16 1 FB17 Filter bits 17 1 FB18 Filter bits 18 1 FB19 Filter bits 19 1 FB20 Filter bits 20 1 FB21 Filter bits 21 1 FB22 Filter bits 22 1 FB23 Filter bits 23 1 FB24 Filter bits 24 1 FB25 Filter bits 25 1 FB26 Filter bits 26 1 FB27 Filter bits 27 1 FB28 Filter bits 28 1 FB29 Filter bits 29 1 FB30 Filter bits 30 1 FB31 Filter bits 31 1 F2R1 F2R1 Filter bank 2 register 1 0x250 0x20 read-write 0x00000000 FB0 Filter bits 0 1 FB1 Filter bits 1 1 FB2 Filter bits 2 1 FB3 Filter bits 3 1 FB4 Filter bits 4 1 FB5 Filter bits 5 1 FB6 Filter bits 6 1 FB7 Filter bits 7 1 FB8 Filter bits 8 1 FB9 Filter bits 9 1 FB10 Filter bits 10 1 FB11 Filter bits 11 1 FB12 Filter bits 12 1 FB13 Filter bits 13 1 FB14 Filter bits 14 1 FB15 Filter bits 15 1 FB16 Filter bits 16 1 FB17 Filter bits 17 1 FB18 Filter bits 18 1 FB19 Filter bits 19 1 FB20 Filter bits 20 1 FB21 Filter bits 21 1 FB22 Filter bits 22 1 FB23 Filter bits 23 1 FB24 Filter bits 24 1 FB25 Filter bits 25 1 FB26 Filter bits 26 1 FB27 Filter bits 27 1 FB28 Filter bits 28 1 FB29 Filter bits 29 1 FB30 Filter bits 30 1 FB31 Filter bits 31 1 F2R2 F2R2 Filter bank 2 register 2 0x254 0x20 read-write 0x00000000 FB0 Filter bits 0 1 FB1 Filter bits 1 1 FB2 Filter bits 2 1 FB3 Filter bits 3 1 FB4 Filter bits 4 1 FB5 Filter bits 5 1 FB6 Filter bits 6 1 FB7 Filter bits 7 1 FB8 Filter bits 8 1 FB9 Filter bits 9 1 FB10 Filter bits 10 1 FB11 Filter bits 11 1 FB12 Filter bits 12 1 FB13 Filter bits 13 1 FB14 Filter bits 14 1 FB15 Filter bits 15 1 FB16 Filter bits 16 1 FB17 Filter bits 17 1 FB18 Filter bits 18 1 FB19 Filter bits 19 1 FB20 Filter bits 20 1 FB21 Filter bits 21 1 FB22 Filter bits 22 1 FB23 Filter bits 23 1 FB24 Filter bits 24 1 FB25 Filter bits 25 1 FB26 Filter bits 26 1 FB27 Filter bits 27 1 FB28 Filter bits 28 1 FB29 Filter bits 29 1 FB30 Filter bits 30 1 FB31 Filter bits 31 1 F3R1 F3R1 Filter bank 3 register 1 0x258 0x20 read-write 0x00000000 FB0 Filter bits 0 1 FB1 Filter bits 1 1 FB2 Filter bits 2 1 FB3 Filter bits 3 1 FB4 Filter bits 4 1 FB5 Filter bits 5 1 FB6 Filter bits 6 1 FB7 Filter bits 7 1 FB8 Filter bits 8 1 FB9 Filter bits 9 1 FB10 Filter bits 10 1 FB11 Filter bits 11 1 FB12 Filter bits 12 1 FB13 Filter bits 13 1 FB14 Filter bits 14 1 FB15 Filter bits 15 1 FB16 Filter bits 16 1 FB17 Filter bits 17 1 FB18 Filter bits 18 1 FB19 Filter bits 19 1 FB20 Filter bits 20 1 FB21 Filter bits 21 1 FB22 Filter bits 22 1 FB23 Filter bits 23 1 FB24 Filter bits 24 1 FB25 Filter bits 25 1 FB26 Filter bits 26 1 FB27 Filter bits 27 1 FB28 Filter bits 28 1 FB29 Filter bits 29 1 FB30 Filter bits 30 1 FB31 Filter bits 31 1 F3R2 F3R2 Filter bank 3 register 2 0x25C 0x20 read-write 0x00000000 FB0 Filter bits 0 1 FB1 Filter bits 1 1 FB2 Filter bits 2 1 FB3 Filter bits 3 1 FB4 Filter bits 4 1 FB5 Filter bits 5 1 FB6 Filter bits 6 1 FB7 Filter bits 7 1 FB8 Filter bits 8 1 FB9 Filter bits 9 1 FB10 Filter bits 10 1 FB11 Filter bits 11 1 FB12 Filter bits 12 1 FB13 Filter bits 13 1 FB14 Filter bits 14 1 FB15 Filter bits 15 1 FB16 Filter bits 16 1 FB17 Filter bits 17 1 FB18 Filter bits 18 1 FB19 Filter bits 19 1 FB20 Filter bits 20 1 FB21 Filter bits 21 1 FB22 Filter bits 22 1 FB23 Filter bits 23 1 FB24 Filter bits 24 1 FB25 Filter bits 25 1 FB26 Filter bits 26 1 FB27 Filter bits 27 1 FB28 Filter bits 28 1 FB29 Filter bits 29 1 FB30 Filter bits 30 1 FB31 Filter bits 31 1 F4R1 F4R1 Filter bank 4 register 1 0x260 0x20 read-write 0x00000000 FB0 Filter bits 0 1 FB1 Filter bits 1 1 FB2 Filter bits 2 1 FB3 Filter bits 3 1 FB4 Filter bits 4 1 FB5 Filter bits 5 1 FB6 Filter bits 6 1 FB7 Filter bits 7 1 FB8 Filter bits 8 1 FB9 Filter bits 9 1 FB10 Filter bits 10 1 FB11 Filter bits 11 1 FB12 Filter bits 12 1 FB13 Filter bits 13 1 FB14 Filter bits 14 1 FB15 Filter bits 15 1 FB16 Filter bits 16 1 FB17 Filter bits 17 1 FB18 Filter bits 18 1 FB19 Filter bits 19 1 FB20 Filter bits 20 1 FB21 Filter bits 21 1 FB22 Filter bits 22 1 FB23 Filter bits 23 1 FB24 Filter bits 24 1 FB25 Filter bits 25 1 FB26 Filter bits 26 1 FB27 Filter bits 27 1 FB28 Filter bits 28 1 FB29 Filter bits 29 1 FB30 Filter bits 30 1 FB31 Filter bits 31 1 F4R2 F4R2 Filter bank 4 register 2 0x264 0x20 read-write 0x00000000 FB0 Filter bits 0 1 FB1 Filter bits 1 1 FB2 Filter bits 2 1 FB3 Filter bits 3 1 FB4 Filter bits 4 1 FB5 Filter bits 5 1 FB6 Filter bits 6 1 FB7 Filter bits 7 1 FB8 Filter bits 8 1 FB9 Filter bits 9 1 FB10 Filter bits 10 1 FB11 Filter bits 11 1 FB12 Filter bits 12 1 FB13 Filter bits 13 1 FB14 Filter bits 14 1 FB15 Filter bits 15 1 FB16 Filter bits 16 1 FB17 Filter bits 17 1 FB18 Filter bits 18 1 FB19 Filter bits 19 1 FB20 Filter bits 20 1 FB21 Filter bits 21 1 FB22 Filter bits 22 1 FB23 Filter bits 23 1 FB24 Filter bits 24 1 FB25 Filter bits 25 1 FB26 Filter bits 26 1 FB27 Filter bits 27 1 FB28 Filter bits 28 1 FB29 Filter bits 29 1 FB30 Filter bits 30 1 FB31 Filter bits 31 1 F5R1 F5R1 Filter bank 5 register 1 0x268 0x20 read-write 0x00000000 FB0 Filter bits 0 1 FB1 Filter bits 1 1 FB2 Filter bits 2 1 FB3 Filter bits 3 1 FB4 Filter bits 4 1 FB5 Filter bits 5 1 FB6 Filter bits 6 1 FB7 Filter bits 7 1 FB8 Filter bits 8 1 FB9 Filter bits 9 1 FB10 Filter bits 10 1 FB11 Filter bits 11 1 FB12 Filter bits 12 1 FB13 Filter bits 13 1 FB14 Filter bits 14 1 FB15 Filter bits 15 1 FB16 Filter bits 16 1 FB17 Filter bits 17 1 FB18 Filter bits 18 1 FB19 Filter bits 19 1 FB20 Filter bits 20 1 FB21 Filter bits 21 1 FB22 Filter bits 22 1 FB23 Filter bits 23 1 FB24 Filter bits 24 1 FB25 Filter bits 25 1 FB26 Filter bits 26 1 FB27 Filter bits 27 1 FB28 Filter bits 28 1 FB29 Filter bits 29 1 FB30 Filter bits 30 1 FB31 Filter bits 31 1 F5R2 F5R2 Filter bank 5 register 2 0x26C 0x20 read-write 0x00000000 FB0 Filter bits 0 1 FB1 Filter bits 1 1 FB2 Filter bits 2 1 FB3 Filter bits 3 1 FB4 Filter bits 4 1 FB5 Filter bits 5 1 FB6 Filter bits 6 1 FB7 Filter bits 7 1 FB8 Filter bits 8 1 FB9 Filter bits 9 1 FB10 Filter bits 10 1 FB11 Filter bits 11 1 FB12 Filter bits 12 1 FB13 Filter bits 13 1 FB14 Filter bits 14 1 FB15 Filter bits 15 1 FB16 Filter bits 16 1 FB17 Filter bits 17 1 FB18 Filter bits 18 1 FB19 Filter bits 19 1 FB20 Filter bits 20 1 FB21 Filter bits 21 1 FB22 Filter bits 22 1 FB23 Filter bits 23 1 FB24 Filter bits 24 1 FB25 Filter bits 25 1 FB26 Filter bits 26 1 FB27 Filter bits 27 1 FB28 Filter bits 28 1 FB29 Filter bits 29 1 FB30 Filter bits 30 1 FB31 Filter bits 31 1 F6R1 F6R1 Filter bank 6 register 1 0x270 0x20 read-write 0x00000000 FB0 Filter bits 0 1 FB1 Filter bits 1 1 FB2 Filter bits 2 1 FB3 Filter bits 3 1 FB4 Filter bits 4 1 FB5 Filter bits 5 1 FB6 Filter bits 6 1 FB7 Filter bits 7 1 FB8 Filter bits 8 1 FB9 Filter bits 9 1 FB10 Filter bits 10 1 FB11 Filter bits 11 1 FB12 Filter bits 12 1 FB13 Filter bits 13 1 FB14 Filter bits 14 1 FB15 Filter bits 15 1 FB16 Filter bits 16 1 FB17 Filter bits 17 1 FB18 Filter bits 18 1 FB19 Filter bits 19 1 FB20 Filter bits 20 1 FB21 Filter bits 21 1 FB22 Filter bits 22 1 FB23 Filter bits 23 1 FB24 Filter bits 24 1 FB25 Filter bits 25 1 FB26 Filter bits 26 1 FB27 Filter bits 27 1 FB28 Filter bits 28 1 FB29 Filter bits 29 1 FB30 Filter bits 30 1 FB31 Filter bits 31 1 F6R2 F6R2 Filter bank 6 register 2 0x274 0x20 read-write 0x00000000 FB0 Filter bits 0 1 FB1 Filter bits 1 1 FB2 Filter bits 2 1 FB3 Filter bits 3 1 FB4 Filter bits 4 1 FB5 Filter bits 5 1 FB6 Filter bits 6 1 FB7 Filter bits 7 1 FB8 Filter bits 8 1 FB9 Filter bits 9 1 FB10 Filter bits 10 1 FB11 Filter bits 11 1 FB12 Filter bits 12 1 FB13 Filter bits 13 1 FB14 Filter bits 14 1 FB15 Filter bits 15 1 FB16 Filter bits 16 1 FB17 Filter bits 17 1 FB18 Filter bits 18 1 FB19 Filter bits 19 1 FB20 Filter bits 20 1 FB21 Filter bits 21 1 FB22 Filter bits 22 1 FB23 Filter bits 23 1 FB24 Filter bits 24 1 FB25 Filter bits 25 1 FB26 Filter bits 26 1 FB27 Filter bits 27 1 FB28 Filter bits 28 1 FB29 Filter bits 29 1 FB30 Filter bits 30 1 FB31 Filter bits 31 1 F7R1 F7R1 Filter bank 7 register 1 0x278 0x20 read-write 0x00000000 FB0 Filter bits 0 1 FB1 Filter bits 1 1 FB2 Filter bits 2 1 FB3 Filter bits 3 1 FB4 Filter bits 4 1 FB5 Filter bits 5 1 FB6 Filter bits 6 1 FB7 Filter bits 7 1 FB8 Filter bits 8 1 FB9 Filter bits 9 1 FB10 Filter bits 10 1 FB11 Filter bits 11 1 FB12 Filter bits 12 1 FB13 Filter bits 13 1 FB14 Filter bits 14 1 FB15 Filter bits 15 1 FB16 Filter bits 16 1 FB17 Filter bits 17 1 FB18 Filter bits 18 1 FB19 Filter bits 19 1 FB20 Filter bits 20 1 FB21 Filter bits 21 1 FB22 Filter bits 22 1 FB23 Filter bits 23 1 FB24 Filter bits 24 1 FB25 Filter bits 25 1 FB26 Filter bits 26 1 FB27 Filter bits 27 1 FB28 Filter bits 28 1 FB29 Filter bits 29 1 FB30 Filter bits 30 1 FB31 Filter bits 31 1 F7R2 F7R2 Filter bank 7 register 2 0x27C 0x20 read-write 0x00000000 FB0 Filter bits 0 1 FB1 Filter bits 1 1 FB2 Filter bits 2 1 FB3 Filter bits 3 1 FB4 Filter bits 4 1 FB5 Filter bits 5 1 FB6 Filter bits 6 1 FB7 Filter bits 7 1 FB8 Filter bits 8 1 FB9 Filter bits 9 1 FB10 Filter bits 10 1 FB11 Filter bits 11 1 FB12 Filter bits 12 1 FB13 Filter bits 13 1 FB14 Filter bits 14 1 FB15 Filter bits 15 1 FB16 Filter bits 16 1 FB17 Filter bits 17 1 FB18 Filter bits 18 1 FB19 Filter bits 19 1 FB20 Filter bits 20 1 FB21 Filter bits 21 1 FB22 Filter bits 22 1 FB23 Filter bits 23 1 FB24 Filter bits 24 1 FB25 Filter bits 25 1 FB26 Filter bits 26 1 FB27 Filter bits 27 1 FB28 Filter bits 28 1 FB29 Filter bits 29 1 FB30 Filter bits 30 1 FB31 Filter bits 31 1 F8R1 F8R1 Filter bank 8 register 1 0x280 0x20 read-write 0x00000000 FB0 Filter bits 0 1 FB1 Filter bits 1 1 FB2 Filter bits 2 1 FB3 Filter bits 3 1 FB4 Filter bits 4 1 FB5 Filter bits 5 1 FB6 Filter bits 6 1 FB7 Filter bits 7 1 FB8 Filter bits 8 1 FB9 Filter bits 9 1 FB10 Filter bits 10 1 FB11 Filter bits 11 1 FB12 Filter bits 12 1 FB13 Filter bits 13 1 FB14 Filter bits 14 1 FB15 Filter bits 15 1 FB16 Filter bits 16 1 FB17 Filter bits 17 1 FB18 Filter bits 18 1 FB19 Filter bits 19 1 FB20 Filter bits 20 1 FB21 Filter bits 21 1 FB22 Filter bits 22 1 FB23 Filter bits 23 1 FB24 Filter bits 24 1 FB25 Filter bits 25 1 FB26 Filter bits 26 1 FB27 Filter bits 27 1 FB28 Filter bits 28 1 FB29 Filter bits 29 1 FB30 Filter bits 30 1 FB31 Filter bits 31 1 F8R2 F8R2 Filter bank 8 register 2 0x284 0x20 read-write 0x00000000 FB0 Filter bits 0 1 FB1 Filter bits 1 1 FB2 Filter bits 2 1 FB3 Filter bits 3 1 FB4 Filter bits 4 1 FB5 Filter bits 5 1 FB6 Filter bits 6 1 FB7 Filter bits 7 1 FB8 Filter bits 8 1 FB9 Filter bits 9 1 FB10 Filter bits 10 1 FB11 Filter bits 11 1 FB12 Filter bits 12 1 FB13 Filter bits 13 1 FB14 Filter bits 14 1 FB15 Filter bits 15 1 FB16 Filter bits 16 1 FB17 Filter bits 17 1 FB18 Filter bits 18 1 FB19 Filter bits 19 1 FB20 Filter bits 20 1 FB21 Filter bits 21 1 FB22 Filter bits 22 1 FB23 Filter bits 23 1 FB24 Filter bits 24 1 FB25 Filter bits 25 1 FB26 Filter bits 26 1 FB27 Filter bits 27 1 FB28 Filter bits 28 1 FB29 Filter bits 29 1 FB30 Filter bits 30 1 FB31 Filter bits 31 1 F9R1 F9R1 Filter bank 9 register 1 0x288 0x20 read-write 0x00000000 FB0 Filter bits 0 1 FB1 Filter bits 1 1 FB2 Filter bits 2 1 FB3 Filter bits 3 1 FB4 Filter bits 4 1 FB5 Filter bits 5 1 FB6 Filter bits 6 1 FB7 Filter bits 7 1 FB8 Filter bits 8 1 FB9 Filter bits 9 1 FB10 Filter bits 10 1 FB11 Filter bits 11 1 FB12 Filter bits 12 1 FB13 Filter bits 13 1 FB14 Filter bits 14 1 FB15 Filter bits 15 1 FB16 Filter bits 16 1 FB17 Filter bits 17 1 FB18 Filter bits 18 1 FB19 Filter bits 19 1 FB20 Filter bits 20 1 FB21 Filter bits 21 1 FB22 Filter bits 22 1 FB23 Filter bits 23 1 FB24 Filter bits 24 1 FB25 Filter bits 25 1 FB26 Filter bits 26 1 FB27 Filter bits 27 1 FB28 Filter bits 28 1 FB29 Filter bits 29 1 FB30 Filter bits 30 1 FB31 Filter bits 31 1 F9R2 F9R2 Filter bank 9 register 2 0x28C 0x20 read-write 0x00000000 FB0 Filter bits 0 1 FB1 Filter bits 1 1 FB2 Filter bits 2 1 FB3 Filter bits 3 1 FB4 Filter bits 4 1 FB5 Filter bits 5 1 FB6 Filter bits 6 1 FB7 Filter bits 7 1 FB8 Filter bits 8 1 FB9 Filter bits 9 1 FB10 Filter bits 10 1 FB11 Filter bits 11 1 FB12 Filter bits 12 1 FB13 Filter bits 13 1 FB14 Filter bits 14 1 FB15 Filter bits 15 1 FB16 Filter bits 16 1 FB17 Filter bits 17 1 FB18 Filter bits 18 1 FB19 Filter bits 19 1 FB20 Filter bits 20 1 FB21 Filter bits 21 1 FB22 Filter bits 22 1 FB23 Filter bits 23 1 FB24 Filter bits 24 1 FB25 Filter bits 25 1 FB26 Filter bits 26 1 FB27 Filter bits 27 1 FB28 Filter bits 28 1 FB29 Filter bits 29 1 FB30 Filter bits 30 1 FB31 Filter bits 31 1 F10R1 F10R1 Filter bank 10 register 1 0x290 0x20 read-write 0x00000000 FB0 Filter bits 0 1 FB1 Filter bits 1 1 FB2 Filter bits 2 1 FB3 Filter bits 3 1 FB4 Filter bits 4 1 FB5 Filter bits 5 1 FB6 Filter bits 6 1 FB7 Filter bits 7 1 FB8 Filter bits 8 1 FB9 Filter bits 9 1 FB10 Filter bits 10 1 FB11 Filter bits 11 1 FB12 Filter bits 12 1 FB13 Filter bits 13 1 FB14 Filter bits 14 1 FB15 Filter bits 15 1 FB16 Filter bits 16 1 FB17 Filter bits 17 1 FB18 Filter bits 18 1 FB19 Filter bits 19 1 FB20 Filter bits 20 1 FB21 Filter bits 21 1 FB22 Filter bits 22 1 FB23 Filter bits 23 1 FB24 Filter bits 24 1 FB25 Filter bits 25 1 FB26 Filter bits 26 1 FB27 Filter bits 27 1 FB28 Filter bits 28 1 FB29 Filter bits 29 1 FB30 Filter bits 30 1 FB31 Filter bits 31 1 F10R2 F10R2 Filter bank 10 register 2 0x294 0x20 read-write 0x00000000 FB0 Filter bits 0 1 FB1 Filter bits 1 1 FB2 Filter bits 2 1 FB3 Filter bits 3 1 FB4 Filter bits 4 1 FB5 Filter bits 5 1 FB6 Filter bits 6 1 FB7 Filter bits 7 1 FB8 Filter bits 8 1 FB9 Filter bits 9 1 FB10 Filter bits 10 1 FB11 Filter bits 11 1 FB12 Filter bits 12 1 FB13 Filter bits 13 1 FB14 Filter bits 14 1 FB15 Filter bits 15 1 FB16 Filter bits 16 1 FB17 Filter bits 17 1 FB18 Filter bits 18 1 FB19 Filter bits 19 1 FB20 Filter bits 20 1 FB21 Filter bits 21 1 FB22 Filter bits 22 1 FB23 Filter bits 23 1 FB24 Filter bits 24 1 FB25 Filter bits 25 1 FB26 Filter bits 26 1 FB27 Filter bits 27 1 FB28 Filter bits 28 1 FB29 Filter bits 29 1 FB30 Filter bits 30 1 FB31 Filter bits 31 1 F11R1 F11R1 Filter bank 11 register 1 0x298 0x20 read-write 0x00000000 FB0 Filter bits 0 1 FB1 Filter bits 1 1 FB2 Filter bits 2 1 FB3 Filter bits 3 1 FB4 Filter bits 4 1 FB5 Filter bits 5 1 FB6 Filter bits 6 1 FB7 Filter bits 7 1 FB8 Filter bits 8 1 FB9 Filter bits 9 1 FB10 Filter bits 10 1 FB11 Filter bits 11 1 FB12 Filter bits 12 1 FB13 Filter bits 13 1 FB14 Filter bits 14 1 FB15 Filter bits 15 1 FB16 Filter bits 16 1 FB17 Filter bits 17 1 FB18 Filter bits 18 1 FB19 Filter bits 19 1 FB20 Filter bits 20 1 FB21 Filter bits 21 1 FB22 Filter bits 22 1 FB23 Filter bits 23 1 FB24 Filter bits 24 1 FB25 Filter bits 25 1 FB26 Filter bits 26 1 FB27 Filter bits 27 1 FB28 Filter bits 28 1 FB29 Filter bits 29 1 FB30 Filter bits 30 1 FB31 Filter bits 31 1 F11R2 F11R2 Filter bank 11 register 2 0x29C 0x20 read-write 0x00000000 FB0 Filter bits 0 1 FB1 Filter bits 1 1 FB2 Filter bits 2 1 FB3 Filter bits 3 1 FB4 Filter bits 4 1 FB5 Filter bits 5 1 FB6 Filter bits 6 1 FB7 Filter bits 7 1 FB8 Filter bits 8 1 FB9 Filter bits 9 1 FB10 Filter bits 10 1 FB11 Filter bits 11 1 FB12 Filter bits 12 1 FB13 Filter bits 13 1 FB14 Filter bits 14 1 FB15 Filter bits 15 1 FB16 Filter bits 16 1 FB17 Filter bits 17 1 FB18 Filter bits 18 1 FB19 Filter bits 19 1 FB20 Filter bits 20 1 FB21 Filter bits 21 1 FB22 Filter bits 22 1 FB23 Filter bits 23 1 FB24 Filter bits 24 1 FB25 Filter bits 25 1 FB26 Filter bits 26 1 FB27 Filter bits 27 1 FB28 Filter bits 28 1 FB29 Filter bits 29 1 FB30 Filter bits 30 1 FB31 Filter bits 31 1 F12R1 F12R1 Filter bank 4 register 1 0x2A0 0x20 read-write 0x00000000 FB0 Filter bits 0 1 FB1 Filter bits 1 1 FB2 Filter bits 2 1 FB3 Filter bits 3 1 FB4 Filter bits 4 1 FB5 Filter bits 5 1 FB6 Filter bits 6 1 FB7 Filter bits 7 1 FB8 Filter bits 8 1 FB9 Filter bits 9 1 FB10 Filter bits 10 1 FB11 Filter bits 11 1 FB12 Filter bits 12 1 FB13 Filter bits 13 1 FB14 Filter bits 14 1 FB15 Filter bits 15 1 FB16 Filter bits 16 1 FB17 Filter bits 17 1 FB18 Filter bits 18 1 FB19 Filter bits 19 1 FB20 Filter bits 20 1 FB21 Filter bits 21 1 FB22 Filter bits 22 1 FB23 Filter bits 23 1 FB24 Filter bits 24 1 FB25 Filter bits 25 1 FB26 Filter bits 26 1 FB27 Filter bits 27 1 FB28 Filter bits 28 1 FB29 Filter bits 29 1 FB30 Filter bits 30 1 FB31 Filter bits 31 1 F12R2 F12R2 Filter bank 12 register 2 0x2A4 0x20 read-write 0x00000000 FB0 Filter bits 0 1 FB1 Filter bits 1 1 FB2 Filter bits 2 1 FB3 Filter bits 3 1 FB4 Filter bits 4 1 FB5 Filter bits 5 1 FB6 Filter bits 6 1 FB7 Filter bits 7 1 FB8 Filter bits 8 1 FB9 Filter bits 9 1 FB10 Filter bits 10 1 FB11 Filter bits 11 1 FB12 Filter bits 12 1 FB13 Filter bits 13 1 FB14 Filter bits 14 1 FB15 Filter bits 15 1 FB16 Filter bits 16 1 FB17 Filter bits 17 1 FB18 Filter bits 18 1 FB19 Filter bits 19 1 FB20 Filter bits 20 1 FB21 Filter bits 21 1 FB22 Filter bits 22 1 FB23 Filter bits 23 1 FB24 Filter bits 24 1 FB25 Filter bits 25 1 FB26 Filter bits 26 1 FB27 Filter bits 27 1 FB28 Filter bits 28 1 FB29 Filter bits 29 1 FB30 Filter bits 30 1 FB31 Filter bits 31 1 F13R1 F13R1 Filter bank 13 register 1 0x2A8 0x20 read-write 0x00000000 FB0 Filter bits 0 1 FB1 Filter bits 1 1 FB2 Filter bits 2 1 FB3 Filter bits 3 1 FB4 Filter bits 4 1 FB5 Filter bits 5 1 FB6 Filter bits 6 1 FB7 Filter bits 7 1 FB8 Filter bits 8 1 FB9 Filter bits 9 1 FB10 Filter bits 10 1 FB11 Filter bits 11 1 FB12 Filter bits 12 1 FB13 Filter bits 13 1 FB14 Filter bits 14 1 FB15 Filter bits 15 1 FB16 Filter bits 16 1 FB17 Filter bits 17 1 FB18 Filter bits 18 1 FB19 Filter bits 19 1 FB20 Filter bits 20 1 FB21 Filter bits 21 1 FB22 Filter bits 22 1 FB23 Filter bits 23 1 FB24 Filter bits 24 1 FB25 Filter bits 25 1 FB26 Filter bits 26 1 FB27 Filter bits 27 1 FB28 Filter bits 28 1 FB29 Filter bits 29 1 FB30 Filter bits 30 1 FB31 Filter bits 31 1 F13R2 F13R2 Filter bank 13 register 2 0x2AC 0x20 read-write 0x00000000 FB0 Filter bits 0 1 FB1 Filter bits 1 1 FB2 Filter bits 2 1 FB3 Filter bits 3 1 FB4 Filter bits 4 1 FB5 Filter bits 5 1 FB6 Filter bits 6 1 FB7 Filter bits 7 1 FB8 Filter bits 8 1 FB9 Filter bits 9 1 FB10 Filter bits 10 1 FB11 Filter bits 11 1 FB12 Filter bits 12 1 FB13 Filter bits 13 1 FB14 Filter bits 14 1 FB15 Filter bits 15 1 FB16 Filter bits 16 1 FB17 Filter bits 17 1 FB18 Filter bits 18 1 FB19 Filter bits 19 1 FB20 Filter bits 20 1 FB21 Filter bits 21 1 FB22 Filter bits 22 1 FB23 Filter bits 23 1 FB24 Filter bits 24 1 FB25 Filter bits 25 1 FB26 Filter bits 26 1 FB27 Filter bits 27 1 FB28 Filter bits 28 1 FB29 Filter bits 29 1 FB30 Filter bits 30 1 FB31 Filter bits 31 1 F14R1 F14R1 Filter bank 14 register 1 0x2B0 0x20 read-write 0x00000000 FB0 Filter bits 0 1 FB1 Filter bits 1 1 FB2 Filter bits 2 1 FB3 Filter bits 3 1 FB4 Filter bits 4 1 FB5 Filter bits 5 1 FB6 Filter bits 6 1 FB7 Filter bits 7 1 FB8 Filter bits 8 1 FB9 Filter bits 9 1 FB10 Filter bits 10 1 FB11 Filter bits 11 1 FB12 Filter bits 12 1 FB13 Filter bits 13 1 FB14 Filter bits 14 1 FB15 Filter bits 15 1 FB16 Filter bits 16 1 FB17 Filter bits 17 1 FB18 Filter bits 18 1 FB19 Filter bits 19 1 FB20 Filter bits 20 1 FB21 Filter bits 21 1 FB22 Filter bits 22 1 FB23 Filter bits 23 1 FB24 Filter bits 24 1 FB25 Filter bits 25 1 FB26 Filter bits 26 1 FB27 Filter bits 27 1 FB28 Filter bits 28 1 FB29 Filter bits 29 1 FB30 Filter bits 30 1 FB31 Filter bits 31 1 F14R2 F14R2 Filter bank 14 register 2 0x2B4 0x20 read-write 0x00000000 FB0 Filter bits 0 1 FB1 Filter bits 1 1 FB2 Filter bits 2 1 FB3 Filter bits 3 1 FB4 Filter bits 4 1 FB5 Filter bits 5 1 FB6 Filter bits 6 1 FB7 Filter bits 7 1 FB8 Filter bits 8 1 FB9 Filter bits 9 1 FB10 Filter bits 10 1 FB11 Filter bits 11 1 FB12 Filter bits 12 1 FB13 Filter bits 13 1 FB14 Filter bits 14 1 FB15 Filter bits 15 1 FB16 Filter bits 16 1 FB17 Filter bits 17 1 FB18 Filter bits 18 1 FB19 Filter bits 19 1 FB20 Filter bits 20 1 FB21 Filter bits 21 1 FB22 Filter bits 22 1 FB23 Filter bits 23 1 FB24 Filter bits 24 1 FB25 Filter bits 25 1 FB26 Filter bits 26 1 FB27 Filter bits 27 1 FB28 Filter bits 28 1 FB29 Filter bits 29 1 FB30 Filter bits 30 1 FB31 Filter bits 31 1 F15R1 F15R1 Filter bank 15 register 1 0x2B8 0x20 read-write 0x00000000 FB0 Filter bits 0 1 FB1 Filter bits 1 1 FB2 Filter bits 2 1 FB3 Filter bits 3 1 FB4 Filter bits 4 1 FB5 Filter bits 5 1 FB6 Filter bits 6 1 FB7 Filter bits 7 1 FB8 Filter bits 8 1 FB9 Filter bits 9 1 FB10 Filter bits 10 1 FB11 Filter bits 11 1 FB12 Filter bits 12 1 FB13 Filter bits 13 1 FB14 Filter bits 14 1 FB15 Filter bits 15 1 FB16 Filter bits 16 1 FB17 Filter bits 17 1 FB18 Filter bits 18 1 FB19 Filter bits 19 1 FB20 Filter bits 20 1 FB21 Filter bits 21 1 FB22 Filter bits 22 1 FB23 Filter bits 23 1 FB24 Filter bits 24 1 FB25 Filter bits 25 1 FB26 Filter bits 26 1 FB27 Filter bits 27 1 FB28 Filter bits 28 1 FB29 Filter bits 29 1 FB30 Filter bits 30 1 FB31 Filter bits 31 1 F15R2 F15R2 Filter bank 15 register 2 0x2BC 0x20 read-write 0x00000000 FB0 Filter bits 0 1 FB1 Filter bits 1 1 FB2 Filter bits 2 1 FB3 Filter bits 3 1 FB4 Filter bits 4 1 FB5 Filter bits 5 1 FB6 Filter bits 6 1 FB7 Filter bits 7 1 FB8 Filter bits 8 1 FB9 Filter bits 9 1 FB10 Filter bits 10 1 FB11 Filter bits 11 1 FB12 Filter bits 12 1 FB13 Filter bits 13 1 FB14 Filter bits 14 1 FB15 Filter bits 15 1 FB16 Filter bits 16 1 FB17 Filter bits 17 1 FB18 Filter bits 18 1 FB19 Filter bits 19 1 FB20 Filter bits 20 1 FB21 Filter bits 21 1 FB22 Filter bits 22 1 FB23 Filter bits 23 1 FB24 Filter bits 24 1 FB25 Filter bits 25 1 FB26 Filter bits 26 1 FB27 Filter bits 27 1 FB28 Filter bits 28 1 FB29 Filter bits 29 1 FB30 Filter bits 30 1 FB31 Filter bits 31 1 F16R1 F16R1 Filter bank 16 register 1 0x2C0 0x20 read-write 0x00000000 FB0 Filter bits 0 1 FB1 Filter bits 1 1 FB2 Filter bits 2 1 FB3 Filter bits 3 1 FB4 Filter bits 4 1 FB5 Filter bits 5 1 FB6 Filter bits 6 1 FB7 Filter bits 7 1 FB8 Filter bits 8 1 FB9 Filter bits 9 1 FB10 Filter bits 10 1 FB11 Filter bits 11 1 FB12 Filter bits 12 1 FB13 Filter bits 13 1 FB14 Filter bits 14 1 FB15 Filter bits 15 1 FB16 Filter bits 16 1 FB17 Filter bits 17 1 FB18 Filter bits 18 1 FB19 Filter bits 19 1 FB20 Filter bits 20 1 FB21 Filter bits 21 1 FB22 Filter bits 22 1 FB23 Filter bits 23 1 FB24 Filter bits 24 1 FB25 Filter bits 25 1 FB26 Filter bits 26 1 FB27 Filter bits 27 1 FB28 Filter bits 28 1 FB29 Filter bits 29 1 FB30 Filter bits 30 1 FB31 Filter bits 31 1 F16R2 F16R2 Filter bank 16 register 2 0x2C4 0x20 read-write 0x00000000 FB0 Filter bits 0 1 FB1 Filter bits 1 1 FB2 Filter bits 2 1 FB3 Filter bits 3 1 FB4 Filter bits 4 1 FB5 Filter bits 5 1 FB6 Filter bits 6 1 FB7 Filter bits 7 1 FB8 Filter bits 8 1 FB9 Filter bits 9 1 FB10 Filter bits 10 1 FB11 Filter bits 11 1 FB12 Filter bits 12 1 FB13 Filter bits 13 1 FB14 Filter bits 14 1 FB15 Filter bits 15 1 FB16 Filter bits 16 1 FB17 Filter bits 17 1 FB18 Filter bits 18 1 FB19 Filter bits 19 1 FB20 Filter bits 20 1 FB21 Filter bits 21 1 FB22 Filter bits 22 1 FB23 Filter bits 23 1 FB24 Filter bits 24 1 FB25 Filter bits 25 1 FB26 Filter bits 26 1 FB27 Filter bits 27 1 FB28 Filter bits 28 1 FB29 Filter bits 29 1 FB30 Filter bits 30 1 FB31 Filter bits 31 1 F17R1 F17R1 Filter bank 17 register 1 0x2C8 0x20 read-write 0x00000000 FB0 Filter bits 0 1 FB1 Filter bits 1 1 FB2 Filter bits 2 1 FB3 Filter bits 3 1 FB4 Filter bits 4 1 FB5 Filter bits 5 1 FB6 Filter bits 6 1 FB7 Filter bits 7 1 FB8 Filter bits 8 1 FB9 Filter bits 9 1 FB10 Filter bits 10 1 FB11 Filter bits 11 1 FB12 Filter bits 12 1 FB13 Filter bits 13 1 FB14 Filter bits 14 1 FB15 Filter bits 15 1 FB16 Filter bits 16 1 FB17 Filter bits 17 1 FB18 Filter bits 18 1 FB19 Filter bits 19 1 FB20 Filter bits 20 1 FB21 Filter bits 21 1 FB22 Filter bits 22 1 FB23 Filter bits 23 1 FB24 Filter bits 24 1 FB25 Filter bits 25 1 FB26 Filter bits 26 1 FB27 Filter bits 27 1 FB28 Filter bits 28 1 FB29 Filter bits 29 1 FB30 Filter bits 30 1 FB31 Filter bits 31 1 F17R2 F17R2 Filter bank 17 register 2 0x2CC 0x20 read-write 0x00000000 FB0 Filter bits 0 1 FB1 Filter bits 1 1 FB2 Filter bits 2 1 FB3 Filter bits 3 1 FB4 Filter bits 4 1 FB5 Filter bits 5 1 FB6 Filter bits 6 1 FB7 Filter bits 7 1 FB8 Filter bits 8 1 FB9 Filter bits 9 1 FB10 Filter bits 10 1 FB11 Filter bits 11 1 FB12 Filter bits 12 1 FB13 Filter bits 13 1 FB14 Filter bits 14 1 FB15 Filter bits 15 1 FB16 Filter bits 16 1 FB17 Filter bits 17 1 FB18 Filter bits 18 1 FB19 Filter bits 19 1 FB20 Filter bits 20 1 FB21 Filter bits 21 1 FB22 Filter bits 22 1 FB23 Filter bits 23 1 FB24 Filter bits 24 1 FB25 Filter bits 25 1 FB26 Filter bits 26 1 FB27 Filter bits 27 1 FB28 Filter bits 28 1 FB29 Filter bits 29 1 FB30 Filter bits 30 1 FB31 Filter bits 31 1 F18R1 F18R1 Filter bank 18 register 1 0x2D0 0x20 read-write 0x00000000 FB0 Filter bits 0 1 FB1 Filter bits 1 1 FB2 Filter bits 2 1 FB3 Filter bits 3 1 FB4 Filter bits 4 1 FB5 Filter bits 5 1 FB6 Filter bits 6 1 FB7 Filter bits 7 1 FB8 Filter bits 8 1 FB9 Filter bits 9 1 FB10 Filter bits 10 1 FB11 Filter bits 11 1 FB12 Filter bits 12 1 FB13 Filter bits 13 1 FB14 Filter bits 14 1 FB15 Filter bits 15 1 FB16 Filter bits 16 1 FB17 Filter bits 17 1 FB18 Filter bits 18 1 FB19 Filter bits 19 1 FB20 Filter bits 20 1 FB21 Filter bits 21 1 FB22 Filter bits 22 1 FB23 Filter bits 23 1 FB24 Filter bits 24 1 FB25 Filter bits 25 1 FB26 Filter bits 26 1 FB27 Filter bits 27 1 FB28 Filter bits 28 1 FB29 Filter bits 29 1 FB30 Filter bits 30 1 FB31 Filter bits 31 1 F18R2 F18R2 Filter bank 18 register 2 0x2D4 0x20 read-write 0x00000000 FB0 Filter bits 0 1 FB1 Filter bits 1 1 FB2 Filter bits 2 1 FB3 Filter bits 3 1 FB4 Filter bits 4 1 FB5 Filter bits 5 1 FB6 Filter bits 6 1 FB7 Filter bits 7 1 FB8 Filter bits 8 1 FB9 Filter bits 9 1 FB10 Filter bits 10 1 FB11 Filter bits 11 1 FB12 Filter bits 12 1 FB13 Filter bits 13 1 FB14 Filter bits 14 1 FB15 Filter bits 15 1 FB16 Filter bits 16 1 FB17 Filter bits 17 1 FB18 Filter bits 18 1 FB19 Filter bits 19 1 FB20 Filter bits 20 1 FB21 Filter bits 21 1 FB22 Filter bits 22 1 FB23 Filter bits 23 1 FB24 Filter bits 24 1 FB25 Filter bits 25 1 FB26 Filter bits 26 1 FB27 Filter bits 27 1 FB28 Filter bits 28 1 FB29 Filter bits 29 1 FB30 Filter bits 30 1 FB31 Filter bits 31 1 F19R1 F19R1 Filter bank 19 register 1 0x2D8 0x20 read-write 0x00000000 FB0 Filter bits 0 1 FB1 Filter bits 1 1 FB2 Filter bits 2 1 FB3 Filter bits 3 1 FB4 Filter bits 4 1 FB5 Filter bits 5 1 FB6 Filter bits 6 1 FB7 Filter bits 7 1 FB8 Filter bits 8 1 FB9 Filter bits 9 1 FB10 Filter bits 10 1 FB11 Filter bits 11 1 FB12 Filter bits 12 1 FB13 Filter bits 13 1 FB14 Filter bits 14 1 FB15 Filter bits 15 1 FB16 Filter bits 16 1 FB17 Filter bits 17 1 FB18 Filter bits 18 1 FB19 Filter bits 19 1 FB20 Filter bits 20 1 FB21 Filter bits 21 1 FB22 Filter bits 22 1 FB23 Filter bits 23 1 FB24 Filter bits 24 1 FB25 Filter bits 25 1 FB26 Filter bits 26 1 FB27 Filter bits 27 1 FB28 Filter bits 28 1 FB29 Filter bits 29 1 FB30 Filter bits 30 1 FB31 Filter bits 31 1 F19R2 F19R2 Filter bank 19 register 2 0x2DC 0x20 read-write 0x00000000 FB0 Filter bits 0 1 FB1 Filter bits 1 1 FB2 Filter bits 2 1 FB3 Filter bits 3 1 FB4 Filter bits 4 1 FB5 Filter bits 5 1 FB6 Filter bits 6 1 FB7 Filter bits 7 1 FB8 Filter bits 8 1 FB9 Filter bits 9 1 FB10 Filter bits 10 1 FB11 Filter bits 11 1 FB12 Filter bits 12 1 FB13 Filter bits 13 1 FB14 Filter bits 14 1 FB15 Filter bits 15 1 FB16 Filter bits 16 1 FB17 Filter bits 17 1 FB18 Filter bits 18 1 FB19 Filter bits 19 1 FB20 Filter bits 20 1 FB21 Filter bits 21 1 FB22 Filter bits 22 1 FB23 Filter bits 23 1 FB24 Filter bits 24 1 FB25 Filter bits 25 1 FB26 Filter bits 26 1 FB27 Filter bits 27 1 FB28 Filter bits 28 1 FB29 Filter bits 29 1 FB30 Filter bits 30 1 FB31 Filter bits 31 1 F20R1 F20R1 Filter bank 20 register 1 0x2E0 0x20 read-write 0x00000000 FB0 Filter bits 0 1 FB1 Filter bits 1 1 FB2 Filter bits 2 1 FB3 Filter bits 3 1 FB4 Filter bits 4 1 FB5 Filter bits 5 1 FB6 Filter bits 6 1 FB7 Filter bits 7 1 FB8 Filter bits 8 1 FB9 Filter bits 9 1 FB10 Filter bits 10 1 FB11 Filter bits 11 1 FB12 Filter bits 12 1 FB13 Filter bits 13 1 FB14 Filter bits 14 1 FB15 Filter bits 15 1 FB16 Filter bits 16 1 FB17 Filter bits 17 1 FB18 Filter bits 18 1 FB19 Filter bits 19 1 FB20 Filter bits 20 1 FB21 Filter bits 21 1 FB22 Filter bits 22 1 FB23 Filter bits 23 1 FB24 Filter bits 24 1 FB25 Filter bits 25 1 FB26 Filter bits 26 1 FB27 Filter bits 27 1 FB28 Filter bits 28 1 FB29 Filter bits 29 1 FB30 Filter bits 30 1 FB31 Filter bits 31 1 F20R2 F20R2 Filter bank 20 register 2 0x2E4 0x20 read-write 0x00000000 FB0 Filter bits 0 1 FB1 Filter bits 1 1 FB2 Filter bits 2 1 FB3 Filter bits 3 1 FB4 Filter bits 4 1 FB5 Filter bits 5 1 FB6 Filter bits 6 1 FB7 Filter bits 7 1 FB8 Filter bits 8 1 FB9 Filter bits 9 1 FB10 Filter bits 10 1 FB11 Filter bits 11 1 FB12 Filter bits 12 1 FB13 Filter bits 13 1 FB14 Filter bits 14 1 FB15 Filter bits 15 1 FB16 Filter bits 16 1 FB17 Filter bits 17 1 FB18 Filter bits 18 1 FB19 Filter bits 19 1 FB20 Filter bits 20 1 FB21 Filter bits 21 1 FB22 Filter bits 22 1 FB23 Filter bits 23 1 FB24 Filter bits 24 1 FB25 Filter bits 25 1 FB26 Filter bits 26 1 FB27 Filter bits 27 1 FB28 Filter bits 28 1 FB29 Filter bits 29 1 FB30 Filter bits 30 1 FB31 Filter bits 31 1 F21R1 F21R1 Filter bank 21 register 1 0x2E8 0x20 read-write 0x00000000 FB0 Filter bits 0 1 FB1 Filter bits 1 1 FB2 Filter bits 2 1 FB3 Filter bits 3 1 FB4 Filter bits 4 1 FB5 Filter bits 5 1 FB6 Filter bits 6 1 FB7 Filter bits 7 1 FB8 Filter bits 8 1 FB9 Filter bits 9 1 FB10 Filter bits 10 1 FB11 Filter bits 11 1 FB12 Filter bits 12 1 FB13 Filter bits 13 1 FB14 Filter bits 14 1 FB15 Filter bits 15 1 FB16 Filter bits 16 1 FB17 Filter bits 17 1 FB18 Filter bits 18 1 FB19 Filter bits 19 1 FB20 Filter bits 20 1 FB21 Filter bits 21 1 FB22 Filter bits 22 1 FB23 Filter bits 23 1 FB24 Filter bits 24 1 FB25 Filter bits 25 1 FB26 Filter bits 26 1 FB27 Filter bits 27 1 FB28 Filter bits 28 1 FB29 Filter bits 29 1 FB30 Filter bits 30 1 FB31 Filter bits 31 1 F21R2 F21R2 Filter bank 21 register 2 0x2EC 0x20 read-write 0x00000000 FB0 Filter bits 0 1 FB1 Filter bits 1 1 FB2 Filter bits 2 1 FB3 Filter bits 3 1 FB4 Filter bits 4 1 FB5 Filter bits 5 1 FB6 Filter bits 6 1 FB7 Filter bits 7 1 FB8 Filter bits 8 1 FB9 Filter bits 9 1 FB10 Filter bits 10 1 FB11 Filter bits 11 1 FB12 Filter bits 12 1 FB13 Filter bits 13 1 FB14 Filter bits 14 1 FB15 Filter bits 15 1 FB16 Filter bits 16 1 FB17 Filter bits 17 1 FB18 Filter bits 18 1 FB19 Filter bits 19 1 FB20 Filter bits 20 1 FB21 Filter bits 21 1 FB22 Filter bits 22 1 FB23 Filter bits 23 1 FB24 Filter bits 24 1 FB25 Filter bits 25 1 FB26 Filter bits 26 1 FB27 Filter bits 27 1 FB28 Filter bits 28 1 FB29 Filter bits 29 1 FB30 Filter bits 30 1 FB31 Filter bits 31 1 F22R1 F22R1 Filter bank 22 register 1 0x2F0 0x20 read-write 0x00000000 FB0 Filter bits 0 1 FB1 Filter bits 1 1 FB2 Filter bits 2 1 FB3 Filter bits 3 1 FB4 Filter bits 4 1 FB5 Filter bits 5 1 FB6 Filter bits 6 1 FB7 Filter bits 7 1 FB8 Filter bits 8 1 FB9 Filter bits 9 1 FB10 Filter bits 10 1 FB11 Filter bits 11 1 FB12 Filter bits 12 1 FB13 Filter bits 13 1 FB14 Filter bits 14 1 FB15 Filter bits 15 1 FB16 Filter bits 16 1 FB17 Filter bits 17 1 FB18 Filter bits 18 1 FB19 Filter bits 19 1 FB20 Filter bits 20 1 FB21 Filter bits 21 1 FB22 Filter bits 22 1 FB23 Filter bits 23 1 FB24 Filter bits 24 1 FB25 Filter bits 25 1 FB26 Filter bits 26 1 FB27 Filter bits 27 1 FB28 Filter bits 28 1 FB29 Filter bits 29 1 FB30 Filter bits 30 1 FB31 Filter bits 31 1 F22R2 F22R2 Filter bank 22 register 2 0x2F4 0x20 read-write 0x00000000 FB0 Filter bits 0 1 FB1 Filter bits 1 1 FB2 Filter bits 2 1 FB3 Filter bits 3 1 FB4 Filter bits 4 1 FB5 Filter bits 5 1 FB6 Filter bits 6 1 FB7 Filter bits 7 1 FB8 Filter bits 8 1 FB9 Filter bits 9 1 FB10 Filter bits 10 1 FB11 Filter bits 11 1 FB12 Filter bits 12 1 FB13 Filter bits 13 1 FB14 Filter bits 14 1 FB15 Filter bits 15 1 FB16 Filter bits 16 1 FB17 Filter bits 17 1 FB18 Filter bits 18 1 FB19 Filter bits 19 1 FB20 Filter bits 20 1 FB21 Filter bits 21 1 FB22 Filter bits 22 1 FB23 Filter bits 23 1 FB24 Filter bits 24 1 FB25 Filter bits 25 1 FB26 Filter bits 26 1 FB27 Filter bits 27 1 FB28 Filter bits 28 1 FB29 Filter bits 29 1 FB30 Filter bits 30 1 FB31 Filter bits 31 1 F23R1 F23R1 Filter bank 23 register 1 0x2F8 0x20 read-write 0x00000000 FB0 Filter bits 0 1 FB1 Filter bits 1 1 FB2 Filter bits 2 1 FB3 Filter bits 3 1 FB4 Filter bits 4 1 FB5 Filter bits 5 1 FB6 Filter bits 6 1 FB7 Filter bits 7 1 FB8 Filter bits 8 1 FB9 Filter bits 9 1 FB10 Filter bits 10 1 FB11 Filter bits 11 1 FB12 Filter bits 12 1 FB13 Filter bits 13 1 FB14 Filter bits 14 1 FB15 Filter bits 15 1 FB16 Filter bits 16 1 FB17 Filter bits 17 1 FB18 Filter bits 18 1 FB19 Filter bits 19 1 FB20 Filter bits 20 1 FB21 Filter bits 21 1 FB22 Filter bits 22 1 FB23 Filter bits 23 1 FB24 Filter bits 24 1 FB25 Filter bits 25 1 FB26 Filter bits 26 1 FB27 Filter bits 27 1 FB28 Filter bits 28 1 FB29 Filter bits 29 1 FB30 Filter bits 30 1 FB31 Filter bits 31 1 F23R2 F23R2 Filter bank 23 register 2 0x2FC 0x20 read-write 0x00000000 FB0 Filter bits 0 1 FB1 Filter bits 1 1 FB2 Filter bits 2 1 FB3 Filter bits 3 1 FB4 Filter bits 4 1 FB5 Filter bits 5 1 FB6 Filter bits 6 1 FB7 Filter bits 7 1 FB8 Filter bits 8 1 FB9 Filter bits 9 1 FB10 Filter bits 10 1 FB11 Filter bits 11 1 FB12 Filter bits 12 1 FB13 Filter bits 13 1 FB14 Filter bits 14 1 FB15 Filter bits 15 1 FB16 Filter bits 16 1 FB17 Filter bits 17 1 FB18 Filter bits 18 1 FB19 Filter bits 19 1 FB20 Filter bits 20 1 FB21 Filter bits 21 1 FB22 Filter bits 22 1 FB23 Filter bits 23 1 FB24 Filter bits 24 1 FB25 Filter bits 25 1 FB26 Filter bits 26 1 FB27 Filter bits 27 1 FB28 Filter bits 28 1 FB29 Filter bits 29 1 FB30 Filter bits 30 1 FB31 Filter bits 31 1 F24R1 F24R1 Filter bank 24 register 1 0x300 0x20 read-write 0x00000000 FB0 Filter bits 0 1 FB1 Filter bits 1 1 FB2 Filter bits 2 1 FB3 Filter bits 3 1 FB4 Filter bits 4 1 FB5 Filter bits 5 1 FB6 Filter bits 6 1 FB7 Filter bits 7 1 FB8 Filter bits 8 1 FB9 Filter bits 9 1 FB10 Filter bits 10 1 FB11 Filter bits 11 1 FB12 Filter bits 12 1 FB13 Filter bits 13 1 FB14 Filter bits 14 1 FB15 Filter bits 15 1 FB16 Filter bits 16 1 FB17 Filter bits 17 1 FB18 Filter bits 18 1 FB19 Filter bits 19 1 FB20 Filter bits 20 1 FB21 Filter bits 21 1 FB22 Filter bits 22 1 FB23 Filter bits 23 1 FB24 Filter bits 24 1 FB25 Filter bits 25 1 FB26 Filter bits 26 1 FB27 Filter bits 27 1 FB28 Filter bits 28 1 FB29 Filter bits 29 1 FB30 Filter bits 30 1 FB31 Filter bits 31 1 F24R2 F24R2 Filter bank 24 register 2 0x304 0x20 read-write 0x00000000 FB0 Filter bits 0 1 FB1 Filter bits 1 1 FB2 Filter bits 2 1 FB3 Filter bits 3 1 FB4 Filter bits 4 1 FB5 Filter bits 5 1 FB6 Filter bits 6 1 FB7 Filter bits 7 1 FB8 Filter bits 8 1 FB9 Filter bits 9 1 FB10 Filter bits 10 1 FB11 Filter bits 11 1 FB12 Filter bits 12 1 FB13 Filter bits 13 1 FB14 Filter bits 14 1 FB15 Filter bits 15 1 FB16 Filter bits 16 1 FB17 Filter bits 17 1 FB18 Filter bits 18 1 FB19 Filter bits 19 1 FB20 Filter bits 20 1 FB21 Filter bits 21 1 FB22 Filter bits 22 1 FB23 Filter bits 23 1 FB24 Filter bits 24 1 FB25 Filter bits 25 1 FB26 Filter bits 26 1 FB27 Filter bits 27 1 FB28 Filter bits 28 1 FB29 Filter bits 29 1 FB30 Filter bits 30 1 FB31 Filter bits 31 1 F25R1 F25R1 Filter bank 25 register 1 0x308 0x20 read-write 0x00000000 FB0 Filter bits 0 1 FB1 Filter bits 1 1 FB2 Filter bits 2 1 FB3 Filter bits 3 1 FB4 Filter bits 4 1 FB5 Filter bits 5 1 FB6 Filter bits 6 1 FB7 Filter bits 7 1 FB8 Filter bits 8 1 FB9 Filter bits 9 1 FB10 Filter bits 10 1 FB11 Filter bits 11 1 FB12 Filter bits 12 1 FB13 Filter bits 13 1 FB14 Filter bits 14 1 FB15 Filter bits 15 1 FB16 Filter bits 16 1 FB17 Filter bits 17 1 FB18 Filter bits 18 1 FB19 Filter bits 19 1 FB20 Filter bits 20 1 FB21 Filter bits 21 1 FB22 Filter bits 22 1 FB23 Filter bits 23 1 FB24 Filter bits 24 1 FB25 Filter bits 25 1 FB26 Filter bits 26 1 FB27 Filter bits 27 1 FB28 Filter bits 28 1 FB29 Filter bits 29 1 FB30 Filter bits 30 1 FB31 Filter bits 31 1 F25R2 F25R2 Filter bank 25 register 2 0x30C 0x20 read-write 0x00000000 FB0 Filter bits 0 1 FB1 Filter bits 1 1 FB2 Filter bits 2 1 FB3 Filter bits 3 1 FB4 Filter bits 4 1 FB5 Filter bits 5 1 FB6 Filter bits 6 1 FB7 Filter bits 7 1 FB8 Filter bits 8 1 FB9 Filter bits 9 1 FB10 Filter bits 10 1 FB11 Filter bits 11 1 FB12 Filter bits 12 1 FB13 Filter bits 13 1 FB14 Filter bits 14 1 FB15 Filter bits 15 1 FB16 Filter bits 16 1 FB17 Filter bits 17 1 FB18 Filter bits 18 1 FB19 Filter bits 19 1 FB20 Filter bits 20 1 FB21 Filter bits 21 1 FB22 Filter bits 22 1 FB23 Filter bits 23 1 FB24 Filter bits 24 1 FB25 Filter bits 25 1 FB26 Filter bits 26 1 FB27 Filter bits 27 1 FB28 Filter bits 28 1 FB29 Filter bits 29 1 FB30 Filter bits 30 1 FB31 Filter bits 31 1 F26R1 F26R1 Filter bank 26 register 1 0x310 0x20 read-write 0x00000000 FB0 Filter bits 0 1 FB1 Filter bits 1 1 FB2 Filter bits 2 1 FB3 Filter bits 3 1 FB4 Filter bits 4 1 FB5 Filter bits 5 1 FB6 Filter bits 6 1 FB7 Filter bits 7 1 FB8 Filter bits 8 1 FB9 Filter bits 9 1 FB10 Filter bits 10 1 FB11 Filter bits 11 1 FB12 Filter bits 12 1 FB13 Filter bits 13 1 FB14 Filter bits 14 1 FB15 Filter bits 15 1 FB16 Filter bits 16 1 FB17 Filter bits 17 1 FB18 Filter bits 18 1 FB19 Filter bits 19 1 FB20 Filter bits 20 1 FB21 Filter bits 21 1 FB22 Filter bits 22 1 FB23 Filter bits 23 1 FB24 Filter bits 24 1 FB25 Filter bits 25 1 FB26 Filter bits 26 1 FB27 Filter bits 27 1 FB28 Filter bits 28 1 FB29 Filter bits 29 1 FB30 Filter bits 30 1 FB31 Filter bits 31 1 F26R2 F26R2 Filter bank 26 register 2 0x314 0x20 read-write 0x00000000 FB0 Filter bits 0 1 FB1 Filter bits 1 1 FB2 Filter bits 2 1 FB3 Filter bits 3 1 FB4 Filter bits 4 1 FB5 Filter bits 5 1 FB6 Filter bits 6 1 FB7 Filter bits 7 1 FB8 Filter bits 8 1 FB9 Filter bits 9 1 FB10 Filter bits 10 1 FB11 Filter bits 11 1 FB12 Filter bits 12 1 FB13 Filter bits 13 1 FB14 Filter bits 14 1 FB15 Filter bits 15 1 FB16 Filter bits 16 1 FB17 Filter bits 17 1 FB18 Filter bits 18 1 FB19 Filter bits 19 1 FB20 Filter bits 20 1 FB21 Filter bits 21 1 FB22 Filter bits 22 1 FB23 Filter bits 23 1 FB24 Filter bits 24 1 FB25 Filter bits 25 1 FB26 Filter bits 26 1 FB27 Filter bits 27 1 FB28 Filter bits 28 1 FB29 Filter bits 29 1 FB30 Filter bits 30 1 FB31 Filter bits 31 1 F27R1 F27R1 Filter bank 27 register 1 0x318 0x20 read-write 0x00000000 FB0 Filter bits 0 1 FB1 Filter bits 1 1 FB2 Filter bits 2 1 FB3 Filter bits 3 1 FB4 Filter bits 4 1 FB5 Filter bits 5 1 FB6 Filter bits 6 1 FB7 Filter bits 7 1 FB8 Filter bits 8 1 FB9 Filter bits 9 1 FB10 Filter bits 10 1 FB11 Filter bits 11 1 FB12 Filter bits 12 1 FB13 Filter bits 13 1 FB14 Filter bits 14 1 FB15 Filter bits 15 1 FB16 Filter bits 16 1 FB17 Filter bits 17 1 FB18 Filter bits 18 1 FB19 Filter bits 19 1 FB20 Filter bits 20 1 FB21 Filter bits 21 1 FB22 Filter bits 22 1 FB23 Filter bits 23 1 FB24 Filter bits 24 1 FB25 Filter bits 25 1 FB26 Filter bits 26 1 FB27 Filter bits 27 1 FB28 Filter bits 28 1 FB29 Filter bits 29 1 FB30 Filter bits 30 1 FB31 Filter bits 31 1 F27R2 F27R2 Filter bank 27 register 2 0x31C 0x20 read-write 0x00000000 FB0 Filter bits 0 1 FB1 Filter bits 1 1 FB2 Filter bits 2 1 FB3 Filter bits 3 1 FB4 Filter bits 4 1 FB5 Filter bits 5 1 FB6 Filter bits 6 1 FB7 Filter bits 7 1 FB8 Filter bits 8 1 FB9 Filter bits 9 1 FB10 Filter bits 10 1 FB11 Filter bits 11 1 FB12 Filter bits 12 1 FB13 Filter bits 13 1 FB14 Filter bits 14 1 FB15 Filter bits 15 1 FB16 Filter bits 16 1 FB17 Filter bits 17 1 FB18 Filter bits 18 1 FB19 Filter bits 19 1 FB20 Filter bits 20 1 FB21 Filter bits 21 1 FB22 Filter bits 22 1 FB23 Filter bits 23 1 FB24 Filter bits 24 1 FB25 Filter bits 25 1 FB26 Filter bits 26 1 FB27 Filter bits 27 1 FB28 Filter bits 28 1 FB29 Filter bits 29 1 FB30 Filter bits 30 1 FB31 Filter bits 31 1 USB Universal serial bus full-speed device interface USB 0x40005C00 0x0 0x400 registers CAN_TX USB high priority/CAN_TX interrupt 19 CAN_RXD USB low priority/CAN_RXD interrupt 20 USB_HP USB high priority interrupt 74 USB_LP USB low priority interrupt 75 USB_WAKEUP USB wakeup interrupt 76 USB_EP0R USB_EP0R endpoint 0 register 0x0 0x20 0x00000000 EA Endpoint address 0 4 read-write STAT_TX Status bits, for transmission transfers 4 2 read-write DTOG_TX Data Toggle, for transmission transfers 6 1 read-write CTR_TX Correct Transfer for transmission 7 1 read-write EP_KIND Endpoint kind 8 1 read-write EP_TYPE Endpoint type 9 2 read-write SETUP Setup transaction completed 11 1 read-only STAT_RX Status bits, for reception transfers 12 2 read-write DTOG_RX Data Toggle, for reception transfers 14 1 read-write CTR_RX Correct transfer for reception 15 1 read-write USB_EP1R USB_EP1R endpoint 1 register 0x4 0x20 0x00000000 EA Endpoint address 0 4 read-write STAT_TX Status bits, for transmission transfers 4 2 read-write DTOG_TX Data Toggle, for transmission transfers 6 1 read-write CTR_TX Correct Transfer for transmission 7 1 read-write EP_KIND Endpoint kind 8 1 read-write EP_TYPE Endpoint type 9 2 read-write SETUP Setup transaction completed 11 1 read-only STAT_RX Status bits, for reception transfers 12 2 read-write DTOG_RX Data Toggle, for reception transfers 14 1 read-write CTR_RX Correct transfer for reception 15 1 read-write USB_EP2R USB_EP2R endpoint 2 register 0x8 0x20 0x00000000 EA Endpoint address 0 4 read-write STAT_TX Status bits, for transmission transfers 4 2 read-write DTOG_TX Data Toggle, for transmission transfers 6 1 read-write CTR_TX Correct Transfer for transmission 7 1 read-write EP_KIND Endpoint kind 8 1 read-write EP_TYPE Endpoint type 9 2 read-write SETUP Setup transaction completed 11 1 read-only STAT_RX Status bits, for reception transfers 12 2 read-write DTOG_RX Data Toggle, for reception transfers 14 1 read-write CTR_RX Correct transfer for reception 15 1 read-write USB_EP3R USB_EP3R endpoint 3 register 0xC 0x20 0x00000000 EA Endpoint address 0 4 read-write STAT_TX Status bits, for transmission transfers 4 2 read-write DTOG_TX Data Toggle, for transmission transfers 6 1 read-write CTR_TX Correct Transfer for transmission 7 1 read-write EP_KIND Endpoint kind 8 1 read-write EP_TYPE Endpoint type 9 2 read-write SETUP Setup transaction completed 11 1 read-only STAT_RX Status bits, for reception transfers 12 2 read-write DTOG_RX Data Toggle, for reception transfers 14 1 read-write CTR_RX Correct transfer for reception 15 1 read-write USB_EP4R USB_EP4R endpoint 4 register 0x10 0x20 0x00000000 EA Endpoint address 0 4 read-write STAT_TX Status bits, for transmission transfers 4 2 read-write DTOG_TX Data Toggle, for transmission transfers 6 1 read-write CTR_TX Correct Transfer for transmission 7 1 read-write EP_KIND Endpoint kind 8 1 read-write EP_TYPE Endpoint type 9 2 read-write SETUP Setup transaction completed 11 1 read-only STAT_RX Status bits, for reception transfers 12 2 read-write DTOG_RX Data Toggle, for reception transfers 14 1 read-write CTR_RX Correct transfer for reception 15 1 read-write USB_EP5R USB_EP5R endpoint 5 register 0x14 0x20 0x00000000 EA Endpoint address 0 4 read-write STAT_TX Status bits, for transmission transfers 4 2 read-write DTOG_TX Data Toggle, for transmission transfers 6 1 read-write CTR_TX Correct Transfer for transmission 7 1 read-write EP_KIND Endpoint kind 8 1 read-write EP_TYPE Endpoint type 9 2 read-write SETUP Setup transaction completed 11 1 read-only STAT_RX Status bits, for reception transfers 12 2 read-write DTOG_RX Data Toggle, for reception transfers 14 1 read-write CTR_RX Correct transfer for reception 15 1 read-write USB_EP6R USB_EP6R endpoint 6 register 0x18 0x20 0x00000000 EA Endpoint address 0 4 read-write STAT_TX Status bits, for transmission transfers 4 2 read-write DTOG_TX Data Toggle, for transmission transfers 6 1 read-write CTR_TX Correct Transfer for transmission 7 1 read-write EP_KIND Endpoint kind 8 1 read-write EP_TYPE Endpoint type 9 2 read-write SETUP Setup transaction completed 11 1 read-only STAT_RX Status bits, for reception transfers 12 2 read-write DTOG_RX Data Toggle, for reception transfers 14 1 read-write CTR_RX Correct transfer for reception 15 1 read-write USB_EP7R USB_EP7R endpoint 7 register 0x1C 0x20 0x00000000 EA Endpoint address 0 4 read-write STAT_TX Status bits, for transmission transfers 4 2 read-write DTOG_TX Data Toggle, for transmission transfers 6 1 read-write CTR_TX Correct Transfer for transmission 7 1 read-write EP_KIND Endpoint kind 8 1 read-write EP_TYPE Endpoint type 9 2 read-write SETUP Setup transaction completed 11 1 read-only STAT_RX Status bits, for reception transfers 12 2 read-write DTOG_RX Data Toggle, for reception transfers 14 1 read-write CTR_RX Correct transfer for reception 15 1 read-write USB_CNTR USB_CNTR control register 0x40 0x20 read-write 0x00000003 FRES Force USB Reset 0 1 PDWN Power down 1 1 LPMODE Low-power mode 2 1 FSUSP Force suspend 3 1 RESUME Resume request 4 1 ESOFM Expected start of frame interrupt mask 8 1 SOFM Start of frame interrupt mask 9 1 RESETM USB reset interrupt mask 10 1 SUSPM Suspend mode interrupt mask 11 1 WKUPM Wakeup interrupt mask 12 1 ERRM Error interrupt mask 13 1 PMAOVRM Packet memory area over / underrun interrupt mask 14 1 CTRM Correct transfer interrupt mask 15 1 ISTR ISTR interrupt status register 0x44 0x20 0x00000000 EP_ID Endpoint Identifier 0 4 read-only DIR Direction of transaction 4 1 read-only ESOF Expected start frame 8 1 read-write SOF start of frame 9 1 read-write RESET reset request 10 1 read-write SUSP Suspend mode request 11 1 read-write WKUP Wakeup 12 1 read-write ERR Error 13 1 read-write PMAOVR Packet memory area over / underrun 14 1 read-write CTR Correct transfer 15 1 read-only FNR FNR frame number register 0x48 0x20 read-only 0x0000 FN Frame number 0 11 LSOF Lost SOF 11 2 LCK Locked 13 1 RXDM Receive data - line status 14 1 RXDP Receive data + line status 15 1 DADDR DADDR device address 0x4C 0x20 read-write 0x0000 ADD Device address 0 1 ADD1 Device address 1 1 ADD2 Device address 2 1 ADD3 Device address 3 1 ADD4 Device address 4 1 ADD5 Device address 5 1 ADD6 Device address 6 1 EF Enable function 7 1 BTABLE BTABLE Buffer table address 0x50 0x20 read-write 0x0000 BTABLE Buffer table 3 13 I2C1 Inter-integrated circuit I2C 0x40005400 0x0 0x400 registers I2C1_EV I2C1_EV global interrupt/EXTI Line[3:2] interrupts 31 I2C1_ER I2C1_ER 32 CR1 CR1 Control register 1 0x0 0x20 0x00000000 PE Peripheral enable 0 1 read-write TXIE TX Interrupt enable 1 1 read-write RXIE RX Interrupt enable 2 1 read-write ADDRIE Address match interrupt enable (slave only) 3 1 read-write NACKIE Not acknowledge received interrupt enable 4 1 read-write STOPIE STOP detection Interrupt enable 5 1 read-write TCIE Transfer Complete interrupt enable 6 1 read-write ERRIE Error interrupts enable 7 1 read-write DNF Digital noise filter 8 4 read-write ANFOFF Analog noise filter OFF 12 1 read-write SWRST Software reset 13 1 write-only TXDMAEN DMA transmission requests enable 14 1 read-write RXDMAEN DMA reception requests enable 15 1 read-write SBC Slave byte control 16 1 read-write NOSTRETCH Clock stretching disable 17 1 read-write WUPEN Wakeup from STOP enable 18 1 read-write GCEN General call enable 19 1 read-write SMBHEN SMBus Host address enable 20 1 read-write SMBDEN SMBus Device Default address enable 21 1 read-write ALERTEN SMBUS alert enable 22 1 read-write PECEN PEC enable 23 1 read-write CR2 CR2 Control register 2 0x4 0x20 read-write 0x00000000 PECBYTE Packet error checking byte 26 1 AUTOEND Automatic end mode (master mode) 25 1 RELOAD NBYTES reload mode 24 1 NBYTES Number of bytes 16 8 NACK NACK generation (slave mode) 15 1 STOP Stop generation (master mode) 14 1 START Start generation 13 1 HEAD10R 10-bit address header only read direction (master receiver mode) 12 1 ADD10 10-bit addressing mode (master mode) 11 1 RD_WRN Transfer direction (master mode) 10 1 SADD8 Slave address bit 9:8 (master mode) 8 2 SADD1 Slave address bit 7:1 (master mode) 1 7 SADD0 Slave address bit 0 (master mode) 0 1 OAR1 OAR1 Own address register 1 0x8 0x20 read-write 0x00000000 OA1_0 Interface address 0 1 OA1_1 Interface address 1 7 OA1_8 Interface address 8 2 OA1MODE Own Address 1 10-bit mode 10 1 OA1EN Own Address 1 enable 15 1 OAR2 OAR2 Own address register 2 0xC 0x20 read-write 0x00000000 OA2 Interface address 1 7 OA2MSK Own Address 2 masks 8 3 OA2EN Own Address 2 enable 15 1 TIMINGR TIMINGR Timing register 0x10 0x20 read-write 0x00000000 SCLL SCL low period (master mode) 0 8 SCLH SCL high period (master mode) 8 8 SDADEL Data hold time 16 4 SCLDEL Data setup time 20 4 PRESC Timing prescaler 28 4 TIMEOUTR TIMEOUTR Status register 1 0x14 0x20 read-write 0x00000000 TIMEOUTA Bus timeout A 0 12 TIDLE Idle clock timeout detection 12 1 TIMOUTEN Clock timeout enable 15 1 TIMEOUTB Bus timeout B 16 12 TEXTEN Extended clock timeout enable 31 1 ISR ISR Interrupt and Status register 0x18 0x20 0x00000001 ADDCODE Address match code (Slave mode) 17 7 read-only DIR Transfer direction (Slave mode) 16 1 read-only BUSY Bus busy 15 1 read-only ALERT SMBus alert 13 1 read-only TIMEOUT Timeout or t_low detection flag 12 1 read-only PECERR PEC Error in reception 11 1 read-only OVR Overrun/Underrun (slave mode) 10 1 read-only ARLO Arbitration lost 9 1 read-only BERR Bus error 8 1 read-only TCR Transfer Complete Reload 7 1 read-only TC Transfer Complete (master mode) 6 1 read-only STOPF Stop detection flag 5 1 read-only NACKF Not acknowledge received flag 4 1 read-only ADDR Address matched (slave mode) 3 1 read-only RXNE Receive data register not empty (receivers) 2 1 read-only TXIS Transmit interrupt status (transmitters) 1 1 read-write TXE Transmit data register empty (transmitters) 0 1 read-write ICR ICR Interrupt clear register 0x1C 0x20 write-only 0x00000000 ALERTCF Alert flag clear 13 1 TIMOUTCF Timeout detection flag clear 12 1 PECCF PEC Error flag clear 11 1 OVRCF Overrun/Underrun flag clear 10 1 ARLOCF Arbitration lost flag clear 9 1 BERRCF Bus error flag clear 8 1 STOPCF Stop detection flag clear 5 1 NACKCF Not Acknowledge flag clear 4 1 ADDRCF Address Matched flag clear 3 1 PECR PECR PEC register 0x20 0x20 read-only 0x00000000 PEC Packet error checking register 0 8 RXDR RXDR Receive data register 0x24 0x20 read-only 0x00000000 RXDATA 8-bit receive data 0 8 TXDR TXDR Transmit data register 0x28 0x20 read-write 0x00000000 TXDATA 8-bit transmit data 0 8 I2C2 0x40005800 I2C2_EV I2C2_EV global interrupt/EXTI Line[4:2] interrupts 33 I2C2_ER I2C2_ER 34 IWDG Independent watchdog IWDG 0x40003000 0x0 0x400 registers KR KR Key register 0x0 0x20 write-only 0x00000000 KEY Key value 0 16 PR PR Prescaler register 0x4 0x20 read-write 0x00000000 PR Prescaler divider 0 3 RLR RLR Reload register 0x8 0x20 read-write 0x00000FFF RL Watchdog counter reload value 0 12 SR SR Status register 0xC 0x20 read-only 0x00000000 PVU Watchdog prescaler value update 0 1 RVU Watchdog counter reload value update 1 1 WVU Watchdog counter window value update 2 1 WINR WINR Window register 0x10 0x20 read-write 0x00000FFF WIN Watchdog counter window value 0 12 WWDG Window watchdog WWDG 0x40002C00 0x0 0x400 registers WWDG Window Watchdog interrupt 0 CR CR Control register 0x0 0x20 read-write 0x0000007F WDGA Activation bit 7 1 T 7-bit counter 0 7 CFR CFR Configuration register 0x4 0x20 read-write 0x0000007F EWI Early wakeup interrupt 9 1 WDGTB Timer base 7 2 W 7-bit window value 0 7 SR SR Status register 0x8 0x20 read-write 0x00000000 EWIF Early wakeup interrupt flag 0 1 RTC Real-time clock RTC 0x40002800 0x0 0x400 registers RTC_WKUP RTC 3 RTC_ALARM RTC alarm interrupt 41 TR TR time register 0x0 0x20 read-write 0x00000000 PM AM/PM notation 22 1 HT Hour tens in BCD format 20 2 HU Hour units in BCD format 16 4 MNT Minute tens in BCD format 12 3 MNU Minute units in BCD format 8 4 ST Second tens in BCD format 4 3 SU Second units in BCD format 0 4 DR DR date register 0x4 0x20 read-write 0x00002101 YT Year tens in BCD format 20 4 YU Year units in BCD format 16 4 WDU Week day units 13 3 MT Month tens in BCD format 12 1 MU Month units in BCD format 8 4 DT Date tens in BCD format 4 2 DU Date units in BCD format 0 4 CR CR control register 0x8 0x20 read-write 0x00000000 WCKSEL Wakeup clock selection 0 3 TSEDGE Time-stamp event active edge 3 1 REFCKON Reference clock detection enable (50 or 60 Hz) 4 1 BYPSHAD Bypass the shadow registers 5 1 FMT Hour format 6 1 ALRAE Alarm A enable 8 1 ALRBE Alarm B enable 9 1 WUTE Wakeup timer enable 10 1 TSE Time stamp enable 11 1 ALRAIE Alarm A interrupt enable 12 1 ALRBIE Alarm B interrupt enable 13 1 WUTIE Wakeup timer interrupt enable 14 1 TSIE Time-stamp interrupt enable 15 1 ADD1H Add 1 hour (summer time change) 16 1 SUB1H Subtract 1 hour (winter time change) 17 1 BKP Backup 18 1 COSEL Calibration output selection 19 1 POL Output polarity 20 1 OSEL Output selection 21 2 COE Calibration output enable 23 1 ISR ISR initialization and status register 0xC 0x20 0x00000007 TAMP1F Tamper detection flag 13 1 read-write TSOVF Time-stamp overflow flag 12 1 read-write TSF Time-stamp flag 11 1 read-write WUTF Wakeup timer flag 10 1 read-write ALRBF Alarm B flag 9 1 read-write ALRAF Alarm A flag 8 1 read-write INIT Initialization mode 7 1 read-write INITF Initialization flag 6 1 read-only RSF Registers synchronization flag 5 1 read-write INITS Initialization status flag 4 1 read-only WUTWF Wakeup timer write flag 2 1 read-only ALRBWF Alarm B write flag 1 1 read-only ALRAWF Alarm A write flag 0 1 read-only SHPF Shift operation pending 3 1 read-write TAMP2F RTC_TAMP2 detection flag 14 1 read-write TAMP3F RTC_TAMP3 detection flag 15 1 read-write RECALPF Recalibration pending Flag 16 1 read-only PRER PRER prescaler register 0x10 0x20 read-write 0x007F00FF PREDIV_A Asynchronous prescaler factor 16 7 PREDIV_S Synchronous prescaler factor 0 15 WUTR WUTR wakeup timer register 0x14 0x20 read-write 0x0000FFFF WUT Wakeup auto-reload value bits 0 16 ALRMAR ALRMAR alarm A register 0x1C 0x20 read-write 0x00000000 MSK4 Alarm A date mask 31 1 WDSEL Week day selection 30 1 DT Date tens in BCD format 28 2 DU Date units or day in BCD format 24 4 MSK3 Alarm A hours mask 23 1 PM AM/PM notation 22 1 HT Hour tens in BCD format 20 2 HU Hour units in BCD format 16 4 MSK2 Alarm A minutes mask 15 1 MNT Minute tens in BCD format 12 3 MNU Minute units in BCD format 8 4 MSK1 Alarm A seconds mask 7 1 ST Second tens in BCD format 4 3 SU Second units in BCD format 0 4 ALRMBR ALRMBR alarm B register 0x20 0x20 read-write 0x00000000 MSK4 Alarm B date mask 31 1 WDSEL Week day selection 30 1 DT Date tens in BCD format 28 2 DU Date units or day in BCD format 24 4 MSK3 Alarm B hours mask 23 1 PM AM/PM notation 22 1 HT Hour tens in BCD format 20 2 HU Hour units in BCD format 16 4 MSK2 Alarm B minutes mask 15 1 MNT Minute tens in BCD format 12 3 MNU Minute units in BCD format 8 4 MSK1 Alarm B seconds mask 7 1 ST Second tens in BCD format 4 3 SU Second units in BCD format 0 4 WPR WPR write protection register 0x24 0x20 write-only 0x00000000 KEY Write protection key 0 8 SSR SSR sub second register 0x28 0x20 read-only 0x00000000 SS Sub second value 0 16 SHIFTR SHIFTR shift control register 0x2C 0x20 write-only 0x00000000 ADD1S Add one second 31 1 SUBFS Subtract a fraction of a second 0 15 TSTR TSTR time stamp time register 0x30 0x20 read-only 0x00000000 SU Second units in BCD format 0 4 ST Second tens in BCD format 4 3 MNU Minute units in BCD format 8 4 MNT Minute tens in BCD format 12 3 HU Hour units in BCD format 16 4 HT Hour tens in BCD format 20 2 PM AM/PM notation 22 1 TSDR TSDR time stamp date register 0x34 0x20 read-only 0x00000000 WDU Week day units 13 3 MT Month tens in BCD format 12 1 MU Month units in BCD format 8 4 DT Date tens in BCD format 4 2 DU Date units in BCD format 0 4 TSSSR TSSSR timestamp sub second register 0x38 0x20 read-only 0x00000000 SS Sub second value 0 16 CALR CALR calibration register 0x3C 0x20 read-write 0x00000000 CALP Increase frequency of RTC by 488.5 ppm 15 1 CALW8 Use an 8-second calibration cycle period 14 1 CALW16 Use a 16-second calibration cycle period 13 1 CALM Calibration minus 0 9 TAFCR TAFCR tamper and alternate function configuration register 0x40 0x20 read-write 0x00000000 TAMP1E Tamper 1 detection enable 0 1 TAMP1TRG Active level for tamper 1 1 1 TAMPIE Tamper interrupt enable 2 1 TAMP2E Tamper 2 detection enable 3 1 TAMP2TRG Active level for tamper 2 4 1 TAMPTS Activate timestamp on tamper detection event 7 1 TAMPFREQ Tamper sampling frequency 8 3 TAMPFLT Tamper filter count 11 2 TAMPPRCH Tamper precharge duration 13 2 TAMPPUDIS TAMPER pull-up disable 15 1 PC13VALUE PC13 value 18 1 PC13MODE PC13 mode 19 1 PC14VALUE PC14 value 20 1 PC14MODE PC 14 mode 21 1 PC15VALUE PC15 value 22 1 PC15MODE PC15 mode 23 1 ALRMASSR ALRMASSR alarm A sub second register 0x44 0x20 read-write 0x00000000 MASKSS Mask the most-significant bits starting at this bit 24 4 SS Sub seconds value 0 15 ALRMBSSR ALRMBSSR alarm B sub second register 0x48 0x20 read-write 0x00000000 MASKSS Mask the most-significant bits starting at this bit 24 4 SS Sub seconds value 0 15 BKP0R BKP0R backup register 0x50 0x20 read-write 0x00000000 BKP BKP 0 32 BKP1R BKP1R backup register 0x54 0x20 read-write 0x00000000 BKP BKP 0 32 BKP2R BKP2R backup register 0x58 0x20 read-write 0x00000000 BKP BKP 0 32 BKP3R BKP3R backup register 0x5C 0x20 read-write 0x00000000 BKP BKP 0 32 BKP4R BKP4R backup register 0x60 0x20 read-write 0x00000000 BKP BKP 0 32 BKP5R BKP5R backup register 0x64 0x20 read-write 0x00000000 BKP BKP 0 32 BKP6R BKP6R backup register 0x68 0x20 read-write 0x00000000 BKP BKP 0 32 BKP7R BKP7R backup register 0x6C 0x20 read-write 0x00000000 BKP BKP 0 32 BKP8R BKP8R backup register 0x70 0x20 read-write 0x00000000 BKP BKP 0 32 BKP9R BKP9R backup register 0x74 0x20 read-write 0x00000000 BKP BKP 0 32 BKP10R BKP10R backup register 0x78 0x20 read-write 0x00000000 BKP BKP 0 32 BKP11R BKP11R backup register 0x7C 0x20 read-write 0x00000000 BKP BKP 0 32 BKP12R BKP12R backup register 0x80 0x20 read-write 0x00000000 BKP BKP 0 32 BKP13R BKP13R backup register 0x84 0x20 read-write 0x00000000 BKP BKP 0 32 BKP14R BKP14R backup register 0x88 0x20 read-write 0x00000000 BKP BKP 0 32 BKP15R BKP15R backup register 0x8C 0x20 read-write 0x00000000 BKP BKP 0 32 BKP16R BKP16R backup register 0x90 0x20 read-write 0x00000000 BKP BKP 0 32 BKP17R BKP17R backup register 0x94 0x20 read-write 0x00000000 BKP BKP 0 32 BKP18R BKP18R backup register 0x98 0x20 read-write 0x00000000 BKP BKP 0 32 BKP19R BKP19R backup register 0x9C 0x20 read-write 0x00000000 BKP BKP 0 32 BKP20R BKP20R backup register 0xA0 0x20 read-write 0x00000000 BKP BKP 0 32 BKP21R BKP21R backup register 0xA4 0x20 read-write 0x00000000 BKP BKP 0 32 BKP22R BKP22R backup register 0xA8 0x20 read-write 0x00000000 BKP BKP 0 32 BKP23R BKP23R backup register 0xAC 0x20 read-write 0x00000000 BKP BKP 0 32 BKP24R BKP24R backup register 0xB0 0x20 read-write 0x00000000 BKP BKP 0 32 BKP25R BKP25R backup register 0xB4 0x20 read-write 0x00000000 BKP BKP 0 32 BKP26R BKP26R backup register 0xB8 0x20 read-write 0x00000000 BKP BKP 0 32 BKP27R BKP27R backup register 0xBC 0x20 read-write 0x00000000 BKP BKP 0 32 BKP28R BKP28R backup register 0xC0 0x20 read-write 0x00000000 BKP BKP 0 32 BKP29R BKP29R backup register 0xC4 0x20 read-write 0x00000000 BKP BKP 0 32 BKP30R BKP30R backup register 0xC8 0x20 read-write 0x00000000 BKP BKP 0 32 BKP31R BKP31R backup register 0xCC 0x20 read-write 0x00000000 BKP BKP 0 32 SDADC1 Sigma-delta analog-to-digital converter SDADC 0x40016000 0x0 0x400 registers SDADC1 ADC sigma delta 1 (SDADC1) global interrupt 61 CR1 CR1 control register 1 0x0 0x20 read-write 0x00000000 EOCALIE End of calibration interrupt enable 0 1 JEOCIE Injected end of conversion interrupt enable 1 1 JOVRIE Injected data overrun interrupt enable 2 1 REOCIE Regular end of conversion interrupt enable 3 1 ROVRIE Regular data overrun interrupt enable 4 1 REFV Reference voltage selection 8 2 SLOWCK Slow clock mode enable 10 1 SBI Enter Standby mode when idle 11 1 PDI Enter power down mode when idle 12 1 JSYNC Launch a injected conversion synchronously with SDADC1 14 1 RSYNC Launch regular conversion synchronously with SDADC1 15 1 JDMAEN DMA channel enabled to read data for the injected channel group 16 1 RDMAEN DMA channel enabled to read data for the regular channel 17 1 INIT Initialization mode request 31 1 CR2 CR2 control register 2 0x4 0x20 read-write 0x00000000 FAST Fast conversion mode selection 24 1 RSWSTART Software start of a conversion on the regular channel 23 1 RCONT Continuous mode selection for regular conversions 22 1 RCH Regular channel selection 16 4 JSWSTART Start a conversion of the injected group of channels 15 1 JEXTEN Trigger enable and trigger edge selection for injected conversions 13 2 JEXTSEL Trigger signal selection for launching injected conversions 8 4 JDS Delay start of injected conversions. 6 1 JCONT Continuous mode selection for injected conversions 5 1 STARTCALIB Start calibration 4 1 CALIBCNT Number of calibration sequences to be performed (number of valid configurations) 1 2 ADON SDADC enable 0 1 ISR ISR interrupt and status register 0x8 0x20 read-only 0x00000000 INITRDY Initialization mode is ready 31 1 STABIP Stabilization in progress status 15 1 RCIP Regular conversion in progress status 14 1 JCIP Injected conversion in progress status 13 1 CALIBIP Calibration in progress status 12 1 ROVRF Regular conversion overrun flag 4 1 REOCF End of regular conversion flag 3 1 JOVRF Injected conversion overrun flag 2 1 JEOCF End of injected conversion flag 1 1 EOCALF End of calibration flag 0 1 CLRISR CLRISR interrupt and status clear register 0xC 0x20 read-write 0x00000000 CLRROVRF Clear the regular conversion overrun flag 4 1 CLRJOVRF Clear the injected conversion overrun flag 2 1 CLREOCALF Clear the end of calibration flag 0 1 JCHGR JCHGR injected channel group selection register 0x14 0x20 read-write 0x00000001 JCHG Injected channel group selection 0 9 CONF0R CONF0R configuration 0 register 0x20 0x20 read-write 0x00000000 COMMON0 Common mode for configuration 0 30 2 SE0 Single-ended mode for configuration 0 26 2 GAIN0 Gain setting for configuration 0 20 3 OFFSET0 Twelve-bit calibration offset for configuration 0 0 12 CONF1R CONF1R configuration 1 register 0x24 0x20 read-write 0x00000000 COMMON1 Common mode for configuration 1 30 2 SE1 Single-ended mode for configuration 1 26 2 GAIN1 Gain setting for configuration 1 20 3 OFFSET1 Twelve-bit calibration offset for configuration 1 0 12 CONF2R CONF2R configuration 2 register 0x28 0x20 read-write 0x00000000 COMMON2 Common mode for configuration 2 30 2 SE2 Single-ended mode for configuration 2 26 2 GAIN2 Gain setting for configuration 2 20 3 OFFSET2 Twelve-bit calibration offset for configuration 2 0 12 CONFCHR1 CONFCHR1 channel configuration register 1 0x40 0x20 read-write 0x00000000 CONFCH7 CONFCH7 28 2 CONFCH6 CONFCH6 24 2 CONFCH5 CONFCH5 20 2 CONFCH4 CONFCH4 16 2 CONFCH3 CONFCH3 12 2 CONFCH2 CONFCH2 8 2 CONFCH1 CONFCH1 4 2 CONFCH0 CONFCH0 0 2 CONFCHR2 CONFCHR2 channel configuration register 2 0x44 0x20 read-write 0x00000000 CONFCH8 Channel 8 configuration 0 2 JDATAR JDATAR data register for injected group 0x60 0x20 read-only 0x00000000 JDATACH Injected channel most recently converted 25 4 JDATA Injected group conversion data 0 16 RDATAR RDATAR data register for the regular channel 0x64 0x20 read-only 0x00000000 RDATA Regular channel conversion data 0 16 JDATA12R JDATA12R SDADC1 and SDADC2 injected data register 0x70 0x20 read-only 0x00000000 JDATA2 Injected group conversion data for SDADC2 16 16 JDATA1 Injected group conversion data for SDADC1 0 16 RDATA12R RDATA12R SDADC1 and SDADC2 regular data register 0x74 0x20 read-only 0x00000000 RDATA2 Regular conversion data for SDADC2 16 16 RDATA1 Regular conversion data for SDADC1 0 16 JDATA13R JDATA13R SDADC1 and SDADC3 injected data register 0x78 0x20 read-only 0x00000000 JDATA3 Injected group conversion data for SDADC3 16 16 JDATA1 Injected group conversion data for SDADC1 0 16 RDATA13R RDATA13R SDADC1 and SDADC3 regular data register 0x7C 0x20 read-only 0x00000000 RDATA3 Regular conversion data for SDADC3 16 16 RDATA1 Regular conversion data for SDADC1 0 16 SDADC2 0x40016400 SDADC2 ADC sigma delta 2 (SDADC2) global interrupt 62 SDADC3 0x40016800 SDADC3 ADC sigma delta 3 (SDADC3) global interrupt 63 DAC2 Digital-to-analog converter DAC2 0x40009800 0x0 0x400 registers CR CR control register 0x0 0x20 read-write 0x00000000 DMAUDRIE1 DAC channel1 DMA Underrun Interrupt enable 13 1 DMAEN1 DAC channel1 DMA enable 12 1 MAMP13 DAC channel1 mask/amplitude selector 11 1 MAMP12 MAMP12 10 1 MAMP11 MAMP11 9 1 MAMP10 MAMP10 8 1 WAVE1 DAC channel1 noise/triangle wave generation enable 7 1 WAVE2 WAVE2 6 1 TSEL1 DAC channel1 trigger selection 3 3 TEN1 DAC channel1 trigger enable 2 1 BOFF1 DAC channel1 output buffer disable 1 1 EN1 DAC channel1 enable 0 1 SWTRIGR SWTRIGR software trigger register 0x4 0x20 write-only 0x00000000 SWTRIG1 DAC channel1 software trigger 0 1 DHR12R1 DHR12R1 channel1 12-bit right-aligned data holding register 0x8 0x20 read-write 0x00000000 DACC1DHR DAC channel1 12-bit right-aligned data 0 12 DHR12L1 DHR12L1 DAC channel1 12-bit left aligned data holding register 0xC 0x20 read-write 0x00000000 DACC1DHR DAC channel1 12-bit left-aligned data 4 12 DHR8R1 DHR8R1 DAC channel1 8-bit right aligned data holding register 0x10 0x20 read-write 0x00000000 DACC1DHR DAC channel1 8-bit right-aligned data 0 8 DOR1 DOR1 DAC channel1 data output register 0x2C 0x20 read-only 0x00000000 DACC1DOR DAC channel1 data output 0 12 SR SR DAC status register 0x34 0x20 read-write 0x00000000 DMAUDR1 DAC channel1 DMA underrun flag 13 1 TIM6 Basic timers TIM 0x40001000 0x0 0x400 registers TIM6_DAC1 TIM6 global, DAC1 Cahnnel1 and Cahnnel2 underrun error Interrupts 54 CR1 CR1 control register 1 0x0 0x20 read-write 0x0000 ARPE Auto-reload preload enable 7 1 OPM One-pulse mode 3 1 URS Update request source 2 1 UDIS Update disable 1 1 CEN Counter enable 0 1 CR2 CR2 control register 2 0x4 0x20 read-write 0x0000 MMS Master mode selection 4 3 DIER DIER DMA/Interrupt enable register 0xC 0x20 read-write 0x0000 UDE Update DMA request enable 8 1 UIE Update interrupt enable 0 1 SR SR status register 0x10 0x20 read-write 0x0000 UIF Update interrupt flag 0 1 EGR EGR event generation register 0x14 0x20 write-only 0x0000 UG Update generation 0 1 CNT CNT counter 0x24 0x20 read-write 0x00000000 CNT Low counter value 0 16 PSC PSC prescaler 0x28 0x20 read-write 0x0000 PSC Prescaler value 0 16 ARR ARR auto-reload register 0x2C 0x20 read-write 0x00000000 ARR Low Auto-reload value 0 16 TIM7 0x40001400 TIM7 Timer 7 global interrupt 55 TIM18 0x40009C00 TIM18_DAC Timer 18 global interrupt/DAC3 underrun interrupt 27 TIM13 General purpose timers TIM 0x40001C00 0x0 0x400 registers TIM13 Timer 13 global interrupt 44 CR1 CR1 control register 1 0x0 0x20 read-write 0x0000 CKD Clock division 8 2 ARPE Auto-reload preload enable 7 1 URS Update request source 2 1 UDIS Update disable 1 1 CEN Counter enable 0 1 DIER DIER DMA/Interrupt enable register 0xC 0x20 read-write 0x0000 CC1IE Capture/Compare 1 interrupt enable 1 1 UIE Update interrupt enable 0 1 SR SR status register 0x10 0x20 read-write 0x0000 CC1OF Capture/Compare 1 overcapture flag 9 1 CC1IF Capture/compare 1 interrupt flag 1 1 UIF Update interrupt flag 0 1 EGR EGR event generation register 0x14 0x20 write-only 0x0000 CC1G Capture/compare 1 generation 1 1 UG Update generation 0 1 CCMR1_Output CCMR1_Output capture/compare mode register (output mode) 0x18 0x20 read-write 0x00000000 CC1S Capture/Compare 1 selection 0 2 OC1FE Output compare 1 fast enable 2 1 OC1PE Output Compare 1 preload enable 3 1 OC1M Output Compare 1 mode 4 3 CCMR1_Input CCMR1_Input capture/compare mode register (input mode) CCMR1_Output 0x18 0x20 read-write 0x00000000 IC1F Input capture 1 filter 4 4 IC1PSC Input capture 1 prescaler 2 2 CC1S Capture/Compare 1 selection 0 2 CCER CCER capture/compare enable register 0x20 0x20 read-write 0x0000 CC1NP Capture/Compare 1 output Polarity 3 1 CC1P Capture/Compare 1 output Polarity 1 1 CC1E Capture/Compare 1 output enable 0 1 CNT CNT counter 0x24 0x20 read-write 0x00000000 CNT counter value 0 16 PSC PSC prescaler 0x28 0x20 read-write 0x0000 PSC Prescaler value 0 16 ARR ARR auto-reload register 0x2C 0x20 read-write 0x00000000 ARR Auto-reload value 0 16 CCR1 CCR1 capture/compare register 1 0x34 0x20 read-write 0x00000000 CCR1 Capture/Compare 1 value 0 16 TIM14 0x40002000 TIM14 Timer 14 global interrupt 45 TIM12 General purpose timers TIM 0x40001800 0x0 0x400 registers TIM12 Timer 12 global interrupt 43 CR1 CR1 control register 1 0x0 0x20 read-write 0x0000 CKD Clock division 8 2 ARPE Auto-reload preload enable 7 1 OPM One-pulse mode 3 1 URS Update request source 2 1 UDIS Update disable 1 1 CEN Counter enable 0 1 SMCR SMCR slave mode control register 0x8 0x20 read-write 0x0000 MSM Master/Slave mode 7 1 TS Trigger selection 4 3 SMS Slave mode selection 0 3 DIER DIER DMA/Interrupt enable register 0xC 0x20 read-write 0x0000 TIE Trigger interrupt enable 6 1 CC2IE Capture/Compare 2 interrupt enable 2 1 CC1IE Capture/Compare 1 interrupt enable 1 1 UIE Update interrupt enable 0 1 SR SR status register 0x10 0x20 read-write 0x0000 CC2OF Capture/compare 2 overcapture flag 10 1 CC1OF Capture/Compare 1 overcapture flag 9 1 TIF Trigger interrupt flag 6 1 CC2IF Capture/Compare 2 interrupt flag 2 1 CC1IF Capture/compare 1 interrupt flag 1 1 UIF Update interrupt flag 0 1 EGR EGR event generation register 0x14 0x20 write-only 0x0000 TG Trigger generation 6 1 CC2G Capture/compare 2 generation 2 1 CC1G Capture/compare 1 generation 1 1 UG Update generation 0 1 CCMR1_Output CCMR1_Output capture/compare mode register (output mode) 0x18 0x20 read-write 0x00000000 OC2M Output Compare 2 mode 12 3 OC2PE Output Compare 2 preload enable 11 1 OC2FE Output Compare 2 fast enable 10 1 CC2S Capture/Compare 2 selection 8 2 OC1M Output Compare 1 mode 4 3 OC1PE Output Compare 1 preload enable 3 1 OC1FE Output Compare 1 fast enable 2 1 CC1S Capture/Compare 1 selection 0 2 CCMR1_Input CCMR1_Input capture/compare mode register 1 (input mode) CCMR1_Output 0x18 0x20 read-write 0x00000000 IC2F Input capture 2 filter 12 4 IC2PSC Input capture 2 prescaler 10 2 CC2S Capture/Compare 2 selection 8 2 IC1F Input capture 1 filter 4 3 IC1PSC Input capture 1 prescaler 2 2 CC1S Capture/Compare 1 selection 0 2 CCER CCER capture/compare enable register 0x20 0x20 read-write 0x0000 CC2NP Capture/Compare 2 output Polarity 7 1 CC2P Capture/Compare 2 output Polarity 5 1 CC2E Capture/Compare 2 output enable 4 1 CC1NP Capture/Compare 1 output Polarity 3 1 CC1P Capture/Compare 1 output Polarity 1 1 CC1E Capture/Compare 1 output enable 0 1 CNT CNT counter 0x24 0x20 read-write 0x00000000 CNT counter value 0 16 PSC PSC prescaler 0x28 0x20 read-write 0x0000 PSC Prescaler value 0 16 ARR ARR auto-reload register 0x2C 0x20 read-write 0x00000000 ARR Auto-reload value 0 16 CCR1 CCR1 capture/compare register 1 0x34 0x20 read-write 0x00000000 CCR1 Capture/Compare 1 value 0 16 CCR2 CCR2 capture/compare register 2 0x38 0x20 read-write 0x00000000 CCR2 Capture/Compare 2 value 0 16 DAC1 Digital-to-analog converter DAC 0x40007400 0x0 0x400 registers TIM6_DAC1 TIM6 global, DAC1 Cahnnel1 and Cahnnel2 underrun error Interrupts 54 CR CR control register 0x0 0x20 read-write 0x00000000 DMAUDRIE2 DAC channel2 DMA underrun interrupt enable 29 1 DMAEN2 DAC channel2 DMA enable 28 1 MAMP2 DAC channel2 mask/amplitude selector 24 4 WAVE2 DAC channel2 noise/triangle wave generation enable 22 2 TSEL2 DAC channel2 trigger selection 19 3 TEN2 DAC channel2 trigger enable 18 1 BOFF2 DAC channel2 output buffer disable 17 1 EN2 DAC channel2 enable 16 1 DMAUDRIE1 DAC channel1 DMA Underrun Interrupt enable 13 1 DMAEN1 DAC channel1 DMA enable 12 1 MAMP1 DAC channel1 mask/amplitude selector 8 4 WAVE1 DAC channel1 noise/triangle wave generation enable 6 2 TSEL1 DAC channel1 trigger selection 3 3 TEN1 DAC channel1 trigger enable 2 1 BOFF1 DAC channel1 output buffer disable 1 1 EN1 DAC channel1 enable 0 1 SWTRIGR SWTRIGR software trigger register 0x4 0x20 write-only 0x00000000 SWTRIG2 DAC channel2 software trigger 1 1 SWTRIG1 DAC channel1 software trigger 0 1 DHR12R1 DHR12R1 channel1 12-bit right-aligned data holding register 0x8 0x20 read-write 0x00000000 DACC1DHR DAC channel1 12-bit right-aligned data 0 12 DHR12L1 DHR12L1 channel1 12-bit left aligned data holding register 0xC 0x20 read-write 0x00000000 DACC1DHR DAC channel1 12-bit left-aligned data 4 12 DHR8R1 DHR8R1 channel1 8-bit right aligned data holding register 0x10 0x20 read-write 0x00000000 DACC1DHR DAC channel1 8-bit right-aligned data 0 8 DHR12R2 DHR12R2 channel2 12-bit right aligned data holding register 0x14 0x20 read-write 0x00000000 DACC2DHR DAC channel2 12-bit right-aligned data 0 12 DHR12L2 DHR12L2 channel2 12-bit left aligned data holding register 0x18 0x20 read-write 0x00000000 DACC2DHR DAC channel2 12-bit left-aligned data 4 12 DHR8R2 DHR8R2 channel2 8-bit right-aligned data holding register 0x1C 0x20 read-write 0x00000000 DACC2DHR DAC channel2 8-bit right-aligned data 0 8 DHR12RD DHR12RD Dual DAC 12-bit right-aligned data holding register 0x20 0x20 read-write 0x00000000 DACC2DHR DAC channel2 12-bit right-aligned data 16 12 DACC1DHR DAC channel1 12-bit right-aligned data 0 12 DHR12LD DHR12LD DUAL DAC 12-bit left aligned data holding register 0x24 0x20 read-write 0x00000000 DACC2DHR DAC channel2 12-bit left-aligned data 20 12 DACC1DHR DAC channel1 12-bit left-aligned data 4 12 DHR8RD DHR8RD DUAL DAC 8-bit right aligned data holding register 0x28 0x20 read-write 0x00000000 DACC2DHR DAC channel2 8-bit right-aligned data 8 8 DACC1DHR DAC channel1 8-bit right-aligned data 0 8 DOR1 DOR1 channel1 data output register 0x2C 0x20 read-only 0x00000000 DACC1DOR DAC channel1 data output 0 12 DOR2 DOR2 channel2 data output register 0x30 0x20 read-only 0x00000000 DACC2DOR DAC channel2 data output 0 12 SR SR status register 0x34 0x20 read-write 0x00000000 DMAUDR2 DAC channel2 DMA underrun flag 29 1 DMAUDR1 DAC channel1 DMA underrun flag 13 1 NVIC Nested Vectored Interrupt Controller NVIC 0xE000E100 0x0 0x355 registers ISER0 ISER0 Interrupt Set-Enable Register 0x0 0x20 read-write 0x00000000 SETENA SETENA 0 32 ISER1 ISER1 Interrupt Set-Enable Register 0x4 0x20 read-write 0x00000000 SETENA SETENA 0 32 ISER2 ISER2 Interrupt Set-Enable Register 0x8 0x20 read-write 0x00000000 SETENA SETENA 0 32 ICER0 ICER0 Interrupt Clear-Enable Register 0x80 0x20 read-write 0x00000000 CLRENA CLRENA 0 32 ICER1 ICER1 Interrupt Clear-Enable Register 0x84 0x20 read-write 0x00000000 CLRENA CLRENA 0 32 ICER2 ICER2 Interrupt Clear-Enable Register 0x88 0x20 read-write 0x00000000 CLRENA CLRENA 0 32 ISPR0 ISPR0 Interrupt Set-Pending Register 0x100 0x20 read-write 0x00000000 SETPEND SETPEND 0 32 ISPR1 ISPR1 Interrupt Set-Pending Register 0x104 0x20 read-write 0x00000000 SETPEND SETPEND 0 32 ISPR2 ISPR2 Interrupt Set-Pending Register 0x108 0x20 read-write 0x00000000 SETPEND SETPEND 0 32 ICPR0 ICPR0 Interrupt Clear-Pending Register 0x180 0x20 read-write 0x00000000 CLRPEND CLRPEND 0 32 ICPR1 ICPR1 Interrupt Clear-Pending Register 0x184 0x20 read-write 0x00000000 CLRPEND CLRPEND 0 32 ICPR2 ICPR2 Interrupt Clear-Pending Register 0x188 0x20 read-write 0x00000000 CLRPEND CLRPEND 0 32 IABR0 IABR0 Interrupt Active Bit Register 0x200 0x20 read-only 0x00000000 ACTIVE ACTIVE 0 32 IABR1 IABR1 Interrupt Active Bit Register 0x204 0x20 read-only 0x00000000 ACTIVE ACTIVE 0 32 IABR2 IABR2 Interrupt Active Bit Register 0x208 0x20 read-only 0x00000000 ACTIVE ACTIVE 0 32 IPR0 IPR0 Interrupt Priority Register 0x300 0x20 read-write 0x00000000 IPR_N0 IPR_N0 0 8 IPR_N1 IPR_N1 8 8 IPR_N2 IPR_N2 16 8 IPR_N3 IPR_N3 24 8 IPR1 IPR1 Interrupt Priority Register 0x304 0x20 read-write 0x00000000 IPR_N0 IPR_N0 0 8 IPR_N1 IPR_N1 8 8 IPR_N2 IPR_N2 16 8 IPR_N3 IPR_N3 24 8 IPR2 IPR2 Interrupt Priority Register 0x308 0x20 read-write 0x00000000 IPR_N0 IPR_N0 0 8 IPR_N1 IPR_N1 8 8 IPR_N2 IPR_N2 16 8 IPR_N3 IPR_N3 24 8 IPR3 IPR3 Interrupt Priority Register 0x30C 0x20 read-write 0x00000000 IPR_N0 IPR_N0 0 8 IPR_N1 IPR_N1 8 8 IPR_N2 IPR_N2 16 8 IPR_N3 IPR_N3 24 8 IPR4 IPR4 Interrupt Priority Register 0x310 0x20 read-write 0x00000000 IPR_N0 IPR_N0 0 8 IPR_N1 IPR_N1 8 8 IPR_N2 IPR_N2 16 8 IPR_N3 IPR_N3 24 8 IPR5 IPR5 Interrupt Priority Register 0x314 0x20 read-write 0x00000000 IPR_N0 IPR_N0 0 8 IPR_N1 IPR_N1 8 8 IPR_N2 IPR_N2 16 8 IPR_N3 IPR_N3 24 8 IPR6 IPR6 Interrupt Priority Register 0x318 0x20 read-write 0x00000000 IPR_N0 IPR_N0 0 8 IPR_N1 IPR_N1 8 8 IPR_N2 IPR_N2 16 8 IPR_N3 IPR_N3 24 8 IPR7 IPR7 Interrupt Priority Register 0x31C 0x20 read-write 0x00000000 IPR_N0 IPR_N0 0 8 IPR_N1 IPR_N1 8 8 IPR_N2 IPR_N2 16 8 IPR_N3 IPR_N3 24 8 IPR8 IPR8 Interrupt Priority Register 0x320 0x20 read-write 0x00000000 IPR_N0 IPR_N0 0 8 IPR_N1 IPR_N1 8 8 IPR_N2 IPR_N2 16 8 IPR_N3 IPR_N3 24 8 IPR9 IPR9 Interrupt Priority Register 0x324 0x20 read-write 0x00000000 IPR_N0 IPR_N0 0 8 IPR_N1 IPR_N1 8 8 IPR_N2 IPR_N2 16 8 IPR_N3 IPR_N3 24 8 IPR10 IPR10 Interrupt Priority Register 0x328 0x20 read-write 0x00000000 IPR_N0 IPR_N0 0 8 IPR_N1 IPR_N1 8 8 IPR_N2 IPR_N2 16 8 IPR_N3 IPR_N3 24 8 IPR11 IPR11 Interrupt Priority Register 0x32C 0x20 read-write 0x00000000 IPR_N0 IPR_N0 0 8 IPR_N1 IPR_N1 8 8 IPR_N2 IPR_N2 16 8 IPR_N3 IPR_N3 24 8 IPR12 IPR12 Interrupt Priority Register 0x330 0x20 read-write 0x00000000 IPR_N0 IPR_N0 0 8 IPR_N1 IPR_N1 8 8 IPR_N2 IPR_N2 16 8 IPR_N3 IPR_N3 24 8 IPR13 IPR13 Interrupt Priority Register 0x334 0x20 read-write 0x00000000 IPR_N0 IPR_N0 0 8 IPR_N1 IPR_N1 8 8 IPR_N2 IPR_N2 16 8 IPR_N3 IPR_N3 24 8 IPR14 IPR14 Interrupt Priority Register 0x338 0x20 read-write 0x00000000 IPR_N0 IPR_N0 0 8 IPR_N1 IPR_N1 8 8 IPR_N2 IPR_N2 16 8 IPR_N3 IPR_N3 24 8 IPR15 IPR15 Interrupt Priority Register 0x33C 0x20 read-write 0x00000000 IPR_N0 IPR_N0 0 8 IPR_N1 IPR_N1 8 8 IPR_N2 IPR_N2 16 8 IPR_N3 IPR_N3 24 8 IPR16 IPR16 Interrupt Priority Register 0x340 0x20 read-write 0x00000000 IPR_N0 IPR_N0 0 8 IPR_N1 IPR_N1 8 8 IPR_N2 IPR_N2 16 8 IPR_N3 IPR_N3 24 8 IPR17 IPR17 Interrupt Priority Register 0x344 0x20 read-write 0x00000000 IPR_N0 IPR_N0 0 8 IPR_N1 IPR_N1 8 8 IPR_N2 IPR_N2 16 8 IPR_N3 IPR_N3 24 8 IPR18 IPR18 Interrupt Priority Register 0x348 0x20 read-write 0x00000000 IPR_N0 IPR_N0 0 8 IPR_N1 IPR_N1 8 8 IPR_N2 IPR_N2 16 8 IPR_N3 IPR_N3 24 8 IPR19 IPR19 Interrupt Priority Register 0x34C 0x20 read-write 0x00000000 IPR_N0 IPR_N0 0 8 IPR_N1 IPR_N1 8 8 IPR_N2 IPR_N2 16 8 IPR_N3 IPR_N3 24 8 IPR20 IPR20 Interrupt Priority Register 0x350 0x20 read-write 0x00000000 IPR_N0 IPR_N0 0 8 IPR_N1 IPR_N1 8 8 IPR_N2 IPR_N2 16 8 IPR_N3 IPR_N3 24 8 FPU Floting point unit FPU 0xE000EF34 0x0 0xD registers FPU Floating point unit interrupt 81 FPCCR FPCCR Floating-point context control register 0x0 0x20 read-write 0x00000000 LSPACT LSPACT 0 1 USER USER 1 1 THREAD THREAD 3 1 HFRDY HFRDY 4 1 MMRDY MMRDY 5 1 BFRDY BFRDY 6 1 MONRDY MONRDY 8 1 LSPEN LSPEN 30 1 ASPEN ASPEN 31 1 FPCAR FPCAR Floating-point context address register 0x4 0x20 read-write 0x00000000 ADDRESS Location of unpopulated floating-point 3 29 FPSCR FPSCR Floating-point status control register 0x8 0x20 read-write 0x00000000 IOC Invalid operation cumulative exception bit 0 1 DZC Division by zero cumulative exception bit. 1 1 OFC Overflow cumulative exception bit 2 1 UFC Underflow cumulative exception bit 3 1 IXC Inexact cumulative exception bit 4 1 IDC Input denormal cumulative exception bit. 7 1 RMode Rounding Mode control field 22 2 FZ Flush-to-zero mode control bit: 24 1 DN Default NaN mode control bit 25 1 AHP Alternative half-precision control bit 26 1 V Overflow condition code flag 28 1 C Carry condition code flag 29 1 Z Zero condition code flag 30 1 N Negative condition code flag 31 1 DBGMCU Debug support DBGMCU 0xE0042000 0x0 0x400 registers IDCODE IDCODE MCU Device ID Code Register 0x0 0x20 read-only 0x0 DEV_ID Device Identifier 0 12 REV_ID Revision Identifier 16 16 CR CR Debug MCU Configuration Register 0x4 0x20 read-write 0x0 DBG_SLEEP Debug Sleep mode 0 1 DBG_STOP Debug Stop Mode 1 1 DBG_STANDBY Debug Standby Mode 2 1 TRACE_IOEN Trace pin assignment control 5 1 TRACE_MODE Trace pin assignment control 6 2 APB1FZ APB1FZ APB Low Freeze Register 0x8 0x20 read-write 0x0 DBG_TIM2_STOP Debug Timer 2 stopped when Core is halted 0 1 DBG_TIM3_STOP Debug Timer 3 stopped when Core is halted 1 1 DBG_TIM4_STOP Debug Timer 4 stopped when Core is halted 2 1 DBG_TIM5_STOP Debug Timer 5 stopped when Core is halted 3 1 DBG_TIM6_STOP Debug Timer 6 stopped when Core is halted 4 1 DBG_TIM7_STOP Debug Timer 7 stopped when Core is halted 5 1 DBG_TIM12_STOP Debug Timer 12 stopped when Core is halted 6 1 DBG_TIM13_STOP Debug Timer 13 stopped when Core is halted 7 1 DBG_TIMER14_STOP Debug Timer 14 stopped when Core is halted 8 1 DBG_TIM18_STOP Debug Timer 18 stopped when Core is halted 9 1 DBG_RTC_STOP Debug RTC stopped when Core is halted 10 1 DBG_WWDG_STOP Debug Window Wachdog stopped when Core is halted 11 1 DBG_IWDG_STOP Debug Independent Wachdog stopped when Core is halted 12 1 I2C1_SMBUS_TIMEOUT SMBUS timeout mode stopped when Core is halted 21 1 I2C2_SMBUS_TIMEOUT SMBUS timeout mode stopped when Core is halted 22 1 DBG_CAN_STOP Debug CAN stopped when core is halted 25 1 APB2FZ APB2FZ APB High Freeze Register 0xC 0x20 read-write 0x0 DBG_TIM15_STOP Debug Timer 15 stopped when Core is halted 2 1 DBG_TIM16_STOP Debug Timer 16 stopped when Core is halted 3 1 DBG_TIM17_STO Debug Timer 17 stopped when Core is halted 4 1 DBG_TIM19_STOP Debug Timer 19 stopped when Core is halted 5 1 SYSCFG_COMP_OPAMP System configuration controller SYSCFG 0x40010000 0x0 0x400 registers SYSCFG_CFGR1 SYSCFG_CFGR1 configuration register 1 0x0 0x20 read-write 0x00000000 MEM_MODE Memory mapping selection bits 0 2 USB_IT_RMP USB interrupt remap 5 1 TIM1_ITR_RMP Timer 1 ITR3 selection 6 1 DAC_TRIG_RMP DAC trigger remap (when TSEL = 001) 7 1 ADC24_DMA_RMP ADC24 DMA remapping bit 8 1 TIM16_DMA_RMP TIM16 DMA request remapping bit 11 1 TIM17_DMA_RMP TIM17 DMA request remapping bit 12 1 TIM6_DAC1_DMA_RMP TIM6 and DAC1 DMA request remapping bit 13 1 TIM7_DAC2_DMA_RMP TIM7 and DAC2 DMA request remapping bit 14 1 I2C_PB6_FM Fast Mode Plus (FM+) driving capability activation bits. 16 1 I2C_PB7_FM Fast Mode Plus (FM+) driving capability activation bits. 17 1 I2C_PB8_FM Fast Mode Plus (FM+) driving capability activation bits. 18 1 I2C_PB9_FM Fast Mode Plus (FM+) driving capability activation bits. 19 1 I2C1_FM I2C1 Fast Mode Plus 20 1 I2C2_FM I2C2 Fast Mode Plus 21 1 ENCODER_MODE Encoder mode 22 2 FPU_IT Interrupt enable bits from FPU 26 6 SYSCFG_EXTICR1 SYSCFG_EXTICR1 external interrupt configuration register 1 0x8 0x20 read-write 0x0000 EXTI3 EXTI 3 configuration bits 12 4 EXTI2 EXTI 2 configuration bits 8 4 EXTI1 EXTI 1 configuration bits 4 4 EXTI0 EXTI 0 configuration bits 0 4 SYSCFG_EXTICR2 SYSCFG_EXTICR2 external interrupt configuration register 2 0xC 0x20 read-write 0x0000 EXTI7 EXTI 7 configuration bits 12 4 EXTI6 EXTI 6 configuration bits 8 4 EXTI5 EXTI 5 configuration bits 4 4 EXTI4 EXTI 4 configuration bits 0 4 SYSCFG_EXTICR3 SYSCFG_EXTICR3 external interrupt configuration register 3 0x10 0x20 read-write 0x0000 EXTI11 EXTI 11 configuration bits 12 4 EXTI10 EXTI 10 configuration bits 8 4 EXTI9 EXTI 9 configuration bits 4 4 EXTI8 EXTI 8 configuration bits 0 4 SYSCFG_EXTICR4 SYSCFG_EXTICR4 external interrupt configuration register 4 0x14 0x20 read-write 0x0000 EXTI15 EXTI 15 configuration bits 12 4 EXTI14 EXTI 14 configuration bits 8 4 EXTI13 EXTI 13 configuration bits 4 4 EXTI12 EXTI 12 configuration bits 0 4 SYSCFG_CFGR2 SYSCFG_CFGR2 configuration register 2 0x18 0x20 read-write 0x0000 LOCUP_LOCK Cortex-M0 LOCKUP bit enable bit 0 1 SRAM_PARITY_LOCK SRAM parity lock bit 1 1 PVD_LOCK PVD lock enable bit 2 1 BYP_ADD_PAR Bypass address bit 29 in parity calculation 4 1 SRAM_PEF SRAM parity flag 8 1 SYSCFG_RCR SYSCFG_RCR CCM SRAM protection register 0x4 0x20 read-write 0x0000 PAGE0_WP CCM SRAM page write protection bit 0 1 PAGE1_WP CCM SRAM page write protection bit 1 1 PAGE2_WP CCM SRAM page write protection bit 2 1 PAGE3_WP CCM SRAM page write protection bit 3 1 PAGE4_WP CCM SRAM page write protection bit 4 1 PAGE5_WP CCM SRAM page write protection bit 5 1 PAGE6_WP CCM SRAM page write protection bit 6 1 PAGE7_WP CCM SRAM page write protection bit 7 1 SYSCFG_CFGR3 SYSCFG_CFGR3 configuration register 3 0x50 0x20 read-write 0x0000 DAC1_TRIG5_RMP DAC1_CH1 / DAC1_CH2 Trigger remap 17 1 DAC1_TRIG3_RMP DAC1_CH1 / DAC1_CH2 Trigger remap 16 1 ADC2_DMA_RMP_1 ADC2 DMA controller remapping bit 9 1 ADC2_DMA_RMP_0 ADC2 DMA channel remapping bit 6 2 I2C1_RX_DMA_RMP I2C1_RX DMA remapping bit 4 2 SPI1_TX_DMA_RMP SPI1_TX DMA remapping bit 2 2 SPI1_RX_DMA_RMP SPI1_RX DMA remapping bit 0 2 OPAMP2_CSR OPAMP2_CSR OPAMP2 control register 0x3C 0x20 0x00000000 OPAMP2EN OPAMP2 enable 0 1 read-write FORCE_VP FORCE_VP 1 1 read-write VP_SEL OPAMP2 Non inverting input selection 2 2 read-write VM_SEL OPAMP2 inverting input selection 5 2 read-write TCM_EN Timer controlled Mux mode enable 7 1 read-write VMS_SEL OPAMP2 inverting input secondary selection 8 1 read-write VPS_SEL OPAMP2 Non inverting input secondary selection 9 2 read-write CALON Calibration mode enable 11 1 read-write CAL_SEL Calibration selection 12 2 read-write PGA_GAIN Gain in PGA mode 14 4 read-write USER_TRIM User trimming enable 18 1 read-write TRIMOFFSETP Offset trimming value (PMOS) 19 5 read-write TRIMOFFSETN Offset trimming value (NMOS) 24 5 read-write TSTREF TSTREF 29 1 read-write OUTCAL OPAMP 2 ouput status flag 30 1 read-only LOCK OPAMP 2 lock 31 1 read-write COMP2_CSR COMP2_CSR control and status register 0x20 0x20 0x00000000 COMP2EN Comparator 2 enable 0 1 read-write COMP2MODE Comparator 2 mode 2 2 read-write COMP2INSEL Comparator 2 inverting input selection 4 3 read-write COMP2INPSEL Comparator 2 non inverted input selection 7 1 read-write COMP2INMSEL Comparator 1inverting input selection 9 1 read-write COMP2_OUT_SEL Comparator 2 output selection 10 4 read-write COMP2POL Comparator 2 output polarity 15 1 read-write COMP2HYST Comparator 2 hysteresis 16 2 read-write COMP2_BLANKING Comparator 2 blanking source 18 3 read-write COMP2OUT Comparator 2 output 30 1 read-only COMP2LOCK Comparator 2 lock 31 1 read-write COMP4_CSR COMP4_CSR control and status register 0x28 0x20 0x00000000 COMP4EN Comparator 4 enable 0 1 read-write COMP4MODE Comparator 4 mode 2 2 read-write COMP4INSEL Comparator 4 inverting input selection 4 3 read-write COMP4INPSEL Comparator 4 non inverted input selection 7 1 read-write COM4WINMODE Comparator 4 window mode 9 1 read-write COMP4_OUT_SEL Comparator 4 output selection 10 4 read-write COMP4POL Comparator 4 output polarity 15 1 read-write COMP4HYST Comparator 4 hysteresis 16 2 read-write COMP4_BLANKING Comparator 4 blanking source 18 3 read-write COMP4OUT Comparator 4 output 30 1 read-only COMP4LOCK Comparator 4 lock 31 1 read-write COMP6_CSR COMP6_CSR control and status register 0x30 0x20 0x00000000 COMP6EN Comparator 6 enable 0 1 read-write COMP6MODE Comparator 6 mode 2 2 read-write COMP6INSEL Comparator 6 inverting input selection 4 3 read-write COMP6INPSEL Comparator 6 non inverted input selection 7 1 read-write COM6WINMODE Comparator 6 window mode 9 1 read-write COMP6_OUT_SEL Comparator 6 output selection 10 4 read-write COMP6POL Comparator 6 output polarity 15 1 read-write COMP6HYST Comparator 6 hysteresis 16 2 read-write COMP6_BLANKING Comparator 6 blanking source 18 3 read-write COMP6OUT Comparator 6 output 30 1 read-only COMP6LOCK Comparator 6 lock 31 1 read-write MPU Memory protection unit MPU 0xE000ED90 0x0 0x15 registers MPU_TYPER MPU_TYPER MPU type register 0x0 0x20 read-only 0X00000800 SEPARATE Separate flag 0 1 DREGION Number of MPU data regions 8 8 IREGION Number of MPU instruction regions 16 8 MPU_CTRL MPU_CTRL MPU control register 0x4 0x20 read-only 0X00000000 ENABLE Enables the MPU 0 1 HFNMIENA Enables the operation of MPU during hard fault 1 1 PRIVDEFENA Enable priviliged software access to default memory map 2 1 MPU_RNR MPU_RNR MPU region number register 0x8 0x20 read-write 0X00000000 REGION MPU region 0 8 MPU_RBAR MPU_RBAR MPU region base address register 0xC 0x20 read-write 0X00000000 REGION MPU region field 0 4 VALID MPU region number valid 4 1 ADDR Region base address field 5 27 MPU_RASR MPU_RASR MPU region attribute and size register 0x10 0x20 read-write 0X00000000 ENABLE Region enable bit. 0 1 SIZE Size of the MPU protection region 1 5 SRD Subregion disable bits 8 8 B memory attribute 16 1 C memory attribute 17 1 S Shareable memory attribute 18 1 TEX memory attribute 19 3 AP Access permission 24 3 XN Instruction access disable bit 28 1 STK SysTick timer STK 0xE000E010 0x0 0x11 registers CTRL CTRL SysTick control and status register 0x0 0x20 read-write 0X00000000 ENABLE Counter enable 0 1 TICKINT SysTick exception request enable 1 1 CLKSOURCE Clock source selection 2 1 COUNTFLAG COUNTFLAG 16 1 LOAD LOAD SysTick reload value register 0x4 0x20 read-write 0X00000000 RELOAD RELOAD value 0 24 VAL VAL SysTick current value register 0x8 0x20 read-write 0X00000000 CURRENT Current counter value 0 24 CALIB CALIB SysTick calibration value register 0xC 0x20 read-write 0X00000000 TENMS Calibration value 0 24 SKEW SKEW flag: Indicates whether the TENMS value is exact 30 1 NOREF NOREF flag. Reads as zero 31 1 SCB System control block SCB 0xE000ED00 0x0 0x41 registers CPUID CPUID CPUID base register 0x0 0x20 read-only 0x410FC241 Revision Revision number 0 4 PartNo Part number of the processor 4 12 Constant Reads as 0xF 16 4 Variant Variant number 20 4 Implementer Implementer code 24 8 ICSR ICSR Interrupt control and state register 0x4 0x20 read-write 0x00000000 VECTACTIVE Active vector 0 9 RETTOBASE Return to base level 11 1 VECTPENDING Pending vector 12 7 ISRPENDING Interrupt pending flag 22 1 PENDSTCLR SysTick exception clear-pending bit 25 1 PENDSTSET SysTick exception set-pending bit 26 1 PENDSVCLR PendSV clear-pending bit 27 1 PENDSVSET PendSV set-pending bit 28 1 NMIPENDSET NMI set-pending bit. 31 1 VTOR VTOR Vector table offset register 0x8 0x20 read-write 0x00000000 TBLOFF Vector table base offset field 9 21 AIRCR AIRCR Application interrupt and reset control register 0xC 0x20 read-write 0x00000000 VECTRESET VECTRESET 0 1 VECTCLRACTIVE VECTCLRACTIVE 1 1 SYSRESETREQ SYSRESETREQ 2 1 PRIGROUP PRIGROUP 8 3 ENDIANESS ENDIANESS 15 1 VECTKEYSTAT Register key 16 16 SCR SCR System control register 0x10 0x20 read-write 0x00000000 SLEEPONEXIT SLEEPONEXIT 1 1 SLEEPDEEP SLEEPDEEP 2 1 SEVEONPEND Send Event on Pending bit 4 1 CCR CCR Configuration and control register 0x14 0x20 read-write 0x00000000 NONBASETHRDENA Configures how the processor enters Thread mode 0 1 USERSETMPEND USERSETMPEND 1 1 UNALIGN__TRP UNALIGN_ TRP 3 1 DIV_0_TRP DIV_0_TRP 4 1 BFHFNMIGN BFHFNMIGN 8 1 STKALIGN STKALIGN 9 1 SHPR1 SHPR1 System handler priority registers 0x18 0x20 read-write 0x00000000 PRI_4 Priority of system handler 4 0 8 PRI_5 Priority of system handler 5 8 8 PRI_6 Priority of system handler 6 16 8 SHPR2 SHPR2 System handler priority registers 0x1C 0x20 read-write 0x00000000 PRI_11 Priority of system handler 11 24 8 SHPR3 SHPR3 System handler priority registers 0x20 0x20 read-write 0x00000000 PRI_14 Priority of system handler 14 16 8 PRI_15 Priority of system handler 15 24 8 SHCRS SHCRS System handler control and state register 0x24 0x20 read-write 0x00000000 MEMFAULTACT Memory management fault exception active bit 0 1 BUSFAULTACT Bus fault exception active bit 1 1 USGFAULTACT Usage fault exception active bit 3 1 SVCALLACT SVC call active bit 7 1 MONITORACT Debug monitor active bit 8 1 PENDSVACT PendSV exception active bit 10 1 SYSTICKACT SysTick exception active bit 11 1 USGFAULTPENDED Usage fault exception pending bit 12 1 MEMFAULTPENDED Memory management fault exception pending bit 13 1 BUSFAULTPENDED Bus fault exception pending bit 14 1 SVCALLPENDED SVC call pending bit 15 1 MEMFAULTENA Memory management fault enable bit 16 1 BUSFAULTENA Bus fault enable bit 17 1 USGFAULTENA Usage fault enable bit 18 1 CFSR_UFSR_BFSR_MMFSR CFSR_UFSR_BFSR_MMFSR Configurable fault status register 0x28 0x20 read-write 0x00000000 IACCVIOL Instruction access violation flag 1 1 MUNSTKERR Memory manager fault on unstacking for a return from exception 3 1 MSTKERR Memory manager fault on stacking for exception entry. 4 1 MLSPERR MLSPERR 5 1 MMARVALID Memory Management Fault Address Register (MMAR) valid flag 7 1 IBUSERR Instruction bus error 8 1 PRECISERR Precise data bus error 9 1 IMPRECISERR Imprecise data bus error 10 1 UNSTKERR Bus fault on unstacking for a return from exception 11 1 STKERR Bus fault on stacking for exception entry 12 1 LSPERR Bus fault on floating-point lazy state preservation 13 1 BFARVALID Bus Fault Address Register (BFAR) valid flag 15 1 UNDEFINSTR Undefined instruction usage fault 16 1 INVSTATE Invalid state usage fault 17 1 INVPC Invalid PC load usage fault 18 1 NOCP No coprocessor usage fault. 19 1 UNALIGNED Unaligned access usage fault 24 1 DIVBYZERO Divide by zero usage fault 25 1 HFSR HFSR Hard fault status register 0x2C 0x20 read-write 0x00000000 VECTTBL Vector table hard fault 1 1 FORCED Forced hard fault 30 1 DEBUG_VT Reserved for Debug use 31 1 MMFAR MMFAR Memory management fault address register 0x34 0x20 read-write 0x00000000 MMFAR Memory management fault address 0 32 BFAR BFAR Bus fault address register 0x38 0x20 read-write 0x00000000 BFAR Bus fault address 0 32 AFSR AFSR Auxiliary fault status register 0x3C 0x20 read-write 0x00000000 IMPDEF Implementation defined 0 32 NVIC_STIR Nested vectored interrupt controller NVIC 0xE000EF00 0x0 0x5 registers STIR STIR Software trigger interrupt register 0x0 0x20 read-write 0x00000000 INTID Software generated interrupt ID 0 9 FPU_CPACR Floating point unit CPACR FPU 0xE000ED88 0x0 0x5 registers CPACR CPACR Coprocessor access control register 0x0 0x20 read-write 0x0000000 CP CP 20 4 SCB_ACTRL System control block ACTLR SCB 0xE000E008 0x0 0x5 registers ACTRL ACTRL Auxiliary control register 0x0 0x20 read-write 0x00000000 DISMCYCINT DISMCYCINT 0 1 DISDEFWBUF DISDEFWBUF 1 1 DISFOLD DISFOLD 2 1 DISFPCA DISFPCA 8 1 DISOOFP DISOOFP 9 1