Atmel AT91SAM9N12 SAM9CN 20130208 Atmel AT91SAM9N12 device: ARM926EJ Embedded Microprocessor Unit, 400MHz, LCD, USB, LPDDR/DDR2/MLC NAND support, 217 Pins (refer to http://www.atmel.com/devices/SAM9N12.aspx for more) 8 32 SPI0 6088Q Serial Peripheral Interface 0 SPI SPI0_ 0xF0000000 0 0x4000 registers SPI0 13 CR Control Register 0x00000000 32 write-only SPIEN SPI Enable 0 1 write-only SPIDIS SPI Disable 1 1 write-only SWRST SPI Software Reset 7 1 write-only LASTXFER Last Transfer 24 1 write-only MR Mode Register 0x00000004 32 read-write 0x00000000 MSTR Master/Slave Mode 0 1 read-write PS Peripheral Select 1 1 read-write PCSDEC Chip Select Decode 2 1 read-write MODFDIS Mode Fault Detection 4 1 read-write WDRBT Wait Data Read Before Transfer 5 1 read-write LLB Local Loopback Enable 7 1 read-write PCS Peripheral Chip Select 16 4 read-write DLYBCS Delay Between Chip Selects 24 8 read-write RDR Receive Data Register 0x00000008 32 read-only 0x00000000 RD Receive Data 0 16 read-only PCS Peripheral Chip Select 16 4 read-only TDR Transmit Data Register 0x0000000C 32 write-only TD Transmit Data 0 16 write-only PCS Peripheral Chip Select 16 4 write-only LASTXFER Last Transfer 24 1 write-only SR Status Register 0x00000010 32 read-only 0x000000F0 RDRF Receive Data Register Full 0 1 read-only TDRE Transmit Data Register Empty 1 1 read-only MODF Mode Fault Error 2 1 read-only OVRES Overrun Error Status 3 1 read-only NSSR NSS Rising 8 1 read-only TXEMPTY Transmission Registers Empty 9 1 read-only SPIENS SPI Enable Status 16 1 read-only IER Interrupt Enable Register 0x00000014 32 write-only RDRF Receive Data Register Full Interrupt Enable 0 1 write-only TDRE SPI Transmit Data Register Empty Interrupt Enable 1 1 write-only MODF Mode Fault Error Interrupt Enable 2 1 write-only OVRES Overrun Error Interrupt Enable 3 1 write-only NSSR NSS Rising Interrupt Enable 8 1 write-only TXEMPTY Transmission Registers Empty Enable 9 1 write-only IDR Interrupt Disable Register 0x00000018 32 write-only RDRF Receive Data Register Full Interrupt Disable 0 1 write-only TDRE SPI Transmit Data Register Empty Interrupt Disable 1 1 write-only MODF Mode Fault Error Interrupt Disable 2 1 write-only OVRES Overrun Error Interrupt Disable 3 1 write-only NSSR NSS Rising Interrupt Disable 8 1 write-only TXEMPTY Transmission Registers Empty Disable 9 1 write-only IMR Interrupt Mask Register 0x0000001C 32 read-only 0x00000000 RDRF Receive Data Register Full Interrupt Mask 0 1 read-only TDRE SPI Transmit Data Register Empty Interrupt Mask 1 1 read-only MODF Mode Fault Error Interrupt Mask 2 1 read-only OVRES Overrun Error Interrupt Mask 3 1 read-only NSSR NSS Rising Interrupt Mask 8 1 read-only TXEMPTY Transmission Registers Empty Mask 9 1 read-only 4 4 0-3 CSR[%s] Chip Select Register 0x00000030 32 read-write CPOL Clock Polarity 0 1 read-write NCPHA Clock Phase 1 1 read-write CSNAAT Chip Select Not Active After Transfer (Ignored if CSAAT = 1) 2 1 read-write CSAAT Chip Select Active After Transfer 3 1 read-write BITS Bits Per Transfer 4 4 read-write 8_BIT 8 bits for transfer 0x0 9_BIT 9 bits for transfer 0x1 10_BIT 10 bits for transfer 0x2 11_BIT 11 bits for transfer 0x3 12_BIT 12 bits for transfer 0x4 13_BIT 13 bits for transfer 0x5 14_BIT 14 bits for transfer 0x6 15_BIT 15 bits for transfer 0x7 16_BIT 16 bits for transfer 0x8 SCBR Serial Clock Baud Rate 8 8 read-write DLYBS Delay Before SPCK 16 8 read-write DLYBCT Delay Between Consecutive Transfers 24 8 read-write WPMR Write Protection Control Register 0x000000E4 32 read-write 0x00000000 SPIWPEN SPI Write Protection Enable 0 1 read-write SPIWPKEY SPI Write Protection Key Password 8 24 read-write WPSR Write Protection Status Register 0x000000E8 32 read-only 0x00000000 SPIWPVS SPI Write Protection Violation Status 0 3 read-only SPIWPVSRC SPI Write Protection Violation Source 8 8 read-only SPI1 6088Q Serial Peripheral Interface 1 SPI SPI1_ 0xF0004000 0 0x4000 registers SPI1 14 CR Control Register 0x00000000 32 write-only SPIEN SPI Enable 0 1 write-only SPIDIS SPI Disable 1 1 write-only SWRST SPI Software Reset 7 1 write-only LASTXFER Last Transfer 24 1 write-only MR Mode Register 0x00000004 32 read-write 0x00000000 MSTR Master/Slave Mode 0 1 read-write PS Peripheral Select 1 1 read-write PCSDEC Chip Select Decode 2 1 read-write MODFDIS Mode Fault Detection 4 1 read-write WDRBT Wait Data Read Before Transfer 5 1 read-write LLB Local Loopback Enable 7 1 read-write PCS Peripheral Chip Select 16 4 read-write DLYBCS Delay Between Chip Selects 24 8 read-write RDR Receive Data Register 0x00000008 32 read-only 0x00000000 RD Receive Data 0 16 read-only PCS Peripheral Chip Select 16 4 read-only TDR Transmit Data Register 0x0000000C 32 write-only TD Transmit Data 0 16 write-only PCS Peripheral Chip Select 16 4 write-only LASTXFER Last Transfer 24 1 write-only SR Status Register 0x00000010 32 read-only 0x000000F0 RDRF Receive Data Register Full 0 1 read-only TDRE Transmit Data Register Empty 1 1 read-only MODF Mode Fault Error 2 1 read-only OVRES Overrun Error Status 3 1 read-only NSSR NSS Rising 8 1 read-only TXEMPTY Transmission Registers Empty 9 1 read-only SPIENS SPI Enable Status 16 1 read-only IER Interrupt Enable Register 0x00000014 32 write-only RDRF Receive Data Register Full Interrupt Enable 0 1 write-only TDRE SPI Transmit Data Register Empty Interrupt Enable 1 1 write-only MODF Mode Fault Error Interrupt Enable 2 1 write-only OVRES Overrun Error Interrupt Enable 3 1 write-only NSSR NSS Rising Interrupt Enable 8 1 write-only TXEMPTY Transmission Registers Empty Enable 9 1 write-only IDR Interrupt Disable Register 0x00000018 32 write-only RDRF Receive Data Register Full Interrupt Disable 0 1 write-only TDRE SPI Transmit Data Register Empty Interrupt Disable 1 1 write-only MODF Mode Fault Error Interrupt Disable 2 1 write-only OVRES Overrun Error Interrupt Disable 3 1 write-only NSSR NSS Rising Interrupt Disable 8 1 write-only TXEMPTY Transmission Registers Empty Disable 9 1 write-only IMR Interrupt Mask Register 0x0000001C 32 read-only 0x00000000 RDRF Receive Data Register Full Interrupt Mask 0 1 read-only TDRE SPI Transmit Data Register Empty Interrupt Mask 1 1 read-only MODF Mode Fault Error Interrupt Mask 2 1 read-only OVRES Overrun Error Interrupt Mask 3 1 read-only NSSR NSS Rising Interrupt Mask 8 1 read-only TXEMPTY Transmission Registers Empty Mask 9 1 read-only 4 4 0-3 CSR[%s] Chip Select Register 0x00000030 32 read-write CPOL Clock Polarity 0 1 read-write NCPHA Clock Phase 1 1 read-write CSNAAT Chip Select Not Active After Transfer (Ignored if CSAAT = 1) 2 1 read-write CSAAT Chip Select Active After Transfer 3 1 read-write BITS Bits Per Transfer 4 4 read-write 8_BIT 8 bits for transfer 0x0 9_BIT 9 bits for transfer 0x1 10_BIT 10 bits for transfer 0x2 11_BIT 11 bits for transfer 0x3 12_BIT 12 bits for transfer 0x4 13_BIT 13 bits for transfer 0x5 14_BIT 14 bits for transfer 0x6 15_BIT 15 bits for transfer 0x7 16_BIT 16 bits for transfer 0x8 SCBR Serial Clock Baud Rate 8 8 read-write DLYBS Delay Before SPCK 16 8 read-write DLYBCT Delay Between Consecutive Transfers 24 8 read-write WPMR Write Protection Control Register 0x000000E4 32 read-write 0x00000000 SPIWPEN SPI Write Protection Enable 0 1 read-write SPIWPKEY SPI Write Protection Key Password 8 24 read-write WPSR Write Protection Status Register 0x000000E8 32 read-only 0x00000000 SPIWPVS SPI Write Protection Violation Status 0 3 read-only SPIWPVSRC SPI Write Protection Violation Source 8 8 read-only HSMCI 6449K High Speed MultiMedia Card Interface HSMCI_ 0xF0008000 0 0x4000 registers HSMCI 12 CR Control Register 0x00000000 32 write-only MCIEN Multi-Media Interface Enable 0 1 write-only MCIDIS Multi-Media Interface Disable 1 1 write-only PWSEN Power Save Mode Enable 2 1 write-only PWSDIS Power Save Mode Disable 3 1 write-only SWRST Software Reset 7 1 write-only MR Mode Register 0x00000004 32 read-write 0x00000000 CLKDIV Clock Divider 0 8 read-write PWSDIV Power Saving Divider 8 3 read-write RDPROOF Read Proof Enable 11 1 read-write WRPROOF Write Proof Enable 12 1 read-write FBYTE Force Byte Transfer 13 1 read-write PADV Padding Value 14 1 read-write CLKODD Clock divider is odd 16 1 read-write DTOR Data Timeout Register 0x00000008 32 read-write 0x00000000 DTOCYC Data Timeout Cycle Number 0 4 read-write DTOMUL Data Timeout Multiplier 4 3 read-write 1 DTOCYC 0x0 16 DTOCYC x 16 0x1 128 DTOCYC x 128 0x2 256 DTOCYC x 256 0x3 1024 DTOCYC x 1024 0x4 4096 DTOCYC x 4096 0x5 65536 DTOCYC x 65536 0x6 1048576 DTOCYC x 1048576 0x7 SDCR SD/SDIO Card Register 0x0000000C 32 read-write 0x00000000 SDCSEL SDCard/SDIO Slot 0 2 read-write SLOTA Slot A is selected. 0x0 SLOTB - 0x1 SLOTC - 0x2 SLOTD - 0x3 SDCBUS SDCard/SDIO Bus Width 6 2 read-write 1 1 bit 0x0 4 4 bit 0x2 8 8 bit 0x3 ARGR Argument Register 0x00000010 32 read-write 0x00000000 ARG Command Argument 0 32 read-write CMDR Command Register 0x00000014 32 write-only CMDNB Command Number 0 6 write-only RSPTYP Response Type 6 2 write-only NORESP No response. 0x0 48_BIT 48-bit response. 0x1 136_BIT 136-bit response. 0x2 R1B R1b response type 0x3 SPCMD Special Command 8 3 write-only STD Not a special CMD. 0x0 INIT Initialization CMD: 74 clock cycles for initialization sequence. 0x1 SYNC Synchronized CMD: Wait for the end of the current data block transfer before sending the pending command. 0x2 CE_ATA CE-ATA Completion Signal disable Command. The host cancels the ability for the device to return a command completion signal on the command line. 0x3 IT_CMD Interrupt command: Corresponds to the Interrupt Mode (CMD40). 0x4 IT_RESP Interrupt response: Corresponds to the Interrupt Mode (CMD40). 0x5 BOR Boot Operation Request. Start a boot operation mode, the host processor can read boot data from the MMC device directly. 0x6 EBO End Boot Operation. This command allows the host processor to terminate the boot operation mode. 0x7 OPDCMD Open Drain Command 11 1 write-only PUSHPULL Push pull command. 0 OPENDRAIN Open drain command. 1 MAXLAT Max Latency for Command to Response 12 1 write-only 5 5-cycle max latency. 0 64 64-cycle max latency. 1 TRCMD Transfer Command 16 2 write-only NO_DATA No data transfer 0x0 START_DATA Start data transfer 0x1 STOP_DATA Stop data transfer 0x2 TRDIR Transfer Direction 18 1 write-only WRITE Write. 0 READ Read. 1 TRTYP Transfer Type 19 3 write-only SINGLE MMC/SD Card Single Block 0x0 MULTIPLE MMC/SD Card Multiple Block 0x1 STREAM MMC Stream 0x2 BYTE SDIO Byte 0x4 BLOCK SDIO Block 0x5 IOSPCMD SDIO Special Command 24 2 write-only STD Not an SDIO Special Command 0x0 SUSPEND SDIO Suspend Command 0x1 RESUME SDIO Resume Command 0x2 ATACS ATA with Command Completion Signal 26 1 write-only NORMAL Normal operation mode. 0 COMPLETION This bit indicates that a completion signal is expected within a programmed amount of time (HSMCI_CSTOR). 1 BOOT_ACK Boot Operation Acknowledge. 27 1 write-only BLKR Block Register 0x00000018 32 read-write 0x00000000 BCNT MMC/SDIO Block Count - SDIO Byte Count 0 16 read-write BLKLEN Data Block Length 16 16 read-write CSTOR Completion Signal Timeout Register 0x0000001C 32 read-write 0x00000000 CSTOCYC Completion Signal Timeout Cycle Number 0 4 read-write CSTOMUL Completion Signal Timeout Multiplier 4 3 read-write 1 CSTOCYC x 1 0x0 16 CSTOCYC x 16 0x1 128 CSTOCYC x 128 0x2 256 CSTOCYC x 256 0x3 1024 CSTOCYC x 1024 0x4 4096 CSTOCYC x 4096 0x5 65536 CSTOCYC x 65536 0x6 1048576 CSTOCYC x 1048576 0x7 4 4 0-3 RSPR[%s] Response Register 0x00000020 32 read-only RSP Response 0 32 read-only RDR Receive Data Register 0x00000030 32 read-only 0x00000000 DATA Data to Read 0 32 read-only TDR Transmit Data Register 0x00000034 32 write-only DATA Data to Write 0 32 write-only SR Status Register 0x00000040 32 read-only 0x0000C0E5 CMDRDY Command Ready 0 1 read-only RXRDY Receiver Ready 1 1 read-only TXRDY Transmit Ready 2 1 read-only BLKE Data Block Ended 3 1 read-only DTIP Data Transfer in Progress 4 1 read-only NOTBUSY HSMCI Not Busy 5 1 read-only SDIOIRQA SDIO Interrupt for Slot A 8 1 read-only SDIOWAIT SDIO Read Wait Operation Status 12 1 read-only CSRCV CE-ATA Completion Signal Received 13 1 read-only RINDE Response Index Error 16 1 read-only RDIRE Response Direction Error 17 1 read-only RCRCE Response CRC Error 18 1 read-only RENDE Response End Bit Error 19 1 read-only RTOE Response Time-out Error 20 1 read-only DCRCE Data CRC Error 21 1 read-only DTOE Data Time-out Error 22 1 read-only CSTOE Completion Signal Time-out Error 23 1 read-only BLKOVRE DMA Block Overrun Error 24 1 read-only DMADONE DMA Transfer done 25 1 read-only FIFOEMPTY FIFO empty flag 26 1 read-only XFRDONE Transfer Done flag 27 1 read-only ACKRCV Boot Operation Acknowledge Received 28 1 read-only ACKRCVE Boot Operation Acknowledge Error 29 1 read-only OVRE Overrun 30 1 read-only UNRE Underrun 31 1 read-only IER Interrupt Enable Register 0x00000044 32 write-only CMDRDY Command Ready Interrupt Enable 0 1 write-only RXRDY Receiver Ready Interrupt Enable 1 1 write-only TXRDY Transmit Ready Interrupt Enable 2 1 write-only BLKE Data Block Ended Interrupt Enable 3 1 write-only DTIP Data Transfer in Progress Interrupt Enable 4 1 write-only NOTBUSY Data Not Busy Interrupt Enable 5 1 write-only SDIOIRQA SDIO Interrupt for Slot A Interrupt Enable 8 1 write-only SDIOWAIT SDIO Read Wait Operation Status Interrupt Enable 12 1 write-only CSRCV Completion Signal Received Interrupt Enable 13 1 write-only RINDE Response Index Error Interrupt Enable 16 1 write-only RDIRE Response Direction Error Interrupt Enable 17 1 write-only RCRCE Response CRC Error Interrupt Enable 18 1 write-only RENDE Response End Bit Error Interrupt Enable 19 1 write-only RTOE Response Time-out Error Interrupt Enable 20 1 write-only DCRCE Data CRC Error Interrupt Enable 21 1 write-only DTOE Data Time-out Error Interrupt Enable 22 1 write-only CSTOE Completion Signal Timeout Error Interrupt Enable 23 1 write-only BLKOVRE DMA Block Overrun Error Interrupt Enable 24 1 write-only DMADONE DMA Transfer completed Interrupt Enable 25 1 write-only FIFOEMPTY FIFO empty Interrupt enable 26 1 write-only XFRDONE Transfer Done Interrupt enable 27 1 write-only ACKRCV Boot Acknowledge Interrupt Enable 28 1 write-only ACKRCVE Boot Acknowledge Error Interrupt Enable 29 1 write-only OVRE Overrun Interrupt Enable 30 1 write-only UNRE Underrun Interrupt Enable 31 1 write-only IDR Interrupt Disable Register 0x00000048 32 write-only CMDRDY Command Ready Interrupt Disable 0 1 write-only RXRDY Receiver Ready Interrupt Disable 1 1 write-only TXRDY Transmit Ready Interrupt Disable 2 1 write-only BLKE Data Block Ended Interrupt Disable 3 1 write-only DTIP Data Transfer in Progress Interrupt Disable 4 1 write-only NOTBUSY Data Not Busy Interrupt Disable 5 1 write-only SDIOIRQA SDIO Interrupt for Slot A Interrupt Disable 8 1 write-only SDIOWAIT SDIO Read Wait Operation Status Interrupt Disable 12 1 write-only CSRCV Completion Signal received interrupt Disable 13 1 write-only RINDE Response Index Error Interrupt Disable 16 1 write-only RDIRE Response Direction Error Interrupt Disable 17 1 write-only RCRCE Response CRC Error Interrupt Disable 18 1 write-only RENDE Response End Bit Error Interrupt Disable 19 1 write-only RTOE Response Time-out Error Interrupt Disable 20 1 write-only DCRCE Data CRC Error Interrupt Disable 21 1 write-only DTOE Data Time-out Error Interrupt Disable 22 1 write-only CSTOE Completion Signal Time out Error Interrupt Disable 23 1 write-only BLKOVRE DMA Block Overrun Error Interrupt Disable 24 1 write-only DMADONE DMA Transfer completed Interrupt Disable 25 1 write-only FIFOEMPTY FIFO empty Interrupt Disable 26 1 write-only XFRDONE Transfer Done Interrupt Disable 27 1 write-only ACKRCV Boot Acknowledge Interrupt Disable 28 1 write-only ACKRCVE Boot Acknowledge Error Interrupt Disable 29 1 write-only OVRE Overrun Interrupt Disable 30 1 write-only UNRE Underrun Interrupt Disable 31 1 write-only IMR Interrupt Mask Register 0x0000004C 32 read-only 0x00000000 CMDRDY Command Ready Interrupt Mask 0 1 read-only RXRDY Receiver Ready Interrupt Mask 1 1 read-only TXRDY Transmit Ready Interrupt Mask 2 1 read-only BLKE Data Block Ended Interrupt Mask 3 1 read-only DTIP Data Transfer in Progress Interrupt Mask 4 1 read-only NOTBUSY Data Not Busy Interrupt Mask 5 1 read-only SDIOIRQA SDIO Interrupt for Slot A Interrupt Mask 8 1 read-only SDIOWAIT SDIO Read Wait Operation Status Interrupt Mask 12 1 read-only CSRCV Completion Signal Received Interrupt Mask 13 1 read-only RINDE Response Index Error Interrupt Mask 16 1 read-only RDIRE Response Direction Error Interrupt Mask 17 1 read-only RCRCE Response CRC Error Interrupt Mask 18 1 read-only RENDE Response End Bit Error Interrupt Mask 19 1 read-only RTOE Response Time-out Error Interrupt Mask 20 1 read-only DCRCE Data CRC Error Interrupt Mask 21 1 read-only DTOE Data Time-out Error Interrupt Mask 22 1 read-only CSTOE Completion Signal Time-out Error Interrupt Mask 23 1 read-only BLKOVRE DMA Block Overrun Error Interrupt Mask 24 1 read-only DMADONE DMA Transfer Completed Interrupt Mask 25 1 read-only FIFOEMPTY FIFO Empty Interrupt Mask 26 1 read-only XFRDONE Transfer Done Interrupt Mask 27 1 read-only ACKRCV Boot Operation Acknowledge Received Interrupt Mask 28 1 read-only ACKRCVE Boot Operation Acknowledge Error Interrupt Mask 29 1 read-only OVRE Overrun Interrupt Mask 30 1 read-only UNRE Underrun Interrupt Mask 31 1 read-only DMA DMA Configuration Register 0x00000050 32 read-write 0x00000000 OFFSET DMA Write Buffer Offset 0 2 read-write CHKSIZE DMA Channel Read and Write Chunk Size 4 3 read-write DMAEN DMA Hardware Handshaking Enable 8 1 read-write ROPT Read Optimization with padding 12 1 read-write CFG Configuration Register 0x00000054 32 read-write 0x00000000 FIFOMODE HSMCI Internal FIFO control mode 0 1 read-write FERRCTRL Flow Error flag reset control mode 4 1 read-write HSMODE High Speed Mode 8 1 read-write LSYNC Synchronize on the last block 12 1 read-write WPMR Write Protection Mode Register 0x000000E4 32 read-write WP_EN Write Protection Enable 0 1 read-write WP_KEY Write Protection Key password 8 24 read-write WPSR Write Protection Status Register 0x000000E8 32 read-only WP_VS Write Protection Violation Status 0 4 read-only NONE No Write Protection Violation occurred since the last read of this register (WP_SR) 0x0 WRITE Write Protection detected unauthorized attempt to write a control register had occurred (since the last read.) 0x1 RESET Software reset had been performed while Write Protection was enabled (since the last read). 0x2 BOTH Both Write Protection violation and software reset with Write Protection enabled have occurred since the last read. 0x3 WP_VSRC Write Protection Violation SouRCe 8 16 read-only 256 4 0-255 FIFO[%s] FIFO Memory Aperture0 0x00000200 32 read-write DATA Data to Read or Data to Write 0 32 read-write SSC 6078L Synchronous Serial Controller SSC_ 0xF0010000 0 0x4000 registers SSC 28 CR Control Register 0x00000000 32 write-only RXEN Receive Enable 0 1 write-only RXDIS Receive Disable 1 1 write-only TXEN Transmit Enable 8 1 write-only TXDIS Transmit Disable 9 1 write-only SWRST Software Reset 15 1 write-only CMR Clock Mode Register 0x00000004 32 read-write 0x00000000 DIV Clock Divider 0 12 read-write RCMR Receive Clock Mode Register 0x00000010 32 read-write 0x00000000 CKS Receive Clock Selection 0 2 read-write MCK Divided Clock 0x0 TK TK Clock signal 0x1 RK RK pin 0x2 CKO Receive Clock Output Mode Selection 2 3 read-write NONE None, RK pin is an input 0x0 CONTINUOUS Continuous Receive Clock, RK pin is an output 0x1 TRANSFER Receive Clock only during data transfers, RK pin is an output 0x2 CKI Receive Clock Inversion 5 1 read-write CKG Receive Clock Gating Selection 6 2 read-write CONTINUOUS None 0x0 EN_RF_LOW Receive Clock enabled only if RF Pin is Low 0x1 EN_RF_HIGH Receive Clock enabled only if RF Pin is High 0x2 START Receive Start Selection 8 4 read-write CONTINUOUS Continuous, as soon as the receiver is enabled, and immediately after the end of transfer of the previous data. 0x0 TRANSMIT Transmit start 0x1 RF_LOW Detection of a low level on RF signal 0x2 RF_HIGH Detection of a high level on RF signal 0x3 RF_FALLING Detection of a falling edge on RF signal 0x4 RF_RISING Detection of a rising edge on RF signal 0x5 RF_LEVEL Detection of any level change on RF signal 0x6 RF_EDGE Detection of any edge on RF signal 0x7 CMP_0 Compare 0 0x8 STOP Receive Stop Selection 12 1 read-write STTDLY Receive Start Delay 16 8 read-write PERIOD Receive Period Divider Selection 24 8 read-write RFMR Receive Frame Mode Register 0x00000014 32 read-write 0x00000000 DATLEN Data Length 0 5 read-write LOOP Loop Mode 5 1 read-write MSBF Most Significant Bit First 7 1 read-write DATNB Data Number per Frame 8 4 read-write FSLEN Receive Frame Sync Length 16 4 read-write FSOS Receive Frame Sync Output Selection 20 3 read-write NONE None, RF pin is an input 0x0 NEGATIVE Negative Pulse, RF pin is an output 0x1 POSITIVE Positive Pulse, RF pin is an output 0x2 LOW Driven Low during data transfer, RF pin is an output 0x3 HIGH Driven High during data transfer, RF pin is an output 0x4 TOGGLING Toggling at each start of data transfer, RF pin is an output 0x5 FSEDGE Frame Sync Edge Detection 24 1 read-write POSITIVE Positive Edge Detection 0 NEGATIVE Negative Edge Detection 1 FSLEN_EXT FSLEN Field Extension 28 4 read-write TCMR Transmit Clock Mode Register 0x00000018 32 read-write 0x00000000 CKS Transmit Clock Selection 0 2 read-write MCK Divided Clock 0x0 RK RK Clock signal 0x1 TK TK pin 0x2 CKO Transmit Clock Output Mode Selection 2 3 read-write NONE None, TK pin is an input 0x0 CONTINUOUS Continuous Transmit Clock, TK pin is an output 0x1 TRANSFER Transmit Clock only during data transfers, TK pin is an output 0x2 CKI Transmit Clock Inversion 5 1 read-write CKG Transmit Clock Gating Selection 6 2 read-write CONTINUOUS None 0x0 EN_TF_LOW Transmit Clock enabled only if TF pin is Low 0x1 EN_TF_HIGH Transmit Clock enabled only if TF pin is High 0x2 START Transmit Start Selection 8 4 read-write CONTINUOUS Continuous, as soon as a word is written in the SSC_THR Register (if Transmit is enabled), and immediately after the end of transfer of the previous data. 0x0 RECEIVE Receive start 0x1 TF_LOW Detection of a low level on TF signal 0x2 TF_HIGH Detection of a high level on TF signal 0x3 TF_FALLING Detection of a falling edge on TF signal 0x4 TF_RISING Detection of a rising edge on TF signal 0x5 TF_LEVEL Detection of any level change on TF signal 0x6 TF_EDGE Detection of any edge on TF signal 0x7 STTDLY Transmit Start Delay 16 8 read-write PERIOD Transmit Period Divider Selection 24 8 read-write TFMR Transmit Frame Mode Register 0x0000001C 32 read-write 0x00000000 DATLEN Data Length 0 5 read-write DATDEF Data Default Value 5 1 read-write MSBF Most Significant Bit First 7 1 read-write DATNB Data Number per frame 8 4 read-write FSLEN Transmit Frame Sync Length 16 4 read-write FSOS Transmit Frame Sync Output Selection 20 3 read-write NONE None, TF pin is an input 0x0 NEGATIVE Negative Pulse, TF pin is an output 0x1 POSITIVE Positive Pulse,TF pin is an output 0x2 LOW TF pin Driven Low during data transfer 0x3 HIGH TF pin Driven High during data transfer 0x4 TOGGLING TF pin Toggles at each start of data transfer 0x5 FSDEN Frame Sync Data Enable 23 1 read-write FSEDGE Frame Sync Edge Detection 24 1 read-write POSITIVE Positive Edge Detection 0 NEGATIVE Negative Edge Detection 1 FSLEN_EXT FSLEN Field Extension 28 4 read-write RHR Receive Holding Register 0x00000020 32 read-only 0x00000000 RDAT Receive Data 0 32 read-only THR Transmit Holding Register 0x00000024 32 write-only TDAT Transmit Data 0 32 write-only RSHR Receive Sync. Holding Register 0x00000030 32 read-only 0x00000000 RSDAT Receive Synchronization Data 0 16 read-only TSHR Transmit Sync. Holding Register 0x00000034 32 read-write 0x00000000 TSDAT Transmit Synchronization Data 0 16 read-write RC0R Receive Compare 0 Register 0x00000038 32 read-write 0x00000000 CP0 Receive Compare Data 0 0 16 read-write RC1R Receive Compare 1 Register 0x0000003C 32 read-write 0x00000000 CP1 Receive Compare Data 1 0 16 read-write SR Status Register 0x00000040 32 read-only 0x000000CC TXRDY Transmit Ready 0 1 read-only TXEMPTY Transmit Empty 1 1 read-only RXRDY Receive Ready 4 1 read-only OVRUN Receive Overrun 5 1 read-only CP0 Compare 0 8 1 read-only CP1 Compare 1 9 1 read-only TXSYN Transmit Sync 10 1 read-only RXSYN Receive Sync 11 1 read-only TXEN Transmit Enable 16 1 read-only RXEN Receive Enable 17 1 read-only IER Interrupt Enable Register 0x00000044 32 write-only TXRDY Transmit Ready Interrupt Enable 0 1 write-only TXEMPTY Transmit Empty Interrupt Enable 1 1 write-only RXRDY Receive Ready Interrupt Enable 4 1 write-only OVRUN Receive Overrun Interrupt Enable 5 1 write-only CP0 Compare 0 Interrupt Enable 8 1 write-only CP1 Compare 1 Interrupt Enable 9 1 write-only TXSYN Tx Sync Interrupt Enable 10 1 write-only RXSYN Rx Sync Interrupt Enable 11 1 write-only IDR Interrupt Disable Register 0x00000048 32 write-only TXRDY Transmit Ready Interrupt Disable 0 1 write-only TXEMPTY Transmit Empty Interrupt Disable 1 1 write-only RXRDY Receive Ready Interrupt Disable 4 1 write-only OVRUN Receive Overrun Interrupt Disable 5 1 write-only CP0 Compare 0 Interrupt Disable 8 1 write-only CP1 Compare 1 Interrupt Disable 9 1 write-only TXSYN Tx Sync Interrupt Enable 10 1 write-only RXSYN Rx Sync Interrupt Enable 11 1 write-only IMR Interrupt Mask Register 0x0000004C 32 read-only 0x00000000 TXRDY Transmit Ready Interrupt Mask 0 1 read-only TXEMPTY Transmit Empty Interrupt Mask 1 1 read-only RXRDY Receive Ready Interrupt Mask 4 1 read-only OVRUN Receive Overrun Interrupt Mask 5 1 read-only CP0 Compare 0 Interrupt Mask 8 1 read-only CP1 Compare 1 Interrupt Mask 9 1 read-only TXSYN Tx Sync Interrupt Mask 10 1 read-only RXSYN Rx Sync Interrupt Mask 11 1 read-only WPMR Write Protect Mode Register 0x000000E4 32 read-write 0x00000000 WPEN Write Protect Enable 0 1 read-write WPKEY Write Protect KEY 8 24 read-write WPSR Write Protect Status Register 0x000000E8 32 read-only 0x00000000 TC0 6082O Timer Counter 0 TC TC0_ 0xF8008000 0 0x4000 registers TC0 17 CCR0 Channel Control Register (channel = 0) 0x00000000 32 write-only CLKEN Counter Clock Enable Command 0 1 write-only CLKDIS Counter Clock Disable Command 1 1 write-only SWTRG Software Trigger Command 2 1 write-only CMR0 Channel Mode Register (channel = 0) 0x00000004 32 read-write 0x00000000 TCCLKS Clock Selection 0 3 read-write TIMER_CLOCK1 Clock selected: TCLK1 0x0 TIMER_CLOCK2 Clock selected: TCLK2 0x1 TIMER_CLOCK3 Clock selected: TCLK3 0x2 TIMER_CLOCK4 Clock selected: TCLK4 0x3 TIMER_CLOCK5 Clock selected: TCLK5 0x4 XC0 Clock selected: XC0 0x5 XC1 Clock selected: XC1 0x6 XC2 Clock selected: XC2 0x7 CLKI Clock Invert 3 1 read-write BURST Burst Signal Selection 4 2 read-write NONE The clock is not gated by an external signal. 0x0 XC0 XC0 is ANDed with the selected clock. 0x1 XC1 XC1 is ANDed with the selected clock. 0x2 XC2 XC2 is ANDed with the selected clock. 0x3 LDBSTOP Counter Clock Stopped with RB Loading 6 1 read-write LDBDIS Counter Clock Disable with RB Loading 7 1 read-write ETRGEDG External Trigger Edge Selection 8 2 read-write NONE The clock is not gated by an external signal. 0x0 RISING Rising edge 0x1 FALLING Falling edge 0x2 EDGE Each edge 0x3 ABETRG TIOA or TIOB External Trigger Selection 10 1 read-write CPCTRG RC Compare Trigger Enable 14 1 read-write WAVE Waveform Mode 15 1 read-write LDRA RA Loading Edge Selection 16 2 read-write NONE None 0x0 RISING Rising edge of TIOA 0x1 FALLING Falling edge of TIOA 0x2 EDGE Each edge of TIOA 0x3 LDRB RB Loading Edge Selection 18 2 read-write NONE None 0x0 RISING Rising edge of TIOA 0x1 FALLING Falling edge of TIOA 0x2 EDGE Each edge of TIOA 0x3 CMR0_WAVE_EQ_1 Channel Mode Register (channel = 0) WAVE_EQ_1 0x00000004 32 read-write 0x00000000 TCCLKS Clock Selection 0 3 read-write TIMER_CLOCK1 Clock selected: TCLK1 0x0 TIMER_CLOCK2 Clock selected: TCLK2 0x1 TIMER_CLOCK3 Clock selected: TCLK3 0x2 TIMER_CLOCK4 Clock selected: TCLK4 0x3 TIMER_CLOCK5 Clock selected: TCLK5 0x4 XC0 Clock selected: XC0 0x5 XC1 Clock selected: XC1 0x6 XC2 Clock selected: XC2 0x7 CLKI Clock Invert 3 1 read-write BURST Burst Signal Selection 4 2 read-write NONE The clock is not gated by an external signal. 0x0 XC0 XC0 is ANDed with the selected clock. 0x1 XC1 XC1 is ANDed with the selected clock. 0x2 XC2 XC2 is ANDed with the selected clock. 0x3 CPCSTOP Counter Clock Stopped with RC Compare 6 1 read-write CPCDIS Counter Clock Disable with RC Compare 7 1 read-write EEVTEDG External Event Edge Selection 8 2 read-write NONE None 0x0 RISING Rising edge 0x1 FALLING Falling edge 0x2 EDGE Each edge 0x3 EEVT External Event Selection 10 2 read-write TIOB TIOB 0x0 XC0 XC0 0x1 XC1 XC1 0x2 XC2 XC2 0x3 ENETRG External Event Trigger Enable 12 1 read-write WAVSEL Waveform Selection 13 2 read-write UP UP mode without automatic trigger on RC Compare 0x0 UPDOWN UPDOWN mode without automatic trigger on RC Compare 0x1 UP_RC UP mode with automatic trigger on RC Compare 0x2 UPDOWN_RC UPDOWN mode with automatic trigger on RC Compare 0x3 WAVE Waveform Mode 15 1 read-write ACPA RA Compare Effect on TIOA 16 2 read-write NONE None 0x0 SET Set 0x1 CLEAR Clear 0x2 TOGGLE Toggle 0x3 ACPC RC Compare Effect on TIOA 18 2 read-write NONE None 0x0 SET Set 0x1 CLEAR Clear 0x2 TOGGLE Toggle 0x3 AEEVT External Event Effect on TIOA 20 2 read-write NONE None 0x0 SET Set 0x1 CLEAR Clear 0x2 TOGGLE Toggle 0x3 ASWTRG Software Trigger Effect on TIOA 22 2 read-write NONE None 0x0 SET Set 0x1 CLEAR Clear 0x2 TOGGLE Toggle 0x3 BCPB RB Compare Effect on TIOB 24 2 read-write NONE None 0x0 SET Set 0x1 CLEAR Clear 0x2 TOGGLE Toggle 0x3 BCPC RC Compare Effect on TIOB 26 2 read-write NONE None 0x0 SET Set 0x1 CLEAR Clear 0x2 TOGGLE Toggle 0x3 BEEVT External Event Effect on TIOB 28 2 read-write NONE None 0x0 SET Set 0x1 CLEAR Clear 0x2 TOGGLE Toggle 0x3 BSWTRG Software Trigger Effect on TIOB 30 2 read-write NONE None 0x0 SET Set 0x1 CLEAR Clear 0x2 TOGGLE Toggle 0x3 RAB0 Register AB (channel = 0) 0x0000000C 32 read-only 0x00000000 RAB Register A or Register B 0 32 read-only CV0 Counter Value (channel = 0) 0x00000010 32 read-only 0x00000000 CV Counter Value 0 32 read-only RA0 Register A (channel = 0) 0x00000014 32 read-write 0x00000000 RA Register A 0 32 read-write RB0 Register B (channel = 0) 0x00000018 32 read-write 0x00000000 RB Register B 0 32 read-write RC0 Register C (channel = 0) 0x0000001C 32 read-write 0x00000000 RC Register C 0 32 read-write SR0 Status Register (channel = 0) 0x00000020 32 read-only 0x00000000 COVFS Counter Overflow Status 0 1 read-only LOVRS Load Overrun Status 1 1 read-only CPAS RA Compare Status 2 1 read-only CPBS RB Compare Status 3 1 read-only CPCS RC Compare Status 4 1 read-only LDRAS RA Loading Status 5 1 read-only LDRBS RB Loading Status 6 1 read-only ETRGS External Trigger Status 7 1 read-only CLKSTA Clock Enabling Status 16 1 read-only MTIOA TIOA Mirror 17 1 read-only MTIOB TIOB Mirror 18 1 read-only IER0 Interrupt Enable Register (channel = 0) 0x00000024 32 write-only COVFS Counter Overflow 0 1 write-only LOVRS Load Overrun 1 1 write-only CPAS RA Compare 2 1 write-only CPBS RB Compare 3 1 write-only CPCS RC Compare 4 1 write-only LDRAS RA Loading 5 1 write-only LDRBS RB Loading 6 1 write-only ETRGS External Trigger 7 1 write-only IDR0 Interrupt Disable Register (channel = 0) 0x00000028 32 write-only COVFS Counter Overflow 0 1 write-only LOVRS Load Overrun 1 1 write-only CPAS RA Compare 2 1 write-only CPBS RB Compare 3 1 write-only CPCS RC Compare 4 1 write-only LDRAS RA Loading 5 1 write-only LDRBS RB Loading 6 1 write-only ETRGS External Trigger 7 1 write-only IMR0 Interrupt Mask Register (channel = 0) 0x0000002C 32 read-only 0x00000000 COVFS Counter Overflow 0 1 read-only LOVRS Load Overrun 1 1 read-only CPAS RA Compare 2 1 read-only CPBS RB Compare 3 1 read-only CPCS RC Compare 4 1 read-only LDRAS RA Loading 5 1 read-only LDRBS RB Loading 6 1 read-only ETRGS External Trigger 7 1 read-only CCR1 Channel Control Register (channel = 1) 0x00000040 32 write-only CLKEN Counter Clock Enable Command 0 1 write-only CLKDIS Counter Clock Disable Command 1 1 write-only SWTRG Software Trigger Command 2 1 write-only CMR1 Channel Mode Register (channel = 1) 0x00000044 32 read-write 0x00000000 TCCLKS Clock Selection 0 3 read-write TIMER_CLOCK1 Clock selected: TCLK1 0x0 TIMER_CLOCK2 Clock selected: TCLK2 0x1 TIMER_CLOCK3 Clock selected: TCLK3 0x2 TIMER_CLOCK4 Clock selected: TCLK4 0x3 TIMER_CLOCK5 Clock selected: TCLK5 0x4 XC0 Clock selected: XC0 0x5 XC1 Clock selected: XC1 0x6 XC2 Clock selected: XC2 0x7 CLKI Clock Invert 3 1 read-write BURST Burst Signal Selection 4 2 read-write NONE The clock is not gated by an external signal. 0x0 XC0 XC0 is ANDed with the selected clock. 0x1 XC1 XC1 is ANDed with the selected clock. 0x2 XC2 XC2 is ANDed with the selected clock. 0x3 LDBSTOP Counter Clock Stopped with RB Loading 6 1 read-write LDBDIS Counter Clock Disable with RB Loading 7 1 read-write ETRGEDG External Trigger Edge Selection 8 2 read-write NONE The clock is not gated by an external signal. 0x0 RISING Rising edge 0x1 FALLING Falling edge 0x2 EDGE Each edge 0x3 ABETRG TIOA or TIOB External Trigger Selection 10 1 read-write CPCTRG RC Compare Trigger Enable 14 1 read-write WAVE Waveform Mode 15 1 read-write LDRA RA Loading Edge Selection 16 2 read-write NONE None 0x0 RISING Rising edge of TIOA 0x1 FALLING Falling edge of TIOA 0x2 EDGE Each edge of TIOA 0x3 LDRB RB Loading Edge Selection 18 2 read-write NONE None 0x0 RISING Rising edge of TIOA 0x1 FALLING Falling edge of TIOA 0x2 EDGE Each edge of TIOA 0x3 CMR1_WAVE_EQ_1 Channel Mode Register (channel = 1) WAVE_EQ_1 0x00000044 32 read-write 0x00000000 TCCLKS Clock Selection 0 3 read-write TIMER_CLOCK1 Clock selected: TCLK1 0x0 TIMER_CLOCK2 Clock selected: TCLK2 0x1 TIMER_CLOCK3 Clock selected: TCLK3 0x2 TIMER_CLOCK4 Clock selected: TCLK4 0x3 TIMER_CLOCK5 Clock selected: TCLK5 0x4 XC0 Clock selected: XC0 0x5 XC1 Clock selected: XC1 0x6 XC2 Clock selected: XC2 0x7 CLKI Clock Invert 3 1 read-write BURST Burst Signal Selection 4 2 read-write NONE The clock is not gated by an external signal. 0x0 XC0 XC0 is ANDed with the selected clock. 0x1 XC1 XC1 is ANDed with the selected clock. 0x2 XC2 XC2 is ANDed with the selected clock. 0x3 CPCSTOP Counter Clock Stopped with RC Compare 6 1 read-write CPCDIS Counter Clock Disable with RC Compare 7 1 read-write EEVTEDG External Event Edge Selection 8 2 read-write NONE None 0x0 RISING Rising edge 0x1 FALLING Falling edge 0x2 EDGE Each edge 0x3 EEVT External Event Selection 10 2 read-write TIOB TIOB 0x0 XC0 XC0 0x1 XC1 XC1 0x2 XC2 XC2 0x3 ENETRG External Event Trigger Enable 12 1 read-write WAVSEL Waveform Selection 13 2 read-write UP UP mode without automatic trigger on RC Compare 0x0 UPDOWN UPDOWN mode without automatic trigger on RC Compare 0x1 UP_RC UP mode with automatic trigger on RC Compare 0x2 UPDOWN_RC UPDOWN mode with automatic trigger on RC Compare 0x3 WAVE Waveform Mode 15 1 read-write ACPA RA Compare Effect on TIOA 16 2 read-write NONE None 0x0 SET Set 0x1 CLEAR Clear 0x2 TOGGLE Toggle 0x3 ACPC RC Compare Effect on TIOA 18 2 read-write NONE None 0x0 SET Set 0x1 CLEAR Clear 0x2 TOGGLE Toggle 0x3 AEEVT External Event Effect on TIOA 20 2 read-write NONE None 0x0 SET Set 0x1 CLEAR Clear 0x2 TOGGLE Toggle 0x3 ASWTRG Software Trigger Effect on TIOA 22 2 read-write NONE None 0x0 SET Set 0x1 CLEAR Clear 0x2 TOGGLE Toggle 0x3 BCPB RB Compare Effect on TIOB 24 2 read-write NONE None 0x0 SET Set 0x1 CLEAR Clear 0x2 TOGGLE Toggle 0x3 BCPC RC Compare Effect on TIOB 26 2 read-write NONE None 0x0 SET Set 0x1 CLEAR Clear 0x2 TOGGLE Toggle 0x3 BEEVT External Event Effect on TIOB 28 2 read-write NONE None 0x0 SET Set 0x1 CLEAR Clear 0x2 TOGGLE Toggle 0x3 BSWTRG Software Trigger Effect on TIOB 30 2 read-write NONE None 0x0 SET Set 0x1 CLEAR Clear 0x2 TOGGLE Toggle 0x3 RAB1 Register AB (channel = 1) 0x0000004C 32 read-only 0x00000000 RAB Register A or Register B 0 32 read-only CV1 Counter Value (channel = 1) 0x00000050 32 read-only 0x00000000 CV Counter Value 0 32 read-only RA1 Register A (channel = 1) 0x00000054 32 read-write 0x00000000 RA Register A 0 32 read-write RB1 Register B (channel = 1) 0x00000058 32 read-write 0x00000000 RB Register B 0 32 read-write RC1 Register C (channel = 1) 0x0000005C 32 read-write 0x00000000 RC Register C 0 32 read-write SR1 Status Register (channel = 1) 0x00000060 32 read-only 0x00000000 COVFS Counter Overflow Status 0 1 read-only LOVRS Load Overrun Status 1 1 read-only CPAS RA Compare Status 2 1 read-only CPBS RB Compare Status 3 1 read-only CPCS RC Compare Status 4 1 read-only LDRAS RA Loading Status 5 1 read-only LDRBS RB Loading Status 6 1 read-only ETRGS External Trigger Status 7 1 read-only CLKSTA Clock Enabling Status 16 1 read-only MTIOA TIOA Mirror 17 1 read-only MTIOB TIOB Mirror 18 1 read-only IER1 Interrupt Enable Register (channel = 1) 0x00000064 32 write-only COVFS Counter Overflow 0 1 write-only LOVRS Load Overrun 1 1 write-only CPAS RA Compare 2 1 write-only CPBS RB Compare 3 1 write-only CPCS RC Compare 4 1 write-only LDRAS RA Loading 5 1 write-only LDRBS RB Loading 6 1 write-only ETRGS External Trigger 7 1 write-only IDR1 Interrupt Disable Register (channel = 1) 0x00000068 32 write-only COVFS Counter Overflow 0 1 write-only LOVRS Load Overrun 1 1 write-only CPAS RA Compare 2 1 write-only CPBS RB Compare 3 1 write-only CPCS RC Compare 4 1 write-only LDRAS RA Loading 5 1 write-only LDRBS RB Loading 6 1 write-only ETRGS External Trigger 7 1 write-only IMR1 Interrupt Mask Register (channel = 1) 0x0000006C 32 read-only 0x00000000 COVFS Counter Overflow 0 1 read-only LOVRS Load Overrun 1 1 read-only CPAS RA Compare 2 1 read-only CPBS RB Compare 3 1 read-only CPCS RC Compare 4 1 read-only LDRAS RA Loading 5 1 read-only LDRBS RB Loading 6 1 read-only ETRGS External Trigger 7 1 read-only CCR2 Channel Control Register (channel = 2) 0x00000080 32 write-only CLKEN Counter Clock Enable Command 0 1 write-only CLKDIS Counter Clock Disable Command 1 1 write-only SWTRG Software Trigger Command 2 1 write-only CMR2 Channel Mode Register (channel = 2) 0x00000084 32 read-write 0x00000000 TCCLKS Clock Selection 0 3 read-write TIMER_CLOCK1 Clock selected: TCLK1 0x0 TIMER_CLOCK2 Clock selected: TCLK2 0x1 TIMER_CLOCK3 Clock selected: TCLK3 0x2 TIMER_CLOCK4 Clock selected: TCLK4 0x3 TIMER_CLOCK5 Clock selected: TCLK5 0x4 XC0 Clock selected: XC0 0x5 XC1 Clock selected: XC1 0x6 XC2 Clock selected: XC2 0x7 CLKI Clock Invert 3 1 read-write BURST Burst Signal Selection 4 2 read-write NONE The clock is not gated by an external signal. 0x0 XC0 XC0 is ANDed with the selected clock. 0x1 XC1 XC1 is ANDed with the selected clock. 0x2 XC2 XC2 is ANDed with the selected clock. 0x3 LDBSTOP Counter Clock Stopped with RB Loading 6 1 read-write LDBDIS Counter Clock Disable with RB Loading 7 1 read-write ETRGEDG External Trigger Edge Selection 8 2 read-write NONE The clock is not gated by an external signal. 0x0 RISING Rising edge 0x1 FALLING Falling edge 0x2 EDGE Each edge 0x3 ABETRG TIOA or TIOB External Trigger Selection 10 1 read-write CPCTRG RC Compare Trigger Enable 14 1 read-write WAVE Waveform Mode 15 1 read-write LDRA RA Loading Edge Selection 16 2 read-write NONE None 0x0 RISING Rising edge of TIOA 0x1 FALLING Falling edge of TIOA 0x2 EDGE Each edge of TIOA 0x3 LDRB RB Loading Edge Selection 18 2 read-write NONE None 0x0 RISING Rising edge of TIOA 0x1 FALLING Falling edge of TIOA 0x2 EDGE Each edge of TIOA 0x3 CMR2_WAVE_EQ_1 Channel Mode Register (channel = 2) WAVE_EQ_1 0x00000084 32 read-write 0x00000000 TCCLKS Clock Selection 0 3 read-write TIMER_CLOCK1 Clock selected: TCLK1 0x0 TIMER_CLOCK2 Clock selected: TCLK2 0x1 TIMER_CLOCK3 Clock selected: TCLK3 0x2 TIMER_CLOCK4 Clock selected: TCLK4 0x3 TIMER_CLOCK5 Clock selected: TCLK5 0x4 XC0 Clock selected: XC0 0x5 XC1 Clock selected: XC1 0x6 XC2 Clock selected: XC2 0x7 CLKI Clock Invert 3 1 read-write BURST Burst Signal Selection 4 2 read-write NONE The clock is not gated by an external signal. 0x0 XC0 XC0 is ANDed with the selected clock. 0x1 XC1 XC1 is ANDed with the selected clock. 0x2 XC2 XC2 is ANDed with the selected clock. 0x3 CPCSTOP Counter Clock Stopped with RC Compare 6 1 read-write CPCDIS Counter Clock Disable with RC Compare 7 1 read-write EEVTEDG External Event Edge Selection 8 2 read-write NONE None 0x0 RISING Rising edge 0x1 FALLING Falling edge 0x2 EDGE Each edge 0x3 EEVT External Event Selection 10 2 read-write TIOB TIOB 0x0 XC0 XC0 0x1 XC1 XC1 0x2 XC2 XC2 0x3 ENETRG External Event Trigger Enable 12 1 read-write WAVSEL Waveform Selection 13 2 read-write UP UP mode without automatic trigger on RC Compare 0x0 UPDOWN UPDOWN mode without automatic trigger on RC Compare 0x1 UP_RC UP mode with automatic trigger on RC Compare 0x2 UPDOWN_RC UPDOWN mode with automatic trigger on RC Compare 0x3 WAVE Waveform Mode 15 1 read-write ACPA RA Compare Effect on TIOA 16 2 read-write NONE None 0x0 SET Set 0x1 CLEAR Clear 0x2 TOGGLE Toggle 0x3 ACPC RC Compare Effect on TIOA 18 2 read-write NONE None 0x0 SET Set 0x1 CLEAR Clear 0x2 TOGGLE Toggle 0x3 AEEVT External Event Effect on TIOA 20 2 read-write NONE None 0x0 SET Set 0x1 CLEAR Clear 0x2 TOGGLE Toggle 0x3 ASWTRG Software Trigger Effect on TIOA 22 2 read-write NONE None 0x0 SET Set 0x1 CLEAR Clear 0x2 TOGGLE Toggle 0x3 BCPB RB Compare Effect on TIOB 24 2 read-write NONE None 0x0 SET Set 0x1 CLEAR Clear 0x2 TOGGLE Toggle 0x3 BCPC RC Compare Effect on TIOB 26 2 read-write NONE None 0x0 SET Set 0x1 CLEAR Clear 0x2 TOGGLE Toggle 0x3 BEEVT External Event Effect on TIOB 28 2 read-write NONE None 0x0 SET Set 0x1 CLEAR Clear 0x2 TOGGLE Toggle 0x3 BSWTRG Software Trigger Effect on TIOB 30 2 read-write NONE None 0x0 SET Set 0x1 CLEAR Clear 0x2 TOGGLE Toggle 0x3 RAB2 Register AB (channel = 2) 0x0000008C 32 read-only 0x00000000 RAB Register A or Register B 0 32 read-only CV2 Counter Value (channel = 2) 0x00000090 32 read-only 0x00000000 CV Counter Value 0 32 read-only RA2 Register A (channel = 2) 0x00000094 32 read-write 0x00000000 RA Register A 0 32 read-write RB2 Register B (channel = 2) 0x00000098 32 read-write 0x00000000 RB Register B 0 32 read-write RC2 Register C (channel = 2) 0x0000009C 32 read-write 0x00000000 RC Register C 0 32 read-write SR2 Status Register (channel = 2) 0x000000A0 32 read-only 0x00000000 COVFS Counter Overflow Status 0 1 read-only LOVRS Load Overrun Status 1 1 read-only CPAS RA Compare Status 2 1 read-only CPBS RB Compare Status 3 1 read-only CPCS RC Compare Status 4 1 read-only LDRAS RA Loading Status 5 1 read-only LDRBS RB Loading Status 6 1 read-only ETRGS External Trigger Status 7 1 read-only CLKSTA Clock Enabling Status 16 1 read-only MTIOA TIOA Mirror 17 1 read-only MTIOB TIOB Mirror 18 1 read-only IER2 Interrupt Enable Register (channel = 2) 0x000000A4 32 write-only COVFS Counter Overflow 0 1 write-only LOVRS Load Overrun 1 1 write-only CPAS RA Compare 2 1 write-only CPBS RB Compare 3 1 write-only CPCS RC Compare 4 1 write-only LDRAS RA Loading 5 1 write-only LDRBS RB Loading 6 1 write-only ETRGS External Trigger 7 1 write-only IDR2 Interrupt Disable Register (channel = 2) 0x000000A8 32 write-only COVFS Counter Overflow 0 1 write-only LOVRS Load Overrun 1 1 write-only CPAS RA Compare 2 1 write-only CPBS RB Compare 3 1 write-only CPCS RC Compare 4 1 write-only LDRAS RA Loading 5 1 write-only LDRBS RB Loading 6 1 write-only ETRGS External Trigger 7 1 write-only IMR2 Interrupt Mask Register (channel = 2) 0x000000AC 32 read-only 0x00000000 COVFS Counter Overflow 0 1 read-only LOVRS Load Overrun 1 1 read-only CPAS RA Compare 2 1 read-only CPBS RB Compare 3 1 read-only CPCS RC Compare 4 1 read-only LDRAS RA Loading 5 1 read-only LDRBS RB Loading 6 1 read-only ETRGS External Trigger 7 1 read-only BCR Block Control Register 0x000000C0 32 write-only SYNC Synchro Command 0 1 write-only BMR Block Mode Register 0x000000C4 32 read-write 0x00000000 TC0XC0S External Clock Signal 0 Selection 0 2 read-write TCLK0 Signal connected to XC0: TCLK0 0x0 TIOA1 Signal connected to XC0: TIOA1 0x2 TIOA2 Signal connected to XC0: TIOA2 0x3 TC1XC1S External Clock Signal 1 Selection 2 2 read-write TCLK1 Signal connected to XC1: TCLK1 0x0 TIOA0 Signal connected to XC1: TIOA0 0x2 TIOA2 Signal connected to XC1: TIOA2 0x3 TC2XC2S External Clock Signal 2 Selection 4 2 read-write TCLK2 Signal connected to XC2: TCLK2 0x0 TIOA1 Signal connected to XC2: TIOA1 0x2 TIOA2 Signal connected to XC2: TIOA2 0x3 TC1 6082O Timer Counter 1 TC TC1_ 0xF800C000 0 0x4000 registers CCR0 Channel Control Register (channel = 0) 0x00000000 32 write-only CLKEN Counter Clock Enable Command 0 1 write-only CLKDIS Counter Clock Disable Command 1 1 write-only SWTRG Software Trigger Command 2 1 write-only CMR0 Channel Mode Register (channel = 0) 0x00000004 32 read-write 0x00000000 TCCLKS Clock Selection 0 3 read-write TIMER_CLOCK1 Clock selected: TCLK1 0x0 TIMER_CLOCK2 Clock selected: TCLK2 0x1 TIMER_CLOCK3 Clock selected: TCLK3 0x2 TIMER_CLOCK4 Clock selected: TCLK4 0x3 TIMER_CLOCK5 Clock selected: TCLK5 0x4 XC0 Clock selected: XC0 0x5 XC1 Clock selected: XC1 0x6 XC2 Clock selected: XC2 0x7 CLKI Clock Invert 3 1 read-write BURST Burst Signal Selection 4 2 read-write NONE The clock is not gated by an external signal. 0x0 XC0 XC0 is ANDed with the selected clock. 0x1 XC1 XC1 is ANDed with the selected clock. 0x2 XC2 XC2 is ANDed with the selected clock. 0x3 LDBSTOP Counter Clock Stopped with RB Loading 6 1 read-write LDBDIS Counter Clock Disable with RB Loading 7 1 read-write ETRGEDG External Trigger Edge Selection 8 2 read-write NONE The clock is not gated by an external signal. 0x0 RISING Rising edge 0x1 FALLING Falling edge 0x2 EDGE Each edge 0x3 ABETRG TIOA or TIOB External Trigger Selection 10 1 read-write CPCTRG RC Compare Trigger Enable 14 1 read-write WAVE Waveform Mode 15 1 read-write LDRA RA Loading Edge Selection 16 2 read-write NONE None 0x0 RISING Rising edge of TIOA 0x1 FALLING Falling edge of TIOA 0x2 EDGE Each edge of TIOA 0x3 LDRB RB Loading Edge Selection 18 2 read-write NONE None 0x0 RISING Rising edge of TIOA 0x1 FALLING Falling edge of TIOA 0x2 EDGE Each edge of TIOA 0x3 CMR0_WAVE_EQ_1 Channel Mode Register (channel = 0) WAVE_EQ_1 0x00000004 32 read-write 0x00000000 TCCLKS Clock Selection 0 3 read-write TIMER_CLOCK1 Clock selected: TCLK1 0x0 TIMER_CLOCK2 Clock selected: TCLK2 0x1 TIMER_CLOCK3 Clock selected: TCLK3 0x2 TIMER_CLOCK4 Clock selected: TCLK4 0x3 TIMER_CLOCK5 Clock selected: TCLK5 0x4 XC0 Clock selected: XC0 0x5 XC1 Clock selected: XC1 0x6 XC2 Clock selected: XC2 0x7 CLKI Clock Invert 3 1 read-write BURST Burst Signal Selection 4 2 read-write NONE The clock is not gated by an external signal. 0x0 XC0 XC0 is ANDed with the selected clock. 0x1 XC1 XC1 is ANDed with the selected clock. 0x2 XC2 XC2 is ANDed with the selected clock. 0x3 CPCSTOP Counter Clock Stopped with RC Compare 6 1 read-write CPCDIS Counter Clock Disable with RC Compare 7 1 read-write EEVTEDG External Event Edge Selection 8 2 read-write NONE None 0x0 RISING Rising edge 0x1 FALLING Falling edge 0x2 EDGE Each edge 0x3 EEVT External Event Selection 10 2 read-write TIOB TIOB 0x0 XC0 XC0 0x1 XC1 XC1 0x2 XC2 XC2 0x3 ENETRG External Event Trigger Enable 12 1 read-write WAVSEL Waveform Selection 13 2 read-write UP UP mode without automatic trigger on RC Compare 0x0 UPDOWN UPDOWN mode without automatic trigger on RC Compare 0x1 UP_RC UP mode with automatic trigger on RC Compare 0x2 UPDOWN_RC UPDOWN mode with automatic trigger on RC Compare 0x3 WAVE Waveform Mode 15 1 read-write ACPA RA Compare Effect on TIOA 16 2 read-write NONE None 0x0 SET Set 0x1 CLEAR Clear 0x2 TOGGLE Toggle 0x3 ACPC RC Compare Effect on TIOA 18 2 read-write NONE None 0x0 SET Set 0x1 CLEAR Clear 0x2 TOGGLE Toggle 0x3 AEEVT External Event Effect on TIOA 20 2 read-write NONE None 0x0 SET Set 0x1 CLEAR Clear 0x2 TOGGLE Toggle 0x3 ASWTRG Software Trigger Effect on TIOA 22 2 read-write NONE None 0x0 SET Set 0x1 CLEAR Clear 0x2 TOGGLE Toggle 0x3 BCPB RB Compare Effect on TIOB 24 2 read-write NONE None 0x0 SET Set 0x1 CLEAR Clear 0x2 TOGGLE Toggle 0x3 BCPC RC Compare Effect on TIOB 26 2 read-write NONE None 0x0 SET Set 0x1 CLEAR Clear 0x2 TOGGLE Toggle 0x3 BEEVT External Event Effect on TIOB 28 2 read-write NONE None 0x0 SET Set 0x1 CLEAR Clear 0x2 TOGGLE Toggle 0x3 BSWTRG Software Trigger Effect on TIOB 30 2 read-write NONE None 0x0 SET Set 0x1 CLEAR Clear 0x2 TOGGLE Toggle 0x3 RAB0 Register AB (channel = 0) 0x0000000C 32 read-only 0x00000000 RAB Register A or Register B 0 32 read-only CV0 Counter Value (channel = 0) 0x00000010 32 read-only 0x00000000 CV Counter Value 0 32 read-only RA0 Register A (channel = 0) 0x00000014 32 read-write 0x00000000 RA Register A 0 32 read-write RB0 Register B (channel = 0) 0x00000018 32 read-write 0x00000000 RB Register B 0 32 read-write RC0 Register C (channel = 0) 0x0000001C 32 read-write 0x00000000 RC Register C 0 32 read-write SR0 Status Register (channel = 0) 0x00000020 32 read-only 0x00000000 COVFS Counter Overflow Status 0 1 read-only LOVRS Load Overrun Status 1 1 read-only CPAS RA Compare Status 2 1 read-only CPBS RB Compare Status 3 1 read-only CPCS RC Compare Status 4 1 read-only LDRAS RA Loading Status 5 1 read-only LDRBS RB Loading Status 6 1 read-only ETRGS External Trigger Status 7 1 read-only CLKSTA Clock Enabling Status 16 1 read-only MTIOA TIOA Mirror 17 1 read-only MTIOB TIOB Mirror 18 1 read-only IER0 Interrupt Enable Register (channel = 0) 0x00000024 32 write-only COVFS Counter Overflow 0 1 write-only LOVRS Load Overrun 1 1 write-only CPAS RA Compare 2 1 write-only CPBS RB Compare 3 1 write-only CPCS RC Compare 4 1 write-only LDRAS RA Loading 5 1 write-only LDRBS RB Loading 6 1 write-only ETRGS External Trigger 7 1 write-only IDR0 Interrupt Disable Register (channel = 0) 0x00000028 32 write-only COVFS Counter Overflow 0 1 write-only LOVRS Load Overrun 1 1 write-only CPAS RA Compare 2 1 write-only CPBS RB Compare 3 1 write-only CPCS RC Compare 4 1 write-only LDRAS RA Loading 5 1 write-only LDRBS RB Loading 6 1 write-only ETRGS External Trigger 7 1 write-only IMR0 Interrupt Mask Register (channel = 0) 0x0000002C 32 read-only 0x00000000 COVFS Counter Overflow 0 1 read-only LOVRS Load Overrun 1 1 read-only CPAS RA Compare 2 1 read-only CPBS RB Compare 3 1 read-only CPCS RC Compare 4 1 read-only LDRAS RA Loading 5 1 read-only LDRBS RB Loading 6 1 read-only ETRGS External Trigger 7 1 read-only CCR1 Channel Control Register (channel = 1) 0x00000040 32 write-only CLKEN Counter Clock Enable Command 0 1 write-only CLKDIS Counter Clock Disable Command 1 1 write-only SWTRG Software Trigger Command 2 1 write-only CMR1 Channel Mode Register (channel = 1) 0x00000044 32 read-write 0x00000000 TCCLKS Clock Selection 0 3 read-write TIMER_CLOCK1 Clock selected: TCLK1 0x0 TIMER_CLOCK2 Clock selected: TCLK2 0x1 TIMER_CLOCK3 Clock selected: TCLK3 0x2 TIMER_CLOCK4 Clock selected: TCLK4 0x3 TIMER_CLOCK5 Clock selected: TCLK5 0x4 XC0 Clock selected: XC0 0x5 XC1 Clock selected: XC1 0x6 XC2 Clock selected: XC2 0x7 CLKI Clock Invert 3 1 read-write BURST Burst Signal Selection 4 2 read-write NONE The clock is not gated by an external signal. 0x0 XC0 XC0 is ANDed with the selected clock. 0x1 XC1 XC1 is ANDed with the selected clock. 0x2 XC2 XC2 is ANDed with the selected clock. 0x3 LDBSTOP Counter Clock Stopped with RB Loading 6 1 read-write LDBDIS Counter Clock Disable with RB Loading 7 1 read-write ETRGEDG External Trigger Edge Selection 8 2 read-write NONE The clock is not gated by an external signal. 0x0 RISING Rising edge 0x1 FALLING Falling edge 0x2 EDGE Each edge 0x3 ABETRG TIOA or TIOB External Trigger Selection 10 1 read-write CPCTRG RC Compare Trigger Enable 14 1 read-write WAVE Waveform Mode 15 1 read-write LDRA RA Loading Edge Selection 16 2 read-write NONE None 0x0 RISING Rising edge of TIOA 0x1 FALLING Falling edge of TIOA 0x2 EDGE Each edge of TIOA 0x3 LDRB RB Loading Edge Selection 18 2 read-write NONE None 0x0 RISING Rising edge of TIOA 0x1 FALLING Falling edge of TIOA 0x2 EDGE Each edge of TIOA 0x3 CMR1_WAVE_EQ_1 Channel Mode Register (channel = 1) WAVE_EQ_1 0x00000044 32 read-write 0x00000000 TCCLKS Clock Selection 0 3 read-write TIMER_CLOCK1 Clock selected: TCLK1 0x0 TIMER_CLOCK2 Clock selected: TCLK2 0x1 TIMER_CLOCK3 Clock selected: TCLK3 0x2 TIMER_CLOCK4 Clock selected: TCLK4 0x3 TIMER_CLOCK5 Clock selected: TCLK5 0x4 XC0 Clock selected: XC0 0x5 XC1 Clock selected: XC1 0x6 XC2 Clock selected: XC2 0x7 CLKI Clock Invert 3 1 read-write BURST Burst Signal Selection 4 2 read-write NONE The clock is not gated by an external signal. 0x0 XC0 XC0 is ANDed with the selected clock. 0x1 XC1 XC1 is ANDed with the selected clock. 0x2 XC2 XC2 is ANDed with the selected clock. 0x3 CPCSTOP Counter Clock Stopped with RC Compare 6 1 read-write CPCDIS Counter Clock Disable with RC Compare 7 1 read-write EEVTEDG External Event Edge Selection 8 2 read-write NONE None 0x0 RISING Rising edge 0x1 FALLING Falling edge 0x2 EDGE Each edge 0x3 EEVT External Event Selection 10 2 read-write TIOB TIOB 0x0 XC0 XC0 0x1 XC1 XC1 0x2 XC2 XC2 0x3 ENETRG External Event Trigger Enable 12 1 read-write WAVSEL Waveform Selection 13 2 read-write UP UP mode without automatic trigger on RC Compare 0x0 UPDOWN UPDOWN mode without automatic trigger on RC Compare 0x1 UP_RC UP mode with automatic trigger on RC Compare 0x2 UPDOWN_RC UPDOWN mode with automatic trigger on RC Compare 0x3 WAVE Waveform Mode 15 1 read-write ACPA RA Compare Effect on TIOA 16 2 read-write NONE None 0x0 SET Set 0x1 CLEAR Clear 0x2 TOGGLE Toggle 0x3 ACPC RC Compare Effect on TIOA 18 2 read-write NONE None 0x0 SET Set 0x1 CLEAR Clear 0x2 TOGGLE Toggle 0x3 AEEVT External Event Effect on TIOA 20 2 read-write NONE None 0x0 SET Set 0x1 CLEAR Clear 0x2 TOGGLE Toggle 0x3 ASWTRG Software Trigger Effect on TIOA 22 2 read-write NONE None 0x0 SET Set 0x1 CLEAR Clear 0x2 TOGGLE Toggle 0x3 BCPB RB Compare Effect on TIOB 24 2 read-write NONE None 0x0 SET Set 0x1 CLEAR Clear 0x2 TOGGLE Toggle 0x3 BCPC RC Compare Effect on TIOB 26 2 read-write NONE None 0x0 SET Set 0x1 CLEAR Clear 0x2 TOGGLE Toggle 0x3 BEEVT External Event Effect on TIOB 28 2 read-write NONE None 0x0 SET Set 0x1 CLEAR Clear 0x2 TOGGLE Toggle 0x3 BSWTRG Software Trigger Effect on TIOB 30 2 read-write NONE None 0x0 SET Set 0x1 CLEAR Clear 0x2 TOGGLE Toggle 0x3 RAB1 Register AB (channel = 1) 0x0000004C 32 read-only 0x00000000 RAB Register A or Register B 0 32 read-only CV1 Counter Value (channel = 1) 0x00000050 32 read-only 0x00000000 CV Counter Value 0 32 read-only RA1 Register A (channel = 1) 0x00000054 32 read-write 0x00000000 RA Register A 0 32 read-write RB1 Register B (channel = 1) 0x00000058 32 read-write 0x00000000 RB Register B 0 32 read-write RC1 Register C (channel = 1) 0x0000005C 32 read-write 0x00000000 RC Register C 0 32 read-write SR1 Status Register (channel = 1) 0x00000060 32 read-only 0x00000000 COVFS Counter Overflow Status 0 1 read-only LOVRS Load Overrun Status 1 1 read-only CPAS RA Compare Status 2 1 read-only CPBS RB Compare Status 3 1 read-only CPCS RC Compare Status 4 1 read-only LDRAS RA Loading Status 5 1 read-only LDRBS RB Loading Status 6 1 read-only ETRGS External Trigger Status 7 1 read-only CLKSTA Clock Enabling Status 16 1 read-only MTIOA TIOA Mirror 17 1 read-only MTIOB TIOB Mirror 18 1 read-only IER1 Interrupt Enable Register (channel = 1) 0x00000064 32 write-only COVFS Counter Overflow 0 1 write-only LOVRS Load Overrun 1 1 write-only CPAS RA Compare 2 1 write-only CPBS RB Compare 3 1 write-only CPCS RC Compare 4 1 write-only LDRAS RA Loading 5 1 write-only LDRBS RB Loading 6 1 write-only ETRGS External Trigger 7 1 write-only IDR1 Interrupt Disable Register (channel = 1) 0x00000068 32 write-only COVFS Counter Overflow 0 1 write-only LOVRS Load Overrun 1 1 write-only CPAS RA Compare 2 1 write-only CPBS RB Compare 3 1 write-only CPCS RC Compare 4 1 write-only LDRAS RA Loading 5 1 write-only LDRBS RB Loading 6 1 write-only ETRGS External Trigger 7 1 write-only IMR1 Interrupt Mask Register (channel = 1) 0x0000006C 32 read-only 0x00000000 COVFS Counter Overflow 0 1 read-only LOVRS Load Overrun 1 1 read-only CPAS RA Compare 2 1 read-only CPBS RB Compare 3 1 read-only CPCS RC Compare 4 1 read-only LDRAS RA Loading 5 1 read-only LDRBS RB Loading 6 1 read-only ETRGS External Trigger 7 1 read-only CCR2 Channel Control Register (channel = 2) 0x00000080 32 write-only CLKEN Counter Clock Enable Command 0 1 write-only CLKDIS Counter Clock Disable Command 1 1 write-only SWTRG Software Trigger Command 2 1 write-only CMR2 Channel Mode Register (channel = 2) 0x00000084 32 read-write 0x00000000 TCCLKS Clock Selection 0 3 read-write TIMER_CLOCK1 Clock selected: TCLK1 0x0 TIMER_CLOCK2 Clock selected: TCLK2 0x1 TIMER_CLOCK3 Clock selected: TCLK3 0x2 TIMER_CLOCK4 Clock selected: TCLK4 0x3 TIMER_CLOCK5 Clock selected: TCLK5 0x4 XC0 Clock selected: XC0 0x5 XC1 Clock selected: XC1 0x6 XC2 Clock selected: XC2 0x7 CLKI Clock Invert 3 1 read-write BURST Burst Signal Selection 4 2 read-write NONE The clock is not gated by an external signal. 0x0 XC0 XC0 is ANDed with the selected clock. 0x1 XC1 XC1 is ANDed with the selected clock. 0x2 XC2 XC2 is ANDed with the selected clock. 0x3 LDBSTOP Counter Clock Stopped with RB Loading 6 1 read-write LDBDIS Counter Clock Disable with RB Loading 7 1 read-write ETRGEDG External Trigger Edge Selection 8 2 read-write NONE The clock is not gated by an external signal. 0x0 RISING Rising edge 0x1 FALLING Falling edge 0x2 EDGE Each edge 0x3 ABETRG TIOA or TIOB External Trigger Selection 10 1 read-write CPCTRG RC Compare Trigger Enable 14 1 read-write WAVE Waveform Mode 15 1 read-write LDRA RA Loading Edge Selection 16 2 read-write NONE None 0x0 RISING Rising edge of TIOA 0x1 FALLING Falling edge of TIOA 0x2 EDGE Each edge of TIOA 0x3 LDRB RB Loading Edge Selection 18 2 read-write NONE None 0x0 RISING Rising edge of TIOA 0x1 FALLING Falling edge of TIOA 0x2 EDGE Each edge of TIOA 0x3 CMR2_WAVE_EQ_1 Channel Mode Register (channel = 2) WAVE_EQ_1 0x00000084 32 read-write 0x00000000 TCCLKS Clock Selection 0 3 read-write TIMER_CLOCK1 Clock selected: TCLK1 0x0 TIMER_CLOCK2 Clock selected: TCLK2 0x1 TIMER_CLOCK3 Clock selected: TCLK3 0x2 TIMER_CLOCK4 Clock selected: TCLK4 0x3 TIMER_CLOCK5 Clock selected: TCLK5 0x4 XC0 Clock selected: XC0 0x5 XC1 Clock selected: XC1 0x6 XC2 Clock selected: XC2 0x7 CLKI Clock Invert 3 1 read-write BURST Burst Signal Selection 4 2 read-write NONE The clock is not gated by an external signal. 0x0 XC0 XC0 is ANDed with the selected clock. 0x1 XC1 XC1 is ANDed with the selected clock. 0x2 XC2 XC2 is ANDed with the selected clock. 0x3 CPCSTOP Counter Clock Stopped with RC Compare 6 1 read-write CPCDIS Counter Clock Disable with RC Compare 7 1 read-write EEVTEDG External Event Edge Selection 8 2 read-write NONE None 0x0 RISING Rising edge 0x1 FALLING Falling edge 0x2 EDGE Each edge 0x3 EEVT External Event Selection 10 2 read-write TIOB TIOB 0x0 XC0 XC0 0x1 XC1 XC1 0x2 XC2 XC2 0x3 ENETRG External Event Trigger Enable 12 1 read-write WAVSEL Waveform Selection 13 2 read-write UP UP mode without automatic trigger on RC Compare 0x0 UPDOWN UPDOWN mode without automatic trigger on RC Compare 0x1 UP_RC UP mode with automatic trigger on RC Compare 0x2 UPDOWN_RC UPDOWN mode with automatic trigger on RC Compare 0x3 WAVE Waveform Mode 15 1 read-write ACPA RA Compare Effect on TIOA 16 2 read-write NONE None 0x0 SET Set 0x1 CLEAR Clear 0x2 TOGGLE Toggle 0x3 ACPC RC Compare Effect on TIOA 18 2 read-write NONE None 0x0 SET Set 0x1 CLEAR Clear 0x2 TOGGLE Toggle 0x3 AEEVT External Event Effect on TIOA 20 2 read-write NONE None 0x0 SET Set 0x1 CLEAR Clear 0x2 TOGGLE Toggle 0x3 ASWTRG Software Trigger Effect on TIOA 22 2 read-write NONE None 0x0 SET Set 0x1 CLEAR Clear 0x2 TOGGLE Toggle 0x3 BCPB RB Compare Effect on TIOB 24 2 read-write NONE None 0x0 SET Set 0x1 CLEAR Clear 0x2 TOGGLE Toggle 0x3 BCPC RC Compare Effect on TIOB 26 2 read-write NONE None 0x0 SET Set 0x1 CLEAR Clear 0x2 TOGGLE Toggle 0x3 BEEVT External Event Effect on TIOB 28 2 read-write NONE None 0x0 SET Set 0x1 CLEAR Clear 0x2 TOGGLE Toggle 0x3 BSWTRG Software Trigger Effect on TIOB 30 2 read-write NONE None 0x0 SET Set 0x1 CLEAR Clear 0x2 TOGGLE Toggle 0x3 RAB2 Register AB (channel = 2) 0x0000008C 32 read-only 0x00000000 RAB Register A or Register B 0 32 read-only CV2 Counter Value (channel = 2) 0x00000090 32 read-only 0x00000000 CV Counter Value 0 32 read-only RA2 Register A (channel = 2) 0x00000094 32 read-write 0x00000000 RA Register A 0 32 read-write RB2 Register B (channel = 2) 0x00000098 32 read-write 0x00000000 RB Register B 0 32 read-write RC2 Register C (channel = 2) 0x0000009C 32 read-write 0x00000000 RC Register C 0 32 read-write SR2 Status Register (channel = 2) 0x000000A0 32 read-only 0x00000000 COVFS Counter Overflow Status 0 1 read-only LOVRS Load Overrun Status 1 1 read-only CPAS RA Compare Status 2 1 read-only CPBS RB Compare Status 3 1 read-only CPCS RC Compare Status 4 1 read-only LDRAS RA Loading Status 5 1 read-only LDRBS RB Loading Status 6 1 read-only ETRGS External Trigger Status 7 1 read-only CLKSTA Clock Enabling Status 16 1 read-only MTIOA TIOA Mirror 17 1 read-only MTIOB TIOB Mirror 18 1 read-only IER2 Interrupt Enable Register (channel = 2) 0x000000A4 32 write-only COVFS Counter Overflow 0 1 write-only LOVRS Load Overrun 1 1 write-only CPAS RA Compare 2 1 write-only CPBS RB Compare 3 1 write-only CPCS RC Compare 4 1 write-only LDRAS RA Loading 5 1 write-only LDRBS RB Loading 6 1 write-only ETRGS External Trigger 7 1 write-only IDR2 Interrupt Disable Register (channel = 2) 0x000000A8 32 write-only COVFS Counter Overflow 0 1 write-only LOVRS Load Overrun 1 1 write-only CPAS RA Compare 2 1 write-only CPBS RB Compare 3 1 write-only CPCS RC Compare 4 1 write-only LDRAS RA Loading 5 1 write-only LDRBS RB Loading 6 1 write-only ETRGS External Trigger 7 1 write-only IMR2 Interrupt Mask Register (channel = 2) 0x000000AC 32 read-only 0x00000000 COVFS Counter Overflow 0 1 read-only LOVRS Load Overrun 1 1 read-only CPAS RA Compare 2 1 read-only CPBS RB Compare 3 1 read-only CPCS RC Compare 4 1 read-only LDRAS RA Loading 5 1 read-only LDRBS RB Loading 6 1 read-only ETRGS External Trigger 7 1 read-only BCR Block Control Register 0x000000C0 32 write-only SYNC Synchro Command 0 1 write-only BMR Block Mode Register 0x000000C4 32 read-write 0x00000000 TC0XC0S External Clock Signal 0 Selection 0 2 read-write TCLK0 Signal connected to XC0: TCLK0 0x0 TIOA1 Signal connected to XC0: TIOA1 0x2 TIOA2 Signal connected to XC0: TIOA2 0x3 TC1XC1S External Clock Signal 1 Selection 2 2 read-write TCLK1 Signal connected to XC1: TCLK1 0x0 TIOA0 Signal connected to XC1: TIOA0 0x2 TIOA2 Signal connected to XC1: TIOA2 0x3 TC2XC2S External Clock Signal 2 Selection 4 2 read-write TCLK2 Signal connected to XC2: TCLK2 0x0 TIOA1 Signal connected to XC2: TIOA1 0x2 TIOA2 Signal connected to XC2: TIOA2 0x3 TWI0 6212M Two-wire Interface 0 TWI TWI0_ 0xF8010000 0 0x4000 registers TWI0 9 CR Control Register 0x00000000 32 write-only START Send a START Condition 0 1 write-only STOP Send a STOP Condition 1 1 write-only MSEN TWI Master Mode Enabled 2 1 write-only MSDIS TWI Master Mode Disabled 3 1 write-only SVEN TWI Slave Mode Enabled 4 1 write-only SVDIS TWI Slave Mode Disabled 5 1 write-only QUICK SMBUS Quick Command 6 1 write-only SWRST Software Reset 7 1 write-only MMR Master Mode Register 0x00000004 32 read-write 0x00000000 IADRSZ Internal Device Address Size 8 2 read-write NONE No internal device address 0x0 1_BYTE One-byte internal device address 0x1 2_BYTE Two-byte internal device address 0x2 3_BYTE Three-byte internal device address 0x3 MREAD Master Read Direction 12 1 read-write DADR Device Address 16 7 read-write SMR Slave Mode Register 0x00000008 32 read-write 0x00000000 SADR Slave Address 16 7 read-write IADR Internal Address Register 0x0000000C 32 read-write 0x00000000 IADR Internal Address 0 24 read-write CWGR Clock Waveform Generator Register 0x00000010 32 read-write 0x00000000 CLDIV Clock Low Divider 0 8 read-write CHDIV Clock High Divider 8 8 read-write CKDIV Clock Divider 16 3 read-write SR Status Register 0x00000020 32 read-only 0x0000F009 TXCOMP Transmission Completed (automatically set / reset) 0 1 read-only RXRDY Receive Holding Register Ready (automatically set / reset) 1 1 read-only TXRDY Transmit Holding Register Ready (automatically set / reset) 2 1 read-only SVREAD Slave Read (automatically set / reset) 3 1 read-only SVACC Slave Access (automatically set / reset) 4 1 read-only GACC General Call Access (clear on read) 5 1 read-only OVRE Overrun Error (clear on read) 6 1 read-only NACK Not Acknowledged (clear on read) 8 1 read-only ARBLST Arbitration Lost (clear on read) 9 1 read-only SCLWS Clock Wait State (automatically set / reset) 10 1 read-only EOSACC End Of Slave Access (clear on read) 11 1 read-only IER Interrupt Enable Register 0x00000024 32 write-only TXCOMP Transmission Completed Interrupt Enable 0 1 write-only RXRDY Receive Holding Register Ready Interrupt Enable 1 1 write-only TXRDY Transmit Holding Register Ready Interrupt Enable 2 1 write-only SVACC Slave Access Interrupt Enable 4 1 write-only GACC General Call Access Interrupt Enable 5 1 write-only OVRE Overrun Error Interrupt Enable 6 1 write-only NACK Not Acknowledge Interrupt Enable 8 1 write-only ARBLST Arbitration Lost Interrupt Enable 9 1 write-only SCL_WS Clock Wait State Interrupt Enable 10 1 write-only EOSACC End Of Slave Access Interrupt Enable 11 1 write-only IDR Interrupt Disable Register 0x00000028 32 write-only TXCOMP Transmission Completed Interrupt Disable 0 1 write-only RXRDY Receive Holding Register Ready Interrupt Disable 1 1 write-only TXRDY Transmit Holding Register Ready Interrupt Disable 2 1 write-only SVACC Slave Access Interrupt Disable 4 1 write-only GACC General Call Access Interrupt Disable 5 1 write-only OVRE Overrun Error Interrupt Disable 6 1 write-only NACK Not Acknowledge Interrupt Disable 8 1 write-only ARBLST Arbitration Lost Interrupt Disable 9 1 write-only SCL_WS Clock Wait State Interrupt Disable 10 1 write-only EOSACC End Of Slave Access Interrupt Disable 11 1 write-only IMR Interrupt Mask Register 0x0000002C 32 read-only 0x00000000 TXCOMP Transmission Completed Interrupt Mask 0 1 read-only RXRDY Receive Holding Register Ready Interrupt Mask 1 1 read-only TXRDY Transmit Holding Register Ready Interrupt Mask 2 1 read-only SVACC Slave Access Interrupt Mask 4 1 read-only GACC General Call Access Interrupt Mask 5 1 read-only OVRE Overrun Error Interrupt Mask 6 1 read-only NACK Not Acknowledge Interrupt Mask 8 1 read-only ARBLST Arbitration Lost Interrupt Mask 9 1 read-only SCL_WS Clock Wait State Interrupt Mask 10 1 read-only EOSACC End Of Slave Access Interrupt Mask 11 1 read-only RHR Receive Holding Register 0x00000030 32 read-only 0x00000000 RXDATA Master or Slave Receive Holding Data 0 8 read-only THR Transmit Holding Register 0x00000034 32 write-only 0x00000000 TXDATA Master or Slave Transmit Holding Data 0 8 write-only WPROT_MODE Protection Mode Register 0x000000E4 32 read-write 0x00000000 WPROT Write protection bit 0 1 read-write SECURITY_CODE Write protection mode security code 8 24 read-write WPROT_STATUS Protection Status Register 0x000000E8 32 read-only 0x00000000 WPROTERR Write Protection Error 0 1 read-only WPROTADDR Write Protection Error Address 8 24 read-only TWI1 6212M Two-wire Interface 1 TWI TWI1_ 0xF8014000 0 0x4000 registers TWI1 10 CR Control Register 0x00000000 32 write-only START Send a START Condition 0 1 write-only STOP Send a STOP Condition 1 1 write-only MSEN TWI Master Mode Enabled 2 1 write-only MSDIS TWI Master Mode Disabled 3 1 write-only SVEN TWI Slave Mode Enabled 4 1 write-only SVDIS TWI Slave Mode Disabled 5 1 write-only QUICK SMBUS Quick Command 6 1 write-only SWRST Software Reset 7 1 write-only MMR Master Mode Register 0x00000004 32 read-write 0x00000000 IADRSZ Internal Device Address Size 8 2 read-write NONE No internal device address 0x0 1_BYTE One-byte internal device address 0x1 2_BYTE Two-byte internal device address 0x2 3_BYTE Three-byte internal device address 0x3 MREAD Master Read Direction 12 1 read-write DADR Device Address 16 7 read-write SMR Slave Mode Register 0x00000008 32 read-write 0x00000000 SADR Slave Address 16 7 read-write IADR Internal Address Register 0x0000000C 32 read-write 0x00000000 IADR Internal Address 0 24 read-write CWGR Clock Waveform Generator Register 0x00000010 32 read-write 0x00000000 CLDIV Clock Low Divider 0 8 read-write CHDIV Clock High Divider 8 8 read-write CKDIV Clock Divider 16 3 read-write SR Status Register 0x00000020 32 read-only 0x0000F009 TXCOMP Transmission Completed (automatically set / reset) 0 1 read-only RXRDY Receive Holding Register Ready (automatically set / reset) 1 1 read-only TXRDY Transmit Holding Register Ready (automatically set / reset) 2 1 read-only SVREAD Slave Read (automatically set / reset) 3 1 read-only SVACC Slave Access (automatically set / reset) 4 1 read-only GACC General Call Access (clear on read) 5 1 read-only OVRE Overrun Error (clear on read) 6 1 read-only NACK Not Acknowledged (clear on read) 8 1 read-only ARBLST Arbitration Lost (clear on read) 9 1 read-only SCLWS Clock Wait State (automatically set / reset) 10 1 read-only EOSACC End Of Slave Access (clear on read) 11 1 read-only IER Interrupt Enable Register 0x00000024 32 write-only TXCOMP Transmission Completed Interrupt Enable 0 1 write-only RXRDY Receive Holding Register Ready Interrupt Enable 1 1 write-only TXRDY Transmit Holding Register Ready Interrupt Enable 2 1 write-only SVACC Slave Access Interrupt Enable 4 1 write-only GACC General Call Access Interrupt Enable 5 1 write-only OVRE Overrun Error Interrupt Enable 6 1 write-only NACK Not Acknowledge Interrupt Enable 8 1 write-only ARBLST Arbitration Lost Interrupt Enable 9 1 write-only SCL_WS Clock Wait State Interrupt Enable 10 1 write-only EOSACC End Of Slave Access Interrupt Enable 11 1 write-only IDR Interrupt Disable Register 0x00000028 32 write-only TXCOMP Transmission Completed Interrupt Disable 0 1 write-only RXRDY Receive Holding Register Ready Interrupt Disable 1 1 write-only TXRDY Transmit Holding Register Ready Interrupt Disable 2 1 write-only SVACC Slave Access Interrupt Disable 4 1 write-only GACC General Call Access Interrupt Disable 5 1 write-only OVRE Overrun Error Interrupt Disable 6 1 write-only NACK Not Acknowledge Interrupt Disable 8 1 write-only ARBLST Arbitration Lost Interrupt Disable 9 1 write-only SCL_WS Clock Wait State Interrupt Disable 10 1 write-only EOSACC End Of Slave Access Interrupt Disable 11 1 write-only IMR Interrupt Mask Register 0x0000002C 32 read-only 0x00000000 TXCOMP Transmission Completed Interrupt Mask 0 1 read-only RXRDY Receive Holding Register Ready Interrupt Mask 1 1 read-only TXRDY Transmit Holding Register Ready Interrupt Mask 2 1 read-only SVACC Slave Access Interrupt Mask 4 1 read-only GACC General Call Access Interrupt Mask 5 1 read-only OVRE Overrun Error Interrupt Mask 6 1 read-only NACK Not Acknowledge Interrupt Mask 8 1 read-only ARBLST Arbitration Lost Interrupt Mask 9 1 read-only SCL_WS Clock Wait State Interrupt Mask 10 1 read-only EOSACC End Of Slave Access Interrupt Mask 11 1 read-only RHR Receive Holding Register 0x00000030 32 read-only 0x00000000 RXDATA Master or Slave Receive Holding Data 0 8 read-only THR Transmit Holding Register 0x00000034 32 write-only 0x00000000 TXDATA Master or Slave Transmit Holding Data 0 8 write-only WPROT_MODE Protection Mode Register 0x000000E4 32 read-write 0x00000000 WPROT Write protection bit 0 1 read-write SECURITY_CODE Write protection mode security code 8 24 read-write WPROT_STATUS Protection Status Register 0x000000E8 32 read-only 0x00000000 WPROTERR Write Protection Error 0 1 read-only WPROTADDR Write Protection Error Address 8 24 read-only USART0 6089Y Universal Synchronous Asynchronous Receiver Transmitter 0 USART USART0_ 0xF801C000 0 0x4000 registers USART0 5 CR Control Register 0x00000000 32 write-only RSTRX Reset Receiver 2 1 write-only RSTTX Reset Transmitter 3 1 write-only RXEN Receiver Enable 4 1 write-only RXDIS Receiver Disable 5 1 write-only TXEN Transmitter Enable 6 1 write-only TXDIS Transmitter Disable 7 1 write-only RSTSTA Reset Status Bits 8 1 write-only STTBRK Start Break 9 1 write-only STPBRK Stop Break 10 1 write-only STTTO Start Time-out 11 1 write-only SENDA Send Address 12 1 write-only RSTIT Reset Iterations 13 1 write-only RSTNACK Reset Non Acknowledge 14 1 write-only RETTO Rearm Time-out 15 1 write-only RTSEN Request to Send Enable 18 1 write-only RTSDIS Request to Send Disable 19 1 write-only LINABT Abort LIN Transmission 20 1 write-only LINWKUP Send LIN Wakeup Signal 21 1 write-only CR_SPI_MODE Control Register SPI_MODE 0x00000000 32 write-only RSTRX Reset Receiver 2 1 write-only RSTTX Reset Transmitter 3 1 write-only RXEN Receiver Enable 4 1 write-only RXDIS Receiver Disable 5 1 write-only TXEN Transmitter Enable 6 1 write-only TXDIS Transmitter Disable 7 1 write-only RSTSTA Reset Status Bits 8 1 write-only FCS Force SPI Chip Select 18 1 write-only RCS Release SPI Chip Select 19 1 write-only MR Mode Register 0x00000004 32 read-write USART_MODE USART Mode of Operation 0 4 read-write NORMAL Normal mode 0x0 RS485 RS485 0x1 HW_HANDSHAKING Hardware Handshaking 0x2 IS07816_T_0 IS07816 Protocol: T = 0 0x4 IS07816_T_1 IS07816 Protocol: T = 1 0x6 IRDA IrDA 0x8 LIN_MASTER LIN Master 0xA LIN_SLAVE LIN Slave 0xB SPI_MASTER SPI Master 0xE SPI_SLAVE SPI Slave 0xF USCLKS Clock Selection 4 2 read-write MCK Master Clock MCK is selected 0x0 DIV Internal Clock Divided MCK/DIV (DIV=8) is selected 0x1 SCK Serial Clock SLK is selected 0x3 CHRL Character Length. 6 2 read-write 5_BIT Character length is 5 bits 0x0 6_BIT Character length is 6 bits 0x1 7_BIT Character length is 7 bits 0x2 8_BIT Character length is 8 bits 0x3 SYNC Synchronous Mode Select 8 1 read-write PAR Parity Type 9 3 read-write EVEN Even parity 0x0 ODD Odd parity 0x1 SPACE Parity forced to 0 (Space) 0x2 MARK Parity forced to 1 (Mark) 0x3 NO No parity 0x4 MULTIDROP Multidrop mode 0x6 NBSTOP Number of Stop Bits 12 2 read-write 1_BIT 1 stop bit 0x0 1_5_BIT 1.5 stop bit (SYNC = 0) or reserved (SYNC = 1) 0x1 2_BIT 2 stop bits 0x2 CHMODE Channel Mode 14 2 read-write NORMAL Normal Mode 0x0 AUTOMATIC Automatic Echo. Receiver input is connected to the TXD pin. 0x1 LOCAL_LOOPBACK Local Loopback. Transmitter output is connected to the Receiver Input. 0x2 REMOTE_LOOPBACK Remote Loopback. RXD pin is internally connected to the TXD pin. 0x3 MSBF Bit Order 16 1 read-write MODE9 9-bit Character Length 17 1 read-write CLKO Clock Output Select 18 1 read-write OVER Oversampling Mode 19 1 read-write INACK Inhibit Non Acknowledge 20 1 read-write DSNACK Disable Successive NACK 21 1 read-write VAR_SYNC Variable Synchronization of Command/Data Sync Start Frame Delimiter 22 1 read-write INVDATA INverted Data 23 1 read-write MAX_ITERATION Maximum Number of Automatic Iteration 24 3 read-write FILTER Infrared Receive Line Filter 28 1 read-write MAN Manchester Encoder/Decoder Enable 29 1 read-write MODSYNC Manchester Synchronization Mode 30 1 read-write ONEBIT Start Frame Delimiter Selector 31 1 read-write MR_SPI_MODE Mode Register SPI_MODE 0x00000004 32 read-write USART_MODE USART Mode of Operation 0 4 read-write SPI_MASTER SPI Master 0xE SPI_SLAVE SPI Slave 0xF USCLKS Clock Selection 4 2 read-write MCK Master Clock MCK is selected 0x0 DIV Internal Clock Divided MCK/DIV (DIV=8) is selected 0x1 SCK Serial Clock SLK is selected 0x3 CHRL Character Length. 6 2 read-write 8_BIT Character length is 8 bits 0x3 CPHA SPI Clock Phase 8 1 read-write CPOL SPI Clock Polarity 16 1 read-write WRDBT Wait Read Data Before Transfer 20 1 read-write IER Interrupt Enable Register 0x00000008 32 write-only RXRDY RXRDY Interrupt Enable 0 1 write-only TXRDY TXRDY Interrupt Enable 1 1 write-only RXBRK Receiver Break Interrupt Enable 2 1 write-only OVRE Overrun Error Interrupt Enable 5 1 write-only FRAME Framing Error Interrupt Enable 6 1 write-only PARE Parity Error Interrupt Enable 7 1 write-only TIMEOUT Time-out Interrupt Enable 8 1 write-only TXEMPTY TXEMPTY Interrupt Enable 9 1 write-only ITER Max number of Repetitions Reached Interrupt Enable 10 1 write-only NACK Non Acknowledge Interrupt Enable 13 1 write-only CTSIC Clear to Send Input Change Interrupt Enable 19 1 write-only MANE Manchester Error Interrupt Enable 24 1 write-only IER_SPI_MODE Interrupt Enable Register SPI_MODE 0x00000008 32 write-only RXRDY RXRDY Interrupt Enable 0 1 write-only TXRDY TXRDY Interrupt Enable 1 1 write-only OVRE Overrun Error Interrupt Enable 5 1 write-only TXEMPTY TXEMPTY Interrupt Enable 9 1 write-only UNRE SPI Underrun Error Interrupt Enable 10 1 write-only IER_LIN_MODE Interrupt Enable Register LIN_MODE 0x00000008 32 write-only RXRDY RXRDY Interrupt Enable 0 1 write-only TXRDY TXRDY Interrupt Enable 1 1 write-only OVRE Overrun Error Interrupt Enable 5 1 write-only FRAME Framing Error Interrupt Enable 6 1 write-only PARE Parity Error Interrupt Enable 7 1 write-only TIMEOUT Time-out Interrupt Enable 8 1 write-only TXEMPTY TXEMPTY Interrupt Enable 9 1 write-only LINBK LIN Break Sent or LIN Break Received Interrupt Enable 13 1 write-only LINID LIN Identifier Sent or LIN Identifier Received Interrupt Enable 14 1 write-only LINTC LIN Transfer Completed Interrupt Enable 15 1 write-only LINBE LIN Bus Error Interrupt Enable 25 1 write-only LINISFE LIN Inconsistent Synch Field Error Interrupt Enable 26 1 write-only LINIPE LIN Identifier Parity Interrupt Enable 27 1 write-only LINCE LIN Checksum Error Interrupt Enable 28 1 write-only LINSNRE LIN Slave Not Responding Error Interrupt Enable 29 1 write-only IDR Interrupt Disable Register 0x0000000C 32 write-only RXRDY RXRDY Interrupt Disable 0 1 write-only TXRDY TXRDY Interrupt Disable 1 1 write-only RXBRK Receiver Break Interrupt Disable 2 1 write-only OVRE Overrun Error Interrupt Enable 5 1 write-only FRAME Framing Error Interrupt Disable 6 1 write-only PARE Parity Error Interrupt Disable 7 1 write-only TIMEOUT Time-out Interrupt Disable 8 1 write-only TXEMPTY TXEMPTY Interrupt Disable 9 1 write-only ITER Max number of Repetitions Reached Interrupt Disable 10 1 write-only NACK Non Acknowledge Interrupt Disable 13 1 write-only CTSIC Clear to Send Input Change Interrupt Disable 19 1 write-only MANE Manchester Error Interrupt Disable 24 1 write-only IDR_SPI_MODE Interrupt Disable Register SPI_MODE 0x0000000C 32 write-only RXRDY RXRDY Interrupt Disable 0 1 write-only TXRDY TXRDY Interrupt Disable 1 1 write-only OVRE Overrun Error Interrupt Disable 5 1 write-only TXEMPTY TXEMPTY Interrupt Disable 9 1 write-only UNRE SPI Underrun Error Interrupt Disable 10 1 write-only IDR_LIN_MODE Interrupt Disable Register LIN_MODE 0x0000000C 32 write-only RXRDY RXRDY Interrupt Disable 0 1 write-only TXRDY TXRDY Interrupt Disable 1 1 write-only OVRE Overrun Error Interrupt Disable 5 1 write-only FRAME Framing Error Interrupt Disable 6 1 write-only PARE Parity Error Interrupt Disable 7 1 write-only TIMEOUT Time-out Interrupt Disable 8 1 write-only TXEMPTY TXEMPTY Interrupt Disable 9 1 write-only LINBK LIN Break Sent or LIN Break Received Interrupt Disable 13 1 write-only LINID LIN Identifier Sent or LIN Identifier Received Interrupt Disable 14 1 write-only LINTC LIN Transfer Completed Interrupt Disable 15 1 write-only LINBE LIN Bus Error Interrupt Disable 25 1 write-only LINISFE LIN Inconsistent Synch Field Error Interrupt Disable 26 1 write-only LINIPE LIN Identifier Parity Interrupt Disable 27 1 write-only LINCE LIN Checksum Error Interrupt Disable 28 1 write-only LINSNRE LIN Slave Not Responding Error Interrupt Disable 29 1 write-only IMR Interrupt Mask Register 0x00000010 32 read-only 0x00000000 RXRDY RXRDY Interrupt Mask 0 1 read-only TXRDY TXRDY Interrupt Mask 1 1 read-only RXBRK Receiver Break Interrupt Mask 2 1 read-only OVRE Overrun Error Interrupt Mask 5 1 read-only FRAME Framing Error Interrupt Mask 6 1 read-only PARE Parity Error Interrupt Mask 7 1 read-only TIMEOUT Time-out Interrupt Mask 8 1 read-only TXEMPTY TXEMPTY Interrupt Mask 9 1 read-only ITER Max number of Repetitions Reached Interrupt Mask 10 1 read-only NACK Non Acknowledge Interrupt Mask 13 1 read-only CTSIC Clear to Send Input Change Interrupt Mask 19 1 read-only MANE Manchester Error Interrupt Mask 24 1 read-only IMR_SPI_MODE Interrupt Mask Register SPI_MODE 0x00000010 32 read-only 0x00000000 RXRDY RXRDY Interrupt Mask 0 1 read-only TXRDY TXRDY Interrupt Mask 1 1 read-only OVRE Overrun Error Interrupt Mask 5 1 read-only TXEMPTY TXEMPTY Interrupt Mask 9 1 read-only UNRE SPI Underrun Error Interrupt Mask 10 1 read-only IMR_LIN_MODE Interrupt Mask Register LIN_MODE 0x00000010 32 read-only 0x00000000 RXRDY RXRDY Interrupt Mask 0 1 read-only TXRDY TXRDY Interrupt Mask 1 1 read-only OVRE Overrun Error Interrupt Mask 5 1 read-only FRAME Framing Error Interrupt Mask 6 1 read-only PARE Parity Error Interrupt Mask 7 1 read-only TIMEOUT Time-out Interrupt Mask 8 1 read-only TXEMPTY TXEMPTY Interrupt Mask 9 1 read-only LINBK LIN Break Sent or LIN Break Received Interrupt Mask 13 1 read-only LINID LIN Identifier Sent or LIN Identifier Received Interrupt Mask 14 1 read-only LINTC LIN Transfer Completed Interrupt Mask 15 1 read-only LINBE LIN Bus Error Interrupt Mask 25 1 read-only LINISFE LIN Inconsistent Synch Field Error Interrupt Mask 26 1 read-only LINIPE LIN Identifier Parity Interrupt Mask 27 1 read-only LINCE LIN Checksum Error Interrupt Mask 28 1 read-only LINSNRE LIN Slave Not Responding Error Interrupt Mask 29 1 read-only CSR Channel Status Register 0x00000014 32 read-only RXRDY Receiver Ready 0 1 read-only TXRDY Transmitter Ready 1 1 read-only RXBRK Break Received/End of Break 2 1 read-only OVRE Overrun Error 5 1 read-only FRAME Framing Error 6 1 read-only PARE Parity Error 7 1 read-only TIMEOUT Receiver Time-out 8 1 read-only TXEMPTY Transmitter Empty 9 1 read-only ITER Max number of Repetitions Reached 10 1 read-only NACK Non Acknowledge Interrupt 13 1 read-only CTSIC Clear to Send Input Change Flag 19 1 read-only CTS Image of CTS Input 23 1 read-only MANERR Manchester Error 24 1 read-only CSR_SPI_MODE Channel Status Register SPI_MODE 0x00000014 32 read-only RXRDY Receiver Ready 0 1 read-only TXRDY Transmitter Ready 1 1 read-only OVRE Overrun Error 5 1 read-only TXEMPTY Transmitter Empty 9 1 read-only UNRE Underrun Error 10 1 read-only CSR_LIN_MODE Channel Status Register LIN_MODE 0x00000014 32 read-only RXRDY Receiver Ready 0 1 read-only TXRDY Transmitter Ready 1 1 read-only OVRE Overrun Error 5 1 read-only FRAME Framing Error 6 1 read-only PARE Parity Error 7 1 read-only TIMEOUT Receiver Time-out 8 1 read-only TXEMPTY Transmitter Empty 9 1 read-only LINBK LIN Break Sent or LIN Break Received 13 1 read-only LINID LIN Identifier Sent or LIN Identifier Received 14 1 read-only LINTC LIN Transfer Completed 15 1 read-only LINBLS LIN Bus Line Status 23 1 read-only LINBE LIN Bit Error 25 1 read-only LINISFE LIN Inconsistent Synch Field Error 26 1 read-only LINIPE LIN Identifier Parity Error 27 1 read-only LINCE LIN Checksum Error 28 1 read-only LINSNRE LIN Slave Not Responding Error 29 1 read-only RHR Receiver Holding Register 0x00000018 32 read-only 0x00000000 RXCHR Received Character 0 9 read-only RXSYNH Received Sync 15 1 read-only THR Transmitter Holding Register 0x0000001C 32 write-only TXCHR Character to be Transmitted 0 9 write-only TXSYNH Sync Field to be transmitted 15 1 write-only BRGR Baud Rate Generator Register 0x00000020 32 read-write 0x00000000 CD Clock Divider 0 16 read-write FP Fractional Part 16 3 read-write RTOR Receiver Time-out Register 0x00000024 32 read-write 0x00000000 TO Time-out Value 0 17 read-write TTGR Transmitter Timeguard Register 0x00000028 32 read-write 0x00000000 TG Timeguard Value 0 8 read-write FIDI FI DI Ratio Register 0x00000040 32 read-write 0x00000174 FI_DI_RATIO FI Over DI Ratio Value 0 11 read-write NER Number of Errors Register 0x00000044 32 read-only NB_ERRORS Number of Errors 0 8 read-only IF IrDA Filter Register 0x0000004C 32 read-write 0x00000000 IRDA_FILTER IrDA Filter 0 8 read-write MAN Manchester Encoder Decoder Register 0x00000050 32 read-write 0xB0011004 TX_PL Transmitter Preamble Length 0 4 read-write TX_PP Transmitter Preamble Pattern 8 2 read-write ALL_ONE The preamble is composed of '1's 0x0 ALL_ZERO The preamble is composed of '0's 0x1 ZERO_ONE The preamble is composed of '01's 0x2 ONE_ZERO The preamble is composed of '10's 0x3 TX_MPOL Transmitter Manchester Polarity 12 1 read-write RX_PL Receiver Preamble Length 16 4 read-write RX_PP Receiver Preamble Pattern detected 24 2 read-write ALL_ONE The preamble is composed of '1's 0x0 ALL_ZERO The preamble is composed of '0's 0x1 ZERO_ONE The preamble is composed of '01's 0x2 ONE_ZERO The preamble is composed of '10's 0x3 RX_MPOL Receiver Manchester Polarity 28 1 read-write ONE Must Be Set to 1 29 1 read-write DRIFT Drift compensation 30 1 read-write LINMR LIN Mode Register 0x00000054 32 read-write 0x00000000 NACT LIN Node Action 0 2 read-write PUBLISH The USART transmits the response. 0x0 SUBSCRIBE The USART receives the response. 0x1 IGNORE The USART does not transmit and does not receive the response. 0x2 PARDIS Parity Disable 2 1 read-write CHKDIS Checksum Disable 3 1 read-write CHKTYP Checksum Type 4 1 read-write DLM Data Length Mode 5 1 read-write FSDIS Frame Slot Mode Disable 6 1 read-write WKUPTYP Wakeup Signal Type 7 1 read-write DLC Data Length Control 8 8 read-write PDCM DMAC Mode 16 1 read-write LINIR LIN Identifier Register 0x00000058 32 read-write 0x00000000 IDCHR Identifier Character 0 8 read-write WPMR Write Protect Mode Register 0x000000E4 32 read-write 0x00000000 WPEN Write Protect Enable 0 1 read-write WPKEY Write Protect KEY 8 24 read-write WPSR Write Protect Status Register 0x000000E8 32 read-only 0x00000000 WPVS Write Protect Violation Status 0 1 read-only WPVSRC Write Protect Violation Source 8 16 read-only USART1 6089Y Universal Synchronous Asynchronous Receiver Transmitter 1 USART USART1_ 0xF8020000 0 0x4000 registers USART1 6 CR Control Register 0x00000000 32 write-only RSTRX Reset Receiver 2 1 write-only RSTTX Reset Transmitter 3 1 write-only RXEN Receiver Enable 4 1 write-only RXDIS Receiver Disable 5 1 write-only TXEN Transmitter Enable 6 1 write-only TXDIS Transmitter Disable 7 1 write-only RSTSTA Reset Status Bits 8 1 write-only STTBRK Start Break 9 1 write-only STPBRK Stop Break 10 1 write-only STTTO Start Time-out 11 1 write-only SENDA Send Address 12 1 write-only RSTIT Reset Iterations 13 1 write-only RSTNACK Reset Non Acknowledge 14 1 write-only RETTO Rearm Time-out 15 1 write-only RTSEN Request to Send Enable 18 1 write-only RTSDIS Request to Send Disable 19 1 write-only LINABT Abort LIN Transmission 20 1 write-only LINWKUP Send LIN Wakeup Signal 21 1 write-only CR_SPI_MODE Control Register SPI_MODE 0x00000000 32 write-only RSTRX Reset Receiver 2 1 write-only RSTTX Reset Transmitter 3 1 write-only RXEN Receiver Enable 4 1 write-only RXDIS Receiver Disable 5 1 write-only TXEN Transmitter Enable 6 1 write-only TXDIS Transmitter Disable 7 1 write-only RSTSTA Reset Status Bits 8 1 write-only FCS Force SPI Chip Select 18 1 write-only RCS Release SPI Chip Select 19 1 write-only MR Mode Register 0x00000004 32 read-write USART_MODE USART Mode of Operation 0 4 read-write NORMAL Normal mode 0x0 RS485 RS485 0x1 HW_HANDSHAKING Hardware Handshaking 0x2 IS07816_T_0 IS07816 Protocol: T = 0 0x4 IS07816_T_1 IS07816 Protocol: T = 1 0x6 IRDA IrDA 0x8 LIN_MASTER LIN Master 0xA LIN_SLAVE LIN Slave 0xB SPI_MASTER SPI Master 0xE SPI_SLAVE SPI Slave 0xF USCLKS Clock Selection 4 2 read-write MCK Master Clock MCK is selected 0x0 DIV Internal Clock Divided MCK/DIV (DIV=8) is selected 0x1 SCK Serial Clock SLK is selected 0x3 CHRL Character Length. 6 2 read-write 5_BIT Character length is 5 bits 0x0 6_BIT Character length is 6 bits 0x1 7_BIT Character length is 7 bits 0x2 8_BIT Character length is 8 bits 0x3 SYNC Synchronous Mode Select 8 1 read-write PAR Parity Type 9 3 read-write EVEN Even parity 0x0 ODD Odd parity 0x1 SPACE Parity forced to 0 (Space) 0x2 MARK Parity forced to 1 (Mark) 0x3 NO No parity 0x4 MULTIDROP Multidrop mode 0x6 NBSTOP Number of Stop Bits 12 2 read-write 1_BIT 1 stop bit 0x0 1_5_BIT 1.5 stop bit (SYNC = 0) or reserved (SYNC = 1) 0x1 2_BIT 2 stop bits 0x2 CHMODE Channel Mode 14 2 read-write NORMAL Normal Mode 0x0 AUTOMATIC Automatic Echo. Receiver input is connected to the TXD pin. 0x1 LOCAL_LOOPBACK Local Loopback. Transmitter output is connected to the Receiver Input. 0x2 REMOTE_LOOPBACK Remote Loopback. RXD pin is internally connected to the TXD pin. 0x3 MSBF Bit Order 16 1 read-write MODE9 9-bit Character Length 17 1 read-write CLKO Clock Output Select 18 1 read-write OVER Oversampling Mode 19 1 read-write INACK Inhibit Non Acknowledge 20 1 read-write DSNACK Disable Successive NACK 21 1 read-write VAR_SYNC Variable Synchronization of Command/Data Sync Start Frame Delimiter 22 1 read-write INVDATA INverted Data 23 1 read-write MAX_ITERATION Maximum Number of Automatic Iteration 24 3 read-write FILTER Infrared Receive Line Filter 28 1 read-write MAN Manchester Encoder/Decoder Enable 29 1 read-write MODSYNC Manchester Synchronization Mode 30 1 read-write ONEBIT Start Frame Delimiter Selector 31 1 read-write MR_SPI_MODE Mode Register SPI_MODE 0x00000004 32 read-write USART_MODE USART Mode of Operation 0 4 read-write SPI_MASTER SPI Master 0xE SPI_SLAVE SPI Slave 0xF USCLKS Clock Selection 4 2 read-write MCK Master Clock MCK is selected 0x0 DIV Internal Clock Divided MCK/DIV (DIV=8) is selected 0x1 SCK Serial Clock SLK is selected 0x3 CHRL Character Length. 6 2 read-write 8_BIT Character length is 8 bits 0x3 CPHA SPI Clock Phase 8 1 read-write CPOL SPI Clock Polarity 16 1 read-write WRDBT Wait Read Data Before Transfer 20 1 read-write IER Interrupt Enable Register 0x00000008 32 write-only RXRDY RXRDY Interrupt Enable 0 1 write-only TXRDY TXRDY Interrupt Enable 1 1 write-only RXBRK Receiver Break Interrupt Enable 2 1 write-only OVRE Overrun Error Interrupt Enable 5 1 write-only FRAME Framing Error Interrupt Enable 6 1 write-only PARE Parity Error Interrupt Enable 7 1 write-only TIMEOUT Time-out Interrupt Enable 8 1 write-only TXEMPTY TXEMPTY Interrupt Enable 9 1 write-only ITER Max number of Repetitions Reached Interrupt Enable 10 1 write-only NACK Non Acknowledge Interrupt Enable 13 1 write-only CTSIC Clear to Send Input Change Interrupt Enable 19 1 write-only MANE Manchester Error Interrupt Enable 24 1 write-only IER_SPI_MODE Interrupt Enable Register SPI_MODE 0x00000008 32 write-only RXRDY RXRDY Interrupt Enable 0 1 write-only TXRDY TXRDY Interrupt Enable 1 1 write-only OVRE Overrun Error Interrupt Enable 5 1 write-only TXEMPTY TXEMPTY Interrupt Enable 9 1 write-only UNRE SPI Underrun Error Interrupt Enable 10 1 write-only IER_LIN_MODE Interrupt Enable Register LIN_MODE 0x00000008 32 write-only RXRDY RXRDY Interrupt Enable 0 1 write-only TXRDY TXRDY Interrupt Enable 1 1 write-only OVRE Overrun Error Interrupt Enable 5 1 write-only FRAME Framing Error Interrupt Enable 6 1 write-only PARE Parity Error Interrupt Enable 7 1 write-only TIMEOUT Time-out Interrupt Enable 8 1 write-only TXEMPTY TXEMPTY Interrupt Enable 9 1 write-only LINBK LIN Break Sent or LIN Break Received Interrupt Enable 13 1 write-only LINID LIN Identifier Sent or LIN Identifier Received Interrupt Enable 14 1 write-only LINTC LIN Transfer Completed Interrupt Enable 15 1 write-only LINBE LIN Bus Error Interrupt Enable 25 1 write-only LINISFE LIN Inconsistent Synch Field Error Interrupt Enable 26 1 write-only LINIPE LIN Identifier Parity Interrupt Enable 27 1 write-only LINCE LIN Checksum Error Interrupt Enable 28 1 write-only LINSNRE LIN Slave Not Responding Error Interrupt Enable 29 1 write-only IDR Interrupt Disable Register 0x0000000C 32 write-only RXRDY RXRDY Interrupt Disable 0 1 write-only TXRDY TXRDY Interrupt Disable 1 1 write-only RXBRK Receiver Break Interrupt Disable 2 1 write-only OVRE Overrun Error Interrupt Enable 5 1 write-only FRAME Framing Error Interrupt Disable 6 1 write-only PARE Parity Error Interrupt Disable 7 1 write-only TIMEOUT Time-out Interrupt Disable 8 1 write-only TXEMPTY TXEMPTY Interrupt Disable 9 1 write-only ITER Max number of Repetitions Reached Interrupt Disable 10 1 write-only NACK Non Acknowledge Interrupt Disable 13 1 write-only CTSIC Clear to Send Input Change Interrupt Disable 19 1 write-only MANE Manchester Error Interrupt Disable 24 1 write-only IDR_SPI_MODE Interrupt Disable Register SPI_MODE 0x0000000C 32 write-only RXRDY RXRDY Interrupt Disable 0 1 write-only TXRDY TXRDY Interrupt Disable 1 1 write-only OVRE Overrun Error Interrupt Disable 5 1 write-only TXEMPTY TXEMPTY Interrupt Disable 9 1 write-only UNRE SPI Underrun Error Interrupt Disable 10 1 write-only IDR_LIN_MODE Interrupt Disable Register LIN_MODE 0x0000000C 32 write-only RXRDY RXRDY Interrupt Disable 0 1 write-only TXRDY TXRDY Interrupt Disable 1 1 write-only OVRE Overrun Error Interrupt Disable 5 1 write-only FRAME Framing Error Interrupt Disable 6 1 write-only PARE Parity Error Interrupt Disable 7 1 write-only TIMEOUT Time-out Interrupt Disable 8 1 write-only TXEMPTY TXEMPTY Interrupt Disable 9 1 write-only LINBK LIN Break Sent or LIN Break Received Interrupt Disable 13 1 write-only LINID LIN Identifier Sent or LIN Identifier Received Interrupt Disable 14 1 write-only LINTC LIN Transfer Completed Interrupt Disable 15 1 write-only LINBE LIN Bus Error Interrupt Disable 25 1 write-only LINISFE LIN Inconsistent Synch Field Error Interrupt Disable 26 1 write-only LINIPE LIN Identifier Parity Interrupt Disable 27 1 write-only LINCE LIN Checksum Error Interrupt Disable 28 1 write-only LINSNRE LIN Slave Not Responding Error Interrupt Disable 29 1 write-only IMR Interrupt Mask Register 0x00000010 32 read-only 0x00000000 RXRDY RXRDY Interrupt Mask 0 1 read-only TXRDY TXRDY Interrupt Mask 1 1 read-only RXBRK Receiver Break Interrupt Mask 2 1 read-only OVRE Overrun Error Interrupt Mask 5 1 read-only FRAME Framing Error Interrupt Mask 6 1 read-only PARE Parity Error Interrupt Mask 7 1 read-only TIMEOUT Time-out Interrupt Mask 8 1 read-only TXEMPTY TXEMPTY Interrupt Mask 9 1 read-only ITER Max number of Repetitions Reached Interrupt Mask 10 1 read-only NACK Non Acknowledge Interrupt Mask 13 1 read-only CTSIC Clear to Send Input Change Interrupt Mask 19 1 read-only MANE Manchester Error Interrupt Mask 24 1 read-only IMR_SPI_MODE Interrupt Mask Register SPI_MODE 0x00000010 32 read-only 0x00000000 RXRDY RXRDY Interrupt Mask 0 1 read-only TXRDY TXRDY Interrupt Mask 1 1 read-only OVRE Overrun Error Interrupt Mask 5 1 read-only TXEMPTY TXEMPTY Interrupt Mask 9 1 read-only UNRE SPI Underrun Error Interrupt Mask 10 1 read-only IMR_LIN_MODE Interrupt Mask Register LIN_MODE 0x00000010 32 read-only 0x00000000 RXRDY RXRDY Interrupt Mask 0 1 read-only TXRDY TXRDY Interrupt Mask 1 1 read-only OVRE Overrun Error Interrupt Mask 5 1 read-only FRAME Framing Error Interrupt Mask 6 1 read-only PARE Parity Error Interrupt Mask 7 1 read-only TIMEOUT Time-out Interrupt Mask 8 1 read-only TXEMPTY TXEMPTY Interrupt Mask 9 1 read-only LINBK LIN Break Sent or LIN Break Received Interrupt Mask 13 1 read-only LINID LIN Identifier Sent or LIN Identifier Received Interrupt Mask 14 1 read-only LINTC LIN Transfer Completed Interrupt Mask 15 1 read-only LINBE LIN Bus Error Interrupt Mask 25 1 read-only LINISFE LIN Inconsistent Synch Field Error Interrupt Mask 26 1 read-only LINIPE LIN Identifier Parity Interrupt Mask 27 1 read-only LINCE LIN Checksum Error Interrupt Mask 28 1 read-only LINSNRE LIN Slave Not Responding Error Interrupt Mask 29 1 read-only CSR Channel Status Register 0x00000014 32 read-only RXRDY Receiver Ready 0 1 read-only TXRDY Transmitter Ready 1 1 read-only RXBRK Break Received/End of Break 2 1 read-only OVRE Overrun Error 5 1 read-only FRAME Framing Error 6 1 read-only PARE Parity Error 7 1 read-only TIMEOUT Receiver Time-out 8 1 read-only TXEMPTY Transmitter Empty 9 1 read-only ITER Max number of Repetitions Reached 10 1 read-only NACK Non Acknowledge Interrupt 13 1 read-only CTSIC Clear to Send Input Change Flag 19 1 read-only CTS Image of CTS Input 23 1 read-only MANERR Manchester Error 24 1 read-only CSR_SPI_MODE Channel Status Register SPI_MODE 0x00000014 32 read-only RXRDY Receiver Ready 0 1 read-only TXRDY Transmitter Ready 1 1 read-only OVRE Overrun Error 5 1 read-only TXEMPTY Transmitter Empty 9 1 read-only UNRE Underrun Error 10 1 read-only CSR_LIN_MODE Channel Status Register LIN_MODE 0x00000014 32 read-only RXRDY Receiver Ready 0 1 read-only TXRDY Transmitter Ready 1 1 read-only OVRE Overrun Error 5 1 read-only FRAME Framing Error 6 1 read-only PARE Parity Error 7 1 read-only TIMEOUT Receiver Time-out 8 1 read-only TXEMPTY Transmitter Empty 9 1 read-only LINBK LIN Break Sent or LIN Break Received 13 1 read-only LINID LIN Identifier Sent or LIN Identifier Received 14 1 read-only LINTC LIN Transfer Completed 15 1 read-only LINBLS LIN Bus Line Status 23 1 read-only LINBE LIN Bit Error 25 1 read-only LINISFE LIN Inconsistent Synch Field Error 26 1 read-only LINIPE LIN Identifier Parity Error 27 1 read-only LINCE LIN Checksum Error 28 1 read-only LINSNRE LIN Slave Not Responding Error 29 1 read-only RHR Receiver Holding Register 0x00000018 32 read-only 0x00000000 RXCHR Received Character 0 9 read-only RXSYNH Received Sync 15 1 read-only THR Transmitter Holding Register 0x0000001C 32 write-only TXCHR Character to be Transmitted 0 9 write-only TXSYNH Sync Field to be transmitted 15 1 write-only BRGR Baud Rate Generator Register 0x00000020 32 read-write 0x00000000 CD Clock Divider 0 16 read-write FP Fractional Part 16 3 read-write RTOR Receiver Time-out Register 0x00000024 32 read-write 0x00000000 TO Time-out Value 0 17 read-write TTGR Transmitter Timeguard Register 0x00000028 32 read-write 0x00000000 TG Timeguard Value 0 8 read-write FIDI FI DI Ratio Register 0x00000040 32 read-write 0x00000174 FI_DI_RATIO FI Over DI Ratio Value 0 11 read-write NER Number of Errors Register 0x00000044 32 read-only NB_ERRORS Number of Errors 0 8 read-only IF IrDA Filter Register 0x0000004C 32 read-write 0x00000000 IRDA_FILTER IrDA Filter 0 8 read-write MAN Manchester Encoder Decoder Register 0x00000050 32 read-write 0xB0011004 TX_PL Transmitter Preamble Length 0 4 read-write TX_PP Transmitter Preamble Pattern 8 2 read-write ALL_ONE The preamble is composed of '1's 0x0 ALL_ZERO The preamble is composed of '0's 0x1 ZERO_ONE The preamble is composed of '01's 0x2 ONE_ZERO The preamble is composed of '10's 0x3 TX_MPOL Transmitter Manchester Polarity 12 1 read-write RX_PL Receiver Preamble Length 16 4 read-write RX_PP Receiver Preamble Pattern detected 24 2 read-write ALL_ONE The preamble is composed of '1's 0x0 ALL_ZERO The preamble is composed of '0's 0x1 ZERO_ONE The preamble is composed of '01's 0x2 ONE_ZERO The preamble is composed of '10's 0x3 RX_MPOL Receiver Manchester Polarity 28 1 read-write ONE Must Be Set to 1 29 1 read-write DRIFT Drift compensation 30 1 read-write LINMR LIN Mode Register 0x00000054 32 read-write 0x00000000 NACT LIN Node Action 0 2 read-write PUBLISH The USART transmits the response. 0x0 SUBSCRIBE The USART receives the response. 0x1 IGNORE The USART does not transmit and does not receive the response. 0x2 PARDIS Parity Disable 2 1 read-write CHKDIS Checksum Disable 3 1 read-write CHKTYP Checksum Type 4 1 read-write DLM Data Length Mode 5 1 read-write FSDIS Frame Slot Mode Disable 6 1 read-write WKUPTYP Wakeup Signal Type 7 1 read-write DLC Data Length Control 8 8 read-write PDCM DMAC Mode 16 1 read-write LINIR LIN Identifier Register 0x00000058 32 read-write 0x00000000 IDCHR Identifier Character 0 8 read-write WPMR Write Protect Mode Register 0x000000E4 32 read-write 0x00000000 WPEN Write Protect Enable 0 1 read-write WPKEY Write Protect KEY 8 24 read-write WPSR Write Protect Status Register 0x000000E8 32 read-only 0x00000000 WPVS Write Protect Violation Status 0 1 read-only WPVSRC Write Protect Violation Source 8 16 read-only USART2 6089Y Universal Synchronous Asynchronous Receiver Transmitter 2 USART USART2_ 0xF8024000 0 0x4000 registers USART2 7 CR Control Register 0x00000000 32 write-only RSTRX Reset Receiver 2 1 write-only RSTTX Reset Transmitter 3 1 write-only RXEN Receiver Enable 4 1 write-only RXDIS Receiver Disable 5 1 write-only TXEN Transmitter Enable 6 1 write-only TXDIS Transmitter Disable 7 1 write-only RSTSTA Reset Status Bits 8 1 write-only STTBRK Start Break 9 1 write-only STPBRK Stop Break 10 1 write-only STTTO Start Time-out 11 1 write-only SENDA Send Address 12 1 write-only RSTIT Reset Iterations 13 1 write-only RSTNACK Reset Non Acknowledge 14 1 write-only RETTO Rearm Time-out 15 1 write-only RTSEN Request to Send Enable 18 1 write-only RTSDIS Request to Send Disable 19 1 write-only LINABT Abort LIN Transmission 20 1 write-only LINWKUP Send LIN Wakeup Signal 21 1 write-only CR_SPI_MODE Control Register SPI_MODE 0x00000000 32 write-only RSTRX Reset Receiver 2 1 write-only RSTTX Reset Transmitter 3 1 write-only RXEN Receiver Enable 4 1 write-only RXDIS Receiver Disable 5 1 write-only TXEN Transmitter Enable 6 1 write-only TXDIS Transmitter Disable 7 1 write-only RSTSTA Reset Status Bits 8 1 write-only FCS Force SPI Chip Select 18 1 write-only RCS Release SPI Chip Select 19 1 write-only MR Mode Register 0x00000004 32 read-write USART_MODE USART Mode of Operation 0 4 read-write NORMAL Normal mode 0x0 RS485 RS485 0x1 HW_HANDSHAKING Hardware Handshaking 0x2 IS07816_T_0 IS07816 Protocol: T = 0 0x4 IS07816_T_1 IS07816 Protocol: T = 1 0x6 IRDA IrDA 0x8 LIN_MASTER LIN Master 0xA LIN_SLAVE LIN Slave 0xB SPI_MASTER SPI Master 0xE SPI_SLAVE SPI Slave 0xF USCLKS Clock Selection 4 2 read-write MCK Master Clock MCK is selected 0x0 DIV Internal Clock Divided MCK/DIV (DIV=8) is selected 0x1 SCK Serial Clock SLK is selected 0x3 CHRL Character Length. 6 2 read-write 5_BIT Character length is 5 bits 0x0 6_BIT Character length is 6 bits 0x1 7_BIT Character length is 7 bits 0x2 8_BIT Character length is 8 bits 0x3 SYNC Synchronous Mode Select 8 1 read-write PAR Parity Type 9 3 read-write EVEN Even parity 0x0 ODD Odd parity 0x1 SPACE Parity forced to 0 (Space) 0x2 MARK Parity forced to 1 (Mark) 0x3 NO No parity 0x4 MULTIDROP Multidrop mode 0x6 NBSTOP Number of Stop Bits 12 2 read-write 1_BIT 1 stop bit 0x0 1_5_BIT 1.5 stop bit (SYNC = 0) or reserved (SYNC = 1) 0x1 2_BIT 2 stop bits 0x2 CHMODE Channel Mode 14 2 read-write NORMAL Normal Mode 0x0 AUTOMATIC Automatic Echo. Receiver input is connected to the TXD pin. 0x1 LOCAL_LOOPBACK Local Loopback. Transmitter output is connected to the Receiver Input. 0x2 REMOTE_LOOPBACK Remote Loopback. RXD pin is internally connected to the TXD pin. 0x3 MSBF Bit Order 16 1 read-write MODE9 9-bit Character Length 17 1 read-write CLKO Clock Output Select 18 1 read-write OVER Oversampling Mode 19 1 read-write INACK Inhibit Non Acknowledge 20 1 read-write DSNACK Disable Successive NACK 21 1 read-write VAR_SYNC Variable Synchronization of Command/Data Sync Start Frame Delimiter 22 1 read-write INVDATA INverted Data 23 1 read-write MAX_ITERATION Maximum Number of Automatic Iteration 24 3 read-write FILTER Infrared Receive Line Filter 28 1 read-write MAN Manchester Encoder/Decoder Enable 29 1 read-write MODSYNC Manchester Synchronization Mode 30 1 read-write ONEBIT Start Frame Delimiter Selector 31 1 read-write MR_SPI_MODE Mode Register SPI_MODE 0x00000004 32 read-write USART_MODE USART Mode of Operation 0 4 read-write SPI_MASTER SPI Master 0xE SPI_SLAVE SPI Slave 0xF USCLKS Clock Selection 4 2 read-write MCK Master Clock MCK is selected 0x0 DIV Internal Clock Divided MCK/DIV (DIV=8) is selected 0x1 SCK Serial Clock SLK is selected 0x3 CHRL Character Length. 6 2 read-write 8_BIT Character length is 8 bits 0x3 CPHA SPI Clock Phase 8 1 read-write CPOL SPI Clock Polarity 16 1 read-write WRDBT Wait Read Data Before Transfer 20 1 read-write IER Interrupt Enable Register 0x00000008 32 write-only RXRDY RXRDY Interrupt Enable 0 1 write-only TXRDY TXRDY Interrupt Enable 1 1 write-only RXBRK Receiver Break Interrupt Enable 2 1 write-only OVRE Overrun Error Interrupt Enable 5 1 write-only FRAME Framing Error Interrupt Enable 6 1 write-only PARE Parity Error Interrupt Enable 7 1 write-only TIMEOUT Time-out Interrupt Enable 8 1 write-only TXEMPTY TXEMPTY Interrupt Enable 9 1 write-only ITER Max number of Repetitions Reached Interrupt Enable 10 1 write-only NACK Non Acknowledge Interrupt Enable 13 1 write-only CTSIC Clear to Send Input Change Interrupt Enable 19 1 write-only MANE Manchester Error Interrupt Enable 24 1 write-only IER_SPI_MODE Interrupt Enable Register SPI_MODE 0x00000008 32 write-only RXRDY RXRDY Interrupt Enable 0 1 write-only TXRDY TXRDY Interrupt Enable 1 1 write-only OVRE Overrun Error Interrupt Enable 5 1 write-only TXEMPTY TXEMPTY Interrupt Enable 9 1 write-only UNRE SPI Underrun Error Interrupt Enable 10 1 write-only IER_LIN_MODE Interrupt Enable Register LIN_MODE 0x00000008 32 write-only RXRDY RXRDY Interrupt Enable 0 1 write-only TXRDY TXRDY Interrupt Enable 1 1 write-only OVRE Overrun Error Interrupt Enable 5 1 write-only FRAME Framing Error Interrupt Enable 6 1 write-only PARE Parity Error Interrupt Enable 7 1 write-only TIMEOUT Time-out Interrupt Enable 8 1 write-only TXEMPTY TXEMPTY Interrupt Enable 9 1 write-only LINBK LIN Break Sent or LIN Break Received Interrupt Enable 13 1 write-only LINID LIN Identifier Sent or LIN Identifier Received Interrupt Enable 14 1 write-only LINTC LIN Transfer Completed Interrupt Enable 15 1 write-only LINBE LIN Bus Error Interrupt Enable 25 1 write-only LINISFE LIN Inconsistent Synch Field Error Interrupt Enable 26 1 write-only LINIPE LIN Identifier Parity Interrupt Enable 27 1 write-only LINCE LIN Checksum Error Interrupt Enable 28 1 write-only LINSNRE LIN Slave Not Responding Error Interrupt Enable 29 1 write-only IDR Interrupt Disable Register 0x0000000C 32 write-only RXRDY RXRDY Interrupt Disable 0 1 write-only TXRDY TXRDY Interrupt Disable 1 1 write-only RXBRK Receiver Break Interrupt Disable 2 1 write-only OVRE Overrun Error Interrupt Enable 5 1 write-only FRAME Framing Error Interrupt Disable 6 1 write-only PARE Parity Error Interrupt Disable 7 1 write-only TIMEOUT Time-out Interrupt Disable 8 1 write-only TXEMPTY TXEMPTY Interrupt Disable 9 1 write-only ITER Max number of Repetitions Reached Interrupt Disable 10 1 write-only NACK Non Acknowledge Interrupt Disable 13 1 write-only CTSIC Clear to Send Input Change Interrupt Disable 19 1 write-only MANE Manchester Error Interrupt Disable 24 1 write-only IDR_SPI_MODE Interrupt Disable Register SPI_MODE 0x0000000C 32 write-only RXRDY RXRDY Interrupt Disable 0 1 write-only TXRDY TXRDY Interrupt Disable 1 1 write-only OVRE Overrun Error Interrupt Disable 5 1 write-only TXEMPTY TXEMPTY Interrupt Disable 9 1 write-only UNRE SPI Underrun Error Interrupt Disable 10 1 write-only IDR_LIN_MODE Interrupt Disable Register LIN_MODE 0x0000000C 32 write-only RXRDY RXRDY Interrupt Disable 0 1 write-only TXRDY TXRDY Interrupt Disable 1 1 write-only OVRE Overrun Error Interrupt Disable 5 1 write-only FRAME Framing Error Interrupt Disable 6 1 write-only PARE Parity Error Interrupt Disable 7 1 write-only TIMEOUT Time-out Interrupt Disable 8 1 write-only TXEMPTY TXEMPTY Interrupt Disable 9 1 write-only LINBK LIN Break Sent or LIN Break Received Interrupt Disable 13 1 write-only LINID LIN Identifier Sent or LIN Identifier Received Interrupt Disable 14 1 write-only LINTC LIN Transfer Completed Interrupt Disable 15 1 write-only LINBE LIN Bus Error Interrupt Disable 25 1 write-only LINISFE LIN Inconsistent Synch Field Error Interrupt Disable 26 1 write-only LINIPE LIN Identifier Parity Interrupt Disable 27 1 write-only LINCE LIN Checksum Error Interrupt Disable 28 1 write-only LINSNRE LIN Slave Not Responding Error Interrupt Disable 29 1 write-only IMR Interrupt Mask Register 0x00000010 32 read-only 0x00000000 RXRDY RXRDY Interrupt Mask 0 1 read-only TXRDY TXRDY Interrupt Mask 1 1 read-only RXBRK Receiver Break Interrupt Mask 2 1 read-only OVRE Overrun Error Interrupt Mask 5 1 read-only FRAME Framing Error Interrupt Mask 6 1 read-only PARE Parity Error Interrupt Mask 7 1 read-only TIMEOUT Time-out Interrupt Mask 8 1 read-only TXEMPTY TXEMPTY Interrupt Mask 9 1 read-only ITER Max number of Repetitions Reached Interrupt Mask 10 1 read-only NACK Non Acknowledge Interrupt Mask 13 1 read-only CTSIC Clear to Send Input Change Interrupt Mask 19 1 read-only MANE Manchester Error Interrupt Mask 24 1 read-only IMR_SPI_MODE Interrupt Mask Register SPI_MODE 0x00000010 32 read-only 0x00000000 RXRDY RXRDY Interrupt Mask 0 1 read-only TXRDY TXRDY Interrupt Mask 1 1 read-only OVRE Overrun Error Interrupt Mask 5 1 read-only TXEMPTY TXEMPTY Interrupt Mask 9 1 read-only UNRE SPI Underrun Error Interrupt Mask 10 1 read-only IMR_LIN_MODE Interrupt Mask Register LIN_MODE 0x00000010 32 read-only 0x00000000 RXRDY RXRDY Interrupt Mask 0 1 read-only TXRDY TXRDY Interrupt Mask 1 1 read-only OVRE Overrun Error Interrupt Mask 5 1 read-only FRAME Framing Error Interrupt Mask 6 1 read-only PARE Parity Error Interrupt Mask 7 1 read-only TIMEOUT Time-out Interrupt Mask 8 1 read-only TXEMPTY TXEMPTY Interrupt Mask 9 1 read-only LINBK LIN Break Sent or LIN Break Received Interrupt Mask 13 1 read-only LINID LIN Identifier Sent or LIN Identifier Received Interrupt Mask 14 1 read-only LINTC LIN Transfer Completed Interrupt Mask 15 1 read-only LINBE LIN Bus Error Interrupt Mask 25 1 read-only LINISFE LIN Inconsistent Synch Field Error Interrupt Mask 26 1 read-only LINIPE LIN Identifier Parity Interrupt Mask 27 1 read-only LINCE LIN Checksum Error Interrupt Mask 28 1 read-only LINSNRE LIN Slave Not Responding Error Interrupt Mask 29 1 read-only CSR Channel Status Register 0x00000014 32 read-only RXRDY Receiver Ready 0 1 read-only TXRDY Transmitter Ready 1 1 read-only RXBRK Break Received/End of Break 2 1 read-only OVRE Overrun Error 5 1 read-only FRAME Framing Error 6 1 read-only PARE Parity Error 7 1 read-only TIMEOUT Receiver Time-out 8 1 read-only TXEMPTY Transmitter Empty 9 1 read-only ITER Max number of Repetitions Reached 10 1 read-only NACK Non Acknowledge Interrupt 13 1 read-only CTSIC Clear to Send Input Change Flag 19 1 read-only CTS Image of CTS Input 23 1 read-only MANERR Manchester Error 24 1 read-only CSR_SPI_MODE Channel Status Register SPI_MODE 0x00000014 32 read-only RXRDY Receiver Ready 0 1 read-only TXRDY Transmitter Ready 1 1 read-only OVRE Overrun Error 5 1 read-only TXEMPTY Transmitter Empty 9 1 read-only UNRE Underrun Error 10 1 read-only CSR_LIN_MODE Channel Status Register LIN_MODE 0x00000014 32 read-only RXRDY Receiver Ready 0 1 read-only TXRDY Transmitter Ready 1 1 read-only OVRE Overrun Error 5 1 read-only FRAME Framing Error 6 1 read-only PARE Parity Error 7 1 read-only TIMEOUT Receiver Time-out 8 1 read-only TXEMPTY Transmitter Empty 9 1 read-only LINBK LIN Break Sent or LIN Break Received 13 1 read-only LINID LIN Identifier Sent or LIN Identifier Received 14 1 read-only LINTC LIN Transfer Completed 15 1 read-only LINBLS LIN Bus Line Status 23 1 read-only LINBE LIN Bit Error 25 1 read-only LINISFE LIN Inconsistent Synch Field Error 26 1 read-only LINIPE LIN Identifier Parity Error 27 1 read-only LINCE LIN Checksum Error 28 1 read-only LINSNRE LIN Slave Not Responding Error 29 1 read-only RHR Receiver Holding Register 0x00000018 32 read-only 0x00000000 RXCHR Received Character 0 9 read-only RXSYNH Received Sync 15 1 read-only THR Transmitter Holding Register 0x0000001C 32 write-only TXCHR Character to be Transmitted 0 9 write-only TXSYNH Sync Field to be transmitted 15 1 write-only BRGR Baud Rate Generator Register 0x00000020 32 read-write 0x00000000 CD Clock Divider 0 16 read-write FP Fractional Part 16 3 read-write RTOR Receiver Time-out Register 0x00000024 32 read-write 0x00000000 TO Time-out Value 0 17 read-write TTGR Transmitter Timeguard Register 0x00000028 32 read-write 0x00000000 TG Timeguard Value 0 8 read-write FIDI FI DI Ratio Register 0x00000040 32 read-write 0x00000174 FI_DI_RATIO FI Over DI Ratio Value 0 11 read-write NER Number of Errors Register 0x00000044 32 read-only NB_ERRORS Number of Errors 0 8 read-only IF IrDA Filter Register 0x0000004C 32 read-write 0x00000000 IRDA_FILTER IrDA Filter 0 8 read-write MAN Manchester Encoder Decoder Register 0x00000050 32 read-write 0xB0011004 TX_PL Transmitter Preamble Length 0 4 read-write TX_PP Transmitter Preamble Pattern 8 2 read-write ALL_ONE The preamble is composed of '1's 0x0 ALL_ZERO The preamble is composed of '0's 0x1 ZERO_ONE The preamble is composed of '01's 0x2 ONE_ZERO The preamble is composed of '10's 0x3 TX_MPOL Transmitter Manchester Polarity 12 1 read-write RX_PL Receiver Preamble Length 16 4 read-write RX_PP Receiver Preamble Pattern detected 24 2 read-write ALL_ONE The preamble is composed of '1's 0x0 ALL_ZERO The preamble is composed of '0's 0x1 ZERO_ONE The preamble is composed of '01's 0x2 ONE_ZERO The preamble is composed of '10's 0x3 RX_MPOL Receiver Manchester Polarity 28 1 read-write ONE Must Be Set to 1 29 1 read-write DRIFT Drift compensation 30 1 read-write LINMR LIN Mode Register 0x00000054 32 read-write 0x00000000 NACT LIN Node Action 0 2 read-write PUBLISH The USART transmits the response. 0x0 SUBSCRIBE The USART receives the response. 0x1 IGNORE The USART does not transmit and does not receive the response. 0x2 PARDIS Parity Disable 2 1 read-write CHKDIS Checksum Disable 3 1 read-write CHKTYP Checksum Type 4 1 read-write DLM Data Length Mode 5 1 read-write FSDIS Frame Slot Mode Disable 6 1 read-write WKUPTYP Wakeup Signal Type 7 1 read-write DLC Data Length Control 8 8 read-write PDCM DMAC Mode 16 1 read-write LINIR LIN Identifier Register 0x00000058 32 read-write 0x00000000 IDCHR Identifier Character 0 8 read-write WPMR Write Protect Mode Register 0x000000E4 32 read-write 0x00000000 WPEN Write Protect Enable 0 1 read-write WPKEY Write Protect KEY 8 24 read-write WPSR Write Protect Status Register 0x000000E8 32 read-only 0x00000000 WPVS Write Protect Violation Status 0 1 read-only WPVSRC Write Protect Violation Source 8 16 read-only USART3 6089Y Universal Synchronous Asynchronous Receiver Transmitter 3 USART USART3_ 0xF8028000 0 0x4000 registers USART3 8 CR Control Register 0x00000000 32 write-only RSTRX Reset Receiver 2 1 write-only RSTTX Reset Transmitter 3 1 write-only RXEN Receiver Enable 4 1 write-only RXDIS Receiver Disable 5 1 write-only TXEN Transmitter Enable 6 1 write-only TXDIS Transmitter Disable 7 1 write-only RSTSTA Reset Status Bits 8 1 write-only STTBRK Start Break 9 1 write-only STPBRK Stop Break 10 1 write-only STTTO Start Time-out 11 1 write-only SENDA Send Address 12 1 write-only RSTIT Reset Iterations 13 1 write-only RSTNACK Reset Non Acknowledge 14 1 write-only RETTO Rearm Time-out 15 1 write-only RTSEN Request to Send Enable 18 1 write-only RTSDIS Request to Send Disable 19 1 write-only LINABT Abort LIN Transmission 20 1 write-only LINWKUP Send LIN Wakeup Signal 21 1 write-only CR_SPI_MODE Control Register SPI_MODE 0x00000000 32 write-only RSTRX Reset Receiver 2 1 write-only RSTTX Reset Transmitter 3 1 write-only RXEN Receiver Enable 4 1 write-only RXDIS Receiver Disable 5 1 write-only TXEN Transmitter Enable 6 1 write-only TXDIS Transmitter Disable 7 1 write-only RSTSTA Reset Status Bits 8 1 write-only FCS Force SPI Chip Select 18 1 write-only RCS Release SPI Chip Select 19 1 write-only MR Mode Register 0x00000004 32 read-write USART_MODE USART Mode of Operation 0 4 read-write NORMAL Normal mode 0x0 RS485 RS485 0x1 HW_HANDSHAKING Hardware Handshaking 0x2 IS07816_T_0 IS07816 Protocol: T = 0 0x4 IS07816_T_1 IS07816 Protocol: T = 1 0x6 IRDA IrDA 0x8 LIN_MASTER LIN Master 0xA LIN_SLAVE LIN Slave 0xB SPI_MASTER SPI Master 0xE SPI_SLAVE SPI Slave 0xF USCLKS Clock Selection 4 2 read-write MCK Master Clock MCK is selected 0x0 DIV Internal Clock Divided MCK/DIV (DIV=8) is selected 0x1 SCK Serial Clock SLK is selected 0x3 CHRL Character Length. 6 2 read-write 5_BIT Character length is 5 bits 0x0 6_BIT Character length is 6 bits 0x1 7_BIT Character length is 7 bits 0x2 8_BIT Character length is 8 bits 0x3 SYNC Synchronous Mode Select 8 1 read-write PAR Parity Type 9 3 read-write EVEN Even parity 0x0 ODD Odd parity 0x1 SPACE Parity forced to 0 (Space) 0x2 MARK Parity forced to 1 (Mark) 0x3 NO No parity 0x4 MULTIDROP Multidrop mode 0x6 NBSTOP Number of Stop Bits 12 2 read-write 1_BIT 1 stop bit 0x0 1_5_BIT 1.5 stop bit (SYNC = 0) or reserved (SYNC = 1) 0x1 2_BIT 2 stop bits 0x2 CHMODE Channel Mode 14 2 read-write NORMAL Normal Mode 0x0 AUTOMATIC Automatic Echo. Receiver input is connected to the TXD pin. 0x1 LOCAL_LOOPBACK Local Loopback. Transmitter output is connected to the Receiver Input. 0x2 REMOTE_LOOPBACK Remote Loopback. RXD pin is internally connected to the TXD pin. 0x3 MSBF Bit Order 16 1 read-write MODE9 9-bit Character Length 17 1 read-write CLKO Clock Output Select 18 1 read-write OVER Oversampling Mode 19 1 read-write INACK Inhibit Non Acknowledge 20 1 read-write DSNACK Disable Successive NACK 21 1 read-write VAR_SYNC Variable Synchronization of Command/Data Sync Start Frame Delimiter 22 1 read-write INVDATA INverted Data 23 1 read-write MAX_ITERATION Maximum Number of Automatic Iteration 24 3 read-write FILTER Infrared Receive Line Filter 28 1 read-write MAN Manchester Encoder/Decoder Enable 29 1 read-write MODSYNC Manchester Synchronization Mode 30 1 read-write ONEBIT Start Frame Delimiter Selector 31 1 read-write MR_SPI_MODE Mode Register SPI_MODE 0x00000004 32 read-write USART_MODE USART Mode of Operation 0 4 read-write SPI_MASTER SPI Master 0xE SPI_SLAVE SPI Slave 0xF USCLKS Clock Selection 4 2 read-write MCK Master Clock MCK is selected 0x0 DIV Internal Clock Divided MCK/DIV (DIV=8) is selected 0x1 SCK Serial Clock SLK is selected 0x3 CHRL Character Length. 6 2 read-write 8_BIT Character length is 8 bits 0x3 CPHA SPI Clock Phase 8 1 read-write CPOL SPI Clock Polarity 16 1 read-write WRDBT Wait Read Data Before Transfer 20 1 read-write IER Interrupt Enable Register 0x00000008 32 write-only RXRDY RXRDY Interrupt Enable 0 1 write-only TXRDY TXRDY Interrupt Enable 1 1 write-only RXBRK Receiver Break Interrupt Enable 2 1 write-only OVRE Overrun Error Interrupt Enable 5 1 write-only FRAME Framing Error Interrupt Enable 6 1 write-only PARE Parity Error Interrupt Enable 7 1 write-only TIMEOUT Time-out Interrupt Enable 8 1 write-only TXEMPTY TXEMPTY Interrupt Enable 9 1 write-only ITER Max number of Repetitions Reached Interrupt Enable 10 1 write-only NACK Non Acknowledge Interrupt Enable 13 1 write-only CTSIC Clear to Send Input Change Interrupt Enable 19 1 write-only MANE Manchester Error Interrupt Enable 24 1 write-only IER_SPI_MODE Interrupt Enable Register SPI_MODE 0x00000008 32 write-only RXRDY RXRDY Interrupt Enable 0 1 write-only TXRDY TXRDY Interrupt Enable 1 1 write-only OVRE Overrun Error Interrupt Enable 5 1 write-only TXEMPTY TXEMPTY Interrupt Enable 9 1 write-only UNRE SPI Underrun Error Interrupt Enable 10 1 write-only IER_LIN_MODE Interrupt Enable Register LIN_MODE 0x00000008 32 write-only RXRDY RXRDY Interrupt Enable 0 1 write-only TXRDY TXRDY Interrupt Enable 1 1 write-only OVRE Overrun Error Interrupt Enable 5 1 write-only FRAME Framing Error Interrupt Enable 6 1 write-only PARE Parity Error Interrupt Enable 7 1 write-only TIMEOUT Time-out Interrupt Enable 8 1 write-only TXEMPTY TXEMPTY Interrupt Enable 9 1 write-only LINBK LIN Break Sent or LIN Break Received Interrupt Enable 13 1 write-only LINID LIN Identifier Sent or LIN Identifier Received Interrupt Enable 14 1 write-only LINTC LIN Transfer Completed Interrupt Enable 15 1 write-only LINBE LIN Bus Error Interrupt Enable 25 1 write-only LINISFE LIN Inconsistent Synch Field Error Interrupt Enable 26 1 write-only LINIPE LIN Identifier Parity Interrupt Enable 27 1 write-only LINCE LIN Checksum Error Interrupt Enable 28 1 write-only LINSNRE LIN Slave Not Responding Error Interrupt Enable 29 1 write-only IDR Interrupt Disable Register 0x0000000C 32 write-only RXRDY RXRDY Interrupt Disable 0 1 write-only TXRDY TXRDY Interrupt Disable 1 1 write-only RXBRK Receiver Break Interrupt Disable 2 1 write-only OVRE Overrun Error Interrupt Enable 5 1 write-only FRAME Framing Error Interrupt Disable 6 1 write-only PARE Parity Error Interrupt Disable 7 1 write-only TIMEOUT Time-out Interrupt Disable 8 1 write-only TXEMPTY TXEMPTY Interrupt Disable 9 1 write-only ITER Max number of Repetitions Reached Interrupt Disable 10 1 write-only NACK Non Acknowledge Interrupt Disable 13 1 write-only CTSIC Clear to Send Input Change Interrupt Disable 19 1 write-only MANE Manchester Error Interrupt Disable 24 1 write-only IDR_SPI_MODE Interrupt Disable Register SPI_MODE 0x0000000C 32 write-only RXRDY RXRDY Interrupt Disable 0 1 write-only TXRDY TXRDY Interrupt Disable 1 1 write-only OVRE Overrun Error Interrupt Disable 5 1 write-only TXEMPTY TXEMPTY Interrupt Disable 9 1 write-only UNRE SPI Underrun Error Interrupt Disable 10 1 write-only IDR_LIN_MODE Interrupt Disable Register LIN_MODE 0x0000000C 32 write-only RXRDY RXRDY Interrupt Disable 0 1 write-only TXRDY TXRDY Interrupt Disable 1 1 write-only OVRE Overrun Error Interrupt Disable 5 1 write-only FRAME Framing Error Interrupt Disable 6 1 write-only PARE Parity Error Interrupt Disable 7 1 write-only TIMEOUT Time-out Interrupt Disable 8 1 write-only TXEMPTY TXEMPTY Interrupt Disable 9 1 write-only LINBK LIN Break Sent or LIN Break Received Interrupt Disable 13 1 write-only LINID LIN Identifier Sent or LIN Identifier Received Interrupt Disable 14 1 write-only LINTC LIN Transfer Completed Interrupt Disable 15 1 write-only LINBE LIN Bus Error Interrupt Disable 25 1 write-only LINISFE LIN Inconsistent Synch Field Error Interrupt Disable 26 1 write-only LINIPE LIN Identifier Parity Interrupt Disable 27 1 write-only LINCE LIN Checksum Error Interrupt Disable 28 1 write-only LINSNRE LIN Slave Not Responding Error Interrupt Disable 29 1 write-only IMR Interrupt Mask Register 0x00000010 32 read-only 0x00000000 RXRDY RXRDY Interrupt Mask 0 1 read-only TXRDY TXRDY Interrupt Mask 1 1 read-only RXBRK Receiver Break Interrupt Mask 2 1 read-only OVRE Overrun Error Interrupt Mask 5 1 read-only FRAME Framing Error Interrupt Mask 6 1 read-only PARE Parity Error Interrupt Mask 7 1 read-only TIMEOUT Time-out Interrupt Mask 8 1 read-only TXEMPTY TXEMPTY Interrupt Mask 9 1 read-only ITER Max number of Repetitions Reached Interrupt Mask 10 1 read-only NACK Non Acknowledge Interrupt Mask 13 1 read-only CTSIC Clear to Send Input Change Interrupt Mask 19 1 read-only MANE Manchester Error Interrupt Mask 24 1 read-only IMR_SPI_MODE Interrupt Mask Register SPI_MODE 0x00000010 32 read-only 0x00000000 RXRDY RXRDY Interrupt Mask 0 1 read-only TXRDY TXRDY Interrupt Mask 1 1 read-only OVRE Overrun Error Interrupt Mask 5 1 read-only TXEMPTY TXEMPTY Interrupt Mask 9 1 read-only UNRE SPI Underrun Error Interrupt Mask 10 1 read-only IMR_LIN_MODE Interrupt Mask Register LIN_MODE 0x00000010 32 read-only 0x00000000 RXRDY RXRDY Interrupt Mask 0 1 read-only TXRDY TXRDY Interrupt Mask 1 1 read-only OVRE Overrun Error Interrupt Mask 5 1 read-only FRAME Framing Error Interrupt Mask 6 1 read-only PARE Parity Error Interrupt Mask 7 1 read-only TIMEOUT Time-out Interrupt Mask 8 1 read-only TXEMPTY TXEMPTY Interrupt Mask 9 1 read-only LINBK LIN Break Sent or LIN Break Received Interrupt Mask 13 1 read-only LINID LIN Identifier Sent or LIN Identifier Received Interrupt Mask 14 1 read-only LINTC LIN Transfer Completed Interrupt Mask 15 1 read-only LINBE LIN Bus Error Interrupt Mask 25 1 read-only LINISFE LIN Inconsistent Synch Field Error Interrupt Mask 26 1 read-only LINIPE LIN Identifier Parity Interrupt Mask 27 1 read-only LINCE LIN Checksum Error Interrupt Mask 28 1 read-only LINSNRE LIN Slave Not Responding Error Interrupt Mask 29 1 read-only CSR Channel Status Register 0x00000014 32 read-only RXRDY Receiver Ready 0 1 read-only TXRDY Transmitter Ready 1 1 read-only RXBRK Break Received/End of Break 2 1 read-only OVRE Overrun Error 5 1 read-only FRAME Framing Error 6 1 read-only PARE Parity Error 7 1 read-only TIMEOUT Receiver Time-out 8 1 read-only TXEMPTY Transmitter Empty 9 1 read-only ITER Max number of Repetitions Reached 10 1 read-only NACK Non Acknowledge Interrupt 13 1 read-only CTSIC Clear to Send Input Change Flag 19 1 read-only CTS Image of CTS Input 23 1 read-only MANERR Manchester Error 24 1 read-only CSR_SPI_MODE Channel Status Register SPI_MODE 0x00000014 32 read-only RXRDY Receiver Ready 0 1 read-only TXRDY Transmitter Ready 1 1 read-only OVRE Overrun Error 5 1 read-only TXEMPTY Transmitter Empty 9 1 read-only UNRE Underrun Error 10 1 read-only CSR_LIN_MODE Channel Status Register LIN_MODE 0x00000014 32 read-only RXRDY Receiver Ready 0 1 read-only TXRDY Transmitter Ready 1 1 read-only OVRE Overrun Error 5 1 read-only FRAME Framing Error 6 1 read-only PARE Parity Error 7 1 read-only TIMEOUT Receiver Time-out 8 1 read-only TXEMPTY Transmitter Empty 9 1 read-only LINBK LIN Break Sent or LIN Break Received 13 1 read-only LINID LIN Identifier Sent or LIN Identifier Received 14 1 read-only LINTC LIN Transfer Completed 15 1 read-only LINBLS LIN Bus Line Status 23 1 read-only LINBE LIN Bit Error 25 1 read-only LINISFE LIN Inconsistent Synch Field Error 26 1 read-only LINIPE LIN Identifier Parity Error 27 1 read-only LINCE LIN Checksum Error 28 1 read-only LINSNRE LIN Slave Not Responding Error 29 1 read-only RHR Receiver Holding Register 0x00000018 32 read-only 0x00000000 RXCHR Received Character 0 9 read-only RXSYNH Received Sync 15 1 read-only THR Transmitter Holding Register 0x0000001C 32 write-only TXCHR Character to be Transmitted 0 9 write-only TXSYNH Sync Field to be transmitted 15 1 write-only BRGR Baud Rate Generator Register 0x00000020 32 read-write 0x00000000 CD Clock Divider 0 16 read-write FP Fractional Part 16 3 read-write RTOR Receiver Time-out Register 0x00000024 32 read-write 0x00000000 TO Time-out Value 0 17 read-write TTGR Transmitter Timeguard Register 0x00000028 32 read-write 0x00000000 TG Timeguard Value 0 8 read-write FIDI FI DI Ratio Register 0x00000040 32 read-write 0x00000174 FI_DI_RATIO FI Over DI Ratio Value 0 11 read-write NER Number of Errors Register 0x00000044 32 read-only NB_ERRORS Number of Errors 0 8 read-only IF IrDA Filter Register 0x0000004C 32 read-write 0x00000000 IRDA_FILTER IrDA Filter 0 8 read-write MAN Manchester Encoder Decoder Register 0x00000050 32 read-write 0xB0011004 TX_PL Transmitter Preamble Length 0 4 read-write TX_PP Transmitter Preamble Pattern 8 2 read-write ALL_ONE The preamble is composed of '1's 0x0 ALL_ZERO The preamble is composed of '0's 0x1 ZERO_ONE The preamble is composed of '01's 0x2 ONE_ZERO The preamble is composed of '10's 0x3 TX_MPOL Transmitter Manchester Polarity 12 1 read-write RX_PL Receiver Preamble Length 16 4 read-write RX_PP Receiver Preamble Pattern detected 24 2 read-write ALL_ONE The preamble is composed of '1's 0x0 ALL_ZERO The preamble is composed of '0's 0x1 ZERO_ONE The preamble is composed of '01's 0x2 ONE_ZERO The preamble is composed of '10's 0x3 RX_MPOL Receiver Manchester Polarity 28 1 read-write ONE Must Be Set to 1 29 1 read-write DRIFT Drift compensation 30 1 read-write LINMR LIN Mode Register 0x00000054 32 read-write 0x00000000 NACT LIN Node Action 0 2 read-write PUBLISH The USART transmits the response. 0x0 SUBSCRIBE The USART receives the response. 0x1 IGNORE The USART does not transmit and does not receive the response. 0x2 PARDIS Parity Disable 2 1 read-write CHKDIS Checksum Disable 3 1 read-write CHKTYP Checksum Type 4 1 read-write DLM Data Length Mode 5 1 read-write FSDIS Frame Slot Mode Disable 6 1 read-write WKUPTYP Wakeup Signal Type 7 1 read-write DLC Data Length Control 8 8 read-write PDCM DMAC Mode 16 1 read-write LINIR LIN Identifier Register 0x00000058 32 read-write 0x00000000 IDCHR Identifier Character 0 8 read-write WPMR Write Protect Mode Register 0x000000E4 32 read-write 0x00000000 WPEN Write Protect Enable 0 1 read-write WPKEY Write Protect KEY 8 24 read-write WPSR Write Protect Status Register 0x000000E8 32 read-only 0x00000000 WPVS Write Protect Violation Status 0 1 read-only WPVSRC Write Protect Violation Source 8 16 read-only PWM 6044I Pulse Width Modulation Controller PWM_ 0xF8034000 0 0x4000 registers PWM 18 MR PWM Mode Register 0x00000000 32 read-write 0x00000000 DIVA CLKA, CLKB Divide Factor 0 8 read-write CLK_OFF CLKA, CLKB clock is turned off 0 CLK_DIV1 CLKA, CLKB clock is clock selected by PREA, PREB 1 PREA 8 4 read-write MCK Master Clock 0x0 MCKDIV2 Master Clock divided by 2 0x1 MCKDIV4 Master Clock divided by 4 0x2 MCKDIV8 Master Clock divided by 8 0x3 MCKDIV16 Master Clock divided by 16 0x4 MCKDIV32 Master Clock divided by 32 0x5 MCKDIV64 Master Clock divided by 64 0x6 MCKDIV128 Master Clock divided by 128 0x7 MCKDIV256 Master Clock divided by 256 0x8 MCKDIV512 Master Clock divided by 512 0x9 MCKDIV1024 Master Clock divided by 1024 0xA DIVB CLKA, CLKB Divide Factor 16 8 read-write CLK_OFF CLKA, CLKB clock is turned off 0 CLK_DIV1 CLKA, CLKB clock is clock selected by PREA, PREB 1 PREB 24 4 read-write MCK Master Clock 0x0 MCKDIV2 Master Clock divided by 2 0x1 MCKDIV4 Master Clock divided by 4 0x2 MCKDIV8 Master Clock divided by 8 0x3 MCKDIV16 Master Clock divided by 16 0x4 MCKDIV32 Master Clock divided by 32 0x5 MCKDIV64 Master Clock divided by 64 0x6 MCKDIV128 Master Clock divided by 128 0x7 MCKDIV256 Master Clock divided by 256 0x8 MCKDIV512 Master Clock divided by 512 0x9 MCKDIV1024 Master Clock divided by 1024 0xA ENA PWM Enable Register 0x00000004 32 write-only CHID0 Channel ID 0 1 write-only CHID1 Channel ID 1 1 write-only CHID2 Channel ID 2 1 write-only CHID3 Channel ID 3 1 write-only DIS PWM Disable Register 0x00000008 32 write-only CHID0 Channel ID 0 1 write-only CHID1 Channel ID 1 1 write-only CHID2 Channel ID 2 1 write-only CHID3 Channel ID 3 1 write-only SR PWM Status Register 0x0000000C 32 read-only 0x00000000 CHID0 Channel ID 0 1 read-only CHID1 Channel ID 1 1 read-only CHID2 Channel ID 2 1 read-only CHID3 Channel ID 3 1 read-only IER PWM Interrupt Enable Register 0x00000010 32 write-only CHID0 Channel ID. 0 1 write-only CHID1 Channel ID. 1 1 write-only CHID2 Channel ID. 2 1 write-only CHID3 Channel ID. 3 1 write-only IDR PWM Interrupt Disable Register 0x00000014 32 write-only CHID0 Channel ID. 0 1 write-only CHID1 Channel ID. 1 1 write-only CHID2 Channel ID. 2 1 write-only CHID3 Channel ID. 3 1 write-only IMR PWM Interrupt Mask Register 0x00000018 32 read-only 0x00000000 CHID0 Channel ID. 0 1 read-only CHID1 Channel ID. 1 1 read-only CHID2 Channel ID. 2 1 read-only CHID3 Channel ID. 3 1 read-only ISR PWM Interrupt Status Register 0x0000001C 32 read-only 0x00000000 CHID0 Channel ID 0 1 read-only CHID1 Channel ID 1 1 read-only CHID2 Channel ID 2 1 read-only CHID3 Channel ID 3 1 read-only CMR0 PWM Channel Mode Register (ch_num = 0) 0x00000200 32 read-write 0x00000000 CPRE Channel Pre-scaler 0 4 read-write MCK Master Clock 0x0 MCKDIV2 Master Clock divided by 2 0x1 MCKDIV4 Master Clock divided by 4 0x2 MCKDIV8 Master Clock divided by 8 0x3 MCKDIV16 Master Clock divided by 16 0x4 MCKDIV32 Master Clock divided by 32 0x5 MCKDIV64 Master Clock divided by 64 0x6 MCKDIV128 Master Clock divided by 128 0x7 MCKDIV256 Master Clock divided by 256 0x8 MCKDIV512 Master Clock divided by 512 0x9 MCKDIV1024 Master Clock divided by 1024 0xA CLKA Clock A 0xB CLKB Clock B 0xC CALG Channel Alignment 8 1 read-write CPOL Channel Polarity 9 1 read-write CPD Channel Update Period 10 1 read-write CDTY0 PWM Channel Duty Cycle Register (ch_num = 0) 0x00000204 32 read-write 0x00000000 CDTY Channel Duty Cycle 0 32 read-write CPRD0 PWM Channel Period Register (ch_num = 0) 0x00000208 32 read-write 0x00000000 CPRD Channel Period 0 32 read-write CCNT0 PWM Channel Counter Register (ch_num = 0) 0x0000020C 32 read-only 0x00000000 CNT Channel Counter Register 0 32 read-only CUPD0 PWM Channel Update Register (ch_num = 0) 0x00000210 32 write-only CUPD 0 32 write-only CMR1 PWM Channel Mode Register (ch_num = 1) 0x00000220 32 read-write 0x00000000 CPRE Channel Pre-scaler 0 4 read-write MCK Master Clock 0x0 MCKDIV2 Master Clock divided by 2 0x1 MCKDIV4 Master Clock divided by 4 0x2 MCKDIV8 Master Clock divided by 8 0x3 MCKDIV16 Master Clock divided by 16 0x4 MCKDIV32 Master Clock divided by 32 0x5 MCKDIV64 Master Clock divided by 64 0x6 MCKDIV128 Master Clock divided by 128 0x7 MCKDIV256 Master Clock divided by 256 0x8 MCKDIV512 Master Clock divided by 512 0x9 MCKDIV1024 Master Clock divided by 1024 0xA CLKA Clock A 0xB CLKB Clock B 0xC CALG Channel Alignment 8 1 read-write CPOL Channel Polarity 9 1 read-write CPD Channel Update Period 10 1 read-write CDTY1 PWM Channel Duty Cycle Register (ch_num = 1) 0x00000224 32 read-write 0x00000000 CDTY Channel Duty Cycle 0 32 read-write CPRD1 PWM Channel Period Register (ch_num = 1) 0x00000228 32 read-write 0x00000000 CPRD Channel Period 0 32 read-write CCNT1 PWM Channel Counter Register (ch_num = 1) 0x0000022C 32 read-only 0x00000000 CNT Channel Counter Register 0 32 read-only CUPD1 PWM Channel Update Register (ch_num = 1) 0x00000230 32 write-only CUPD 0 32 write-only CMR2 PWM Channel Mode Register (ch_num = 2) 0x00000240 32 read-write 0x00000000 CPRE Channel Pre-scaler 0 4 read-write MCK Master Clock 0x0 MCKDIV2 Master Clock divided by 2 0x1 MCKDIV4 Master Clock divided by 4 0x2 MCKDIV8 Master Clock divided by 8 0x3 MCKDIV16 Master Clock divided by 16 0x4 MCKDIV32 Master Clock divided by 32 0x5 MCKDIV64 Master Clock divided by 64 0x6 MCKDIV128 Master Clock divided by 128 0x7 MCKDIV256 Master Clock divided by 256 0x8 MCKDIV512 Master Clock divided by 512 0x9 MCKDIV1024 Master Clock divided by 1024 0xA CLKA Clock A 0xB CLKB Clock B 0xC CALG Channel Alignment 8 1 read-write CPOL Channel Polarity 9 1 read-write CPD Channel Update Period 10 1 read-write CDTY2 PWM Channel Duty Cycle Register (ch_num = 2) 0x00000244 32 read-write 0x00000000 CDTY Channel Duty Cycle 0 32 read-write CPRD2 PWM Channel Period Register (ch_num = 2) 0x00000248 32 read-write 0x00000000 CPRD Channel Period 0 32 read-write CCNT2 PWM Channel Counter Register (ch_num = 2) 0x0000024C 32 read-only 0x00000000 CNT Channel Counter Register 0 32 read-only CUPD2 PWM Channel Update Register (ch_num = 2) 0x00000250 32 write-only CUPD 0 32 write-only CMR3 PWM Channel Mode Register (ch_num = 3) 0x00000260 32 read-write 0x00000000 CPRE Channel Pre-scaler 0 4 read-write MCK Master Clock 0x0 MCKDIV2 Master Clock divided by 2 0x1 MCKDIV4 Master Clock divided by 4 0x2 MCKDIV8 Master Clock divided by 8 0x3 MCKDIV16 Master Clock divided by 16 0x4 MCKDIV32 Master Clock divided by 32 0x5 MCKDIV64 Master Clock divided by 64 0x6 MCKDIV128 Master Clock divided by 128 0x7 MCKDIV256 Master Clock divided by 256 0x8 MCKDIV512 Master Clock divided by 512 0x9 MCKDIV1024 Master Clock divided by 1024 0xA CLKA Clock A 0xB CLKB Clock B 0xC CALG Channel Alignment 8 1 read-write CPOL Channel Polarity 9 1 read-write CPD Channel Update Period 10 1 read-write CDTY3 PWM Channel Duty Cycle Register (ch_num = 3) 0x00000264 32 read-write 0x00000000 CDTY Channel Duty Cycle 0 32 read-write CPRD3 PWM Channel Period Register (ch_num = 3) 0x00000268 32 read-write 0x00000000 CPRD Channel Period 0 32 read-write CCNT3 PWM Channel Counter Register (ch_num = 3) 0x0000026C 32 read-only 0x00000000 CNT Channel Counter Register 0 32 read-only CUPD3 PWM Channel Update Register (ch_num = 3) 0x00000270 32 write-only CUPD 0 32 write-only LCDC 11037E LCD Controller LCDC_ 0xF8038000 0 0x4000 registers LCDC 25 LCDCFG0 LCD Controller Configuration Register 0 0x00000000 32 read-write 0x00000000 CLKPOL LCD Controller Clock Polarity 0 1 read-write CLKSEL LCD Controller Clock Source Selection 2 1 read-write CLKPWMSEL LCD Controller PWM Clock Source Selection 3 1 read-write CGDISBASE Clock Gating Disable Control for the Base Layer 8 1 read-write CLKDIV LCD Controller Clock Divider 16 8 read-write LCDCFG1 LCD Controller Configuration Register 1 0x00000004 32 read-write 0x00000000 HSPW Horizontal Synchronization Pulse Width 0 6 read-write VSPW Vertical Synchronization Pulse Width 16 6 read-write LCDCFG2 LCD Controller Configuration Register 2 0x00000008 32 read-write 0x00000000 VFPW Vertical Front Porch Width 0 6 read-write VBPW Vertical Back Porch Width 16 6 read-write LCDCFG3 LCD Controller Configuration Register 3 0x0000000C 32 read-write 0x00000000 HFPW Horizontal Front Porch Width 0 8 read-write HBPW Horizontal Back Porch Width 16 8 read-write LCDCFG4 LCD Controller Configuration Register 4 0x00000010 32 read-write 0x00000000 PPL Number of Pixels Per Line 0 11 read-write RPF Number of Active Rows Per Frame 16 11 read-write LCDCFG5 LCD Controller Configuration Register 5 0x00000014 32 read-write 0x00000000 HSPOL Horizontal Synchronization Pulse Polarity 0 1 read-write VSPOL Vertical Synchronization Pulse Polarity 1 1 read-write VSPDLYS Vertical Synchronization Pulse Start 2 1 read-write VSPDLYE Vertical Synchronization Pulse End 3 1 read-write DISPPOL Display Signal Polarity 4 1 read-write DITHER LCD Controller Dithering 6 1 read-write DISPDLY LCD Controller Display Power Signal Synchronization 7 1 read-write MODE LCD Controller Output Mode 8 2 read-write OUTPUT_12BPP LCD output mode is set to 12 bits per pixel 0x0 OUTPUT_16BPP LCD output mode is set to 16 bits per pixel 0x1 OUTPUT_18BPP LCD output mode is set to 18 bits per pixel 0x2 OUTPUT_24BPP LCD output mode is set to 24 bits per pixel 0x3 VSPSU LCD Controller Vertical Synchronization Pulse Setup Configuration 12 1 read-write VSPHO LCD Controller Vertical Synchronization Pulse Hold Configuration 13 1 read-write GUARDTIME LCD DISPLAY Guard Time 16 5 read-write LCDCFG6 LCD Controller Configuration Register 6 0x00000018 32 read-write 0x00000000 PWMPS PWM Clock Prescaler 0 3 read-write PWMPOL LCD Controller PWM Signal Polarity 4 1 read-write PWMCVAL LCD Controller PWM Compare Value 8 8 read-write LCDEN LCD Controller Enable Register 0x00000020 32 write-only CLKEN LCD Controller Pixel Clock Enable 0 1 write-only SYNCEN LCD Controller Horizontal and Vertical Synchronization Enable 1 1 write-only DISPEN LCD Controller DISP Signal Enable 2 1 write-only PWMEN LCD Controller Pulse Width Modulation Enable 3 1 write-only LCDDIS LCD Controller Disable Register 0x00000024 32 write-only CLKDIS LCD Controller Pixel Clock Disable 0 1 write-only SYNCDIS LCD Controller Horizontal and Vertical Synchronization Disable 1 1 write-only DISPDIS LCD Controller DISP Signal Disable 2 1 write-only PWMDIS LCD Controller Pulse Width Modulation Disable 3 1 write-only CLKRST LCD Controller Clock Reset 8 1 write-only SYNCRST LCD Controller Horizontal and Vertical Synchronization Reset 9 1 write-only DISPRST LCD Controller DISP Signal Reset 10 1 write-only PWMRST LCD Controller PWM Reset 11 1 write-only LCDSR LCD Controller Status Register 0x00000028 32 read-only 0x00000000 CLKSTS Clock Status 0 1 read-only LCDSTS LCD Controller Synchronization status 1 1 read-only DISPSTS LCD Controller DISP Signal Status 2 1 read-only PWMSTS LCD Controller PWM Signal Status 3 1 read-only SIPSTS Synchronization In Progress 4 1 read-only LCDIER LCD Controller Interrupt Enable Register 0x0000002C 32 write-only SOFIE Start of Frame Interrupt Enable Register 0 1 write-only DISIE LCD Disable Interrupt Enable Register 1 1 write-only DISPIE Power UP/Down Sequence Terminated Interrupt Enable Register 2 1 write-only FIFOERRIE Output FIFO Error Interrupt Enable Register 4 1 write-only BASEIE Base Layer Interrupt Enable Register 8 1 write-only LCDIDR LCD Controller Interrupt Disable Register 0x00000030 32 write-only SOFID Start of Frame Interrupt Disable Register 0 1 write-only DISID LCD Disable Interrupt Disable Register 1 1 write-only DISPID Power UP/Down Sequence Terminated Interrupt Disable Register 2 1 write-only FIFOERRID Output FIFO Error Interrupt Disable Register 4 1 write-only BASEID Base Layer Interrupt Disable Register 8 1 write-only LCDIMR LCD Controller Interrupt Mask Register 0x00000034 32 read-only 0x00000000 SOFIM Start of Frame Interrupt Mask Register 0 1 read-only DISIM LCD Disable Interrupt Mask Register 1 1 read-only DISPIM Power UP/Down Sequence Terminated Interrupt Mask Register 2 1 read-only FIFOERRIM Output FIFO Error Interrupt Mask Register 4 1 read-only BASEIM Base Layer Interrupt Mask Register 8 1 read-only LCDISR LCD Controller Interrupt Status Register 0x00000038 32 read-only 0x00000000 SOF Start of Frame Interrupt Status Register 0 1 read-only DIS LCD Disable Interrupt Status Register 1 1 read-only DISP Power-up/Power-down Sequence Terminated Interrupt Status Register 2 1 read-only FIFOERR Output FIFO Error 4 1 read-only BASE Base Layer Raw Interrupt Status Register 8 1 read-only BASECHER Base Layer Channel Enable Register 0x00000040 32 write-only 0x00000000 CHEN Channel Enable Register 0 1 write-only UPDATEEN Update Overlay Attributes Enable Register 1 1 write-only A2QEN Add Head Pointer Enable Register 2 1 write-only BASECHDR Base Layer Channel Disable Register 0x00000044 32 write-only 0x00000000 CHDIS Channel Disable Register 0 1 write-only CHRST Channel Reset Register 8 1 write-only BASECHSR Base Layer Channel Status Register 0x00000048 32 read-only 0x00000000 CHSR Channel Status Register 0 1 read-only UPDATESR Update Overlay Attributes In Progress 1 1 read-only A2QSR Add To Queue Pending Register 2 1 read-only BASEIER Base Layer Interrupt Enable Register 0x0000004C 32 write-only 0x00000000 DMA End of DMA Transfer Interrupt Enable Register 2 1 write-only DSCR Descriptor Loaded Interrupt Enable Register 3 1 write-only ADD Head Descriptor Loaded Interrupt Enable Register 4 1 write-only DONE End of List Interrupt Enable Register 5 1 write-only OVR Overflow Interrupt Enable Register 6 1 write-only BASEIDR Base Layer Interrupt Disabled Register 0x00000050 32 write-only 0x00000000 DMA End of DMA Transfer Interrupt Disable Register 2 1 write-only DSCR Descriptor Loaded Interrupt Disable Register 3 1 write-only ADD Head Descriptor Loaded Interrupt Disable Register 4 1 write-only DONE End of List Interrupt Disable Register 5 1 write-only OVR Overflow Interrupt Disable Register 6 1 write-only BASEIMR Base Layer Interrupt Mask Register 0x00000054 32 read-only 0x00000000 DMA End of DMA Transfer Interrupt Mask Register 2 1 read-only DSCR Descriptor Loaded Interrupt Mask Register 3 1 read-only ADD Head Descriptor Loaded Interrupt Mask Register 4 1 read-only DONE End of List Interrupt Mask Register 5 1 read-only OVR Overflow Interrupt Mask Register 6 1 read-only BASEISR Base Layer Interrupt status Register 0x00000058 32 read-only 0x00000000 DMA End of DMA Transfer 2 1 read-only DSCR DMA Descriptor Loaded 3 1 read-only ADD Head Descriptor Loaded 4 1 read-only DONE End of List Detected 5 1 read-only OVR Overflow Detected 6 1 read-only BASEHEAD Base Layer DMA Head Register 0x0000005C 32 read-write 0x00000000 HEAD DMA Head Pointer 2 30 read-write BASEADDR Base Layer DMA Address Register 0x00000060 32 read-write 0x00000000 ADDR DMA Transfer Start Address 0 32 read-write BASECTRL Base Layer DMA Control Register 0x00000064 32 read-write 0x00000000 DFETCH Transfer Descriptor Fetch Enable 0 1 read-write LFETCH Lookup Table Fetch Enable 1 1 read-write DMAIEN End of DMA Transfer Interrupt Enable 2 1 read-write DSCRIEN Descriptor Loaded Interrupt Enable 3 1 read-write ADDIEN Add Head Descriptor to Queue Interrupt Enable 4 1 read-write DONEIEN End of List Interrupt Enable 5 1 read-write BASENEXT Base Layer DMA Next Register 0x00000068 32 read-write 0x00000000 NEXT DMA Descriptor Next Address 0 32 read-write BASECFG0 Base Layer Configuration Register 0 0x0000006C 32 read-write 0x00000000 BLEN AHB Burst Length 4 2 read-write AHB_SINGLE AHB Access is started as soon as there is enough space in the FIFO to store one 32-bit data. SINGLE, INCR, INCR4, INCR8 and INCR16 bursts can be used. INCR is used for a burst of 2 and 3 beats. 0x0 AHB_INCR4 AHB Access is started as soon as there is enough space in the FIFO to store a total amount of four 32-bit data. An AHB INCR4 Burst is preferred. SINGLE, INCR and INCR4 bursts can be used. INCR is used for a burst of 2 and 3 beats. 0x1 AHB_INCR8 AHB Access is started as soon as there is enough space in the FIFO to store a total amount of eight 32-bit data. An AHB INCR8 Burst is preferred. SINGLE, INCR, INCR4 and INCR8 bursts can be used. INCR is used for a burst of 2 and 3 beats. 0x2 AHB_INCR16 AHB Access is started as soon as there is enough space in the FIFO to store a total amount of sixteen 32-bit data. An AHB INCR16 Burst is preferred. SINGLE, INCR, INCR4, INCR8 and INCR16 bursts can be used. INCR is used for a burst of 2 and 3 beats. 0x3 DLBO Defined Length Burst Only For Channel Bus Transaction. 8 1 read-write BASECFG1 Base Layer Configuration Register 1 0x00000070 32 read-write 0x00000000 CLUTEN Color Lookup Table Enable 0 1 read-write RGBMODE RGB Input Mode Selection 4 4 read-write 12BPP_RGB_444 12 bpp RGB 444 0x0 16BPP_ARGB_4444 16 bpp ARGB 4444 0x1 16BPP_RGBA_4444 16 bpp RGBA 4444 0x2 16BPP_RGB_565 16 bpp RGB 565 0x3 16BPP_TRGB_1555 16 bpp TRGB 1555 0x4 18BPP_RGB_666 18 bpp RGB 666 0x5 18BPP_RGB_666_PACKED 18 bpp RGB 666 PACKED 0x6 19BPP_TRGB_1666 19 bpp TRGB 1666 0x7 19BPP_TRGB_PACKED 19 bpp TRGB 1666 PACKED 0x8 24BPP_RGB_888 24 bpp RGB 888 0x9 24BPP_RGB_888_PACKED 24 bpp RGB 888 PACKED 0xA 25BPP_TRGB_1888 25 bpp TRGB 1888 0xB 32BPP_ARGB_8888 32 bpp ARGB 8888 0xC 32BPP_RGBA_8888 32 bpp RGBA 8888 0xD CLUTMODE Color Lookup Table Input Mode Selection 8 2 read-write 1BPP color lookup table mode set to 1 bit per pixel 0x0 2BPP color lookup table mode set to 2 bits per pixel 0x1 4BPP color lookup table mode set to 4 bits per pixel 0x2 8BPP color lookup table mode set to 8 bits per pixel 0x3 BASECFG2 Base Layer Configuration Register 2 0x00000074 32 read-write 0x00000000 XSTRIDE Horizontal Stride 0 32 read-write BASECFG3 Base Layer Configuration Register 3 0x00000078 32 read-write 0x00000000 BDEF Blue Default 0 8 read-write GDEF Green Default 8 8 read-write RDEF Red Default 16 8 read-write BASECFG4 Base Layer Configuration Register 4 0x0000007C 32 read-write 0x00000000 DMA Use DMA Data Path 8 1 read-write REP Use Replication logic to expand RGB color to 24 bits 9 1 read-write 256 4 0-255 BASECLUT[%s] Base CLUT Register 0x00000400 32 read-write BCLUT Blue Color entry 0 8 read-write GCLUT Green Color entry 8 8 read-write RCLUT Red Color entry 16 8 read-write ADDRSIZE Address Size Register 0x00001FEC 32 read-only 2 4 0-1 IPNAME[%s] IP Name1 Register 0x00001FF0 32 read-only FEATURES Features Register 0x00001FF8 32 read-only VERSION Version Register 0x00001FFC 32 read-only UDP 6083V USB Device Port UDP_ 0xF803C000 0 0x4000 registers UDP 23 FRM_NUM Frame Number Register 0x00000000 32 read-only 0x00000000 FRM_NUM Frame Number as Defined in the Packet Field Formats 0 11 read-only FRM_ERR Frame Error 16 1 read-only FRM_OK Frame OK 17 1 read-only GLB_STAT Global State Register 0x00000004 32 read-write 0x00000010 FADDEN Function Address Enable 0 1 read-write CONFG Configured 1 1 read-write ESR 2 1 read-write RSMINPR 3 1 read-write RMWUPE 4 1 read-write FADDR Function Address Register 0x00000008 32 read-write 0x00000100 FADD Function Address Value 0 7 read-write FEN Function Enable 8 1 read-write IER Interrupt Enable Register 0x00000010 32 write-only EP0INT Enable Endpoint 0 Interrupt 0 1 write-only EP1INT Enable Endpoint 1 Interrupt 1 1 write-only EP2INT Enable Endpoint 2Interrupt 2 1 write-only EP3INT Enable Endpoint 3 Interrupt 3 1 write-only EP4INT Enable Endpoint 4 Interrupt 4 1 write-only EP5INT Enable Endpoint 5 Interrupt 5 1 write-only RXSUSP Enable UDP Suspend Interrupt 8 1 write-only RXRSM Enable UDP Resume Interrupt 9 1 write-only EXTRSM 10 1 write-only SOFINT Enable Start Of Frame Interrupt 11 1 write-only WAKEUP Enable UDP bus Wakeup Interrupt 13 1 write-only IDR Interrupt Disable Register 0x00000014 32 write-only EP0INT Disable Endpoint 0 Interrupt 0 1 write-only EP1INT Disable Endpoint 1 Interrupt 1 1 write-only EP2INT Disable Endpoint 2 Interrupt 2 1 write-only EP3INT Disable Endpoint 3 Interrupt 3 1 write-only EP4INT Disable Endpoint 4 Interrupt 4 1 write-only EP5INT Disable Endpoint 5 Interrupt 5 1 write-only RXSUSP Disable UDP Suspend Interrupt 8 1 write-only RXRSM Disable UDP Resume Interrupt 9 1 write-only EXTRSM 10 1 write-only SOFINT Disable Start Of Frame Interrupt 11 1 write-only WAKEUP Disable USB Bus Interrupt 13 1 write-only IMR Interrupt Mask Register 0x00000018 32 read-only 0x00001200 EP0INT Mask Endpoint 0 Interrupt 0 1 read-only EP1INT Mask Endpoint 1 Interrupt 1 1 read-only EP2INT Mask Endpoint 2 Interrupt 2 1 read-only EP3INT Mask Endpoint 3 Interrupt 3 1 read-only EP4INT Mask Endpoint 4 Interrupt 4 1 read-only EP5INT Mask Endpoint 5 Interrupt 5 1 read-only RXSUSP Mask UDP Suspend Interrupt 8 1 read-only RXRSM Mask UDP Resume Interrupt. 9 1 read-only EXTRSM 10 1 read-only SOFINT Mask Start Of Frame Interrupt 11 1 read-only BIT12 UDP_IMR Bit 12 12 1 read-only WAKEUP USB Bus WAKEUP Interrupt 13 1 read-only ISR Interrupt Status Register 0x0000001C 32 read-only EP0INT Endpoint 0 Interrupt Status 0 1 read-only EP1INT Endpoint 1 Interrupt Status 1 1 read-only EP2INT Endpoint 2 Interrupt Status 2 1 read-only EP3INT Endpoint 3 Interrupt Status 3 1 read-only EP4INT Endpoint 4 Interrupt Status 4 1 read-only EP5INT Endpoint 5 Interrupt Status 5 1 read-only RXSUSP UDP Suspend Interrupt Status 8 1 read-only RXRSM UDP Resume Interrupt Status 9 1 read-only EXTRSM 10 1 read-only SOFINT Start of Frame Interrupt Status 11 1 read-only ENDBUSRES End of BUS Reset Interrupt Status 12 1 read-only WAKEUP UDP Resume Interrupt Status 13 1 read-only ICR Interrupt Clear Register 0x00000020 32 write-only RXSUSP Clear UDP Suspend Interrupt 8 1 write-only RXRSM Clear UDP Resume Interrupt 9 1 write-only EXTRSM 10 1 write-only SOFINT Clear Start Of Frame Interrupt 11 1 write-only ENDBUSRES Clear End of Bus Reset Interrupt 12 1 write-only WAKEUP Clear Wakeup Interrupt 13 1 write-only RST_EP Reset Endpoint Register 0x00000028 32 read-write 0x00000000 EP0 Reset Endpoint 0 0 1 read-write EP1 Reset Endpoint 1 1 1 read-write EP2 Reset Endpoint 2 2 1 read-write EP3 Reset Endpoint 3 3 1 read-write EP4 Reset Endpoint 4 4 1 read-write EP5 Reset Endpoint 5 5 1 read-write 6 4 0-5 CSR[%s] Endpoint Control and Status Register 0x00000030 32 read-write TXCOMP Generates an IN Packet with Data Previously Written in the DPR 0 1 read-write RX_DATA_BK0 Receive Data Bank 0 1 1 read-write RXSETUP Received Setup 2 1 read-write STALLSENT Stall Sent 3 1 read-write TXPKTRDY Transmit Packet Ready 4 1 read-write FORCESTALL Force Stall (used by Control, Bulk and Isochronous Endpoints) 5 1 read-write RX_DATA_BK1 Receive Data Bank 1 (only used by endpoints with ping-pong attributes) 6 1 read-write DIR Transfer Direction (only available for control endpoints) 7 1 read-write EPTYPE Endpoint Type 8 3 read-write CTRL Control 0x0 ISO_OUT Isochronous OUT 0x1 BULK_OUT Bulk OUT 0x2 INT_OUT Interrupt OUT 0x3 ISO_IN Isochronous IN 0x5 BULK_IN Bulk IN 0x6 INT_IN Interrupt IN 0x7 DTGLE Data Toggle 11 1 read-write EPEDS Endpoint Enable Disable 15 1 read-write RXBYTECNT Number of Bytes Available in the FIFO 16 11 read-write CSR0_ISOENDPT Endpoint Control and Status Register ISOENDPT 0x00000030 32 read-write TXCOMP Generates an IN Packet with Data Previously Written in the DPR 0 1 read-write RX_DATA_BK0 Receive Data Bank 0 1 1 read-write RXSETUP Received Setup 2 1 read-write ISOERROR A CRC error has been detected in an isochronous transfer 3 1 read-write TXPKTRDY Transmit Packet Ready 4 1 read-write FORCESTALL Force Stall (used by Control, Bulk and Isochronous Endpoints) 5 1 read-write RX_DATA_BK1 Receive Data Bank 1 (only used by endpoints with ping-pong attributes) 6 1 read-write DIR Transfer Direction (only available for control endpoints) 7 1 read-write EPTYPE Endpoint Type 8 3 read-write CTRL Control 0x0 ISO_OUT Isochronous OUT 0x1 ISO_IN Isochronous IN 0x5 BULK_OUT Bulk OUT 0x2 BULK_IN Bulk IN 0x6 INT_OUT Interrupt OUT 0x3 INT_IN Interrupt IN 0x7 DTGLE Data Toggle 11 1 read-write EPEDS Endpoint Enable Disable 15 1 read-write RXBYTECNT Number of Bytes Available in the FIFO 16 11 read-write 6 4 0-5 FDR[%s] Endpoint FIFO Data Register 0x00000050 32 read-write FIFO_DATA FIFO Data Value 0 8 read-write TXVC Transceiver Control Register 0x00000074 32 read-write 0x00000100 TXVDIS Transceiver Disable 8 1 read-write PUON Pull-up On 9 1 read-write UART0 6418E Universal Asynchronous Receiver Transmitter 0 UART UART0_ 0xF8040000 0 0x4000 registers UART0 15 CR Control Register 0x00000000 32 write-only RSTRX Reset Receiver 2 1 write-only RSTTX Reset Transmitter 3 1 write-only RXEN Receiver Enable 4 1 write-only RXDIS Receiver Disable 5 1 write-only TXEN Transmitter Enable 6 1 write-only TXDIS Transmitter Disable 7 1 write-only RSTSTA Reset Status Bits 8 1 write-only MR Mode Register 0x00000004 32 read-write 0x00000000 PAR Parity Type 9 3 read-write EVEN Even parity 0x0 ODD Odd parity 0x1 SPACE Space: parity forced to 0 0x2 MARK Mark: parity forced to 1 0x3 NO No parity 0x4 CHMODE Channel Mode 14 2 read-write NORMAL Normal Mode 0x0 AUTOMATIC Automatic Echo 0x1 LOCAL_LOOPBACK Local Loopback 0x2 REMOTE_LOOPBACK Remote Loopback 0x3 IER Interrupt Enable Register 0x00000008 32 write-only RXRDY Enable RXRDY Interrupt 0 1 write-only TXRDY Enable TXRDY Interrupt 1 1 write-only OVRE Enable Overrun Error Interrupt 5 1 write-only FRAME Enable Framing Error Interrupt 6 1 write-only PARE Enable Parity Error Interrupt 7 1 write-only TXEMPTY Enable TXEMPTY Interrupt 9 1 write-only IDR Interrupt Disable Register 0x0000000C 32 write-only RXRDY Disable RXRDY Interrupt 0 1 write-only TXRDY Disable TXRDY Interrupt 1 1 write-only OVRE Disable Overrun Error Interrupt 5 1 write-only FRAME Disable Framing Error Interrupt 6 1 write-only PARE Disable Parity Error Interrupt 7 1 write-only TXEMPTY Disable TXEMPTY Interrupt 9 1 write-only IMR Interrupt Mask Register 0x00000010 32 read-only 0x00000000 RXRDY Mask RXRDY Interrupt 0 1 read-only TXRDY Disable TXRDY Interrupt 1 1 read-only OVRE Mask Overrun Error Interrupt 5 1 read-only FRAME Mask Framing Error Interrupt 6 1 read-only PARE Mask Parity Error Interrupt 7 1 read-only TXEMPTY Mask TXEMPTY Interrupt 9 1 read-only SR Status Register 0x00000014 32 read-only RXRDY Receiver Ready 0 1 read-only TXRDY Transmitter Ready 1 1 read-only OVRE Overrun Error 5 1 read-only FRAME Framing Error 6 1 read-only PARE Parity Error 7 1 read-only TXEMPTY Transmitter Empty 9 1 read-only RHR Receive Holding Register 0x00000018 32 read-only 0x00000000 RXCHR Received Character 0 8 read-only THR Transmit Holding Register 0x0000001C 32 write-only TXCHR Character to be Transmitted 0 8 write-only BRGR Baud Rate Generator Register 0x00000020 32 read-write 0x00000000 CD Clock Divisor 0 16 read-write UART1 6418E Universal Asynchronous Receiver Transmitter 1 UART UART1_ 0xF8044000 0 0x4000 registers UART1 16 CR Control Register 0x00000000 32 write-only RSTRX Reset Receiver 2 1 write-only RSTTX Reset Transmitter 3 1 write-only RXEN Receiver Enable 4 1 write-only RXDIS Receiver Disable 5 1 write-only TXEN Transmitter Enable 6 1 write-only TXDIS Transmitter Disable 7 1 write-only RSTSTA Reset Status Bits 8 1 write-only MR Mode Register 0x00000004 32 read-write 0x00000000 PAR Parity Type 9 3 read-write EVEN Even parity 0x0 ODD Odd parity 0x1 SPACE Space: parity forced to 0 0x2 MARK Mark: parity forced to 1 0x3 NO No parity 0x4 CHMODE Channel Mode 14 2 read-write NORMAL Normal Mode 0x0 AUTOMATIC Automatic Echo 0x1 LOCAL_LOOPBACK Local Loopback 0x2 REMOTE_LOOPBACK Remote Loopback 0x3 IER Interrupt Enable Register 0x00000008 32 write-only RXRDY Enable RXRDY Interrupt 0 1 write-only TXRDY Enable TXRDY Interrupt 1 1 write-only OVRE Enable Overrun Error Interrupt 5 1 write-only FRAME Enable Framing Error Interrupt 6 1 write-only PARE Enable Parity Error Interrupt 7 1 write-only TXEMPTY Enable TXEMPTY Interrupt 9 1 write-only IDR Interrupt Disable Register 0x0000000C 32 write-only RXRDY Disable RXRDY Interrupt 0 1 write-only TXRDY Disable TXRDY Interrupt 1 1 write-only OVRE Disable Overrun Error Interrupt 5 1 write-only FRAME Disable Framing Error Interrupt 6 1 write-only PARE Disable Parity Error Interrupt 7 1 write-only TXEMPTY Disable TXEMPTY Interrupt 9 1 write-only IMR Interrupt Mask Register 0x00000010 32 read-only 0x00000000 RXRDY Mask RXRDY Interrupt 0 1 read-only TXRDY Disable TXRDY Interrupt 1 1 read-only OVRE Mask Overrun Error Interrupt 5 1 read-only FRAME Mask Framing Error Interrupt 6 1 read-only PARE Mask Parity Error Interrupt 7 1 read-only TXEMPTY Mask TXEMPTY Interrupt 9 1 read-only SR Status Register 0x00000014 32 read-only RXRDY Receiver Ready 0 1 read-only TXRDY Transmitter Ready 1 1 read-only OVRE Overrun Error 5 1 read-only FRAME Framing Error 6 1 read-only PARE Parity Error 7 1 read-only TXEMPTY Transmitter Empty 9 1 read-only RHR Receive Holding Register 0x00000018 32 read-only 0x00000000 RXCHR Received Character 0 8 read-only THR Transmit Holding Register 0x0000001C 32 write-only TXCHR Character to be Transmitted 0 8 write-only BRGR Baud Rate Generator Register 0x00000020 32 read-write 0x00000000 CD Clock Divisor 0 16 read-write TRNG 6334B True Random Number Generator TRNG_ 0xF8048000 0 0x4000 registers TRNG 30 CR Control Register 0x00000000 32 write-only ENABLE Enables the TRNG to provide random values 0 1 write-only KEY Security Key 8 24 write-only IER Interrupt Enable Register 0x00000010 32 write-only DATRDY Data Ready Interrupt Enable 0 1 write-only IDR Interrupt Disable Register 0x00000014 32 write-only DATRDY Data Ready Interrupt Disable 0 1 write-only IMR Interrupt Mask Register 0x00000018 32 read-only 0x00000000 DATRDY Data Ready Interrupt Mask 0 1 read-only ISR Interrupt Status Register 0x0000001C 32 read-only 0x00000000 DATRDY Data Ready 0 1 read-only ODATA Output Data Register 0x00000050 32 read-only 0x00000000 ODATA Output Data 0 32 read-only ADC 6489I Analog-to-Digital Converter ADC_ 0xF804C000 0 0x4000 registers ADC 19 CR Control Register 0x00000000 32 write-only SWRST Software Reset 0 1 write-only START Start Conversion 1 1 write-only TSCALIB Touchscreen Calibration 2 1 write-only MR Mode Register 0x00000004 32 read-write 0x00000000 LOWRES Resolution 4 1 read-write BITS_10 10-bit resolution 0 BITS_8 8-bit resolution 1 SLEEP Sleep Mode 5 1 read-write NORMAL Normal Mode: The ADC Core and reference voltage circuitry are kept ON between conversions 0 SLEEP Sleep Mode: The ADC Core and reference voltage circuitry are OFF between conversions 1 FWUP Fast Wake Up 6 1 read-write OFF Normal Sleep Mode: The sleep mode is defined by the SLEEP bit 0 ON Fast Wake Up Sleep Mode: The Voltage reference is ON between conversions and ADC Core is OFF 1 PRESCAL Prescaler Rate Selection 8 8 read-write STARTUP Start Up Time 16 4 read-write SUT0 0 periods of ADCClock 0x0 SUT8 8 periods of ADCClock 0x1 SUT16 16 periods of ADCClock 0x2 SUT24 24 periods of ADCClock 0x3 SUT64 64 periods of ADCClock 0x4 SUT80 80 periods of ADCClock 0x5 SUT96 96 periods of ADCClock 0x6 SUT112 112 periods of ADCClock 0x7 SUT512 512 periods of ADCClock 0x8 SUT576 576 periods of ADCClock 0x9 SUT640 640 periods of ADCClock 0xA SUT704 704 periods of ADCClock 0xB SUT768 768 periods of ADCClock 0xC SUT832 832 periods of ADCClock 0xD SUT896 896 periods of ADCClock 0xE SUT960 960 periods of ADCClock 0xF TRACKTIM Tracking Time 24 4 read-write USEQ Use Sequence Enable 31 1 read-write NUM_ORDER Normal Mode: The controller converts channels in a simple numeric order. 0 REG_ORDER User Sequence Mode: The sequence respects what is defined in ADC_SEQR1 and ADC_SEQR2 registers. 1 SEQR1 Channel Sequence Register 1 0x00000008 32 read-write 0x00000000 USCH1 User Sequence Number 1 0 4 read-write USCH2 User Sequence Number 2 4 4 read-write USCH3 User Sequence Number 3 8 4 read-write USCH4 User Sequence Number 4 12 4 read-write USCH5 User Sequence Number 5 16 4 read-write USCH6 User Sequence Number 6 20 4 read-write USCH7 User Sequence Number 7 24 4 read-write USCH8 User Sequence Number 8 28 4 read-write SEQR2 Channel Sequence Register 2 0x0000000C 32 read-write 0x00000000 USCH9 User Sequence Number 9 0 4 read-write USCH10 User Sequence Number 10 4 4 read-write USCH11 User Sequence Number 11 8 4 read-write USCH12 User Sequence Number 12 12 4 read-write USCH13 User Sequence Number 13 16 4 read-write USCH14 User Sequence Number 14 20 4 read-write USCH15 User Sequence Number 15 24 4 read-write USCH16 User Sequence Number 16 28 4 read-write CHER Channel Enable Register 0x00000010 32 write-only CH0 Channel 0 Enable 0 1 write-only CH1 Channel 1 Enable 1 1 write-only CH2 Channel 2 Enable 2 1 write-only CH3 Channel 3 Enable 3 1 write-only CH4 Channel 4 Enable 4 1 write-only CH5 Channel 5 Enable 5 1 write-only CH6 Channel 6 Enable 6 1 write-only CH7 Channel 7 Enable 7 1 write-only CH8 Channel 8 Enable 8 1 write-only CH9 Channel 9 Enable 9 1 write-only CH10 Channel 10 Enable 10 1 write-only CH11 Channel 11 Enable 11 1 write-only CHDR Channel Disable Register 0x00000014 32 write-only CH0 Channel 0 Disable 0 1 write-only CH1 Channel 1 Disable 1 1 write-only CH2 Channel 2 Disable 2 1 write-only CH3 Channel 3 Disable 3 1 write-only CH4 Channel 4 Disable 4 1 write-only CH5 Channel 5 Disable 5 1 write-only CH6 Channel 6 Disable 6 1 write-only CH7 Channel 7 Disable 7 1 write-only CH8 Channel 8 Disable 8 1 write-only CH9 Channel 9 Disable 9 1 write-only CH10 Channel 10 Disable 10 1 write-only CH11 Channel 11 Disable 11 1 write-only CHSR Channel Status Register 0x00000018 32 read-only 0x00000000 CH0 Channel 0 Status 0 1 read-only CH1 Channel 1 Status 1 1 read-only CH2 Channel 2 Status 2 1 read-only CH3 Channel 3 Status 3 1 read-only CH4 Channel 4 Status 4 1 read-only CH5 Channel 5 Status 5 1 read-only CH6 Channel 6 Status 6 1 read-only CH7 Channel 7 Status 7 1 read-only CH8 Channel 8 Status 8 1 read-only CH9 Channel 9 Status 9 1 read-only CH10 Channel 10 Status 10 1 read-only CH11 Channel 11 Status 11 1 read-only LCDR Last Converted Data Register 0x00000020 32 read-only 0x00000000 LDATA Last Data Converted 0 12 read-only CHNB Channel Number 12 4 read-only IER Interrupt Enable Register 0x00000024 32 write-only EOC0 End of Conversion Interrupt Enable 0 0 1 write-only EOC1 End of Conversion Interrupt Enable 1 1 1 write-only EOC2 End of Conversion Interrupt Enable 2 2 1 write-only EOC3 End of Conversion Interrupt Enable 3 3 1 write-only EOC4 End of Conversion Interrupt Enable 4 4 1 write-only EOC5 End of Conversion Interrupt Enable 5 5 1 write-only EOC6 End of Conversion Interrupt Enable 6 6 1 write-only EOC7 End of Conversion Interrupt Enable 7 7 1 write-only EOC8 End of Conversion Interrupt Enable 8 8 1 write-only EOC9 End of Conversion Interrupt Enable 9 9 1 write-only EOC10 End of Conversion Interrupt Enable 10 10 1 write-only EOC11 End of Conversion Interrupt Enable 11 11 1 write-only XRDY Touchscreen Measure XPOS Ready Interrupt Enable 20 1 write-only YRDY Touchscreen Measure YPOS Ready Interrupt Enable 21 1 write-only PRDY Touchscreen Measure Pressure Ready Interrupt Enable 22 1 write-only DRDY Data Ready Interrupt Enable 24 1 write-only GOVRE General Overrun Error Interrupt Enable 25 1 write-only COMPE Comparison Event Interrupt Enable 26 1 write-only PEN Pen Contact Interrupt Enable 29 1 write-only NOPEN No Pen Contact Interrupt Enable 30 1 write-only IDR Interrupt Disable Register 0x00000028 32 write-only EOC0 End of Conversion Interrupt Disable 0 0 1 write-only EOC1 End of Conversion Interrupt Disable 1 1 1 write-only EOC2 End of Conversion Interrupt Disable 2 2 1 write-only EOC3 End of Conversion Interrupt Disable 3 3 1 write-only EOC4 End of Conversion Interrupt Disable 4 4 1 write-only EOC5 End of Conversion Interrupt Disable 5 5 1 write-only EOC6 End of Conversion Interrupt Disable 6 6 1 write-only EOC7 End of Conversion Interrupt Disable 7 7 1 write-only EOC8 End of Conversion Interrupt Disable 8 8 1 write-only EOC9 End of Conversion Interrupt Disable 9 9 1 write-only EOC10 End of Conversion Interrupt Disable 10 10 1 write-only EOC11 End of Conversion Interrupt Disable 11 11 1 write-only XRDY Touchscreen Measure XPOS Ready Interrupt Disable 20 1 write-only YRDY Touchscreen Measure YPOS Ready Interrupt Disable 21 1 write-only PRDY Touchscreen Measure Pressure Ready Interrupt Disable 22 1 write-only DRDY Data Ready Interrupt Disable 24 1 write-only GOVRE General Overrun Error Interrupt Disable 25 1 write-only COMPE Comparison Event Interrupt Disable 26 1 write-only PEN Pen Contact Interrupt Disable 29 1 write-only NOPEN No Pen Contact Interrupt Disable 30 1 write-only IMR Interrupt Mask Register 0x0000002C 32 read-only 0x00000000 EOC0 End of Conversion Interrupt Mask 0 0 1 read-only EOC1 End of Conversion Interrupt Mask 1 1 1 read-only EOC2 End of Conversion Interrupt Mask 2 2 1 read-only EOC3 End of Conversion Interrupt Mask 3 3 1 read-only EOC4 End of Conversion Interrupt Mask 4 4 1 read-only EOC5 End of Conversion Interrupt Mask 5 5 1 read-only EOC6 End of Conversion Interrupt Mask 6 6 1 read-only EOC7 End of Conversion Interrupt Mask 7 7 1 read-only EOC8 End of Conversion Interrupt Mask 8 8 1 read-only EOC9 End of Conversion Interrupt Mask 9 9 1 read-only EOC10 End of Conversion Interrupt Mask 10 10 1 read-only EOC11 End of Conversion Interrupt Mask 11 11 1 read-only XRDY Touchscreen Measure XPOS Ready Interrupt Mask 20 1 read-only YRDY Touchscreen Measure YPOS Ready Interrupt Mask 21 1 read-only PRDY Touchscreen Measure Pressure Ready Interrupt Mask 22 1 read-only DRDY Data Ready Interrupt Mask 24 1 read-only GOVRE General Overrun Error Interrupt Mask 25 1 read-only COMPE Comparison Event Interrupt Mask 26 1 read-only PEN Pen Contact Interrupt Mask 29 1 read-only NOPEN No Pen Contact Interrupt Mask 30 1 read-only ISR Interrupt Status Register 0x00000030 32 read-only 0x00000000 EOC0 End of Conversion 0 0 1 read-only EOC1 End of Conversion 1 1 1 read-only EOC2 End of Conversion 2 2 1 read-only EOC3 End of Conversion 3 3 1 read-only EOC4 End of Conversion 4 4 1 read-only EOC5 End of Conversion 5 5 1 read-only EOC6 End of Conversion 6 6 1 read-only EOC7 End of Conversion 7 7 1 read-only EOC8 End of Conversion 8 8 1 read-only EOC9 End of Conversion 9 9 1 read-only EOC10 End of Conversion 10 10 1 read-only EOC11 End of Conversion 11 11 1 read-only XRDY Touchscreen XPOS Measure Ready 20 1 read-only YRDY Touchscreen YPOS Measure Ready 21 1 read-only PRDY Touchscreen Pressure Measure Ready 22 1 read-only DRDY Data Ready 24 1 read-only GOVRE General Overrun Error 25 1 read-only COMPE Comparison Error 26 1 read-only PEN Pen contact 29 1 read-only NOPEN No Pen contact 30 1 read-only PENS Pen detect Status 31 1 read-only OVER Overrun Status Register 0x0000003C 32 read-only 0x00000000 OVRE0 Overrun Error 0 0 1 read-only OVRE1 Overrun Error 1 1 1 read-only OVRE2 Overrun Error 2 2 1 read-only OVRE3 Overrun Error 3 3 1 read-only OVRE4 Overrun Error 4 4 1 read-only OVRE5 Overrun Error 5 5 1 read-only OVRE6 Overrun Error 6 6 1 read-only OVRE7 Overrun Error 7 7 1 read-only OVRE8 Overrun Error 8 8 1 read-only OVRE9 Overrun Error 9 9 1 read-only OVRE10 Overrun Error 10 10 1 read-only OVRE11 Overrun Error 11 11 1 read-only EMR Extended Mode Register 0x00000040 32 read-write 0x00000000 CMPMODE Comparison Mode 0 2 read-write LOW Generates an event when the converted data is lower than the low threshold of the window. 0x0 HIGH Generates an event when the converted data is higher than the high threshold of the window. 0x1 IN Generates an event when the converted data is in the comparison window. 0x2 OUT Generates an event when the converted data is out of the comparison window. 0x3 CMPSEL Comparison Selected Channel 4 4 read-write CMPALL Compare All Channels 9 1 read-write TAG TAG of ADC_LDCR register 24 1 read-write CWR Compare Window Register 0x00000044 32 read-write 0x00000000 LOWTHRES Low Threshold 0 12 read-write HIGHTHRES High Threshold 16 12 read-write 12 4 0-11 CDR[%s] Channel Data Register 0x00000050 32 read-only DATA Converted Data 0 12 read-only ACR Analog Control Register 0x00000094 32 read-write 0x00000100 PENDETSENS Pen Detection Sensitivity 0 2 read-write TSMR Touchscreen Mode Register 0x000000B0 32 read-write 0x00000000 TSMODE Touchscreen Mode 0 2 read-write NONE No Touchscreen 0x0 4_WIRE_NO_PM 4-wire Touchscreen without pressure measurement 0x1 4_WIRE 4-wire Touchscreen with pressure measurement 0x2 5_WIRE 5-wire Touchscreen 0x3 TSAV Touchscreen Average 4 2 read-write NO_FILTER No Filtering. Only one ADC conversion per measure 0x0 AVG2CONV Averages 2 ADC conversions 0x1 AVG4CONV Averages 4 ADC conversions 0x2 AVG8CONV Averages 8 ADC conversions 0x3 TSFREQ Touchscreen Frequency 8 4 read-write TSSCTIM Touchscreen Switches Closure Time 16 4 read-write NOTSDMA No TouchScreen DMA 22 1 read-write PENDET Pen Contact Detection Enable 24 1 read-write PENDBC Pen Detect Debouncing Period 28 4 read-write XPOSR Touchscreen X Position Register 0x000000B4 32 read-only 0x00000000 XPOS X Position 0 10 read-only XSCALE Scale of XPOS 16 10 read-only YPOSR Touchscreen Y Position Register 0x000000B8 32 read-only 0x00000000 YPOS Y Position 0 10 read-only YSCALE Scale of YPOS 16 10 read-only PRESSR Touchscreen Pressure Register 0x000000BC 32 read-only 0x00000000 Z1 Data of Z1 Measurement 0 10 read-only Z2 Data of Z2 Measurement 16 10 read-only TRGR Trigger Register 0x000000C0 32 read-write 0x00000000 TRGMOD Trigger Mode 0 3 read-write NO_TRIGGER No trigger, only software trigger can start conversions 0x0 EXT_TRIG_RISE External Trigger Rising Edge 0x1 EXT_TRIG_FALL External Trigger Falling Edge 0x2 EXT_TRIG_ANY External Trigger Any Edge 0x3 PEN_TRIG Pen Detect Trigger (shall be selected only if PENDET is set and TSAMOD = Touchscreen only mode) 0x4 PERIOD_TRIG Periodic Trigger (TRGPER shall be initiated appropriately) 0x5 CONTINUOUS Continuous Mode 0x6 TRGPER Trigger Period 16 16 read-write WPMR Write Protect Mode Register 0x000000E4 32 read-write 0x00000000 WPEN Write Protect Enable 0 1 read-write WPKEY Write Protect KEY 8 24 read-write WPSR Write Protect Status Register 0x000000E8 32 read-only 0x00000000 WPVS Write Protect Violation Status 0 1 read-only WPVSRC Write Protect Violation Source 8 16 read-only FUSE 11089B Fuse Controller FUSE_ 0xFFFFDC00 0 0x200 registers FUSE 4 CR Fuse Control Register 0x00000000 32 read-write WRQ Write Request 0 1 read-write RRQ Read Request 1 1 read-write KEY Key code 8 8 read-write VALID valid key. 0xFB MR Fuse Mode Register 0x00000004 32 write-only MSK Mask Fuse Status Registers 0 1 write-only IR Fuse Index Register 0x00000008 32 read-write 0x00000000 WS Write Status 0 1 read-write RS Read Status 1 1 read-write WSEL Word Selection 8 4 read-write DR Fuse Data Register 0x0000000C 32 read-write DATA Data to Program 0 32 read-write 10 4 0-9 SR[%s] Fuse Status Register 0x00000010 32 read-only FUSE Fuse Status 0 32 read-only MATRIX 11069A AHB Bus Matrix MATRIX_ 0xFFFFDE00 0 0x200 registers 6 4 0-5 MCFG[%s] Master Configuration Register 0x00000000 32 read-write ULBT Undefined Length Burst Type 0 3 read-write 5 4 0-4 SCFG[%s] Slave Configuration Register 0x00000040 32 read-write SLOT_CYCLE Maximum Bus Grant Duration for Masters 0 9 read-write DEFMSTR_TYPE Default Master Type 16 2 read-write FIXED_DEFMSTR Fixed Default Master 18 4 read-write PRAS0 Priority Register A for Slave 0 0x00000080 32 read-write 0x00000000 M0PR Master 0 Priority 0 2 read-write M1PR Master 1 Priority 4 2 read-write M2PR Master 2 Priority 8 2 read-write M3PR Master 3 Priority 12 2 read-write M4PR Master 4 Priority 16 2 read-write M5PR Master 5 Priority 20 2 read-write PRAS1 Priority Register A for Slave 1 0x00000088 32 read-write 0x00000000 M0PR Master 0 Priority 0 2 read-write M1PR Master 1 Priority 4 2 read-write M2PR Master 2 Priority 8 2 read-write M3PR Master 3 Priority 12 2 read-write M4PR Master 4 Priority 16 2 read-write M5PR Master 5 Priority 20 2 read-write PRAS2 Priority Register A for Slave 2 0x00000090 32 read-write 0x00000000 M0PR Master 0 Priority 0 2 read-write M1PR Master 1 Priority 4 2 read-write M2PR Master 2 Priority 8 2 read-write M3PR Master 3 Priority 12 2 read-write M4PR Master 4 Priority 16 2 read-write M5PR Master 5 Priority 20 2 read-write PRAS3 Priority Register A for Slave 3 0x00000098 32 read-write 0x00000000 M0PR Master 0 Priority 0 2 read-write M1PR Master 1 Priority 4 2 read-write M2PR Master 2 Priority 8 2 read-write M3PR Master 3 Priority 12 2 read-write M4PR Master 4 Priority 16 2 read-write M5PR Master 5 Priority 20 2 read-write PRAS4 Priority Register A for Slave 4 0x000000A0 32 read-write 0x00000000 M0PR Master 0 Priority 0 2 read-write M1PR Master 1 Priority 4 2 read-write M2PR Master 2 Priority 8 2 read-write M3PR Master 3 Priority 12 2 read-write M4PR Master 4 Priority 16 2 read-write M5PR Master 5 Priority 20 2 read-write MRCR Master Remap Control Register 0x00000100 32 read-write 0x00000000 RCB0 Remap Command Bit for Master 0 0 1 read-write RCB1 Remap Command Bit for Master 1 1 1 read-write RCB2 Remap Command Bit for Master 2 2 1 read-write RCB3 Remap Command Bit for Master 3 3 1 read-write RCB4 Remap Command Bit for Master 4 4 1 read-write RCB5 Remap Command Bit for Master 5 5 1 read-write WPMR Write Protect Mode Register 0x000001E4 32 read-write 0x00000000 WPEN Write Protect ENable 0 1 read-write WPKEY Write Protect KEY (Write-only) 8 24 read-write WPSR Write Protect Status Register 0x000001E8 32 read-only 0x00000000 WPVS Write Protect Violation Status 0 1 read-only WPVSRC Write Protect Violation Source 8 16 read-only PMECC 11038D Programmable Multibit Error Corrected Code Controller EBI PMECC_ 0xFFFFE000 0 0x600 registers CFG PMECC Configuration Register 0x00000000 32 read-write 0x00000000 BCH_ERR Error Correct Capability 0 3 read-write BCH_ERR2 2 errors 0x0 BCH_ERR4 4 errors 0x1 BCH_ERR8 8 errors 0x2 BCH_ERR12 12 errors 0x3 BCH_ERR24 24 errors 0x4 SECTORSZ Sector Size 4 1 read-write PAGESIZE Number of Sectors in the Page 8 2 read-write PAGESIZE_1SEC 1 sector for main area (512 or 1024 bytes) 0x0 PAGESIZE_2SEC 2 sectors for main area (1024 or 2048 bytes) 0x1 PAGESIZE_4SEC 4 sectors for main area (2048 or 4096 bytes) 0x2 PAGESIZE_8SEC 8 errors for main area (4096 or 8192 bytes) 0x3 NANDWR NAND Write Access 12 1 read-write SPAREEN Spare Enable 16 1 read-write AUTO Automatic Mode Enable 20 1 read-write SAREA PMECC Spare Area Size Register 0x00000004 32 read-write 0x00000000 SPARESIZE Spare Area Size 0 9 read-write SADDR PMECC Start Address Register 0x00000008 32 read-write 0x00000000 STARTADDR ECC Area Start Address (byte oriented address) 0 9 read-write EADDR PMECC End Address Register 0x0000000C 32 read-write 0x00000000 ENDADDR ECC Area End Address (byte oriented address) 0 9 read-write CLK PMECC Clock Control Register 0x00000010 32 read-write 0x00000000 CLKCTRL Clock Control Register 0 3 read-write CTRL PMECC Control Register 0x00000014 32 write-only 0x00000000 RST Reset the PMECC Module 0 1 write-only DATA Start a Data Phase 1 1 write-only USER Start a User Mode Phase 2 1 write-only ENABLE PMECC Module Enable 4 1 write-only DISABLE PMECC Module Disable 5 1 write-only SR PMECC Status Register 0x00000018 32 read-only 0x00000000 BUSY The Kernel of the PMECC is Busy 0 1 read-only ENABLE PMECC Module Status 4 1 read-only IER PMECC Interrupt Enable register 0x0000001C 32 write-only 0x00000000 ERRIE Error Interrupt Enable 0 1 write-only IDR PMECC Interrupt Disable Register 0x00000020 32 write-only ERRID Error Interrupt Disable 0 1 write-only IMR PMECC Interrupt Mask Register 0x00000024 32 read-only 0x00000000 ERRIM Error Interrupt Enable 0 1 read-only ISR PMECC Interrupt Status Register 0x00000028 32 read-only 0x00000000 ERRIS Error Interrupt Status Register 0 8 read-only ECC0_0 PMECC ECC 0 Register (sec_num = 0) 0x00000040 32 read-only 0x00000000 ECC BCH Redundancy 0 32 read-only ECC1_0 PMECC ECC 1 Register (sec_num = 0) 0x00000044 32 read-only 0x00000000 ECC BCH Redundancy 0 32 read-only ECC2_0 PMECC ECC 2 Register (sec_num = 0) 0x00000048 32 read-only 0x00000000 ECC BCH Redundancy 0 32 read-only ECC3_0 PMECC ECC 3 Register (sec_num = 0) 0x0000004C 32 read-only 0x00000000 ECC BCH Redundancy 0 32 read-only ECC4_0 PMECC ECC 4 Register (sec_num = 0) 0x00000050 32 read-only 0x00000000 ECC BCH Redundancy 0 32 read-only ECC5_0 PMECC ECC 5 Register (sec_num = 0) 0x00000054 32 read-only 0x00000000 ECC BCH Redundancy 0 32 read-only ECC6_0 PMECC ECC 6 Register (sec_num = 0) 0x00000058 32 read-only 0x00000000 ECC BCH Redundancy 0 32 read-only ECC7_0 PMECC ECC 7 Register (sec_num = 0) 0x0000005C 32 read-only 0x00000000 ECC BCH Redundancy 0 32 read-only ECC8_0 PMECC ECC 8 Register (sec_num = 0) 0x00000060 32 read-only 0x00000000 ECC BCH Redundancy 0 32 read-only ECC9_0 PMECC ECC 9 Register (sec_num = 0) 0x00000064 32 read-only 0x00000000 ECC BCH Redundancy 0 32 read-only ECC10_0 PMECC ECC 10 Register (sec_num = 0) 0x00000068 32 read-only 0x00000000 ECC BCH Redundancy 0 32 read-only ECC0_1 PMECC ECC 0 Register (sec_num = 1) 0x00000080 32 read-only 0x00000000 ECC BCH Redundancy 0 32 read-only ECC1_1 PMECC ECC 1 Register (sec_num = 1) 0x00000084 32 read-only 0x00000000 ECC BCH Redundancy 0 32 read-only ECC2_1 PMECC ECC 2 Register (sec_num = 1) 0x00000088 32 read-only 0x00000000 ECC BCH Redundancy 0 32 read-only ECC3_1 PMECC ECC 3 Register (sec_num = 1) 0x0000008C 32 read-only 0x00000000 ECC BCH Redundancy 0 32 read-only ECC4_1 PMECC ECC 4 Register (sec_num = 1) 0x00000090 32 read-only 0x00000000 ECC BCH Redundancy 0 32 read-only ECC5_1 PMECC ECC 5 Register (sec_num = 1) 0x00000094 32 read-only 0x00000000 ECC BCH Redundancy 0 32 read-only ECC6_1 PMECC ECC 6 Register (sec_num = 1) 0x00000098 32 read-only 0x00000000 ECC BCH Redundancy 0 32 read-only ECC7_1 PMECC ECC 7 Register (sec_num = 1) 0x0000009C 32 read-only 0x00000000 ECC BCH Redundancy 0 32 read-only ECC8_1 PMECC ECC 8 Register (sec_num = 1) 0x000000A0 32 read-only 0x00000000 ECC BCH Redundancy 0 32 read-only ECC9_1 PMECC ECC 9 Register (sec_num = 1) 0x000000A4 32 read-only 0x00000000 ECC BCH Redundancy 0 32 read-only ECC10_1 PMECC ECC 10 Register (sec_num = 1) 0x000000A8 32 read-only 0x00000000 ECC BCH Redundancy 0 32 read-only ECC0_2 PMECC ECC 0 Register (sec_num = 2) 0x000000C0 32 read-only 0x00000000 ECC BCH Redundancy 0 32 read-only ECC1_2 PMECC ECC 1 Register (sec_num = 2) 0x000000C4 32 read-only 0x00000000 ECC BCH Redundancy 0 32 read-only ECC2_2 PMECC ECC 2 Register (sec_num = 2) 0x000000C8 32 read-only 0x00000000 ECC BCH Redundancy 0 32 read-only ECC3_2 PMECC ECC 3 Register (sec_num = 2) 0x000000CC 32 read-only 0x00000000 ECC BCH Redundancy 0 32 read-only ECC4_2 PMECC ECC 4 Register (sec_num = 2) 0x000000D0 32 read-only 0x00000000 ECC BCH Redundancy 0 32 read-only ECC5_2 PMECC ECC 5 Register (sec_num = 2) 0x000000D4 32 read-only 0x00000000 ECC BCH Redundancy 0 32 read-only ECC6_2 PMECC ECC 6 Register (sec_num = 2) 0x000000D8 32 read-only 0x00000000 ECC BCH Redundancy 0 32 read-only ECC7_2 PMECC ECC 7 Register (sec_num = 2) 0x000000DC 32 read-only 0x00000000 ECC BCH Redundancy 0 32 read-only ECC8_2 PMECC ECC 8 Register (sec_num = 2) 0x000000E0 32 read-only 0x00000000 ECC BCH Redundancy 0 32 read-only ECC9_2 PMECC ECC 9 Register (sec_num = 2) 0x000000E4 32 read-only 0x00000000 ECC BCH Redundancy 0 32 read-only ECC10_2 PMECC ECC 10 Register (sec_num = 2) 0x000000E8 32 read-only 0x00000000 ECC BCH Redundancy 0 32 read-only ECC0_3 PMECC ECC 0 Register (sec_num = 3) 0x00000100 32 read-only 0x00000000 ECC BCH Redundancy 0 32 read-only ECC1_3 PMECC ECC 1 Register (sec_num = 3) 0x00000104 32 read-only 0x00000000 ECC BCH Redundancy 0 32 read-only ECC2_3 PMECC ECC 2 Register (sec_num = 3) 0x00000108 32 read-only 0x00000000 ECC BCH Redundancy 0 32 read-only ECC3_3 PMECC ECC 3 Register (sec_num = 3) 0x0000010C 32 read-only 0x00000000 ECC BCH Redundancy 0 32 read-only ECC4_3 PMECC ECC 4 Register (sec_num = 3) 0x00000110 32 read-only 0x00000000 ECC BCH Redundancy 0 32 read-only ECC5_3 PMECC ECC 5 Register (sec_num = 3) 0x00000114 32 read-only 0x00000000 ECC BCH Redundancy 0 32 read-only ECC6_3 PMECC ECC 6 Register (sec_num = 3) 0x00000118 32 read-only 0x00000000 ECC BCH Redundancy 0 32 read-only ECC7_3 PMECC ECC 7 Register (sec_num = 3) 0x0000011C 32 read-only 0x00000000 ECC BCH Redundancy 0 32 read-only ECC8_3 PMECC ECC 8 Register (sec_num = 3) 0x00000120 32 read-only 0x00000000 ECC BCH Redundancy 0 32 read-only ECC9_3 PMECC ECC 9 Register (sec_num = 3) 0x00000124 32 read-only 0x00000000 ECC BCH Redundancy 0 32 read-only ECC10_3 PMECC ECC 10 Register (sec_num = 3) 0x00000128 32 read-only 0x00000000 ECC BCH Redundancy 0 32 read-only ECC0_4 PMECC ECC 0 Register (sec_num = 4) 0x00000140 32 read-only 0x00000000 ECC BCH Redundancy 0 32 read-only ECC1_4 PMECC ECC 1 Register (sec_num = 4) 0x00000144 32 read-only 0x00000000 ECC BCH Redundancy 0 32 read-only ECC2_4 PMECC ECC 2 Register (sec_num = 4) 0x00000148 32 read-only 0x00000000 ECC BCH Redundancy 0 32 read-only ECC3_4 PMECC ECC 3 Register (sec_num = 4) 0x0000014C 32 read-only 0x00000000 ECC BCH Redundancy 0 32 read-only ECC4_4 PMECC ECC 4 Register (sec_num = 4) 0x00000150 32 read-only 0x00000000 ECC BCH Redundancy 0 32 read-only ECC5_4 PMECC ECC 5 Register (sec_num = 4) 0x00000154 32 read-only 0x00000000 ECC BCH Redundancy 0 32 read-only ECC6_4 PMECC ECC 6 Register (sec_num = 4) 0x00000158 32 read-only 0x00000000 ECC BCH Redundancy 0 32 read-only ECC7_4 PMECC ECC 7 Register (sec_num = 4) 0x0000015C 32 read-only 0x00000000 ECC BCH Redundancy 0 32 read-only ECC8_4 PMECC ECC 8 Register (sec_num = 4) 0x00000160 32 read-only 0x00000000 ECC BCH Redundancy 0 32 read-only ECC9_4 PMECC ECC 9 Register (sec_num = 4) 0x00000164 32 read-only 0x00000000 ECC BCH Redundancy 0 32 read-only ECC10_4 PMECC ECC 10 Register (sec_num = 4) 0x00000168 32 read-only 0x00000000 ECC BCH Redundancy 0 32 read-only ECC0_5 PMECC ECC 0 Register (sec_num = 5) 0x00000180 32 read-only 0x00000000 ECC BCH Redundancy 0 32 read-only ECC1_5 PMECC ECC 1 Register (sec_num = 5) 0x00000184 32 read-only 0x00000000 ECC BCH Redundancy 0 32 read-only ECC2_5 PMECC ECC 2 Register (sec_num = 5) 0x00000188 32 read-only 0x00000000 ECC BCH Redundancy 0 32 read-only ECC3_5 PMECC ECC 3 Register (sec_num = 5) 0x0000018C 32 read-only 0x00000000 ECC BCH Redundancy 0 32 read-only ECC4_5 PMECC ECC 4 Register (sec_num = 5) 0x00000190 32 read-only 0x00000000 ECC BCH Redundancy 0 32 read-only ECC5_5 PMECC ECC 5 Register (sec_num = 5) 0x00000194 32 read-only 0x00000000 ECC BCH Redundancy 0 32 read-only ECC6_5 PMECC ECC 6 Register (sec_num = 5) 0x00000198 32 read-only 0x00000000 ECC BCH Redundancy 0 32 read-only ECC7_5 PMECC ECC 7 Register (sec_num = 5) 0x0000019C 32 read-only 0x00000000 ECC BCH Redundancy 0 32 read-only ECC8_5 PMECC ECC 8 Register (sec_num = 5) 0x000001A0 32 read-only 0x00000000 ECC BCH Redundancy 0 32 read-only ECC9_5 PMECC ECC 9 Register (sec_num = 5) 0x000001A4 32 read-only 0x00000000 ECC BCH Redundancy 0 32 read-only ECC10_5 PMECC ECC 10 Register (sec_num = 5) 0x000001A8 32 read-only 0x00000000 ECC BCH Redundancy 0 32 read-only ECC0_6 PMECC ECC 0 Register (sec_num = 6) 0x000001C0 32 read-only 0x00000000 ECC BCH Redundancy 0 32 read-only ECC1_6 PMECC ECC 1 Register (sec_num = 6) 0x000001C4 32 read-only 0x00000000 ECC BCH Redundancy 0 32 read-only ECC2_6 PMECC ECC 2 Register (sec_num = 6) 0x000001C8 32 read-only 0x00000000 ECC BCH Redundancy 0 32 read-only ECC3_6 PMECC ECC 3 Register (sec_num = 6) 0x000001CC 32 read-only 0x00000000 ECC BCH Redundancy 0 32 read-only ECC4_6 PMECC ECC 4 Register (sec_num = 6) 0x000001D0 32 read-only 0x00000000 ECC BCH Redundancy 0 32 read-only ECC5_6 PMECC ECC 5 Register (sec_num = 6) 0x000001D4 32 read-only 0x00000000 ECC BCH Redundancy 0 32 read-only ECC6_6 PMECC ECC 6 Register (sec_num = 6) 0x000001D8 32 read-only 0x00000000 ECC BCH Redundancy 0 32 read-only ECC7_6 PMECC ECC 7 Register (sec_num = 6) 0x000001DC 32 read-only 0x00000000 ECC BCH Redundancy 0 32 read-only ECC8_6 PMECC ECC 8 Register (sec_num = 6) 0x000001E0 32 read-only 0x00000000 ECC BCH Redundancy 0 32 read-only ECC9_6 PMECC ECC 9 Register (sec_num = 6) 0x000001E4 32 read-only 0x00000000 ECC BCH Redundancy 0 32 read-only ECC10_6 PMECC ECC 10 Register (sec_num = 6) 0x000001E8 32 read-only 0x00000000 ECC BCH Redundancy 0 32 read-only ECC0_7 PMECC ECC 0 Register (sec_num = 7) 0x00000200 32 read-only 0x00000000 ECC BCH Redundancy 0 32 read-only ECC1_7 PMECC ECC 1 Register (sec_num = 7) 0x00000204 32 read-only 0x00000000 ECC BCH Redundancy 0 32 read-only ECC2_7 PMECC ECC 2 Register (sec_num = 7) 0x00000208 32 read-only 0x00000000 ECC BCH Redundancy 0 32 read-only ECC3_7 PMECC ECC 3 Register (sec_num = 7) 0x0000020C 32 read-only 0x00000000 ECC BCH Redundancy 0 32 read-only ECC4_7 PMECC ECC 4 Register (sec_num = 7) 0x00000210 32 read-only 0x00000000 ECC BCH Redundancy 0 32 read-only ECC5_7 PMECC ECC 5 Register (sec_num = 7) 0x00000214 32 read-only 0x00000000 ECC BCH Redundancy 0 32 read-only ECC6_7 PMECC ECC 6 Register (sec_num = 7) 0x00000218 32 read-only 0x00000000 ECC BCH Redundancy 0 32 read-only ECC7_7 PMECC ECC 7 Register (sec_num = 7) 0x0000021C 32 read-only 0x00000000 ECC BCH Redundancy 0 32 read-only ECC8_7 PMECC ECC 8 Register (sec_num = 7) 0x00000220 32 read-only 0x00000000 ECC BCH Redundancy 0 32 read-only ECC9_7 PMECC ECC 9 Register (sec_num = 7) 0x00000224 32 read-only 0x00000000 ECC BCH Redundancy 0 32 read-only ECC10_7 PMECC ECC 10 Register (sec_num = 7) 0x00000228 32 read-only 0x00000000 ECC BCH Redundancy 0 32 read-only REM0_0 PMECC REM 0 Register (sec_num = 0) 0x00000240 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM1_0 PMECC REM 1 Register (sec_num = 0) 0x00000244 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM2_0 PMECC REM 2 Register (sec_num = 0) 0x00000248 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM3_0 PMECC REM 3 Register (sec_num = 0) 0x0000024C 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM4_0 PMECC REM 4 Register (sec_num = 0) 0x00000250 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM5_0 PMECC REM 5 Register (sec_num = 0) 0x00000254 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM6_0 PMECC REM 6 Register (sec_num = 0) 0x00000258 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM7_0 PMECC REM 7 Register (sec_num = 0) 0x0000025C 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM8_0 PMECC REM 8 Register (sec_num = 0) 0x00000260 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM9_0 PMECC REM 9 Register (sec_num = 0) 0x00000264 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM10_0 PMECC REM 10 Register (sec_num = 0) 0x00000268 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM11_0 PMECC REM 11 Register (sec_num = 0) 0x0000026C 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM0_1 PMECC REM 0 Register (sec_num = 1) 0x00000280 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM1_1 PMECC REM 1 Register (sec_num = 1) 0x00000284 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM2_1 PMECC REM 2 Register (sec_num = 1) 0x00000288 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM3_1 PMECC REM 3 Register (sec_num = 1) 0x0000028C 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM4_1 PMECC REM 4 Register (sec_num = 1) 0x00000290 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM5_1 PMECC REM 5 Register (sec_num = 1) 0x00000294 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM6_1 PMECC REM 6 Register (sec_num = 1) 0x00000298 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM7_1 PMECC REM 7 Register (sec_num = 1) 0x0000029C 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM8_1 PMECC REM 8 Register (sec_num = 1) 0x000002A0 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM9_1 PMECC REM 9 Register (sec_num = 1) 0x000002A4 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM10_1 PMECC REM 10 Register (sec_num = 1) 0x000002A8 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM11_1 PMECC REM 11 Register (sec_num = 1) 0x000002AC 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM0_2 PMECC REM 0 Register (sec_num = 2) 0x000002C0 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM1_2 PMECC REM 1 Register (sec_num = 2) 0x000002C4 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM2_2 PMECC REM 2 Register (sec_num = 2) 0x000002C8 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM3_2 PMECC REM 3 Register (sec_num = 2) 0x000002CC 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM4_2 PMECC REM 4 Register (sec_num = 2) 0x000002D0 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM5_2 PMECC REM 5 Register (sec_num = 2) 0x000002D4 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM6_2 PMECC REM 6 Register (sec_num = 2) 0x000002D8 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM7_2 PMECC REM 7 Register (sec_num = 2) 0x000002DC 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM8_2 PMECC REM 8 Register (sec_num = 2) 0x000002E0 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM9_2 PMECC REM 9 Register (sec_num = 2) 0x000002E4 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM10_2 PMECC REM 10 Register (sec_num = 2) 0x000002E8 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM11_2 PMECC REM 11 Register (sec_num = 2) 0x000002EC 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM0_3 PMECC REM 0 Register (sec_num = 3) 0x00000300 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM1_3 PMECC REM 1 Register (sec_num = 3) 0x00000304 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM2_3 PMECC REM 2 Register (sec_num = 3) 0x00000308 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM3_3 PMECC REM 3 Register (sec_num = 3) 0x0000030C 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM4_3 PMECC REM 4 Register (sec_num = 3) 0x00000310 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM5_3 PMECC REM 5 Register (sec_num = 3) 0x00000314 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM6_3 PMECC REM 6 Register (sec_num = 3) 0x00000318 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM7_3 PMECC REM 7 Register (sec_num = 3) 0x0000031C 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM8_3 PMECC REM 8 Register (sec_num = 3) 0x00000320 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM9_3 PMECC REM 9 Register (sec_num = 3) 0x00000324 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM10_3 PMECC REM 10 Register (sec_num = 3) 0x00000328 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM11_3 PMECC REM 11 Register (sec_num = 3) 0x0000032C 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM0_4 PMECC REM 0 Register (sec_num = 4) 0x00000340 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM1_4 PMECC REM 1 Register (sec_num = 4) 0x00000344 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM2_4 PMECC REM 2 Register (sec_num = 4) 0x00000348 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM3_4 PMECC REM 3 Register (sec_num = 4) 0x0000034C 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM4_4 PMECC REM 4 Register (sec_num = 4) 0x00000350 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM5_4 PMECC REM 5 Register (sec_num = 4) 0x00000354 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM6_4 PMECC REM 6 Register (sec_num = 4) 0x00000358 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM7_4 PMECC REM 7 Register (sec_num = 4) 0x0000035C 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM8_4 PMECC REM 8 Register (sec_num = 4) 0x00000360 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM9_4 PMECC REM 9 Register (sec_num = 4) 0x00000364 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM10_4 PMECC REM 10 Register (sec_num = 4) 0x00000368 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM11_4 PMECC REM 11 Register (sec_num = 4) 0x0000036C 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM0_5 PMECC REM 0 Register (sec_num = 5) 0x00000380 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM1_5 PMECC REM 1 Register (sec_num = 5) 0x00000384 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM2_5 PMECC REM 2 Register (sec_num = 5) 0x00000388 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM3_5 PMECC REM 3 Register (sec_num = 5) 0x0000038C 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM4_5 PMECC REM 4 Register (sec_num = 5) 0x00000390 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM5_5 PMECC REM 5 Register (sec_num = 5) 0x00000394 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM6_5 PMECC REM 6 Register (sec_num = 5) 0x00000398 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM7_5 PMECC REM 7 Register (sec_num = 5) 0x0000039C 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM8_5 PMECC REM 8 Register (sec_num = 5) 0x000003A0 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM9_5 PMECC REM 9 Register (sec_num = 5) 0x000003A4 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM10_5 PMECC REM 10 Register (sec_num = 5) 0x000003A8 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM11_5 PMECC REM 11 Register (sec_num = 5) 0x000003AC 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM0_6 PMECC REM 0 Register (sec_num = 6) 0x000003C0 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM1_6 PMECC REM 1 Register (sec_num = 6) 0x000003C4 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM2_6 PMECC REM 2 Register (sec_num = 6) 0x000003C8 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM3_6 PMECC REM 3 Register (sec_num = 6) 0x000003CC 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM4_6 PMECC REM 4 Register (sec_num = 6) 0x000003D0 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM5_6 PMECC REM 5 Register (sec_num = 6) 0x000003D4 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM6_6 PMECC REM 6 Register (sec_num = 6) 0x000003D8 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM7_6 PMECC REM 7 Register (sec_num = 6) 0x000003DC 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM8_6 PMECC REM 8 Register (sec_num = 6) 0x000003E0 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM9_6 PMECC REM 9 Register (sec_num = 6) 0x000003E4 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM10_6 PMECC REM 10 Register (sec_num = 6) 0x000003E8 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM11_6 PMECC REM 11 Register (sec_num = 6) 0x000003EC 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM0_7 PMECC REM 0 Register (sec_num = 7) 0x00000400 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM1_7 PMECC REM 1 Register (sec_num = 7) 0x00000404 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM2_7 PMECC REM 2 Register (sec_num = 7) 0x00000408 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM3_7 PMECC REM 3 Register (sec_num = 7) 0x0000040C 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM4_7 PMECC REM 4 Register (sec_num = 7) 0x00000410 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM5_7 PMECC REM 5 Register (sec_num = 7) 0x00000414 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM6_7 PMECC REM 6 Register (sec_num = 7) 0x00000418 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM7_7 PMECC REM 7 Register (sec_num = 7) 0x0000041C 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM8_7 PMECC REM 8 Register (sec_num = 7) 0x00000420 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM9_7 PMECC REM 9 Register (sec_num = 7) 0x00000424 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM10_7 PMECC REM 10 Register (sec_num = 7) 0x00000428 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only REM11_7 PMECC REM 11 Register (sec_num = 7) 0x0000042C 32 read-only 0x00000000 REM2NP1 BCH Remainder 2 * N + 1 0 14 read-only REM2NP3 BCH Remainder 2 * N + 3 16 14 read-only PMERRLOC 11039D Programmable Multibit ECC Error Location EBI PMERRLOC_ 0xFFFFE600 0 0x200 registers ELCFG Error Location Configuration Register 0x00000000 32 read-write 0x00000000 SECTORSZ Sector Size 0 1 read-write ERRNUM Number of Errors 16 5 read-write ELPRIM Error Location Primitive Register 0x00000004 32 read-only 0x00000000 PRIMITIV Primitive Polynomial 0 16 read-only ELEN Error Location Enable Register 0x00000008 32 read-write 0x00000000 ENINIT Initial Number of Bits in the Codeword 0 14 read-write ELDIS Error Location Disable Register 0x0000000C 32 read-write 0x00000000 DIS Disable Error Location Engine 0 1 read-write ELSR Error Location Status Register 0x00000010 32 read-write 0x00000000 BUSY Error Location Engine Busy 0 1 read-write ELIER Error Location Interrupt Enable register 0x00000014 32 read-only 0x00000000 DONE Computation Terminated Interrupt Enable 0 1 read-only ELIDR Error Location Interrupt Disable Register 0x00000018 32 read-only 0x00000000 DONE Computation Terminated Interrupt Disable 0 1 read-only ELIMR Error Location Interrupt Mask Register 0x0000001C 32 read-only 0x00000000 DONE Computation Terminated Interrupt Mask 0 1 read-only ELISR Error Location Interrupt Status Register 0x00000020 32 read-only 0x00000000 DONE Computation Terminated Interrupt Status 0 1 read-only ERR_CNT Error Counter value 8 5 read-only 25 4 0-24 SIGMA[%s] PMECC SIGMA 0 Register 0x00000028 32 read-write SIGMAN 0 14 read-write 24 4 0-23 EL[%s] PMECC Error Location 0 Register 0x0000008C 32 read-only ERRLOCN Error Position within the set {sector area, spare area}. 0 14 read-only DDRSDRC 6304S DDR_SDR SDRAM Controller EBI DDRSDRC_ 0xFFFFE800 0 0x200 registers MR DDRSDRC Mode Register 0x00000000 32 read-write 0x00000000 MODE DDRSDRC Command Mode 0 3 read-write RTR DDRSDRC Refresh Timer Register 0x00000004 32 read-write 0x00000000 COUNT DDRSDRC Refresh Timer Count 0 12 read-write CR DDRSDRC Configuration Register 0x00000008 32 read-write 0x00007024 NC Number of Column Bits 0 2 read-write NR Number of Row Bits 2 2 read-write CAS CAS Latency 4 3 read-write DLL Reset DLL 7 1 read-write DIC Output Driver Impedance Control 8 1 read-write DIS_DLL Disable DLL 9 1 read-write OCD Off-chip Driver 12 3 read-write EBISHARE External Bus Interface is Shared 16 1 read-write ACTBST ACTIVE Bank X to Burst Stop Read Access Bank Y 18 1 read-write NB Number of Banks 20 1 read-write DECOD Type of Decoding 22 1 read-write TPR0 DDRSDRC Timing Parameter 0 Register 0x0000000C 32 read-write 0x20227225 TRAS Active to Precharge Delay 0 4 read-write TRCD Row to Column Delay 4 4 read-write TWR Write Recovery Delay 8 4 read-write TRC Row Cycle Delay 12 4 read-write TRP Row Precharge Delay 16 4 read-write TRRD Active bankA to Active bankB 20 4 read-write TWTR Internal Write to Read Delay 24 3 read-write REDUCE_WRRD Reduce Write to Read Delay 27 1 read-write TMRD Load Mode Register Command to Active or Refresh Command 28 4 read-write TPR1 DDRSDRC Timing Parameter 1 Register 0x00000010 32 read-write 0x03C80808 TRFC Row Cycle Delay 0 5 read-write TXSNR Exit Self Refresh Delay to Non-read Command 8 8 read-write TXSRD ExiT Self Refresh Delay to Read Command 16 8 read-write TXP Exit Power-down Delay to First Command 24 4 read-write TPR2 DDRSDRC Timing Parameter 2 Register 0x00000014 32 read-write 0x00002062 TXARD Exit Active Power Down Delay to Read Command in Mode "Fast Exit". 0 4 read-write TXARDS Exit Active Power Down Delay to Read Command in Mode "Slow Exit". 4 4 read-write TRPA Row Precharge All Delay 8 4 read-write TRTP Read to Precharge 12 3 read-write TFAW Four Active window 16 4 read-write LPR DDRSDRC Low-power Register 0x0000001C 32 read-write 0x00010000 LPCB Low-power Command Bit 0 2 read-write CLK_FR Clock Frozen Command Bit 2 1 read-write PASR Partial Array Self Refresh 4 3 read-write DS Drive Strength 8 3 read-write TIMEOUT Low Power Mode 12 2 read-write APDE Active Power Down Exit Time 16 1 read-write UPD_MR Update Load Mode Register and Extended Mode Register 20 2 read-write MD DDRSDRC Memory Device Register 0x00000020 32 read-write 0x00000010 MD Memory Device 0 3 read-write DBW Data Bus Width 4 1 read-write DLL DDRSDRC DLL Information Register 0x00000024 32 read-only 0x00000001 MDINC DLL Master Delay Increment 0 1 read-only MDDEC DLL Master Delay Decrement 1 1 read-only MDOVF DLL Master Delay Overflow Flag 2 1 read-only MDVAL DLL Master Delay Value 8 8 read-only HS DDRSDRC High Speed Register 0x0000002C 32 read-write 0x00000000 DIS_ANTICIP_READ Anticip Read Access 2 1 read-write WPMR DDRSDRC Write Protect Mode Register 0x000000E4 32 read-write 0x00000000 WPEN Write Protect Enable 0 1 read-write WPKEY Write Protect KEY 8 24 read-write WPSR DDRSDRC Write Protect Status Register 0x000000E8 32 read-only 0x00000000 WPVS Write Protect Violation Status 0 1 read-only WPVSRC Write Protect Violation Source 8 16 read-only SMC 6105I Static Memory Controller EBI SMC_ 0xFFFFEA00 0 0x200 registers SETUP0 SMC Setup Register (CS_number = 0) 0x00000000 32 read-write 0x00000000 NWE_SETUP NWE Setup Length 0 6 read-write NCS_WR_SETUP NCS Setup Length in WRITE Access 8 6 read-write NRD_SETUP NRD Setup Length 16 6 read-write NCS_RD_SETUP NCS Setup Length in READ Access 24 6 read-write PULSE0 SMC Pulse Register (CS_number = 0) 0x00000004 32 read-write 0x01010101 NWE_PULSE NWE Pulse Length 0 7 read-write NCS_WR_PULSE NCS Pulse Length in WRITE Access 8 7 read-write NRD_PULSE NRD Pulse Length 16 7 read-write NCS_RD_PULSE NCS Pulse Length in READ Access 24 7 read-write CYCLE0 SMC Cycle Register (CS_number = 0) 0x00000008 32 read-write 0x00030003 NWE_CYCLE Total Write Cycle Length 0 9 read-write NRD_CYCLE Total Read Cycle Length 16 9 read-write MODE0 SMC Mode Register (CS_number = 0) 0x0000000C 32 read-write 0x10001000 READ_MODE 0 1 read-write WRITE_MODE 1 1 read-write EXNW_MODE NWAIT Mode 4 2 read-write BAT Byte Access Type 8 1 read-write DBW Data Bus Width 12 2 read-write TDF_CYCLES Data Float Time 16 4 read-write TDF_MODE TDF Optimization 20 1 read-write PMEN Page Mode Enabled 24 1 read-write PS Page Size 28 2 read-write SETUP1 SMC Setup Register (CS_number = 1) 0x00000010 32 read-write 0x00000000 NWE_SETUP NWE Setup Length 0 6 read-write NCS_WR_SETUP NCS Setup Length in WRITE Access 8 6 read-write NRD_SETUP NRD Setup Length 16 6 read-write NCS_RD_SETUP NCS Setup Length in READ Access 24 6 read-write PULSE1 SMC Pulse Register (CS_number = 1) 0x00000014 32 read-write 0x01010101 NWE_PULSE NWE Pulse Length 0 7 read-write NCS_WR_PULSE NCS Pulse Length in WRITE Access 8 7 read-write NRD_PULSE NRD Pulse Length 16 7 read-write NCS_RD_PULSE NCS Pulse Length in READ Access 24 7 read-write CYCLE1 SMC Cycle Register (CS_number = 1) 0x00000018 32 read-write 0x00030003 NWE_CYCLE Total Write Cycle Length 0 9 read-write NRD_CYCLE Total Read Cycle Length 16 9 read-write MODE1 SMC Mode Register (CS_number = 1) 0x0000001C 32 read-write 0x10001000 READ_MODE 0 1 read-write WRITE_MODE 1 1 read-write EXNW_MODE NWAIT Mode 4 2 read-write BAT Byte Access Type 8 1 read-write DBW Data Bus Width 12 2 read-write TDF_CYCLES Data Float Time 16 4 read-write TDF_MODE TDF Optimization 20 1 read-write PMEN Page Mode Enabled 24 1 read-write PS Page Size 28 2 read-write SETUP2 SMC Setup Register (CS_number = 2) 0x00000020 32 read-write 0x00000000 NWE_SETUP NWE Setup Length 0 6 read-write NCS_WR_SETUP NCS Setup Length in WRITE Access 8 6 read-write NRD_SETUP NRD Setup Length 16 6 read-write NCS_RD_SETUP NCS Setup Length in READ Access 24 6 read-write PULSE2 SMC Pulse Register (CS_number = 2) 0x00000024 32 read-write 0x01010101 NWE_PULSE NWE Pulse Length 0 7 read-write NCS_WR_PULSE NCS Pulse Length in WRITE Access 8 7 read-write NRD_PULSE NRD Pulse Length 16 7 read-write NCS_RD_PULSE NCS Pulse Length in READ Access 24 7 read-write CYCLE2 SMC Cycle Register (CS_number = 2) 0x00000028 32 read-write 0x00030003 NWE_CYCLE Total Write Cycle Length 0 9 read-write NRD_CYCLE Total Read Cycle Length 16 9 read-write MODE2 SMC Mode Register (CS_number = 2) 0x0000002C 32 read-write 0x10001000 READ_MODE 0 1 read-write WRITE_MODE 1 1 read-write EXNW_MODE NWAIT Mode 4 2 read-write BAT Byte Access Type 8 1 read-write DBW Data Bus Width 12 2 read-write TDF_CYCLES Data Float Time 16 4 read-write TDF_MODE TDF Optimization 20 1 read-write PMEN Page Mode Enabled 24 1 read-write PS Page Size 28 2 read-write SETUP3 SMC Setup Register (CS_number = 3) 0x00000030 32 read-write 0x00000000 NWE_SETUP NWE Setup Length 0 6 read-write NCS_WR_SETUP NCS Setup Length in WRITE Access 8 6 read-write NRD_SETUP NRD Setup Length 16 6 read-write NCS_RD_SETUP NCS Setup Length in READ Access 24 6 read-write PULSE3 SMC Pulse Register (CS_number = 3) 0x00000034 32 read-write 0x01010101 NWE_PULSE NWE Pulse Length 0 7 read-write NCS_WR_PULSE NCS Pulse Length in WRITE Access 8 7 read-write NRD_PULSE NRD Pulse Length 16 7 read-write NCS_RD_PULSE NCS Pulse Length in READ Access 24 7 read-write CYCLE3 SMC Cycle Register (CS_number = 3) 0x00000038 32 read-write 0x00030003 NWE_CYCLE Total Write Cycle Length 0 9 read-write NRD_CYCLE Total Read Cycle Length 16 9 read-write MODE3 SMC Mode Register (CS_number = 3) 0x0000003C 32 read-write 0x10001000 READ_MODE 0 1 read-write WRITE_MODE 1 1 read-write EXNW_MODE NWAIT Mode 4 2 read-write BAT Byte Access Type 8 1 read-write DBW Data Bus Width 12 2 read-write TDF_CYCLES Data Float Time 16 4 read-write TDF_MODE TDF Optimization 20 1 read-write PMEN Page Mode Enabled 24 1 read-write PS Page Size 28 2 read-write SETUP4 SMC Setup Register (CS_number = 4) 0x00000040 32 read-write 0x00000000 NWE_SETUP NWE Setup Length 0 6 read-write NCS_WR_SETUP NCS Setup Length in WRITE Access 8 6 read-write NRD_SETUP NRD Setup Length 16 6 read-write NCS_RD_SETUP NCS Setup Length in READ Access 24 6 read-write PULSE4 SMC Pulse Register (CS_number = 4) 0x00000044 32 read-write 0x01010101 NWE_PULSE NWE Pulse Length 0 7 read-write NCS_WR_PULSE NCS Pulse Length in WRITE Access 8 7 read-write NRD_PULSE NRD Pulse Length 16 7 read-write NCS_RD_PULSE NCS Pulse Length in READ Access 24 7 read-write CYCLE4 SMC Cycle Register (CS_number = 4) 0x00000048 32 read-write 0x00030003 NWE_CYCLE Total Write Cycle Length 0 9 read-write NRD_CYCLE Total Read Cycle Length 16 9 read-write MODE4 SMC Mode Register (CS_number = 4) 0x0000004C 32 read-write 0x10001000 READ_MODE 0 1 read-write WRITE_MODE 1 1 read-write EXNW_MODE NWAIT Mode 4 2 read-write BAT Byte Access Type 8 1 read-write DBW Data Bus Width 12 2 read-write TDF_CYCLES Data Float Time 16 4 read-write TDF_MODE TDF Optimization 20 1 read-write PMEN Page Mode Enabled 24 1 read-write PS Page Size 28 2 read-write SETUP5 SMC Setup Register (CS_number = 5) 0x00000050 32 read-write 0x00000000 NWE_SETUP NWE Setup Length 0 6 read-write NCS_WR_SETUP NCS Setup Length in WRITE Access 8 6 read-write NRD_SETUP NRD Setup Length 16 6 read-write NCS_RD_SETUP NCS Setup Length in READ Access 24 6 read-write PULSE5 SMC Pulse Register (CS_number = 5) 0x00000054 32 read-write 0x01010101 NWE_PULSE NWE Pulse Length 0 7 read-write NCS_WR_PULSE NCS Pulse Length in WRITE Access 8 7 read-write NRD_PULSE NRD Pulse Length 16 7 read-write NCS_RD_PULSE NCS Pulse Length in READ Access 24 7 read-write CYCLE5 SMC Cycle Register (CS_number = 5) 0x00000058 32 read-write 0x00030003 NWE_CYCLE Total Write Cycle Length 0 9 read-write NRD_CYCLE Total Read Cycle Length 16 9 read-write MODE5 SMC Mode Register (CS_number = 5) 0x0000005C 32 read-write 0x10001000 READ_MODE 0 1 read-write WRITE_MODE 1 1 read-write EXNW_MODE NWAIT Mode 4 2 read-write BAT Byte Access Type 8 1 read-write DBW Data Bus Width 12 2 read-write TDF_CYCLES Data Float Time 16 4 read-write TDF_MODE TDF Optimization 20 1 read-write PMEN Page Mode Enabled 24 1 read-write PS Page Size 28 2 read-write DELAY1 SMC Delay on I/O 0x000000C0 32 read-write 0x00000000 Delay1 0 4 read-write Delay2 4 4 read-write Delay3 8 4 read-write Delay4 12 4 read-write Delay5 16 4 read-write Delay6 20 4 read-write Delay7 24 4 read-write Delay8 28 4 read-write DELAY2 SMC Delay on I/O 0x000000C4 32 read-write 0x00000000 DELAY3 SMC Delay on I/O 0x000000C8 32 read-write 0x00000000 DELAY4 SMC Delay on I/O 0x000000CC 32 read-write 0x00000000 DELAY5 SMC Delay on I/O 0x000000D0 32 read-write 0x00000000 DELAY6 SMC Delay on I/O 0x000000D4 32 read-write 0x00000000 DELAY7 SMC Delay on I/O 0x000000D8 32 read-write 0x00000000 DELAY8 SMC Delay on I/O 0x000000DC 32 read-write 0x00000000 WPMR SMC Write Protect Mode Register 0x000000E4 32 read-write 0x00000000 WPEN Write Protect Enable 0 1 read-write WPKEY Write Protect KEY 8 24 read-write WPSR SMC Write Protect Status Register 0x000000E8 32 read-only 0x00000000 WPVS Write Protect Enable 0 1 read-only WPVSRC Write Protect Violation Source 8 16 read-only DMAC 6233K DMA Controller DMAC_ 0xFFFFEC00 0 0x200 registers DMAC 20 GCFG DMAC Global Configuration Register 0x00000000 32 read-write 0x00000010 ARB_CFG Arbiter Configuration 4 1 read-write FIXED Fixed priority arbiter. 0 ROUND_ROBIN Modified round robin arbiter. 1 DICEN Descriptor Integrity Check 8 1 read-write EN DMAC Enable Register 0x00000004 32 read-write 0x00000000 ENABLE 0 1 read-write SREQ DMAC Software Single Request Register 0x00000008 32 read-write 0x00000000 SSREQ0 Source Request 0 1 read-write DSREQ0 Destination Request 1 1 read-write SSREQ1 Source Request 2 1 read-write DSREQ1 Destination Request 3 1 read-write SSREQ2 Source Request 4 1 read-write DSREQ2 Destination Request 5 1 read-write SSREQ3 Source Request 6 1 read-write DSREQ3 Destination Request 7 1 read-write SSREQ4 Source Request 8 1 read-write DSREQ4 Destination Request 9 1 read-write SSREQ5 Source Request 10 1 read-write DSREQ5 Destination Request 11 1 read-write SSREQ6 Source Request 12 1 read-write DSREQ6 Destination Request 13 1 read-write SSREQ7 Source Request 14 1 read-write DSREQ7 Destination Request 15 1 read-write CREQ DMAC Software Chunk Transfer Request Register 0x0000000C 32 read-write 0x00000000 SCREQ0 Source Chunk Request 0 1 read-write DCREQ0 Destination Chunk Request 1 1 read-write SCREQ1 Source Chunk Request 2 1 read-write DCREQ1 Destination Chunk Request 3 1 read-write SCREQ2 Source Chunk Request 4 1 read-write DCREQ2 Destination Chunk Request 5 1 read-write SCREQ3 Source Chunk Request 6 1 read-write DCREQ3 Destination Chunk Request 7 1 read-write SCREQ4 Source Chunk Request 8 1 read-write DCREQ4 Destination Chunk Request 9 1 read-write SCREQ5 Source Chunk Request 10 1 read-write DCREQ5 Destination Chunk Request 11 1 read-write SCREQ6 Source Chunk Request 12 1 read-write DCREQ6 Destination Chunk Request 13 1 read-write SCREQ7 Source Chunk Request 14 1 read-write DCREQ7 Destination Chunk Request 15 1 read-write LAST DMAC Software Last Transfer Flag Register 0x00000010 32 read-write 0x00000000 SLAST0 Source Last 0 1 read-write DLAST0 Destination Last 1 1 read-write SLAST1 Source Last 2 1 read-write DLAST1 Destination Last 3 1 read-write SLAST2 Source Last 4 1 read-write DLAST2 Destination Last 5 1 read-write SLAST3 Source Last 6 1 read-write DLAST3 Destination Last 7 1 read-write SLAST4 Source Last 8 1 read-write DLAST4 Destination Last 9 1 read-write SLAST5 Source Last 10 1 read-write DLAST5 Destination Last 11 1 read-write SLAST6 Source Last 12 1 read-write DLAST6 Destination Last 13 1 read-write SLAST7 Source Last 14 1 read-write DLAST7 Destination Last 15 1 read-write EBCIER DMAC Error, Chained Buffer Transfer Completed Interrupt and Buffer Transfer Completed Interrupt Enable register. 0x00000018 32 write-only BTC0 Buffer Transfer Completed [7:0] 0 1 write-only BTC1 Buffer Transfer Completed [7:0] 1 1 write-only BTC2 Buffer Transfer Completed [7:0] 2 1 write-only BTC3 Buffer Transfer Completed [7:0] 3 1 write-only BTC4 Buffer Transfer Completed [7:0] 4 1 write-only BTC5 Buffer Transfer Completed [7:0] 5 1 write-only BTC6 Buffer Transfer Completed [7:0] 6 1 write-only BTC7 Buffer Transfer Completed [7:0] 7 1 write-only CBTC0 Chained Buffer Transfer Completed [7:0] 8 1 write-only CBTC1 Chained Buffer Transfer Completed [7:0] 9 1 write-only CBTC2 Chained Buffer Transfer Completed [7:0] 10 1 write-only CBTC3 Chained Buffer Transfer Completed [7:0] 11 1 write-only CBTC4 Chained Buffer Transfer Completed [7:0] 12 1 write-only CBTC5 Chained Buffer Transfer Completed [7:0] 13 1 write-only CBTC6 Chained Buffer Transfer Completed [7:0] 14 1 write-only CBTC7 Chained Buffer Transfer Completed [7:0] 15 1 write-only ERR0 Access Error [7:0] 16 1 write-only ERR1 Access Error [7:0] 17 1 write-only ERR2 Access Error [7:0] 18 1 write-only ERR3 Access Error [7:0] 19 1 write-only ERR4 Access Error [7:0] 20 1 write-only ERR5 Access Error [7:0] 21 1 write-only ERR6 Access Error [7:0] 22 1 write-only ERR7 Access Error [7:0] 23 1 write-only DICERR0 Descriptor Integrity Check Error [7:0] 24 1 write-only DICERR1 Descriptor Integrity Check Error [7:0] 25 1 write-only DICERR2 Descriptor Integrity Check Error [7:0] 26 1 write-only DICERR3 Descriptor Integrity Check Error [7:0] 27 1 write-only DICERR4 Descriptor Integrity Check Error [7:0] 28 1 write-only DICERR5 Descriptor Integrity Check Error [7:0] 29 1 write-only DICERR6 Descriptor Integrity Check Error [7:0] 30 1 write-only DICERR7 Descriptor Integrity Check Error [7:0] 31 1 write-only EBCIDR DMAC Error, Chained Buffer Transfer Completed Interrupt and Buffer Transfer Completed Interrupt Disable register. 0x0000001C 32 write-only BTC0 Buffer Transfer Completed [7:0] 0 1 write-only BTC1 Buffer Transfer Completed [7:0] 1 1 write-only BTC2 Buffer Transfer Completed [7:0] 2 1 write-only BTC3 Buffer Transfer Completed [7:0] 3 1 write-only BTC4 Buffer Transfer Completed [7:0] 4 1 write-only BTC5 Buffer Transfer Completed [7:0] 5 1 write-only BTC6 Buffer Transfer Completed [7:0] 6 1 write-only BTC7 Buffer Transfer Completed [7:0] 7 1 write-only CBTC0 Chained Buffer Transfer Completed [7:0] 8 1 write-only CBTC1 Chained Buffer Transfer Completed [7:0] 9 1 write-only CBTC2 Chained Buffer Transfer Completed [7:0] 10 1 write-only CBTC3 Chained Buffer Transfer Completed [7:0] 11 1 write-only CBTC4 Chained Buffer Transfer Completed [7:0] 12 1 write-only CBTC5 Chained Buffer Transfer Completed [7:0] 13 1 write-only CBTC6 Chained Buffer Transfer Completed [7:0] 14 1 write-only CBTC7 Chained Buffer Transfer Completed [7:0] 15 1 write-only ERR0 Access Error [7:0] 16 1 write-only ERR1 Access Error [7:0] 17 1 write-only ERR2 Access Error [7:0] 18 1 write-only ERR3 Access Error [7:0] 19 1 write-only ERR4 Access Error [7:0] 20 1 write-only ERR5 Access Error [7:0] 21 1 write-only ERR6 Access Error [7:0] 22 1 write-only ERR7 Access Error [7:0] 23 1 write-only DICERR0 Descriptor Integrity Check Error [7:0] 24 1 write-only DICERR1 Descriptor Integrity Check Error [7:0] 25 1 write-only DICERR2 Descriptor Integrity Check Error [7:0] 26 1 write-only DICERR3 Descriptor Integrity Check Error [7:0] 27 1 write-only DICERR4 Descriptor Integrity Check Error [7:0] 28 1 write-only DICERR5 Descriptor Integrity Check Error [7:0] 29 1 write-only DICERR6 Descriptor Integrity Check Error [7:0] 30 1 write-only DICERR7 Descriptor Integrity Check Error [7:0] 31 1 write-only EBCIMR DMAC Error, Chained Buffer Transfer Completed Interrupt and Buffer transfer completed Mask Register. 0x00000020 32 read-only 0x00000000 BTC0 Buffer Transfer Completed [7:0] 0 1 read-only BTC1 Buffer Transfer Completed [7:0] 1 1 read-only BTC2 Buffer Transfer Completed [7:0] 2 1 read-only BTC3 Buffer Transfer Completed [7:0] 3 1 read-only BTC4 Buffer Transfer Completed [7:0] 4 1 read-only BTC5 Buffer Transfer Completed [7:0] 5 1 read-only BTC6 Buffer Transfer Completed [7:0] 6 1 read-only BTC7 Buffer Transfer Completed [7:0] 7 1 read-only CBTC0 Chained Buffer Transfer Completed [7:0] 8 1 read-only CBTC1 Chained Buffer Transfer Completed [7:0] 9 1 read-only CBTC2 Chained Buffer Transfer Completed [7:0] 10 1 read-only CBTC3 Chained Buffer Transfer Completed [7:0] 11 1 read-only CBTC4 Chained Buffer Transfer Completed [7:0] 12 1 read-only CBTC5 Chained Buffer Transfer Completed [7:0] 13 1 read-only CBTC6 Chained Buffer Transfer Completed [7:0] 14 1 read-only CBTC7 Chained Buffer Transfer Completed [7:0] 15 1 read-only ERR0 Access Error [7:0] 16 1 read-only ERR1 Access Error [7:0] 17 1 read-only ERR2 Access Error [7:0] 18 1 read-only ERR3 Access Error [7:0] 19 1 read-only ERR4 Access Error [7:0] 20 1 read-only ERR5 Access Error [7:0] 21 1 read-only ERR6 Access Error [7:0] 22 1 read-only ERR7 Access Error [7:0] 23 1 read-only DICERR0 Descriptor Integrity Check Error [7:0] 24 1 read-only DICERR1 Descriptor Integrity Check Error [7:0] 25 1 read-only DICERR2 Descriptor Integrity Check Error [7:0] 26 1 read-only DICERR3 Descriptor Integrity Check Error [7:0] 27 1 read-only DICERR4 Descriptor Integrity Check Error [7:0] 28 1 read-only DICERR5 Descriptor Integrity Check Error [7:0] 29 1 read-only DICERR6 Descriptor Integrity Check Error [7:0] 30 1 read-only DICERR7 Descriptor Integrity Check Error [7:0] 31 1 read-only EBCISR DMAC Error, Chained Buffer Transfer Completed Interrupt and Buffer transfer completed Status Register. 0x00000024 32 read-only 0x00000000 BTC0 Buffer Transfer Completed [7:0] 0 1 read-only BTC1 Buffer Transfer Completed [7:0] 1 1 read-only BTC2 Buffer Transfer Completed [7:0] 2 1 read-only BTC3 Buffer Transfer Completed [7:0] 3 1 read-only BTC4 Buffer Transfer Completed [7:0] 4 1 read-only BTC5 Buffer Transfer Completed [7:0] 5 1 read-only BTC6 Buffer Transfer Completed [7:0] 6 1 read-only BTC7 Buffer Transfer Completed [7:0] 7 1 read-only CBTC0 Chained Buffer Transfer Completed [7:0] 8 1 read-only CBTC1 Chained Buffer Transfer Completed [7:0] 9 1 read-only CBTC2 Chained Buffer Transfer Completed [7:0] 10 1 read-only CBTC3 Chained Buffer Transfer Completed [7:0] 11 1 read-only CBTC4 Chained Buffer Transfer Completed [7:0] 12 1 read-only CBTC5 Chained Buffer Transfer Completed [7:0] 13 1 read-only CBTC6 Chained Buffer Transfer Completed [7:0] 14 1 read-only CBTC7 Chained Buffer Transfer Completed [7:0] 15 1 read-only ERR0 Access Error [7:0] 16 1 read-only ERR1 Access Error [7:0] 17 1 read-only ERR2 Access Error [7:0] 18 1 read-only ERR3 Access Error [7:0] 19 1 read-only ERR4 Access Error [7:0] 20 1 read-only ERR5 Access Error [7:0] 21 1 read-only ERR6 Access Error [7:0] 22 1 read-only ERR7 Access Error [7:0] 23 1 read-only DICERR0 Descriptor Integrity Check Error [7:0] 24 1 read-only DICERR1 Descriptor Integrity Check Error [7:0] 25 1 read-only DICERR2 Descriptor Integrity Check Error [7:0] 26 1 read-only DICERR3 Descriptor Integrity Check Error [7:0] 27 1 read-only DICERR4 Descriptor Integrity Check Error [7:0] 28 1 read-only DICERR5 Descriptor Integrity Check Error [7:0] 29 1 read-only DICERR6 Descriptor Integrity Check Error [7:0] 30 1 read-only DICERR7 Descriptor Integrity Check Error [7:0] 31 1 read-only CHER DMAC Channel Handler Enable Register 0x00000028 32 write-only ENA0 Enable [7:0] 0 1 write-only ENA1 Enable [7:0] 1 1 write-only ENA2 Enable [7:0] 2 1 write-only ENA3 Enable [7:0] 3 1 write-only ENA4 Enable [7:0] 4 1 write-only ENA5 Enable [7:0] 5 1 write-only ENA6 Enable [7:0] 6 1 write-only ENA7 Enable [7:0] 7 1 write-only SUSP0 Suspend [7:0] 8 1 write-only SUSP1 Suspend [7:0] 9 1 write-only SUSP2 Suspend [7:0] 10 1 write-only SUSP3 Suspend [7:0] 11 1 write-only SUSP4 Suspend [7:0] 12 1 write-only SUSP5 Suspend [7:0] 13 1 write-only SUSP6 Suspend [7:0] 14 1 write-only SUSP7 Suspend [7:0] 15 1 write-only KEEP0 Keep on [7:0] 24 1 write-only KEEP1 Keep on [7:0] 25 1 write-only KEEP2 Keep on [7:0] 26 1 write-only KEEP3 Keep on [7:0] 27 1 write-only KEEP4 Keep on [7:0] 28 1 write-only KEEP5 Keep on [7:0] 29 1 write-only KEEP6 Keep on [7:0] 30 1 write-only KEEP7 Keep on [7:0] 31 1 write-only CHDR DMAC Channel Handler Disable Register 0x0000002C 32 write-only DIS0 Disable [7:0] 0 1 write-only DIS1 Disable [7:0] 1 1 write-only DIS2 Disable [7:0] 2 1 write-only DIS3 Disable [7:0] 3 1 write-only DIS4 Disable [7:0] 4 1 write-only DIS5 Disable [7:0] 5 1 write-only DIS6 Disable [7:0] 6 1 write-only DIS7 Disable [7:0] 7 1 write-only RES0 Resume [7:0] 8 1 write-only RES1 Resume [7:0] 9 1 write-only RES2 Resume [7:0] 10 1 write-only RES3 Resume [7:0] 11 1 write-only RES4 Resume [7:0] 12 1 write-only RES5 Resume [7:0] 13 1 write-only RES6 Resume [7:0] 14 1 write-only RES7 Resume [7:0] 15 1 write-only CHSR DMAC Channel Handler Status Register 0x00000030 32 read-only 0x00FF0000 ENA0 Enable [7:0] 0 1 read-only ENA1 Enable [7:0] 1 1 read-only ENA2 Enable [7:0] 2 1 read-only ENA3 Enable [7:0] 3 1 read-only ENA4 Enable [7:0] 4 1 read-only ENA5 Enable [7:0] 5 1 read-only ENA6 Enable [7:0] 6 1 read-only ENA7 Enable [7:0] 7 1 read-only SUSP0 Suspend [7:0] 8 1 read-only SUSP1 Suspend [7:0] 9 1 read-only SUSP2 Suspend [7:0] 10 1 read-only SUSP3 Suspend [7:0] 11 1 read-only SUSP4 Suspend [7:0] 12 1 read-only SUSP5 Suspend [7:0] 13 1 read-only SUSP6 Suspend [7:0] 14 1 read-only SUSP7 Suspend [7:0] 15 1 read-only EMPT0 Empty [7:0] 16 1 read-only EMPT1 Empty [7:0] 17 1 read-only EMPT2 Empty [7:0] 18 1 read-only EMPT3 Empty [7:0] 19 1 read-only EMPT4 Empty [7:0] 20 1 read-only EMPT5 Empty [7:0] 21 1 read-only EMPT6 Empty [7:0] 22 1 read-only EMPT7 Empty [7:0] 23 1 read-only STAL0 Stalled [7:0] 24 1 read-only STAL1 Stalled [7:0] 25 1 read-only STAL2 Stalled [7:0] 26 1 read-only STAL3 Stalled [7:0] 27 1 read-only STAL4 Stalled [7:0] 28 1 read-only STAL5 Stalled [7:0] 29 1 read-only STAL6 Stalled [7:0] 30 1 read-only STAL7 Stalled [7:0] 31 1 read-only SADDR0 DMAC Channel Source Address Register (ch_num = 0) 0x0000003C 32 read-write 0x00000000 SADDR Channel x Source Address 0 32 read-write DADDR0 DMAC Channel Destination Address Register (ch_num = 0) 0x00000040 32 read-write 0x00000000 DADDR Channel x Destination Address 0 32 read-write DSCR0 DMAC Channel Descriptor Address Register (ch_num = 0) 0x00000044 32 read-write 0x00000000 DSCR_IF 0 2 read-write AHB_IF0 The buffer transfer descriptor is fetched via AHB-Lite Interface 0 0x0 AHB_IF1 The buffer transfer descriptor is fetched via AHB-Lite Interface 1 0x1 DSCR Buffer Transfer Descriptor Address 2 30 read-write CTRLA0 DMAC Channel Control A Register (ch_num = 0) 0x00000048 32 read-write 0x00000000 BTSIZE Buffer Transfer Size 0 16 read-write SCSIZE Source Chunk Transfer Size. 16 3 read-write CHK_1 1 data transferred 0x0 CHK_4 4 data transferred 0x1 CHK_8 8 data transferred 0x2 CHK_16 16 data transferred 0x3 CHK_32 32 data transferred 0x4 CHK_64 64 data transferred 0x5 CHK_128 128 data transferred 0x6 CHK_256 256 data transferred 0x7 DCSIZE Destination Chunk Transfer Size 20 3 read-write CHK_1 1 data transferred 0x0 CHK_4 4 data transferred 0x1 CHK_8 8 data transferred 0x2 CHK_16 16 data transferred 0x3 CHK_32 32 data transferred 0x4 CHK_64 64 data transferred 0x5 CHK_128 128 data transferred 0x6 CHK_256 256 data transferred 0x7 SRC_WIDTH Transfer Width for the Source 24 2 read-write BYTE the transfer size is set to 8-bit width 0x0 HALF_WORD the transfer size is set to 16-bit width 0x1 WORD the transfer size is set to 32-bit width 0x2 DST_WIDTH Transfer Width for the Destination 28 2 read-write BYTE the transfer size is set to 8-bit width 0x0 HALF_WORD the transfer size is set to 16-bit width 0x1 WORD the transfer size is set to 32-bit width 0x2 DONE 31 1 read-write CTRLB0 DMAC Channel Control B Register (ch_num = 0) 0x0000004C 32 read-write 0x00000000 SIF Source Interface Selection Field 0 2 read-write AHB_IF0 The source transfer is done via AHB-Lite Interface 0 0x0 AHB_IF1 The source transfer is done via AHB-Lite Interface 1 0x1 DIF Destination Interface Selection Field 4 2 read-write AHB_IF0 The destination transfer is done via AHB-Lite Interface 0 0x0 AHB_IF1 The destination transfer is done via AHB-Lite Interface 1 0x1 SRC_PIP Source Picture-in-Picture Mode 8 1 read-write DISABLE Picture-in-Picture mode is disabled. The source data area is contiguous. 0 ENABLE Picture-in-Picture mode is enabled. When the source PIP counter reaches the programmable boundary, the address is automatically incremented by a user defined amount. 1 DST_PIP Destination Picture-in-Picture Mode 12 1 read-write DISABLE Picture-in-Picture mode is disabled. The Destination data area is contiguous. 0 ENABLE Picture-in-Picture mode is enabled. When the Destination PIP counter reaches the programmable boundary the address is automatically incremented by a user-defined amount. 1 SRC_DSCR Source Address Descriptor 16 1 read-write FETCH_FROM_MEM Source address is updated when the descriptor is fetched from the memory. 0 FETCH_DISABLE Buffer Descriptor Fetch operation is disabled for the source. 1 DST_DSCR Destination Address Descriptor 20 1 read-write FETCH_FROM_MEM Destination address is updated when the descriptor is fetched from the memory. 0 FETCH_DISABLE Buffer Descriptor Fetch operation is disabled for the destination. 1 FC Flow Control 21 3 read-write MEM2MEM_DMA_FC Memory-to-Memory Transfer DMAC is flow controller 0x0 MEM2PER_DMA_FC Memory-to-Peripheral Transfer DMAC is flow controller 0x1 PER2MEM_DMA_FC Peripheral-to-Memory Transfer DMAC is flow controller 0x2 PER2PER_DMA_FC Peripheral-to-Peripheral Transfer DMAC is flow controller 0x3 SRC_INCR Incrementing, Decrementing or Fixed Address for the Source 24 2 read-write INCREMENTING The source address is incremented 0x0 DECREMENTING The source address is decremented 0x1 FIXED The source address remains unchanged 0x2 DST_INCR Incrementing, Decrementing or Fixed Address for the Destination 28 2 read-write INCREMENTING The destination address is incremented 0x0 DECREMENTING The destination address is decremented 0x1 FIXED The destination address remains unchanged 0x2 IEN 30 1 read-write AUTO Automatic Multiple Buffer Transfer 31 1 read-write DISABLE Automatic multiple buffer transfer is disabled. 0 ENABLE Automatic multiple buffer transfer is enabled. This bit enables replay mode or contiguous mode when several buffers are transferred. 1 CFG0 DMAC Channel Configuration Register (ch_num = 0) 0x00000050 32 read-write 0x01000000 SRC_PER Source with Peripheral identifier 0 4 read-write DST_PER Destination with Peripheral identifier 4 4 read-write SRC_REP Source Reloaded from Previous 8 1 read-write CONTIGUOUS_ADDR When automatic mode is activated, source address is contiguous between two buffers. 0 RELOAD_ADDR When automatic mode is activated, the source address and the control register are reloaded from previous transfer. 1 SRC_H2SEL Software or Hardware Selection for the Source 9 1 read-write SW Software handshaking interface is used to trigger a transfer request. 0 HW Hardware handshaking interface is used to trigger a transfer request. 1 SRC_PER_MSB SRC_PER Most Significant Bits 10 2 read-write DST_REP Destination Reloaded from Previous 12 1 read-write CONTIGUOUS_ADDR When automatic mode is activated, destination address is contiguous between two buffers. 0 RELOAD_ADDR When automatic mode is activated, the destination and the control register are reloaded from the pre-vious transfer. 1 DST_H2SEL Software or Hardware Selection for the Destination 13 1 read-write SW Software handshaking interface is used to trigger a transfer request. 0 HW Hardware handshaking interface is used to trigger a transfer request. 1 DST_PER_MSB DST_PER Most Significant Bits 14 2 read-write SOD Stop On Done 16 1 read-write DISABLE STOP ON DONE disabled, the descriptor fetch operation ignores DONE Field of CTRLA register. 0 ENABLE STOP ON DONE activated, the DMAC module is automatically disabled if DONE FIELD is set to 1. 1 LOCK_IF Interface Lock 20 1 read-write DISABLE Interface Lock capability is disabled 0 ENABLE Interface Lock capability is enabled 1 LOCK_B Bus Lock 21 1 read-write DISABLE AHB Bus Locking capability is disabled. 0 LOCK_IF_L Master Interface Arbiter Lock 22 1 read-write CHUNK The Master Interface Arbiter is locked by the channel x for a chunk transfer. 0 BUFFER The Master Interface Arbiter is locked by the channel x for a buffer transfer. 1 AHB_PROT AHB Protection 24 3 read-write FIFOCFG FIFO Configuration 28 2 read-write ALAP_CFG The largest defined length AHB burst is performed on the destination AHB interface. 0x0 HALF_CFG When half FIFO size is available/filled, a source/destination request is serviced. 0x1 ASAP_CFG When there is enough space/data available to perform a single AHB access, then the request is serviced. 0x2 SPIP0 DMAC Channel Source Picture-in-Picture Configuration Register (ch_num = 0) 0x00000054 32 read-write 0x00000000 SPIP_HOLE Source Picture-in-Picture Hole 0 16 read-write SPIP_BOUNDARY Source Picture-in-Picture Boundary 16 10 read-write DPIP0 DMAC Channel Destination Picture-in-Picture Configuration Register (ch_num = 0) 0x00000058 32 read-write 0x00000000 DPIP_HOLE Destination Picture-in-Picture Hole 0 16 read-write DPIP_BOUNDARY Destination Picture-in-Picture Boundary 16 10 read-write SADDR1 DMAC Channel Source Address Register (ch_num = 1) 0x00000064 32 read-write 0x00000000 SADDR Channel x Source Address 0 32 read-write DADDR1 DMAC Channel Destination Address Register (ch_num = 1) 0x00000068 32 read-write 0x00000000 DADDR Channel x Destination Address 0 32 read-write DSCR1 DMAC Channel Descriptor Address Register (ch_num = 1) 0x0000006C 32 read-write 0x00000000 DSCR_IF 0 2 read-write AHB_IF0 The buffer transfer descriptor is fetched via AHB-Lite Interface 0 0x0 AHB_IF1 The buffer transfer descriptor is fetched via AHB-Lite Interface 1 0x1 DSCR Buffer Transfer Descriptor Address 2 30 read-write CTRLA1 DMAC Channel Control A Register (ch_num = 1) 0x00000070 32 read-write 0x00000000 BTSIZE Buffer Transfer Size 0 16 read-write SCSIZE Source Chunk Transfer Size. 16 3 read-write CHK_1 1 data transferred 0x0 CHK_4 4 data transferred 0x1 CHK_8 8 data transferred 0x2 CHK_16 16 data transferred 0x3 CHK_32 32 data transferred 0x4 CHK_64 64 data transferred 0x5 CHK_128 128 data transferred 0x6 CHK_256 256 data transferred 0x7 DCSIZE Destination Chunk Transfer Size 20 3 read-write CHK_1 1 data transferred 0x0 CHK_4 4 data transferred 0x1 CHK_8 8 data transferred 0x2 CHK_16 16 data transferred 0x3 CHK_32 32 data transferred 0x4 CHK_64 64 data transferred 0x5 CHK_128 128 data transferred 0x6 CHK_256 256 data transferred 0x7 SRC_WIDTH Transfer Width for the Source 24 2 read-write BYTE the transfer size is set to 8-bit width 0x0 HALF_WORD the transfer size is set to 16-bit width 0x1 WORD the transfer size is set to 32-bit width 0x2 DST_WIDTH Transfer Width for the Destination 28 2 read-write BYTE the transfer size is set to 8-bit width 0x0 HALF_WORD the transfer size is set to 16-bit width 0x1 WORD the transfer size is set to 32-bit width 0x2 DONE 31 1 read-write CTRLB1 DMAC Channel Control B Register (ch_num = 1) 0x00000074 32 read-write 0x00000000 SIF Source Interface Selection Field 0 2 read-write AHB_IF0 The source transfer is done via AHB-Lite Interface 0 0x0 AHB_IF1 The source transfer is done via AHB-Lite Interface 1 0x1 DIF Destination Interface Selection Field 4 2 read-write AHB_IF0 The destination transfer is done via AHB-Lite Interface 0 0x0 AHB_IF1 The destination transfer is done via AHB-Lite Interface 1 0x1 SRC_PIP Source Picture-in-Picture Mode 8 1 read-write DISABLE Picture-in-Picture mode is disabled. The source data area is contiguous. 0 ENABLE Picture-in-Picture mode is enabled. When the source PIP counter reaches the programmable boundary, the address is automatically incremented by a user defined amount. 1 DST_PIP Destination Picture-in-Picture Mode 12 1 read-write DISABLE Picture-in-Picture mode is disabled. The Destination data area is contiguous. 0 ENABLE Picture-in-Picture mode is enabled. When the Destination PIP counter reaches the programmable boundary the address is automatically incremented by a user-defined amount. 1 SRC_DSCR Source Address Descriptor 16 1 read-write FETCH_FROM_MEM Source address is updated when the descriptor is fetched from the memory. 0 FETCH_DISABLE Buffer Descriptor Fetch operation is disabled for the source. 1 DST_DSCR Destination Address Descriptor 20 1 read-write FETCH_FROM_MEM Destination address is updated when the descriptor is fetched from the memory. 0 FETCH_DISABLE Buffer Descriptor Fetch operation is disabled for the destination. 1 FC Flow Control 21 3 read-write MEM2MEM_DMA_FC Memory-to-Memory Transfer DMAC is flow controller 0x0 MEM2PER_DMA_FC Memory-to-Peripheral Transfer DMAC is flow controller 0x1 PER2MEM_DMA_FC Peripheral-to-Memory Transfer DMAC is flow controller 0x2 PER2PER_DMA_FC Peripheral-to-Peripheral Transfer DMAC is flow controller 0x3 SRC_INCR Incrementing, Decrementing or Fixed Address for the Source 24 2 read-write INCREMENTING The source address is incremented 0x0 DECREMENTING The source address is decremented 0x1 FIXED The source address remains unchanged 0x2 DST_INCR Incrementing, Decrementing or Fixed Address for the Destination 28 2 read-write INCREMENTING The destination address is incremented 0x0 DECREMENTING The destination address is decremented 0x1 FIXED The destination address remains unchanged 0x2 IEN 30 1 read-write AUTO Automatic Multiple Buffer Transfer 31 1 read-write DISABLE Automatic multiple buffer transfer is disabled. 0 ENABLE Automatic multiple buffer transfer is enabled. This bit enables replay mode or contiguous mode when several buffers are transferred. 1 CFG1 DMAC Channel Configuration Register (ch_num = 1) 0x00000078 32 read-write 0x01000000 SRC_PER Source with Peripheral identifier 0 4 read-write DST_PER Destination with Peripheral identifier 4 4 read-write SRC_REP Source Reloaded from Previous 8 1 read-write CONTIGUOUS_ADDR When automatic mode is activated, source address is contiguous between two buffers. 0 RELOAD_ADDR When automatic mode is activated, the source address and the control register are reloaded from previous transfer. 1 SRC_H2SEL Software or Hardware Selection for the Source 9 1 read-write SW Software handshaking interface is used to trigger a transfer request. 0 HW Hardware handshaking interface is used to trigger a transfer request. 1 SRC_PER_MSB SRC_PER Most Significant Bits 10 2 read-write DST_REP Destination Reloaded from Previous 12 1 read-write CONTIGUOUS_ADDR When automatic mode is activated, destination address is contiguous between two buffers. 0 RELOAD_ADDR When automatic mode is activated, the destination and the control register are reloaded from the pre-vious transfer. 1 DST_H2SEL Software or Hardware Selection for the Destination 13 1 read-write SW Software handshaking interface is used to trigger a transfer request. 0 HW Hardware handshaking interface is used to trigger a transfer request. 1 DST_PER_MSB DST_PER Most Significant Bits 14 2 read-write SOD Stop On Done 16 1 read-write DISABLE STOP ON DONE disabled, the descriptor fetch operation ignores DONE Field of CTRLA register. 0 ENABLE STOP ON DONE activated, the DMAC module is automatically disabled if DONE FIELD is set to 1. 1 LOCK_IF Interface Lock 20 1 read-write DISABLE Interface Lock capability is disabled 0 ENABLE Interface Lock capability is enabled 1 LOCK_B Bus Lock 21 1 read-write DISABLE AHB Bus Locking capability is disabled. 0 LOCK_IF_L Master Interface Arbiter Lock 22 1 read-write CHUNK The Master Interface Arbiter is locked by the channel x for a chunk transfer. 0 BUFFER The Master Interface Arbiter is locked by the channel x for a buffer transfer. 1 AHB_PROT AHB Protection 24 3 read-write FIFOCFG FIFO Configuration 28 2 read-write ALAP_CFG The largest defined length AHB burst is performed on the destination AHB interface. 0x0 HALF_CFG When half FIFO size is available/filled, a source/destination request is serviced. 0x1 ASAP_CFG When there is enough space/data available to perform a single AHB access, then the request is serviced. 0x2 SPIP1 DMAC Channel Source Picture-in-Picture Configuration Register (ch_num = 1) 0x0000007C 32 read-write 0x00000000 SPIP_HOLE Source Picture-in-Picture Hole 0 16 read-write SPIP_BOUNDARY Source Picture-in-Picture Boundary 16 10 read-write DPIP1 DMAC Channel Destination Picture-in-Picture Configuration Register (ch_num = 1) 0x00000080 32 read-write 0x00000000 DPIP_HOLE Destination Picture-in-Picture Hole 0 16 read-write DPIP_BOUNDARY Destination Picture-in-Picture Boundary 16 10 read-write SADDR2 DMAC Channel Source Address Register (ch_num = 2) 0x0000008C 32 read-write 0x00000000 SADDR Channel x Source Address 0 32 read-write DADDR2 DMAC Channel Destination Address Register (ch_num = 2) 0x00000090 32 read-write 0x00000000 DADDR Channel x Destination Address 0 32 read-write DSCR2 DMAC Channel Descriptor Address Register (ch_num = 2) 0x00000094 32 read-write 0x00000000 DSCR_IF 0 2 read-write AHB_IF0 The buffer transfer descriptor is fetched via AHB-Lite Interface 0 0x0 AHB_IF1 The buffer transfer descriptor is fetched via AHB-Lite Interface 1 0x1 DSCR Buffer Transfer Descriptor Address 2 30 read-write CTRLA2 DMAC Channel Control A Register (ch_num = 2) 0x00000098 32 read-write 0x00000000 BTSIZE Buffer Transfer Size 0 16 read-write SCSIZE Source Chunk Transfer Size. 16 3 read-write CHK_1 1 data transferred 0x0 CHK_4 4 data transferred 0x1 CHK_8 8 data transferred 0x2 CHK_16 16 data transferred 0x3 CHK_32 32 data transferred 0x4 CHK_64 64 data transferred 0x5 CHK_128 128 data transferred 0x6 CHK_256 256 data transferred 0x7 DCSIZE Destination Chunk Transfer Size 20 3 read-write CHK_1 1 data transferred 0x0 CHK_4 4 data transferred 0x1 CHK_8 8 data transferred 0x2 CHK_16 16 data transferred 0x3 CHK_32 32 data transferred 0x4 CHK_64 64 data transferred 0x5 CHK_128 128 data transferred 0x6 CHK_256 256 data transferred 0x7 SRC_WIDTH Transfer Width for the Source 24 2 read-write BYTE the transfer size is set to 8-bit width 0x0 HALF_WORD the transfer size is set to 16-bit width 0x1 WORD the transfer size is set to 32-bit width 0x2 DST_WIDTH Transfer Width for the Destination 28 2 read-write BYTE the transfer size is set to 8-bit width 0x0 HALF_WORD the transfer size is set to 16-bit width 0x1 WORD the transfer size is set to 32-bit width 0x2 DONE 31 1 read-write CTRLB2 DMAC Channel Control B Register (ch_num = 2) 0x0000009C 32 read-write 0x00000000 SIF Source Interface Selection Field 0 2 read-write AHB_IF0 The source transfer is done via AHB-Lite Interface 0 0x0 AHB_IF1 The source transfer is done via AHB-Lite Interface 1 0x1 DIF Destination Interface Selection Field 4 2 read-write AHB_IF0 The destination transfer is done via AHB-Lite Interface 0 0x0 AHB_IF1 The destination transfer is done via AHB-Lite Interface 1 0x1 SRC_PIP Source Picture-in-Picture Mode 8 1 read-write DISABLE Picture-in-Picture mode is disabled. The source data area is contiguous. 0 ENABLE Picture-in-Picture mode is enabled. When the source PIP counter reaches the programmable boundary, the address is automatically incremented by a user defined amount. 1 DST_PIP Destination Picture-in-Picture Mode 12 1 read-write DISABLE Picture-in-Picture mode is disabled. The Destination data area is contiguous. 0 ENABLE Picture-in-Picture mode is enabled. When the Destination PIP counter reaches the programmable boundary the address is automatically incremented by a user-defined amount. 1 SRC_DSCR Source Address Descriptor 16 1 read-write FETCH_FROM_MEM Source address is updated when the descriptor is fetched from the memory. 0 FETCH_DISABLE Buffer Descriptor Fetch operation is disabled for the source. 1 DST_DSCR Destination Address Descriptor 20 1 read-write FETCH_FROM_MEM Destination address is updated when the descriptor is fetched from the memory. 0 FETCH_DISABLE Buffer Descriptor Fetch operation is disabled for the destination. 1 FC Flow Control 21 3 read-write MEM2MEM_DMA_FC Memory-to-Memory Transfer DMAC is flow controller 0x0 MEM2PER_DMA_FC Memory-to-Peripheral Transfer DMAC is flow controller 0x1 PER2MEM_DMA_FC Peripheral-to-Memory Transfer DMAC is flow controller 0x2 PER2PER_DMA_FC Peripheral-to-Peripheral Transfer DMAC is flow controller 0x3 SRC_INCR Incrementing, Decrementing or Fixed Address for the Source 24 2 read-write INCREMENTING The source address is incremented 0x0 DECREMENTING The source address is decremented 0x1 FIXED The source address remains unchanged 0x2 DST_INCR Incrementing, Decrementing or Fixed Address for the Destination 28 2 read-write INCREMENTING The destination address is incremented 0x0 DECREMENTING The destination address is decremented 0x1 FIXED The destination address remains unchanged 0x2 IEN 30 1 read-write AUTO Automatic Multiple Buffer Transfer 31 1 read-write DISABLE Automatic multiple buffer transfer is disabled. 0 ENABLE Automatic multiple buffer transfer is enabled. This bit enables replay mode or contiguous mode when several buffers are transferred. 1 CFG2 DMAC Channel Configuration Register (ch_num = 2) 0x000000A0 32 read-write 0x01000000 SRC_PER Source with Peripheral identifier 0 4 read-write DST_PER Destination with Peripheral identifier 4 4 read-write SRC_REP Source Reloaded from Previous 8 1 read-write CONTIGUOUS_ADDR When automatic mode is activated, source address is contiguous between two buffers. 0 RELOAD_ADDR When automatic mode is activated, the source address and the control register are reloaded from previous transfer. 1 SRC_H2SEL Software or Hardware Selection for the Source 9 1 read-write SW Software handshaking interface is used to trigger a transfer request. 0 HW Hardware handshaking interface is used to trigger a transfer request. 1 SRC_PER_MSB SRC_PER Most Significant Bits 10 2 read-write DST_REP Destination Reloaded from Previous 12 1 read-write CONTIGUOUS_ADDR When automatic mode is activated, destination address is contiguous between two buffers. 0 RELOAD_ADDR When automatic mode is activated, the destination and the control register are reloaded from the pre-vious transfer. 1 DST_H2SEL Software or Hardware Selection for the Destination 13 1 read-write SW Software handshaking interface is used to trigger a transfer request. 0 HW Hardware handshaking interface is used to trigger a transfer request. 1 DST_PER_MSB DST_PER Most Significant Bits 14 2 read-write SOD Stop On Done 16 1 read-write DISABLE STOP ON DONE disabled, the descriptor fetch operation ignores DONE Field of CTRLA register. 0 ENABLE STOP ON DONE activated, the DMAC module is automatically disabled if DONE FIELD is set to 1. 1 LOCK_IF Interface Lock 20 1 read-write DISABLE Interface Lock capability is disabled 0 ENABLE Interface Lock capability is enabled 1 LOCK_B Bus Lock 21 1 read-write DISABLE AHB Bus Locking capability is disabled. 0 LOCK_IF_L Master Interface Arbiter Lock 22 1 read-write CHUNK The Master Interface Arbiter is locked by the channel x for a chunk transfer. 0 BUFFER The Master Interface Arbiter is locked by the channel x for a buffer transfer. 1 AHB_PROT AHB Protection 24 3 read-write FIFOCFG FIFO Configuration 28 2 read-write ALAP_CFG The largest defined length AHB burst is performed on the destination AHB interface. 0x0 HALF_CFG When half FIFO size is available/filled, a source/destination request is serviced. 0x1 ASAP_CFG When there is enough space/data available to perform a single AHB access, then the request is serviced. 0x2 SPIP2 DMAC Channel Source Picture-in-Picture Configuration Register (ch_num = 2) 0x000000A4 32 read-write 0x00000000 SPIP_HOLE Source Picture-in-Picture Hole 0 16 read-write SPIP_BOUNDARY Source Picture-in-Picture Boundary 16 10 read-write DPIP2 DMAC Channel Destination Picture-in-Picture Configuration Register (ch_num = 2) 0x000000A8 32 read-write 0x00000000 DPIP_HOLE Destination Picture-in-Picture Hole 0 16 read-write DPIP_BOUNDARY Destination Picture-in-Picture Boundary 16 10 read-write SADDR3 DMAC Channel Source Address Register (ch_num = 3) 0x000000B4 32 read-write 0x00000000 SADDR Channel x Source Address 0 32 read-write DADDR3 DMAC Channel Destination Address Register (ch_num = 3) 0x000000B8 32 read-write 0x00000000 DADDR Channel x Destination Address 0 32 read-write DSCR3 DMAC Channel Descriptor Address Register (ch_num = 3) 0x000000BC 32 read-write 0x00000000 DSCR_IF 0 2 read-write AHB_IF0 The buffer transfer descriptor is fetched via AHB-Lite Interface 0 0x0 AHB_IF1 The buffer transfer descriptor is fetched via AHB-Lite Interface 1 0x1 DSCR Buffer Transfer Descriptor Address 2 30 read-write CTRLA3 DMAC Channel Control A Register (ch_num = 3) 0x000000C0 32 read-write 0x00000000 BTSIZE Buffer Transfer Size 0 16 read-write SCSIZE Source Chunk Transfer Size. 16 3 read-write CHK_1 1 data transferred 0x0 CHK_4 4 data transferred 0x1 CHK_8 8 data transferred 0x2 CHK_16 16 data transferred 0x3 CHK_32 32 data transferred 0x4 CHK_64 64 data transferred 0x5 CHK_128 128 data transferred 0x6 CHK_256 256 data transferred 0x7 DCSIZE Destination Chunk Transfer Size 20 3 read-write CHK_1 1 data transferred 0x0 CHK_4 4 data transferred 0x1 CHK_8 8 data transferred 0x2 CHK_16 16 data transferred 0x3 CHK_32 32 data transferred 0x4 CHK_64 64 data transferred 0x5 CHK_128 128 data transferred 0x6 CHK_256 256 data transferred 0x7 SRC_WIDTH Transfer Width for the Source 24 2 read-write BYTE the transfer size is set to 8-bit width 0x0 HALF_WORD the transfer size is set to 16-bit width 0x1 WORD the transfer size is set to 32-bit width 0x2 DST_WIDTH Transfer Width for the Destination 28 2 read-write BYTE the transfer size is set to 8-bit width 0x0 HALF_WORD the transfer size is set to 16-bit width 0x1 WORD the transfer size is set to 32-bit width 0x2 DONE 31 1 read-write CTRLB3 DMAC Channel Control B Register (ch_num = 3) 0x000000C4 32 read-write 0x00000000 SIF Source Interface Selection Field 0 2 read-write AHB_IF0 The source transfer is done via AHB-Lite Interface 0 0x0 AHB_IF1 The source transfer is done via AHB-Lite Interface 1 0x1 DIF Destination Interface Selection Field 4 2 read-write AHB_IF0 The destination transfer is done via AHB-Lite Interface 0 0x0 AHB_IF1 The destination transfer is done via AHB-Lite Interface 1 0x1 SRC_PIP Source Picture-in-Picture Mode 8 1 read-write DISABLE Picture-in-Picture mode is disabled. The source data area is contiguous. 0 ENABLE Picture-in-Picture mode is enabled. When the source PIP counter reaches the programmable boundary, the address is automatically incremented by a user defined amount. 1 DST_PIP Destination Picture-in-Picture Mode 12 1 read-write DISABLE Picture-in-Picture mode is disabled. The Destination data area is contiguous. 0 ENABLE Picture-in-Picture mode is enabled. When the Destination PIP counter reaches the programmable boundary the address is automatically incremented by a user-defined amount. 1 SRC_DSCR Source Address Descriptor 16 1 read-write FETCH_FROM_MEM Source address is updated when the descriptor is fetched from the memory. 0 FETCH_DISABLE Buffer Descriptor Fetch operation is disabled for the source. 1 DST_DSCR Destination Address Descriptor 20 1 read-write FETCH_FROM_MEM Destination address is updated when the descriptor is fetched from the memory. 0 FETCH_DISABLE Buffer Descriptor Fetch operation is disabled for the destination. 1 FC Flow Control 21 3 read-write MEM2MEM_DMA_FC Memory-to-Memory Transfer DMAC is flow controller 0x0 MEM2PER_DMA_FC Memory-to-Peripheral Transfer DMAC is flow controller 0x1 PER2MEM_DMA_FC Peripheral-to-Memory Transfer DMAC is flow controller 0x2 PER2PER_DMA_FC Peripheral-to-Peripheral Transfer DMAC is flow controller 0x3 SRC_INCR Incrementing, Decrementing or Fixed Address for the Source 24 2 read-write INCREMENTING The source address is incremented 0x0 DECREMENTING The source address is decremented 0x1 FIXED The source address remains unchanged 0x2 DST_INCR Incrementing, Decrementing or Fixed Address for the Destination 28 2 read-write INCREMENTING The destination address is incremented 0x0 DECREMENTING The destination address is decremented 0x1 FIXED The destination address remains unchanged 0x2 IEN 30 1 read-write AUTO Automatic Multiple Buffer Transfer 31 1 read-write DISABLE Automatic multiple buffer transfer is disabled. 0 ENABLE Automatic multiple buffer transfer is enabled. This bit enables replay mode or contiguous mode when several buffers are transferred. 1 CFG3 DMAC Channel Configuration Register (ch_num = 3) 0x000000C8 32 read-write 0x01000000 SRC_PER Source with Peripheral identifier 0 4 read-write DST_PER Destination with Peripheral identifier 4 4 read-write SRC_REP Source Reloaded from Previous 8 1 read-write CONTIGUOUS_ADDR When automatic mode is activated, source address is contiguous between two buffers. 0 RELOAD_ADDR When automatic mode is activated, the source address and the control register are reloaded from previous transfer. 1 SRC_H2SEL Software or Hardware Selection for the Source 9 1 read-write SW Software handshaking interface is used to trigger a transfer request. 0 HW Hardware handshaking interface is used to trigger a transfer request. 1 SRC_PER_MSB SRC_PER Most Significant Bits 10 2 read-write DST_REP Destination Reloaded from Previous 12 1 read-write CONTIGUOUS_ADDR When automatic mode is activated, destination address is contiguous between two buffers. 0 RELOAD_ADDR When automatic mode is activated, the destination and the control register are reloaded from the pre-vious transfer. 1 DST_H2SEL Software or Hardware Selection for the Destination 13 1 read-write SW Software handshaking interface is used to trigger a transfer request. 0 HW Hardware handshaking interface is used to trigger a transfer request. 1 DST_PER_MSB DST_PER Most Significant Bits 14 2 read-write SOD Stop On Done 16 1 read-write DISABLE STOP ON DONE disabled, the descriptor fetch operation ignores DONE Field of CTRLA register. 0 ENABLE STOP ON DONE activated, the DMAC module is automatically disabled if DONE FIELD is set to 1. 1 LOCK_IF Interface Lock 20 1 read-write DISABLE Interface Lock capability is disabled 0 ENABLE Interface Lock capability is enabled 1 LOCK_B Bus Lock 21 1 read-write DISABLE AHB Bus Locking capability is disabled. 0 LOCK_IF_L Master Interface Arbiter Lock 22 1 read-write CHUNK The Master Interface Arbiter is locked by the channel x for a chunk transfer. 0 BUFFER The Master Interface Arbiter is locked by the channel x for a buffer transfer. 1 AHB_PROT AHB Protection 24 3 read-write FIFOCFG FIFO Configuration 28 2 read-write ALAP_CFG The largest defined length AHB burst is performed on the destination AHB interface. 0x0 HALF_CFG When half FIFO size is available/filled, a source/destination request is serviced. 0x1 ASAP_CFG When there is enough space/data available to perform a single AHB access, then the request is serviced. 0x2 SPIP3 DMAC Channel Source Picture-in-Picture Configuration Register (ch_num = 3) 0x000000CC 32 read-write 0x00000000 SPIP_HOLE Source Picture-in-Picture Hole 0 16 read-write SPIP_BOUNDARY Source Picture-in-Picture Boundary 16 10 read-write DPIP3 DMAC Channel Destination Picture-in-Picture Configuration Register (ch_num = 3) 0x000000D0 32 read-write 0x00000000 DPIP_HOLE Destination Picture-in-Picture Hole 0 16 read-write DPIP_BOUNDARY Destination Picture-in-Picture Boundary 16 10 read-write SADDR4 DMAC Channel Source Address Register (ch_num = 4) 0x000000DC 32 read-write 0x00000000 SADDR Channel x Source Address 0 32 read-write DADDR4 DMAC Channel Destination Address Register (ch_num = 4) 0x000000E0 32 read-write 0x00000000 DADDR Channel x Destination Address 0 32 read-write DSCR4 DMAC Channel Descriptor Address Register (ch_num = 4) 0x000000E4 32 read-write 0x00000000 DSCR_IF 0 2 read-write AHB_IF0 The buffer transfer descriptor is fetched via AHB-Lite Interface 0 0x0 AHB_IF1 The buffer transfer descriptor is fetched via AHB-Lite Interface 1 0x1 DSCR Buffer Transfer Descriptor Address 2 30 read-write CTRLA4 DMAC Channel Control A Register (ch_num = 4) 0x000000E8 32 read-write 0x00000000 BTSIZE Buffer Transfer Size 0 16 read-write SCSIZE Source Chunk Transfer Size. 16 3 read-write CHK_1 1 data transferred 0x0 CHK_4 4 data transferred 0x1 CHK_8 8 data transferred 0x2 CHK_16 16 data transferred 0x3 CHK_32 32 data transferred 0x4 CHK_64 64 data transferred 0x5 CHK_128 128 data transferred 0x6 CHK_256 256 data transferred 0x7 DCSIZE Destination Chunk Transfer Size 20 3 read-write CHK_1 1 data transferred 0x0 CHK_4 4 data transferred 0x1 CHK_8 8 data transferred 0x2 CHK_16 16 data transferred 0x3 CHK_32 32 data transferred 0x4 CHK_64 64 data transferred 0x5 CHK_128 128 data transferred 0x6 CHK_256 256 data transferred 0x7 SRC_WIDTH Transfer Width for the Source 24 2 read-write BYTE the transfer size is set to 8-bit width 0x0 HALF_WORD the transfer size is set to 16-bit width 0x1 WORD the transfer size is set to 32-bit width 0x2 DST_WIDTH Transfer Width for the Destination 28 2 read-write BYTE the transfer size is set to 8-bit width 0x0 HALF_WORD the transfer size is set to 16-bit width 0x1 WORD the transfer size is set to 32-bit width 0x2 DONE 31 1 read-write CTRLB4 DMAC Channel Control B Register (ch_num = 4) 0x000000EC 32 read-write 0x00000000 SIF Source Interface Selection Field 0 2 read-write AHB_IF0 The source transfer is done via AHB-Lite Interface 0 0x0 AHB_IF1 The source transfer is done via AHB-Lite Interface 1 0x1 DIF Destination Interface Selection Field 4 2 read-write AHB_IF0 The destination transfer is done via AHB-Lite Interface 0 0x0 AHB_IF1 The destination transfer is done via AHB-Lite Interface 1 0x1 SRC_PIP Source Picture-in-Picture Mode 8 1 read-write DISABLE Picture-in-Picture mode is disabled. The source data area is contiguous. 0 ENABLE Picture-in-Picture mode is enabled. When the source PIP counter reaches the programmable boundary, the address is automatically incremented by a user defined amount. 1 DST_PIP Destination Picture-in-Picture Mode 12 1 read-write DISABLE Picture-in-Picture mode is disabled. The Destination data area is contiguous. 0 ENABLE Picture-in-Picture mode is enabled. When the Destination PIP counter reaches the programmable boundary the address is automatically incremented by a user-defined amount. 1 SRC_DSCR Source Address Descriptor 16 1 read-write FETCH_FROM_MEM Source address is updated when the descriptor is fetched from the memory. 0 FETCH_DISABLE Buffer Descriptor Fetch operation is disabled for the source. 1 DST_DSCR Destination Address Descriptor 20 1 read-write FETCH_FROM_MEM Destination address is updated when the descriptor is fetched from the memory. 0 FETCH_DISABLE Buffer Descriptor Fetch operation is disabled for the destination. 1 FC Flow Control 21 3 read-write MEM2MEM_DMA_FC Memory-to-Memory Transfer DMAC is flow controller 0x0 MEM2PER_DMA_FC Memory-to-Peripheral Transfer DMAC is flow controller 0x1 PER2MEM_DMA_FC Peripheral-to-Memory Transfer DMAC is flow controller 0x2 PER2PER_DMA_FC Peripheral-to-Peripheral Transfer DMAC is flow controller 0x3 SRC_INCR Incrementing, Decrementing or Fixed Address for the Source 24 2 read-write INCREMENTING The source address is incremented 0x0 DECREMENTING The source address is decremented 0x1 FIXED The source address remains unchanged 0x2 DST_INCR Incrementing, Decrementing or Fixed Address for the Destination 28 2 read-write INCREMENTING The destination address is incremented 0x0 DECREMENTING The destination address is decremented 0x1 FIXED The destination address remains unchanged 0x2 IEN 30 1 read-write AUTO Automatic Multiple Buffer Transfer 31 1 read-write DISABLE Automatic multiple buffer transfer is disabled. 0 ENABLE Automatic multiple buffer transfer is enabled. This bit enables replay mode or contiguous mode when several buffers are transferred. 1 CFG4 DMAC Channel Configuration Register (ch_num = 4) 0x000000F0 32 read-write 0x01000000 SRC_PER Source with Peripheral identifier 0 4 read-write DST_PER Destination with Peripheral identifier 4 4 read-write SRC_REP Source Reloaded from Previous 8 1 read-write CONTIGUOUS_ADDR When automatic mode is activated, source address is contiguous between two buffers. 0 RELOAD_ADDR When automatic mode is activated, the source address and the control register are reloaded from previous transfer. 1 SRC_H2SEL Software or Hardware Selection for the Source 9 1 read-write SW Software handshaking interface is used to trigger a transfer request. 0 HW Hardware handshaking interface is used to trigger a transfer request. 1 SRC_PER_MSB SRC_PER Most Significant Bits 10 2 read-write DST_REP Destination Reloaded from Previous 12 1 read-write CONTIGUOUS_ADDR When automatic mode is activated, destination address is contiguous between two buffers. 0 RELOAD_ADDR When automatic mode is activated, the destination and the control register are reloaded from the pre-vious transfer. 1 DST_H2SEL Software or Hardware Selection for the Destination 13 1 read-write SW Software handshaking interface is used to trigger a transfer request. 0 HW Hardware handshaking interface is used to trigger a transfer request. 1 DST_PER_MSB DST_PER Most Significant Bits 14 2 read-write SOD Stop On Done 16 1 read-write DISABLE STOP ON DONE disabled, the descriptor fetch operation ignores DONE Field of CTRLA register. 0 ENABLE STOP ON DONE activated, the DMAC module is automatically disabled if DONE FIELD is set to 1. 1 LOCK_IF Interface Lock 20 1 read-write DISABLE Interface Lock capability is disabled 0 ENABLE Interface Lock capability is enabled 1 LOCK_B Bus Lock 21 1 read-write DISABLE AHB Bus Locking capability is disabled. 0 LOCK_IF_L Master Interface Arbiter Lock 22 1 read-write CHUNK The Master Interface Arbiter is locked by the channel x for a chunk transfer. 0 BUFFER The Master Interface Arbiter is locked by the channel x for a buffer transfer. 1 AHB_PROT AHB Protection 24 3 read-write FIFOCFG FIFO Configuration 28 2 read-write ALAP_CFG The largest defined length AHB burst is performed on the destination AHB interface. 0x0 HALF_CFG When half FIFO size is available/filled, a source/destination request is serviced. 0x1 ASAP_CFG When there is enough space/data available to perform a single AHB access, then the request is serviced. 0x2 SPIP4 DMAC Channel Source Picture-in-Picture Configuration Register (ch_num = 4) 0x000000F4 32 read-write 0x00000000 SPIP_HOLE Source Picture-in-Picture Hole 0 16 read-write SPIP_BOUNDARY Source Picture-in-Picture Boundary 16 10 read-write DPIP4 DMAC Channel Destination Picture-in-Picture Configuration Register (ch_num = 4) 0x000000F8 32 read-write 0x00000000 DPIP_HOLE Destination Picture-in-Picture Hole 0 16 read-write DPIP_BOUNDARY Destination Picture-in-Picture Boundary 16 10 read-write SADDR5 DMAC Channel Source Address Register (ch_num = 5) 0x00000104 32 read-write 0x00000000 SADDR Channel x Source Address 0 32 read-write DADDR5 DMAC Channel Destination Address Register (ch_num = 5) 0x00000108 32 read-write 0x00000000 DADDR Channel x Destination Address 0 32 read-write DSCR5 DMAC Channel Descriptor Address Register (ch_num = 5) 0x0000010C 32 read-write 0x00000000 DSCR_IF 0 2 read-write AHB_IF0 The buffer transfer descriptor is fetched via AHB-Lite Interface 0 0x0 AHB_IF1 The buffer transfer descriptor is fetched via AHB-Lite Interface 1 0x1 DSCR Buffer Transfer Descriptor Address 2 30 read-write CTRLA5 DMAC Channel Control A Register (ch_num = 5) 0x00000110 32 read-write 0x00000000 BTSIZE Buffer Transfer Size 0 16 read-write SCSIZE Source Chunk Transfer Size. 16 3 read-write CHK_1 1 data transferred 0x0 CHK_4 4 data transferred 0x1 CHK_8 8 data transferred 0x2 CHK_16 16 data transferred 0x3 CHK_32 32 data transferred 0x4 CHK_64 64 data transferred 0x5 CHK_128 128 data transferred 0x6 CHK_256 256 data transferred 0x7 DCSIZE Destination Chunk Transfer Size 20 3 read-write CHK_1 1 data transferred 0x0 CHK_4 4 data transferred 0x1 CHK_8 8 data transferred 0x2 CHK_16 16 data transferred 0x3 CHK_32 32 data transferred 0x4 CHK_64 64 data transferred 0x5 CHK_128 128 data transferred 0x6 CHK_256 256 data transferred 0x7 SRC_WIDTH Transfer Width for the Source 24 2 read-write BYTE the transfer size is set to 8-bit width 0x0 HALF_WORD the transfer size is set to 16-bit width 0x1 WORD the transfer size is set to 32-bit width 0x2 DST_WIDTH Transfer Width for the Destination 28 2 read-write BYTE the transfer size is set to 8-bit width 0x0 HALF_WORD the transfer size is set to 16-bit width 0x1 WORD the transfer size is set to 32-bit width 0x2 DONE 31 1 read-write CTRLB5 DMAC Channel Control B Register (ch_num = 5) 0x00000114 32 read-write 0x00000000 SIF Source Interface Selection Field 0 2 read-write AHB_IF0 The source transfer is done via AHB-Lite Interface 0 0x0 AHB_IF1 The source transfer is done via AHB-Lite Interface 1 0x1 DIF Destination Interface Selection Field 4 2 read-write AHB_IF0 The destination transfer is done via AHB-Lite Interface 0 0x0 AHB_IF1 The destination transfer is done via AHB-Lite Interface 1 0x1 SRC_PIP Source Picture-in-Picture Mode 8 1 read-write DISABLE Picture-in-Picture mode is disabled. The source data area is contiguous. 0 ENABLE Picture-in-Picture mode is enabled. When the source PIP counter reaches the programmable boundary, the address is automatically incremented by a user defined amount. 1 DST_PIP Destination Picture-in-Picture Mode 12 1 read-write DISABLE Picture-in-Picture mode is disabled. The Destination data area is contiguous. 0 ENABLE Picture-in-Picture mode is enabled. When the Destination PIP counter reaches the programmable boundary the address is automatically incremented by a user-defined amount. 1 SRC_DSCR Source Address Descriptor 16 1 read-write FETCH_FROM_MEM Source address is updated when the descriptor is fetched from the memory. 0 FETCH_DISABLE Buffer Descriptor Fetch operation is disabled for the source. 1 DST_DSCR Destination Address Descriptor 20 1 read-write FETCH_FROM_MEM Destination address is updated when the descriptor is fetched from the memory. 0 FETCH_DISABLE Buffer Descriptor Fetch operation is disabled for the destination. 1 FC Flow Control 21 3 read-write MEM2MEM_DMA_FC Memory-to-Memory Transfer DMAC is flow controller 0x0 MEM2PER_DMA_FC Memory-to-Peripheral Transfer DMAC is flow controller 0x1 PER2MEM_DMA_FC Peripheral-to-Memory Transfer DMAC is flow controller 0x2 PER2PER_DMA_FC Peripheral-to-Peripheral Transfer DMAC is flow controller 0x3 SRC_INCR Incrementing, Decrementing or Fixed Address for the Source 24 2 read-write INCREMENTING The source address is incremented 0x0 DECREMENTING The source address is decremented 0x1 FIXED The source address remains unchanged 0x2 DST_INCR Incrementing, Decrementing or Fixed Address for the Destination 28 2 read-write INCREMENTING The destination address is incremented 0x0 DECREMENTING The destination address is decremented 0x1 FIXED The destination address remains unchanged 0x2 IEN 30 1 read-write AUTO Automatic Multiple Buffer Transfer 31 1 read-write DISABLE Automatic multiple buffer transfer is disabled. 0 ENABLE Automatic multiple buffer transfer is enabled. This bit enables replay mode or contiguous mode when several buffers are transferred. 1 CFG5 DMAC Channel Configuration Register (ch_num = 5) 0x00000118 32 read-write 0x01000000 SRC_PER Source with Peripheral identifier 0 4 read-write DST_PER Destination with Peripheral identifier 4 4 read-write SRC_REP Source Reloaded from Previous 8 1 read-write CONTIGUOUS_ADDR When automatic mode is activated, source address is contiguous between two buffers. 0 RELOAD_ADDR When automatic mode is activated, the source address and the control register are reloaded from previous transfer. 1 SRC_H2SEL Software or Hardware Selection for the Source 9 1 read-write SW Software handshaking interface is used to trigger a transfer request. 0 HW Hardware handshaking interface is used to trigger a transfer request. 1 SRC_PER_MSB SRC_PER Most Significant Bits 10 2 read-write DST_REP Destination Reloaded from Previous 12 1 read-write CONTIGUOUS_ADDR When automatic mode is activated, destination address is contiguous between two buffers. 0 RELOAD_ADDR When automatic mode is activated, the destination and the control register are reloaded from the pre-vious transfer. 1 DST_H2SEL Software or Hardware Selection for the Destination 13 1 read-write SW Software handshaking interface is used to trigger a transfer request. 0 HW Hardware handshaking interface is used to trigger a transfer request. 1 DST_PER_MSB DST_PER Most Significant Bits 14 2 read-write SOD Stop On Done 16 1 read-write DISABLE STOP ON DONE disabled, the descriptor fetch operation ignores DONE Field of CTRLA register. 0 ENABLE STOP ON DONE activated, the DMAC module is automatically disabled if DONE FIELD is set to 1. 1 LOCK_IF Interface Lock 20 1 read-write DISABLE Interface Lock capability is disabled 0 ENABLE Interface Lock capability is enabled 1 LOCK_B Bus Lock 21 1 read-write DISABLE AHB Bus Locking capability is disabled. 0 LOCK_IF_L Master Interface Arbiter Lock 22 1 read-write CHUNK The Master Interface Arbiter is locked by the channel x for a chunk transfer. 0 BUFFER The Master Interface Arbiter is locked by the channel x for a buffer transfer. 1 AHB_PROT AHB Protection 24 3 read-write FIFOCFG FIFO Configuration 28 2 read-write ALAP_CFG The largest defined length AHB burst is performed on the destination AHB interface. 0x0 HALF_CFG When half FIFO size is available/filled, a source/destination request is serviced. 0x1 ASAP_CFG When there is enough space/data available to perform a single AHB access, then the request is serviced. 0x2 SPIP5 DMAC Channel Source Picture-in-Picture Configuration Register (ch_num = 5) 0x0000011C 32 read-write 0x00000000 SPIP_HOLE Source Picture-in-Picture Hole 0 16 read-write SPIP_BOUNDARY Source Picture-in-Picture Boundary 16 10 read-write DPIP5 DMAC Channel Destination Picture-in-Picture Configuration Register (ch_num = 5) 0x00000120 32 read-write 0x00000000 DPIP_HOLE Destination Picture-in-Picture Hole 0 16 read-write DPIP_BOUNDARY Destination Picture-in-Picture Boundary 16 10 read-write SADDR6 DMAC Channel Source Address Register (ch_num = 6) 0x0000012C 32 read-write 0x00000000 SADDR Channel x Source Address 0 32 read-write DADDR6 DMAC Channel Destination Address Register (ch_num = 6) 0x00000130 32 read-write 0x00000000 DADDR Channel x Destination Address 0 32 read-write DSCR6 DMAC Channel Descriptor Address Register (ch_num = 6) 0x00000134 32 read-write 0x00000000 DSCR_IF 0 2 read-write AHB_IF0 The buffer transfer descriptor is fetched via AHB-Lite Interface 0 0x0 AHB_IF1 The buffer transfer descriptor is fetched via AHB-Lite Interface 1 0x1 DSCR Buffer Transfer Descriptor Address 2 30 read-write CTRLA6 DMAC Channel Control A Register (ch_num = 6) 0x00000138 32 read-write 0x00000000 BTSIZE Buffer Transfer Size 0 16 read-write SCSIZE Source Chunk Transfer Size. 16 3 read-write CHK_1 1 data transferred 0x0 CHK_4 4 data transferred 0x1 CHK_8 8 data transferred 0x2 CHK_16 16 data transferred 0x3 CHK_32 32 data transferred 0x4 CHK_64 64 data transferred 0x5 CHK_128 128 data transferred 0x6 CHK_256 256 data transferred 0x7 DCSIZE Destination Chunk Transfer Size 20 3 read-write CHK_1 1 data transferred 0x0 CHK_4 4 data transferred 0x1 CHK_8 8 data transferred 0x2 CHK_16 16 data transferred 0x3 CHK_32 32 data transferred 0x4 CHK_64 64 data transferred 0x5 CHK_128 128 data transferred 0x6 CHK_256 256 data transferred 0x7 SRC_WIDTH Transfer Width for the Source 24 2 read-write BYTE the transfer size is set to 8-bit width 0x0 HALF_WORD the transfer size is set to 16-bit width 0x1 WORD the transfer size is set to 32-bit width 0x2 DST_WIDTH Transfer Width for the Destination 28 2 read-write BYTE the transfer size is set to 8-bit width 0x0 HALF_WORD the transfer size is set to 16-bit width 0x1 WORD the transfer size is set to 32-bit width 0x2 DONE 31 1 read-write CTRLB6 DMAC Channel Control B Register (ch_num = 6) 0x0000013C 32 read-write 0x00000000 SIF Source Interface Selection Field 0 2 read-write AHB_IF0 The source transfer is done via AHB-Lite Interface 0 0x0 AHB_IF1 The source transfer is done via AHB-Lite Interface 1 0x1 DIF Destination Interface Selection Field 4 2 read-write AHB_IF0 The destination transfer is done via AHB-Lite Interface 0 0x0 AHB_IF1 The destination transfer is done via AHB-Lite Interface 1 0x1 SRC_PIP Source Picture-in-Picture Mode 8 1 read-write DISABLE Picture-in-Picture mode is disabled. The source data area is contiguous. 0 ENABLE Picture-in-Picture mode is enabled. When the source PIP counter reaches the programmable boundary, the address is automatically incremented by a user defined amount. 1 DST_PIP Destination Picture-in-Picture Mode 12 1 read-write DISABLE Picture-in-Picture mode is disabled. The Destination data area is contiguous. 0 ENABLE Picture-in-Picture mode is enabled. When the Destination PIP counter reaches the programmable boundary the address is automatically incremented by a user-defined amount. 1 SRC_DSCR Source Address Descriptor 16 1 read-write FETCH_FROM_MEM Source address is updated when the descriptor is fetched from the memory. 0 FETCH_DISABLE Buffer Descriptor Fetch operation is disabled for the source. 1 DST_DSCR Destination Address Descriptor 20 1 read-write FETCH_FROM_MEM Destination address is updated when the descriptor is fetched from the memory. 0 FETCH_DISABLE Buffer Descriptor Fetch operation is disabled for the destination. 1 FC Flow Control 21 3 read-write MEM2MEM_DMA_FC Memory-to-Memory Transfer DMAC is flow controller 0x0 MEM2PER_DMA_FC Memory-to-Peripheral Transfer DMAC is flow controller 0x1 PER2MEM_DMA_FC Peripheral-to-Memory Transfer DMAC is flow controller 0x2 PER2PER_DMA_FC Peripheral-to-Peripheral Transfer DMAC is flow controller 0x3 SRC_INCR Incrementing, Decrementing or Fixed Address for the Source 24 2 read-write INCREMENTING The source address is incremented 0x0 DECREMENTING The source address is decremented 0x1 FIXED The source address remains unchanged 0x2 DST_INCR Incrementing, Decrementing or Fixed Address for the Destination 28 2 read-write INCREMENTING The destination address is incremented 0x0 DECREMENTING The destination address is decremented 0x1 FIXED The destination address remains unchanged 0x2 IEN 30 1 read-write AUTO Automatic Multiple Buffer Transfer 31 1 read-write DISABLE Automatic multiple buffer transfer is disabled. 0 ENABLE Automatic multiple buffer transfer is enabled. This bit enables replay mode or contiguous mode when several buffers are transferred. 1 CFG6 DMAC Channel Configuration Register (ch_num = 6) 0x00000140 32 read-write 0x01000000 SRC_PER Source with Peripheral identifier 0 4 read-write DST_PER Destination with Peripheral identifier 4 4 read-write SRC_REP Source Reloaded from Previous 8 1 read-write CONTIGUOUS_ADDR When automatic mode is activated, source address is contiguous between two buffers. 0 RELOAD_ADDR When automatic mode is activated, the source address and the control register are reloaded from previous transfer. 1 SRC_H2SEL Software or Hardware Selection for the Source 9 1 read-write SW Software handshaking interface is used to trigger a transfer request. 0 HW Hardware handshaking interface is used to trigger a transfer request. 1 SRC_PER_MSB SRC_PER Most Significant Bits 10 2 read-write DST_REP Destination Reloaded from Previous 12 1 read-write CONTIGUOUS_ADDR When automatic mode is activated, destination address is contiguous between two buffers. 0 RELOAD_ADDR When automatic mode is activated, the destination and the control register are reloaded from the pre-vious transfer. 1 DST_H2SEL Software or Hardware Selection for the Destination 13 1 read-write SW Software handshaking interface is used to trigger a transfer request. 0 HW Hardware handshaking interface is used to trigger a transfer request. 1 DST_PER_MSB DST_PER Most Significant Bits 14 2 read-write SOD Stop On Done 16 1 read-write DISABLE STOP ON DONE disabled, the descriptor fetch operation ignores DONE Field of CTRLA register. 0 ENABLE STOP ON DONE activated, the DMAC module is automatically disabled if DONE FIELD is set to 1. 1 LOCK_IF Interface Lock 20 1 read-write DISABLE Interface Lock capability is disabled 0 ENABLE Interface Lock capability is enabled 1 LOCK_B Bus Lock 21 1 read-write DISABLE AHB Bus Locking capability is disabled. 0 LOCK_IF_L Master Interface Arbiter Lock 22 1 read-write CHUNK The Master Interface Arbiter is locked by the channel x for a chunk transfer. 0 BUFFER The Master Interface Arbiter is locked by the channel x for a buffer transfer. 1 AHB_PROT AHB Protection 24 3 read-write FIFOCFG FIFO Configuration 28 2 read-write ALAP_CFG The largest defined length AHB burst is performed on the destination AHB interface. 0x0 HALF_CFG When half FIFO size is available/filled, a source/destination request is serviced. 0x1 ASAP_CFG When there is enough space/data available to perform a single AHB access, then the request is serviced. 0x2 SPIP6 DMAC Channel Source Picture-in-Picture Configuration Register (ch_num = 6) 0x00000144 32 read-write 0x00000000 SPIP_HOLE Source Picture-in-Picture Hole 0 16 read-write SPIP_BOUNDARY Source Picture-in-Picture Boundary 16 10 read-write DPIP6 DMAC Channel Destination Picture-in-Picture Configuration Register (ch_num = 6) 0x00000148 32 read-write 0x00000000 DPIP_HOLE Destination Picture-in-Picture Hole 0 16 read-write DPIP_BOUNDARY Destination Picture-in-Picture Boundary 16 10 read-write SADDR7 DMAC Channel Source Address Register (ch_num = 7) 0x00000154 32 read-write 0x00000000 SADDR Channel x Source Address 0 32 read-write DADDR7 DMAC Channel Destination Address Register (ch_num = 7) 0x00000158 32 read-write 0x00000000 DADDR Channel x Destination Address 0 32 read-write DSCR7 DMAC Channel Descriptor Address Register (ch_num = 7) 0x0000015C 32 read-write 0x00000000 DSCR_IF 0 2 read-write AHB_IF0 The buffer transfer descriptor is fetched via AHB-Lite Interface 0 0x0 AHB_IF1 The buffer transfer descriptor is fetched via AHB-Lite Interface 1 0x1 DSCR Buffer Transfer Descriptor Address 2 30 read-write CTRLA7 DMAC Channel Control A Register (ch_num = 7) 0x00000160 32 read-write 0x00000000 BTSIZE Buffer Transfer Size 0 16 read-write SCSIZE Source Chunk Transfer Size. 16 3 read-write CHK_1 1 data transferred 0x0 CHK_4 4 data transferred 0x1 CHK_8 8 data transferred 0x2 CHK_16 16 data transferred 0x3 CHK_32 32 data transferred 0x4 CHK_64 64 data transferred 0x5 CHK_128 128 data transferred 0x6 CHK_256 256 data transferred 0x7 DCSIZE Destination Chunk Transfer Size 20 3 read-write CHK_1 1 data transferred 0x0 CHK_4 4 data transferred 0x1 CHK_8 8 data transferred 0x2 CHK_16 16 data transferred 0x3 CHK_32 32 data transferred 0x4 CHK_64 64 data transferred 0x5 CHK_128 128 data transferred 0x6 CHK_256 256 data transferred 0x7 SRC_WIDTH Transfer Width for the Source 24 2 read-write BYTE the transfer size is set to 8-bit width 0x0 HALF_WORD the transfer size is set to 16-bit width 0x1 WORD the transfer size is set to 32-bit width 0x2 DST_WIDTH Transfer Width for the Destination 28 2 read-write BYTE the transfer size is set to 8-bit width 0x0 HALF_WORD the transfer size is set to 16-bit width 0x1 WORD the transfer size is set to 32-bit width 0x2 DONE 31 1 read-write CTRLB7 DMAC Channel Control B Register (ch_num = 7) 0x00000164 32 read-write 0x00000000 SIF Source Interface Selection Field 0 2 read-write AHB_IF0 The source transfer is done via AHB-Lite Interface 0 0x0 AHB_IF1 The source transfer is done via AHB-Lite Interface 1 0x1 DIF Destination Interface Selection Field 4 2 read-write AHB_IF0 The destination transfer is done via AHB-Lite Interface 0 0x0 AHB_IF1 The destination transfer is done via AHB-Lite Interface 1 0x1 SRC_PIP Source Picture-in-Picture Mode 8 1 read-write DISABLE Picture-in-Picture mode is disabled. The source data area is contiguous. 0 ENABLE Picture-in-Picture mode is enabled. When the source PIP counter reaches the programmable boundary, the address is automatically incremented by a user defined amount. 1 DST_PIP Destination Picture-in-Picture Mode 12 1 read-write DISABLE Picture-in-Picture mode is disabled. The Destination data area is contiguous. 0 ENABLE Picture-in-Picture mode is enabled. When the Destination PIP counter reaches the programmable boundary the address is automatically incremented by a user-defined amount. 1 SRC_DSCR Source Address Descriptor 16 1 read-write FETCH_FROM_MEM Source address is updated when the descriptor is fetched from the memory. 0 FETCH_DISABLE Buffer Descriptor Fetch operation is disabled for the source. 1 DST_DSCR Destination Address Descriptor 20 1 read-write FETCH_FROM_MEM Destination address is updated when the descriptor is fetched from the memory. 0 FETCH_DISABLE Buffer Descriptor Fetch operation is disabled for the destination. 1 FC Flow Control 21 3 read-write MEM2MEM_DMA_FC Memory-to-Memory Transfer DMAC is flow controller 0x0 MEM2PER_DMA_FC Memory-to-Peripheral Transfer DMAC is flow controller 0x1 PER2MEM_DMA_FC Peripheral-to-Memory Transfer DMAC is flow controller 0x2 PER2PER_DMA_FC Peripheral-to-Peripheral Transfer DMAC is flow controller 0x3 SRC_INCR Incrementing, Decrementing or Fixed Address for the Source 24 2 read-write INCREMENTING The source address is incremented 0x0 DECREMENTING The source address is decremented 0x1 FIXED The source address remains unchanged 0x2 DST_INCR Incrementing, Decrementing or Fixed Address for the Destination 28 2 read-write INCREMENTING The destination address is incremented 0x0 DECREMENTING The destination address is decremented 0x1 FIXED The destination address remains unchanged 0x2 IEN 30 1 read-write AUTO Automatic Multiple Buffer Transfer 31 1 read-write DISABLE Automatic multiple buffer transfer is disabled. 0 ENABLE Automatic multiple buffer transfer is enabled. This bit enables replay mode or contiguous mode when several buffers are transferred. 1 CFG7 DMAC Channel Configuration Register (ch_num = 7) 0x00000168 32 read-write 0x01000000 SRC_PER Source with Peripheral identifier 0 4 read-write DST_PER Destination with Peripheral identifier 4 4 read-write SRC_REP Source Reloaded from Previous 8 1 read-write CONTIGUOUS_ADDR When automatic mode is activated, source address is contiguous between two buffers. 0 RELOAD_ADDR When automatic mode is activated, the source address and the control register are reloaded from previous transfer. 1 SRC_H2SEL Software or Hardware Selection for the Source 9 1 read-write SW Software handshaking interface is used to trigger a transfer request. 0 HW Hardware handshaking interface is used to trigger a transfer request. 1 SRC_PER_MSB SRC_PER Most Significant Bits 10 2 read-write DST_REP Destination Reloaded from Previous 12 1 read-write CONTIGUOUS_ADDR When automatic mode is activated, destination address is contiguous between two buffers. 0 RELOAD_ADDR When automatic mode is activated, the destination and the control register are reloaded from the pre-vious transfer. 1 DST_H2SEL Software or Hardware Selection for the Destination 13 1 read-write SW Software handshaking interface is used to trigger a transfer request. 0 HW Hardware handshaking interface is used to trigger a transfer request. 1 DST_PER_MSB DST_PER Most Significant Bits 14 2 read-write SOD Stop On Done 16 1 read-write DISABLE STOP ON DONE disabled, the descriptor fetch operation ignores DONE Field of CTRLA register. 0 ENABLE STOP ON DONE activated, the DMAC module is automatically disabled if DONE FIELD is set to 1. 1 LOCK_IF Interface Lock 20 1 read-write DISABLE Interface Lock capability is disabled 0 ENABLE Interface Lock capability is enabled 1 LOCK_B Bus Lock 21 1 read-write DISABLE AHB Bus Locking capability is disabled. 0 LOCK_IF_L Master Interface Arbiter Lock 22 1 read-write CHUNK The Master Interface Arbiter is locked by the channel x for a chunk transfer. 0 BUFFER The Master Interface Arbiter is locked by the channel x for a buffer transfer. 1 AHB_PROT AHB Protection 24 3 read-write FIFOCFG FIFO Configuration 28 2 read-write ALAP_CFG The largest defined length AHB burst is performed on the destination AHB interface. 0x0 HALF_CFG When half FIFO size is available/filled, a source/destination request is serviced. 0x1 ASAP_CFG When there is enough space/data available to perform a single AHB access, then the request is serviced. 0x2 SPIP7 DMAC Channel Source Picture-in-Picture Configuration Register (ch_num = 7) 0x0000016C 32 read-write 0x00000000 SPIP_HOLE Source Picture-in-Picture Hole 0 16 read-write SPIP_BOUNDARY Source Picture-in-Picture Boundary 16 10 read-write DPIP7 DMAC Channel Destination Picture-in-Picture Configuration Register (ch_num = 7) 0x00000170 32 read-write 0x00000000 DPIP_HOLE Destination Picture-in-Picture Hole 0 16 read-write DPIP_BOUNDARY Destination Picture-in-Picture Boundary 16 10 read-write WPMR DMAC Write Protect Mode Register 0x000001E4 32 read-write 0x00000000 WPEN Write Protect Enable 0 1 read-write WPKEY Write Protect KEY 8 24 read-write WPSR DMAC Write Protect Status Register 0x000001E8 32 read-only 0x00000000 WPVS Write Protect Violation Status 0 1 read-only WPVSRC Write Protect Violation Source 8 16 read-only AIC 6075H Advanced Interrupt Controller AIC_ 0xFFFFF000 0 0x200 registers FIQ 0 IRQ 31 32 4 0-31 SMR[%s] Source Mode Register 0x00000000 32 read-write PRIOR Priority Level 0 3 read-write SRCTYPE Interrupt Source Type 5 2 read-write INT_LEVEL_SENSITIVE High level Sensitive for internal sourceLow level Sensitive for external source 0x0 INT_EDGE_TRIGGERED Positive edge triggered for internal sourceNegative edge triggered for external source 0x1 EXT_HIGH_LEVEL High level Sensitive for internal sourceHigh level Sensitive for external source 0x2 EXT_POSITIVE_EDGE Positive edge triggered for internal sourcePositive edge triggered for external source 0x3 32 4 0-31 SVR[%s] Source Vector Register 0x00000080 32 read-write VECTOR Source Vector 0 32 read-write IVR Interrupt Vector Register 0x00000100 32 read-only 0x00000000 IRQV Interrupt Vector Register 0 32 read-only FVR FIQ Interrupt Vector Register 0x00000104 32 read-only 0x00000000 FIQV FIQ Vector Register 0 32 read-only ISR Interrupt Status Register 0x00000108 32 read-only 0x00000000 IRQID Current Interrupt Identifier 0 5 read-only IPR Interrupt Pending Register 0x0000010C 32 read-only 0x00000000 FIQ Interrupt Pending 0 1 read-only SYS Interrupt Pending 1 1 read-only PID2 Interrupt Pending 2 1 read-only PID3 Interrupt Pending 3 1 read-only PID4 Interrupt Pending 4 1 read-only PID5 Interrupt Pending 5 1 read-only PID6 Interrupt Pending 6 1 read-only PID7 Interrupt Pending 7 1 read-only PID8 Interrupt Pending 8 1 read-only PID9 Interrupt Pending 9 1 read-only PID10 Interrupt Pending 10 1 read-only PID11 Interrupt Pending 11 1 read-only PID12 Interrupt Pending 12 1 read-only PID13 Interrupt Pending 13 1 read-only PID14 Interrupt Pending 14 1 read-only PID15 Interrupt Pending 15 1 read-only PID16 Interrupt Pending 16 1 read-only PID17 Interrupt Pending 17 1 read-only PID18 Interrupt Pending 18 1 read-only PID19 Interrupt Pending 19 1 read-only PID20 Interrupt Pending 20 1 read-only PID21 Interrupt Pending 21 1 read-only PID22 Interrupt Pending 22 1 read-only PID23 Interrupt Pending 23 1 read-only PID24 Interrupt Pending 24 1 read-only PID25 Interrupt Pending 25 1 read-only PID26 Interrupt Pending 26 1 read-only PID27 Interrupt Pending 27 1 read-only PID28 Interrupt Pending 28 1 read-only PID29 Interrupt Pending 29 1 read-only PID30 Interrupt Pending 30 1 read-only PID31 Interrupt Pending 31 1 read-only IMR Interrupt Mask Register 0x00000110 32 read-only 0x00000000 FIQ Interrupt Mask 0 1 read-only SYS Interrupt Mask 1 1 read-only PID2 Interrupt Mask 2 1 read-only PID3 Interrupt Mask 3 1 read-only PID4 Interrupt Mask 4 1 read-only PID5 Interrupt Mask 5 1 read-only PID6 Interrupt Mask 6 1 read-only PID7 Interrupt Mask 7 1 read-only PID8 Interrupt Mask 8 1 read-only PID9 Interrupt Mask 9 1 read-only PID10 Interrupt Mask 10 1 read-only PID11 Interrupt Mask 11 1 read-only PID12 Interrupt Mask 12 1 read-only PID13 Interrupt Mask 13 1 read-only PID14 Interrupt Mask 14 1 read-only PID15 Interrupt Mask 15 1 read-only PID16 Interrupt Mask 16 1 read-only PID17 Interrupt Mask 17 1 read-only PID18 Interrupt Mask 18 1 read-only PID19 Interrupt Mask 19 1 read-only PID20 Interrupt Mask 20 1 read-only PID21 Interrupt Mask 21 1 read-only PID22 Interrupt Mask 22 1 read-only PID23 Interrupt Mask 23 1 read-only PID24 Interrupt Mask 24 1 read-only PID25 Interrupt Mask 25 1 read-only PID26 Interrupt Mask 26 1 read-only PID27 Interrupt Mask 27 1 read-only PID28 Interrupt Mask 28 1 read-only PID29 Interrupt Mask 29 1 read-only PID30 Interrupt Mask 30 1 read-only PID31 Interrupt Mask 31 1 read-only CISR Core Interrupt Status Register 0x00000114 32 read-only 0x00000000 NFIQ NFIQ Status 0 1 read-only NIRQ NIRQ Status 1 1 read-only IECR Interrupt Enable Command Register 0x00000120 32 write-only FIQ Interrupt Enable 0 1 write-only SYS Interrupt Enable 1 1 write-only PID2 Interrupt Enable 2 1 write-only PID3 Interrupt Enable 3 1 write-only PID4 Interrupt Enable 4 1 write-only PID5 Interrupt Enable 5 1 write-only PID6 Interrupt Enable 6 1 write-only PID7 Interrupt Enable 7 1 write-only PID8 Interrupt Enable 8 1 write-only PID9 Interrupt Enable 9 1 write-only PID10 Interrupt Enable 10 1 write-only PID11 Interrupt Enable 11 1 write-only PID12 Interrupt Enable 12 1 write-only PID13 Interrupt Enable 13 1 write-only PID14 Interrupt Enable 14 1 write-only PID15 Interrupt Enable 15 1 write-only PID16 Interrupt Enable 16 1 write-only PID17 Interrupt Enable 17 1 write-only PID18 Interrupt Enable 18 1 write-only PID19 Interrupt Enable 19 1 write-only PID20 Interrupt Enable 20 1 write-only PID21 Interrupt Enable 21 1 write-only PID22 Interrupt Enable 22 1 write-only PID23 Interrupt Enable 23 1 write-only PID24 Interrupt Enable 24 1 write-only PID25 Interrupt Enable 25 1 write-only PID26 Interrupt Enable 26 1 write-only PID27 Interrupt Enable 27 1 write-only PID28 Interrupt Enable 28 1 write-only PID29 Interrupt Enable 29 1 write-only PID30 Interrupt Enable 30 1 write-only PID31 Interrupt Enable 31 1 write-only IDCR Interrupt Disable Command Register 0x00000124 32 write-only FIQ Interrupt Disable 0 1 write-only SYS Interrupt Disable 1 1 write-only PID2 Interrupt Disable 2 1 write-only PID3 Interrupt Disable 3 1 write-only PID4 Interrupt Disable 4 1 write-only PID5 Interrupt Disable 5 1 write-only PID6 Interrupt Disable 6 1 write-only PID7 Interrupt Disable 7 1 write-only PID8 Interrupt Disable 8 1 write-only PID9 Interrupt Disable 9 1 write-only PID10 Interrupt Disable 10 1 write-only PID11 Interrupt Disable 11 1 write-only PID12 Interrupt Disable 12 1 write-only PID13 Interrupt Disable 13 1 write-only PID14 Interrupt Disable 14 1 write-only PID15 Interrupt Disable 15 1 write-only PID16 Interrupt Disable 16 1 write-only PID17 Interrupt Disable 17 1 write-only PID18 Interrupt Disable 18 1 write-only PID19 Interrupt Disable 19 1 write-only PID20 Interrupt Disable 20 1 write-only PID21 Interrupt Disable 21 1 write-only PID22 Interrupt Disable 22 1 write-only PID23 Interrupt Disable 23 1 write-only PID24 Interrupt Disable 24 1 write-only PID25 Interrupt Disable 25 1 write-only PID26 Interrupt Disable 26 1 write-only PID27 Interrupt Disable 27 1 write-only PID28 Interrupt Disable 28 1 write-only PID29 Interrupt Disable 29 1 write-only PID30 Interrupt Disable 30 1 write-only PID31 Interrupt Disable 31 1 write-only ICCR Interrupt Clear Command Register 0x00000128 32 write-only FIQ Interrupt Clear 0 1 write-only SYS Interrupt Clear 1 1 write-only PID2 Interrupt Clear 2 1 write-only PID3 Interrupt Clear 3 1 write-only PID4 Interrupt Clear 4 1 write-only PID5 Interrupt Clear 5 1 write-only PID6 Interrupt Clear 6 1 write-only PID7 Interrupt Clear 7 1 write-only PID8 Interrupt Clear 8 1 write-only PID9 Interrupt Clear 9 1 write-only PID10 Interrupt Clear 10 1 write-only PID11 Interrupt Clear 11 1 write-only PID12 Interrupt Clear 12 1 write-only PID13 Interrupt Clear 13 1 write-only PID14 Interrupt Clear 14 1 write-only PID15 Interrupt Clear 15 1 write-only PID16 Interrupt Clear 16 1 write-only PID17 Interrupt Clear 17 1 write-only PID18 Interrupt Clear 18 1 write-only PID19 Interrupt Clear 19 1 write-only PID20 Interrupt Clear 20 1 write-only PID21 Interrupt Clear 21 1 write-only PID22 Interrupt Clear 22 1 write-only PID23 Interrupt Clear 23 1 write-only PID24 Interrupt Clear 24 1 write-only PID25 Interrupt Clear 25 1 write-only PID26 Interrupt Clear 26 1 write-only PID27 Interrupt Clear 27 1 write-only PID28 Interrupt Clear 28 1 write-only PID29 Interrupt Clear 29 1 write-only PID30 Interrupt Clear 30 1 write-only PID31 Interrupt Clear 31 1 write-only ISCR Interrupt Set Command Register 0x0000012C 32 write-only FIQ Interrupt Set 0 1 write-only SYS Interrupt Set 1 1 write-only PID2 Interrupt Set 2 1 write-only PID3 Interrupt Set 3 1 write-only PID4 Interrupt Set 4 1 write-only PID5 Interrupt Set 5 1 write-only PID6 Interrupt Set 6 1 write-only PID7 Interrupt Set 7 1 write-only PID8 Interrupt Set 8 1 write-only PID9 Interrupt Set 9 1 write-only PID10 Interrupt Set 10 1 write-only PID11 Interrupt Set 11 1 write-only PID12 Interrupt Set 12 1 write-only PID13 Interrupt Set 13 1 write-only PID14 Interrupt Set 14 1 write-only PID15 Interrupt Set 15 1 write-only PID16 Interrupt Set 16 1 write-only PID17 Interrupt Set 17 1 write-only PID18 Interrupt Set 18 1 write-only PID19 Interrupt Set 19 1 write-only PID20 Interrupt Set 20 1 write-only PID21 Interrupt Set 21 1 write-only PID22 Interrupt Set 22 1 write-only PID23 Interrupt Set 23 1 write-only PID24 Interrupt Set 24 1 write-only PID25 Interrupt Set 25 1 write-only PID26 Interrupt Set 26 1 write-only PID27 Interrupt Set 27 1 write-only PID28 Interrupt Set 28 1 write-only PID29 Interrupt Set 29 1 write-only PID30 Interrupt Set 30 1 write-only PID31 Interrupt Set 31 1 write-only EOICR End of Interrupt Command Register 0x00000130 32 write-only SPU Spurious Interrupt Vector Register 0x00000134 32 read-write 0x00000000 SIVR Spurious Interrupt Vector Register 0 32 read-write DCR Debug Control Register 0x00000138 32 read-write 0x00000000 PROT Protection Mode 0 1 read-write GMSK General Mask 1 1 read-write FFER Fast Forcing Enable Register 0x00000140 32 write-only SYS Fast Forcing Enable 1 1 write-only PID2 Fast Forcing Enable 2 1 write-only PID3 Fast Forcing Enable 3 1 write-only PID4 Fast Forcing Enable 4 1 write-only PID5 Fast Forcing Enable 5 1 write-only PID6 Fast Forcing Enable 6 1 write-only PID7 Fast Forcing Enable 7 1 write-only PID8 Fast Forcing Enable 8 1 write-only PID9 Fast Forcing Enable 9 1 write-only PID10 Fast Forcing Enable 10 1 write-only PID11 Fast Forcing Enable 11 1 write-only PID12 Fast Forcing Enable 12 1 write-only PID13 Fast Forcing Enable 13 1 write-only PID14 Fast Forcing Enable 14 1 write-only PID15 Fast Forcing Enable 15 1 write-only PID16 Fast Forcing Enable 16 1 write-only PID17 Fast Forcing Enable 17 1 write-only PID18 Fast Forcing Enable 18 1 write-only PID19 Fast Forcing Enable 19 1 write-only PID20 Fast Forcing Enable 20 1 write-only PID21 Fast Forcing Enable 21 1 write-only PID22 Fast Forcing Enable 22 1 write-only PID23 Fast Forcing Enable 23 1 write-only PID24 Fast Forcing Enable 24 1 write-only PID25 Fast Forcing Enable 25 1 write-only PID26 Fast Forcing Enable 26 1 write-only PID27 Fast Forcing Enable 27 1 write-only PID28 Fast Forcing Enable 28 1 write-only PID29 Fast Forcing Enable 29 1 write-only PID30 Fast Forcing Enable 30 1 write-only PID31 Fast Forcing Enable 31 1 write-only FFDR Fast Forcing Disable Register 0x00000144 32 write-only SYS Fast Forcing Disable 1 1 write-only PID2 Fast Forcing Disable 2 1 write-only PID3 Fast Forcing Disable 3 1 write-only PID4 Fast Forcing Disable 4 1 write-only PID5 Fast Forcing Disable 5 1 write-only PID6 Fast Forcing Disable 6 1 write-only PID7 Fast Forcing Disable 7 1 write-only PID8 Fast Forcing Disable 8 1 write-only PID9 Fast Forcing Disable 9 1 write-only PID10 Fast Forcing Disable 10 1 write-only PID11 Fast Forcing Disable 11 1 write-only PID12 Fast Forcing Disable 12 1 write-only PID13 Fast Forcing Disable 13 1 write-only PID14 Fast Forcing Disable 14 1 write-only PID15 Fast Forcing Disable 15 1 write-only PID16 Fast Forcing Disable 16 1 write-only PID17 Fast Forcing Disable 17 1 write-only PID18 Fast Forcing Disable 18 1 write-only PID19 Fast Forcing Disable 19 1 write-only PID20 Fast Forcing Disable 20 1 write-only PID21 Fast Forcing Disable 21 1 write-only PID22 Fast Forcing Disable 22 1 write-only PID23 Fast Forcing Disable 23 1 write-only PID24 Fast Forcing Disable 24 1 write-only PID25 Fast Forcing Disable 25 1 write-only PID26 Fast Forcing Disable 26 1 write-only PID27 Fast Forcing Disable 27 1 write-only PID28 Fast Forcing Disable 28 1 write-only PID29 Fast Forcing Disable 29 1 write-only PID30 Fast Forcing Disable 30 1 write-only PID31 Fast Forcing Disable 31 1 write-only FFSR Fast Forcing Status Register 0x00000148 32 read-only 0x00000000 SYS Fast Forcing Status 1 1 read-only PID2 Fast Forcing Status 2 1 read-only PID3 Fast Forcing Status 3 1 read-only PID4 Fast Forcing Status 4 1 read-only PID5 Fast Forcing Status 5 1 read-only PID6 Fast Forcing Status 6 1 read-only PID7 Fast Forcing Status 7 1 read-only PID8 Fast Forcing Status 8 1 read-only PID9 Fast Forcing Status 9 1 read-only PID10 Fast Forcing Status 10 1 read-only PID11 Fast Forcing Status 11 1 read-only PID12 Fast Forcing Status 12 1 read-only PID13 Fast Forcing Status 13 1 read-only PID14 Fast Forcing Status 14 1 read-only PID15 Fast Forcing Status 15 1 read-only PID16 Fast Forcing Status 16 1 read-only PID17 Fast Forcing Status 17 1 read-only PID18 Fast Forcing Status 18 1 read-only PID19 Fast Forcing Status 19 1 read-only PID20 Fast Forcing Status 20 1 read-only PID21 Fast Forcing Status 21 1 read-only PID22 Fast Forcing Status 22 1 read-only PID23 Fast Forcing Status 23 1 read-only PID24 Fast Forcing Status 24 1 read-only PID25 Fast Forcing Status 25 1 read-only PID26 Fast Forcing Status 26 1 read-only PID27 Fast Forcing Status 27 1 read-only PID28 Fast Forcing Status 28 1 read-only PID29 Fast Forcing Status 29 1 read-only PID30 Fast Forcing Status 30 1 read-only PID31 Fast Forcing Status 31 1 read-only WPMR Write Protect Mode Register 0x000001E4 32 read-write 0x00000000 WPEN Write Protect Enable 0 1 read-write WPKEY Write Protect KEY 8 24 read-write WPSR Write Protect Status Register 0x000001E8 32 read-only 0x00000000 WPVS Write Protect Violation Status 0 1 read-only WPVSRC Write Protect Violation Source 8 16 read-only DBGU 6059M Debug Unit DBGU_ 0xFFFFF200 0 0x200 registers DBGU 1 CR Control Register 0x00000000 32 write-only RSTRX Reset Receiver 2 1 write-only RSTTX Reset Transmitter 3 1 write-only RXEN Receiver Enable 4 1 write-only RXDIS Receiver Disable 5 1 write-only TXEN Transmitter Enable 6 1 write-only TXDIS Transmitter Disable 7 1 write-only RSTSTA Reset Status Bits 8 1 write-only MR Mode Register 0x00000004 32 read-write 0x00000000 PAR Parity Type 9 3 read-write EVEN Even Parity 0x0 ODD Odd Parity 0x1 SPACE Space: Parity forced to 0 0x2 MARK Mark: Parity forced to 1 0x3 NONE No Parity 0x4 CHMODE Channel Mode 14 2 read-write NORM Normal Mode 0x0 AUTO Automatic Echo 0x1 LOCLOOP Local Loopback 0x2 REMLOOP Remote Loopback 0x3 IER Interrupt Enable Register 0x00000008 32 write-only RXRDY Enable RXRDY Interrupt 0 1 write-only TXRDY Enable TXRDY Interrupt 1 1 write-only OVRE Enable Overrun Error Interrupt 5 1 write-only FRAME Enable Framing Error Interrupt 6 1 write-only PARE Enable Parity Error Interrupt 7 1 write-only TXEMPTY Enable TXEMPTY Interrupt 9 1 write-only COMMTX Enable COMMTX (from ARM) Interrupt 30 1 write-only COMMRX Enable COMMRX (from ARM) Interrupt 31 1 write-only IDR Interrupt Disable Register 0x0000000C 32 write-only RXRDY Disable RXRDY Interrupt 0 1 write-only TXRDY Disable TXRDY Interrupt 1 1 write-only OVRE Disable Overrun Error Interrupt 5 1 write-only FRAME Disable Framing Error Interrupt 6 1 write-only PARE Disable Parity Error Interrupt 7 1 write-only TXEMPTY Disable TXEMPTY Interrupt 9 1 write-only COMMTX Disable COMMTX (from ARM) Interrupt 30 1 write-only COMMRX Disable COMMRX (from ARM) Interrupt 31 1 write-only IMR Interrupt Mask Register 0x00000010 32 read-only 0x00000000 RXRDY Mask RXRDY Interrupt 0 1 read-only TXRDY Disable TXRDY Interrupt 1 1 read-only OVRE Mask Overrun Error Interrupt 5 1 read-only FRAME Mask Framing Error Interrupt 6 1 read-only PARE Mask Parity Error Interrupt 7 1 read-only TXEMPTY Mask TXEMPTY Interrupt 9 1 read-only COMMTX Mask COMMTX Interrupt 30 1 read-only COMMRX Mask COMMRX Interrupt 31 1 read-only SR Status Register 0x00000014 32 read-only RXRDY Receiver Ready 0 1 read-only TXRDY Transmitter Ready 1 1 read-only OVRE Overrun Error 5 1 read-only FRAME Framing Error 6 1 read-only PARE Parity Error 7 1 read-only TXEMPTY Transmitter Empty 9 1 read-only COMMTX Debug Communication Channel Write Status 30 1 read-only COMMRX Debug Communication Channel Read Status 31 1 read-only RHR Receive Holding Register 0x00000018 32 read-only 0x00000000 RXCHR Received Character 0 8 read-only THR Transmit Holding Register 0x0000001C 32 write-only TXCHR Character to be Transmitted 0 8 write-only BRGR Baud Rate Generator Register 0x00000020 32 read-write 0x00000000 CD Clock Divisor 0 16 read-write DISABLED DBGU Disabled 0 MCK MCK 1 CIDR Chip ID Register 0x00000040 32 read-only VERSION Version of the Device 0 5 read-only EPROC Embedded Processor 5 3 read-only ARM946ES ARM946ES 0x1 ARM7TDMI ARM7TDMI 0x2 CM3 Cortex-M3 0x3 ARM920T ARM920T 0x4 ARM926EJS ARM926EJS 0x5 CA5 Cortex-A5 0x6 NVPSIZ Nonvolatile Program Memory Size 8 4 read-only NONE None 0x0 8K 8K bytes 0x1 16K 16K bytes 0x2 32K 32K bytes 0x3 64K 64K bytes 0x5 128K 128K bytes 0x7 256K 256K bytes 0x9 512K 512K bytes 0xA 1024K 1024K bytes 0xC 2048K 2048K bytes 0xE NVPSIZ2 12 4 read-only NONE None 0x0 8K 8K bytes 0x1 16K 16K bytes 0x2 32K 32K bytes 0x3 64K 64K bytes 0x5 128K 128K bytes 0x7 256K 256K bytes 0x9 512K 512K bytes 0xA 1024K 1024K bytes 0xC 2048K 2048K bytes 0xE SRAMSIZ Internal SRAM Size 16 4 read-only 1K 1K bytes 0x1 2K 2K bytes 0x2 6K 6K bytes 0x3 112K 112K bytes 0x4 4K 4K bytes 0x5 80K 80K bytes 0x6 160K 160K bytes 0x7 8K 8K bytes 0x8 16K 16K bytes 0x9 32K 32K bytes 0xA 64K 64K bytes 0xB 128K 128K bytes 0xC 256K 256K bytes 0xD 96K 96K bytes 0xE 512K 512K bytes 0xF ARCH Architecture Identifier 20 8 read-only AT91SAM9xx AT91SAM9xx Series 0x19 AT91SAM9XExx AT91SAM9XExx Series 0x29 AT91x34 AT91x34 Series 0x34 CAP7 CAP7 Series 0x37 CAP9 CAP9 Series 0x39 CAP11 CAP11 Series 0x3B AT91x40 AT91x40 Series 0x40 AT91x42 AT91x42 Series 0x42 AT91x55 AT91x55 Series 0x55 AT91SAM7Axx AT91SAM7Axx Series 0x60 AT91SAM7AQxx AT91SAM7AQxx Series 0x61 AT91x63 AT91x63 Series 0x63 AT91SAM7Sxx AT91SAM7Sxx Series 0x70 AT91SAM7XCxx AT91SAM7XCxx Series 0x71 AT91SAM7SExx AT91SAM7SExx Series 0x72 AT91SAM7Lxx AT91SAM7Lxx Series 0x73 AT91SAM7Xxx AT91SAM7Xxx Series 0x75 AT91SAM7SLxx AT91SAM7SLxx Series 0x76 ATSAM3UxC ATSAM3UxC Series (100-pin version) 0x80 ATSAM3UxE ATSAM3UxE Series (144-pin version) 0x81 ATSAM3AxC ATSAM3AxC Series (100-pin version) 0x83 ATSAM3XxC ATSAM3XxC Series (100-pin version) 0x84 ATSAM3XxE ATSAM3XxE Series (144-pin version) 0x85 ATSAM3XxG ATSAM3XxG Series (208/217-pin version) 0x86 ATSAM3SxA ATSAM3SxA Series (48-pin version) 0x88 ATSAM3SxB ATSAM3SxB Series (64-pin version) 0x89 ATSAM3SxC ATSAM3SxC Series (100-pin version) 0x8A AT91x92 AT91x92 Series 0x92 ATSAM3NxA ATSAM3NxA Series (48-pin version) 0x93 ATSAM3NxB ATSAM3NxB Series (64-pin version) 0x94 ATSAM3NxC ATSAM3NxC Series (100-pin version) 0x95 ATSAM3SDxA ATSAM3SDxA Series (48-pin version) 0x98 ATSAM3SDxB ATSAM3SDxB Series (64-pin version) 0x99 ATSAM3SDxC ATSAM3SDxC Series (100-pin version) 0x9A AT75Cxx AT75Cxx Series 0xF0 NVPTYP Nonvolatile Program Memory Type 28 3 read-only ROM ROM 0x0 ROMLESS ROMless or on-chip Flash 0x1 FLASH Embedded Flash Memory 0x2 ROM_FLASH ROM and Embedded Flash MemoryNVPSIZ is ROM size NVPSIZ2 is Flash size 0x3 SRAM SRAM emulating ROM 0x4 EXT Extension Flag 31 1 read-only EXID Chip ID Extension Register 0x00000044 32 read-only EXID Chip ID Extension 0 32 read-only FNR Force NTRST Register 0x00000048 32 read-write 0x00000000 FNTRST Force NTRST 0 1 read-write PIOA 11004F Parallel Input/Output Controller A PIO PIOA_ 0xFFFFF400 0 0x200 registers PIOA 2 PER PIO Enable Register 0x00000000 32 write-only P0 PIO Enable 0 1 write-only P1 PIO Enable 1 1 write-only P2 PIO Enable 2 1 write-only P3 PIO Enable 3 1 write-only P4 PIO Enable 4 1 write-only P5 PIO Enable 5 1 write-only P6 PIO Enable 6 1 write-only P7 PIO Enable 7 1 write-only P8 PIO Enable 8 1 write-only P9 PIO Enable 9 1 write-only P10 PIO Enable 10 1 write-only P11 PIO Enable 11 1 write-only P12 PIO Enable 12 1 write-only P13 PIO Enable 13 1 write-only P14 PIO Enable 14 1 write-only P15 PIO Enable 15 1 write-only P16 PIO Enable 16 1 write-only P17 PIO Enable 17 1 write-only P18 PIO Enable 18 1 write-only P19 PIO Enable 19 1 write-only P20 PIO Enable 20 1 write-only P21 PIO Enable 21 1 write-only P22 PIO Enable 22 1 write-only P23 PIO Enable 23 1 write-only P24 PIO Enable 24 1 write-only P25 PIO Enable 25 1 write-only P26 PIO Enable 26 1 write-only P27 PIO Enable 27 1 write-only P28 PIO Enable 28 1 write-only P29 PIO Enable 29 1 write-only P30 PIO Enable 30 1 write-only P31 PIO Enable 31 1 write-only PDR PIO Disable Register 0x00000004 32 write-only P0 PIO Disable 0 1 write-only P1 PIO Disable 1 1 write-only P2 PIO Disable 2 1 write-only P3 PIO Disable 3 1 write-only P4 PIO Disable 4 1 write-only P5 PIO Disable 5 1 write-only P6 PIO Disable 6 1 write-only P7 PIO Disable 7 1 write-only P8 PIO Disable 8 1 write-only P9 PIO Disable 9 1 write-only P10 PIO Disable 10 1 write-only P11 PIO Disable 11 1 write-only P12 PIO Disable 12 1 write-only P13 PIO Disable 13 1 write-only P14 PIO Disable 14 1 write-only P15 PIO Disable 15 1 write-only P16 PIO Disable 16 1 write-only P17 PIO Disable 17 1 write-only P18 PIO Disable 18 1 write-only P19 PIO Disable 19 1 write-only P20 PIO Disable 20 1 write-only P21 PIO Disable 21 1 write-only P22 PIO Disable 22 1 write-only P23 PIO Disable 23 1 write-only P24 PIO Disable 24 1 write-only P25 PIO Disable 25 1 write-only P26 PIO Disable 26 1 write-only P27 PIO Disable 27 1 write-only P28 PIO Disable 28 1 write-only P29 PIO Disable 29 1 write-only P30 PIO Disable 30 1 write-only P31 PIO Disable 31 1 write-only PSR PIO Status Register 0x00000008 32 read-only P0 PIO Status 0 1 read-only P1 PIO Status 1 1 read-only P2 PIO Status 2 1 read-only P3 PIO Status 3 1 read-only P4 PIO Status 4 1 read-only P5 PIO Status 5 1 read-only P6 PIO Status 6 1 read-only P7 PIO Status 7 1 read-only P8 PIO Status 8 1 read-only P9 PIO Status 9 1 read-only P10 PIO Status 10 1 read-only P11 PIO Status 11 1 read-only P12 PIO Status 12 1 read-only P13 PIO Status 13 1 read-only P14 PIO Status 14 1 read-only P15 PIO Status 15 1 read-only P16 PIO Status 16 1 read-only P17 PIO Status 17 1 read-only P18 PIO Status 18 1 read-only P19 PIO Status 19 1 read-only P20 PIO Status 20 1 read-only P21 PIO Status 21 1 read-only P22 PIO Status 22 1 read-only P23 PIO Status 23 1 read-only P24 PIO Status 24 1 read-only P25 PIO Status 25 1 read-only P26 PIO Status 26 1 read-only P27 PIO Status 27 1 read-only P28 PIO Status 28 1 read-only P29 PIO Status 29 1 read-only P30 PIO Status 30 1 read-only P31 PIO Status 31 1 read-only OER Output Enable Register 0x00000010 32 write-only P0 Output Enable 0 1 write-only P1 Output Enable 1 1 write-only P2 Output Enable 2 1 write-only P3 Output Enable 3 1 write-only P4 Output Enable 4 1 write-only P5 Output Enable 5 1 write-only P6 Output Enable 6 1 write-only P7 Output Enable 7 1 write-only P8 Output Enable 8 1 write-only P9 Output Enable 9 1 write-only P10 Output Enable 10 1 write-only P11 Output Enable 11 1 write-only P12 Output Enable 12 1 write-only P13 Output Enable 13 1 write-only P14 Output Enable 14 1 write-only P15 Output Enable 15 1 write-only P16 Output Enable 16 1 write-only P17 Output Enable 17 1 write-only P18 Output Enable 18 1 write-only P19 Output Enable 19 1 write-only P20 Output Enable 20 1 write-only P21 Output Enable 21 1 write-only P22 Output Enable 22 1 write-only P23 Output Enable 23 1 write-only P24 Output Enable 24 1 write-only P25 Output Enable 25 1 write-only P26 Output Enable 26 1 write-only P27 Output Enable 27 1 write-only P28 Output Enable 28 1 write-only P29 Output Enable 29 1 write-only P30 Output Enable 30 1 write-only P31 Output Enable 31 1 write-only ODR Output Disable Register 0x00000014 32 write-only P0 Output Disable 0 1 write-only P1 Output Disable 1 1 write-only P2 Output Disable 2 1 write-only P3 Output Disable 3 1 write-only P4 Output Disable 4 1 write-only P5 Output Disable 5 1 write-only P6 Output Disable 6 1 write-only P7 Output Disable 7 1 write-only P8 Output Disable 8 1 write-only P9 Output Disable 9 1 write-only P10 Output Disable 10 1 write-only P11 Output Disable 11 1 write-only P12 Output Disable 12 1 write-only P13 Output Disable 13 1 write-only P14 Output Disable 14 1 write-only P15 Output Disable 15 1 write-only P16 Output Disable 16 1 write-only P17 Output Disable 17 1 write-only P18 Output Disable 18 1 write-only P19 Output Disable 19 1 write-only P20 Output Disable 20 1 write-only P21 Output Disable 21 1 write-only P22 Output Disable 22 1 write-only P23 Output Disable 23 1 write-only P24 Output Disable 24 1 write-only P25 Output Disable 25 1 write-only P26 Output Disable 26 1 write-only P27 Output Disable 27 1 write-only P28 Output Disable 28 1 write-only P29 Output Disable 29 1 write-only P30 Output Disable 30 1 write-only P31 Output Disable 31 1 write-only OSR Output Status Register 0x00000018 32 read-only 0x00000000 P0 Output Status 0 1 read-only P1 Output Status 1 1 read-only P2 Output Status 2 1 read-only P3 Output Status 3 1 read-only P4 Output Status 4 1 read-only P5 Output Status 5 1 read-only P6 Output Status 6 1 read-only P7 Output Status 7 1 read-only P8 Output Status 8 1 read-only P9 Output Status 9 1 read-only P10 Output Status 10 1 read-only P11 Output Status 11 1 read-only P12 Output Status 12 1 read-only P13 Output Status 13 1 read-only P14 Output Status 14 1 read-only P15 Output Status 15 1 read-only P16 Output Status 16 1 read-only P17 Output Status 17 1 read-only P18 Output Status 18 1 read-only P19 Output Status 19 1 read-only P20 Output Status 20 1 read-only P21 Output Status 21 1 read-only P22 Output Status 22 1 read-only P23 Output Status 23 1 read-only P24 Output Status 24 1 read-only P25 Output Status 25 1 read-only P26 Output Status 26 1 read-only P27 Output Status 27 1 read-only P28 Output Status 28 1 read-only P29 Output Status 29 1 read-only P30 Output Status 30 1 read-only P31 Output Status 31 1 read-only IFER Glitch Input Filter Enable Register 0x00000020 32 write-only P0 Input Filter Enable 0 1 write-only P1 Input Filter Enable 1 1 write-only P2 Input Filter Enable 2 1 write-only P3 Input Filter Enable 3 1 write-only P4 Input Filter Enable 4 1 write-only P5 Input Filter Enable 5 1 write-only P6 Input Filter Enable 6 1 write-only P7 Input Filter Enable 7 1 write-only P8 Input Filter Enable 8 1 write-only P9 Input Filter Enable 9 1 write-only P10 Input Filter Enable 10 1 write-only P11 Input Filter Enable 11 1 write-only P12 Input Filter Enable 12 1 write-only P13 Input Filter Enable 13 1 write-only P14 Input Filter Enable 14 1 write-only P15 Input Filter Enable 15 1 write-only P16 Input Filter Enable 16 1 write-only P17 Input Filter Enable 17 1 write-only P18 Input Filter Enable 18 1 write-only P19 Input Filter Enable 19 1 write-only P20 Input Filter Enable 20 1 write-only P21 Input Filter Enable 21 1 write-only P22 Input Filter Enable 22 1 write-only P23 Input Filter Enable 23 1 write-only P24 Input Filter Enable 24 1 write-only P25 Input Filter Enable 25 1 write-only P26 Input Filter Enable 26 1 write-only P27 Input Filter Enable 27 1 write-only P28 Input Filter Enable 28 1 write-only P29 Input Filter Enable 29 1 write-only P30 Input Filter Enable 30 1 write-only P31 Input Filter Enable 31 1 write-only IFDR Glitch Input Filter Disable Register 0x00000024 32 write-only P0 Input Filter Disable 0 1 write-only P1 Input Filter Disable 1 1 write-only P2 Input Filter Disable 2 1 write-only P3 Input Filter Disable 3 1 write-only P4 Input Filter Disable 4 1 write-only P5 Input Filter Disable 5 1 write-only P6 Input Filter Disable 6 1 write-only P7 Input Filter Disable 7 1 write-only P8 Input Filter Disable 8 1 write-only P9 Input Filter Disable 9 1 write-only P10 Input Filter Disable 10 1 write-only P11 Input Filter Disable 11 1 write-only P12 Input Filter Disable 12 1 write-only P13 Input Filter Disable 13 1 write-only P14 Input Filter Disable 14 1 write-only P15 Input Filter Disable 15 1 write-only P16 Input Filter Disable 16 1 write-only P17 Input Filter Disable 17 1 write-only P18 Input Filter Disable 18 1 write-only P19 Input Filter Disable 19 1 write-only P20 Input Filter Disable 20 1 write-only P21 Input Filter Disable 21 1 write-only P22 Input Filter Disable 22 1 write-only P23 Input Filter Disable 23 1 write-only P24 Input Filter Disable 24 1 write-only P25 Input Filter Disable 25 1 write-only P26 Input Filter Disable 26 1 write-only P27 Input Filter Disable 27 1 write-only P28 Input Filter Disable 28 1 write-only P29 Input Filter Disable 29 1 write-only P30 Input Filter Disable 30 1 write-only P31 Input Filter Disable 31 1 write-only IFSR Glitch Input Filter Status Register 0x00000028 32 read-only 0x00000000 P0 Input Filer Status 0 1 read-only P1 Input Filer Status 1 1 read-only P2 Input Filer Status 2 1 read-only P3 Input Filer Status 3 1 read-only P4 Input Filer Status 4 1 read-only P5 Input Filer Status 5 1 read-only P6 Input Filer Status 6 1 read-only P7 Input Filer Status 7 1 read-only P8 Input Filer Status 8 1 read-only P9 Input Filer Status 9 1 read-only P10 Input Filer Status 10 1 read-only P11 Input Filer Status 11 1 read-only P12 Input Filer Status 12 1 read-only P13 Input Filer Status 13 1 read-only P14 Input Filer Status 14 1 read-only P15 Input Filer Status 15 1 read-only P16 Input Filer Status 16 1 read-only P17 Input Filer Status 17 1 read-only P18 Input Filer Status 18 1 read-only P19 Input Filer Status 19 1 read-only P20 Input Filer Status 20 1 read-only P21 Input Filer Status 21 1 read-only P22 Input Filer Status 22 1 read-only P23 Input Filer Status 23 1 read-only P24 Input Filer Status 24 1 read-only P25 Input Filer Status 25 1 read-only P26 Input Filer Status 26 1 read-only P27 Input Filer Status 27 1 read-only P28 Input Filer Status 28 1 read-only P29 Input Filer Status 29 1 read-only P30 Input Filer Status 30 1 read-only P31 Input Filer Status 31 1 read-only SODR Set Output Data Register 0x00000030 32 write-only P0 Set Output Data 0 1 write-only P1 Set Output Data 1 1 write-only P2 Set Output Data 2 1 write-only P3 Set Output Data 3 1 write-only P4 Set Output Data 4 1 write-only P5 Set Output Data 5 1 write-only P6 Set Output Data 6 1 write-only P7 Set Output Data 7 1 write-only P8 Set Output Data 8 1 write-only P9 Set Output Data 9 1 write-only P10 Set Output Data 10 1 write-only P11 Set Output Data 11 1 write-only P12 Set Output Data 12 1 write-only P13 Set Output Data 13 1 write-only P14 Set Output Data 14 1 write-only P15 Set Output Data 15 1 write-only P16 Set Output Data 16 1 write-only P17 Set Output Data 17 1 write-only P18 Set Output Data 18 1 write-only P19 Set Output Data 19 1 write-only P20 Set Output Data 20 1 write-only P21 Set Output Data 21 1 write-only P22 Set Output Data 22 1 write-only P23 Set Output Data 23 1 write-only P24 Set Output Data 24 1 write-only P25 Set Output Data 25 1 write-only P26 Set Output Data 26 1 write-only P27 Set Output Data 27 1 write-only P28 Set Output Data 28 1 write-only P29 Set Output Data 29 1 write-only P30 Set Output Data 30 1 write-only P31 Set Output Data 31 1 write-only CODR Clear Output Data Register 0x00000034 32 write-only P0 Clear Output Data 0 1 write-only P1 Clear Output Data 1 1 write-only P2 Clear Output Data 2 1 write-only P3 Clear Output Data 3 1 write-only P4 Clear Output Data 4 1 write-only P5 Clear Output Data 5 1 write-only P6 Clear Output Data 6 1 write-only P7 Clear Output Data 7 1 write-only P8 Clear Output Data 8 1 write-only P9 Clear Output Data 9 1 write-only P10 Clear Output Data 10 1 write-only P11 Clear Output Data 11 1 write-only P12 Clear Output Data 12 1 write-only P13 Clear Output Data 13 1 write-only P14 Clear Output Data 14 1 write-only P15 Clear Output Data 15 1 write-only P16 Clear Output Data 16 1 write-only P17 Clear Output Data 17 1 write-only P18 Clear Output Data 18 1 write-only P19 Clear Output Data 19 1 write-only P20 Clear Output Data 20 1 write-only P21 Clear Output Data 21 1 write-only P22 Clear Output Data 22 1 write-only P23 Clear Output Data 23 1 write-only P24 Clear Output Data 24 1 write-only P25 Clear Output Data 25 1 write-only P26 Clear Output Data 26 1 write-only P27 Clear Output Data 27 1 write-only P28 Clear Output Data 28 1 write-only P29 Clear Output Data 29 1 write-only P30 Clear Output Data 30 1 write-only P31 Clear Output Data 31 1 write-only ODSR Output Data Status Register 0x00000038 32 read-write P0 Output Data Status 0 1 read-write P1 Output Data Status 1 1 read-write P2 Output Data Status 2 1 read-write P3 Output Data Status 3 1 read-write P4 Output Data Status 4 1 read-write P5 Output Data Status 5 1 read-write P6 Output Data Status 6 1 read-write P7 Output Data Status 7 1 read-write P8 Output Data Status 8 1 read-write P9 Output Data Status 9 1 read-write P10 Output Data Status 10 1 read-write P11 Output Data Status 11 1 read-write P12 Output Data Status 12 1 read-write P13 Output Data Status 13 1 read-write P14 Output Data Status 14 1 read-write P15 Output Data Status 15 1 read-write P16 Output Data Status 16 1 read-write P17 Output Data Status 17 1 read-write P18 Output Data Status 18 1 read-write P19 Output Data Status 19 1 read-write P20 Output Data Status 20 1 read-write P21 Output Data Status 21 1 read-write P22 Output Data Status 22 1 read-write P23 Output Data Status 23 1 read-write P24 Output Data Status 24 1 read-write P25 Output Data Status 25 1 read-write P26 Output Data Status 26 1 read-write P27 Output Data Status 27 1 read-write P28 Output Data Status 28 1 read-write P29 Output Data Status 29 1 read-write P30 Output Data Status 30 1 read-write P31 Output Data Status 31 1 read-write PDSR Pin Data Status Register 0x0000003C 32 read-only P0 Output Data Status 0 1 read-only P1 Output Data Status 1 1 read-only P2 Output Data Status 2 1 read-only P3 Output Data Status 3 1 read-only P4 Output Data Status 4 1 read-only P5 Output Data Status 5 1 read-only P6 Output Data Status 6 1 read-only P7 Output Data Status 7 1 read-only P8 Output Data Status 8 1 read-only P9 Output Data Status 9 1 read-only P10 Output Data Status 10 1 read-only P11 Output Data Status 11 1 read-only P12 Output Data Status 12 1 read-only P13 Output Data Status 13 1 read-only P14 Output Data Status 14 1 read-only P15 Output Data Status 15 1 read-only P16 Output Data Status 16 1 read-only P17 Output Data Status 17 1 read-only P18 Output Data Status 18 1 read-only P19 Output Data Status 19 1 read-only P20 Output Data Status 20 1 read-only P21 Output Data Status 21 1 read-only P22 Output Data Status 22 1 read-only P23 Output Data Status 23 1 read-only P24 Output Data Status 24 1 read-only P25 Output Data Status 25 1 read-only P26 Output Data Status 26 1 read-only P27 Output Data Status 27 1 read-only P28 Output Data Status 28 1 read-only P29 Output Data Status 29 1 read-only P30 Output Data Status 30 1 read-only P31 Output Data Status 31 1 read-only IER Interrupt Enable Register 0x00000040 32 write-only P0 Input Change Interrupt Enable 0 1 write-only P1 Input Change Interrupt Enable 1 1 write-only P2 Input Change Interrupt Enable 2 1 write-only P3 Input Change Interrupt Enable 3 1 write-only P4 Input Change Interrupt Enable 4 1 write-only P5 Input Change Interrupt Enable 5 1 write-only P6 Input Change Interrupt Enable 6 1 write-only P7 Input Change Interrupt Enable 7 1 write-only P8 Input Change Interrupt Enable 8 1 write-only P9 Input Change Interrupt Enable 9 1 write-only P10 Input Change Interrupt Enable 10 1 write-only P11 Input Change Interrupt Enable 11 1 write-only P12 Input Change Interrupt Enable 12 1 write-only P13 Input Change Interrupt Enable 13 1 write-only P14 Input Change Interrupt Enable 14 1 write-only P15 Input Change Interrupt Enable 15 1 write-only P16 Input Change Interrupt Enable 16 1 write-only P17 Input Change Interrupt Enable 17 1 write-only P18 Input Change Interrupt Enable 18 1 write-only P19 Input Change Interrupt Enable 19 1 write-only P20 Input Change Interrupt Enable 20 1 write-only P21 Input Change Interrupt Enable 21 1 write-only P22 Input Change Interrupt Enable 22 1 write-only P23 Input Change Interrupt Enable 23 1 write-only P24 Input Change Interrupt Enable 24 1 write-only P25 Input Change Interrupt Enable 25 1 write-only P26 Input Change Interrupt Enable 26 1 write-only P27 Input Change Interrupt Enable 27 1 write-only P28 Input Change Interrupt Enable 28 1 write-only P29 Input Change Interrupt Enable 29 1 write-only P30 Input Change Interrupt Enable 30 1 write-only P31 Input Change Interrupt Enable 31 1 write-only IDR Interrupt Disable Register 0x00000044 32 write-only P0 Input Change Interrupt Disable 0 1 write-only P1 Input Change Interrupt Disable 1 1 write-only P2 Input Change Interrupt Disable 2 1 write-only P3 Input Change Interrupt Disable 3 1 write-only P4 Input Change Interrupt Disable 4 1 write-only P5 Input Change Interrupt Disable 5 1 write-only P6 Input Change Interrupt Disable 6 1 write-only P7 Input Change Interrupt Disable 7 1 write-only P8 Input Change Interrupt Disable 8 1 write-only P9 Input Change Interrupt Disable 9 1 write-only P10 Input Change Interrupt Disable 10 1 write-only P11 Input Change Interrupt Disable 11 1 write-only P12 Input Change Interrupt Disable 12 1 write-only P13 Input Change Interrupt Disable 13 1 write-only P14 Input Change Interrupt Disable 14 1 write-only P15 Input Change Interrupt Disable 15 1 write-only P16 Input Change Interrupt Disable 16 1 write-only P17 Input Change Interrupt Disable 17 1 write-only P18 Input Change Interrupt Disable 18 1 write-only P19 Input Change Interrupt Disable 19 1 write-only P20 Input Change Interrupt Disable 20 1 write-only P21 Input Change Interrupt Disable 21 1 write-only P22 Input Change Interrupt Disable 22 1 write-only P23 Input Change Interrupt Disable 23 1 write-only P24 Input Change Interrupt Disable 24 1 write-only P25 Input Change Interrupt Disable 25 1 write-only P26 Input Change Interrupt Disable 26 1 write-only P27 Input Change Interrupt Disable 27 1 write-only P28 Input Change Interrupt Disable 28 1 write-only P29 Input Change Interrupt Disable 29 1 write-only P30 Input Change Interrupt Disable 30 1 write-only P31 Input Change Interrupt Disable 31 1 write-only IMR Interrupt Mask Register 0x00000048 32 read-only 0x00000000 P0 Input Change Interrupt Mask 0 1 read-only P1 Input Change Interrupt Mask 1 1 read-only P2 Input Change Interrupt Mask 2 1 read-only P3 Input Change Interrupt Mask 3 1 read-only P4 Input Change Interrupt Mask 4 1 read-only P5 Input Change Interrupt Mask 5 1 read-only P6 Input Change Interrupt Mask 6 1 read-only P7 Input Change Interrupt Mask 7 1 read-only P8 Input Change Interrupt Mask 8 1 read-only P9 Input Change Interrupt Mask 9 1 read-only P10 Input Change Interrupt Mask 10 1 read-only P11 Input Change Interrupt Mask 11 1 read-only P12 Input Change Interrupt Mask 12 1 read-only P13 Input Change Interrupt Mask 13 1 read-only P14 Input Change Interrupt Mask 14 1 read-only P15 Input Change Interrupt Mask 15 1 read-only P16 Input Change Interrupt Mask 16 1 read-only P17 Input Change Interrupt Mask 17 1 read-only P18 Input Change Interrupt Mask 18 1 read-only P19 Input Change Interrupt Mask 19 1 read-only P20 Input Change Interrupt Mask 20 1 read-only P21 Input Change Interrupt Mask 21 1 read-only P22 Input Change Interrupt Mask 22 1 read-only P23 Input Change Interrupt Mask 23 1 read-only P24 Input Change Interrupt Mask 24 1 read-only P25 Input Change Interrupt Mask 25 1 read-only P26 Input Change Interrupt Mask 26 1 read-only P27 Input Change Interrupt Mask 27 1 read-only P28 Input Change Interrupt Mask 28 1 read-only P29 Input Change Interrupt Mask 29 1 read-only P30 Input Change Interrupt Mask 30 1 read-only P31 Input Change Interrupt Mask 31 1 read-only ISR Interrupt Status Register 0x0000004C 32 read-only 0x00000000 P0 Input Change Interrupt Status 0 1 read-only P1 Input Change Interrupt Status 1 1 read-only P2 Input Change Interrupt Status 2 1 read-only P3 Input Change Interrupt Status 3 1 read-only P4 Input Change Interrupt Status 4 1 read-only P5 Input Change Interrupt Status 5 1 read-only P6 Input Change Interrupt Status 6 1 read-only P7 Input Change Interrupt Status 7 1 read-only P8 Input Change Interrupt Status 8 1 read-only P9 Input Change Interrupt Status 9 1 read-only P10 Input Change Interrupt Status 10 1 read-only P11 Input Change Interrupt Status 11 1 read-only P12 Input Change Interrupt Status 12 1 read-only P13 Input Change Interrupt Status 13 1 read-only P14 Input Change Interrupt Status 14 1 read-only P15 Input Change Interrupt Status 15 1 read-only P16 Input Change Interrupt Status 16 1 read-only P17 Input Change Interrupt Status 17 1 read-only P18 Input Change Interrupt Status 18 1 read-only P19 Input Change Interrupt Status 19 1 read-only P20 Input Change Interrupt Status 20 1 read-only P21 Input Change Interrupt Status 21 1 read-only P22 Input Change Interrupt Status 22 1 read-only P23 Input Change Interrupt Status 23 1 read-only P24 Input Change Interrupt Status 24 1 read-only P25 Input Change Interrupt Status 25 1 read-only P26 Input Change Interrupt Status 26 1 read-only P27 Input Change Interrupt Status 27 1 read-only P28 Input Change Interrupt Status 28 1 read-only P29 Input Change Interrupt Status 29 1 read-only P30 Input Change Interrupt Status 30 1 read-only P31 Input Change Interrupt Status 31 1 read-only MDER Multi-driver Enable Register 0x00000050 32 write-only P0 Multi Drive Enable. 0 1 write-only P1 Multi Drive Enable. 1 1 write-only P2 Multi Drive Enable. 2 1 write-only P3 Multi Drive Enable. 3 1 write-only P4 Multi Drive Enable. 4 1 write-only P5 Multi Drive Enable. 5 1 write-only P6 Multi Drive Enable. 6 1 write-only P7 Multi Drive Enable. 7 1 write-only P8 Multi Drive Enable. 8 1 write-only P9 Multi Drive Enable. 9 1 write-only P10 Multi Drive Enable. 10 1 write-only P11 Multi Drive Enable. 11 1 write-only P12 Multi Drive Enable. 12 1 write-only P13 Multi Drive Enable. 13 1 write-only P14 Multi Drive Enable. 14 1 write-only P15 Multi Drive Enable. 15 1 write-only P16 Multi Drive Enable. 16 1 write-only P17 Multi Drive Enable. 17 1 write-only P18 Multi Drive Enable. 18 1 write-only P19 Multi Drive Enable. 19 1 write-only P20 Multi Drive Enable. 20 1 write-only P21 Multi Drive Enable. 21 1 write-only P22 Multi Drive Enable. 22 1 write-only P23 Multi Drive Enable. 23 1 write-only P24 Multi Drive Enable. 24 1 write-only P25 Multi Drive Enable. 25 1 write-only P26 Multi Drive Enable. 26 1 write-only P27 Multi Drive Enable. 27 1 write-only P28 Multi Drive Enable. 28 1 write-only P29 Multi Drive Enable. 29 1 write-only P30 Multi Drive Enable. 30 1 write-only P31 Multi Drive Enable. 31 1 write-only MDDR Multi-driver Disable Register 0x00000054 32 write-only P0 Multi Drive Disable. 0 1 write-only P1 Multi Drive Disable. 1 1 write-only P2 Multi Drive Disable. 2 1 write-only P3 Multi Drive Disable. 3 1 write-only P4 Multi Drive Disable. 4 1 write-only P5 Multi Drive Disable. 5 1 write-only P6 Multi Drive Disable. 6 1 write-only P7 Multi Drive Disable. 7 1 write-only P8 Multi Drive Disable. 8 1 write-only P9 Multi Drive Disable. 9 1 write-only P10 Multi Drive Disable. 10 1 write-only P11 Multi Drive Disable. 11 1 write-only P12 Multi Drive Disable. 12 1 write-only P13 Multi Drive Disable. 13 1 write-only P14 Multi Drive Disable. 14 1 write-only P15 Multi Drive Disable. 15 1 write-only P16 Multi Drive Disable. 16 1 write-only P17 Multi Drive Disable. 17 1 write-only P18 Multi Drive Disable. 18 1 write-only P19 Multi Drive Disable. 19 1 write-only P20 Multi Drive Disable. 20 1 write-only P21 Multi Drive Disable. 21 1 write-only P22 Multi Drive Disable. 22 1 write-only P23 Multi Drive Disable. 23 1 write-only P24 Multi Drive Disable. 24 1 write-only P25 Multi Drive Disable. 25 1 write-only P26 Multi Drive Disable. 26 1 write-only P27 Multi Drive Disable. 27 1 write-only P28 Multi Drive Disable. 28 1 write-only P29 Multi Drive Disable. 29 1 write-only P30 Multi Drive Disable. 30 1 write-only P31 Multi Drive Disable. 31 1 write-only MDSR Multi-driver Status Register 0x00000058 32 read-only 0x00000000 P0 Multi Drive Status. 0 1 read-only P1 Multi Drive Status. 1 1 read-only P2 Multi Drive Status. 2 1 read-only P3 Multi Drive Status. 3 1 read-only P4 Multi Drive Status. 4 1 read-only P5 Multi Drive Status. 5 1 read-only P6 Multi Drive Status. 6 1 read-only P7 Multi Drive Status. 7 1 read-only P8 Multi Drive Status. 8 1 read-only P9 Multi Drive Status. 9 1 read-only P10 Multi Drive Status. 10 1 read-only P11 Multi Drive Status. 11 1 read-only P12 Multi Drive Status. 12 1 read-only P13 Multi Drive Status. 13 1 read-only P14 Multi Drive Status. 14 1 read-only P15 Multi Drive Status. 15 1 read-only P16 Multi Drive Status. 16 1 read-only P17 Multi Drive Status. 17 1 read-only P18 Multi Drive Status. 18 1 read-only P19 Multi Drive Status. 19 1 read-only P20 Multi Drive Status. 20 1 read-only P21 Multi Drive Status. 21 1 read-only P22 Multi Drive Status. 22 1 read-only P23 Multi Drive Status. 23 1 read-only P24 Multi Drive Status. 24 1 read-only P25 Multi Drive Status. 25 1 read-only P26 Multi Drive Status. 26 1 read-only P27 Multi Drive Status. 27 1 read-only P28 Multi Drive Status. 28 1 read-only P29 Multi Drive Status. 29 1 read-only P30 Multi Drive Status. 30 1 read-only P31 Multi Drive Status. 31 1 read-only PUDR Pull-up Disable Register 0x00000060 32 write-only P0 Pull Up Disable. 0 1 write-only P1 Pull Up Disable. 1 1 write-only P2 Pull Up Disable. 2 1 write-only P3 Pull Up Disable. 3 1 write-only P4 Pull Up Disable. 4 1 write-only P5 Pull Up Disable. 5 1 write-only P6 Pull Up Disable. 6 1 write-only P7 Pull Up Disable. 7 1 write-only P8 Pull Up Disable. 8 1 write-only P9 Pull Up Disable. 9 1 write-only P10 Pull Up Disable. 10 1 write-only P11 Pull Up Disable. 11 1 write-only P12 Pull Up Disable. 12 1 write-only P13 Pull Up Disable. 13 1 write-only P14 Pull Up Disable. 14 1 write-only P15 Pull Up Disable. 15 1 write-only P16 Pull Up Disable. 16 1 write-only P17 Pull Up Disable. 17 1 write-only P18 Pull Up Disable. 18 1 write-only P19 Pull Up Disable. 19 1 write-only P20 Pull Up Disable. 20 1 write-only P21 Pull Up Disable. 21 1 write-only P22 Pull Up Disable. 22 1 write-only P23 Pull Up Disable. 23 1 write-only P24 Pull Up Disable. 24 1 write-only P25 Pull Up Disable. 25 1 write-only P26 Pull Up Disable. 26 1 write-only P27 Pull Up Disable. 27 1 write-only P28 Pull Up Disable. 28 1 write-only P29 Pull Up Disable. 29 1 write-only P30 Pull Up Disable. 30 1 write-only P31 Pull Up Disable. 31 1 write-only PUER Pull-up Enable Register 0x00000064 32 write-only P0 Pull Up Enable. 0 1 write-only P1 Pull Up Enable. 1 1 write-only P2 Pull Up Enable. 2 1 write-only P3 Pull Up Enable. 3 1 write-only P4 Pull Up Enable. 4 1 write-only P5 Pull Up Enable. 5 1 write-only P6 Pull Up Enable. 6 1 write-only P7 Pull Up Enable. 7 1 write-only P8 Pull Up Enable. 8 1 write-only P9 Pull Up Enable. 9 1 write-only P10 Pull Up Enable. 10 1 write-only P11 Pull Up Enable. 11 1 write-only P12 Pull Up Enable. 12 1 write-only P13 Pull Up Enable. 13 1 write-only P14 Pull Up Enable. 14 1 write-only P15 Pull Up Enable. 15 1 write-only P16 Pull Up Enable. 16 1 write-only P17 Pull Up Enable. 17 1 write-only P18 Pull Up Enable. 18 1 write-only P19 Pull Up Enable. 19 1 write-only P20 Pull Up Enable. 20 1 write-only P21 Pull Up Enable. 21 1 write-only P22 Pull Up Enable. 22 1 write-only P23 Pull Up Enable. 23 1 write-only P24 Pull Up Enable. 24 1 write-only P25 Pull Up Enable. 25 1 write-only P26 Pull Up Enable. 26 1 write-only P27 Pull Up Enable. 27 1 write-only P28 Pull Up Enable. 28 1 write-only P29 Pull Up Enable. 29 1 write-only P30 Pull Up Enable. 30 1 write-only P31 Pull Up Enable. 31 1 write-only PUSR Pad Pull-up Status Register 0x00000068 32 read-only P0 Pull Up Status. 0 1 read-only P1 Pull Up Status. 1 1 read-only P2 Pull Up Status. 2 1 read-only P3 Pull Up Status. 3 1 read-only P4 Pull Up Status. 4 1 read-only P5 Pull Up Status. 5 1 read-only P6 Pull Up Status. 6 1 read-only P7 Pull Up Status. 7 1 read-only P8 Pull Up Status. 8 1 read-only P9 Pull Up Status. 9 1 read-only P10 Pull Up Status. 10 1 read-only P11 Pull Up Status. 11 1 read-only P12 Pull Up Status. 12 1 read-only P13 Pull Up Status. 13 1 read-only P14 Pull Up Status. 14 1 read-only P15 Pull Up Status. 15 1 read-only P16 Pull Up Status. 16 1 read-only P17 Pull Up Status. 17 1 read-only P18 Pull Up Status. 18 1 read-only P19 Pull Up Status. 19 1 read-only P20 Pull Up Status. 20 1 read-only P21 Pull Up Status. 21 1 read-only P22 Pull Up Status. 22 1 read-only P23 Pull Up Status. 23 1 read-only P24 Pull Up Status. 24 1 read-only P25 Pull Up Status. 25 1 read-only P26 Pull Up Status. 26 1 read-only P27 Pull Up Status. 27 1 read-only P28 Pull Up Status. 28 1 read-only P29 Pull Up Status. 29 1 read-only P30 Pull Up Status. 30 1 read-only P31 Pull Up Status. 31 1 read-only 2 4 0-1 ABCDSR[%s] Peripheral Select Register 0x00000070 32 read-write P0 Peripheral Select. 0 1 read-write P1 Peripheral Select. 1 1 read-write P2 Peripheral Select. 2 1 read-write P3 Peripheral Select. 3 1 read-write P4 Peripheral Select. 4 1 read-write P5 Peripheral Select. 5 1 read-write P6 Peripheral Select. 6 1 read-write P7 Peripheral Select. 7 1 read-write P8 Peripheral Select. 8 1 read-write P9 Peripheral Select. 9 1 read-write P10 Peripheral Select. 10 1 read-write P11 Peripheral Select. 11 1 read-write P12 Peripheral Select. 12 1 read-write P13 Peripheral Select. 13 1 read-write P14 Peripheral Select. 14 1 read-write P15 Peripheral Select. 15 1 read-write P16 Peripheral Select. 16 1 read-write P17 Peripheral Select. 17 1 read-write P18 Peripheral Select. 18 1 read-write P19 Peripheral Select. 19 1 read-write P20 Peripheral Select. 20 1 read-write P21 Peripheral Select. 21 1 read-write P22 Peripheral Select. 22 1 read-write P23 Peripheral Select. 23 1 read-write P24 Peripheral Select. 24 1 read-write P25 Peripheral Select. 25 1 read-write P26 Peripheral Select. 26 1 read-write P27 Peripheral Select. 27 1 read-write P28 Peripheral Select. 28 1 read-write P29 Peripheral Select. 29 1 read-write P30 Peripheral Select. 30 1 read-write P31 Peripheral Select. 31 1 read-write IFSCDR Input Filter Slow Clock Disable Register 0x00000080 32 write-only P0 PIO Clock Glitch Filtering Select. 0 1 write-only P1 PIO Clock Glitch Filtering Select. 1 1 write-only P2 PIO Clock Glitch Filtering Select. 2 1 write-only P3 PIO Clock Glitch Filtering Select. 3 1 write-only P4 PIO Clock Glitch Filtering Select. 4 1 write-only P5 PIO Clock Glitch Filtering Select. 5 1 write-only P6 PIO Clock Glitch Filtering Select. 6 1 write-only P7 PIO Clock Glitch Filtering Select. 7 1 write-only P8 PIO Clock Glitch Filtering Select. 8 1 write-only P9 PIO Clock Glitch Filtering Select. 9 1 write-only P10 PIO Clock Glitch Filtering Select. 10 1 write-only P11 PIO Clock Glitch Filtering Select. 11 1 write-only P12 PIO Clock Glitch Filtering Select. 12 1 write-only P13 PIO Clock Glitch Filtering Select. 13 1 write-only P14 PIO Clock Glitch Filtering Select. 14 1 write-only P15 PIO Clock Glitch Filtering Select. 15 1 write-only P16 PIO Clock Glitch Filtering Select. 16 1 write-only P17 PIO Clock Glitch Filtering Select. 17 1 write-only P18 PIO Clock Glitch Filtering Select. 18 1 write-only P19 PIO Clock Glitch Filtering Select. 19 1 write-only P20 PIO Clock Glitch Filtering Select. 20 1 write-only P21 PIO Clock Glitch Filtering Select. 21 1 write-only P22 PIO Clock Glitch Filtering Select. 22 1 write-only P23 PIO Clock Glitch Filtering Select. 23 1 write-only P24 PIO Clock Glitch Filtering Select. 24 1 write-only P25 PIO Clock Glitch Filtering Select. 25 1 write-only P26 PIO Clock Glitch Filtering Select. 26 1 write-only P27 PIO Clock Glitch Filtering Select. 27 1 write-only P28 PIO Clock Glitch Filtering Select. 28 1 write-only P29 PIO Clock Glitch Filtering Select. 29 1 write-only P30 PIO Clock Glitch Filtering Select. 30 1 write-only P31 PIO Clock Glitch Filtering Select. 31 1 write-only IFSCER Input Filter Slow Clock Enable Register 0x00000084 32 write-only P0 Debouncing Filtering Select. 0 1 write-only P1 Debouncing Filtering Select. 1 1 write-only P2 Debouncing Filtering Select. 2 1 write-only P3 Debouncing Filtering Select. 3 1 write-only P4 Debouncing Filtering Select. 4 1 write-only P5 Debouncing Filtering Select. 5 1 write-only P6 Debouncing Filtering Select. 6 1 write-only P7 Debouncing Filtering Select. 7 1 write-only P8 Debouncing Filtering Select. 8 1 write-only P9 Debouncing Filtering Select. 9 1 write-only P10 Debouncing Filtering Select. 10 1 write-only P11 Debouncing Filtering Select. 11 1 write-only P12 Debouncing Filtering Select. 12 1 write-only P13 Debouncing Filtering Select. 13 1 write-only P14 Debouncing Filtering Select. 14 1 write-only P15 Debouncing Filtering Select. 15 1 write-only P16 Debouncing Filtering Select. 16 1 write-only P17 Debouncing Filtering Select. 17 1 write-only P18 Debouncing Filtering Select. 18 1 write-only P19 Debouncing Filtering Select. 19 1 write-only P20 Debouncing Filtering Select. 20 1 write-only P21 Debouncing Filtering Select. 21 1 write-only P22 Debouncing Filtering Select. 22 1 write-only P23 Debouncing Filtering Select. 23 1 write-only P24 Debouncing Filtering Select. 24 1 write-only P25 Debouncing Filtering Select. 25 1 write-only P26 Debouncing Filtering Select. 26 1 write-only P27 Debouncing Filtering Select. 27 1 write-only P28 Debouncing Filtering Select. 28 1 write-only P29 Debouncing Filtering Select. 29 1 write-only P30 Debouncing Filtering Select. 30 1 write-only P31 Debouncing Filtering Select. 31 1 write-only IFSCSR Input Filter Slow Clock Status Register 0x00000088 32 read-only 0x00000000 P0 Glitch or Debouncing Filter Selection Status 0 1 read-only P1 Glitch or Debouncing Filter Selection Status 1 1 read-only P2 Glitch or Debouncing Filter Selection Status 2 1 read-only P3 Glitch or Debouncing Filter Selection Status 3 1 read-only P4 Glitch or Debouncing Filter Selection Status 4 1 read-only P5 Glitch or Debouncing Filter Selection Status 5 1 read-only P6 Glitch or Debouncing Filter Selection Status 6 1 read-only P7 Glitch or Debouncing Filter Selection Status 7 1 read-only P8 Glitch or Debouncing Filter Selection Status 8 1 read-only P9 Glitch or Debouncing Filter Selection Status 9 1 read-only P10 Glitch or Debouncing Filter Selection Status 10 1 read-only P11 Glitch or Debouncing Filter Selection Status 11 1 read-only P12 Glitch or Debouncing Filter Selection Status 12 1 read-only P13 Glitch or Debouncing Filter Selection Status 13 1 read-only P14 Glitch or Debouncing Filter Selection Status 14 1 read-only P15 Glitch or Debouncing Filter Selection Status 15 1 read-only P16 Glitch or Debouncing Filter Selection Status 16 1 read-only P17 Glitch or Debouncing Filter Selection Status 17 1 read-only P18 Glitch or Debouncing Filter Selection Status 18 1 read-only P19 Glitch or Debouncing Filter Selection Status 19 1 read-only P20 Glitch or Debouncing Filter Selection Status 20 1 read-only P21 Glitch or Debouncing Filter Selection Status 21 1 read-only P22 Glitch or Debouncing Filter Selection Status 22 1 read-only P23 Glitch or Debouncing Filter Selection Status 23 1 read-only P24 Glitch or Debouncing Filter Selection Status 24 1 read-only P25 Glitch or Debouncing Filter Selection Status 25 1 read-only P26 Glitch or Debouncing Filter Selection Status 26 1 read-only P27 Glitch or Debouncing Filter Selection Status 27 1 read-only P28 Glitch or Debouncing Filter Selection Status 28 1 read-only P29 Glitch or Debouncing Filter Selection Status 29 1 read-only P30 Glitch or Debouncing Filter Selection Status 30 1 read-only P31 Glitch or Debouncing Filter Selection Status 31 1 read-only SCDR Slow Clock Divider Debouncing Register 0x0000008C 32 read-write 0x00000000 DIV 0 14 read-write PPDDR Pad Pull-down Disable Register 0x00000090 32 write-only P0 Pull Down Disable. 0 1 write-only P1 Pull Down Disable. 1 1 write-only P2 Pull Down Disable. 2 1 write-only P3 Pull Down Disable. 3 1 write-only P4 Pull Down Disable. 4 1 write-only P5 Pull Down Disable. 5 1 write-only P6 Pull Down Disable. 6 1 write-only P7 Pull Down Disable. 7 1 write-only P8 Pull Down Disable. 8 1 write-only P9 Pull Down Disable. 9 1 write-only P10 Pull Down Disable. 10 1 write-only P11 Pull Down Disable. 11 1 write-only P12 Pull Down Disable. 12 1 write-only P13 Pull Down Disable. 13 1 write-only P14 Pull Down Disable. 14 1 write-only P15 Pull Down Disable. 15 1 write-only P16 Pull Down Disable. 16 1 write-only P17 Pull Down Disable. 17 1 write-only P18 Pull Down Disable. 18 1 write-only P19 Pull Down Disable. 19 1 write-only P20 Pull Down Disable. 20 1 write-only P21 Pull Down Disable. 21 1 write-only P22 Pull Down Disable. 22 1 write-only P23 Pull Down Disable. 23 1 write-only P24 Pull Down Disable. 24 1 write-only P25 Pull Down Disable. 25 1 write-only P26 Pull Down Disable. 26 1 write-only P27 Pull Down Disable. 27 1 write-only P28 Pull Down Disable. 28 1 write-only P29 Pull Down Disable. 29 1 write-only P30 Pull Down Disable. 30 1 write-only P31 Pull Down Disable. 31 1 write-only PPDER Pad Pull-down Enable Register 0x00000094 32 write-only P0 Pull Down Enable. 0 1 write-only P1 Pull Down Enable. 1 1 write-only P2 Pull Down Enable. 2 1 write-only P3 Pull Down Enable. 3 1 write-only P4 Pull Down Enable. 4 1 write-only P5 Pull Down Enable. 5 1 write-only P6 Pull Down Enable. 6 1 write-only P7 Pull Down Enable. 7 1 write-only P8 Pull Down Enable. 8 1 write-only P9 Pull Down Enable. 9 1 write-only P10 Pull Down Enable. 10 1 write-only P11 Pull Down Enable. 11 1 write-only P12 Pull Down Enable. 12 1 write-only P13 Pull Down Enable. 13 1 write-only P14 Pull Down Enable. 14 1 write-only P15 Pull Down Enable. 15 1 write-only P16 Pull Down Enable. 16 1 write-only P17 Pull Down Enable. 17 1 write-only P18 Pull Down Enable. 18 1 write-only P19 Pull Down Enable. 19 1 write-only P20 Pull Down Enable. 20 1 write-only P21 Pull Down Enable. 21 1 write-only P22 Pull Down Enable. 22 1 write-only P23 Pull Down Enable. 23 1 write-only P24 Pull Down Enable. 24 1 write-only P25 Pull Down Enable. 25 1 write-only P26 Pull Down Enable. 26 1 write-only P27 Pull Down Enable. 27 1 write-only P28 Pull Down Enable. 28 1 write-only P29 Pull Down Enable. 29 1 write-only P30 Pull Down Enable. 30 1 write-only P31 Pull Down Enable. 31 1 write-only PPDSR Pad Pull-down Status Register 0x00000098 32 read-only P0 Pull Down Status. 0 1 read-only P1 Pull Down Status. 1 1 read-only P2 Pull Down Status. 2 1 read-only P3 Pull Down Status. 3 1 read-only P4 Pull Down Status. 4 1 read-only P5 Pull Down Status. 5 1 read-only P6 Pull Down Status. 6 1 read-only P7 Pull Down Status. 7 1 read-only P8 Pull Down Status. 8 1 read-only P9 Pull Down Status. 9 1 read-only P10 Pull Down Status. 10 1 read-only P11 Pull Down Status. 11 1 read-only P12 Pull Down Status. 12 1 read-only P13 Pull Down Status. 13 1 read-only P14 Pull Down Status. 14 1 read-only P15 Pull Down Status. 15 1 read-only P16 Pull Down Status. 16 1 read-only P17 Pull Down Status. 17 1 read-only P18 Pull Down Status. 18 1 read-only P19 Pull Down Status. 19 1 read-only P20 Pull Down Status. 20 1 read-only P21 Pull Down Status. 21 1 read-only P22 Pull Down Status. 22 1 read-only P23 Pull Down Status. 23 1 read-only P24 Pull Down Status. 24 1 read-only P25 Pull Down Status. 25 1 read-only P26 Pull Down Status. 26 1 read-only P27 Pull Down Status. 27 1 read-only P28 Pull Down Status. 28 1 read-only P29 Pull Down Status. 29 1 read-only P30 Pull Down Status. 30 1 read-only P31 Pull Down Status. 31 1 read-only OWER Output Write Enable 0x000000A0 32 write-only P0 Output Write Enable. 0 1 write-only P1 Output Write Enable. 1 1 write-only P2 Output Write Enable. 2 1 write-only P3 Output Write Enable. 3 1 write-only P4 Output Write Enable. 4 1 write-only P5 Output Write Enable. 5 1 write-only P6 Output Write Enable. 6 1 write-only P7 Output Write Enable. 7 1 write-only P8 Output Write Enable. 8 1 write-only P9 Output Write Enable. 9 1 write-only P10 Output Write Enable. 10 1 write-only P11 Output Write Enable. 11 1 write-only P12 Output Write Enable. 12 1 write-only P13 Output Write Enable. 13 1 write-only P14 Output Write Enable. 14 1 write-only P15 Output Write Enable. 15 1 write-only P16 Output Write Enable. 16 1 write-only P17 Output Write Enable. 17 1 write-only P18 Output Write Enable. 18 1 write-only P19 Output Write Enable. 19 1 write-only P20 Output Write Enable. 20 1 write-only P21 Output Write Enable. 21 1 write-only P22 Output Write Enable. 22 1 write-only P23 Output Write Enable. 23 1 write-only P24 Output Write Enable. 24 1 write-only P25 Output Write Enable. 25 1 write-only P26 Output Write Enable. 26 1 write-only P27 Output Write Enable. 27 1 write-only P28 Output Write Enable. 28 1 write-only P29 Output Write Enable. 29 1 write-only P30 Output Write Enable. 30 1 write-only P31 Output Write Enable. 31 1 write-only OWDR Output Write Disable 0x000000A4 32 write-only P0 Output Write Disable. 0 1 write-only P1 Output Write Disable. 1 1 write-only P2 Output Write Disable. 2 1 write-only P3 Output Write Disable. 3 1 write-only P4 Output Write Disable. 4 1 write-only P5 Output Write Disable. 5 1 write-only P6 Output Write Disable. 6 1 write-only P7 Output Write Disable. 7 1 write-only P8 Output Write Disable. 8 1 write-only P9 Output Write Disable. 9 1 write-only P10 Output Write Disable. 10 1 write-only P11 Output Write Disable. 11 1 write-only P12 Output Write Disable. 12 1 write-only P13 Output Write Disable. 13 1 write-only P14 Output Write Disable. 14 1 write-only P15 Output Write Disable. 15 1 write-only P16 Output Write Disable. 16 1 write-only P17 Output Write Disable. 17 1 write-only P18 Output Write Disable. 18 1 write-only P19 Output Write Disable. 19 1 write-only P20 Output Write Disable. 20 1 write-only P21 Output Write Disable. 21 1 write-only P22 Output Write Disable. 22 1 write-only P23 Output Write Disable. 23 1 write-only P24 Output Write Disable. 24 1 write-only P25 Output Write Disable. 25 1 write-only P26 Output Write Disable. 26 1 write-only P27 Output Write Disable. 27 1 write-only P28 Output Write Disable. 28 1 write-only P29 Output Write Disable. 29 1 write-only P30 Output Write Disable. 30 1 write-only P31 Output Write Disable. 31 1 write-only OWSR Output Write Status Register 0x000000A8 32 read-only 0x00000000 P0 Output Write Status. 0 1 read-only P1 Output Write Status. 1 1 read-only P2 Output Write Status. 2 1 read-only P3 Output Write Status. 3 1 read-only P4 Output Write Status. 4 1 read-only P5 Output Write Status. 5 1 read-only P6 Output Write Status. 6 1 read-only P7 Output Write Status. 7 1 read-only P8 Output Write Status. 8 1 read-only P9 Output Write Status. 9 1 read-only P10 Output Write Status. 10 1 read-only P11 Output Write Status. 11 1 read-only P12 Output Write Status. 12 1 read-only P13 Output Write Status. 13 1 read-only P14 Output Write Status. 14 1 read-only P15 Output Write Status. 15 1 read-only P16 Output Write Status. 16 1 read-only P17 Output Write Status. 17 1 read-only P18 Output Write Status. 18 1 read-only P19 Output Write Status. 19 1 read-only P20 Output Write Status. 20 1 read-only P21 Output Write Status. 21 1 read-only P22 Output Write Status. 22 1 read-only P23 Output Write Status. 23 1 read-only P24 Output Write Status. 24 1 read-only P25 Output Write Status. 25 1 read-only P26 Output Write Status. 26 1 read-only P27 Output Write Status. 27 1 read-only P28 Output Write Status. 28 1 read-only P29 Output Write Status. 29 1 read-only P30 Output Write Status. 30 1 read-only P31 Output Write Status. 31 1 read-only AIMER Additional Interrupt Modes Enable Register 0x000000B0 32 write-only P0 Additional Interrupt Modes Enable. 0 1 write-only P1 Additional Interrupt Modes Enable. 1 1 write-only P2 Additional Interrupt Modes Enable. 2 1 write-only P3 Additional Interrupt Modes Enable. 3 1 write-only P4 Additional Interrupt Modes Enable. 4 1 write-only P5 Additional Interrupt Modes Enable. 5 1 write-only P6 Additional Interrupt Modes Enable. 6 1 write-only P7 Additional Interrupt Modes Enable. 7 1 write-only P8 Additional Interrupt Modes Enable. 8 1 write-only P9 Additional Interrupt Modes Enable. 9 1 write-only P10 Additional Interrupt Modes Enable. 10 1 write-only P11 Additional Interrupt Modes Enable. 11 1 write-only P12 Additional Interrupt Modes Enable. 12 1 write-only P13 Additional Interrupt Modes Enable. 13 1 write-only P14 Additional Interrupt Modes Enable. 14 1 write-only P15 Additional Interrupt Modes Enable. 15 1 write-only P16 Additional Interrupt Modes Enable. 16 1 write-only P17 Additional Interrupt Modes Enable. 17 1 write-only P18 Additional Interrupt Modes Enable. 18 1 write-only P19 Additional Interrupt Modes Enable. 19 1 write-only P20 Additional Interrupt Modes Enable. 20 1 write-only P21 Additional Interrupt Modes Enable. 21 1 write-only P22 Additional Interrupt Modes Enable. 22 1 write-only P23 Additional Interrupt Modes Enable. 23 1 write-only P24 Additional Interrupt Modes Enable. 24 1 write-only P25 Additional Interrupt Modes Enable. 25 1 write-only P26 Additional Interrupt Modes Enable. 26 1 write-only P27 Additional Interrupt Modes Enable. 27 1 write-only P28 Additional Interrupt Modes Enable. 28 1 write-only P29 Additional Interrupt Modes Enable. 29 1 write-only P30 Additional Interrupt Modes Enable. 30 1 write-only P31 Additional Interrupt Modes Enable. 31 1 write-only AIMDR Additional Interrupt Modes Disables Register 0x000000B4 32 write-only P0 Additional Interrupt Modes Disable. 0 1 write-only P1 Additional Interrupt Modes Disable. 1 1 write-only P2 Additional Interrupt Modes Disable. 2 1 write-only P3 Additional Interrupt Modes Disable. 3 1 write-only P4 Additional Interrupt Modes Disable. 4 1 write-only P5 Additional Interrupt Modes Disable. 5 1 write-only P6 Additional Interrupt Modes Disable. 6 1 write-only P7 Additional Interrupt Modes Disable. 7 1 write-only P8 Additional Interrupt Modes Disable. 8 1 write-only P9 Additional Interrupt Modes Disable. 9 1 write-only P10 Additional Interrupt Modes Disable. 10 1 write-only P11 Additional Interrupt Modes Disable. 11 1 write-only P12 Additional Interrupt Modes Disable. 12 1 write-only P13 Additional Interrupt Modes Disable. 13 1 write-only P14 Additional Interrupt Modes Disable. 14 1 write-only P15 Additional Interrupt Modes Disable. 15 1 write-only P16 Additional Interrupt Modes Disable. 16 1 write-only P17 Additional Interrupt Modes Disable. 17 1 write-only P18 Additional Interrupt Modes Disable. 18 1 write-only P19 Additional Interrupt Modes Disable. 19 1 write-only P20 Additional Interrupt Modes Disable. 20 1 write-only P21 Additional Interrupt Modes Disable. 21 1 write-only P22 Additional Interrupt Modes Disable. 22 1 write-only P23 Additional Interrupt Modes Disable. 23 1 write-only P24 Additional Interrupt Modes Disable. 24 1 write-only P25 Additional Interrupt Modes Disable. 25 1 write-only P26 Additional Interrupt Modes Disable. 26 1 write-only P27 Additional Interrupt Modes Disable. 27 1 write-only P28 Additional Interrupt Modes Disable. 28 1 write-only P29 Additional Interrupt Modes Disable. 29 1 write-only P30 Additional Interrupt Modes Disable. 30 1 write-only P31 Additional Interrupt Modes Disable. 31 1 write-only AIMMR Additional Interrupt Modes Mask Register 0x000000B8 32 read-only 0x00000000 P0 Peripheral CD Status. 0 1 read-only P1 Peripheral CD Status. 1 1 read-only P2 Peripheral CD Status. 2 1 read-only P3 Peripheral CD Status. 3 1 read-only P4 Peripheral CD Status. 4 1 read-only P5 Peripheral CD Status. 5 1 read-only P6 Peripheral CD Status. 6 1 read-only P7 Peripheral CD Status. 7 1 read-only P8 Peripheral CD Status. 8 1 read-only P9 Peripheral CD Status. 9 1 read-only P10 Peripheral CD Status. 10 1 read-only P11 Peripheral CD Status. 11 1 read-only P12 Peripheral CD Status. 12 1 read-only P13 Peripheral CD Status. 13 1 read-only P14 Peripheral CD Status. 14 1 read-only P15 Peripheral CD Status. 15 1 read-only P16 Peripheral CD Status. 16 1 read-only P17 Peripheral CD Status. 17 1 read-only P18 Peripheral CD Status. 18 1 read-only P19 Peripheral CD Status. 19 1 read-only P20 Peripheral CD Status. 20 1 read-only P21 Peripheral CD Status. 21 1 read-only P22 Peripheral CD Status. 22 1 read-only P23 Peripheral CD Status. 23 1 read-only P24 Peripheral CD Status. 24 1 read-only P25 Peripheral CD Status. 25 1 read-only P26 Peripheral CD Status. 26 1 read-only P27 Peripheral CD Status. 27 1 read-only P28 Peripheral CD Status. 28 1 read-only P29 Peripheral CD Status. 29 1 read-only P30 Peripheral CD Status. 30 1 read-only P31 Peripheral CD Status. 31 1 read-only ESR Edge Select Register 0x000000C0 32 write-only P0 Edge Interrupt Selection. 0 1 write-only P1 Edge Interrupt Selection. 1 1 write-only P2 Edge Interrupt Selection. 2 1 write-only P3 Edge Interrupt Selection. 3 1 write-only P4 Edge Interrupt Selection. 4 1 write-only P5 Edge Interrupt Selection. 5 1 write-only P6 Edge Interrupt Selection. 6 1 write-only P7 Edge Interrupt Selection. 7 1 write-only P8 Edge Interrupt Selection. 8 1 write-only P9 Edge Interrupt Selection. 9 1 write-only P10 Edge Interrupt Selection. 10 1 write-only P11 Edge Interrupt Selection. 11 1 write-only P12 Edge Interrupt Selection. 12 1 write-only P13 Edge Interrupt Selection. 13 1 write-only P14 Edge Interrupt Selection. 14 1 write-only P15 Edge Interrupt Selection. 15 1 write-only P16 Edge Interrupt Selection. 16 1 write-only P17 Edge Interrupt Selection. 17 1 write-only P18 Edge Interrupt Selection. 18 1 write-only P19 Edge Interrupt Selection. 19 1 write-only P20 Edge Interrupt Selection. 20 1 write-only P21 Edge Interrupt Selection. 21 1 write-only P22 Edge Interrupt Selection. 22 1 write-only P23 Edge Interrupt Selection. 23 1 write-only P24 Edge Interrupt Selection. 24 1 write-only P25 Edge Interrupt Selection. 25 1 write-only P26 Edge Interrupt Selection. 26 1 write-only P27 Edge Interrupt Selection. 27 1 write-only P28 Edge Interrupt Selection. 28 1 write-only P29 Edge Interrupt Selection. 29 1 write-only P30 Edge Interrupt Selection. 30 1 write-only P31 Edge Interrupt Selection. 31 1 write-only LSR Level Select Register 0x000000C4 32 write-only P0 Level Interrupt Selection. 0 1 write-only P1 Level Interrupt Selection. 1 1 write-only P2 Level Interrupt Selection. 2 1 write-only P3 Level Interrupt Selection. 3 1 write-only P4 Level Interrupt Selection. 4 1 write-only P5 Level Interrupt Selection. 5 1 write-only P6 Level Interrupt Selection. 6 1 write-only P7 Level Interrupt Selection. 7 1 write-only P8 Level Interrupt Selection. 8 1 write-only P9 Level Interrupt Selection. 9 1 write-only P10 Level Interrupt Selection. 10 1 write-only P11 Level Interrupt Selection. 11 1 write-only P12 Level Interrupt Selection. 12 1 write-only P13 Level Interrupt Selection. 13 1 write-only P14 Level Interrupt Selection. 14 1 write-only P15 Level Interrupt Selection. 15 1 write-only P16 Level Interrupt Selection. 16 1 write-only P17 Level Interrupt Selection. 17 1 write-only P18 Level Interrupt Selection. 18 1 write-only P19 Level Interrupt Selection. 19 1 write-only P20 Level Interrupt Selection. 20 1 write-only P21 Level Interrupt Selection. 21 1 write-only P22 Level Interrupt Selection. 22 1 write-only P23 Level Interrupt Selection. 23 1 write-only P24 Level Interrupt Selection. 24 1 write-only P25 Level Interrupt Selection. 25 1 write-only P26 Level Interrupt Selection. 26 1 write-only P27 Level Interrupt Selection. 27 1 write-only P28 Level Interrupt Selection. 28 1 write-only P29 Level Interrupt Selection. 29 1 write-only P30 Level Interrupt Selection. 30 1 write-only P31 Level Interrupt Selection. 31 1 write-only ELSR Edge/Level Status Register 0x000000C8 32 read-only 0x00000000 P0 Edge/Level Interrupt source selection. 0 1 read-only P1 Edge/Level Interrupt source selection. 1 1 read-only P2 Edge/Level Interrupt source selection. 2 1 read-only P3 Edge/Level Interrupt source selection. 3 1 read-only P4 Edge/Level Interrupt source selection. 4 1 read-only P5 Edge/Level Interrupt source selection. 5 1 read-only P6 Edge/Level Interrupt source selection. 6 1 read-only P7 Edge/Level Interrupt source selection. 7 1 read-only P8 Edge/Level Interrupt source selection. 8 1 read-only P9 Edge/Level Interrupt source selection. 9 1 read-only P10 Edge/Level Interrupt source selection. 10 1 read-only P11 Edge/Level Interrupt source selection. 11 1 read-only P12 Edge/Level Interrupt source selection. 12 1 read-only P13 Edge/Level Interrupt source selection. 13 1 read-only P14 Edge/Level Interrupt source selection. 14 1 read-only P15 Edge/Level Interrupt source selection. 15 1 read-only P16 Edge/Level Interrupt source selection. 16 1 read-only P17 Edge/Level Interrupt source selection. 17 1 read-only P18 Edge/Level Interrupt source selection. 18 1 read-only P19 Edge/Level Interrupt source selection. 19 1 read-only P20 Edge/Level Interrupt source selection. 20 1 read-only P21 Edge/Level Interrupt source selection. 21 1 read-only P22 Edge/Level Interrupt source selection. 22 1 read-only P23 Edge/Level Interrupt source selection. 23 1 read-only P24 Edge/Level Interrupt source selection. 24 1 read-only P25 Edge/Level Interrupt source selection. 25 1 read-only P26 Edge/Level Interrupt source selection. 26 1 read-only P27 Edge/Level Interrupt source selection. 27 1 read-only P28 Edge/Level Interrupt source selection. 28 1 read-only P29 Edge/Level Interrupt source selection. 29 1 read-only P30 Edge/Level Interrupt source selection. 30 1 read-only P31 Edge/Level Interrupt source selection. 31 1 read-only FELLSR Falling Edge/Low Level Select Register 0x000000D0 32 write-only P0 Falling Edge/Low Level Interrupt Selection. 0 1 write-only P1 Falling Edge/Low Level Interrupt Selection. 1 1 write-only P2 Falling Edge/Low Level Interrupt Selection. 2 1 write-only P3 Falling Edge/Low Level Interrupt Selection. 3 1 write-only P4 Falling Edge/Low Level Interrupt Selection. 4 1 write-only P5 Falling Edge/Low Level Interrupt Selection. 5 1 write-only P6 Falling Edge/Low Level Interrupt Selection. 6 1 write-only P7 Falling Edge/Low Level Interrupt Selection. 7 1 write-only P8 Falling Edge/Low Level Interrupt Selection. 8 1 write-only P9 Falling Edge/Low Level Interrupt Selection. 9 1 write-only P10 Falling Edge/Low Level Interrupt Selection. 10 1 write-only P11 Falling Edge/Low Level Interrupt Selection. 11 1 write-only P12 Falling Edge/Low Level Interrupt Selection. 12 1 write-only P13 Falling Edge/Low Level Interrupt Selection. 13 1 write-only P14 Falling Edge/Low Level Interrupt Selection. 14 1 write-only P15 Falling Edge/Low Level Interrupt Selection. 15 1 write-only P16 Falling Edge/Low Level Interrupt Selection. 16 1 write-only P17 Falling Edge/Low Level Interrupt Selection. 17 1 write-only P18 Falling Edge/Low Level Interrupt Selection. 18 1 write-only P19 Falling Edge/Low Level Interrupt Selection. 19 1 write-only P20 Falling Edge/Low Level Interrupt Selection. 20 1 write-only P21 Falling Edge/Low Level Interrupt Selection. 21 1 write-only P22 Falling Edge/Low Level Interrupt Selection. 22 1 write-only P23 Falling Edge/Low Level Interrupt Selection. 23 1 write-only P24 Falling Edge/Low Level Interrupt Selection. 24 1 write-only P25 Falling Edge/Low Level Interrupt Selection. 25 1 write-only P26 Falling Edge/Low Level Interrupt Selection. 26 1 write-only P27 Falling Edge/Low Level Interrupt Selection. 27 1 write-only P28 Falling Edge/Low Level Interrupt Selection. 28 1 write-only P29 Falling Edge/Low Level Interrupt Selection. 29 1 write-only P30 Falling Edge/Low Level Interrupt Selection. 30 1 write-only P31 Falling Edge/Low Level Interrupt Selection. 31 1 write-only REHLSR Rising Edge/ High Level Select Register 0x000000D4 32 write-only P0 Rising Edge /High Level Interrupt Selection. 0 1 write-only P1 Rising Edge /High Level Interrupt Selection. 1 1 write-only P2 Rising Edge /High Level Interrupt Selection. 2 1 write-only P3 Rising Edge /High Level Interrupt Selection. 3 1 write-only P4 Rising Edge /High Level Interrupt Selection. 4 1 write-only P5 Rising Edge /High Level Interrupt Selection. 5 1 write-only P6 Rising Edge /High Level Interrupt Selection. 6 1 write-only P7 Rising Edge /High Level Interrupt Selection. 7 1 write-only P8 Rising Edge /High Level Interrupt Selection. 8 1 write-only P9 Rising Edge /High Level Interrupt Selection. 9 1 write-only P10 Rising Edge /High Level Interrupt Selection. 10 1 write-only P11 Rising Edge /High Level Interrupt Selection. 11 1 write-only P12 Rising Edge /High Level Interrupt Selection. 12 1 write-only P13 Rising Edge /High Level Interrupt Selection. 13 1 write-only P14 Rising Edge /High Level Interrupt Selection. 14 1 write-only P15 Rising Edge /High Level Interrupt Selection. 15 1 write-only P16 Rising Edge /High Level Interrupt Selection. 16 1 write-only P17 Rising Edge /High Level Interrupt Selection. 17 1 write-only P18 Rising Edge /High Level Interrupt Selection. 18 1 write-only P19 Rising Edge /High Level Interrupt Selection. 19 1 write-only P20 Rising Edge /High Level Interrupt Selection. 20 1 write-only P21 Rising Edge /High Level Interrupt Selection. 21 1 write-only P22 Rising Edge /High Level Interrupt Selection. 22 1 write-only P23 Rising Edge /High Level Interrupt Selection. 23 1 write-only P24 Rising Edge /High Level Interrupt Selection. 24 1 write-only P25 Rising Edge /High Level Interrupt Selection. 25 1 write-only P26 Rising Edge /High Level Interrupt Selection. 26 1 write-only P27 Rising Edge /High Level Interrupt Selection. 27 1 write-only P28 Rising Edge /High Level Interrupt Selection. 28 1 write-only P29 Rising Edge /High Level Interrupt Selection. 29 1 write-only P30 Rising Edge /High Level Interrupt Selection. 30 1 write-only P31 Rising Edge /High Level Interrupt Selection. 31 1 write-only FRLHSR Fall/Rise - Low/High Status Register 0x000000D8 32 read-only 0x00000000 P0 Edge /Level Interrupt Source Selection. 0 1 read-only P1 Edge /Level Interrupt Source Selection. 1 1 read-only P2 Edge /Level Interrupt Source Selection. 2 1 read-only P3 Edge /Level Interrupt Source Selection. 3 1 read-only P4 Edge /Level Interrupt Source Selection. 4 1 read-only P5 Edge /Level Interrupt Source Selection. 5 1 read-only P6 Edge /Level Interrupt Source Selection. 6 1 read-only P7 Edge /Level Interrupt Source Selection. 7 1 read-only P8 Edge /Level Interrupt Source Selection. 8 1 read-only P9 Edge /Level Interrupt Source Selection. 9 1 read-only P10 Edge /Level Interrupt Source Selection. 10 1 read-only P11 Edge /Level Interrupt Source Selection. 11 1 read-only P12 Edge /Level Interrupt Source Selection. 12 1 read-only P13 Edge /Level Interrupt Source Selection. 13 1 read-only P14 Edge /Level Interrupt Source Selection. 14 1 read-only P15 Edge /Level Interrupt Source Selection. 15 1 read-only P16 Edge /Level Interrupt Source Selection. 16 1 read-only P17 Edge /Level Interrupt Source Selection. 17 1 read-only P18 Edge /Level Interrupt Source Selection. 18 1 read-only P19 Edge /Level Interrupt Source Selection. 19 1 read-only P20 Edge /Level Interrupt Source Selection. 20 1 read-only P21 Edge /Level Interrupt Source Selection. 21 1 read-only P22 Edge /Level Interrupt Source Selection. 22 1 read-only P23 Edge /Level Interrupt Source Selection. 23 1 read-only P24 Edge /Level Interrupt Source Selection. 24 1 read-only P25 Edge /Level Interrupt Source Selection. 25 1 read-only P26 Edge /Level Interrupt Source Selection. 26 1 read-only P27 Edge /Level Interrupt Source Selection. 27 1 read-only P28 Edge /Level Interrupt Source Selection. 28 1 read-only P29 Edge /Level Interrupt Source Selection. 29 1 read-only P30 Edge /Level Interrupt Source Selection. 30 1 read-only P31 Edge /Level Interrupt Source Selection. 31 1 read-only LOCKSR Lock Status 0x000000E0 32 read-only 0x00000000 P0 Lock Status. 0 1 read-only P1 Lock Status. 1 1 read-only P2 Lock Status. 2 1 read-only P3 Lock Status. 3 1 read-only P4 Lock Status. 4 1 read-only P5 Lock Status. 5 1 read-only P6 Lock Status. 6 1 read-only P7 Lock Status. 7 1 read-only P8 Lock Status. 8 1 read-only P9 Lock Status. 9 1 read-only P10 Lock Status. 10 1 read-only P11 Lock Status. 11 1 read-only P12 Lock Status. 12 1 read-only P13 Lock Status. 13 1 read-only P14 Lock Status. 14 1 read-only P15 Lock Status. 15 1 read-only P16 Lock Status. 16 1 read-only P17 Lock Status. 17 1 read-only P18 Lock Status. 18 1 read-only P19 Lock Status. 19 1 read-only P20 Lock Status. 20 1 read-only P21 Lock Status. 21 1 read-only P22 Lock Status. 22 1 read-only P23 Lock Status. 23 1 read-only P24 Lock Status. 24 1 read-only P25 Lock Status. 25 1 read-only P26 Lock Status. 26 1 read-only P27 Lock Status. 27 1 read-only P28 Lock Status. 28 1 read-only P29 Lock Status. 29 1 read-only P30 Lock Status. 30 1 read-only P31 Lock Status. 31 1 read-only WPMR Write Protect Mode Register 0x000000E4 32 read-write 0x00000000 WPEN Write Protect Enable 0 1 read-write WPKEY Write Protect KEY 8 24 read-write WPSR Write Protect Status Register 0x000000E8 32 read-only 0x00000000 WPVS Write Protect Violation Status 0 1 read-only WPVSRC Write Protect Violation Source 8 16 read-only SCHMITT Schmitt Trigger Register 0x00000100 32 read-write 0x00000000 SCHMITT0 0 1 read-write SCHMITT1 1 1 read-write SCHMITT2 2 1 read-write SCHMITT3 3 1 read-write SCHMITT4 4 1 read-write SCHMITT5 5 1 read-write SCHMITT6 6 1 read-write SCHMITT7 7 1 read-write SCHMITT8 8 1 read-write SCHMITT9 9 1 read-write SCHMITT10 10 1 read-write SCHMITT11 11 1 read-write SCHMITT12 12 1 read-write SCHMITT13 13 1 read-write SCHMITT14 14 1 read-write SCHMITT15 15 1 read-write SCHMITT16 16 1 read-write SCHMITT17 17 1 read-write SCHMITT18 18 1 read-write SCHMITT19 19 1 read-write SCHMITT20 20 1 read-write SCHMITT21 21 1 read-write SCHMITT22 22 1 read-write SCHMITT23 23 1 read-write SCHMITT24 24 1 read-write SCHMITT25 25 1 read-write SCHMITT26 26 1 read-write SCHMITT27 27 1 read-write SCHMITT28 28 1 read-write SCHMITT29 29 1 read-write SCHMITT30 30 1 read-write SCHMITT31 31 1 read-write DELAYR IO Delay Register 0x00000110 32 read-write 0x00000000 Delay0 0 4 read-write Delay1 4 4 read-write Delay2 8 4 read-write Delay3 12 4 read-write Delay4 16 4 read-write Delay5 20 4 read-write Delay6 24 4 read-write Delay7 28 4 read-write DRIVER1 I/O Drive Register 1 0x00000114 32 read-write 0x00000000 LINE0 Drive of PIO line 0 0 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE1 Drive of PIO line 1 2 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE2 Drive of PIO line 2 4 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE3 Drive of PIO line 3 6 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE4 Drive of PIO line 4 8 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE5 Drive of PIO line 5 10 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE6 Drive of PIO line 6 12 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE7 Drive of PIO line 7 14 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE8 Drive of PIO line 8 16 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE9 Drive of PIO line 9 18 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE10 Drive of PIO line 10 20 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE11 Drive of PIO line 11 22 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE12 Drive of PIO line 12 24 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE13 Drive of PIO line 13 26 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE14 Drive of PIO line 14 28 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE15 Drive of PIO line 15 30 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 DRIVER2 I/O Drive Register 2 0x00000118 32 read-write 0x00000000 LINE16 Drive of PIO line 16 0 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE17 Drive of PIO line 17 2 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE18 Drive of PIO line 18 4 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE19 Drive of PIO line 19 6 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE20 Drive of PIO line 20 8 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE21 Drive of PIO line 21 10 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE22 Drive of PIO line 22 12 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE23 Drive of PIO line 23 14 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE24 Drive of PIO line 24 16 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE25 Drive of PIO line 25 18 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE26 Drive of PIO line 26 20 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE27 Drive of PIO line 27 22 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE28 Drive of PIO line 28 24 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE29 Drive of PIO line 29 26 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE30 Drive of PIO line 30 28 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE31 Drive of PIO line 31 30 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 PIOB 11004F Parallel Input/Output Controller B PIO PIOB_ 0xFFFFF600 0 0x200 registers PER PIO Enable Register 0x00000000 32 write-only P0 PIO Enable 0 1 write-only P1 PIO Enable 1 1 write-only P2 PIO Enable 2 1 write-only P3 PIO Enable 3 1 write-only P4 PIO Enable 4 1 write-only P5 PIO Enable 5 1 write-only P6 PIO Enable 6 1 write-only P7 PIO Enable 7 1 write-only P8 PIO Enable 8 1 write-only P9 PIO Enable 9 1 write-only P10 PIO Enable 10 1 write-only P11 PIO Enable 11 1 write-only P12 PIO Enable 12 1 write-only P13 PIO Enable 13 1 write-only P14 PIO Enable 14 1 write-only P15 PIO Enable 15 1 write-only P16 PIO Enable 16 1 write-only P17 PIO Enable 17 1 write-only P18 PIO Enable 18 1 write-only P19 PIO Enable 19 1 write-only P20 PIO Enable 20 1 write-only P21 PIO Enable 21 1 write-only P22 PIO Enable 22 1 write-only P23 PIO Enable 23 1 write-only P24 PIO Enable 24 1 write-only P25 PIO Enable 25 1 write-only P26 PIO Enable 26 1 write-only P27 PIO Enable 27 1 write-only P28 PIO Enable 28 1 write-only P29 PIO Enable 29 1 write-only P30 PIO Enable 30 1 write-only P31 PIO Enable 31 1 write-only PDR PIO Disable Register 0x00000004 32 write-only P0 PIO Disable 0 1 write-only P1 PIO Disable 1 1 write-only P2 PIO Disable 2 1 write-only P3 PIO Disable 3 1 write-only P4 PIO Disable 4 1 write-only P5 PIO Disable 5 1 write-only P6 PIO Disable 6 1 write-only P7 PIO Disable 7 1 write-only P8 PIO Disable 8 1 write-only P9 PIO Disable 9 1 write-only P10 PIO Disable 10 1 write-only P11 PIO Disable 11 1 write-only P12 PIO Disable 12 1 write-only P13 PIO Disable 13 1 write-only P14 PIO Disable 14 1 write-only P15 PIO Disable 15 1 write-only P16 PIO Disable 16 1 write-only P17 PIO Disable 17 1 write-only P18 PIO Disable 18 1 write-only P19 PIO Disable 19 1 write-only P20 PIO Disable 20 1 write-only P21 PIO Disable 21 1 write-only P22 PIO Disable 22 1 write-only P23 PIO Disable 23 1 write-only P24 PIO Disable 24 1 write-only P25 PIO Disable 25 1 write-only P26 PIO Disable 26 1 write-only P27 PIO Disable 27 1 write-only P28 PIO Disable 28 1 write-only P29 PIO Disable 29 1 write-only P30 PIO Disable 30 1 write-only P31 PIO Disable 31 1 write-only PSR PIO Status Register 0x00000008 32 read-only P0 PIO Status 0 1 read-only P1 PIO Status 1 1 read-only P2 PIO Status 2 1 read-only P3 PIO Status 3 1 read-only P4 PIO Status 4 1 read-only P5 PIO Status 5 1 read-only P6 PIO Status 6 1 read-only P7 PIO Status 7 1 read-only P8 PIO Status 8 1 read-only P9 PIO Status 9 1 read-only P10 PIO Status 10 1 read-only P11 PIO Status 11 1 read-only P12 PIO Status 12 1 read-only P13 PIO Status 13 1 read-only P14 PIO Status 14 1 read-only P15 PIO Status 15 1 read-only P16 PIO Status 16 1 read-only P17 PIO Status 17 1 read-only P18 PIO Status 18 1 read-only P19 PIO Status 19 1 read-only P20 PIO Status 20 1 read-only P21 PIO Status 21 1 read-only P22 PIO Status 22 1 read-only P23 PIO Status 23 1 read-only P24 PIO Status 24 1 read-only P25 PIO Status 25 1 read-only P26 PIO Status 26 1 read-only P27 PIO Status 27 1 read-only P28 PIO Status 28 1 read-only P29 PIO Status 29 1 read-only P30 PIO Status 30 1 read-only P31 PIO Status 31 1 read-only OER Output Enable Register 0x00000010 32 write-only P0 Output Enable 0 1 write-only P1 Output Enable 1 1 write-only P2 Output Enable 2 1 write-only P3 Output Enable 3 1 write-only P4 Output Enable 4 1 write-only P5 Output Enable 5 1 write-only P6 Output Enable 6 1 write-only P7 Output Enable 7 1 write-only P8 Output Enable 8 1 write-only P9 Output Enable 9 1 write-only P10 Output Enable 10 1 write-only P11 Output Enable 11 1 write-only P12 Output Enable 12 1 write-only P13 Output Enable 13 1 write-only P14 Output Enable 14 1 write-only P15 Output Enable 15 1 write-only P16 Output Enable 16 1 write-only P17 Output Enable 17 1 write-only P18 Output Enable 18 1 write-only P19 Output Enable 19 1 write-only P20 Output Enable 20 1 write-only P21 Output Enable 21 1 write-only P22 Output Enable 22 1 write-only P23 Output Enable 23 1 write-only P24 Output Enable 24 1 write-only P25 Output Enable 25 1 write-only P26 Output Enable 26 1 write-only P27 Output Enable 27 1 write-only P28 Output Enable 28 1 write-only P29 Output Enable 29 1 write-only P30 Output Enable 30 1 write-only P31 Output Enable 31 1 write-only ODR Output Disable Register 0x00000014 32 write-only P0 Output Disable 0 1 write-only P1 Output Disable 1 1 write-only P2 Output Disable 2 1 write-only P3 Output Disable 3 1 write-only P4 Output Disable 4 1 write-only P5 Output Disable 5 1 write-only P6 Output Disable 6 1 write-only P7 Output Disable 7 1 write-only P8 Output Disable 8 1 write-only P9 Output Disable 9 1 write-only P10 Output Disable 10 1 write-only P11 Output Disable 11 1 write-only P12 Output Disable 12 1 write-only P13 Output Disable 13 1 write-only P14 Output Disable 14 1 write-only P15 Output Disable 15 1 write-only P16 Output Disable 16 1 write-only P17 Output Disable 17 1 write-only P18 Output Disable 18 1 write-only P19 Output Disable 19 1 write-only P20 Output Disable 20 1 write-only P21 Output Disable 21 1 write-only P22 Output Disable 22 1 write-only P23 Output Disable 23 1 write-only P24 Output Disable 24 1 write-only P25 Output Disable 25 1 write-only P26 Output Disable 26 1 write-only P27 Output Disable 27 1 write-only P28 Output Disable 28 1 write-only P29 Output Disable 29 1 write-only P30 Output Disable 30 1 write-only P31 Output Disable 31 1 write-only OSR Output Status Register 0x00000018 32 read-only 0x00000000 P0 Output Status 0 1 read-only P1 Output Status 1 1 read-only P2 Output Status 2 1 read-only P3 Output Status 3 1 read-only P4 Output Status 4 1 read-only P5 Output Status 5 1 read-only P6 Output Status 6 1 read-only P7 Output Status 7 1 read-only P8 Output Status 8 1 read-only P9 Output Status 9 1 read-only P10 Output Status 10 1 read-only P11 Output Status 11 1 read-only P12 Output Status 12 1 read-only P13 Output Status 13 1 read-only P14 Output Status 14 1 read-only P15 Output Status 15 1 read-only P16 Output Status 16 1 read-only P17 Output Status 17 1 read-only P18 Output Status 18 1 read-only P19 Output Status 19 1 read-only P20 Output Status 20 1 read-only P21 Output Status 21 1 read-only P22 Output Status 22 1 read-only P23 Output Status 23 1 read-only P24 Output Status 24 1 read-only P25 Output Status 25 1 read-only P26 Output Status 26 1 read-only P27 Output Status 27 1 read-only P28 Output Status 28 1 read-only P29 Output Status 29 1 read-only P30 Output Status 30 1 read-only P31 Output Status 31 1 read-only IFER Glitch Input Filter Enable Register 0x00000020 32 write-only P0 Input Filter Enable 0 1 write-only P1 Input Filter Enable 1 1 write-only P2 Input Filter Enable 2 1 write-only P3 Input Filter Enable 3 1 write-only P4 Input Filter Enable 4 1 write-only P5 Input Filter Enable 5 1 write-only P6 Input Filter Enable 6 1 write-only P7 Input Filter Enable 7 1 write-only P8 Input Filter Enable 8 1 write-only P9 Input Filter Enable 9 1 write-only P10 Input Filter Enable 10 1 write-only P11 Input Filter Enable 11 1 write-only P12 Input Filter Enable 12 1 write-only P13 Input Filter Enable 13 1 write-only P14 Input Filter Enable 14 1 write-only P15 Input Filter Enable 15 1 write-only P16 Input Filter Enable 16 1 write-only P17 Input Filter Enable 17 1 write-only P18 Input Filter Enable 18 1 write-only P19 Input Filter Enable 19 1 write-only P20 Input Filter Enable 20 1 write-only P21 Input Filter Enable 21 1 write-only P22 Input Filter Enable 22 1 write-only P23 Input Filter Enable 23 1 write-only P24 Input Filter Enable 24 1 write-only P25 Input Filter Enable 25 1 write-only P26 Input Filter Enable 26 1 write-only P27 Input Filter Enable 27 1 write-only P28 Input Filter Enable 28 1 write-only P29 Input Filter Enable 29 1 write-only P30 Input Filter Enable 30 1 write-only P31 Input Filter Enable 31 1 write-only IFDR Glitch Input Filter Disable Register 0x00000024 32 write-only P0 Input Filter Disable 0 1 write-only P1 Input Filter Disable 1 1 write-only P2 Input Filter Disable 2 1 write-only P3 Input Filter Disable 3 1 write-only P4 Input Filter Disable 4 1 write-only P5 Input Filter Disable 5 1 write-only P6 Input Filter Disable 6 1 write-only P7 Input Filter Disable 7 1 write-only P8 Input Filter Disable 8 1 write-only P9 Input Filter Disable 9 1 write-only P10 Input Filter Disable 10 1 write-only P11 Input Filter Disable 11 1 write-only P12 Input Filter Disable 12 1 write-only P13 Input Filter Disable 13 1 write-only P14 Input Filter Disable 14 1 write-only P15 Input Filter Disable 15 1 write-only P16 Input Filter Disable 16 1 write-only P17 Input Filter Disable 17 1 write-only P18 Input Filter Disable 18 1 write-only P19 Input Filter Disable 19 1 write-only P20 Input Filter Disable 20 1 write-only P21 Input Filter Disable 21 1 write-only P22 Input Filter Disable 22 1 write-only P23 Input Filter Disable 23 1 write-only P24 Input Filter Disable 24 1 write-only P25 Input Filter Disable 25 1 write-only P26 Input Filter Disable 26 1 write-only P27 Input Filter Disable 27 1 write-only P28 Input Filter Disable 28 1 write-only P29 Input Filter Disable 29 1 write-only P30 Input Filter Disable 30 1 write-only P31 Input Filter Disable 31 1 write-only IFSR Glitch Input Filter Status Register 0x00000028 32 read-only 0x00000000 P0 Input Filer Status 0 1 read-only P1 Input Filer Status 1 1 read-only P2 Input Filer Status 2 1 read-only P3 Input Filer Status 3 1 read-only P4 Input Filer Status 4 1 read-only P5 Input Filer Status 5 1 read-only P6 Input Filer Status 6 1 read-only P7 Input Filer Status 7 1 read-only P8 Input Filer Status 8 1 read-only P9 Input Filer Status 9 1 read-only P10 Input Filer Status 10 1 read-only P11 Input Filer Status 11 1 read-only P12 Input Filer Status 12 1 read-only P13 Input Filer Status 13 1 read-only P14 Input Filer Status 14 1 read-only P15 Input Filer Status 15 1 read-only P16 Input Filer Status 16 1 read-only P17 Input Filer Status 17 1 read-only P18 Input Filer Status 18 1 read-only P19 Input Filer Status 19 1 read-only P20 Input Filer Status 20 1 read-only P21 Input Filer Status 21 1 read-only P22 Input Filer Status 22 1 read-only P23 Input Filer Status 23 1 read-only P24 Input Filer Status 24 1 read-only P25 Input Filer Status 25 1 read-only P26 Input Filer Status 26 1 read-only P27 Input Filer Status 27 1 read-only P28 Input Filer Status 28 1 read-only P29 Input Filer Status 29 1 read-only P30 Input Filer Status 30 1 read-only P31 Input Filer Status 31 1 read-only SODR Set Output Data Register 0x00000030 32 write-only P0 Set Output Data 0 1 write-only P1 Set Output Data 1 1 write-only P2 Set Output Data 2 1 write-only P3 Set Output Data 3 1 write-only P4 Set Output Data 4 1 write-only P5 Set Output Data 5 1 write-only P6 Set Output Data 6 1 write-only P7 Set Output Data 7 1 write-only P8 Set Output Data 8 1 write-only P9 Set Output Data 9 1 write-only P10 Set Output Data 10 1 write-only P11 Set Output Data 11 1 write-only P12 Set Output Data 12 1 write-only P13 Set Output Data 13 1 write-only P14 Set Output Data 14 1 write-only P15 Set Output Data 15 1 write-only P16 Set Output Data 16 1 write-only P17 Set Output Data 17 1 write-only P18 Set Output Data 18 1 write-only P19 Set Output Data 19 1 write-only P20 Set Output Data 20 1 write-only P21 Set Output Data 21 1 write-only P22 Set Output Data 22 1 write-only P23 Set Output Data 23 1 write-only P24 Set Output Data 24 1 write-only P25 Set Output Data 25 1 write-only P26 Set Output Data 26 1 write-only P27 Set Output Data 27 1 write-only P28 Set Output Data 28 1 write-only P29 Set Output Data 29 1 write-only P30 Set Output Data 30 1 write-only P31 Set Output Data 31 1 write-only CODR Clear Output Data Register 0x00000034 32 write-only P0 Clear Output Data 0 1 write-only P1 Clear Output Data 1 1 write-only P2 Clear Output Data 2 1 write-only P3 Clear Output Data 3 1 write-only P4 Clear Output Data 4 1 write-only P5 Clear Output Data 5 1 write-only P6 Clear Output Data 6 1 write-only P7 Clear Output Data 7 1 write-only P8 Clear Output Data 8 1 write-only P9 Clear Output Data 9 1 write-only P10 Clear Output Data 10 1 write-only P11 Clear Output Data 11 1 write-only P12 Clear Output Data 12 1 write-only P13 Clear Output Data 13 1 write-only P14 Clear Output Data 14 1 write-only P15 Clear Output Data 15 1 write-only P16 Clear Output Data 16 1 write-only P17 Clear Output Data 17 1 write-only P18 Clear Output Data 18 1 write-only P19 Clear Output Data 19 1 write-only P20 Clear Output Data 20 1 write-only P21 Clear Output Data 21 1 write-only P22 Clear Output Data 22 1 write-only P23 Clear Output Data 23 1 write-only P24 Clear Output Data 24 1 write-only P25 Clear Output Data 25 1 write-only P26 Clear Output Data 26 1 write-only P27 Clear Output Data 27 1 write-only P28 Clear Output Data 28 1 write-only P29 Clear Output Data 29 1 write-only P30 Clear Output Data 30 1 write-only P31 Clear Output Data 31 1 write-only ODSR Output Data Status Register 0x00000038 32 read-write P0 Output Data Status 0 1 read-write P1 Output Data Status 1 1 read-write P2 Output Data Status 2 1 read-write P3 Output Data Status 3 1 read-write P4 Output Data Status 4 1 read-write P5 Output Data Status 5 1 read-write P6 Output Data Status 6 1 read-write P7 Output Data Status 7 1 read-write P8 Output Data Status 8 1 read-write P9 Output Data Status 9 1 read-write P10 Output Data Status 10 1 read-write P11 Output Data Status 11 1 read-write P12 Output Data Status 12 1 read-write P13 Output Data Status 13 1 read-write P14 Output Data Status 14 1 read-write P15 Output Data Status 15 1 read-write P16 Output Data Status 16 1 read-write P17 Output Data Status 17 1 read-write P18 Output Data Status 18 1 read-write P19 Output Data Status 19 1 read-write P20 Output Data Status 20 1 read-write P21 Output Data Status 21 1 read-write P22 Output Data Status 22 1 read-write P23 Output Data Status 23 1 read-write P24 Output Data Status 24 1 read-write P25 Output Data Status 25 1 read-write P26 Output Data Status 26 1 read-write P27 Output Data Status 27 1 read-write P28 Output Data Status 28 1 read-write P29 Output Data Status 29 1 read-write P30 Output Data Status 30 1 read-write P31 Output Data Status 31 1 read-write PDSR Pin Data Status Register 0x0000003C 32 read-only P0 Output Data Status 0 1 read-only P1 Output Data Status 1 1 read-only P2 Output Data Status 2 1 read-only P3 Output Data Status 3 1 read-only P4 Output Data Status 4 1 read-only P5 Output Data Status 5 1 read-only P6 Output Data Status 6 1 read-only P7 Output Data Status 7 1 read-only P8 Output Data Status 8 1 read-only P9 Output Data Status 9 1 read-only P10 Output Data Status 10 1 read-only P11 Output Data Status 11 1 read-only P12 Output Data Status 12 1 read-only P13 Output Data Status 13 1 read-only P14 Output Data Status 14 1 read-only P15 Output Data Status 15 1 read-only P16 Output Data Status 16 1 read-only P17 Output Data Status 17 1 read-only P18 Output Data Status 18 1 read-only P19 Output Data Status 19 1 read-only P20 Output Data Status 20 1 read-only P21 Output Data Status 21 1 read-only P22 Output Data Status 22 1 read-only P23 Output Data Status 23 1 read-only P24 Output Data Status 24 1 read-only P25 Output Data Status 25 1 read-only P26 Output Data Status 26 1 read-only P27 Output Data Status 27 1 read-only P28 Output Data Status 28 1 read-only P29 Output Data Status 29 1 read-only P30 Output Data Status 30 1 read-only P31 Output Data Status 31 1 read-only IER Interrupt Enable Register 0x00000040 32 write-only P0 Input Change Interrupt Enable 0 1 write-only P1 Input Change Interrupt Enable 1 1 write-only P2 Input Change Interrupt Enable 2 1 write-only P3 Input Change Interrupt Enable 3 1 write-only P4 Input Change Interrupt Enable 4 1 write-only P5 Input Change Interrupt Enable 5 1 write-only P6 Input Change Interrupt Enable 6 1 write-only P7 Input Change Interrupt Enable 7 1 write-only P8 Input Change Interrupt Enable 8 1 write-only P9 Input Change Interrupt Enable 9 1 write-only P10 Input Change Interrupt Enable 10 1 write-only P11 Input Change Interrupt Enable 11 1 write-only P12 Input Change Interrupt Enable 12 1 write-only P13 Input Change Interrupt Enable 13 1 write-only P14 Input Change Interrupt Enable 14 1 write-only P15 Input Change Interrupt Enable 15 1 write-only P16 Input Change Interrupt Enable 16 1 write-only P17 Input Change Interrupt Enable 17 1 write-only P18 Input Change Interrupt Enable 18 1 write-only P19 Input Change Interrupt Enable 19 1 write-only P20 Input Change Interrupt Enable 20 1 write-only P21 Input Change Interrupt Enable 21 1 write-only P22 Input Change Interrupt Enable 22 1 write-only P23 Input Change Interrupt Enable 23 1 write-only P24 Input Change Interrupt Enable 24 1 write-only P25 Input Change Interrupt Enable 25 1 write-only P26 Input Change Interrupt Enable 26 1 write-only P27 Input Change Interrupt Enable 27 1 write-only P28 Input Change Interrupt Enable 28 1 write-only P29 Input Change Interrupt Enable 29 1 write-only P30 Input Change Interrupt Enable 30 1 write-only P31 Input Change Interrupt Enable 31 1 write-only IDR Interrupt Disable Register 0x00000044 32 write-only P0 Input Change Interrupt Disable 0 1 write-only P1 Input Change Interrupt Disable 1 1 write-only P2 Input Change Interrupt Disable 2 1 write-only P3 Input Change Interrupt Disable 3 1 write-only P4 Input Change Interrupt Disable 4 1 write-only P5 Input Change Interrupt Disable 5 1 write-only P6 Input Change Interrupt Disable 6 1 write-only P7 Input Change Interrupt Disable 7 1 write-only P8 Input Change Interrupt Disable 8 1 write-only P9 Input Change Interrupt Disable 9 1 write-only P10 Input Change Interrupt Disable 10 1 write-only P11 Input Change Interrupt Disable 11 1 write-only P12 Input Change Interrupt Disable 12 1 write-only P13 Input Change Interrupt Disable 13 1 write-only P14 Input Change Interrupt Disable 14 1 write-only P15 Input Change Interrupt Disable 15 1 write-only P16 Input Change Interrupt Disable 16 1 write-only P17 Input Change Interrupt Disable 17 1 write-only P18 Input Change Interrupt Disable 18 1 write-only P19 Input Change Interrupt Disable 19 1 write-only P20 Input Change Interrupt Disable 20 1 write-only P21 Input Change Interrupt Disable 21 1 write-only P22 Input Change Interrupt Disable 22 1 write-only P23 Input Change Interrupt Disable 23 1 write-only P24 Input Change Interrupt Disable 24 1 write-only P25 Input Change Interrupt Disable 25 1 write-only P26 Input Change Interrupt Disable 26 1 write-only P27 Input Change Interrupt Disable 27 1 write-only P28 Input Change Interrupt Disable 28 1 write-only P29 Input Change Interrupt Disable 29 1 write-only P30 Input Change Interrupt Disable 30 1 write-only P31 Input Change Interrupt Disable 31 1 write-only IMR Interrupt Mask Register 0x00000048 32 read-only 0x00000000 P0 Input Change Interrupt Mask 0 1 read-only P1 Input Change Interrupt Mask 1 1 read-only P2 Input Change Interrupt Mask 2 1 read-only P3 Input Change Interrupt Mask 3 1 read-only P4 Input Change Interrupt Mask 4 1 read-only P5 Input Change Interrupt Mask 5 1 read-only P6 Input Change Interrupt Mask 6 1 read-only P7 Input Change Interrupt Mask 7 1 read-only P8 Input Change Interrupt Mask 8 1 read-only P9 Input Change Interrupt Mask 9 1 read-only P10 Input Change Interrupt Mask 10 1 read-only P11 Input Change Interrupt Mask 11 1 read-only P12 Input Change Interrupt Mask 12 1 read-only P13 Input Change Interrupt Mask 13 1 read-only P14 Input Change Interrupt Mask 14 1 read-only P15 Input Change Interrupt Mask 15 1 read-only P16 Input Change Interrupt Mask 16 1 read-only P17 Input Change Interrupt Mask 17 1 read-only P18 Input Change Interrupt Mask 18 1 read-only P19 Input Change Interrupt Mask 19 1 read-only P20 Input Change Interrupt Mask 20 1 read-only P21 Input Change Interrupt Mask 21 1 read-only P22 Input Change Interrupt Mask 22 1 read-only P23 Input Change Interrupt Mask 23 1 read-only P24 Input Change Interrupt Mask 24 1 read-only P25 Input Change Interrupt Mask 25 1 read-only P26 Input Change Interrupt Mask 26 1 read-only P27 Input Change Interrupt Mask 27 1 read-only P28 Input Change Interrupt Mask 28 1 read-only P29 Input Change Interrupt Mask 29 1 read-only P30 Input Change Interrupt Mask 30 1 read-only P31 Input Change Interrupt Mask 31 1 read-only ISR Interrupt Status Register 0x0000004C 32 read-only 0x00000000 P0 Input Change Interrupt Status 0 1 read-only P1 Input Change Interrupt Status 1 1 read-only P2 Input Change Interrupt Status 2 1 read-only P3 Input Change Interrupt Status 3 1 read-only P4 Input Change Interrupt Status 4 1 read-only P5 Input Change Interrupt Status 5 1 read-only P6 Input Change Interrupt Status 6 1 read-only P7 Input Change Interrupt Status 7 1 read-only P8 Input Change Interrupt Status 8 1 read-only P9 Input Change Interrupt Status 9 1 read-only P10 Input Change Interrupt Status 10 1 read-only P11 Input Change Interrupt Status 11 1 read-only P12 Input Change Interrupt Status 12 1 read-only P13 Input Change Interrupt Status 13 1 read-only P14 Input Change Interrupt Status 14 1 read-only P15 Input Change Interrupt Status 15 1 read-only P16 Input Change Interrupt Status 16 1 read-only P17 Input Change Interrupt Status 17 1 read-only P18 Input Change Interrupt Status 18 1 read-only P19 Input Change Interrupt Status 19 1 read-only P20 Input Change Interrupt Status 20 1 read-only P21 Input Change Interrupt Status 21 1 read-only P22 Input Change Interrupt Status 22 1 read-only P23 Input Change Interrupt Status 23 1 read-only P24 Input Change Interrupt Status 24 1 read-only P25 Input Change Interrupt Status 25 1 read-only P26 Input Change Interrupt Status 26 1 read-only P27 Input Change Interrupt Status 27 1 read-only P28 Input Change Interrupt Status 28 1 read-only P29 Input Change Interrupt Status 29 1 read-only P30 Input Change Interrupt Status 30 1 read-only P31 Input Change Interrupt Status 31 1 read-only MDER Multi-driver Enable Register 0x00000050 32 write-only P0 Multi Drive Enable. 0 1 write-only P1 Multi Drive Enable. 1 1 write-only P2 Multi Drive Enable. 2 1 write-only P3 Multi Drive Enable. 3 1 write-only P4 Multi Drive Enable. 4 1 write-only P5 Multi Drive Enable. 5 1 write-only P6 Multi Drive Enable. 6 1 write-only P7 Multi Drive Enable. 7 1 write-only P8 Multi Drive Enable. 8 1 write-only P9 Multi Drive Enable. 9 1 write-only P10 Multi Drive Enable. 10 1 write-only P11 Multi Drive Enable. 11 1 write-only P12 Multi Drive Enable. 12 1 write-only P13 Multi Drive Enable. 13 1 write-only P14 Multi Drive Enable. 14 1 write-only P15 Multi Drive Enable. 15 1 write-only P16 Multi Drive Enable. 16 1 write-only P17 Multi Drive Enable. 17 1 write-only P18 Multi Drive Enable. 18 1 write-only P19 Multi Drive Enable. 19 1 write-only P20 Multi Drive Enable. 20 1 write-only P21 Multi Drive Enable. 21 1 write-only P22 Multi Drive Enable. 22 1 write-only P23 Multi Drive Enable. 23 1 write-only P24 Multi Drive Enable. 24 1 write-only P25 Multi Drive Enable. 25 1 write-only P26 Multi Drive Enable. 26 1 write-only P27 Multi Drive Enable. 27 1 write-only P28 Multi Drive Enable. 28 1 write-only P29 Multi Drive Enable. 29 1 write-only P30 Multi Drive Enable. 30 1 write-only P31 Multi Drive Enable. 31 1 write-only MDDR Multi-driver Disable Register 0x00000054 32 write-only P0 Multi Drive Disable. 0 1 write-only P1 Multi Drive Disable. 1 1 write-only P2 Multi Drive Disable. 2 1 write-only P3 Multi Drive Disable. 3 1 write-only P4 Multi Drive Disable. 4 1 write-only P5 Multi Drive Disable. 5 1 write-only P6 Multi Drive Disable. 6 1 write-only P7 Multi Drive Disable. 7 1 write-only P8 Multi Drive Disable. 8 1 write-only P9 Multi Drive Disable. 9 1 write-only P10 Multi Drive Disable. 10 1 write-only P11 Multi Drive Disable. 11 1 write-only P12 Multi Drive Disable. 12 1 write-only P13 Multi Drive Disable. 13 1 write-only P14 Multi Drive Disable. 14 1 write-only P15 Multi Drive Disable. 15 1 write-only P16 Multi Drive Disable. 16 1 write-only P17 Multi Drive Disable. 17 1 write-only P18 Multi Drive Disable. 18 1 write-only P19 Multi Drive Disable. 19 1 write-only P20 Multi Drive Disable. 20 1 write-only P21 Multi Drive Disable. 21 1 write-only P22 Multi Drive Disable. 22 1 write-only P23 Multi Drive Disable. 23 1 write-only P24 Multi Drive Disable. 24 1 write-only P25 Multi Drive Disable. 25 1 write-only P26 Multi Drive Disable. 26 1 write-only P27 Multi Drive Disable. 27 1 write-only P28 Multi Drive Disable. 28 1 write-only P29 Multi Drive Disable. 29 1 write-only P30 Multi Drive Disable. 30 1 write-only P31 Multi Drive Disable. 31 1 write-only MDSR Multi-driver Status Register 0x00000058 32 read-only 0x00000000 P0 Multi Drive Status. 0 1 read-only P1 Multi Drive Status. 1 1 read-only P2 Multi Drive Status. 2 1 read-only P3 Multi Drive Status. 3 1 read-only P4 Multi Drive Status. 4 1 read-only P5 Multi Drive Status. 5 1 read-only P6 Multi Drive Status. 6 1 read-only P7 Multi Drive Status. 7 1 read-only P8 Multi Drive Status. 8 1 read-only P9 Multi Drive Status. 9 1 read-only P10 Multi Drive Status. 10 1 read-only P11 Multi Drive Status. 11 1 read-only P12 Multi Drive Status. 12 1 read-only P13 Multi Drive Status. 13 1 read-only P14 Multi Drive Status. 14 1 read-only P15 Multi Drive Status. 15 1 read-only P16 Multi Drive Status. 16 1 read-only P17 Multi Drive Status. 17 1 read-only P18 Multi Drive Status. 18 1 read-only P19 Multi Drive Status. 19 1 read-only P20 Multi Drive Status. 20 1 read-only P21 Multi Drive Status. 21 1 read-only P22 Multi Drive Status. 22 1 read-only P23 Multi Drive Status. 23 1 read-only P24 Multi Drive Status. 24 1 read-only P25 Multi Drive Status. 25 1 read-only P26 Multi Drive Status. 26 1 read-only P27 Multi Drive Status. 27 1 read-only P28 Multi Drive Status. 28 1 read-only P29 Multi Drive Status. 29 1 read-only P30 Multi Drive Status. 30 1 read-only P31 Multi Drive Status. 31 1 read-only PUDR Pull-up Disable Register 0x00000060 32 write-only P0 Pull Up Disable. 0 1 write-only P1 Pull Up Disable. 1 1 write-only P2 Pull Up Disable. 2 1 write-only P3 Pull Up Disable. 3 1 write-only P4 Pull Up Disable. 4 1 write-only P5 Pull Up Disable. 5 1 write-only P6 Pull Up Disable. 6 1 write-only P7 Pull Up Disable. 7 1 write-only P8 Pull Up Disable. 8 1 write-only P9 Pull Up Disable. 9 1 write-only P10 Pull Up Disable. 10 1 write-only P11 Pull Up Disable. 11 1 write-only P12 Pull Up Disable. 12 1 write-only P13 Pull Up Disable. 13 1 write-only P14 Pull Up Disable. 14 1 write-only P15 Pull Up Disable. 15 1 write-only P16 Pull Up Disable. 16 1 write-only P17 Pull Up Disable. 17 1 write-only P18 Pull Up Disable. 18 1 write-only P19 Pull Up Disable. 19 1 write-only P20 Pull Up Disable. 20 1 write-only P21 Pull Up Disable. 21 1 write-only P22 Pull Up Disable. 22 1 write-only P23 Pull Up Disable. 23 1 write-only P24 Pull Up Disable. 24 1 write-only P25 Pull Up Disable. 25 1 write-only P26 Pull Up Disable. 26 1 write-only P27 Pull Up Disable. 27 1 write-only P28 Pull Up Disable. 28 1 write-only P29 Pull Up Disable. 29 1 write-only P30 Pull Up Disable. 30 1 write-only P31 Pull Up Disable. 31 1 write-only PUER Pull-up Enable Register 0x00000064 32 write-only P0 Pull Up Enable. 0 1 write-only P1 Pull Up Enable. 1 1 write-only P2 Pull Up Enable. 2 1 write-only P3 Pull Up Enable. 3 1 write-only P4 Pull Up Enable. 4 1 write-only P5 Pull Up Enable. 5 1 write-only P6 Pull Up Enable. 6 1 write-only P7 Pull Up Enable. 7 1 write-only P8 Pull Up Enable. 8 1 write-only P9 Pull Up Enable. 9 1 write-only P10 Pull Up Enable. 10 1 write-only P11 Pull Up Enable. 11 1 write-only P12 Pull Up Enable. 12 1 write-only P13 Pull Up Enable. 13 1 write-only P14 Pull Up Enable. 14 1 write-only P15 Pull Up Enable. 15 1 write-only P16 Pull Up Enable. 16 1 write-only P17 Pull Up Enable. 17 1 write-only P18 Pull Up Enable. 18 1 write-only P19 Pull Up Enable. 19 1 write-only P20 Pull Up Enable. 20 1 write-only P21 Pull Up Enable. 21 1 write-only P22 Pull Up Enable. 22 1 write-only P23 Pull Up Enable. 23 1 write-only P24 Pull Up Enable. 24 1 write-only P25 Pull Up Enable. 25 1 write-only P26 Pull Up Enable. 26 1 write-only P27 Pull Up Enable. 27 1 write-only P28 Pull Up Enable. 28 1 write-only P29 Pull Up Enable. 29 1 write-only P30 Pull Up Enable. 30 1 write-only P31 Pull Up Enable. 31 1 write-only PUSR Pad Pull-up Status Register 0x00000068 32 read-only P0 Pull Up Status. 0 1 read-only P1 Pull Up Status. 1 1 read-only P2 Pull Up Status. 2 1 read-only P3 Pull Up Status. 3 1 read-only P4 Pull Up Status. 4 1 read-only P5 Pull Up Status. 5 1 read-only P6 Pull Up Status. 6 1 read-only P7 Pull Up Status. 7 1 read-only P8 Pull Up Status. 8 1 read-only P9 Pull Up Status. 9 1 read-only P10 Pull Up Status. 10 1 read-only P11 Pull Up Status. 11 1 read-only P12 Pull Up Status. 12 1 read-only P13 Pull Up Status. 13 1 read-only P14 Pull Up Status. 14 1 read-only P15 Pull Up Status. 15 1 read-only P16 Pull Up Status. 16 1 read-only P17 Pull Up Status. 17 1 read-only P18 Pull Up Status. 18 1 read-only P19 Pull Up Status. 19 1 read-only P20 Pull Up Status. 20 1 read-only P21 Pull Up Status. 21 1 read-only P22 Pull Up Status. 22 1 read-only P23 Pull Up Status. 23 1 read-only P24 Pull Up Status. 24 1 read-only P25 Pull Up Status. 25 1 read-only P26 Pull Up Status. 26 1 read-only P27 Pull Up Status. 27 1 read-only P28 Pull Up Status. 28 1 read-only P29 Pull Up Status. 29 1 read-only P30 Pull Up Status. 30 1 read-only P31 Pull Up Status. 31 1 read-only 2 4 0-1 ABCDSR[%s] Peripheral Select Register 0x00000070 32 read-write P0 Peripheral Select. 0 1 read-write P1 Peripheral Select. 1 1 read-write P2 Peripheral Select. 2 1 read-write P3 Peripheral Select. 3 1 read-write P4 Peripheral Select. 4 1 read-write P5 Peripheral Select. 5 1 read-write P6 Peripheral Select. 6 1 read-write P7 Peripheral Select. 7 1 read-write P8 Peripheral Select. 8 1 read-write P9 Peripheral Select. 9 1 read-write P10 Peripheral Select. 10 1 read-write P11 Peripheral Select. 11 1 read-write P12 Peripheral Select. 12 1 read-write P13 Peripheral Select. 13 1 read-write P14 Peripheral Select. 14 1 read-write P15 Peripheral Select. 15 1 read-write P16 Peripheral Select. 16 1 read-write P17 Peripheral Select. 17 1 read-write P18 Peripheral Select. 18 1 read-write P19 Peripheral Select. 19 1 read-write P20 Peripheral Select. 20 1 read-write P21 Peripheral Select. 21 1 read-write P22 Peripheral Select. 22 1 read-write P23 Peripheral Select. 23 1 read-write P24 Peripheral Select. 24 1 read-write P25 Peripheral Select. 25 1 read-write P26 Peripheral Select. 26 1 read-write P27 Peripheral Select. 27 1 read-write P28 Peripheral Select. 28 1 read-write P29 Peripheral Select. 29 1 read-write P30 Peripheral Select. 30 1 read-write P31 Peripheral Select. 31 1 read-write IFSCDR Input Filter Slow Clock Disable Register 0x00000080 32 write-only P0 PIO Clock Glitch Filtering Select. 0 1 write-only P1 PIO Clock Glitch Filtering Select. 1 1 write-only P2 PIO Clock Glitch Filtering Select. 2 1 write-only P3 PIO Clock Glitch Filtering Select. 3 1 write-only P4 PIO Clock Glitch Filtering Select. 4 1 write-only P5 PIO Clock Glitch Filtering Select. 5 1 write-only P6 PIO Clock Glitch Filtering Select. 6 1 write-only P7 PIO Clock Glitch Filtering Select. 7 1 write-only P8 PIO Clock Glitch Filtering Select. 8 1 write-only P9 PIO Clock Glitch Filtering Select. 9 1 write-only P10 PIO Clock Glitch Filtering Select. 10 1 write-only P11 PIO Clock Glitch Filtering Select. 11 1 write-only P12 PIO Clock Glitch Filtering Select. 12 1 write-only P13 PIO Clock Glitch Filtering Select. 13 1 write-only P14 PIO Clock Glitch Filtering Select. 14 1 write-only P15 PIO Clock Glitch Filtering Select. 15 1 write-only P16 PIO Clock Glitch Filtering Select. 16 1 write-only P17 PIO Clock Glitch Filtering Select. 17 1 write-only P18 PIO Clock Glitch Filtering Select. 18 1 write-only P19 PIO Clock Glitch Filtering Select. 19 1 write-only P20 PIO Clock Glitch Filtering Select. 20 1 write-only P21 PIO Clock Glitch Filtering Select. 21 1 write-only P22 PIO Clock Glitch Filtering Select. 22 1 write-only P23 PIO Clock Glitch Filtering Select. 23 1 write-only P24 PIO Clock Glitch Filtering Select. 24 1 write-only P25 PIO Clock Glitch Filtering Select. 25 1 write-only P26 PIO Clock Glitch Filtering Select. 26 1 write-only P27 PIO Clock Glitch Filtering Select. 27 1 write-only P28 PIO Clock Glitch Filtering Select. 28 1 write-only P29 PIO Clock Glitch Filtering Select. 29 1 write-only P30 PIO Clock Glitch Filtering Select. 30 1 write-only P31 PIO Clock Glitch Filtering Select. 31 1 write-only IFSCER Input Filter Slow Clock Enable Register 0x00000084 32 write-only P0 Debouncing Filtering Select. 0 1 write-only P1 Debouncing Filtering Select. 1 1 write-only P2 Debouncing Filtering Select. 2 1 write-only P3 Debouncing Filtering Select. 3 1 write-only P4 Debouncing Filtering Select. 4 1 write-only P5 Debouncing Filtering Select. 5 1 write-only P6 Debouncing Filtering Select. 6 1 write-only P7 Debouncing Filtering Select. 7 1 write-only P8 Debouncing Filtering Select. 8 1 write-only P9 Debouncing Filtering Select. 9 1 write-only P10 Debouncing Filtering Select. 10 1 write-only P11 Debouncing Filtering Select. 11 1 write-only P12 Debouncing Filtering Select. 12 1 write-only P13 Debouncing Filtering Select. 13 1 write-only P14 Debouncing Filtering Select. 14 1 write-only P15 Debouncing Filtering Select. 15 1 write-only P16 Debouncing Filtering Select. 16 1 write-only P17 Debouncing Filtering Select. 17 1 write-only P18 Debouncing Filtering Select. 18 1 write-only P19 Debouncing Filtering Select. 19 1 write-only P20 Debouncing Filtering Select. 20 1 write-only P21 Debouncing Filtering Select. 21 1 write-only P22 Debouncing Filtering Select. 22 1 write-only P23 Debouncing Filtering Select. 23 1 write-only P24 Debouncing Filtering Select. 24 1 write-only P25 Debouncing Filtering Select. 25 1 write-only P26 Debouncing Filtering Select. 26 1 write-only P27 Debouncing Filtering Select. 27 1 write-only P28 Debouncing Filtering Select. 28 1 write-only P29 Debouncing Filtering Select. 29 1 write-only P30 Debouncing Filtering Select. 30 1 write-only P31 Debouncing Filtering Select. 31 1 write-only IFSCSR Input Filter Slow Clock Status Register 0x00000088 32 read-only 0x00000000 P0 Glitch or Debouncing Filter Selection Status 0 1 read-only P1 Glitch or Debouncing Filter Selection Status 1 1 read-only P2 Glitch or Debouncing Filter Selection Status 2 1 read-only P3 Glitch or Debouncing Filter Selection Status 3 1 read-only P4 Glitch or Debouncing Filter Selection Status 4 1 read-only P5 Glitch or Debouncing Filter Selection Status 5 1 read-only P6 Glitch or Debouncing Filter Selection Status 6 1 read-only P7 Glitch or Debouncing Filter Selection Status 7 1 read-only P8 Glitch or Debouncing Filter Selection Status 8 1 read-only P9 Glitch or Debouncing Filter Selection Status 9 1 read-only P10 Glitch or Debouncing Filter Selection Status 10 1 read-only P11 Glitch or Debouncing Filter Selection Status 11 1 read-only P12 Glitch or Debouncing Filter Selection Status 12 1 read-only P13 Glitch or Debouncing Filter Selection Status 13 1 read-only P14 Glitch or Debouncing Filter Selection Status 14 1 read-only P15 Glitch or Debouncing Filter Selection Status 15 1 read-only P16 Glitch or Debouncing Filter Selection Status 16 1 read-only P17 Glitch or Debouncing Filter Selection Status 17 1 read-only P18 Glitch or Debouncing Filter Selection Status 18 1 read-only P19 Glitch or Debouncing Filter Selection Status 19 1 read-only P20 Glitch or Debouncing Filter Selection Status 20 1 read-only P21 Glitch or Debouncing Filter Selection Status 21 1 read-only P22 Glitch or Debouncing Filter Selection Status 22 1 read-only P23 Glitch or Debouncing Filter Selection Status 23 1 read-only P24 Glitch or Debouncing Filter Selection Status 24 1 read-only P25 Glitch or Debouncing Filter Selection Status 25 1 read-only P26 Glitch or Debouncing Filter Selection Status 26 1 read-only P27 Glitch or Debouncing Filter Selection Status 27 1 read-only P28 Glitch or Debouncing Filter Selection Status 28 1 read-only P29 Glitch or Debouncing Filter Selection Status 29 1 read-only P30 Glitch or Debouncing Filter Selection Status 30 1 read-only P31 Glitch or Debouncing Filter Selection Status 31 1 read-only SCDR Slow Clock Divider Debouncing Register 0x0000008C 32 read-write 0x00000000 DIV 0 14 read-write PPDDR Pad Pull-down Disable Register 0x00000090 32 write-only P0 Pull Down Disable. 0 1 write-only P1 Pull Down Disable. 1 1 write-only P2 Pull Down Disable. 2 1 write-only P3 Pull Down Disable. 3 1 write-only P4 Pull Down Disable. 4 1 write-only P5 Pull Down Disable. 5 1 write-only P6 Pull Down Disable. 6 1 write-only P7 Pull Down Disable. 7 1 write-only P8 Pull Down Disable. 8 1 write-only P9 Pull Down Disable. 9 1 write-only P10 Pull Down Disable. 10 1 write-only P11 Pull Down Disable. 11 1 write-only P12 Pull Down Disable. 12 1 write-only P13 Pull Down Disable. 13 1 write-only P14 Pull Down Disable. 14 1 write-only P15 Pull Down Disable. 15 1 write-only P16 Pull Down Disable. 16 1 write-only P17 Pull Down Disable. 17 1 write-only P18 Pull Down Disable. 18 1 write-only P19 Pull Down Disable. 19 1 write-only P20 Pull Down Disable. 20 1 write-only P21 Pull Down Disable. 21 1 write-only P22 Pull Down Disable. 22 1 write-only P23 Pull Down Disable. 23 1 write-only P24 Pull Down Disable. 24 1 write-only P25 Pull Down Disable. 25 1 write-only P26 Pull Down Disable. 26 1 write-only P27 Pull Down Disable. 27 1 write-only P28 Pull Down Disable. 28 1 write-only P29 Pull Down Disable. 29 1 write-only P30 Pull Down Disable. 30 1 write-only P31 Pull Down Disable. 31 1 write-only PPDER Pad Pull-down Enable Register 0x00000094 32 write-only P0 Pull Down Enable. 0 1 write-only P1 Pull Down Enable. 1 1 write-only P2 Pull Down Enable. 2 1 write-only P3 Pull Down Enable. 3 1 write-only P4 Pull Down Enable. 4 1 write-only P5 Pull Down Enable. 5 1 write-only P6 Pull Down Enable. 6 1 write-only P7 Pull Down Enable. 7 1 write-only P8 Pull Down Enable. 8 1 write-only P9 Pull Down Enable. 9 1 write-only P10 Pull Down Enable. 10 1 write-only P11 Pull Down Enable. 11 1 write-only P12 Pull Down Enable. 12 1 write-only P13 Pull Down Enable. 13 1 write-only P14 Pull Down Enable. 14 1 write-only P15 Pull Down Enable. 15 1 write-only P16 Pull Down Enable. 16 1 write-only P17 Pull Down Enable. 17 1 write-only P18 Pull Down Enable. 18 1 write-only P19 Pull Down Enable. 19 1 write-only P20 Pull Down Enable. 20 1 write-only P21 Pull Down Enable. 21 1 write-only P22 Pull Down Enable. 22 1 write-only P23 Pull Down Enable. 23 1 write-only P24 Pull Down Enable. 24 1 write-only P25 Pull Down Enable. 25 1 write-only P26 Pull Down Enable. 26 1 write-only P27 Pull Down Enable. 27 1 write-only P28 Pull Down Enable. 28 1 write-only P29 Pull Down Enable. 29 1 write-only P30 Pull Down Enable. 30 1 write-only P31 Pull Down Enable. 31 1 write-only PPDSR Pad Pull-down Status Register 0x00000098 32 read-only P0 Pull Down Status. 0 1 read-only P1 Pull Down Status. 1 1 read-only P2 Pull Down Status. 2 1 read-only P3 Pull Down Status. 3 1 read-only P4 Pull Down Status. 4 1 read-only P5 Pull Down Status. 5 1 read-only P6 Pull Down Status. 6 1 read-only P7 Pull Down Status. 7 1 read-only P8 Pull Down Status. 8 1 read-only P9 Pull Down Status. 9 1 read-only P10 Pull Down Status. 10 1 read-only P11 Pull Down Status. 11 1 read-only P12 Pull Down Status. 12 1 read-only P13 Pull Down Status. 13 1 read-only P14 Pull Down Status. 14 1 read-only P15 Pull Down Status. 15 1 read-only P16 Pull Down Status. 16 1 read-only P17 Pull Down Status. 17 1 read-only P18 Pull Down Status. 18 1 read-only P19 Pull Down Status. 19 1 read-only P20 Pull Down Status. 20 1 read-only P21 Pull Down Status. 21 1 read-only P22 Pull Down Status. 22 1 read-only P23 Pull Down Status. 23 1 read-only P24 Pull Down Status. 24 1 read-only P25 Pull Down Status. 25 1 read-only P26 Pull Down Status. 26 1 read-only P27 Pull Down Status. 27 1 read-only P28 Pull Down Status. 28 1 read-only P29 Pull Down Status. 29 1 read-only P30 Pull Down Status. 30 1 read-only P31 Pull Down Status. 31 1 read-only OWER Output Write Enable 0x000000A0 32 write-only P0 Output Write Enable. 0 1 write-only P1 Output Write Enable. 1 1 write-only P2 Output Write Enable. 2 1 write-only P3 Output Write Enable. 3 1 write-only P4 Output Write Enable. 4 1 write-only P5 Output Write Enable. 5 1 write-only P6 Output Write Enable. 6 1 write-only P7 Output Write Enable. 7 1 write-only P8 Output Write Enable. 8 1 write-only P9 Output Write Enable. 9 1 write-only P10 Output Write Enable. 10 1 write-only P11 Output Write Enable. 11 1 write-only P12 Output Write Enable. 12 1 write-only P13 Output Write Enable. 13 1 write-only P14 Output Write Enable. 14 1 write-only P15 Output Write Enable. 15 1 write-only P16 Output Write Enable. 16 1 write-only P17 Output Write Enable. 17 1 write-only P18 Output Write Enable. 18 1 write-only P19 Output Write Enable. 19 1 write-only P20 Output Write Enable. 20 1 write-only P21 Output Write Enable. 21 1 write-only P22 Output Write Enable. 22 1 write-only P23 Output Write Enable. 23 1 write-only P24 Output Write Enable. 24 1 write-only P25 Output Write Enable. 25 1 write-only P26 Output Write Enable. 26 1 write-only P27 Output Write Enable. 27 1 write-only P28 Output Write Enable. 28 1 write-only P29 Output Write Enable. 29 1 write-only P30 Output Write Enable. 30 1 write-only P31 Output Write Enable. 31 1 write-only OWDR Output Write Disable 0x000000A4 32 write-only P0 Output Write Disable. 0 1 write-only P1 Output Write Disable. 1 1 write-only P2 Output Write Disable. 2 1 write-only P3 Output Write Disable. 3 1 write-only P4 Output Write Disable. 4 1 write-only P5 Output Write Disable. 5 1 write-only P6 Output Write Disable. 6 1 write-only P7 Output Write Disable. 7 1 write-only P8 Output Write Disable. 8 1 write-only P9 Output Write Disable. 9 1 write-only P10 Output Write Disable. 10 1 write-only P11 Output Write Disable. 11 1 write-only P12 Output Write Disable. 12 1 write-only P13 Output Write Disable. 13 1 write-only P14 Output Write Disable. 14 1 write-only P15 Output Write Disable. 15 1 write-only P16 Output Write Disable. 16 1 write-only P17 Output Write Disable. 17 1 write-only P18 Output Write Disable. 18 1 write-only P19 Output Write Disable. 19 1 write-only P20 Output Write Disable. 20 1 write-only P21 Output Write Disable. 21 1 write-only P22 Output Write Disable. 22 1 write-only P23 Output Write Disable. 23 1 write-only P24 Output Write Disable. 24 1 write-only P25 Output Write Disable. 25 1 write-only P26 Output Write Disable. 26 1 write-only P27 Output Write Disable. 27 1 write-only P28 Output Write Disable. 28 1 write-only P29 Output Write Disable. 29 1 write-only P30 Output Write Disable. 30 1 write-only P31 Output Write Disable. 31 1 write-only OWSR Output Write Status Register 0x000000A8 32 read-only 0x00000000 P0 Output Write Status. 0 1 read-only P1 Output Write Status. 1 1 read-only P2 Output Write Status. 2 1 read-only P3 Output Write Status. 3 1 read-only P4 Output Write Status. 4 1 read-only P5 Output Write Status. 5 1 read-only P6 Output Write Status. 6 1 read-only P7 Output Write Status. 7 1 read-only P8 Output Write Status. 8 1 read-only P9 Output Write Status. 9 1 read-only P10 Output Write Status. 10 1 read-only P11 Output Write Status. 11 1 read-only P12 Output Write Status. 12 1 read-only P13 Output Write Status. 13 1 read-only P14 Output Write Status. 14 1 read-only P15 Output Write Status. 15 1 read-only P16 Output Write Status. 16 1 read-only P17 Output Write Status. 17 1 read-only P18 Output Write Status. 18 1 read-only P19 Output Write Status. 19 1 read-only P20 Output Write Status. 20 1 read-only P21 Output Write Status. 21 1 read-only P22 Output Write Status. 22 1 read-only P23 Output Write Status. 23 1 read-only P24 Output Write Status. 24 1 read-only P25 Output Write Status. 25 1 read-only P26 Output Write Status. 26 1 read-only P27 Output Write Status. 27 1 read-only P28 Output Write Status. 28 1 read-only P29 Output Write Status. 29 1 read-only P30 Output Write Status. 30 1 read-only P31 Output Write Status. 31 1 read-only AIMER Additional Interrupt Modes Enable Register 0x000000B0 32 write-only P0 Additional Interrupt Modes Enable. 0 1 write-only P1 Additional Interrupt Modes Enable. 1 1 write-only P2 Additional Interrupt Modes Enable. 2 1 write-only P3 Additional Interrupt Modes Enable. 3 1 write-only P4 Additional Interrupt Modes Enable. 4 1 write-only P5 Additional Interrupt Modes Enable. 5 1 write-only P6 Additional Interrupt Modes Enable. 6 1 write-only P7 Additional Interrupt Modes Enable. 7 1 write-only P8 Additional Interrupt Modes Enable. 8 1 write-only P9 Additional Interrupt Modes Enable. 9 1 write-only P10 Additional Interrupt Modes Enable. 10 1 write-only P11 Additional Interrupt Modes Enable. 11 1 write-only P12 Additional Interrupt Modes Enable. 12 1 write-only P13 Additional Interrupt Modes Enable. 13 1 write-only P14 Additional Interrupt Modes Enable. 14 1 write-only P15 Additional Interrupt Modes Enable. 15 1 write-only P16 Additional Interrupt Modes Enable. 16 1 write-only P17 Additional Interrupt Modes Enable. 17 1 write-only P18 Additional Interrupt Modes Enable. 18 1 write-only P19 Additional Interrupt Modes Enable. 19 1 write-only P20 Additional Interrupt Modes Enable. 20 1 write-only P21 Additional Interrupt Modes Enable. 21 1 write-only P22 Additional Interrupt Modes Enable. 22 1 write-only P23 Additional Interrupt Modes Enable. 23 1 write-only P24 Additional Interrupt Modes Enable. 24 1 write-only P25 Additional Interrupt Modes Enable. 25 1 write-only P26 Additional Interrupt Modes Enable. 26 1 write-only P27 Additional Interrupt Modes Enable. 27 1 write-only P28 Additional Interrupt Modes Enable. 28 1 write-only P29 Additional Interrupt Modes Enable. 29 1 write-only P30 Additional Interrupt Modes Enable. 30 1 write-only P31 Additional Interrupt Modes Enable. 31 1 write-only AIMDR Additional Interrupt Modes Disables Register 0x000000B4 32 write-only P0 Additional Interrupt Modes Disable. 0 1 write-only P1 Additional Interrupt Modes Disable. 1 1 write-only P2 Additional Interrupt Modes Disable. 2 1 write-only P3 Additional Interrupt Modes Disable. 3 1 write-only P4 Additional Interrupt Modes Disable. 4 1 write-only P5 Additional Interrupt Modes Disable. 5 1 write-only P6 Additional Interrupt Modes Disable. 6 1 write-only P7 Additional Interrupt Modes Disable. 7 1 write-only P8 Additional Interrupt Modes Disable. 8 1 write-only P9 Additional Interrupt Modes Disable. 9 1 write-only P10 Additional Interrupt Modes Disable. 10 1 write-only P11 Additional Interrupt Modes Disable. 11 1 write-only P12 Additional Interrupt Modes Disable. 12 1 write-only P13 Additional Interrupt Modes Disable. 13 1 write-only P14 Additional Interrupt Modes Disable. 14 1 write-only P15 Additional Interrupt Modes Disable. 15 1 write-only P16 Additional Interrupt Modes Disable. 16 1 write-only P17 Additional Interrupt Modes Disable. 17 1 write-only P18 Additional Interrupt Modes Disable. 18 1 write-only P19 Additional Interrupt Modes Disable. 19 1 write-only P20 Additional Interrupt Modes Disable. 20 1 write-only P21 Additional Interrupt Modes Disable. 21 1 write-only P22 Additional Interrupt Modes Disable. 22 1 write-only P23 Additional Interrupt Modes Disable. 23 1 write-only P24 Additional Interrupt Modes Disable. 24 1 write-only P25 Additional Interrupt Modes Disable. 25 1 write-only P26 Additional Interrupt Modes Disable. 26 1 write-only P27 Additional Interrupt Modes Disable. 27 1 write-only P28 Additional Interrupt Modes Disable. 28 1 write-only P29 Additional Interrupt Modes Disable. 29 1 write-only P30 Additional Interrupt Modes Disable. 30 1 write-only P31 Additional Interrupt Modes Disable. 31 1 write-only AIMMR Additional Interrupt Modes Mask Register 0x000000B8 32 read-only 0x00000000 P0 Peripheral CD Status. 0 1 read-only P1 Peripheral CD Status. 1 1 read-only P2 Peripheral CD Status. 2 1 read-only P3 Peripheral CD Status. 3 1 read-only P4 Peripheral CD Status. 4 1 read-only P5 Peripheral CD Status. 5 1 read-only P6 Peripheral CD Status. 6 1 read-only P7 Peripheral CD Status. 7 1 read-only P8 Peripheral CD Status. 8 1 read-only P9 Peripheral CD Status. 9 1 read-only P10 Peripheral CD Status. 10 1 read-only P11 Peripheral CD Status. 11 1 read-only P12 Peripheral CD Status. 12 1 read-only P13 Peripheral CD Status. 13 1 read-only P14 Peripheral CD Status. 14 1 read-only P15 Peripheral CD Status. 15 1 read-only P16 Peripheral CD Status. 16 1 read-only P17 Peripheral CD Status. 17 1 read-only P18 Peripheral CD Status. 18 1 read-only P19 Peripheral CD Status. 19 1 read-only P20 Peripheral CD Status. 20 1 read-only P21 Peripheral CD Status. 21 1 read-only P22 Peripheral CD Status. 22 1 read-only P23 Peripheral CD Status. 23 1 read-only P24 Peripheral CD Status. 24 1 read-only P25 Peripheral CD Status. 25 1 read-only P26 Peripheral CD Status. 26 1 read-only P27 Peripheral CD Status. 27 1 read-only P28 Peripheral CD Status. 28 1 read-only P29 Peripheral CD Status. 29 1 read-only P30 Peripheral CD Status. 30 1 read-only P31 Peripheral CD Status. 31 1 read-only ESR Edge Select Register 0x000000C0 32 write-only P0 Edge Interrupt Selection. 0 1 write-only P1 Edge Interrupt Selection. 1 1 write-only P2 Edge Interrupt Selection. 2 1 write-only P3 Edge Interrupt Selection. 3 1 write-only P4 Edge Interrupt Selection. 4 1 write-only P5 Edge Interrupt Selection. 5 1 write-only P6 Edge Interrupt Selection. 6 1 write-only P7 Edge Interrupt Selection. 7 1 write-only P8 Edge Interrupt Selection. 8 1 write-only P9 Edge Interrupt Selection. 9 1 write-only P10 Edge Interrupt Selection. 10 1 write-only P11 Edge Interrupt Selection. 11 1 write-only P12 Edge Interrupt Selection. 12 1 write-only P13 Edge Interrupt Selection. 13 1 write-only P14 Edge Interrupt Selection. 14 1 write-only P15 Edge Interrupt Selection. 15 1 write-only P16 Edge Interrupt Selection. 16 1 write-only P17 Edge Interrupt Selection. 17 1 write-only P18 Edge Interrupt Selection. 18 1 write-only P19 Edge Interrupt Selection. 19 1 write-only P20 Edge Interrupt Selection. 20 1 write-only P21 Edge Interrupt Selection. 21 1 write-only P22 Edge Interrupt Selection. 22 1 write-only P23 Edge Interrupt Selection. 23 1 write-only P24 Edge Interrupt Selection. 24 1 write-only P25 Edge Interrupt Selection. 25 1 write-only P26 Edge Interrupt Selection. 26 1 write-only P27 Edge Interrupt Selection. 27 1 write-only P28 Edge Interrupt Selection. 28 1 write-only P29 Edge Interrupt Selection. 29 1 write-only P30 Edge Interrupt Selection. 30 1 write-only P31 Edge Interrupt Selection. 31 1 write-only LSR Level Select Register 0x000000C4 32 write-only P0 Level Interrupt Selection. 0 1 write-only P1 Level Interrupt Selection. 1 1 write-only P2 Level Interrupt Selection. 2 1 write-only P3 Level Interrupt Selection. 3 1 write-only P4 Level Interrupt Selection. 4 1 write-only P5 Level Interrupt Selection. 5 1 write-only P6 Level Interrupt Selection. 6 1 write-only P7 Level Interrupt Selection. 7 1 write-only P8 Level Interrupt Selection. 8 1 write-only P9 Level Interrupt Selection. 9 1 write-only P10 Level Interrupt Selection. 10 1 write-only P11 Level Interrupt Selection. 11 1 write-only P12 Level Interrupt Selection. 12 1 write-only P13 Level Interrupt Selection. 13 1 write-only P14 Level Interrupt Selection. 14 1 write-only P15 Level Interrupt Selection. 15 1 write-only P16 Level Interrupt Selection. 16 1 write-only P17 Level Interrupt Selection. 17 1 write-only P18 Level Interrupt Selection. 18 1 write-only P19 Level Interrupt Selection. 19 1 write-only P20 Level Interrupt Selection. 20 1 write-only P21 Level Interrupt Selection. 21 1 write-only P22 Level Interrupt Selection. 22 1 write-only P23 Level Interrupt Selection. 23 1 write-only P24 Level Interrupt Selection. 24 1 write-only P25 Level Interrupt Selection. 25 1 write-only P26 Level Interrupt Selection. 26 1 write-only P27 Level Interrupt Selection. 27 1 write-only P28 Level Interrupt Selection. 28 1 write-only P29 Level Interrupt Selection. 29 1 write-only P30 Level Interrupt Selection. 30 1 write-only P31 Level Interrupt Selection. 31 1 write-only ELSR Edge/Level Status Register 0x000000C8 32 read-only 0x00000000 P0 Edge/Level Interrupt source selection. 0 1 read-only P1 Edge/Level Interrupt source selection. 1 1 read-only P2 Edge/Level Interrupt source selection. 2 1 read-only P3 Edge/Level Interrupt source selection. 3 1 read-only P4 Edge/Level Interrupt source selection. 4 1 read-only P5 Edge/Level Interrupt source selection. 5 1 read-only P6 Edge/Level Interrupt source selection. 6 1 read-only P7 Edge/Level Interrupt source selection. 7 1 read-only P8 Edge/Level Interrupt source selection. 8 1 read-only P9 Edge/Level Interrupt source selection. 9 1 read-only P10 Edge/Level Interrupt source selection. 10 1 read-only P11 Edge/Level Interrupt source selection. 11 1 read-only P12 Edge/Level Interrupt source selection. 12 1 read-only P13 Edge/Level Interrupt source selection. 13 1 read-only P14 Edge/Level Interrupt source selection. 14 1 read-only P15 Edge/Level Interrupt source selection. 15 1 read-only P16 Edge/Level Interrupt source selection. 16 1 read-only P17 Edge/Level Interrupt source selection. 17 1 read-only P18 Edge/Level Interrupt source selection. 18 1 read-only P19 Edge/Level Interrupt source selection. 19 1 read-only P20 Edge/Level Interrupt source selection. 20 1 read-only P21 Edge/Level Interrupt source selection. 21 1 read-only P22 Edge/Level Interrupt source selection. 22 1 read-only P23 Edge/Level Interrupt source selection. 23 1 read-only P24 Edge/Level Interrupt source selection. 24 1 read-only P25 Edge/Level Interrupt source selection. 25 1 read-only P26 Edge/Level Interrupt source selection. 26 1 read-only P27 Edge/Level Interrupt source selection. 27 1 read-only P28 Edge/Level Interrupt source selection. 28 1 read-only P29 Edge/Level Interrupt source selection. 29 1 read-only P30 Edge/Level Interrupt source selection. 30 1 read-only P31 Edge/Level Interrupt source selection. 31 1 read-only FELLSR Falling Edge/Low Level Select Register 0x000000D0 32 write-only P0 Falling Edge/Low Level Interrupt Selection. 0 1 write-only P1 Falling Edge/Low Level Interrupt Selection. 1 1 write-only P2 Falling Edge/Low Level Interrupt Selection. 2 1 write-only P3 Falling Edge/Low Level Interrupt Selection. 3 1 write-only P4 Falling Edge/Low Level Interrupt Selection. 4 1 write-only P5 Falling Edge/Low Level Interrupt Selection. 5 1 write-only P6 Falling Edge/Low Level Interrupt Selection. 6 1 write-only P7 Falling Edge/Low Level Interrupt Selection. 7 1 write-only P8 Falling Edge/Low Level Interrupt Selection. 8 1 write-only P9 Falling Edge/Low Level Interrupt Selection. 9 1 write-only P10 Falling Edge/Low Level Interrupt Selection. 10 1 write-only P11 Falling Edge/Low Level Interrupt Selection. 11 1 write-only P12 Falling Edge/Low Level Interrupt Selection. 12 1 write-only P13 Falling Edge/Low Level Interrupt Selection. 13 1 write-only P14 Falling Edge/Low Level Interrupt Selection. 14 1 write-only P15 Falling Edge/Low Level Interrupt Selection. 15 1 write-only P16 Falling Edge/Low Level Interrupt Selection. 16 1 write-only P17 Falling Edge/Low Level Interrupt Selection. 17 1 write-only P18 Falling Edge/Low Level Interrupt Selection. 18 1 write-only P19 Falling Edge/Low Level Interrupt Selection. 19 1 write-only P20 Falling Edge/Low Level Interrupt Selection. 20 1 write-only P21 Falling Edge/Low Level Interrupt Selection. 21 1 write-only P22 Falling Edge/Low Level Interrupt Selection. 22 1 write-only P23 Falling Edge/Low Level Interrupt Selection. 23 1 write-only P24 Falling Edge/Low Level Interrupt Selection. 24 1 write-only P25 Falling Edge/Low Level Interrupt Selection. 25 1 write-only P26 Falling Edge/Low Level Interrupt Selection. 26 1 write-only P27 Falling Edge/Low Level Interrupt Selection. 27 1 write-only P28 Falling Edge/Low Level Interrupt Selection. 28 1 write-only P29 Falling Edge/Low Level Interrupt Selection. 29 1 write-only P30 Falling Edge/Low Level Interrupt Selection. 30 1 write-only P31 Falling Edge/Low Level Interrupt Selection. 31 1 write-only REHLSR Rising Edge/ High Level Select Register 0x000000D4 32 write-only P0 Rising Edge /High Level Interrupt Selection. 0 1 write-only P1 Rising Edge /High Level Interrupt Selection. 1 1 write-only P2 Rising Edge /High Level Interrupt Selection. 2 1 write-only P3 Rising Edge /High Level Interrupt Selection. 3 1 write-only P4 Rising Edge /High Level Interrupt Selection. 4 1 write-only P5 Rising Edge /High Level Interrupt Selection. 5 1 write-only P6 Rising Edge /High Level Interrupt Selection. 6 1 write-only P7 Rising Edge /High Level Interrupt Selection. 7 1 write-only P8 Rising Edge /High Level Interrupt Selection. 8 1 write-only P9 Rising Edge /High Level Interrupt Selection. 9 1 write-only P10 Rising Edge /High Level Interrupt Selection. 10 1 write-only P11 Rising Edge /High Level Interrupt Selection. 11 1 write-only P12 Rising Edge /High Level Interrupt Selection. 12 1 write-only P13 Rising Edge /High Level Interrupt Selection. 13 1 write-only P14 Rising Edge /High Level Interrupt Selection. 14 1 write-only P15 Rising Edge /High Level Interrupt Selection. 15 1 write-only P16 Rising Edge /High Level Interrupt Selection. 16 1 write-only P17 Rising Edge /High Level Interrupt Selection. 17 1 write-only P18 Rising Edge /High Level Interrupt Selection. 18 1 write-only P19 Rising Edge /High Level Interrupt Selection. 19 1 write-only P20 Rising Edge /High Level Interrupt Selection. 20 1 write-only P21 Rising Edge /High Level Interrupt Selection. 21 1 write-only P22 Rising Edge /High Level Interrupt Selection. 22 1 write-only P23 Rising Edge /High Level Interrupt Selection. 23 1 write-only P24 Rising Edge /High Level Interrupt Selection. 24 1 write-only P25 Rising Edge /High Level Interrupt Selection. 25 1 write-only P26 Rising Edge /High Level Interrupt Selection. 26 1 write-only P27 Rising Edge /High Level Interrupt Selection. 27 1 write-only P28 Rising Edge /High Level Interrupt Selection. 28 1 write-only P29 Rising Edge /High Level Interrupt Selection. 29 1 write-only P30 Rising Edge /High Level Interrupt Selection. 30 1 write-only P31 Rising Edge /High Level Interrupt Selection. 31 1 write-only FRLHSR Fall/Rise - Low/High Status Register 0x000000D8 32 read-only 0x00000000 P0 Edge /Level Interrupt Source Selection. 0 1 read-only P1 Edge /Level Interrupt Source Selection. 1 1 read-only P2 Edge /Level Interrupt Source Selection. 2 1 read-only P3 Edge /Level Interrupt Source Selection. 3 1 read-only P4 Edge /Level Interrupt Source Selection. 4 1 read-only P5 Edge /Level Interrupt Source Selection. 5 1 read-only P6 Edge /Level Interrupt Source Selection. 6 1 read-only P7 Edge /Level Interrupt Source Selection. 7 1 read-only P8 Edge /Level Interrupt Source Selection. 8 1 read-only P9 Edge /Level Interrupt Source Selection. 9 1 read-only P10 Edge /Level Interrupt Source Selection. 10 1 read-only P11 Edge /Level Interrupt Source Selection. 11 1 read-only P12 Edge /Level Interrupt Source Selection. 12 1 read-only P13 Edge /Level Interrupt Source Selection. 13 1 read-only P14 Edge /Level Interrupt Source Selection. 14 1 read-only P15 Edge /Level Interrupt Source Selection. 15 1 read-only P16 Edge /Level Interrupt Source Selection. 16 1 read-only P17 Edge /Level Interrupt Source Selection. 17 1 read-only P18 Edge /Level Interrupt Source Selection. 18 1 read-only P19 Edge /Level Interrupt Source Selection. 19 1 read-only P20 Edge /Level Interrupt Source Selection. 20 1 read-only P21 Edge /Level Interrupt Source Selection. 21 1 read-only P22 Edge /Level Interrupt Source Selection. 22 1 read-only P23 Edge /Level Interrupt Source Selection. 23 1 read-only P24 Edge /Level Interrupt Source Selection. 24 1 read-only P25 Edge /Level Interrupt Source Selection. 25 1 read-only P26 Edge /Level Interrupt Source Selection. 26 1 read-only P27 Edge /Level Interrupt Source Selection. 27 1 read-only P28 Edge /Level Interrupt Source Selection. 28 1 read-only P29 Edge /Level Interrupt Source Selection. 29 1 read-only P30 Edge /Level Interrupt Source Selection. 30 1 read-only P31 Edge /Level Interrupt Source Selection. 31 1 read-only LOCKSR Lock Status 0x000000E0 32 read-only 0x00000000 P0 Lock Status. 0 1 read-only P1 Lock Status. 1 1 read-only P2 Lock Status. 2 1 read-only P3 Lock Status. 3 1 read-only P4 Lock Status. 4 1 read-only P5 Lock Status. 5 1 read-only P6 Lock Status. 6 1 read-only P7 Lock Status. 7 1 read-only P8 Lock Status. 8 1 read-only P9 Lock Status. 9 1 read-only P10 Lock Status. 10 1 read-only P11 Lock Status. 11 1 read-only P12 Lock Status. 12 1 read-only P13 Lock Status. 13 1 read-only P14 Lock Status. 14 1 read-only P15 Lock Status. 15 1 read-only P16 Lock Status. 16 1 read-only P17 Lock Status. 17 1 read-only P18 Lock Status. 18 1 read-only P19 Lock Status. 19 1 read-only P20 Lock Status. 20 1 read-only P21 Lock Status. 21 1 read-only P22 Lock Status. 22 1 read-only P23 Lock Status. 23 1 read-only P24 Lock Status. 24 1 read-only P25 Lock Status. 25 1 read-only P26 Lock Status. 26 1 read-only P27 Lock Status. 27 1 read-only P28 Lock Status. 28 1 read-only P29 Lock Status. 29 1 read-only P30 Lock Status. 30 1 read-only P31 Lock Status. 31 1 read-only WPMR Write Protect Mode Register 0x000000E4 32 read-write 0x00000000 WPEN Write Protect Enable 0 1 read-write WPKEY Write Protect KEY 8 24 read-write WPSR Write Protect Status Register 0x000000E8 32 read-only 0x00000000 WPVS Write Protect Violation Status 0 1 read-only WPVSRC Write Protect Violation Source 8 16 read-only SCHMITT Schmitt Trigger Register 0x00000100 32 read-write 0x00000000 SCHMITT0 0 1 read-write SCHMITT1 1 1 read-write SCHMITT2 2 1 read-write SCHMITT3 3 1 read-write SCHMITT4 4 1 read-write SCHMITT5 5 1 read-write SCHMITT6 6 1 read-write SCHMITT7 7 1 read-write SCHMITT8 8 1 read-write SCHMITT9 9 1 read-write SCHMITT10 10 1 read-write SCHMITT11 11 1 read-write SCHMITT12 12 1 read-write SCHMITT13 13 1 read-write SCHMITT14 14 1 read-write SCHMITT15 15 1 read-write SCHMITT16 16 1 read-write SCHMITT17 17 1 read-write SCHMITT18 18 1 read-write SCHMITT19 19 1 read-write SCHMITT20 20 1 read-write SCHMITT21 21 1 read-write SCHMITT22 22 1 read-write SCHMITT23 23 1 read-write SCHMITT24 24 1 read-write SCHMITT25 25 1 read-write SCHMITT26 26 1 read-write SCHMITT27 27 1 read-write SCHMITT28 28 1 read-write SCHMITT29 29 1 read-write SCHMITT30 30 1 read-write SCHMITT31 31 1 read-write DELAYR IO Delay Register 0x00000110 32 read-write 0x00000000 Delay0 0 4 read-write Delay1 4 4 read-write Delay2 8 4 read-write Delay3 12 4 read-write Delay4 16 4 read-write Delay5 20 4 read-write Delay6 24 4 read-write Delay7 28 4 read-write DRIVER1 I/O Drive Register 1 0x00000114 32 read-write 0x00000000 LINE0 Drive of PIO line 0 0 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE1 Drive of PIO line 1 2 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE2 Drive of PIO line 2 4 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE3 Drive of PIO line 3 6 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE4 Drive of PIO line 4 8 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE5 Drive of PIO line 5 10 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE6 Drive of PIO line 6 12 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE7 Drive of PIO line 7 14 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE8 Drive of PIO line 8 16 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE9 Drive of PIO line 9 18 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE10 Drive of PIO line 10 20 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE11 Drive of PIO line 11 22 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE12 Drive of PIO line 12 24 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE13 Drive of PIO line 13 26 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE14 Drive of PIO line 14 28 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE15 Drive of PIO line 15 30 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 DRIVER2 I/O Drive Register 2 0x00000118 32 read-write 0x00000000 LINE16 Drive of PIO line 16 0 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE17 Drive of PIO line 17 2 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE18 Drive of PIO line 18 4 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE19 Drive of PIO line 19 6 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE20 Drive of PIO line 20 8 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE21 Drive of PIO line 21 10 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE22 Drive of PIO line 22 12 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE23 Drive of PIO line 23 14 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE24 Drive of PIO line 24 16 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE25 Drive of PIO line 25 18 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE26 Drive of PIO line 26 20 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE27 Drive of PIO line 27 22 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE28 Drive of PIO line 28 24 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE29 Drive of PIO line 29 26 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE30 Drive of PIO line 30 28 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE31 Drive of PIO line 31 30 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 PIOC 11004F Parallel Input/Output Controller C PIO PIOC_ 0xFFFFF800 0 0x200 registers PIOC 3 PER PIO Enable Register 0x00000000 32 write-only P0 PIO Enable 0 1 write-only P1 PIO Enable 1 1 write-only P2 PIO Enable 2 1 write-only P3 PIO Enable 3 1 write-only P4 PIO Enable 4 1 write-only P5 PIO Enable 5 1 write-only P6 PIO Enable 6 1 write-only P7 PIO Enable 7 1 write-only P8 PIO Enable 8 1 write-only P9 PIO Enable 9 1 write-only P10 PIO Enable 10 1 write-only P11 PIO Enable 11 1 write-only P12 PIO Enable 12 1 write-only P13 PIO Enable 13 1 write-only P14 PIO Enable 14 1 write-only P15 PIO Enable 15 1 write-only P16 PIO Enable 16 1 write-only P17 PIO Enable 17 1 write-only P18 PIO Enable 18 1 write-only P19 PIO Enable 19 1 write-only P20 PIO Enable 20 1 write-only P21 PIO Enable 21 1 write-only P22 PIO Enable 22 1 write-only P23 PIO Enable 23 1 write-only P24 PIO Enable 24 1 write-only P25 PIO Enable 25 1 write-only P26 PIO Enable 26 1 write-only P27 PIO Enable 27 1 write-only P28 PIO Enable 28 1 write-only P29 PIO Enable 29 1 write-only P30 PIO Enable 30 1 write-only P31 PIO Enable 31 1 write-only PDR PIO Disable Register 0x00000004 32 write-only P0 PIO Disable 0 1 write-only P1 PIO Disable 1 1 write-only P2 PIO Disable 2 1 write-only P3 PIO Disable 3 1 write-only P4 PIO Disable 4 1 write-only P5 PIO Disable 5 1 write-only P6 PIO Disable 6 1 write-only P7 PIO Disable 7 1 write-only P8 PIO Disable 8 1 write-only P9 PIO Disable 9 1 write-only P10 PIO Disable 10 1 write-only P11 PIO Disable 11 1 write-only P12 PIO Disable 12 1 write-only P13 PIO Disable 13 1 write-only P14 PIO Disable 14 1 write-only P15 PIO Disable 15 1 write-only P16 PIO Disable 16 1 write-only P17 PIO Disable 17 1 write-only P18 PIO Disable 18 1 write-only P19 PIO Disable 19 1 write-only P20 PIO Disable 20 1 write-only P21 PIO Disable 21 1 write-only P22 PIO Disable 22 1 write-only P23 PIO Disable 23 1 write-only P24 PIO Disable 24 1 write-only P25 PIO Disable 25 1 write-only P26 PIO Disable 26 1 write-only P27 PIO Disable 27 1 write-only P28 PIO Disable 28 1 write-only P29 PIO Disable 29 1 write-only P30 PIO Disable 30 1 write-only P31 PIO Disable 31 1 write-only PSR PIO Status Register 0x00000008 32 read-only P0 PIO Status 0 1 read-only P1 PIO Status 1 1 read-only P2 PIO Status 2 1 read-only P3 PIO Status 3 1 read-only P4 PIO Status 4 1 read-only P5 PIO Status 5 1 read-only P6 PIO Status 6 1 read-only P7 PIO Status 7 1 read-only P8 PIO Status 8 1 read-only P9 PIO Status 9 1 read-only P10 PIO Status 10 1 read-only P11 PIO Status 11 1 read-only P12 PIO Status 12 1 read-only P13 PIO Status 13 1 read-only P14 PIO Status 14 1 read-only P15 PIO Status 15 1 read-only P16 PIO Status 16 1 read-only P17 PIO Status 17 1 read-only P18 PIO Status 18 1 read-only P19 PIO Status 19 1 read-only P20 PIO Status 20 1 read-only P21 PIO Status 21 1 read-only P22 PIO Status 22 1 read-only P23 PIO Status 23 1 read-only P24 PIO Status 24 1 read-only P25 PIO Status 25 1 read-only P26 PIO Status 26 1 read-only P27 PIO Status 27 1 read-only P28 PIO Status 28 1 read-only P29 PIO Status 29 1 read-only P30 PIO Status 30 1 read-only P31 PIO Status 31 1 read-only OER Output Enable Register 0x00000010 32 write-only P0 Output Enable 0 1 write-only P1 Output Enable 1 1 write-only P2 Output Enable 2 1 write-only P3 Output Enable 3 1 write-only P4 Output Enable 4 1 write-only P5 Output Enable 5 1 write-only P6 Output Enable 6 1 write-only P7 Output Enable 7 1 write-only P8 Output Enable 8 1 write-only P9 Output Enable 9 1 write-only P10 Output Enable 10 1 write-only P11 Output Enable 11 1 write-only P12 Output Enable 12 1 write-only P13 Output Enable 13 1 write-only P14 Output Enable 14 1 write-only P15 Output Enable 15 1 write-only P16 Output Enable 16 1 write-only P17 Output Enable 17 1 write-only P18 Output Enable 18 1 write-only P19 Output Enable 19 1 write-only P20 Output Enable 20 1 write-only P21 Output Enable 21 1 write-only P22 Output Enable 22 1 write-only P23 Output Enable 23 1 write-only P24 Output Enable 24 1 write-only P25 Output Enable 25 1 write-only P26 Output Enable 26 1 write-only P27 Output Enable 27 1 write-only P28 Output Enable 28 1 write-only P29 Output Enable 29 1 write-only P30 Output Enable 30 1 write-only P31 Output Enable 31 1 write-only ODR Output Disable Register 0x00000014 32 write-only P0 Output Disable 0 1 write-only P1 Output Disable 1 1 write-only P2 Output Disable 2 1 write-only P3 Output Disable 3 1 write-only P4 Output Disable 4 1 write-only P5 Output Disable 5 1 write-only P6 Output Disable 6 1 write-only P7 Output Disable 7 1 write-only P8 Output Disable 8 1 write-only P9 Output Disable 9 1 write-only P10 Output Disable 10 1 write-only P11 Output Disable 11 1 write-only P12 Output Disable 12 1 write-only P13 Output Disable 13 1 write-only P14 Output Disable 14 1 write-only P15 Output Disable 15 1 write-only P16 Output Disable 16 1 write-only P17 Output Disable 17 1 write-only P18 Output Disable 18 1 write-only P19 Output Disable 19 1 write-only P20 Output Disable 20 1 write-only P21 Output Disable 21 1 write-only P22 Output Disable 22 1 write-only P23 Output Disable 23 1 write-only P24 Output Disable 24 1 write-only P25 Output Disable 25 1 write-only P26 Output Disable 26 1 write-only P27 Output Disable 27 1 write-only P28 Output Disable 28 1 write-only P29 Output Disable 29 1 write-only P30 Output Disable 30 1 write-only P31 Output Disable 31 1 write-only OSR Output Status Register 0x00000018 32 read-only 0x00000000 P0 Output Status 0 1 read-only P1 Output Status 1 1 read-only P2 Output Status 2 1 read-only P3 Output Status 3 1 read-only P4 Output Status 4 1 read-only P5 Output Status 5 1 read-only P6 Output Status 6 1 read-only P7 Output Status 7 1 read-only P8 Output Status 8 1 read-only P9 Output Status 9 1 read-only P10 Output Status 10 1 read-only P11 Output Status 11 1 read-only P12 Output Status 12 1 read-only P13 Output Status 13 1 read-only P14 Output Status 14 1 read-only P15 Output Status 15 1 read-only P16 Output Status 16 1 read-only P17 Output Status 17 1 read-only P18 Output Status 18 1 read-only P19 Output Status 19 1 read-only P20 Output Status 20 1 read-only P21 Output Status 21 1 read-only P22 Output Status 22 1 read-only P23 Output Status 23 1 read-only P24 Output Status 24 1 read-only P25 Output Status 25 1 read-only P26 Output Status 26 1 read-only P27 Output Status 27 1 read-only P28 Output Status 28 1 read-only P29 Output Status 29 1 read-only P30 Output Status 30 1 read-only P31 Output Status 31 1 read-only IFER Glitch Input Filter Enable Register 0x00000020 32 write-only P0 Input Filter Enable 0 1 write-only P1 Input Filter Enable 1 1 write-only P2 Input Filter Enable 2 1 write-only P3 Input Filter Enable 3 1 write-only P4 Input Filter Enable 4 1 write-only P5 Input Filter Enable 5 1 write-only P6 Input Filter Enable 6 1 write-only P7 Input Filter Enable 7 1 write-only P8 Input Filter Enable 8 1 write-only P9 Input Filter Enable 9 1 write-only P10 Input Filter Enable 10 1 write-only P11 Input Filter Enable 11 1 write-only P12 Input Filter Enable 12 1 write-only P13 Input Filter Enable 13 1 write-only P14 Input Filter Enable 14 1 write-only P15 Input Filter Enable 15 1 write-only P16 Input Filter Enable 16 1 write-only P17 Input Filter Enable 17 1 write-only P18 Input Filter Enable 18 1 write-only P19 Input Filter Enable 19 1 write-only P20 Input Filter Enable 20 1 write-only P21 Input Filter Enable 21 1 write-only P22 Input Filter Enable 22 1 write-only P23 Input Filter Enable 23 1 write-only P24 Input Filter Enable 24 1 write-only P25 Input Filter Enable 25 1 write-only P26 Input Filter Enable 26 1 write-only P27 Input Filter Enable 27 1 write-only P28 Input Filter Enable 28 1 write-only P29 Input Filter Enable 29 1 write-only P30 Input Filter Enable 30 1 write-only P31 Input Filter Enable 31 1 write-only IFDR Glitch Input Filter Disable Register 0x00000024 32 write-only P0 Input Filter Disable 0 1 write-only P1 Input Filter Disable 1 1 write-only P2 Input Filter Disable 2 1 write-only P3 Input Filter Disable 3 1 write-only P4 Input Filter Disable 4 1 write-only P5 Input Filter Disable 5 1 write-only P6 Input Filter Disable 6 1 write-only P7 Input Filter Disable 7 1 write-only P8 Input Filter Disable 8 1 write-only P9 Input Filter Disable 9 1 write-only P10 Input Filter Disable 10 1 write-only P11 Input Filter Disable 11 1 write-only P12 Input Filter Disable 12 1 write-only P13 Input Filter Disable 13 1 write-only P14 Input Filter Disable 14 1 write-only P15 Input Filter Disable 15 1 write-only P16 Input Filter Disable 16 1 write-only P17 Input Filter Disable 17 1 write-only P18 Input Filter Disable 18 1 write-only P19 Input Filter Disable 19 1 write-only P20 Input Filter Disable 20 1 write-only P21 Input Filter Disable 21 1 write-only P22 Input Filter Disable 22 1 write-only P23 Input Filter Disable 23 1 write-only P24 Input Filter Disable 24 1 write-only P25 Input Filter Disable 25 1 write-only P26 Input Filter Disable 26 1 write-only P27 Input Filter Disable 27 1 write-only P28 Input Filter Disable 28 1 write-only P29 Input Filter Disable 29 1 write-only P30 Input Filter Disable 30 1 write-only P31 Input Filter Disable 31 1 write-only IFSR Glitch Input Filter Status Register 0x00000028 32 read-only 0x00000000 P0 Input Filer Status 0 1 read-only P1 Input Filer Status 1 1 read-only P2 Input Filer Status 2 1 read-only P3 Input Filer Status 3 1 read-only P4 Input Filer Status 4 1 read-only P5 Input Filer Status 5 1 read-only P6 Input Filer Status 6 1 read-only P7 Input Filer Status 7 1 read-only P8 Input Filer Status 8 1 read-only P9 Input Filer Status 9 1 read-only P10 Input Filer Status 10 1 read-only P11 Input Filer Status 11 1 read-only P12 Input Filer Status 12 1 read-only P13 Input Filer Status 13 1 read-only P14 Input Filer Status 14 1 read-only P15 Input Filer Status 15 1 read-only P16 Input Filer Status 16 1 read-only P17 Input Filer Status 17 1 read-only P18 Input Filer Status 18 1 read-only P19 Input Filer Status 19 1 read-only P20 Input Filer Status 20 1 read-only P21 Input Filer Status 21 1 read-only P22 Input Filer Status 22 1 read-only P23 Input Filer Status 23 1 read-only P24 Input Filer Status 24 1 read-only P25 Input Filer Status 25 1 read-only P26 Input Filer Status 26 1 read-only P27 Input Filer Status 27 1 read-only P28 Input Filer Status 28 1 read-only P29 Input Filer Status 29 1 read-only P30 Input Filer Status 30 1 read-only P31 Input Filer Status 31 1 read-only SODR Set Output Data Register 0x00000030 32 write-only P0 Set Output Data 0 1 write-only P1 Set Output Data 1 1 write-only P2 Set Output Data 2 1 write-only P3 Set Output Data 3 1 write-only P4 Set Output Data 4 1 write-only P5 Set Output Data 5 1 write-only P6 Set Output Data 6 1 write-only P7 Set Output Data 7 1 write-only P8 Set Output Data 8 1 write-only P9 Set Output Data 9 1 write-only P10 Set Output Data 10 1 write-only P11 Set Output Data 11 1 write-only P12 Set Output Data 12 1 write-only P13 Set Output Data 13 1 write-only P14 Set Output Data 14 1 write-only P15 Set Output Data 15 1 write-only P16 Set Output Data 16 1 write-only P17 Set Output Data 17 1 write-only P18 Set Output Data 18 1 write-only P19 Set Output Data 19 1 write-only P20 Set Output Data 20 1 write-only P21 Set Output Data 21 1 write-only P22 Set Output Data 22 1 write-only P23 Set Output Data 23 1 write-only P24 Set Output Data 24 1 write-only P25 Set Output Data 25 1 write-only P26 Set Output Data 26 1 write-only P27 Set Output Data 27 1 write-only P28 Set Output Data 28 1 write-only P29 Set Output Data 29 1 write-only P30 Set Output Data 30 1 write-only P31 Set Output Data 31 1 write-only CODR Clear Output Data Register 0x00000034 32 write-only P0 Clear Output Data 0 1 write-only P1 Clear Output Data 1 1 write-only P2 Clear Output Data 2 1 write-only P3 Clear Output Data 3 1 write-only P4 Clear Output Data 4 1 write-only P5 Clear Output Data 5 1 write-only P6 Clear Output Data 6 1 write-only P7 Clear Output Data 7 1 write-only P8 Clear Output Data 8 1 write-only P9 Clear Output Data 9 1 write-only P10 Clear Output Data 10 1 write-only P11 Clear Output Data 11 1 write-only P12 Clear Output Data 12 1 write-only P13 Clear Output Data 13 1 write-only P14 Clear Output Data 14 1 write-only P15 Clear Output Data 15 1 write-only P16 Clear Output Data 16 1 write-only P17 Clear Output Data 17 1 write-only P18 Clear Output Data 18 1 write-only P19 Clear Output Data 19 1 write-only P20 Clear Output Data 20 1 write-only P21 Clear Output Data 21 1 write-only P22 Clear Output Data 22 1 write-only P23 Clear Output Data 23 1 write-only P24 Clear Output Data 24 1 write-only P25 Clear Output Data 25 1 write-only P26 Clear Output Data 26 1 write-only P27 Clear Output Data 27 1 write-only P28 Clear Output Data 28 1 write-only P29 Clear Output Data 29 1 write-only P30 Clear Output Data 30 1 write-only P31 Clear Output Data 31 1 write-only ODSR Output Data Status Register 0x00000038 32 read-write P0 Output Data Status 0 1 read-write P1 Output Data Status 1 1 read-write P2 Output Data Status 2 1 read-write P3 Output Data Status 3 1 read-write P4 Output Data Status 4 1 read-write P5 Output Data Status 5 1 read-write P6 Output Data Status 6 1 read-write P7 Output Data Status 7 1 read-write P8 Output Data Status 8 1 read-write P9 Output Data Status 9 1 read-write P10 Output Data Status 10 1 read-write P11 Output Data Status 11 1 read-write P12 Output Data Status 12 1 read-write P13 Output Data Status 13 1 read-write P14 Output Data Status 14 1 read-write P15 Output Data Status 15 1 read-write P16 Output Data Status 16 1 read-write P17 Output Data Status 17 1 read-write P18 Output Data Status 18 1 read-write P19 Output Data Status 19 1 read-write P20 Output Data Status 20 1 read-write P21 Output Data Status 21 1 read-write P22 Output Data Status 22 1 read-write P23 Output Data Status 23 1 read-write P24 Output Data Status 24 1 read-write P25 Output Data Status 25 1 read-write P26 Output Data Status 26 1 read-write P27 Output Data Status 27 1 read-write P28 Output Data Status 28 1 read-write P29 Output Data Status 29 1 read-write P30 Output Data Status 30 1 read-write P31 Output Data Status 31 1 read-write PDSR Pin Data Status Register 0x0000003C 32 read-only P0 Output Data Status 0 1 read-only P1 Output Data Status 1 1 read-only P2 Output Data Status 2 1 read-only P3 Output Data Status 3 1 read-only P4 Output Data Status 4 1 read-only P5 Output Data Status 5 1 read-only P6 Output Data Status 6 1 read-only P7 Output Data Status 7 1 read-only P8 Output Data Status 8 1 read-only P9 Output Data Status 9 1 read-only P10 Output Data Status 10 1 read-only P11 Output Data Status 11 1 read-only P12 Output Data Status 12 1 read-only P13 Output Data Status 13 1 read-only P14 Output Data Status 14 1 read-only P15 Output Data Status 15 1 read-only P16 Output Data Status 16 1 read-only P17 Output Data Status 17 1 read-only P18 Output Data Status 18 1 read-only P19 Output Data Status 19 1 read-only P20 Output Data Status 20 1 read-only P21 Output Data Status 21 1 read-only P22 Output Data Status 22 1 read-only P23 Output Data Status 23 1 read-only P24 Output Data Status 24 1 read-only P25 Output Data Status 25 1 read-only P26 Output Data Status 26 1 read-only P27 Output Data Status 27 1 read-only P28 Output Data Status 28 1 read-only P29 Output Data Status 29 1 read-only P30 Output Data Status 30 1 read-only P31 Output Data Status 31 1 read-only IER Interrupt Enable Register 0x00000040 32 write-only P0 Input Change Interrupt Enable 0 1 write-only P1 Input Change Interrupt Enable 1 1 write-only P2 Input Change Interrupt Enable 2 1 write-only P3 Input Change Interrupt Enable 3 1 write-only P4 Input Change Interrupt Enable 4 1 write-only P5 Input Change Interrupt Enable 5 1 write-only P6 Input Change Interrupt Enable 6 1 write-only P7 Input Change Interrupt Enable 7 1 write-only P8 Input Change Interrupt Enable 8 1 write-only P9 Input Change Interrupt Enable 9 1 write-only P10 Input Change Interrupt Enable 10 1 write-only P11 Input Change Interrupt Enable 11 1 write-only P12 Input Change Interrupt Enable 12 1 write-only P13 Input Change Interrupt Enable 13 1 write-only P14 Input Change Interrupt Enable 14 1 write-only P15 Input Change Interrupt Enable 15 1 write-only P16 Input Change Interrupt Enable 16 1 write-only P17 Input Change Interrupt Enable 17 1 write-only P18 Input Change Interrupt Enable 18 1 write-only P19 Input Change Interrupt Enable 19 1 write-only P20 Input Change Interrupt Enable 20 1 write-only P21 Input Change Interrupt Enable 21 1 write-only P22 Input Change Interrupt Enable 22 1 write-only P23 Input Change Interrupt Enable 23 1 write-only P24 Input Change Interrupt Enable 24 1 write-only P25 Input Change Interrupt Enable 25 1 write-only P26 Input Change Interrupt Enable 26 1 write-only P27 Input Change Interrupt Enable 27 1 write-only P28 Input Change Interrupt Enable 28 1 write-only P29 Input Change Interrupt Enable 29 1 write-only P30 Input Change Interrupt Enable 30 1 write-only P31 Input Change Interrupt Enable 31 1 write-only IDR Interrupt Disable Register 0x00000044 32 write-only P0 Input Change Interrupt Disable 0 1 write-only P1 Input Change Interrupt Disable 1 1 write-only P2 Input Change Interrupt Disable 2 1 write-only P3 Input Change Interrupt Disable 3 1 write-only P4 Input Change Interrupt Disable 4 1 write-only P5 Input Change Interrupt Disable 5 1 write-only P6 Input Change Interrupt Disable 6 1 write-only P7 Input Change Interrupt Disable 7 1 write-only P8 Input Change Interrupt Disable 8 1 write-only P9 Input Change Interrupt Disable 9 1 write-only P10 Input Change Interrupt Disable 10 1 write-only P11 Input Change Interrupt Disable 11 1 write-only P12 Input Change Interrupt Disable 12 1 write-only P13 Input Change Interrupt Disable 13 1 write-only P14 Input Change Interrupt Disable 14 1 write-only P15 Input Change Interrupt Disable 15 1 write-only P16 Input Change Interrupt Disable 16 1 write-only P17 Input Change Interrupt Disable 17 1 write-only P18 Input Change Interrupt Disable 18 1 write-only P19 Input Change Interrupt Disable 19 1 write-only P20 Input Change Interrupt Disable 20 1 write-only P21 Input Change Interrupt Disable 21 1 write-only P22 Input Change Interrupt Disable 22 1 write-only P23 Input Change Interrupt Disable 23 1 write-only P24 Input Change Interrupt Disable 24 1 write-only P25 Input Change Interrupt Disable 25 1 write-only P26 Input Change Interrupt Disable 26 1 write-only P27 Input Change Interrupt Disable 27 1 write-only P28 Input Change Interrupt Disable 28 1 write-only P29 Input Change Interrupt Disable 29 1 write-only P30 Input Change Interrupt Disable 30 1 write-only P31 Input Change Interrupt Disable 31 1 write-only IMR Interrupt Mask Register 0x00000048 32 read-only 0x00000000 P0 Input Change Interrupt Mask 0 1 read-only P1 Input Change Interrupt Mask 1 1 read-only P2 Input Change Interrupt Mask 2 1 read-only P3 Input Change Interrupt Mask 3 1 read-only P4 Input Change Interrupt Mask 4 1 read-only P5 Input Change Interrupt Mask 5 1 read-only P6 Input Change Interrupt Mask 6 1 read-only P7 Input Change Interrupt Mask 7 1 read-only P8 Input Change Interrupt Mask 8 1 read-only P9 Input Change Interrupt Mask 9 1 read-only P10 Input Change Interrupt Mask 10 1 read-only P11 Input Change Interrupt Mask 11 1 read-only P12 Input Change Interrupt Mask 12 1 read-only P13 Input Change Interrupt Mask 13 1 read-only P14 Input Change Interrupt Mask 14 1 read-only P15 Input Change Interrupt Mask 15 1 read-only P16 Input Change Interrupt Mask 16 1 read-only P17 Input Change Interrupt Mask 17 1 read-only P18 Input Change Interrupt Mask 18 1 read-only P19 Input Change Interrupt Mask 19 1 read-only P20 Input Change Interrupt Mask 20 1 read-only P21 Input Change Interrupt Mask 21 1 read-only P22 Input Change Interrupt Mask 22 1 read-only P23 Input Change Interrupt Mask 23 1 read-only P24 Input Change Interrupt Mask 24 1 read-only P25 Input Change Interrupt Mask 25 1 read-only P26 Input Change Interrupt Mask 26 1 read-only P27 Input Change Interrupt Mask 27 1 read-only P28 Input Change Interrupt Mask 28 1 read-only P29 Input Change Interrupt Mask 29 1 read-only P30 Input Change Interrupt Mask 30 1 read-only P31 Input Change Interrupt Mask 31 1 read-only ISR Interrupt Status Register 0x0000004C 32 read-only 0x00000000 P0 Input Change Interrupt Status 0 1 read-only P1 Input Change Interrupt Status 1 1 read-only P2 Input Change Interrupt Status 2 1 read-only P3 Input Change Interrupt Status 3 1 read-only P4 Input Change Interrupt Status 4 1 read-only P5 Input Change Interrupt Status 5 1 read-only P6 Input Change Interrupt Status 6 1 read-only P7 Input Change Interrupt Status 7 1 read-only P8 Input Change Interrupt Status 8 1 read-only P9 Input Change Interrupt Status 9 1 read-only P10 Input Change Interrupt Status 10 1 read-only P11 Input Change Interrupt Status 11 1 read-only P12 Input Change Interrupt Status 12 1 read-only P13 Input Change Interrupt Status 13 1 read-only P14 Input Change Interrupt Status 14 1 read-only P15 Input Change Interrupt Status 15 1 read-only P16 Input Change Interrupt Status 16 1 read-only P17 Input Change Interrupt Status 17 1 read-only P18 Input Change Interrupt Status 18 1 read-only P19 Input Change Interrupt Status 19 1 read-only P20 Input Change Interrupt Status 20 1 read-only P21 Input Change Interrupt Status 21 1 read-only P22 Input Change Interrupt Status 22 1 read-only P23 Input Change Interrupt Status 23 1 read-only P24 Input Change Interrupt Status 24 1 read-only P25 Input Change Interrupt Status 25 1 read-only P26 Input Change Interrupt Status 26 1 read-only P27 Input Change Interrupt Status 27 1 read-only P28 Input Change Interrupt Status 28 1 read-only P29 Input Change Interrupt Status 29 1 read-only P30 Input Change Interrupt Status 30 1 read-only P31 Input Change Interrupt Status 31 1 read-only MDER Multi-driver Enable Register 0x00000050 32 write-only P0 Multi Drive Enable. 0 1 write-only P1 Multi Drive Enable. 1 1 write-only P2 Multi Drive Enable. 2 1 write-only P3 Multi Drive Enable. 3 1 write-only P4 Multi Drive Enable. 4 1 write-only P5 Multi Drive Enable. 5 1 write-only P6 Multi Drive Enable. 6 1 write-only P7 Multi Drive Enable. 7 1 write-only P8 Multi Drive Enable. 8 1 write-only P9 Multi Drive Enable. 9 1 write-only P10 Multi Drive Enable. 10 1 write-only P11 Multi Drive Enable. 11 1 write-only P12 Multi Drive Enable. 12 1 write-only P13 Multi Drive Enable. 13 1 write-only P14 Multi Drive Enable. 14 1 write-only P15 Multi Drive Enable. 15 1 write-only P16 Multi Drive Enable. 16 1 write-only P17 Multi Drive Enable. 17 1 write-only P18 Multi Drive Enable. 18 1 write-only P19 Multi Drive Enable. 19 1 write-only P20 Multi Drive Enable. 20 1 write-only P21 Multi Drive Enable. 21 1 write-only P22 Multi Drive Enable. 22 1 write-only P23 Multi Drive Enable. 23 1 write-only P24 Multi Drive Enable. 24 1 write-only P25 Multi Drive Enable. 25 1 write-only P26 Multi Drive Enable. 26 1 write-only P27 Multi Drive Enable. 27 1 write-only P28 Multi Drive Enable. 28 1 write-only P29 Multi Drive Enable. 29 1 write-only P30 Multi Drive Enable. 30 1 write-only P31 Multi Drive Enable. 31 1 write-only MDDR Multi-driver Disable Register 0x00000054 32 write-only P0 Multi Drive Disable. 0 1 write-only P1 Multi Drive Disable. 1 1 write-only P2 Multi Drive Disable. 2 1 write-only P3 Multi Drive Disable. 3 1 write-only P4 Multi Drive Disable. 4 1 write-only P5 Multi Drive Disable. 5 1 write-only P6 Multi Drive Disable. 6 1 write-only P7 Multi Drive Disable. 7 1 write-only P8 Multi Drive Disable. 8 1 write-only P9 Multi Drive Disable. 9 1 write-only P10 Multi Drive Disable. 10 1 write-only P11 Multi Drive Disable. 11 1 write-only P12 Multi Drive Disable. 12 1 write-only P13 Multi Drive Disable. 13 1 write-only P14 Multi Drive Disable. 14 1 write-only P15 Multi Drive Disable. 15 1 write-only P16 Multi Drive Disable. 16 1 write-only P17 Multi Drive Disable. 17 1 write-only P18 Multi Drive Disable. 18 1 write-only P19 Multi Drive Disable. 19 1 write-only P20 Multi Drive Disable. 20 1 write-only P21 Multi Drive Disable. 21 1 write-only P22 Multi Drive Disable. 22 1 write-only P23 Multi Drive Disable. 23 1 write-only P24 Multi Drive Disable. 24 1 write-only P25 Multi Drive Disable. 25 1 write-only P26 Multi Drive Disable. 26 1 write-only P27 Multi Drive Disable. 27 1 write-only P28 Multi Drive Disable. 28 1 write-only P29 Multi Drive Disable. 29 1 write-only P30 Multi Drive Disable. 30 1 write-only P31 Multi Drive Disable. 31 1 write-only MDSR Multi-driver Status Register 0x00000058 32 read-only 0x00000000 P0 Multi Drive Status. 0 1 read-only P1 Multi Drive Status. 1 1 read-only P2 Multi Drive Status. 2 1 read-only P3 Multi Drive Status. 3 1 read-only P4 Multi Drive Status. 4 1 read-only P5 Multi Drive Status. 5 1 read-only P6 Multi Drive Status. 6 1 read-only P7 Multi Drive Status. 7 1 read-only P8 Multi Drive Status. 8 1 read-only P9 Multi Drive Status. 9 1 read-only P10 Multi Drive Status. 10 1 read-only P11 Multi Drive Status. 11 1 read-only P12 Multi Drive Status. 12 1 read-only P13 Multi Drive Status. 13 1 read-only P14 Multi Drive Status. 14 1 read-only P15 Multi Drive Status. 15 1 read-only P16 Multi Drive Status. 16 1 read-only P17 Multi Drive Status. 17 1 read-only P18 Multi Drive Status. 18 1 read-only P19 Multi Drive Status. 19 1 read-only P20 Multi Drive Status. 20 1 read-only P21 Multi Drive Status. 21 1 read-only P22 Multi Drive Status. 22 1 read-only P23 Multi Drive Status. 23 1 read-only P24 Multi Drive Status. 24 1 read-only P25 Multi Drive Status. 25 1 read-only P26 Multi Drive Status. 26 1 read-only P27 Multi Drive Status. 27 1 read-only P28 Multi Drive Status. 28 1 read-only P29 Multi Drive Status. 29 1 read-only P30 Multi Drive Status. 30 1 read-only P31 Multi Drive Status. 31 1 read-only PUDR Pull-up Disable Register 0x00000060 32 write-only P0 Pull Up Disable. 0 1 write-only P1 Pull Up Disable. 1 1 write-only P2 Pull Up Disable. 2 1 write-only P3 Pull Up Disable. 3 1 write-only P4 Pull Up Disable. 4 1 write-only P5 Pull Up Disable. 5 1 write-only P6 Pull Up Disable. 6 1 write-only P7 Pull Up Disable. 7 1 write-only P8 Pull Up Disable. 8 1 write-only P9 Pull Up Disable. 9 1 write-only P10 Pull Up Disable. 10 1 write-only P11 Pull Up Disable. 11 1 write-only P12 Pull Up Disable. 12 1 write-only P13 Pull Up Disable. 13 1 write-only P14 Pull Up Disable. 14 1 write-only P15 Pull Up Disable. 15 1 write-only P16 Pull Up Disable. 16 1 write-only P17 Pull Up Disable. 17 1 write-only P18 Pull Up Disable. 18 1 write-only P19 Pull Up Disable. 19 1 write-only P20 Pull Up Disable. 20 1 write-only P21 Pull Up Disable. 21 1 write-only P22 Pull Up Disable. 22 1 write-only P23 Pull Up Disable. 23 1 write-only P24 Pull Up Disable. 24 1 write-only P25 Pull Up Disable. 25 1 write-only P26 Pull Up Disable. 26 1 write-only P27 Pull Up Disable. 27 1 write-only P28 Pull Up Disable. 28 1 write-only P29 Pull Up Disable. 29 1 write-only P30 Pull Up Disable. 30 1 write-only P31 Pull Up Disable. 31 1 write-only PUER Pull-up Enable Register 0x00000064 32 write-only P0 Pull Up Enable. 0 1 write-only P1 Pull Up Enable. 1 1 write-only P2 Pull Up Enable. 2 1 write-only P3 Pull Up Enable. 3 1 write-only P4 Pull Up Enable. 4 1 write-only P5 Pull Up Enable. 5 1 write-only P6 Pull Up Enable. 6 1 write-only P7 Pull Up Enable. 7 1 write-only P8 Pull Up Enable. 8 1 write-only P9 Pull Up Enable. 9 1 write-only P10 Pull Up Enable. 10 1 write-only P11 Pull Up Enable. 11 1 write-only P12 Pull Up Enable. 12 1 write-only P13 Pull Up Enable. 13 1 write-only P14 Pull Up Enable. 14 1 write-only P15 Pull Up Enable. 15 1 write-only P16 Pull Up Enable. 16 1 write-only P17 Pull Up Enable. 17 1 write-only P18 Pull Up Enable. 18 1 write-only P19 Pull Up Enable. 19 1 write-only P20 Pull Up Enable. 20 1 write-only P21 Pull Up Enable. 21 1 write-only P22 Pull Up Enable. 22 1 write-only P23 Pull Up Enable. 23 1 write-only P24 Pull Up Enable. 24 1 write-only P25 Pull Up Enable. 25 1 write-only P26 Pull Up Enable. 26 1 write-only P27 Pull Up Enable. 27 1 write-only P28 Pull Up Enable. 28 1 write-only P29 Pull Up Enable. 29 1 write-only P30 Pull Up Enable. 30 1 write-only P31 Pull Up Enable. 31 1 write-only PUSR Pad Pull-up Status Register 0x00000068 32 read-only P0 Pull Up Status. 0 1 read-only P1 Pull Up Status. 1 1 read-only P2 Pull Up Status. 2 1 read-only P3 Pull Up Status. 3 1 read-only P4 Pull Up Status. 4 1 read-only P5 Pull Up Status. 5 1 read-only P6 Pull Up Status. 6 1 read-only P7 Pull Up Status. 7 1 read-only P8 Pull Up Status. 8 1 read-only P9 Pull Up Status. 9 1 read-only P10 Pull Up Status. 10 1 read-only P11 Pull Up Status. 11 1 read-only P12 Pull Up Status. 12 1 read-only P13 Pull Up Status. 13 1 read-only P14 Pull Up Status. 14 1 read-only P15 Pull Up Status. 15 1 read-only P16 Pull Up Status. 16 1 read-only P17 Pull Up Status. 17 1 read-only P18 Pull Up Status. 18 1 read-only P19 Pull Up Status. 19 1 read-only P20 Pull Up Status. 20 1 read-only P21 Pull Up Status. 21 1 read-only P22 Pull Up Status. 22 1 read-only P23 Pull Up Status. 23 1 read-only P24 Pull Up Status. 24 1 read-only P25 Pull Up Status. 25 1 read-only P26 Pull Up Status. 26 1 read-only P27 Pull Up Status. 27 1 read-only P28 Pull Up Status. 28 1 read-only P29 Pull Up Status. 29 1 read-only P30 Pull Up Status. 30 1 read-only P31 Pull Up Status. 31 1 read-only 2 4 0-1 ABCDSR[%s] Peripheral Select Register 0x00000070 32 read-write P0 Peripheral Select. 0 1 read-write P1 Peripheral Select. 1 1 read-write P2 Peripheral Select. 2 1 read-write P3 Peripheral Select. 3 1 read-write P4 Peripheral Select. 4 1 read-write P5 Peripheral Select. 5 1 read-write P6 Peripheral Select. 6 1 read-write P7 Peripheral Select. 7 1 read-write P8 Peripheral Select. 8 1 read-write P9 Peripheral Select. 9 1 read-write P10 Peripheral Select. 10 1 read-write P11 Peripheral Select. 11 1 read-write P12 Peripheral Select. 12 1 read-write P13 Peripheral Select. 13 1 read-write P14 Peripheral Select. 14 1 read-write P15 Peripheral Select. 15 1 read-write P16 Peripheral Select. 16 1 read-write P17 Peripheral Select. 17 1 read-write P18 Peripheral Select. 18 1 read-write P19 Peripheral Select. 19 1 read-write P20 Peripheral Select. 20 1 read-write P21 Peripheral Select. 21 1 read-write P22 Peripheral Select. 22 1 read-write P23 Peripheral Select. 23 1 read-write P24 Peripheral Select. 24 1 read-write P25 Peripheral Select. 25 1 read-write P26 Peripheral Select. 26 1 read-write P27 Peripheral Select. 27 1 read-write P28 Peripheral Select. 28 1 read-write P29 Peripheral Select. 29 1 read-write P30 Peripheral Select. 30 1 read-write P31 Peripheral Select. 31 1 read-write IFSCDR Input Filter Slow Clock Disable Register 0x00000080 32 write-only P0 PIO Clock Glitch Filtering Select. 0 1 write-only P1 PIO Clock Glitch Filtering Select. 1 1 write-only P2 PIO Clock Glitch Filtering Select. 2 1 write-only P3 PIO Clock Glitch Filtering Select. 3 1 write-only P4 PIO Clock Glitch Filtering Select. 4 1 write-only P5 PIO Clock Glitch Filtering Select. 5 1 write-only P6 PIO Clock Glitch Filtering Select. 6 1 write-only P7 PIO Clock Glitch Filtering Select. 7 1 write-only P8 PIO Clock Glitch Filtering Select. 8 1 write-only P9 PIO Clock Glitch Filtering Select. 9 1 write-only P10 PIO Clock Glitch Filtering Select. 10 1 write-only P11 PIO Clock Glitch Filtering Select. 11 1 write-only P12 PIO Clock Glitch Filtering Select. 12 1 write-only P13 PIO Clock Glitch Filtering Select. 13 1 write-only P14 PIO Clock Glitch Filtering Select. 14 1 write-only P15 PIO Clock Glitch Filtering Select. 15 1 write-only P16 PIO Clock Glitch Filtering Select. 16 1 write-only P17 PIO Clock Glitch Filtering Select. 17 1 write-only P18 PIO Clock Glitch Filtering Select. 18 1 write-only P19 PIO Clock Glitch Filtering Select. 19 1 write-only P20 PIO Clock Glitch Filtering Select. 20 1 write-only P21 PIO Clock Glitch Filtering Select. 21 1 write-only P22 PIO Clock Glitch Filtering Select. 22 1 write-only P23 PIO Clock Glitch Filtering Select. 23 1 write-only P24 PIO Clock Glitch Filtering Select. 24 1 write-only P25 PIO Clock Glitch Filtering Select. 25 1 write-only P26 PIO Clock Glitch Filtering Select. 26 1 write-only P27 PIO Clock Glitch Filtering Select. 27 1 write-only P28 PIO Clock Glitch Filtering Select. 28 1 write-only P29 PIO Clock Glitch Filtering Select. 29 1 write-only P30 PIO Clock Glitch Filtering Select. 30 1 write-only P31 PIO Clock Glitch Filtering Select. 31 1 write-only IFSCER Input Filter Slow Clock Enable Register 0x00000084 32 write-only P0 Debouncing Filtering Select. 0 1 write-only P1 Debouncing Filtering Select. 1 1 write-only P2 Debouncing Filtering Select. 2 1 write-only P3 Debouncing Filtering Select. 3 1 write-only P4 Debouncing Filtering Select. 4 1 write-only P5 Debouncing Filtering Select. 5 1 write-only P6 Debouncing Filtering Select. 6 1 write-only P7 Debouncing Filtering Select. 7 1 write-only P8 Debouncing Filtering Select. 8 1 write-only P9 Debouncing Filtering Select. 9 1 write-only P10 Debouncing Filtering Select. 10 1 write-only P11 Debouncing Filtering Select. 11 1 write-only P12 Debouncing Filtering Select. 12 1 write-only P13 Debouncing Filtering Select. 13 1 write-only P14 Debouncing Filtering Select. 14 1 write-only P15 Debouncing Filtering Select. 15 1 write-only P16 Debouncing Filtering Select. 16 1 write-only P17 Debouncing Filtering Select. 17 1 write-only P18 Debouncing Filtering Select. 18 1 write-only P19 Debouncing Filtering Select. 19 1 write-only P20 Debouncing Filtering Select. 20 1 write-only P21 Debouncing Filtering Select. 21 1 write-only P22 Debouncing Filtering Select. 22 1 write-only P23 Debouncing Filtering Select. 23 1 write-only P24 Debouncing Filtering Select. 24 1 write-only P25 Debouncing Filtering Select. 25 1 write-only P26 Debouncing Filtering Select. 26 1 write-only P27 Debouncing Filtering Select. 27 1 write-only P28 Debouncing Filtering Select. 28 1 write-only P29 Debouncing Filtering Select. 29 1 write-only P30 Debouncing Filtering Select. 30 1 write-only P31 Debouncing Filtering Select. 31 1 write-only IFSCSR Input Filter Slow Clock Status Register 0x00000088 32 read-only 0x00000000 P0 Glitch or Debouncing Filter Selection Status 0 1 read-only P1 Glitch or Debouncing Filter Selection Status 1 1 read-only P2 Glitch or Debouncing Filter Selection Status 2 1 read-only P3 Glitch or Debouncing Filter Selection Status 3 1 read-only P4 Glitch or Debouncing Filter Selection Status 4 1 read-only P5 Glitch or Debouncing Filter Selection Status 5 1 read-only P6 Glitch or Debouncing Filter Selection Status 6 1 read-only P7 Glitch or Debouncing Filter Selection Status 7 1 read-only P8 Glitch or Debouncing Filter Selection Status 8 1 read-only P9 Glitch or Debouncing Filter Selection Status 9 1 read-only P10 Glitch or Debouncing Filter Selection Status 10 1 read-only P11 Glitch or Debouncing Filter Selection Status 11 1 read-only P12 Glitch or Debouncing Filter Selection Status 12 1 read-only P13 Glitch or Debouncing Filter Selection Status 13 1 read-only P14 Glitch or Debouncing Filter Selection Status 14 1 read-only P15 Glitch or Debouncing Filter Selection Status 15 1 read-only P16 Glitch or Debouncing Filter Selection Status 16 1 read-only P17 Glitch or Debouncing Filter Selection Status 17 1 read-only P18 Glitch or Debouncing Filter Selection Status 18 1 read-only P19 Glitch or Debouncing Filter Selection Status 19 1 read-only P20 Glitch or Debouncing Filter Selection Status 20 1 read-only P21 Glitch or Debouncing Filter Selection Status 21 1 read-only P22 Glitch or Debouncing Filter Selection Status 22 1 read-only P23 Glitch or Debouncing Filter Selection Status 23 1 read-only P24 Glitch or Debouncing Filter Selection Status 24 1 read-only P25 Glitch or Debouncing Filter Selection Status 25 1 read-only P26 Glitch or Debouncing Filter Selection Status 26 1 read-only P27 Glitch or Debouncing Filter Selection Status 27 1 read-only P28 Glitch or Debouncing Filter Selection Status 28 1 read-only P29 Glitch or Debouncing Filter Selection Status 29 1 read-only P30 Glitch or Debouncing Filter Selection Status 30 1 read-only P31 Glitch or Debouncing Filter Selection Status 31 1 read-only SCDR Slow Clock Divider Debouncing Register 0x0000008C 32 read-write 0x00000000 DIV 0 14 read-write PPDDR Pad Pull-down Disable Register 0x00000090 32 write-only P0 Pull Down Disable. 0 1 write-only P1 Pull Down Disable. 1 1 write-only P2 Pull Down Disable. 2 1 write-only P3 Pull Down Disable. 3 1 write-only P4 Pull Down Disable. 4 1 write-only P5 Pull Down Disable. 5 1 write-only P6 Pull Down Disable. 6 1 write-only P7 Pull Down Disable. 7 1 write-only P8 Pull Down Disable. 8 1 write-only P9 Pull Down Disable. 9 1 write-only P10 Pull Down Disable. 10 1 write-only P11 Pull Down Disable. 11 1 write-only P12 Pull Down Disable. 12 1 write-only P13 Pull Down Disable. 13 1 write-only P14 Pull Down Disable. 14 1 write-only P15 Pull Down Disable. 15 1 write-only P16 Pull Down Disable. 16 1 write-only P17 Pull Down Disable. 17 1 write-only P18 Pull Down Disable. 18 1 write-only P19 Pull Down Disable. 19 1 write-only P20 Pull Down Disable. 20 1 write-only P21 Pull Down Disable. 21 1 write-only P22 Pull Down Disable. 22 1 write-only P23 Pull Down Disable. 23 1 write-only P24 Pull Down Disable. 24 1 write-only P25 Pull Down Disable. 25 1 write-only P26 Pull Down Disable. 26 1 write-only P27 Pull Down Disable. 27 1 write-only P28 Pull Down Disable. 28 1 write-only P29 Pull Down Disable. 29 1 write-only P30 Pull Down Disable. 30 1 write-only P31 Pull Down Disable. 31 1 write-only PPDER Pad Pull-down Enable Register 0x00000094 32 write-only P0 Pull Down Enable. 0 1 write-only P1 Pull Down Enable. 1 1 write-only P2 Pull Down Enable. 2 1 write-only P3 Pull Down Enable. 3 1 write-only P4 Pull Down Enable. 4 1 write-only P5 Pull Down Enable. 5 1 write-only P6 Pull Down Enable. 6 1 write-only P7 Pull Down Enable. 7 1 write-only P8 Pull Down Enable. 8 1 write-only P9 Pull Down Enable. 9 1 write-only P10 Pull Down Enable. 10 1 write-only P11 Pull Down Enable. 11 1 write-only P12 Pull Down Enable. 12 1 write-only P13 Pull Down Enable. 13 1 write-only P14 Pull Down Enable. 14 1 write-only P15 Pull Down Enable. 15 1 write-only P16 Pull Down Enable. 16 1 write-only P17 Pull Down Enable. 17 1 write-only P18 Pull Down Enable. 18 1 write-only P19 Pull Down Enable. 19 1 write-only P20 Pull Down Enable. 20 1 write-only P21 Pull Down Enable. 21 1 write-only P22 Pull Down Enable. 22 1 write-only P23 Pull Down Enable. 23 1 write-only P24 Pull Down Enable. 24 1 write-only P25 Pull Down Enable. 25 1 write-only P26 Pull Down Enable. 26 1 write-only P27 Pull Down Enable. 27 1 write-only P28 Pull Down Enable. 28 1 write-only P29 Pull Down Enable. 29 1 write-only P30 Pull Down Enable. 30 1 write-only P31 Pull Down Enable. 31 1 write-only PPDSR Pad Pull-down Status Register 0x00000098 32 read-only P0 Pull Down Status. 0 1 read-only P1 Pull Down Status. 1 1 read-only P2 Pull Down Status. 2 1 read-only P3 Pull Down Status. 3 1 read-only P4 Pull Down Status. 4 1 read-only P5 Pull Down Status. 5 1 read-only P6 Pull Down Status. 6 1 read-only P7 Pull Down Status. 7 1 read-only P8 Pull Down Status. 8 1 read-only P9 Pull Down Status. 9 1 read-only P10 Pull Down Status. 10 1 read-only P11 Pull Down Status. 11 1 read-only P12 Pull Down Status. 12 1 read-only P13 Pull Down Status. 13 1 read-only P14 Pull Down Status. 14 1 read-only P15 Pull Down Status. 15 1 read-only P16 Pull Down Status. 16 1 read-only P17 Pull Down Status. 17 1 read-only P18 Pull Down Status. 18 1 read-only P19 Pull Down Status. 19 1 read-only P20 Pull Down Status. 20 1 read-only P21 Pull Down Status. 21 1 read-only P22 Pull Down Status. 22 1 read-only P23 Pull Down Status. 23 1 read-only P24 Pull Down Status. 24 1 read-only P25 Pull Down Status. 25 1 read-only P26 Pull Down Status. 26 1 read-only P27 Pull Down Status. 27 1 read-only P28 Pull Down Status. 28 1 read-only P29 Pull Down Status. 29 1 read-only P30 Pull Down Status. 30 1 read-only P31 Pull Down Status. 31 1 read-only OWER Output Write Enable 0x000000A0 32 write-only P0 Output Write Enable. 0 1 write-only P1 Output Write Enable. 1 1 write-only P2 Output Write Enable. 2 1 write-only P3 Output Write Enable. 3 1 write-only P4 Output Write Enable. 4 1 write-only P5 Output Write Enable. 5 1 write-only P6 Output Write Enable. 6 1 write-only P7 Output Write Enable. 7 1 write-only P8 Output Write Enable. 8 1 write-only P9 Output Write Enable. 9 1 write-only P10 Output Write Enable. 10 1 write-only P11 Output Write Enable. 11 1 write-only P12 Output Write Enable. 12 1 write-only P13 Output Write Enable. 13 1 write-only P14 Output Write Enable. 14 1 write-only P15 Output Write Enable. 15 1 write-only P16 Output Write Enable. 16 1 write-only P17 Output Write Enable. 17 1 write-only P18 Output Write Enable. 18 1 write-only P19 Output Write Enable. 19 1 write-only P20 Output Write Enable. 20 1 write-only P21 Output Write Enable. 21 1 write-only P22 Output Write Enable. 22 1 write-only P23 Output Write Enable. 23 1 write-only P24 Output Write Enable. 24 1 write-only P25 Output Write Enable. 25 1 write-only P26 Output Write Enable. 26 1 write-only P27 Output Write Enable. 27 1 write-only P28 Output Write Enable. 28 1 write-only P29 Output Write Enable. 29 1 write-only P30 Output Write Enable. 30 1 write-only P31 Output Write Enable. 31 1 write-only OWDR Output Write Disable 0x000000A4 32 write-only P0 Output Write Disable. 0 1 write-only P1 Output Write Disable. 1 1 write-only P2 Output Write Disable. 2 1 write-only P3 Output Write Disable. 3 1 write-only P4 Output Write Disable. 4 1 write-only P5 Output Write Disable. 5 1 write-only P6 Output Write Disable. 6 1 write-only P7 Output Write Disable. 7 1 write-only P8 Output Write Disable. 8 1 write-only P9 Output Write Disable. 9 1 write-only P10 Output Write Disable. 10 1 write-only P11 Output Write Disable. 11 1 write-only P12 Output Write Disable. 12 1 write-only P13 Output Write Disable. 13 1 write-only P14 Output Write Disable. 14 1 write-only P15 Output Write Disable. 15 1 write-only P16 Output Write Disable. 16 1 write-only P17 Output Write Disable. 17 1 write-only P18 Output Write Disable. 18 1 write-only P19 Output Write Disable. 19 1 write-only P20 Output Write Disable. 20 1 write-only P21 Output Write Disable. 21 1 write-only P22 Output Write Disable. 22 1 write-only P23 Output Write Disable. 23 1 write-only P24 Output Write Disable. 24 1 write-only P25 Output Write Disable. 25 1 write-only P26 Output Write Disable. 26 1 write-only P27 Output Write Disable. 27 1 write-only P28 Output Write Disable. 28 1 write-only P29 Output Write Disable. 29 1 write-only P30 Output Write Disable. 30 1 write-only P31 Output Write Disable. 31 1 write-only OWSR Output Write Status Register 0x000000A8 32 read-only 0x00000000 P0 Output Write Status. 0 1 read-only P1 Output Write Status. 1 1 read-only P2 Output Write Status. 2 1 read-only P3 Output Write Status. 3 1 read-only P4 Output Write Status. 4 1 read-only P5 Output Write Status. 5 1 read-only P6 Output Write Status. 6 1 read-only P7 Output Write Status. 7 1 read-only P8 Output Write Status. 8 1 read-only P9 Output Write Status. 9 1 read-only P10 Output Write Status. 10 1 read-only P11 Output Write Status. 11 1 read-only P12 Output Write Status. 12 1 read-only P13 Output Write Status. 13 1 read-only P14 Output Write Status. 14 1 read-only P15 Output Write Status. 15 1 read-only P16 Output Write Status. 16 1 read-only P17 Output Write Status. 17 1 read-only P18 Output Write Status. 18 1 read-only P19 Output Write Status. 19 1 read-only P20 Output Write Status. 20 1 read-only P21 Output Write Status. 21 1 read-only P22 Output Write Status. 22 1 read-only P23 Output Write Status. 23 1 read-only P24 Output Write Status. 24 1 read-only P25 Output Write Status. 25 1 read-only P26 Output Write Status. 26 1 read-only P27 Output Write Status. 27 1 read-only P28 Output Write Status. 28 1 read-only P29 Output Write Status. 29 1 read-only P30 Output Write Status. 30 1 read-only P31 Output Write Status. 31 1 read-only AIMER Additional Interrupt Modes Enable Register 0x000000B0 32 write-only P0 Additional Interrupt Modes Enable. 0 1 write-only P1 Additional Interrupt Modes Enable. 1 1 write-only P2 Additional Interrupt Modes Enable. 2 1 write-only P3 Additional Interrupt Modes Enable. 3 1 write-only P4 Additional Interrupt Modes Enable. 4 1 write-only P5 Additional Interrupt Modes Enable. 5 1 write-only P6 Additional Interrupt Modes Enable. 6 1 write-only P7 Additional Interrupt Modes Enable. 7 1 write-only P8 Additional Interrupt Modes Enable. 8 1 write-only P9 Additional Interrupt Modes Enable. 9 1 write-only P10 Additional Interrupt Modes Enable. 10 1 write-only P11 Additional Interrupt Modes Enable. 11 1 write-only P12 Additional Interrupt Modes Enable. 12 1 write-only P13 Additional Interrupt Modes Enable. 13 1 write-only P14 Additional Interrupt Modes Enable. 14 1 write-only P15 Additional Interrupt Modes Enable. 15 1 write-only P16 Additional Interrupt Modes Enable. 16 1 write-only P17 Additional Interrupt Modes Enable. 17 1 write-only P18 Additional Interrupt Modes Enable. 18 1 write-only P19 Additional Interrupt Modes Enable. 19 1 write-only P20 Additional Interrupt Modes Enable. 20 1 write-only P21 Additional Interrupt Modes Enable. 21 1 write-only P22 Additional Interrupt Modes Enable. 22 1 write-only P23 Additional Interrupt Modes Enable. 23 1 write-only P24 Additional Interrupt Modes Enable. 24 1 write-only P25 Additional Interrupt Modes Enable. 25 1 write-only P26 Additional Interrupt Modes Enable. 26 1 write-only P27 Additional Interrupt Modes Enable. 27 1 write-only P28 Additional Interrupt Modes Enable. 28 1 write-only P29 Additional Interrupt Modes Enable. 29 1 write-only P30 Additional Interrupt Modes Enable. 30 1 write-only P31 Additional Interrupt Modes Enable. 31 1 write-only AIMDR Additional Interrupt Modes Disables Register 0x000000B4 32 write-only P0 Additional Interrupt Modes Disable. 0 1 write-only P1 Additional Interrupt Modes Disable. 1 1 write-only P2 Additional Interrupt Modes Disable. 2 1 write-only P3 Additional Interrupt Modes Disable. 3 1 write-only P4 Additional Interrupt Modes Disable. 4 1 write-only P5 Additional Interrupt Modes Disable. 5 1 write-only P6 Additional Interrupt Modes Disable. 6 1 write-only P7 Additional Interrupt Modes Disable. 7 1 write-only P8 Additional Interrupt Modes Disable. 8 1 write-only P9 Additional Interrupt Modes Disable. 9 1 write-only P10 Additional Interrupt Modes Disable. 10 1 write-only P11 Additional Interrupt Modes Disable. 11 1 write-only P12 Additional Interrupt Modes Disable. 12 1 write-only P13 Additional Interrupt Modes Disable. 13 1 write-only P14 Additional Interrupt Modes Disable. 14 1 write-only P15 Additional Interrupt Modes Disable. 15 1 write-only P16 Additional Interrupt Modes Disable. 16 1 write-only P17 Additional Interrupt Modes Disable. 17 1 write-only P18 Additional Interrupt Modes Disable. 18 1 write-only P19 Additional Interrupt Modes Disable. 19 1 write-only P20 Additional Interrupt Modes Disable. 20 1 write-only P21 Additional Interrupt Modes Disable. 21 1 write-only P22 Additional Interrupt Modes Disable. 22 1 write-only P23 Additional Interrupt Modes Disable. 23 1 write-only P24 Additional Interrupt Modes Disable. 24 1 write-only P25 Additional Interrupt Modes Disable. 25 1 write-only P26 Additional Interrupt Modes Disable. 26 1 write-only P27 Additional Interrupt Modes Disable. 27 1 write-only P28 Additional Interrupt Modes Disable. 28 1 write-only P29 Additional Interrupt Modes Disable. 29 1 write-only P30 Additional Interrupt Modes Disable. 30 1 write-only P31 Additional Interrupt Modes Disable. 31 1 write-only AIMMR Additional Interrupt Modes Mask Register 0x000000B8 32 read-only 0x00000000 P0 Peripheral CD Status. 0 1 read-only P1 Peripheral CD Status. 1 1 read-only P2 Peripheral CD Status. 2 1 read-only P3 Peripheral CD Status. 3 1 read-only P4 Peripheral CD Status. 4 1 read-only P5 Peripheral CD Status. 5 1 read-only P6 Peripheral CD Status. 6 1 read-only P7 Peripheral CD Status. 7 1 read-only P8 Peripheral CD Status. 8 1 read-only P9 Peripheral CD Status. 9 1 read-only P10 Peripheral CD Status. 10 1 read-only P11 Peripheral CD Status. 11 1 read-only P12 Peripheral CD Status. 12 1 read-only P13 Peripheral CD Status. 13 1 read-only P14 Peripheral CD Status. 14 1 read-only P15 Peripheral CD Status. 15 1 read-only P16 Peripheral CD Status. 16 1 read-only P17 Peripheral CD Status. 17 1 read-only P18 Peripheral CD Status. 18 1 read-only P19 Peripheral CD Status. 19 1 read-only P20 Peripheral CD Status. 20 1 read-only P21 Peripheral CD Status. 21 1 read-only P22 Peripheral CD Status. 22 1 read-only P23 Peripheral CD Status. 23 1 read-only P24 Peripheral CD Status. 24 1 read-only P25 Peripheral CD Status. 25 1 read-only P26 Peripheral CD Status. 26 1 read-only P27 Peripheral CD Status. 27 1 read-only P28 Peripheral CD Status. 28 1 read-only P29 Peripheral CD Status. 29 1 read-only P30 Peripheral CD Status. 30 1 read-only P31 Peripheral CD Status. 31 1 read-only ESR Edge Select Register 0x000000C0 32 write-only P0 Edge Interrupt Selection. 0 1 write-only P1 Edge Interrupt Selection. 1 1 write-only P2 Edge Interrupt Selection. 2 1 write-only P3 Edge Interrupt Selection. 3 1 write-only P4 Edge Interrupt Selection. 4 1 write-only P5 Edge Interrupt Selection. 5 1 write-only P6 Edge Interrupt Selection. 6 1 write-only P7 Edge Interrupt Selection. 7 1 write-only P8 Edge Interrupt Selection. 8 1 write-only P9 Edge Interrupt Selection. 9 1 write-only P10 Edge Interrupt Selection. 10 1 write-only P11 Edge Interrupt Selection. 11 1 write-only P12 Edge Interrupt Selection. 12 1 write-only P13 Edge Interrupt Selection. 13 1 write-only P14 Edge Interrupt Selection. 14 1 write-only P15 Edge Interrupt Selection. 15 1 write-only P16 Edge Interrupt Selection. 16 1 write-only P17 Edge Interrupt Selection. 17 1 write-only P18 Edge Interrupt Selection. 18 1 write-only P19 Edge Interrupt Selection. 19 1 write-only P20 Edge Interrupt Selection. 20 1 write-only P21 Edge Interrupt Selection. 21 1 write-only P22 Edge Interrupt Selection. 22 1 write-only P23 Edge Interrupt Selection. 23 1 write-only P24 Edge Interrupt Selection. 24 1 write-only P25 Edge Interrupt Selection. 25 1 write-only P26 Edge Interrupt Selection. 26 1 write-only P27 Edge Interrupt Selection. 27 1 write-only P28 Edge Interrupt Selection. 28 1 write-only P29 Edge Interrupt Selection. 29 1 write-only P30 Edge Interrupt Selection. 30 1 write-only P31 Edge Interrupt Selection. 31 1 write-only LSR Level Select Register 0x000000C4 32 write-only P0 Level Interrupt Selection. 0 1 write-only P1 Level Interrupt Selection. 1 1 write-only P2 Level Interrupt Selection. 2 1 write-only P3 Level Interrupt Selection. 3 1 write-only P4 Level Interrupt Selection. 4 1 write-only P5 Level Interrupt Selection. 5 1 write-only P6 Level Interrupt Selection. 6 1 write-only P7 Level Interrupt Selection. 7 1 write-only P8 Level Interrupt Selection. 8 1 write-only P9 Level Interrupt Selection. 9 1 write-only P10 Level Interrupt Selection. 10 1 write-only P11 Level Interrupt Selection. 11 1 write-only P12 Level Interrupt Selection. 12 1 write-only P13 Level Interrupt Selection. 13 1 write-only P14 Level Interrupt Selection. 14 1 write-only P15 Level Interrupt Selection. 15 1 write-only P16 Level Interrupt Selection. 16 1 write-only P17 Level Interrupt Selection. 17 1 write-only P18 Level Interrupt Selection. 18 1 write-only P19 Level Interrupt Selection. 19 1 write-only P20 Level Interrupt Selection. 20 1 write-only P21 Level Interrupt Selection. 21 1 write-only P22 Level Interrupt Selection. 22 1 write-only P23 Level Interrupt Selection. 23 1 write-only P24 Level Interrupt Selection. 24 1 write-only P25 Level Interrupt Selection. 25 1 write-only P26 Level Interrupt Selection. 26 1 write-only P27 Level Interrupt Selection. 27 1 write-only P28 Level Interrupt Selection. 28 1 write-only P29 Level Interrupt Selection. 29 1 write-only P30 Level Interrupt Selection. 30 1 write-only P31 Level Interrupt Selection. 31 1 write-only ELSR Edge/Level Status Register 0x000000C8 32 read-only 0x00000000 P0 Edge/Level Interrupt source selection. 0 1 read-only P1 Edge/Level Interrupt source selection. 1 1 read-only P2 Edge/Level Interrupt source selection. 2 1 read-only P3 Edge/Level Interrupt source selection. 3 1 read-only P4 Edge/Level Interrupt source selection. 4 1 read-only P5 Edge/Level Interrupt source selection. 5 1 read-only P6 Edge/Level Interrupt source selection. 6 1 read-only P7 Edge/Level Interrupt source selection. 7 1 read-only P8 Edge/Level Interrupt source selection. 8 1 read-only P9 Edge/Level Interrupt source selection. 9 1 read-only P10 Edge/Level Interrupt source selection. 10 1 read-only P11 Edge/Level Interrupt source selection. 11 1 read-only P12 Edge/Level Interrupt source selection. 12 1 read-only P13 Edge/Level Interrupt source selection. 13 1 read-only P14 Edge/Level Interrupt source selection. 14 1 read-only P15 Edge/Level Interrupt source selection. 15 1 read-only P16 Edge/Level Interrupt source selection. 16 1 read-only P17 Edge/Level Interrupt source selection. 17 1 read-only P18 Edge/Level Interrupt source selection. 18 1 read-only P19 Edge/Level Interrupt source selection. 19 1 read-only P20 Edge/Level Interrupt source selection. 20 1 read-only P21 Edge/Level Interrupt source selection. 21 1 read-only P22 Edge/Level Interrupt source selection. 22 1 read-only P23 Edge/Level Interrupt source selection. 23 1 read-only P24 Edge/Level Interrupt source selection. 24 1 read-only P25 Edge/Level Interrupt source selection. 25 1 read-only P26 Edge/Level Interrupt source selection. 26 1 read-only P27 Edge/Level Interrupt source selection. 27 1 read-only P28 Edge/Level Interrupt source selection. 28 1 read-only P29 Edge/Level Interrupt source selection. 29 1 read-only P30 Edge/Level Interrupt source selection. 30 1 read-only P31 Edge/Level Interrupt source selection. 31 1 read-only FELLSR Falling Edge/Low Level Select Register 0x000000D0 32 write-only P0 Falling Edge/Low Level Interrupt Selection. 0 1 write-only P1 Falling Edge/Low Level Interrupt Selection. 1 1 write-only P2 Falling Edge/Low Level Interrupt Selection. 2 1 write-only P3 Falling Edge/Low Level Interrupt Selection. 3 1 write-only P4 Falling Edge/Low Level Interrupt Selection. 4 1 write-only P5 Falling Edge/Low Level Interrupt Selection. 5 1 write-only P6 Falling Edge/Low Level Interrupt Selection. 6 1 write-only P7 Falling Edge/Low Level Interrupt Selection. 7 1 write-only P8 Falling Edge/Low Level Interrupt Selection. 8 1 write-only P9 Falling Edge/Low Level Interrupt Selection. 9 1 write-only P10 Falling Edge/Low Level Interrupt Selection. 10 1 write-only P11 Falling Edge/Low Level Interrupt Selection. 11 1 write-only P12 Falling Edge/Low Level Interrupt Selection. 12 1 write-only P13 Falling Edge/Low Level Interrupt Selection. 13 1 write-only P14 Falling Edge/Low Level Interrupt Selection. 14 1 write-only P15 Falling Edge/Low Level Interrupt Selection. 15 1 write-only P16 Falling Edge/Low Level Interrupt Selection. 16 1 write-only P17 Falling Edge/Low Level Interrupt Selection. 17 1 write-only P18 Falling Edge/Low Level Interrupt Selection. 18 1 write-only P19 Falling Edge/Low Level Interrupt Selection. 19 1 write-only P20 Falling Edge/Low Level Interrupt Selection. 20 1 write-only P21 Falling Edge/Low Level Interrupt Selection. 21 1 write-only P22 Falling Edge/Low Level Interrupt Selection. 22 1 write-only P23 Falling Edge/Low Level Interrupt Selection. 23 1 write-only P24 Falling Edge/Low Level Interrupt Selection. 24 1 write-only P25 Falling Edge/Low Level Interrupt Selection. 25 1 write-only P26 Falling Edge/Low Level Interrupt Selection. 26 1 write-only P27 Falling Edge/Low Level Interrupt Selection. 27 1 write-only P28 Falling Edge/Low Level Interrupt Selection. 28 1 write-only P29 Falling Edge/Low Level Interrupt Selection. 29 1 write-only P30 Falling Edge/Low Level Interrupt Selection. 30 1 write-only P31 Falling Edge/Low Level Interrupt Selection. 31 1 write-only REHLSR Rising Edge/ High Level Select Register 0x000000D4 32 write-only P0 Rising Edge /High Level Interrupt Selection. 0 1 write-only P1 Rising Edge /High Level Interrupt Selection. 1 1 write-only P2 Rising Edge /High Level Interrupt Selection. 2 1 write-only P3 Rising Edge /High Level Interrupt Selection. 3 1 write-only P4 Rising Edge /High Level Interrupt Selection. 4 1 write-only P5 Rising Edge /High Level Interrupt Selection. 5 1 write-only P6 Rising Edge /High Level Interrupt Selection. 6 1 write-only P7 Rising Edge /High Level Interrupt Selection. 7 1 write-only P8 Rising Edge /High Level Interrupt Selection. 8 1 write-only P9 Rising Edge /High Level Interrupt Selection. 9 1 write-only P10 Rising Edge /High Level Interrupt Selection. 10 1 write-only P11 Rising Edge /High Level Interrupt Selection. 11 1 write-only P12 Rising Edge /High Level Interrupt Selection. 12 1 write-only P13 Rising Edge /High Level Interrupt Selection. 13 1 write-only P14 Rising Edge /High Level Interrupt Selection. 14 1 write-only P15 Rising Edge /High Level Interrupt Selection. 15 1 write-only P16 Rising Edge /High Level Interrupt Selection. 16 1 write-only P17 Rising Edge /High Level Interrupt Selection. 17 1 write-only P18 Rising Edge /High Level Interrupt Selection. 18 1 write-only P19 Rising Edge /High Level Interrupt Selection. 19 1 write-only P20 Rising Edge /High Level Interrupt Selection. 20 1 write-only P21 Rising Edge /High Level Interrupt Selection. 21 1 write-only P22 Rising Edge /High Level Interrupt Selection. 22 1 write-only P23 Rising Edge /High Level Interrupt Selection. 23 1 write-only P24 Rising Edge /High Level Interrupt Selection. 24 1 write-only P25 Rising Edge /High Level Interrupt Selection. 25 1 write-only P26 Rising Edge /High Level Interrupt Selection. 26 1 write-only P27 Rising Edge /High Level Interrupt Selection. 27 1 write-only P28 Rising Edge /High Level Interrupt Selection. 28 1 write-only P29 Rising Edge /High Level Interrupt Selection. 29 1 write-only P30 Rising Edge /High Level Interrupt Selection. 30 1 write-only P31 Rising Edge /High Level Interrupt Selection. 31 1 write-only FRLHSR Fall/Rise - Low/High Status Register 0x000000D8 32 read-only 0x00000000 P0 Edge /Level Interrupt Source Selection. 0 1 read-only P1 Edge /Level Interrupt Source Selection. 1 1 read-only P2 Edge /Level Interrupt Source Selection. 2 1 read-only P3 Edge /Level Interrupt Source Selection. 3 1 read-only P4 Edge /Level Interrupt Source Selection. 4 1 read-only P5 Edge /Level Interrupt Source Selection. 5 1 read-only P6 Edge /Level Interrupt Source Selection. 6 1 read-only P7 Edge /Level Interrupt Source Selection. 7 1 read-only P8 Edge /Level Interrupt Source Selection. 8 1 read-only P9 Edge /Level Interrupt Source Selection. 9 1 read-only P10 Edge /Level Interrupt Source Selection. 10 1 read-only P11 Edge /Level Interrupt Source Selection. 11 1 read-only P12 Edge /Level Interrupt Source Selection. 12 1 read-only P13 Edge /Level Interrupt Source Selection. 13 1 read-only P14 Edge /Level Interrupt Source Selection. 14 1 read-only P15 Edge /Level Interrupt Source Selection. 15 1 read-only P16 Edge /Level Interrupt Source Selection. 16 1 read-only P17 Edge /Level Interrupt Source Selection. 17 1 read-only P18 Edge /Level Interrupt Source Selection. 18 1 read-only P19 Edge /Level Interrupt Source Selection. 19 1 read-only P20 Edge /Level Interrupt Source Selection. 20 1 read-only P21 Edge /Level Interrupt Source Selection. 21 1 read-only P22 Edge /Level Interrupt Source Selection. 22 1 read-only P23 Edge /Level Interrupt Source Selection. 23 1 read-only P24 Edge /Level Interrupt Source Selection. 24 1 read-only P25 Edge /Level Interrupt Source Selection. 25 1 read-only P26 Edge /Level Interrupt Source Selection. 26 1 read-only P27 Edge /Level Interrupt Source Selection. 27 1 read-only P28 Edge /Level Interrupt Source Selection. 28 1 read-only P29 Edge /Level Interrupt Source Selection. 29 1 read-only P30 Edge /Level Interrupt Source Selection. 30 1 read-only P31 Edge /Level Interrupt Source Selection. 31 1 read-only LOCKSR Lock Status 0x000000E0 32 read-only 0x00000000 P0 Lock Status. 0 1 read-only P1 Lock Status. 1 1 read-only P2 Lock Status. 2 1 read-only P3 Lock Status. 3 1 read-only P4 Lock Status. 4 1 read-only P5 Lock Status. 5 1 read-only P6 Lock Status. 6 1 read-only P7 Lock Status. 7 1 read-only P8 Lock Status. 8 1 read-only P9 Lock Status. 9 1 read-only P10 Lock Status. 10 1 read-only P11 Lock Status. 11 1 read-only P12 Lock Status. 12 1 read-only P13 Lock Status. 13 1 read-only P14 Lock Status. 14 1 read-only P15 Lock Status. 15 1 read-only P16 Lock Status. 16 1 read-only P17 Lock Status. 17 1 read-only P18 Lock Status. 18 1 read-only P19 Lock Status. 19 1 read-only P20 Lock Status. 20 1 read-only P21 Lock Status. 21 1 read-only P22 Lock Status. 22 1 read-only P23 Lock Status. 23 1 read-only P24 Lock Status. 24 1 read-only P25 Lock Status. 25 1 read-only P26 Lock Status. 26 1 read-only P27 Lock Status. 27 1 read-only P28 Lock Status. 28 1 read-only P29 Lock Status. 29 1 read-only P30 Lock Status. 30 1 read-only P31 Lock Status. 31 1 read-only WPMR Write Protect Mode Register 0x000000E4 32 read-write 0x00000000 WPEN Write Protect Enable 0 1 read-write WPKEY Write Protect KEY 8 24 read-write WPSR Write Protect Status Register 0x000000E8 32 read-only 0x00000000 WPVS Write Protect Violation Status 0 1 read-only WPVSRC Write Protect Violation Source 8 16 read-only SCHMITT Schmitt Trigger Register 0x00000100 32 read-write 0x00000000 SCHMITT0 0 1 read-write SCHMITT1 1 1 read-write SCHMITT2 2 1 read-write SCHMITT3 3 1 read-write SCHMITT4 4 1 read-write SCHMITT5 5 1 read-write SCHMITT6 6 1 read-write SCHMITT7 7 1 read-write SCHMITT8 8 1 read-write SCHMITT9 9 1 read-write SCHMITT10 10 1 read-write SCHMITT11 11 1 read-write SCHMITT12 12 1 read-write SCHMITT13 13 1 read-write SCHMITT14 14 1 read-write SCHMITT15 15 1 read-write SCHMITT16 16 1 read-write SCHMITT17 17 1 read-write SCHMITT18 18 1 read-write SCHMITT19 19 1 read-write SCHMITT20 20 1 read-write SCHMITT21 21 1 read-write SCHMITT22 22 1 read-write SCHMITT23 23 1 read-write SCHMITT24 24 1 read-write SCHMITT25 25 1 read-write SCHMITT26 26 1 read-write SCHMITT27 27 1 read-write SCHMITT28 28 1 read-write SCHMITT29 29 1 read-write SCHMITT30 30 1 read-write SCHMITT31 31 1 read-write DELAYR IO Delay Register 0x00000110 32 read-write 0x00000000 Delay0 0 4 read-write Delay1 4 4 read-write Delay2 8 4 read-write Delay3 12 4 read-write Delay4 16 4 read-write Delay5 20 4 read-write Delay6 24 4 read-write Delay7 28 4 read-write DRIVER1 I/O Drive Register 1 0x00000114 32 read-write 0x00000000 LINE0 Drive of PIO line 0 0 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE1 Drive of PIO line 1 2 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE2 Drive of PIO line 2 4 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE3 Drive of PIO line 3 6 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE4 Drive of PIO line 4 8 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE5 Drive of PIO line 5 10 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE6 Drive of PIO line 6 12 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE7 Drive of PIO line 7 14 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE8 Drive of PIO line 8 16 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE9 Drive of PIO line 9 18 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE10 Drive of PIO line 10 20 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE11 Drive of PIO line 11 22 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE12 Drive of PIO line 12 24 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE13 Drive of PIO line 13 26 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE14 Drive of PIO line 14 28 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE15 Drive of PIO line 15 30 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 DRIVER2 I/O Drive Register 2 0x00000118 32 read-write 0x00000000 LINE16 Drive of PIO line 16 0 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE17 Drive of PIO line 17 2 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE18 Drive of PIO line 18 4 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE19 Drive of PIO line 19 6 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE20 Drive of PIO line 20 8 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE21 Drive of PIO line 21 10 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE22 Drive of PIO line 22 12 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE23 Drive of PIO line 23 14 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE24 Drive of PIO line 24 16 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE25 Drive of PIO line 25 18 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE26 Drive of PIO line 26 20 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE27 Drive of PIO line 27 22 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE28 Drive of PIO line 28 24 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE29 Drive of PIO line 29 26 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE30 Drive of PIO line 30 28 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE31 Drive of PIO line 31 30 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 PIOD 11004F Parallel Input/Output Controller D PIO PIOD_ 0xFFFFFA00 0 0x200 registers PER PIO Enable Register 0x00000000 32 write-only P0 PIO Enable 0 1 write-only P1 PIO Enable 1 1 write-only P2 PIO Enable 2 1 write-only P3 PIO Enable 3 1 write-only P4 PIO Enable 4 1 write-only P5 PIO Enable 5 1 write-only P6 PIO Enable 6 1 write-only P7 PIO Enable 7 1 write-only P8 PIO Enable 8 1 write-only P9 PIO Enable 9 1 write-only P10 PIO Enable 10 1 write-only P11 PIO Enable 11 1 write-only P12 PIO Enable 12 1 write-only P13 PIO Enable 13 1 write-only P14 PIO Enable 14 1 write-only P15 PIO Enable 15 1 write-only P16 PIO Enable 16 1 write-only P17 PIO Enable 17 1 write-only P18 PIO Enable 18 1 write-only P19 PIO Enable 19 1 write-only P20 PIO Enable 20 1 write-only P21 PIO Enable 21 1 write-only P22 PIO Enable 22 1 write-only P23 PIO Enable 23 1 write-only P24 PIO Enable 24 1 write-only P25 PIO Enable 25 1 write-only P26 PIO Enable 26 1 write-only P27 PIO Enable 27 1 write-only P28 PIO Enable 28 1 write-only P29 PIO Enable 29 1 write-only P30 PIO Enable 30 1 write-only P31 PIO Enable 31 1 write-only PDR PIO Disable Register 0x00000004 32 write-only P0 PIO Disable 0 1 write-only P1 PIO Disable 1 1 write-only P2 PIO Disable 2 1 write-only P3 PIO Disable 3 1 write-only P4 PIO Disable 4 1 write-only P5 PIO Disable 5 1 write-only P6 PIO Disable 6 1 write-only P7 PIO Disable 7 1 write-only P8 PIO Disable 8 1 write-only P9 PIO Disable 9 1 write-only P10 PIO Disable 10 1 write-only P11 PIO Disable 11 1 write-only P12 PIO Disable 12 1 write-only P13 PIO Disable 13 1 write-only P14 PIO Disable 14 1 write-only P15 PIO Disable 15 1 write-only P16 PIO Disable 16 1 write-only P17 PIO Disable 17 1 write-only P18 PIO Disable 18 1 write-only P19 PIO Disable 19 1 write-only P20 PIO Disable 20 1 write-only P21 PIO Disable 21 1 write-only P22 PIO Disable 22 1 write-only P23 PIO Disable 23 1 write-only P24 PIO Disable 24 1 write-only P25 PIO Disable 25 1 write-only P26 PIO Disable 26 1 write-only P27 PIO Disable 27 1 write-only P28 PIO Disable 28 1 write-only P29 PIO Disable 29 1 write-only P30 PIO Disable 30 1 write-only P31 PIO Disable 31 1 write-only PSR PIO Status Register 0x00000008 32 read-only P0 PIO Status 0 1 read-only P1 PIO Status 1 1 read-only P2 PIO Status 2 1 read-only P3 PIO Status 3 1 read-only P4 PIO Status 4 1 read-only P5 PIO Status 5 1 read-only P6 PIO Status 6 1 read-only P7 PIO Status 7 1 read-only P8 PIO Status 8 1 read-only P9 PIO Status 9 1 read-only P10 PIO Status 10 1 read-only P11 PIO Status 11 1 read-only P12 PIO Status 12 1 read-only P13 PIO Status 13 1 read-only P14 PIO Status 14 1 read-only P15 PIO Status 15 1 read-only P16 PIO Status 16 1 read-only P17 PIO Status 17 1 read-only P18 PIO Status 18 1 read-only P19 PIO Status 19 1 read-only P20 PIO Status 20 1 read-only P21 PIO Status 21 1 read-only P22 PIO Status 22 1 read-only P23 PIO Status 23 1 read-only P24 PIO Status 24 1 read-only P25 PIO Status 25 1 read-only P26 PIO Status 26 1 read-only P27 PIO Status 27 1 read-only P28 PIO Status 28 1 read-only P29 PIO Status 29 1 read-only P30 PIO Status 30 1 read-only P31 PIO Status 31 1 read-only OER Output Enable Register 0x00000010 32 write-only P0 Output Enable 0 1 write-only P1 Output Enable 1 1 write-only P2 Output Enable 2 1 write-only P3 Output Enable 3 1 write-only P4 Output Enable 4 1 write-only P5 Output Enable 5 1 write-only P6 Output Enable 6 1 write-only P7 Output Enable 7 1 write-only P8 Output Enable 8 1 write-only P9 Output Enable 9 1 write-only P10 Output Enable 10 1 write-only P11 Output Enable 11 1 write-only P12 Output Enable 12 1 write-only P13 Output Enable 13 1 write-only P14 Output Enable 14 1 write-only P15 Output Enable 15 1 write-only P16 Output Enable 16 1 write-only P17 Output Enable 17 1 write-only P18 Output Enable 18 1 write-only P19 Output Enable 19 1 write-only P20 Output Enable 20 1 write-only P21 Output Enable 21 1 write-only P22 Output Enable 22 1 write-only P23 Output Enable 23 1 write-only P24 Output Enable 24 1 write-only P25 Output Enable 25 1 write-only P26 Output Enable 26 1 write-only P27 Output Enable 27 1 write-only P28 Output Enable 28 1 write-only P29 Output Enable 29 1 write-only P30 Output Enable 30 1 write-only P31 Output Enable 31 1 write-only ODR Output Disable Register 0x00000014 32 write-only P0 Output Disable 0 1 write-only P1 Output Disable 1 1 write-only P2 Output Disable 2 1 write-only P3 Output Disable 3 1 write-only P4 Output Disable 4 1 write-only P5 Output Disable 5 1 write-only P6 Output Disable 6 1 write-only P7 Output Disable 7 1 write-only P8 Output Disable 8 1 write-only P9 Output Disable 9 1 write-only P10 Output Disable 10 1 write-only P11 Output Disable 11 1 write-only P12 Output Disable 12 1 write-only P13 Output Disable 13 1 write-only P14 Output Disable 14 1 write-only P15 Output Disable 15 1 write-only P16 Output Disable 16 1 write-only P17 Output Disable 17 1 write-only P18 Output Disable 18 1 write-only P19 Output Disable 19 1 write-only P20 Output Disable 20 1 write-only P21 Output Disable 21 1 write-only P22 Output Disable 22 1 write-only P23 Output Disable 23 1 write-only P24 Output Disable 24 1 write-only P25 Output Disable 25 1 write-only P26 Output Disable 26 1 write-only P27 Output Disable 27 1 write-only P28 Output Disable 28 1 write-only P29 Output Disable 29 1 write-only P30 Output Disable 30 1 write-only P31 Output Disable 31 1 write-only OSR Output Status Register 0x00000018 32 read-only 0x00000000 P0 Output Status 0 1 read-only P1 Output Status 1 1 read-only P2 Output Status 2 1 read-only P3 Output Status 3 1 read-only P4 Output Status 4 1 read-only P5 Output Status 5 1 read-only P6 Output Status 6 1 read-only P7 Output Status 7 1 read-only P8 Output Status 8 1 read-only P9 Output Status 9 1 read-only P10 Output Status 10 1 read-only P11 Output Status 11 1 read-only P12 Output Status 12 1 read-only P13 Output Status 13 1 read-only P14 Output Status 14 1 read-only P15 Output Status 15 1 read-only P16 Output Status 16 1 read-only P17 Output Status 17 1 read-only P18 Output Status 18 1 read-only P19 Output Status 19 1 read-only P20 Output Status 20 1 read-only P21 Output Status 21 1 read-only P22 Output Status 22 1 read-only P23 Output Status 23 1 read-only P24 Output Status 24 1 read-only P25 Output Status 25 1 read-only P26 Output Status 26 1 read-only P27 Output Status 27 1 read-only P28 Output Status 28 1 read-only P29 Output Status 29 1 read-only P30 Output Status 30 1 read-only P31 Output Status 31 1 read-only IFER Glitch Input Filter Enable Register 0x00000020 32 write-only P0 Input Filter Enable 0 1 write-only P1 Input Filter Enable 1 1 write-only P2 Input Filter Enable 2 1 write-only P3 Input Filter Enable 3 1 write-only P4 Input Filter Enable 4 1 write-only P5 Input Filter Enable 5 1 write-only P6 Input Filter Enable 6 1 write-only P7 Input Filter Enable 7 1 write-only P8 Input Filter Enable 8 1 write-only P9 Input Filter Enable 9 1 write-only P10 Input Filter Enable 10 1 write-only P11 Input Filter Enable 11 1 write-only P12 Input Filter Enable 12 1 write-only P13 Input Filter Enable 13 1 write-only P14 Input Filter Enable 14 1 write-only P15 Input Filter Enable 15 1 write-only P16 Input Filter Enable 16 1 write-only P17 Input Filter Enable 17 1 write-only P18 Input Filter Enable 18 1 write-only P19 Input Filter Enable 19 1 write-only P20 Input Filter Enable 20 1 write-only P21 Input Filter Enable 21 1 write-only P22 Input Filter Enable 22 1 write-only P23 Input Filter Enable 23 1 write-only P24 Input Filter Enable 24 1 write-only P25 Input Filter Enable 25 1 write-only P26 Input Filter Enable 26 1 write-only P27 Input Filter Enable 27 1 write-only P28 Input Filter Enable 28 1 write-only P29 Input Filter Enable 29 1 write-only P30 Input Filter Enable 30 1 write-only P31 Input Filter Enable 31 1 write-only IFDR Glitch Input Filter Disable Register 0x00000024 32 write-only P0 Input Filter Disable 0 1 write-only P1 Input Filter Disable 1 1 write-only P2 Input Filter Disable 2 1 write-only P3 Input Filter Disable 3 1 write-only P4 Input Filter Disable 4 1 write-only P5 Input Filter Disable 5 1 write-only P6 Input Filter Disable 6 1 write-only P7 Input Filter Disable 7 1 write-only P8 Input Filter Disable 8 1 write-only P9 Input Filter Disable 9 1 write-only P10 Input Filter Disable 10 1 write-only P11 Input Filter Disable 11 1 write-only P12 Input Filter Disable 12 1 write-only P13 Input Filter Disable 13 1 write-only P14 Input Filter Disable 14 1 write-only P15 Input Filter Disable 15 1 write-only P16 Input Filter Disable 16 1 write-only P17 Input Filter Disable 17 1 write-only P18 Input Filter Disable 18 1 write-only P19 Input Filter Disable 19 1 write-only P20 Input Filter Disable 20 1 write-only P21 Input Filter Disable 21 1 write-only P22 Input Filter Disable 22 1 write-only P23 Input Filter Disable 23 1 write-only P24 Input Filter Disable 24 1 write-only P25 Input Filter Disable 25 1 write-only P26 Input Filter Disable 26 1 write-only P27 Input Filter Disable 27 1 write-only P28 Input Filter Disable 28 1 write-only P29 Input Filter Disable 29 1 write-only P30 Input Filter Disable 30 1 write-only P31 Input Filter Disable 31 1 write-only IFSR Glitch Input Filter Status Register 0x00000028 32 read-only 0x00000000 P0 Input Filer Status 0 1 read-only P1 Input Filer Status 1 1 read-only P2 Input Filer Status 2 1 read-only P3 Input Filer Status 3 1 read-only P4 Input Filer Status 4 1 read-only P5 Input Filer Status 5 1 read-only P6 Input Filer Status 6 1 read-only P7 Input Filer Status 7 1 read-only P8 Input Filer Status 8 1 read-only P9 Input Filer Status 9 1 read-only P10 Input Filer Status 10 1 read-only P11 Input Filer Status 11 1 read-only P12 Input Filer Status 12 1 read-only P13 Input Filer Status 13 1 read-only P14 Input Filer Status 14 1 read-only P15 Input Filer Status 15 1 read-only P16 Input Filer Status 16 1 read-only P17 Input Filer Status 17 1 read-only P18 Input Filer Status 18 1 read-only P19 Input Filer Status 19 1 read-only P20 Input Filer Status 20 1 read-only P21 Input Filer Status 21 1 read-only P22 Input Filer Status 22 1 read-only P23 Input Filer Status 23 1 read-only P24 Input Filer Status 24 1 read-only P25 Input Filer Status 25 1 read-only P26 Input Filer Status 26 1 read-only P27 Input Filer Status 27 1 read-only P28 Input Filer Status 28 1 read-only P29 Input Filer Status 29 1 read-only P30 Input Filer Status 30 1 read-only P31 Input Filer Status 31 1 read-only SODR Set Output Data Register 0x00000030 32 write-only P0 Set Output Data 0 1 write-only P1 Set Output Data 1 1 write-only P2 Set Output Data 2 1 write-only P3 Set Output Data 3 1 write-only P4 Set Output Data 4 1 write-only P5 Set Output Data 5 1 write-only P6 Set Output Data 6 1 write-only P7 Set Output Data 7 1 write-only P8 Set Output Data 8 1 write-only P9 Set Output Data 9 1 write-only P10 Set Output Data 10 1 write-only P11 Set Output Data 11 1 write-only P12 Set Output Data 12 1 write-only P13 Set Output Data 13 1 write-only P14 Set Output Data 14 1 write-only P15 Set Output Data 15 1 write-only P16 Set Output Data 16 1 write-only P17 Set Output Data 17 1 write-only P18 Set Output Data 18 1 write-only P19 Set Output Data 19 1 write-only P20 Set Output Data 20 1 write-only P21 Set Output Data 21 1 write-only P22 Set Output Data 22 1 write-only P23 Set Output Data 23 1 write-only P24 Set Output Data 24 1 write-only P25 Set Output Data 25 1 write-only P26 Set Output Data 26 1 write-only P27 Set Output Data 27 1 write-only P28 Set Output Data 28 1 write-only P29 Set Output Data 29 1 write-only P30 Set Output Data 30 1 write-only P31 Set Output Data 31 1 write-only CODR Clear Output Data Register 0x00000034 32 write-only P0 Clear Output Data 0 1 write-only P1 Clear Output Data 1 1 write-only P2 Clear Output Data 2 1 write-only P3 Clear Output Data 3 1 write-only P4 Clear Output Data 4 1 write-only P5 Clear Output Data 5 1 write-only P6 Clear Output Data 6 1 write-only P7 Clear Output Data 7 1 write-only P8 Clear Output Data 8 1 write-only P9 Clear Output Data 9 1 write-only P10 Clear Output Data 10 1 write-only P11 Clear Output Data 11 1 write-only P12 Clear Output Data 12 1 write-only P13 Clear Output Data 13 1 write-only P14 Clear Output Data 14 1 write-only P15 Clear Output Data 15 1 write-only P16 Clear Output Data 16 1 write-only P17 Clear Output Data 17 1 write-only P18 Clear Output Data 18 1 write-only P19 Clear Output Data 19 1 write-only P20 Clear Output Data 20 1 write-only P21 Clear Output Data 21 1 write-only P22 Clear Output Data 22 1 write-only P23 Clear Output Data 23 1 write-only P24 Clear Output Data 24 1 write-only P25 Clear Output Data 25 1 write-only P26 Clear Output Data 26 1 write-only P27 Clear Output Data 27 1 write-only P28 Clear Output Data 28 1 write-only P29 Clear Output Data 29 1 write-only P30 Clear Output Data 30 1 write-only P31 Clear Output Data 31 1 write-only ODSR Output Data Status Register 0x00000038 32 read-write P0 Output Data Status 0 1 read-write P1 Output Data Status 1 1 read-write P2 Output Data Status 2 1 read-write P3 Output Data Status 3 1 read-write P4 Output Data Status 4 1 read-write P5 Output Data Status 5 1 read-write P6 Output Data Status 6 1 read-write P7 Output Data Status 7 1 read-write P8 Output Data Status 8 1 read-write P9 Output Data Status 9 1 read-write P10 Output Data Status 10 1 read-write P11 Output Data Status 11 1 read-write P12 Output Data Status 12 1 read-write P13 Output Data Status 13 1 read-write P14 Output Data Status 14 1 read-write P15 Output Data Status 15 1 read-write P16 Output Data Status 16 1 read-write P17 Output Data Status 17 1 read-write P18 Output Data Status 18 1 read-write P19 Output Data Status 19 1 read-write P20 Output Data Status 20 1 read-write P21 Output Data Status 21 1 read-write P22 Output Data Status 22 1 read-write P23 Output Data Status 23 1 read-write P24 Output Data Status 24 1 read-write P25 Output Data Status 25 1 read-write P26 Output Data Status 26 1 read-write P27 Output Data Status 27 1 read-write P28 Output Data Status 28 1 read-write P29 Output Data Status 29 1 read-write P30 Output Data Status 30 1 read-write P31 Output Data Status 31 1 read-write PDSR Pin Data Status Register 0x0000003C 32 read-only P0 Output Data Status 0 1 read-only P1 Output Data Status 1 1 read-only P2 Output Data Status 2 1 read-only P3 Output Data Status 3 1 read-only P4 Output Data Status 4 1 read-only P5 Output Data Status 5 1 read-only P6 Output Data Status 6 1 read-only P7 Output Data Status 7 1 read-only P8 Output Data Status 8 1 read-only P9 Output Data Status 9 1 read-only P10 Output Data Status 10 1 read-only P11 Output Data Status 11 1 read-only P12 Output Data Status 12 1 read-only P13 Output Data Status 13 1 read-only P14 Output Data Status 14 1 read-only P15 Output Data Status 15 1 read-only P16 Output Data Status 16 1 read-only P17 Output Data Status 17 1 read-only P18 Output Data Status 18 1 read-only P19 Output Data Status 19 1 read-only P20 Output Data Status 20 1 read-only P21 Output Data Status 21 1 read-only P22 Output Data Status 22 1 read-only P23 Output Data Status 23 1 read-only P24 Output Data Status 24 1 read-only P25 Output Data Status 25 1 read-only P26 Output Data Status 26 1 read-only P27 Output Data Status 27 1 read-only P28 Output Data Status 28 1 read-only P29 Output Data Status 29 1 read-only P30 Output Data Status 30 1 read-only P31 Output Data Status 31 1 read-only IER Interrupt Enable Register 0x00000040 32 write-only P0 Input Change Interrupt Enable 0 1 write-only P1 Input Change Interrupt Enable 1 1 write-only P2 Input Change Interrupt Enable 2 1 write-only P3 Input Change Interrupt Enable 3 1 write-only P4 Input Change Interrupt Enable 4 1 write-only P5 Input Change Interrupt Enable 5 1 write-only P6 Input Change Interrupt Enable 6 1 write-only P7 Input Change Interrupt Enable 7 1 write-only P8 Input Change Interrupt Enable 8 1 write-only P9 Input Change Interrupt Enable 9 1 write-only P10 Input Change Interrupt Enable 10 1 write-only P11 Input Change Interrupt Enable 11 1 write-only P12 Input Change Interrupt Enable 12 1 write-only P13 Input Change Interrupt Enable 13 1 write-only P14 Input Change Interrupt Enable 14 1 write-only P15 Input Change Interrupt Enable 15 1 write-only P16 Input Change Interrupt Enable 16 1 write-only P17 Input Change Interrupt Enable 17 1 write-only P18 Input Change Interrupt Enable 18 1 write-only P19 Input Change Interrupt Enable 19 1 write-only P20 Input Change Interrupt Enable 20 1 write-only P21 Input Change Interrupt Enable 21 1 write-only P22 Input Change Interrupt Enable 22 1 write-only P23 Input Change Interrupt Enable 23 1 write-only P24 Input Change Interrupt Enable 24 1 write-only P25 Input Change Interrupt Enable 25 1 write-only P26 Input Change Interrupt Enable 26 1 write-only P27 Input Change Interrupt Enable 27 1 write-only P28 Input Change Interrupt Enable 28 1 write-only P29 Input Change Interrupt Enable 29 1 write-only P30 Input Change Interrupt Enable 30 1 write-only P31 Input Change Interrupt Enable 31 1 write-only IDR Interrupt Disable Register 0x00000044 32 write-only P0 Input Change Interrupt Disable 0 1 write-only P1 Input Change Interrupt Disable 1 1 write-only P2 Input Change Interrupt Disable 2 1 write-only P3 Input Change Interrupt Disable 3 1 write-only P4 Input Change Interrupt Disable 4 1 write-only P5 Input Change Interrupt Disable 5 1 write-only P6 Input Change Interrupt Disable 6 1 write-only P7 Input Change Interrupt Disable 7 1 write-only P8 Input Change Interrupt Disable 8 1 write-only P9 Input Change Interrupt Disable 9 1 write-only P10 Input Change Interrupt Disable 10 1 write-only P11 Input Change Interrupt Disable 11 1 write-only P12 Input Change Interrupt Disable 12 1 write-only P13 Input Change Interrupt Disable 13 1 write-only P14 Input Change Interrupt Disable 14 1 write-only P15 Input Change Interrupt Disable 15 1 write-only P16 Input Change Interrupt Disable 16 1 write-only P17 Input Change Interrupt Disable 17 1 write-only P18 Input Change Interrupt Disable 18 1 write-only P19 Input Change Interrupt Disable 19 1 write-only P20 Input Change Interrupt Disable 20 1 write-only P21 Input Change Interrupt Disable 21 1 write-only P22 Input Change Interrupt Disable 22 1 write-only P23 Input Change Interrupt Disable 23 1 write-only P24 Input Change Interrupt Disable 24 1 write-only P25 Input Change Interrupt Disable 25 1 write-only P26 Input Change Interrupt Disable 26 1 write-only P27 Input Change Interrupt Disable 27 1 write-only P28 Input Change Interrupt Disable 28 1 write-only P29 Input Change Interrupt Disable 29 1 write-only P30 Input Change Interrupt Disable 30 1 write-only P31 Input Change Interrupt Disable 31 1 write-only IMR Interrupt Mask Register 0x00000048 32 read-only 0x00000000 P0 Input Change Interrupt Mask 0 1 read-only P1 Input Change Interrupt Mask 1 1 read-only P2 Input Change Interrupt Mask 2 1 read-only P3 Input Change Interrupt Mask 3 1 read-only P4 Input Change Interrupt Mask 4 1 read-only P5 Input Change Interrupt Mask 5 1 read-only P6 Input Change Interrupt Mask 6 1 read-only P7 Input Change Interrupt Mask 7 1 read-only P8 Input Change Interrupt Mask 8 1 read-only P9 Input Change Interrupt Mask 9 1 read-only P10 Input Change Interrupt Mask 10 1 read-only P11 Input Change Interrupt Mask 11 1 read-only P12 Input Change Interrupt Mask 12 1 read-only P13 Input Change Interrupt Mask 13 1 read-only P14 Input Change Interrupt Mask 14 1 read-only P15 Input Change Interrupt Mask 15 1 read-only P16 Input Change Interrupt Mask 16 1 read-only P17 Input Change Interrupt Mask 17 1 read-only P18 Input Change Interrupt Mask 18 1 read-only P19 Input Change Interrupt Mask 19 1 read-only P20 Input Change Interrupt Mask 20 1 read-only P21 Input Change Interrupt Mask 21 1 read-only P22 Input Change Interrupt Mask 22 1 read-only P23 Input Change Interrupt Mask 23 1 read-only P24 Input Change Interrupt Mask 24 1 read-only P25 Input Change Interrupt Mask 25 1 read-only P26 Input Change Interrupt Mask 26 1 read-only P27 Input Change Interrupt Mask 27 1 read-only P28 Input Change Interrupt Mask 28 1 read-only P29 Input Change Interrupt Mask 29 1 read-only P30 Input Change Interrupt Mask 30 1 read-only P31 Input Change Interrupt Mask 31 1 read-only ISR Interrupt Status Register 0x0000004C 32 read-only 0x00000000 P0 Input Change Interrupt Status 0 1 read-only P1 Input Change Interrupt Status 1 1 read-only P2 Input Change Interrupt Status 2 1 read-only P3 Input Change Interrupt Status 3 1 read-only P4 Input Change Interrupt Status 4 1 read-only P5 Input Change Interrupt Status 5 1 read-only P6 Input Change Interrupt Status 6 1 read-only P7 Input Change Interrupt Status 7 1 read-only P8 Input Change Interrupt Status 8 1 read-only P9 Input Change Interrupt Status 9 1 read-only P10 Input Change Interrupt Status 10 1 read-only P11 Input Change Interrupt Status 11 1 read-only P12 Input Change Interrupt Status 12 1 read-only P13 Input Change Interrupt Status 13 1 read-only P14 Input Change Interrupt Status 14 1 read-only P15 Input Change Interrupt Status 15 1 read-only P16 Input Change Interrupt Status 16 1 read-only P17 Input Change Interrupt Status 17 1 read-only P18 Input Change Interrupt Status 18 1 read-only P19 Input Change Interrupt Status 19 1 read-only P20 Input Change Interrupt Status 20 1 read-only P21 Input Change Interrupt Status 21 1 read-only P22 Input Change Interrupt Status 22 1 read-only P23 Input Change Interrupt Status 23 1 read-only P24 Input Change Interrupt Status 24 1 read-only P25 Input Change Interrupt Status 25 1 read-only P26 Input Change Interrupt Status 26 1 read-only P27 Input Change Interrupt Status 27 1 read-only P28 Input Change Interrupt Status 28 1 read-only P29 Input Change Interrupt Status 29 1 read-only P30 Input Change Interrupt Status 30 1 read-only P31 Input Change Interrupt Status 31 1 read-only MDER Multi-driver Enable Register 0x00000050 32 write-only P0 Multi Drive Enable. 0 1 write-only P1 Multi Drive Enable. 1 1 write-only P2 Multi Drive Enable. 2 1 write-only P3 Multi Drive Enable. 3 1 write-only P4 Multi Drive Enable. 4 1 write-only P5 Multi Drive Enable. 5 1 write-only P6 Multi Drive Enable. 6 1 write-only P7 Multi Drive Enable. 7 1 write-only P8 Multi Drive Enable. 8 1 write-only P9 Multi Drive Enable. 9 1 write-only P10 Multi Drive Enable. 10 1 write-only P11 Multi Drive Enable. 11 1 write-only P12 Multi Drive Enable. 12 1 write-only P13 Multi Drive Enable. 13 1 write-only P14 Multi Drive Enable. 14 1 write-only P15 Multi Drive Enable. 15 1 write-only P16 Multi Drive Enable. 16 1 write-only P17 Multi Drive Enable. 17 1 write-only P18 Multi Drive Enable. 18 1 write-only P19 Multi Drive Enable. 19 1 write-only P20 Multi Drive Enable. 20 1 write-only P21 Multi Drive Enable. 21 1 write-only P22 Multi Drive Enable. 22 1 write-only P23 Multi Drive Enable. 23 1 write-only P24 Multi Drive Enable. 24 1 write-only P25 Multi Drive Enable. 25 1 write-only P26 Multi Drive Enable. 26 1 write-only P27 Multi Drive Enable. 27 1 write-only P28 Multi Drive Enable. 28 1 write-only P29 Multi Drive Enable. 29 1 write-only P30 Multi Drive Enable. 30 1 write-only P31 Multi Drive Enable. 31 1 write-only MDDR Multi-driver Disable Register 0x00000054 32 write-only P0 Multi Drive Disable. 0 1 write-only P1 Multi Drive Disable. 1 1 write-only P2 Multi Drive Disable. 2 1 write-only P3 Multi Drive Disable. 3 1 write-only P4 Multi Drive Disable. 4 1 write-only P5 Multi Drive Disable. 5 1 write-only P6 Multi Drive Disable. 6 1 write-only P7 Multi Drive Disable. 7 1 write-only P8 Multi Drive Disable. 8 1 write-only P9 Multi Drive Disable. 9 1 write-only P10 Multi Drive Disable. 10 1 write-only P11 Multi Drive Disable. 11 1 write-only P12 Multi Drive Disable. 12 1 write-only P13 Multi Drive Disable. 13 1 write-only P14 Multi Drive Disable. 14 1 write-only P15 Multi Drive Disable. 15 1 write-only P16 Multi Drive Disable. 16 1 write-only P17 Multi Drive Disable. 17 1 write-only P18 Multi Drive Disable. 18 1 write-only P19 Multi Drive Disable. 19 1 write-only P20 Multi Drive Disable. 20 1 write-only P21 Multi Drive Disable. 21 1 write-only P22 Multi Drive Disable. 22 1 write-only P23 Multi Drive Disable. 23 1 write-only P24 Multi Drive Disable. 24 1 write-only P25 Multi Drive Disable. 25 1 write-only P26 Multi Drive Disable. 26 1 write-only P27 Multi Drive Disable. 27 1 write-only P28 Multi Drive Disable. 28 1 write-only P29 Multi Drive Disable. 29 1 write-only P30 Multi Drive Disable. 30 1 write-only P31 Multi Drive Disable. 31 1 write-only MDSR Multi-driver Status Register 0x00000058 32 read-only 0x00000000 P0 Multi Drive Status. 0 1 read-only P1 Multi Drive Status. 1 1 read-only P2 Multi Drive Status. 2 1 read-only P3 Multi Drive Status. 3 1 read-only P4 Multi Drive Status. 4 1 read-only P5 Multi Drive Status. 5 1 read-only P6 Multi Drive Status. 6 1 read-only P7 Multi Drive Status. 7 1 read-only P8 Multi Drive Status. 8 1 read-only P9 Multi Drive Status. 9 1 read-only P10 Multi Drive Status. 10 1 read-only P11 Multi Drive Status. 11 1 read-only P12 Multi Drive Status. 12 1 read-only P13 Multi Drive Status. 13 1 read-only P14 Multi Drive Status. 14 1 read-only P15 Multi Drive Status. 15 1 read-only P16 Multi Drive Status. 16 1 read-only P17 Multi Drive Status. 17 1 read-only P18 Multi Drive Status. 18 1 read-only P19 Multi Drive Status. 19 1 read-only P20 Multi Drive Status. 20 1 read-only P21 Multi Drive Status. 21 1 read-only P22 Multi Drive Status. 22 1 read-only P23 Multi Drive Status. 23 1 read-only P24 Multi Drive Status. 24 1 read-only P25 Multi Drive Status. 25 1 read-only P26 Multi Drive Status. 26 1 read-only P27 Multi Drive Status. 27 1 read-only P28 Multi Drive Status. 28 1 read-only P29 Multi Drive Status. 29 1 read-only P30 Multi Drive Status. 30 1 read-only P31 Multi Drive Status. 31 1 read-only PUDR Pull-up Disable Register 0x00000060 32 write-only P0 Pull Up Disable. 0 1 write-only P1 Pull Up Disable. 1 1 write-only P2 Pull Up Disable. 2 1 write-only P3 Pull Up Disable. 3 1 write-only P4 Pull Up Disable. 4 1 write-only P5 Pull Up Disable. 5 1 write-only P6 Pull Up Disable. 6 1 write-only P7 Pull Up Disable. 7 1 write-only P8 Pull Up Disable. 8 1 write-only P9 Pull Up Disable. 9 1 write-only P10 Pull Up Disable. 10 1 write-only P11 Pull Up Disable. 11 1 write-only P12 Pull Up Disable. 12 1 write-only P13 Pull Up Disable. 13 1 write-only P14 Pull Up Disable. 14 1 write-only P15 Pull Up Disable. 15 1 write-only P16 Pull Up Disable. 16 1 write-only P17 Pull Up Disable. 17 1 write-only P18 Pull Up Disable. 18 1 write-only P19 Pull Up Disable. 19 1 write-only P20 Pull Up Disable. 20 1 write-only P21 Pull Up Disable. 21 1 write-only P22 Pull Up Disable. 22 1 write-only P23 Pull Up Disable. 23 1 write-only P24 Pull Up Disable. 24 1 write-only P25 Pull Up Disable. 25 1 write-only P26 Pull Up Disable. 26 1 write-only P27 Pull Up Disable. 27 1 write-only P28 Pull Up Disable. 28 1 write-only P29 Pull Up Disable. 29 1 write-only P30 Pull Up Disable. 30 1 write-only P31 Pull Up Disable. 31 1 write-only PUER Pull-up Enable Register 0x00000064 32 write-only P0 Pull Up Enable. 0 1 write-only P1 Pull Up Enable. 1 1 write-only P2 Pull Up Enable. 2 1 write-only P3 Pull Up Enable. 3 1 write-only P4 Pull Up Enable. 4 1 write-only P5 Pull Up Enable. 5 1 write-only P6 Pull Up Enable. 6 1 write-only P7 Pull Up Enable. 7 1 write-only P8 Pull Up Enable. 8 1 write-only P9 Pull Up Enable. 9 1 write-only P10 Pull Up Enable. 10 1 write-only P11 Pull Up Enable. 11 1 write-only P12 Pull Up Enable. 12 1 write-only P13 Pull Up Enable. 13 1 write-only P14 Pull Up Enable. 14 1 write-only P15 Pull Up Enable. 15 1 write-only P16 Pull Up Enable. 16 1 write-only P17 Pull Up Enable. 17 1 write-only P18 Pull Up Enable. 18 1 write-only P19 Pull Up Enable. 19 1 write-only P20 Pull Up Enable. 20 1 write-only P21 Pull Up Enable. 21 1 write-only P22 Pull Up Enable. 22 1 write-only P23 Pull Up Enable. 23 1 write-only P24 Pull Up Enable. 24 1 write-only P25 Pull Up Enable. 25 1 write-only P26 Pull Up Enable. 26 1 write-only P27 Pull Up Enable. 27 1 write-only P28 Pull Up Enable. 28 1 write-only P29 Pull Up Enable. 29 1 write-only P30 Pull Up Enable. 30 1 write-only P31 Pull Up Enable. 31 1 write-only PUSR Pad Pull-up Status Register 0x00000068 32 read-only P0 Pull Up Status. 0 1 read-only P1 Pull Up Status. 1 1 read-only P2 Pull Up Status. 2 1 read-only P3 Pull Up Status. 3 1 read-only P4 Pull Up Status. 4 1 read-only P5 Pull Up Status. 5 1 read-only P6 Pull Up Status. 6 1 read-only P7 Pull Up Status. 7 1 read-only P8 Pull Up Status. 8 1 read-only P9 Pull Up Status. 9 1 read-only P10 Pull Up Status. 10 1 read-only P11 Pull Up Status. 11 1 read-only P12 Pull Up Status. 12 1 read-only P13 Pull Up Status. 13 1 read-only P14 Pull Up Status. 14 1 read-only P15 Pull Up Status. 15 1 read-only P16 Pull Up Status. 16 1 read-only P17 Pull Up Status. 17 1 read-only P18 Pull Up Status. 18 1 read-only P19 Pull Up Status. 19 1 read-only P20 Pull Up Status. 20 1 read-only P21 Pull Up Status. 21 1 read-only P22 Pull Up Status. 22 1 read-only P23 Pull Up Status. 23 1 read-only P24 Pull Up Status. 24 1 read-only P25 Pull Up Status. 25 1 read-only P26 Pull Up Status. 26 1 read-only P27 Pull Up Status. 27 1 read-only P28 Pull Up Status. 28 1 read-only P29 Pull Up Status. 29 1 read-only P30 Pull Up Status. 30 1 read-only P31 Pull Up Status. 31 1 read-only 2 4 0-1 ABCDSR[%s] Peripheral Select Register 0x00000070 32 read-write P0 Peripheral Select. 0 1 read-write P1 Peripheral Select. 1 1 read-write P2 Peripheral Select. 2 1 read-write P3 Peripheral Select. 3 1 read-write P4 Peripheral Select. 4 1 read-write P5 Peripheral Select. 5 1 read-write P6 Peripheral Select. 6 1 read-write P7 Peripheral Select. 7 1 read-write P8 Peripheral Select. 8 1 read-write P9 Peripheral Select. 9 1 read-write P10 Peripheral Select. 10 1 read-write P11 Peripheral Select. 11 1 read-write P12 Peripheral Select. 12 1 read-write P13 Peripheral Select. 13 1 read-write P14 Peripheral Select. 14 1 read-write P15 Peripheral Select. 15 1 read-write P16 Peripheral Select. 16 1 read-write P17 Peripheral Select. 17 1 read-write P18 Peripheral Select. 18 1 read-write P19 Peripheral Select. 19 1 read-write P20 Peripheral Select. 20 1 read-write P21 Peripheral Select. 21 1 read-write P22 Peripheral Select. 22 1 read-write P23 Peripheral Select. 23 1 read-write P24 Peripheral Select. 24 1 read-write P25 Peripheral Select. 25 1 read-write P26 Peripheral Select. 26 1 read-write P27 Peripheral Select. 27 1 read-write P28 Peripheral Select. 28 1 read-write P29 Peripheral Select. 29 1 read-write P30 Peripheral Select. 30 1 read-write P31 Peripheral Select. 31 1 read-write IFSCDR Input Filter Slow Clock Disable Register 0x00000080 32 write-only P0 PIO Clock Glitch Filtering Select. 0 1 write-only P1 PIO Clock Glitch Filtering Select. 1 1 write-only P2 PIO Clock Glitch Filtering Select. 2 1 write-only P3 PIO Clock Glitch Filtering Select. 3 1 write-only P4 PIO Clock Glitch Filtering Select. 4 1 write-only P5 PIO Clock Glitch Filtering Select. 5 1 write-only P6 PIO Clock Glitch Filtering Select. 6 1 write-only P7 PIO Clock Glitch Filtering Select. 7 1 write-only P8 PIO Clock Glitch Filtering Select. 8 1 write-only P9 PIO Clock Glitch Filtering Select. 9 1 write-only P10 PIO Clock Glitch Filtering Select. 10 1 write-only P11 PIO Clock Glitch Filtering Select. 11 1 write-only P12 PIO Clock Glitch Filtering Select. 12 1 write-only P13 PIO Clock Glitch Filtering Select. 13 1 write-only P14 PIO Clock Glitch Filtering Select. 14 1 write-only P15 PIO Clock Glitch Filtering Select. 15 1 write-only P16 PIO Clock Glitch Filtering Select. 16 1 write-only P17 PIO Clock Glitch Filtering Select. 17 1 write-only P18 PIO Clock Glitch Filtering Select. 18 1 write-only P19 PIO Clock Glitch Filtering Select. 19 1 write-only P20 PIO Clock Glitch Filtering Select. 20 1 write-only P21 PIO Clock Glitch Filtering Select. 21 1 write-only P22 PIO Clock Glitch Filtering Select. 22 1 write-only P23 PIO Clock Glitch Filtering Select. 23 1 write-only P24 PIO Clock Glitch Filtering Select. 24 1 write-only P25 PIO Clock Glitch Filtering Select. 25 1 write-only P26 PIO Clock Glitch Filtering Select. 26 1 write-only P27 PIO Clock Glitch Filtering Select. 27 1 write-only P28 PIO Clock Glitch Filtering Select. 28 1 write-only P29 PIO Clock Glitch Filtering Select. 29 1 write-only P30 PIO Clock Glitch Filtering Select. 30 1 write-only P31 PIO Clock Glitch Filtering Select. 31 1 write-only IFSCER Input Filter Slow Clock Enable Register 0x00000084 32 write-only P0 Debouncing Filtering Select. 0 1 write-only P1 Debouncing Filtering Select. 1 1 write-only P2 Debouncing Filtering Select. 2 1 write-only P3 Debouncing Filtering Select. 3 1 write-only P4 Debouncing Filtering Select. 4 1 write-only P5 Debouncing Filtering Select. 5 1 write-only P6 Debouncing Filtering Select. 6 1 write-only P7 Debouncing Filtering Select. 7 1 write-only P8 Debouncing Filtering Select. 8 1 write-only P9 Debouncing Filtering Select. 9 1 write-only P10 Debouncing Filtering Select. 10 1 write-only P11 Debouncing Filtering Select. 11 1 write-only P12 Debouncing Filtering Select. 12 1 write-only P13 Debouncing Filtering Select. 13 1 write-only P14 Debouncing Filtering Select. 14 1 write-only P15 Debouncing Filtering Select. 15 1 write-only P16 Debouncing Filtering Select. 16 1 write-only P17 Debouncing Filtering Select. 17 1 write-only P18 Debouncing Filtering Select. 18 1 write-only P19 Debouncing Filtering Select. 19 1 write-only P20 Debouncing Filtering Select. 20 1 write-only P21 Debouncing Filtering Select. 21 1 write-only P22 Debouncing Filtering Select. 22 1 write-only P23 Debouncing Filtering Select. 23 1 write-only P24 Debouncing Filtering Select. 24 1 write-only P25 Debouncing Filtering Select. 25 1 write-only P26 Debouncing Filtering Select. 26 1 write-only P27 Debouncing Filtering Select. 27 1 write-only P28 Debouncing Filtering Select. 28 1 write-only P29 Debouncing Filtering Select. 29 1 write-only P30 Debouncing Filtering Select. 30 1 write-only P31 Debouncing Filtering Select. 31 1 write-only IFSCSR Input Filter Slow Clock Status Register 0x00000088 32 read-only 0x00000000 P0 Glitch or Debouncing Filter Selection Status 0 1 read-only P1 Glitch or Debouncing Filter Selection Status 1 1 read-only P2 Glitch or Debouncing Filter Selection Status 2 1 read-only P3 Glitch or Debouncing Filter Selection Status 3 1 read-only P4 Glitch or Debouncing Filter Selection Status 4 1 read-only P5 Glitch or Debouncing Filter Selection Status 5 1 read-only P6 Glitch or Debouncing Filter Selection Status 6 1 read-only P7 Glitch or Debouncing Filter Selection Status 7 1 read-only P8 Glitch or Debouncing Filter Selection Status 8 1 read-only P9 Glitch or Debouncing Filter Selection Status 9 1 read-only P10 Glitch or Debouncing Filter Selection Status 10 1 read-only P11 Glitch or Debouncing Filter Selection Status 11 1 read-only P12 Glitch or Debouncing Filter Selection Status 12 1 read-only P13 Glitch or Debouncing Filter Selection Status 13 1 read-only P14 Glitch or Debouncing Filter Selection Status 14 1 read-only P15 Glitch or Debouncing Filter Selection Status 15 1 read-only P16 Glitch or Debouncing Filter Selection Status 16 1 read-only P17 Glitch or Debouncing Filter Selection Status 17 1 read-only P18 Glitch or Debouncing Filter Selection Status 18 1 read-only P19 Glitch or Debouncing Filter Selection Status 19 1 read-only P20 Glitch or Debouncing Filter Selection Status 20 1 read-only P21 Glitch or Debouncing Filter Selection Status 21 1 read-only P22 Glitch or Debouncing Filter Selection Status 22 1 read-only P23 Glitch or Debouncing Filter Selection Status 23 1 read-only P24 Glitch or Debouncing Filter Selection Status 24 1 read-only P25 Glitch or Debouncing Filter Selection Status 25 1 read-only P26 Glitch or Debouncing Filter Selection Status 26 1 read-only P27 Glitch or Debouncing Filter Selection Status 27 1 read-only P28 Glitch or Debouncing Filter Selection Status 28 1 read-only P29 Glitch or Debouncing Filter Selection Status 29 1 read-only P30 Glitch or Debouncing Filter Selection Status 30 1 read-only P31 Glitch or Debouncing Filter Selection Status 31 1 read-only SCDR Slow Clock Divider Debouncing Register 0x0000008C 32 read-write 0x00000000 DIV 0 14 read-write PPDDR Pad Pull-down Disable Register 0x00000090 32 write-only P0 Pull Down Disable. 0 1 write-only P1 Pull Down Disable. 1 1 write-only P2 Pull Down Disable. 2 1 write-only P3 Pull Down Disable. 3 1 write-only P4 Pull Down Disable. 4 1 write-only P5 Pull Down Disable. 5 1 write-only P6 Pull Down Disable. 6 1 write-only P7 Pull Down Disable. 7 1 write-only P8 Pull Down Disable. 8 1 write-only P9 Pull Down Disable. 9 1 write-only P10 Pull Down Disable. 10 1 write-only P11 Pull Down Disable. 11 1 write-only P12 Pull Down Disable. 12 1 write-only P13 Pull Down Disable. 13 1 write-only P14 Pull Down Disable. 14 1 write-only P15 Pull Down Disable. 15 1 write-only P16 Pull Down Disable. 16 1 write-only P17 Pull Down Disable. 17 1 write-only P18 Pull Down Disable. 18 1 write-only P19 Pull Down Disable. 19 1 write-only P20 Pull Down Disable. 20 1 write-only P21 Pull Down Disable. 21 1 write-only P22 Pull Down Disable. 22 1 write-only P23 Pull Down Disable. 23 1 write-only P24 Pull Down Disable. 24 1 write-only P25 Pull Down Disable. 25 1 write-only P26 Pull Down Disable. 26 1 write-only P27 Pull Down Disable. 27 1 write-only P28 Pull Down Disable. 28 1 write-only P29 Pull Down Disable. 29 1 write-only P30 Pull Down Disable. 30 1 write-only P31 Pull Down Disable. 31 1 write-only PPDER Pad Pull-down Enable Register 0x00000094 32 write-only P0 Pull Down Enable. 0 1 write-only P1 Pull Down Enable. 1 1 write-only P2 Pull Down Enable. 2 1 write-only P3 Pull Down Enable. 3 1 write-only P4 Pull Down Enable. 4 1 write-only P5 Pull Down Enable. 5 1 write-only P6 Pull Down Enable. 6 1 write-only P7 Pull Down Enable. 7 1 write-only P8 Pull Down Enable. 8 1 write-only P9 Pull Down Enable. 9 1 write-only P10 Pull Down Enable. 10 1 write-only P11 Pull Down Enable. 11 1 write-only P12 Pull Down Enable. 12 1 write-only P13 Pull Down Enable. 13 1 write-only P14 Pull Down Enable. 14 1 write-only P15 Pull Down Enable. 15 1 write-only P16 Pull Down Enable. 16 1 write-only P17 Pull Down Enable. 17 1 write-only P18 Pull Down Enable. 18 1 write-only P19 Pull Down Enable. 19 1 write-only P20 Pull Down Enable. 20 1 write-only P21 Pull Down Enable. 21 1 write-only P22 Pull Down Enable. 22 1 write-only P23 Pull Down Enable. 23 1 write-only P24 Pull Down Enable. 24 1 write-only P25 Pull Down Enable. 25 1 write-only P26 Pull Down Enable. 26 1 write-only P27 Pull Down Enable. 27 1 write-only P28 Pull Down Enable. 28 1 write-only P29 Pull Down Enable. 29 1 write-only P30 Pull Down Enable. 30 1 write-only P31 Pull Down Enable. 31 1 write-only PPDSR Pad Pull-down Status Register 0x00000098 32 read-only P0 Pull Down Status. 0 1 read-only P1 Pull Down Status. 1 1 read-only P2 Pull Down Status. 2 1 read-only P3 Pull Down Status. 3 1 read-only P4 Pull Down Status. 4 1 read-only P5 Pull Down Status. 5 1 read-only P6 Pull Down Status. 6 1 read-only P7 Pull Down Status. 7 1 read-only P8 Pull Down Status. 8 1 read-only P9 Pull Down Status. 9 1 read-only P10 Pull Down Status. 10 1 read-only P11 Pull Down Status. 11 1 read-only P12 Pull Down Status. 12 1 read-only P13 Pull Down Status. 13 1 read-only P14 Pull Down Status. 14 1 read-only P15 Pull Down Status. 15 1 read-only P16 Pull Down Status. 16 1 read-only P17 Pull Down Status. 17 1 read-only P18 Pull Down Status. 18 1 read-only P19 Pull Down Status. 19 1 read-only P20 Pull Down Status. 20 1 read-only P21 Pull Down Status. 21 1 read-only P22 Pull Down Status. 22 1 read-only P23 Pull Down Status. 23 1 read-only P24 Pull Down Status. 24 1 read-only P25 Pull Down Status. 25 1 read-only P26 Pull Down Status. 26 1 read-only P27 Pull Down Status. 27 1 read-only P28 Pull Down Status. 28 1 read-only P29 Pull Down Status. 29 1 read-only P30 Pull Down Status. 30 1 read-only P31 Pull Down Status. 31 1 read-only OWER Output Write Enable 0x000000A0 32 write-only P0 Output Write Enable. 0 1 write-only P1 Output Write Enable. 1 1 write-only P2 Output Write Enable. 2 1 write-only P3 Output Write Enable. 3 1 write-only P4 Output Write Enable. 4 1 write-only P5 Output Write Enable. 5 1 write-only P6 Output Write Enable. 6 1 write-only P7 Output Write Enable. 7 1 write-only P8 Output Write Enable. 8 1 write-only P9 Output Write Enable. 9 1 write-only P10 Output Write Enable. 10 1 write-only P11 Output Write Enable. 11 1 write-only P12 Output Write Enable. 12 1 write-only P13 Output Write Enable. 13 1 write-only P14 Output Write Enable. 14 1 write-only P15 Output Write Enable. 15 1 write-only P16 Output Write Enable. 16 1 write-only P17 Output Write Enable. 17 1 write-only P18 Output Write Enable. 18 1 write-only P19 Output Write Enable. 19 1 write-only P20 Output Write Enable. 20 1 write-only P21 Output Write Enable. 21 1 write-only P22 Output Write Enable. 22 1 write-only P23 Output Write Enable. 23 1 write-only P24 Output Write Enable. 24 1 write-only P25 Output Write Enable. 25 1 write-only P26 Output Write Enable. 26 1 write-only P27 Output Write Enable. 27 1 write-only P28 Output Write Enable. 28 1 write-only P29 Output Write Enable. 29 1 write-only P30 Output Write Enable. 30 1 write-only P31 Output Write Enable. 31 1 write-only OWDR Output Write Disable 0x000000A4 32 write-only P0 Output Write Disable. 0 1 write-only P1 Output Write Disable. 1 1 write-only P2 Output Write Disable. 2 1 write-only P3 Output Write Disable. 3 1 write-only P4 Output Write Disable. 4 1 write-only P5 Output Write Disable. 5 1 write-only P6 Output Write Disable. 6 1 write-only P7 Output Write Disable. 7 1 write-only P8 Output Write Disable. 8 1 write-only P9 Output Write Disable. 9 1 write-only P10 Output Write Disable. 10 1 write-only P11 Output Write Disable. 11 1 write-only P12 Output Write Disable. 12 1 write-only P13 Output Write Disable. 13 1 write-only P14 Output Write Disable. 14 1 write-only P15 Output Write Disable. 15 1 write-only P16 Output Write Disable. 16 1 write-only P17 Output Write Disable. 17 1 write-only P18 Output Write Disable. 18 1 write-only P19 Output Write Disable. 19 1 write-only P20 Output Write Disable. 20 1 write-only P21 Output Write Disable. 21 1 write-only P22 Output Write Disable. 22 1 write-only P23 Output Write Disable. 23 1 write-only P24 Output Write Disable. 24 1 write-only P25 Output Write Disable. 25 1 write-only P26 Output Write Disable. 26 1 write-only P27 Output Write Disable. 27 1 write-only P28 Output Write Disable. 28 1 write-only P29 Output Write Disable. 29 1 write-only P30 Output Write Disable. 30 1 write-only P31 Output Write Disable. 31 1 write-only OWSR Output Write Status Register 0x000000A8 32 read-only 0x00000000 P0 Output Write Status. 0 1 read-only P1 Output Write Status. 1 1 read-only P2 Output Write Status. 2 1 read-only P3 Output Write Status. 3 1 read-only P4 Output Write Status. 4 1 read-only P5 Output Write Status. 5 1 read-only P6 Output Write Status. 6 1 read-only P7 Output Write Status. 7 1 read-only P8 Output Write Status. 8 1 read-only P9 Output Write Status. 9 1 read-only P10 Output Write Status. 10 1 read-only P11 Output Write Status. 11 1 read-only P12 Output Write Status. 12 1 read-only P13 Output Write Status. 13 1 read-only P14 Output Write Status. 14 1 read-only P15 Output Write Status. 15 1 read-only P16 Output Write Status. 16 1 read-only P17 Output Write Status. 17 1 read-only P18 Output Write Status. 18 1 read-only P19 Output Write Status. 19 1 read-only P20 Output Write Status. 20 1 read-only P21 Output Write Status. 21 1 read-only P22 Output Write Status. 22 1 read-only P23 Output Write Status. 23 1 read-only P24 Output Write Status. 24 1 read-only P25 Output Write Status. 25 1 read-only P26 Output Write Status. 26 1 read-only P27 Output Write Status. 27 1 read-only P28 Output Write Status. 28 1 read-only P29 Output Write Status. 29 1 read-only P30 Output Write Status. 30 1 read-only P31 Output Write Status. 31 1 read-only AIMER Additional Interrupt Modes Enable Register 0x000000B0 32 write-only P0 Additional Interrupt Modes Enable. 0 1 write-only P1 Additional Interrupt Modes Enable. 1 1 write-only P2 Additional Interrupt Modes Enable. 2 1 write-only P3 Additional Interrupt Modes Enable. 3 1 write-only P4 Additional Interrupt Modes Enable. 4 1 write-only P5 Additional Interrupt Modes Enable. 5 1 write-only P6 Additional Interrupt Modes Enable. 6 1 write-only P7 Additional Interrupt Modes Enable. 7 1 write-only P8 Additional Interrupt Modes Enable. 8 1 write-only P9 Additional Interrupt Modes Enable. 9 1 write-only P10 Additional Interrupt Modes Enable. 10 1 write-only P11 Additional Interrupt Modes Enable. 11 1 write-only P12 Additional Interrupt Modes Enable. 12 1 write-only P13 Additional Interrupt Modes Enable. 13 1 write-only P14 Additional Interrupt Modes Enable. 14 1 write-only P15 Additional Interrupt Modes Enable. 15 1 write-only P16 Additional Interrupt Modes Enable. 16 1 write-only P17 Additional Interrupt Modes Enable. 17 1 write-only P18 Additional Interrupt Modes Enable. 18 1 write-only P19 Additional Interrupt Modes Enable. 19 1 write-only P20 Additional Interrupt Modes Enable. 20 1 write-only P21 Additional Interrupt Modes Enable. 21 1 write-only P22 Additional Interrupt Modes Enable. 22 1 write-only P23 Additional Interrupt Modes Enable. 23 1 write-only P24 Additional Interrupt Modes Enable. 24 1 write-only P25 Additional Interrupt Modes Enable. 25 1 write-only P26 Additional Interrupt Modes Enable. 26 1 write-only P27 Additional Interrupt Modes Enable. 27 1 write-only P28 Additional Interrupt Modes Enable. 28 1 write-only P29 Additional Interrupt Modes Enable. 29 1 write-only P30 Additional Interrupt Modes Enable. 30 1 write-only P31 Additional Interrupt Modes Enable. 31 1 write-only AIMDR Additional Interrupt Modes Disables Register 0x000000B4 32 write-only P0 Additional Interrupt Modes Disable. 0 1 write-only P1 Additional Interrupt Modes Disable. 1 1 write-only P2 Additional Interrupt Modes Disable. 2 1 write-only P3 Additional Interrupt Modes Disable. 3 1 write-only P4 Additional Interrupt Modes Disable. 4 1 write-only P5 Additional Interrupt Modes Disable. 5 1 write-only P6 Additional Interrupt Modes Disable. 6 1 write-only P7 Additional Interrupt Modes Disable. 7 1 write-only P8 Additional Interrupt Modes Disable. 8 1 write-only P9 Additional Interrupt Modes Disable. 9 1 write-only P10 Additional Interrupt Modes Disable. 10 1 write-only P11 Additional Interrupt Modes Disable. 11 1 write-only P12 Additional Interrupt Modes Disable. 12 1 write-only P13 Additional Interrupt Modes Disable. 13 1 write-only P14 Additional Interrupt Modes Disable. 14 1 write-only P15 Additional Interrupt Modes Disable. 15 1 write-only P16 Additional Interrupt Modes Disable. 16 1 write-only P17 Additional Interrupt Modes Disable. 17 1 write-only P18 Additional Interrupt Modes Disable. 18 1 write-only P19 Additional Interrupt Modes Disable. 19 1 write-only P20 Additional Interrupt Modes Disable. 20 1 write-only P21 Additional Interrupt Modes Disable. 21 1 write-only P22 Additional Interrupt Modes Disable. 22 1 write-only P23 Additional Interrupt Modes Disable. 23 1 write-only P24 Additional Interrupt Modes Disable. 24 1 write-only P25 Additional Interrupt Modes Disable. 25 1 write-only P26 Additional Interrupt Modes Disable. 26 1 write-only P27 Additional Interrupt Modes Disable. 27 1 write-only P28 Additional Interrupt Modes Disable. 28 1 write-only P29 Additional Interrupt Modes Disable. 29 1 write-only P30 Additional Interrupt Modes Disable. 30 1 write-only P31 Additional Interrupt Modes Disable. 31 1 write-only AIMMR Additional Interrupt Modes Mask Register 0x000000B8 32 read-only 0x00000000 P0 Peripheral CD Status. 0 1 read-only P1 Peripheral CD Status. 1 1 read-only P2 Peripheral CD Status. 2 1 read-only P3 Peripheral CD Status. 3 1 read-only P4 Peripheral CD Status. 4 1 read-only P5 Peripheral CD Status. 5 1 read-only P6 Peripheral CD Status. 6 1 read-only P7 Peripheral CD Status. 7 1 read-only P8 Peripheral CD Status. 8 1 read-only P9 Peripheral CD Status. 9 1 read-only P10 Peripheral CD Status. 10 1 read-only P11 Peripheral CD Status. 11 1 read-only P12 Peripheral CD Status. 12 1 read-only P13 Peripheral CD Status. 13 1 read-only P14 Peripheral CD Status. 14 1 read-only P15 Peripheral CD Status. 15 1 read-only P16 Peripheral CD Status. 16 1 read-only P17 Peripheral CD Status. 17 1 read-only P18 Peripheral CD Status. 18 1 read-only P19 Peripheral CD Status. 19 1 read-only P20 Peripheral CD Status. 20 1 read-only P21 Peripheral CD Status. 21 1 read-only P22 Peripheral CD Status. 22 1 read-only P23 Peripheral CD Status. 23 1 read-only P24 Peripheral CD Status. 24 1 read-only P25 Peripheral CD Status. 25 1 read-only P26 Peripheral CD Status. 26 1 read-only P27 Peripheral CD Status. 27 1 read-only P28 Peripheral CD Status. 28 1 read-only P29 Peripheral CD Status. 29 1 read-only P30 Peripheral CD Status. 30 1 read-only P31 Peripheral CD Status. 31 1 read-only ESR Edge Select Register 0x000000C0 32 write-only P0 Edge Interrupt Selection. 0 1 write-only P1 Edge Interrupt Selection. 1 1 write-only P2 Edge Interrupt Selection. 2 1 write-only P3 Edge Interrupt Selection. 3 1 write-only P4 Edge Interrupt Selection. 4 1 write-only P5 Edge Interrupt Selection. 5 1 write-only P6 Edge Interrupt Selection. 6 1 write-only P7 Edge Interrupt Selection. 7 1 write-only P8 Edge Interrupt Selection. 8 1 write-only P9 Edge Interrupt Selection. 9 1 write-only P10 Edge Interrupt Selection. 10 1 write-only P11 Edge Interrupt Selection. 11 1 write-only P12 Edge Interrupt Selection. 12 1 write-only P13 Edge Interrupt Selection. 13 1 write-only P14 Edge Interrupt Selection. 14 1 write-only P15 Edge Interrupt Selection. 15 1 write-only P16 Edge Interrupt Selection. 16 1 write-only P17 Edge Interrupt Selection. 17 1 write-only P18 Edge Interrupt Selection. 18 1 write-only P19 Edge Interrupt Selection. 19 1 write-only P20 Edge Interrupt Selection. 20 1 write-only P21 Edge Interrupt Selection. 21 1 write-only P22 Edge Interrupt Selection. 22 1 write-only P23 Edge Interrupt Selection. 23 1 write-only P24 Edge Interrupt Selection. 24 1 write-only P25 Edge Interrupt Selection. 25 1 write-only P26 Edge Interrupt Selection. 26 1 write-only P27 Edge Interrupt Selection. 27 1 write-only P28 Edge Interrupt Selection. 28 1 write-only P29 Edge Interrupt Selection. 29 1 write-only P30 Edge Interrupt Selection. 30 1 write-only P31 Edge Interrupt Selection. 31 1 write-only LSR Level Select Register 0x000000C4 32 write-only P0 Level Interrupt Selection. 0 1 write-only P1 Level Interrupt Selection. 1 1 write-only P2 Level Interrupt Selection. 2 1 write-only P3 Level Interrupt Selection. 3 1 write-only P4 Level Interrupt Selection. 4 1 write-only P5 Level Interrupt Selection. 5 1 write-only P6 Level Interrupt Selection. 6 1 write-only P7 Level Interrupt Selection. 7 1 write-only P8 Level Interrupt Selection. 8 1 write-only P9 Level Interrupt Selection. 9 1 write-only P10 Level Interrupt Selection. 10 1 write-only P11 Level Interrupt Selection. 11 1 write-only P12 Level Interrupt Selection. 12 1 write-only P13 Level Interrupt Selection. 13 1 write-only P14 Level Interrupt Selection. 14 1 write-only P15 Level Interrupt Selection. 15 1 write-only P16 Level Interrupt Selection. 16 1 write-only P17 Level Interrupt Selection. 17 1 write-only P18 Level Interrupt Selection. 18 1 write-only P19 Level Interrupt Selection. 19 1 write-only P20 Level Interrupt Selection. 20 1 write-only P21 Level Interrupt Selection. 21 1 write-only P22 Level Interrupt Selection. 22 1 write-only P23 Level Interrupt Selection. 23 1 write-only P24 Level Interrupt Selection. 24 1 write-only P25 Level Interrupt Selection. 25 1 write-only P26 Level Interrupt Selection. 26 1 write-only P27 Level Interrupt Selection. 27 1 write-only P28 Level Interrupt Selection. 28 1 write-only P29 Level Interrupt Selection. 29 1 write-only P30 Level Interrupt Selection. 30 1 write-only P31 Level Interrupt Selection. 31 1 write-only ELSR Edge/Level Status Register 0x000000C8 32 read-only 0x00000000 P0 Edge/Level Interrupt source selection. 0 1 read-only P1 Edge/Level Interrupt source selection. 1 1 read-only P2 Edge/Level Interrupt source selection. 2 1 read-only P3 Edge/Level Interrupt source selection. 3 1 read-only P4 Edge/Level Interrupt source selection. 4 1 read-only P5 Edge/Level Interrupt source selection. 5 1 read-only P6 Edge/Level Interrupt source selection. 6 1 read-only P7 Edge/Level Interrupt source selection. 7 1 read-only P8 Edge/Level Interrupt source selection. 8 1 read-only P9 Edge/Level Interrupt source selection. 9 1 read-only P10 Edge/Level Interrupt source selection. 10 1 read-only P11 Edge/Level Interrupt source selection. 11 1 read-only P12 Edge/Level Interrupt source selection. 12 1 read-only P13 Edge/Level Interrupt source selection. 13 1 read-only P14 Edge/Level Interrupt source selection. 14 1 read-only P15 Edge/Level Interrupt source selection. 15 1 read-only P16 Edge/Level Interrupt source selection. 16 1 read-only P17 Edge/Level Interrupt source selection. 17 1 read-only P18 Edge/Level Interrupt source selection. 18 1 read-only P19 Edge/Level Interrupt source selection. 19 1 read-only P20 Edge/Level Interrupt source selection. 20 1 read-only P21 Edge/Level Interrupt source selection. 21 1 read-only P22 Edge/Level Interrupt source selection. 22 1 read-only P23 Edge/Level Interrupt source selection. 23 1 read-only P24 Edge/Level Interrupt source selection. 24 1 read-only P25 Edge/Level Interrupt source selection. 25 1 read-only P26 Edge/Level Interrupt source selection. 26 1 read-only P27 Edge/Level Interrupt source selection. 27 1 read-only P28 Edge/Level Interrupt source selection. 28 1 read-only P29 Edge/Level Interrupt source selection. 29 1 read-only P30 Edge/Level Interrupt source selection. 30 1 read-only P31 Edge/Level Interrupt source selection. 31 1 read-only FELLSR Falling Edge/Low Level Select Register 0x000000D0 32 write-only P0 Falling Edge/Low Level Interrupt Selection. 0 1 write-only P1 Falling Edge/Low Level Interrupt Selection. 1 1 write-only P2 Falling Edge/Low Level Interrupt Selection. 2 1 write-only P3 Falling Edge/Low Level Interrupt Selection. 3 1 write-only P4 Falling Edge/Low Level Interrupt Selection. 4 1 write-only P5 Falling Edge/Low Level Interrupt Selection. 5 1 write-only P6 Falling Edge/Low Level Interrupt Selection. 6 1 write-only P7 Falling Edge/Low Level Interrupt Selection. 7 1 write-only P8 Falling Edge/Low Level Interrupt Selection. 8 1 write-only P9 Falling Edge/Low Level Interrupt Selection. 9 1 write-only P10 Falling Edge/Low Level Interrupt Selection. 10 1 write-only P11 Falling Edge/Low Level Interrupt Selection. 11 1 write-only P12 Falling Edge/Low Level Interrupt Selection. 12 1 write-only P13 Falling Edge/Low Level Interrupt Selection. 13 1 write-only P14 Falling Edge/Low Level Interrupt Selection. 14 1 write-only P15 Falling Edge/Low Level Interrupt Selection. 15 1 write-only P16 Falling Edge/Low Level Interrupt Selection. 16 1 write-only P17 Falling Edge/Low Level Interrupt Selection. 17 1 write-only P18 Falling Edge/Low Level Interrupt Selection. 18 1 write-only P19 Falling Edge/Low Level Interrupt Selection. 19 1 write-only P20 Falling Edge/Low Level Interrupt Selection. 20 1 write-only P21 Falling Edge/Low Level Interrupt Selection. 21 1 write-only P22 Falling Edge/Low Level Interrupt Selection. 22 1 write-only P23 Falling Edge/Low Level Interrupt Selection. 23 1 write-only P24 Falling Edge/Low Level Interrupt Selection. 24 1 write-only P25 Falling Edge/Low Level Interrupt Selection. 25 1 write-only P26 Falling Edge/Low Level Interrupt Selection. 26 1 write-only P27 Falling Edge/Low Level Interrupt Selection. 27 1 write-only P28 Falling Edge/Low Level Interrupt Selection. 28 1 write-only P29 Falling Edge/Low Level Interrupt Selection. 29 1 write-only P30 Falling Edge/Low Level Interrupt Selection. 30 1 write-only P31 Falling Edge/Low Level Interrupt Selection. 31 1 write-only REHLSR Rising Edge/ High Level Select Register 0x000000D4 32 write-only P0 Rising Edge /High Level Interrupt Selection. 0 1 write-only P1 Rising Edge /High Level Interrupt Selection. 1 1 write-only P2 Rising Edge /High Level Interrupt Selection. 2 1 write-only P3 Rising Edge /High Level Interrupt Selection. 3 1 write-only P4 Rising Edge /High Level Interrupt Selection. 4 1 write-only P5 Rising Edge /High Level Interrupt Selection. 5 1 write-only P6 Rising Edge /High Level Interrupt Selection. 6 1 write-only P7 Rising Edge /High Level Interrupt Selection. 7 1 write-only P8 Rising Edge /High Level Interrupt Selection. 8 1 write-only P9 Rising Edge /High Level Interrupt Selection. 9 1 write-only P10 Rising Edge /High Level Interrupt Selection. 10 1 write-only P11 Rising Edge /High Level Interrupt Selection. 11 1 write-only P12 Rising Edge /High Level Interrupt Selection. 12 1 write-only P13 Rising Edge /High Level Interrupt Selection. 13 1 write-only P14 Rising Edge /High Level Interrupt Selection. 14 1 write-only P15 Rising Edge /High Level Interrupt Selection. 15 1 write-only P16 Rising Edge /High Level Interrupt Selection. 16 1 write-only P17 Rising Edge /High Level Interrupt Selection. 17 1 write-only P18 Rising Edge /High Level Interrupt Selection. 18 1 write-only P19 Rising Edge /High Level Interrupt Selection. 19 1 write-only P20 Rising Edge /High Level Interrupt Selection. 20 1 write-only P21 Rising Edge /High Level Interrupt Selection. 21 1 write-only P22 Rising Edge /High Level Interrupt Selection. 22 1 write-only P23 Rising Edge /High Level Interrupt Selection. 23 1 write-only P24 Rising Edge /High Level Interrupt Selection. 24 1 write-only P25 Rising Edge /High Level Interrupt Selection. 25 1 write-only P26 Rising Edge /High Level Interrupt Selection. 26 1 write-only P27 Rising Edge /High Level Interrupt Selection. 27 1 write-only P28 Rising Edge /High Level Interrupt Selection. 28 1 write-only P29 Rising Edge /High Level Interrupt Selection. 29 1 write-only P30 Rising Edge /High Level Interrupt Selection. 30 1 write-only P31 Rising Edge /High Level Interrupt Selection. 31 1 write-only FRLHSR Fall/Rise - Low/High Status Register 0x000000D8 32 read-only 0x00000000 P0 Edge /Level Interrupt Source Selection. 0 1 read-only P1 Edge /Level Interrupt Source Selection. 1 1 read-only P2 Edge /Level Interrupt Source Selection. 2 1 read-only P3 Edge /Level Interrupt Source Selection. 3 1 read-only P4 Edge /Level Interrupt Source Selection. 4 1 read-only P5 Edge /Level Interrupt Source Selection. 5 1 read-only P6 Edge /Level Interrupt Source Selection. 6 1 read-only P7 Edge /Level Interrupt Source Selection. 7 1 read-only P8 Edge /Level Interrupt Source Selection. 8 1 read-only P9 Edge /Level Interrupt Source Selection. 9 1 read-only P10 Edge /Level Interrupt Source Selection. 10 1 read-only P11 Edge /Level Interrupt Source Selection. 11 1 read-only P12 Edge /Level Interrupt Source Selection. 12 1 read-only P13 Edge /Level Interrupt Source Selection. 13 1 read-only P14 Edge /Level Interrupt Source Selection. 14 1 read-only P15 Edge /Level Interrupt Source Selection. 15 1 read-only P16 Edge /Level Interrupt Source Selection. 16 1 read-only P17 Edge /Level Interrupt Source Selection. 17 1 read-only P18 Edge /Level Interrupt Source Selection. 18 1 read-only P19 Edge /Level Interrupt Source Selection. 19 1 read-only P20 Edge /Level Interrupt Source Selection. 20 1 read-only P21 Edge /Level Interrupt Source Selection. 21 1 read-only P22 Edge /Level Interrupt Source Selection. 22 1 read-only P23 Edge /Level Interrupt Source Selection. 23 1 read-only P24 Edge /Level Interrupt Source Selection. 24 1 read-only P25 Edge /Level Interrupt Source Selection. 25 1 read-only P26 Edge /Level Interrupt Source Selection. 26 1 read-only P27 Edge /Level Interrupt Source Selection. 27 1 read-only P28 Edge /Level Interrupt Source Selection. 28 1 read-only P29 Edge /Level Interrupt Source Selection. 29 1 read-only P30 Edge /Level Interrupt Source Selection. 30 1 read-only P31 Edge /Level Interrupt Source Selection. 31 1 read-only LOCKSR Lock Status 0x000000E0 32 read-only 0x00000000 P0 Lock Status. 0 1 read-only P1 Lock Status. 1 1 read-only P2 Lock Status. 2 1 read-only P3 Lock Status. 3 1 read-only P4 Lock Status. 4 1 read-only P5 Lock Status. 5 1 read-only P6 Lock Status. 6 1 read-only P7 Lock Status. 7 1 read-only P8 Lock Status. 8 1 read-only P9 Lock Status. 9 1 read-only P10 Lock Status. 10 1 read-only P11 Lock Status. 11 1 read-only P12 Lock Status. 12 1 read-only P13 Lock Status. 13 1 read-only P14 Lock Status. 14 1 read-only P15 Lock Status. 15 1 read-only P16 Lock Status. 16 1 read-only P17 Lock Status. 17 1 read-only P18 Lock Status. 18 1 read-only P19 Lock Status. 19 1 read-only P20 Lock Status. 20 1 read-only P21 Lock Status. 21 1 read-only P22 Lock Status. 22 1 read-only P23 Lock Status. 23 1 read-only P24 Lock Status. 24 1 read-only P25 Lock Status. 25 1 read-only P26 Lock Status. 26 1 read-only P27 Lock Status. 27 1 read-only P28 Lock Status. 28 1 read-only P29 Lock Status. 29 1 read-only P30 Lock Status. 30 1 read-only P31 Lock Status. 31 1 read-only WPMR Write Protect Mode Register 0x000000E4 32 read-write 0x00000000 WPEN Write Protect Enable 0 1 read-write WPKEY Write Protect KEY 8 24 read-write WPSR Write Protect Status Register 0x000000E8 32 read-only 0x00000000 WPVS Write Protect Violation Status 0 1 read-only WPVSRC Write Protect Violation Source 8 16 read-only SCHMITT Schmitt Trigger Register 0x00000100 32 read-write 0x00000000 SCHMITT0 0 1 read-write SCHMITT1 1 1 read-write SCHMITT2 2 1 read-write SCHMITT3 3 1 read-write SCHMITT4 4 1 read-write SCHMITT5 5 1 read-write SCHMITT6 6 1 read-write SCHMITT7 7 1 read-write SCHMITT8 8 1 read-write SCHMITT9 9 1 read-write SCHMITT10 10 1 read-write SCHMITT11 11 1 read-write SCHMITT12 12 1 read-write SCHMITT13 13 1 read-write SCHMITT14 14 1 read-write SCHMITT15 15 1 read-write SCHMITT16 16 1 read-write SCHMITT17 17 1 read-write SCHMITT18 18 1 read-write SCHMITT19 19 1 read-write SCHMITT20 20 1 read-write SCHMITT21 21 1 read-write SCHMITT22 22 1 read-write SCHMITT23 23 1 read-write SCHMITT24 24 1 read-write SCHMITT25 25 1 read-write SCHMITT26 26 1 read-write SCHMITT27 27 1 read-write SCHMITT28 28 1 read-write SCHMITT29 29 1 read-write SCHMITT30 30 1 read-write SCHMITT31 31 1 read-write DELAYR IO Delay Register 0x00000110 32 read-write 0x00000000 Delay0 0 4 read-write Delay1 4 4 read-write Delay2 8 4 read-write Delay3 12 4 read-write Delay4 16 4 read-write Delay5 20 4 read-write Delay6 24 4 read-write Delay7 28 4 read-write DRIVER1 I/O Drive Register 1 0x00000114 32 read-write 0x00000000 LINE0 Drive of PIO line 0 0 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE1 Drive of PIO line 1 2 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE2 Drive of PIO line 2 4 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE3 Drive of PIO line 3 6 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE4 Drive of PIO line 4 8 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE5 Drive of PIO line 5 10 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE6 Drive of PIO line 6 12 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE7 Drive of PIO line 7 14 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE8 Drive of PIO line 8 16 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE9 Drive of PIO line 9 18 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE10 Drive of PIO line 10 20 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE11 Drive of PIO line 11 22 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE12 Drive of PIO line 12 24 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE13 Drive of PIO line 13 26 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE14 Drive of PIO line 14 28 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE15 Drive of PIO line 15 30 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 DRIVER2 I/O Drive Register 2 0x00000118 32 read-write 0x00000000 LINE16 Drive of PIO line 16 0 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE17 Drive of PIO line 17 2 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE18 Drive of PIO line 18 4 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE19 Drive of PIO line 19 6 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE20 Drive of PIO line 20 8 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE21 Drive of PIO line 21 10 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE22 Drive of PIO line 22 12 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE23 Drive of PIO line 23 14 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE24 Drive of PIO line 24 16 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE25 Drive of PIO line 25 18 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE26 Drive of PIO line 26 20 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE27 Drive of PIO line 27 22 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE28 Drive of PIO line 28 24 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE29 Drive of PIO line 29 26 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE30 Drive of PIO line 30 28 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 LINE31 Drive of PIO line 31 30 2 read-write HI_DRIVE High drive 0x0 ME_DRIVE Medium drive 0x1 LO_DRIVE Low drive 0x2 PMC 11070A Power Management Controller 0xFFFFFC00 0 0x200 registers PMC_SCER System Clock Enable Register 0x00000000 32 write-only DDRCK DDR Clock Enable 2 1 write-only LCDCK LCD Clock Enable 3 1 write-only UHP USB Host OHCI Clocks Enable 6 1 write-only UDP USB Device Clock Enable 7 1 write-only PCK0 Programmable Clock 0 Output Enable 8 1 write-only PCK1 Programmable Clock 1 Output Enable 9 1 write-only PMC_SCDR System Clock Disable Register 0x00000004 32 write-only PCK Processor Clock Disable 0 1 write-only DDRCK DDR Clock Disable 2 1 write-only LCDCK LCD Clock Disable 3 1 write-only UHP USB Host OHCI Clock Disable 6 1 write-only UDP USB Device Clock Enable 7 1 write-only PCK0 Programmable Clock 0 Output Disable 8 1 write-only PCK1 Programmable Clock 1 Output Disable 9 1 write-only PMC_SCSR System Clock Status Register 0x00000008 32 read-only 0x00000005 PCK Processor Clock Status 0 1 read-only DDRCK DDR Clock Status 2 1 read-only LCDCK LCD Clock Status 3 1 read-only UHP USB Host Port Clock Status 6 1 read-only UDP USB Device Port Clock Status 7 1 read-only PCK0 Programmable Clock 0 Output Status 8 1 read-only PCK1 Programmable Clock 1 Output Status 9 1 read-only PMC_PCER Peripheral Clock Enable Register 0x00000010 32 write-only PID2 Peripheral Clock 2 Enable 2 1 write-only PID3 Peripheral Clock 3 Enable 3 1 write-only PID4 Peripheral Clock 4 Enable 4 1 write-only PID5 Peripheral Clock 5 Enable 5 1 write-only PID6 Peripheral Clock 6 Enable 6 1 write-only PID7 Peripheral Clock 7 Enable 7 1 write-only PID8 Peripheral Clock 8 Enable 8 1 write-only PID9 Peripheral Clock 9 Enable 9 1 write-only PID10 Peripheral Clock 10 Enable 10 1 write-only PID11 Peripheral Clock 11 Enable 11 1 write-only PID12 Peripheral Clock 12 Enable 12 1 write-only PID13 Peripheral Clock 13 Enable 13 1 write-only PID14 Peripheral Clock 14 Enable 14 1 write-only PID15 Peripheral Clock 15 Enable 15 1 write-only PID16 Peripheral Clock 16 Enable 16 1 write-only PID17 Peripheral Clock 17 Enable 17 1 write-only PID18 Peripheral Clock 18 Enable 18 1 write-only PID19 Peripheral Clock 19 Enable 19 1 write-only PID20 Peripheral Clock 20 Enable 20 1 write-only PID21 Peripheral Clock 21 Enable 21 1 write-only PID22 Peripheral Clock 22 Enable 22 1 write-only PID23 Peripheral Clock 23 Enable 23 1 write-only PID24 Peripheral Clock 24 Enable 24 1 write-only PID25 Peripheral Clock 25 Enable 25 1 write-only PID26 Peripheral Clock 26 Enable 26 1 write-only PID27 Peripheral Clock 27 Enable 27 1 write-only PID28 Peripheral Clock 28 Enable 28 1 write-only PID29 Peripheral Clock 29 Enable 29 1 write-only PID30 Peripheral Clock 30 Enable 30 1 write-only PID31 Peripheral Clock 31 Enable 31 1 write-only PMC_PCDR Peripheral Clock Disable Register 0x00000014 32 write-only PID2 Peripheral Clock 2 Disable 2 1 write-only PID3 Peripheral Clock 3 Disable 3 1 write-only PID4 Peripheral Clock 4 Disable 4 1 write-only PID5 Peripheral Clock 5 Disable 5 1 write-only PID6 Peripheral Clock 6 Disable 6 1 write-only PID7 Peripheral Clock 7 Disable 7 1 write-only PID8 Peripheral Clock 8 Disable 8 1 write-only PID9 Peripheral Clock 9 Disable 9 1 write-only PID10 Peripheral Clock 10 Disable 10 1 write-only PID11 Peripheral Clock 11 Disable 11 1 write-only PID12 Peripheral Clock 12 Disable 12 1 write-only PID13 Peripheral Clock 13 Disable 13 1 write-only PID14 Peripheral Clock 14 Disable 14 1 write-only PID15 Peripheral Clock 15 Disable 15 1 write-only PID16 Peripheral Clock 16 Disable 16 1 write-only PID17 Peripheral Clock 17 Disable 17 1 write-only PID18 Peripheral Clock 18 Disable 18 1 write-only PID19 Peripheral Clock 19 Disable 19 1 write-only PID20 Peripheral Clock 20 Disable 20 1 write-only PID21 Peripheral Clock 21 Disable 21 1 write-only PID22 Peripheral Clock 22 Disable 22 1 write-only PID23 Peripheral Clock 23 Disable 23 1 write-only PID24 Peripheral Clock 24 Disable 24 1 write-only PID25 Peripheral Clock 25 Disable 25 1 write-only PID26 Peripheral Clock 26 Disable 26 1 write-only PID27 Peripheral Clock 27 Disable 27 1 write-only PID28 Peripheral Clock 28 Disable 28 1 write-only PID29 Peripheral Clock 29 Disable 29 1 write-only PID30 Peripheral Clock 30 Disable 30 1 write-only PID31 Peripheral Clock 31 Disable 31 1 write-only PMC_PCSR Peripheral Clock Status Register 0x00000018 32 read-only 0x00000000 PID2 Peripheral Clock 2 Status 2 1 read-only PID3 Peripheral Clock 3 Status 3 1 read-only PID4 Peripheral Clock 4 Status 4 1 read-only PID5 Peripheral Clock 5 Status 5 1 read-only PID6 Peripheral Clock 6 Status 6 1 read-only PID7 Peripheral Clock 7 Status 7 1 read-only PID8 Peripheral Clock 8 Status 8 1 read-only PID9 Peripheral Clock 9 Status 9 1 read-only PID10 Peripheral Clock 10 Status 10 1 read-only PID11 Peripheral Clock 11 Status 11 1 read-only PID12 Peripheral Clock 12 Status 12 1 read-only PID13 Peripheral Clock 13 Status 13 1 read-only PID14 Peripheral Clock 14 Status 14 1 read-only PID15 Peripheral Clock 15 Status 15 1 read-only PID16 Peripheral Clock 16 Status 16 1 read-only PID17 Peripheral Clock 17 Status 17 1 read-only PID18 Peripheral Clock 18 Status 18 1 read-only PID19 Peripheral Clock 19 Status 19 1 read-only PID20 Peripheral Clock 20 Status 20 1 read-only PID21 Peripheral Clock 21 Status 21 1 read-only PID22 Peripheral Clock 22 Status 22 1 read-only PID23 Peripheral Clock 23 Status 23 1 read-only PID24 Peripheral Clock 24 Status 24 1 read-only PID25 Peripheral Clock 25 Status 25 1 read-only PID26 Peripheral Clock 26 Status 26 1 read-only PID27 Peripheral Clock 27 Status 27 1 read-only PID28 Peripheral Clock 28 Status 28 1 read-only PID29 Peripheral Clock 29 Status 29 1 read-only PID30 Peripheral Clock 30 Status 30 1 read-only PID31 Peripheral Clock 31 Status 31 1 read-only CKGR_MOR Main Oscillator Register 0x00000020 32 read-write 0x01000001 MOSCXTEN Main Crystal Oscillator Enable 0 1 read-write MOSCXTBY Main Crystal Oscillator Bypass 1 1 read-write MOSCRCEN Main On-Chip RC Oscillator Enable 3 1 read-write MOSCXTST Main Crystal Oscillator Start-up Time 8 8 read-write KEY Password 16 8 read-write MOSCSEL Main Oscillator Selection 24 1 read-write CFDEN Clock Failure Detector Enable 25 1 read-write CKGR_MCFR Main Clock Frequency Register 0x00000024 32 read-write 0x00000000 MAINF Main Clock Frequency 0 16 read-write MAINFRDY Main Clock Ready 16 1 read-write RCMEAS RC Measure 20 1 read-write CKGR_PLLAR PLLA Register 0x00000028 32 read-write 0x00003F00 DIVA Divider A 0 8 read-write PLLACOUNT PLLA Counter 8 6 read-write OUTA PLLA Clock Frequency Range 14 2 read-write MULA PLLA Multiplier 16 11 read-write STUCKTO1 29 1 read-write CKGR_PLLBR PLLB Register 0x0000002C 32 read-write 0x00003F00 DIVB Divider B 0 8 read-write PLLBCOUNT PLLB Counter 8 6 read-write OUTB PLLB Clock Frequency Range 14 2 read-write MULB PLLB Multiplier 16 11 read-write PMC_MCKR Master Clock Register 0x00000030 32 read-write 0x00000001 CSS Master/Processor Clock Source Selection 0 2 read-write SLOW_CLK Slow Clock is selected 0x0 MAIN_CLK Main Clock is selected 0x1 PLLA_CLK PLLACK/PLLADIV2 is selected 0x2 PLLB_CLK PLLBCK is selected 0x3 PRES Master/Processor Clock Prescaler 4 3 read-write CLOCK_DIV1 Selected clock 0x0 CLOCK_DIV2 Selected clock divided by 2 0x1 CLOCK_DIV4 Selected clock divided by 4 0x2 CLOCK_DIV8 Selected clock divided by 8 0x3 CLOCK_DIV16 Selected clock divided by 16 0x4 CLOCK_DIV32 Selected clock divided by 32 0x5 CLOCK_DIV64 Selected clock divided by 64 0x6 MDIV Master Clock Division 8 2 read-write EQ_PCK Master Clock is Prescaler Output Clock divided by 1.Warning: SysClk DDR and DDRCK are not available. 0x0 PCK_DIV2 Master Clock is Prescaler Output Clock divided by 2.SysClk DDR is equal to 2 x MCK. DDRCK is equal to MCK. 0x1 PCK_DIV4 Master Clock is Prescaler Output Clock divided by 4.SysClk DDR is equal to 2 x MCK. DDRCK is equal to MCK. 0x2 PCK_DIV3 Master Clock is Prescaler Output Clock divided by 3.SysClk DDR is equal to 2 x MCK. DDRCK is equal to MCK. 0x3 PLLADIV2 PLLA divisor by 2 12 1 read-write NOT_DIV2 PLLA clock frequency is divided by 1. 0 DIV2 PLLA clock frequency is divided by 2. 1 PMC_USB USB Clock Register 0x00000038 32 read-write 0x00000000 USBS USB OHCI Input Clock Selection 0 1 read-write USBDIV Divider for USB Clock 8 4 read-write 2 4 0-1 PMC_PCK[%s] Programmable Clock 0 Register 0x00000040 32 read-write CSS Master Clock Source Selection 0 3 read-write SLOW_CLK Slow Clock is selected 0x0 MAIN_CLK Main Clock is selected 0x1 PLLA_CLK PLLACK/PLLADIV2 is selected 0x2 PLLB_CLK PLLBCK is selected 0x3 MCK_CLK Master Clock is selected 0x4 PRES Programmable Clock Prescaler 4 3 read-write CLOCK_DIV1 Selected clock 0x0 CLOCK_DIV2 Selected clock divided by 2 0x1 CLOCK_DIV4 Selected clock divided by 4 0x2 CLOCK_DIV8 Selected clock divided by 8 0x3 CLOCK_DIV16 Selected clock divided by 16 0x4 CLOCK_DIV32 Selected clock divided by 32 0x5 CLOCK_DIV64 Selected clock divided by 64 0x6 PMC_IER Interrupt Enable Register 0x00000060 32 write-only MOSCXTS Main Crystal Oscillator Status Interrupt Enable 0 1 write-only LOCKA PLLA Lock Interrupt Enable 1 1 write-only LOCKB PLLB Lock Interrupt Enable 2 1 write-only MCKRDY Master Clock Ready Interrupt Enable 3 1 write-only PCKRDY0 Programmable Clock Ready 0 Interrupt Enable 8 1 write-only PCKRDY1 Programmable Clock Ready 1 Interrupt Enable 9 1 write-only MOSCSELS Main Oscillator Selection Status Interrupt Enable 16 1 write-only MOSCRCS Main On-Chip RC Status Interrupt Enable 17 1 write-only CFDEV Clock Failure Detector Event Interrupt Enable 18 1 write-only PMC_IDR Interrupt Disable Register 0x00000064 32 write-only MOSCXTS Main Crystal Oscillator Status Interrupt Disable 0 1 write-only LOCKA PLLA Lock Interrupt Disable 1 1 write-only LOCKB PLLB Lock Interrupt Disable 2 1 write-only MCKRDY Master Clock Ready Interrupt Disable 3 1 write-only PCKRDY0 Programmable Clock Ready 0 Interrupt Disable 8 1 write-only PCKRDY1 Programmable Clock Ready 1 Interrupt Disable 9 1 write-only MOSCSELS Main Oscillator Selection Status Interrupt Disable 16 1 write-only MOSCRCS Main On-Chip RC Status Interrupt Disable 17 1 write-only CFDEV Clock Failure Detector Event Interrupt Disable 18 1 write-only PMC_SR Status Register 0x00000068 32 read-only 0x00010008 MOSCXTS Main XTAL Oscillator Status 0 1 read-only LOCKA PLLA Lock Status 1 1 read-only LOCKB PLLB Lock Status 2 1 read-only MCKRDY Master Clock Status 3 1 read-only OSCSELS Slow Clock Oscillator Selection 7 1 read-only PCKRDY0 Programmable Clock Ready Status 8 1 read-only PCKRDY1 Programmable Clock Ready Status 9 1 read-only MOSCSELS Main Oscillator Selection Status 16 1 read-only MOSCRCS Main On-Chip RC Oscillator Status 17 1 read-only CFDEV Clock Failure Detector Event 18 1 read-only CFDS Clock Failure Detector Status 19 1 read-only FOS Clock Failure Detector Fault Output Status 20 1 read-only PMC_IMR Interrupt Mask Register 0x0000006C 32 read-only 0x00000000 MOSCXTS Main Crystal Oscillator Status Interrupt Mask 0 1 read-only LOCKA PLLA Lock Interrupt Mask 1 1 read-only LOCKB PLLB Lock Interrupt Mask 2 1 read-only MCKRDY Master Clock Ready Interrupt Mask 3 1 read-only PCKRDY0 Programmable Clock Ready 0 Interrupt Mask 8 1 read-only PCKRDY1 Programmable Clock Ready 1 Interrupt Mask 9 1 read-only MOSCSELS Main Oscillator Selection Status Interrupt Mask 16 1 read-only MOSCRCS Main On-Chip RC Status Interrupt Mask 17 1 read-only CFDEV Clock Failure Detector Event Interrupt Mask 18 1 read-only PMC_PLLICPR PLL Charge Pump Current Register 0x00000080 32 write-only 0x01000100 ICPLLA Charge Pump Current 0 1 write-only PMC_WPMR Write Protect Mode Register 0x000000E4 32 read-write 0x00000000 WPEN Write Protect Enable 0 1 read-write WPKEY Write Protect KEY 8 24 read-write PMC_WPSR Write Protect Status Register 0x000000E8 32 read-only 0x00000000 WPVS Write Protect Violation Status 0 1 read-only WPVSRC Write Protect Violation Source 8 16 read-only PMC_PCR Peripheral Control Register 0x0000010C 32 read-write 0x00000000 PID Peripheral ID 0 6 read-write CMD Command 12 1 read-write DIV Divisor value 16 2 read-write PERIPH_DIV_MCK Peripheral clock is MCK 0x0 PERIPH_DIV2_MCK Peripheral clock is MCK/2 0x1 PERIPH_DIV4_MCK Peripheral clock is MCK/4 0x2 PERIPH_DIV8_MCK Peripheral clock is MCK/8 0x3 EN Enable 28 1 read-write RSTC 6098I Reset Controller SYSC RSTC_ 0xFFFFFE00 0 0xC registers CR Control Register 0x00000000 32 write-only PROCRST Processor Reset 0 1 write-only PERRST Peripheral Reset 2 1 write-only EXTRST External Reset 3 1 write-only KEY Password 24 8 write-only SR Status Register 0x00000004 32 read-only 0x00000001 URSTS User Reset Status 0 1 read-only RSTTYP Reset Type 8 3 read-only NRSTL NRST Pin Level 16 1 read-only SRCMP Software Reset Command in Progress 17 1 read-only MR Mode Register 0x00000008 32 read-write ERSTL External Reset Length 8 4 read-write KEY Password 24 8 read-write SHDWC 6122K Shutdown Controller SYSC SHDWC_ 0xFFFFFE10 0 0xC registers CR Shutdown Control Register 0x00000000 32 write-only SHDW Shutdown Command 0 1 write-only KEY Password 24 8 write-only MR Shutdown Mode Register 0x00000004 32 read-write 0x00000303 WKMODE0 Wake-up Mode 0 0 2 read-write CPTWK0 Counter on Wake-up 0 4 4 read-write RTCWKEN Real-time Clock Wake-up Enable 17 1 read-write SR Shutdown Status Register 0x00000008 32 read-only 0x00000000 WAKEUP0 Wake-up 0 Status 0 1 read-only RTCWK Real-time Clock Wake-up 17 1 read-only PIT 6079B Periodic Interval Timer SYSC PIT_ 0xFFFFFE30 0 0x10 registers MR Mode Register 0x00000000 32 read-write 0x000FFFFF PIV Periodic Interval Value 0 20 read-write PITEN Period Interval Timer Enabled 24 1 read-write PITIEN Periodic Interval Timer Interrupt Enable 25 1 read-write SR Status Register 0x00000004 32 read-only 0x00000000 PITS Periodic Interval Timer Status 0 1 read-only PIVR Periodic Interval Value Register 0x00000008 32 read-only 0x00000000 CPIV Current Periodic Interval Value 0 20 read-only PICNT Periodic Interval Counter 20 12 read-only PIIR Periodic Interval Image Register 0x0000000C 32 read-only 0x00000000 CPIV Current Periodic Interval Value 0 20 read-only PICNT Periodic Interval Counter 20 12 read-only WDT 6080B Watchdog Timer SYSC WDT_ 0xFFFFFE40 0 0xC registers CR Control Register 0x00000000 32 write-only WDRSTT Watchdog Restart 0 1 write-only KEY Password 24 8 write-only MR Mode Register 0x00000004 32 read-write 0x3FFF2FFF WDV Watchdog Counter Value 0 12 read-write WDFIEN Watchdog Fault Interrupt Enable 12 1 read-write WDRSTEN Watchdog Reset Enable 13 1 read-write WDRPROC Watchdog Reset Processor 14 1 read-write WDDIS Watchdog Disable 15 1 read-write WDD Watchdog Delta Value 16 12 read-write WDDBGHLT Watchdog Debug Halt 28 1 read-write WDIDLEHLT Watchdog Idle Halt 29 1 read-write SR Status Register 0x00000008 32 read-only 0x00000000 WDUNF Watchdog Underflow 0 1 read-only WDERR Watchdog Error 1 1 read-only SCKC 11073B Slow Clock Controller SYSC SCKC_ 0xFFFFFE50 0 0x4 registers CR Slow Clock Configuration Register 0x00000000 32 read-write 0x00000001 RCEN Internal 32 kHz RC Oscillator 0 1 read-write OSC32EN 32,768 Hz Oscillator 1 1 read-write OSC32BYP 32,768Hz Oscillator Bypass 2 1 read-write OSCSEL Slow Clock Selector 3 1 read-write RC Slow clock is internal 32 kHz RC oscillator. 0 XTAL Slow clock is 32,768 Hz oscillator. 1 BSC 11072B Boot Sequence Controller SYSC BSC_ 0xFFFFFE54 0 0x4 registers CR Boot Sequence Configuration Register 0x00000000 32 read-write BOOT Boot media sequence 0 8 read-write BOOTKEY 16 16 read-write BSC_KEY valid key to write BSC_CR register; it needs to be written at the same time as the BOOT field. 0x6683 GPBR 6378C General Purpose Backup Register SYSC GPBR_ 0xFFFFFE60 0 0x10 registers 4 4 0-3 GPBR[%s] General Purpose Backup Register 0x00000000 32 read-write GPBR_VALUE Value of GPBR x 0 32 read-write RTC 6056I Real-time Clock RTC_ 0xFFFFFEB0 0 0x30 registers CR Control Register 0x00000000 32 read-write 0x00000000 UPDTIM Update Request Time Register 0 1 read-write UPDCAL Update Request Calendar Register 1 1 read-write TIMEVSEL Time Event Selection 8 2 read-write MINUTE Minute change 0x0 HOUR Hour change 0x1 MIDNIGHT Every day at midnight 0x2 NOON Every day at noon 0x3 CALEVSEL Calendar Event Selection 16 2 read-write WEEK Week change (every Monday at time 00:00:00) 0x0 MONTH Month change (every 01 of each month at time 00:00:00) 0x1 YEAR Year change (every January 1 at time 00:00:00) 0x2 MR Mode Register 0x00000004 32 read-write 0x00000000 HRMOD 12-/24-hour Mode 0 1 read-write TIMR Time Register 0x00000008 32 read-write 0x00000000 SEC Current Second 0 7 read-write MIN Current Minute 8 7 read-write HOUR Current Hour 16 6 read-write AMPM Ante Meridiem Post Meridiem Indicator 22 1 read-write CALR Calendar Register 0x0000000C 32 read-write 0x01210720 CENT Current Century 0 7 read-write YEAR Current Year 8 8 read-write MONTH Current Month 16 5 read-write DAY Current Day in Current Week 21 3 read-write DATE Current Day in Current Month 24 6 read-write TIMALR Time Alarm Register 0x00000010 32 read-write 0x00000000 SEC Second Alarm 0 7 read-write SECEN Second Alarm Enable 7 1 read-write MIN Minute Alarm 8 7 read-write MINEN Minute Alarm Enable 15 1 read-write HOUR Hour Alarm 16 6 read-write AMPM AM/PM Indicator 22 1 read-write HOUREN Hour Alarm Enable 23 1 read-write CALALR Calendar Alarm Register 0x00000014 32 read-write 0x01010000 MONTH Month Alarm 16 5 read-write MTHEN Month Alarm Enable 23 1 read-write DATE Date Alarm 24 6 read-write DATEEN Date Alarm Enable 31 1 read-write SR Status Register 0x00000018 32 read-only 0x00000000 ACKUPD Acknowledge for Update 0 1 read-only ALARM Alarm Flag 1 1 read-only SEC Second Event 2 1 read-only TIMEV Time Event 3 1 read-only CALEV Calendar Event 4 1 read-only SCCR Status Clear Command Register 0x0000001C 32 write-only ACKCLR Acknowledge Clear 0 1 write-only ALRCLR Alarm Clear 1 1 write-only SECCLR Second Clear 2 1 write-only TIMCLR Time Clear 3 1 write-only CALCLR Calendar Clear 4 1 write-only IER Interrupt Enable Register 0x00000020 32 write-only ACKEN Acknowledge Update Interrupt Enable 0 1 write-only ALREN Alarm Interrupt Enable 1 1 write-only SECEN Second Event Interrupt Enable 2 1 write-only TIMEN Time Event Interrupt Enable 3 1 write-only CALEN Calendar Event Interrupt Enable 4 1 write-only IDR Interrupt Disable Register 0x00000024 32 write-only ACKDIS Acknowledge Update Interrupt Disable 0 1 write-only ALRDIS Alarm Interrupt Disable 1 1 write-only SECDIS Second Event Interrupt Disable 2 1 write-only TIMDIS Time Event Interrupt Disable 3 1 write-only CALDIS Calendar Event Interrupt Disable 4 1 write-only IMR Interrupt Mask Register 0x00000028 32 read-only 0x00000000 ACK Acknowledge Update Interrupt Mask 0 1 read-only ALR Alarm Interrupt Mask 1 1 read-only SEC Second Event Interrupt Mask 2 1 read-only TIM Time Event Interrupt Mask 3 1 read-only CAL Calendar Event Interrupt Mask 4 1 read-only VER Valid Entry Register 0x0000002C 32 read-only 0x00000000 NVTIM Non-valid Time 0 1 read-only NVCAL Non-valid Calendar 1 1 read-only NVTIMALR Non-valid Time Alarm 2 1 read-only NVCALALR Non-valid Calendar Alarm 3 1 read-only