78 lines
2.6 KiB
C
78 lines
2.6 KiB
C
/* USER CODE BEGIN Header */
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/**
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******************************************************************************
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* @file dma.c
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* @brief This file provides code for the configuration
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* of all the requested memory to memory DMA transfers.
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2025 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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*/
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/* USER CODE END Header */
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/* Includes ------------------------------------------------------------------*/
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#include "dma.h"
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/* USER CODE BEGIN 0 */
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/* USER CODE END 0 */
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/*----------------------------------------------------------------------------*/
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/* Configure DMA */
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/*----------------------------------------------------------------------------*/
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/* USER CODE BEGIN 1 */
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/* USER CODE END 1 */
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DMA_HandleTypeDef hdma_memtomem_dma2_stream0;
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/**
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* Enable DMA controller clock
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* Configure DMA for memory to memory transfers
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* hdma_memtomem_dma2_stream0
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*/
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void MX_DMA_Init(void)
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{
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/* DMA controller clock enable */
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__HAL_RCC_DMA2_CLK_ENABLE();
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/* Configure DMA request hdma_memtomem_dma2_stream0 on DMA2_Stream0 */
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hdma_memtomem_dma2_stream0.Instance = DMA2_Stream0;
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hdma_memtomem_dma2_stream0.Init.Channel = DMA_CHANNEL_0;
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hdma_memtomem_dma2_stream0.Init.Direction = DMA_MEMORY_TO_MEMORY;
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hdma_memtomem_dma2_stream0.Init.PeriphInc = DMA_PINC_ENABLE;
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hdma_memtomem_dma2_stream0.Init.MemInc = DMA_MINC_DISABLE;
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hdma_memtomem_dma2_stream0.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
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hdma_memtomem_dma2_stream0.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD;
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hdma_memtomem_dma2_stream0.Init.Mode = DMA_NORMAL;
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hdma_memtomem_dma2_stream0.Init.Priority = DMA_PRIORITY_MEDIUM;
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hdma_memtomem_dma2_stream0.Init.FIFOMode = DMA_FIFOMODE_ENABLE;
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hdma_memtomem_dma2_stream0.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL;
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hdma_memtomem_dma2_stream0.Init.MemBurst = DMA_MBURST_SINGLE;
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hdma_memtomem_dma2_stream0.Init.PeriphBurst = DMA_PBURST_SINGLE;
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if (HAL_DMA_Init(&hdma_memtomem_dma2_stream0) != HAL_OK)
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{
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Error_Handler();
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}
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/* DMA interrupt init */
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/* DMA2_Stream0_IRQn interrupt configuration */
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HAL_NVIC_SetPriority(DMA2_Stream0_IRQn, 5, 0);
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HAL_NVIC_EnableIRQ(DMA2_Stream0_IRQn);
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}
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/* USER CODE BEGIN 2 */
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/* USER CODE END 2 */
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